ECE Department IC APPLICATIONS LAB

Experiment No: 11 II/IV ECE (I Semester) Page 1 of 5

VOLTAGE REGULATOR USING IC 723

Aim: To design a low oltage !eg"lator "sing IC #$%& Apparatu : 1& $& %& +& Voltage !eg"lator trainer 'it (s)illos)ope *igital m"ltimeter Conne)ting pat), ),ords

Cir!uit "e !ripti#n: T,e IC #$% is a monolit,i) integrated )ir)"it oltage reg"lator feat"ring ,ig, ripple re-e)tion. ex)ellent inp"t and load reg"lation. ex)ellent temperat"re sta/ilit0 et)&. It )onsists of a temperat"re )ompensating referen)e oltage amplifier. an error amplifier. 151m2 o"tp"t transistor and an ad-"sta/le o"tp"t )"rrent limiter& T,e /asi) low oltage reg"lator t0pe #$% )ir)"it is s,own in fig (1)& T,e "nreg"lated inp"t oltage is $+V and t,e reg"lated o"tp"t oltage is from 1&$V to #&%V /0 ar0ing P(T!& !SC (!1) is )onne)ted a)ross )"rrent sense (CS) and )"rrent limit (C3) terminals to limit t,e a))idental s,ort )ir)"it )"rrent& 2 sta/ili4ing )apa)itor (C1) of 111 p5 is )onne)ted /etween fre6"en)0 )ompensation terminal and in erting (INV) terminal& External NPN pass transistor is added to t,e /asi) #$%7reg"lator )ir)"it to in)rease its load )"rrent )apa/ilit0& T,e o"tp"t oltage )an /e reg"lated from # to %# Volts for an inp"t oltage range from 8&5 to +1Volts& 5or intermediate o"tp"t oltages t,e following form"la )an /e "sed R + R$ Vout = 1 XVref R$

9 R$ are )al)"lated from potential di ider networ': & T,e resistor al"es R1

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ECE Department IC APPLICATIONS LAB

Experiment No: 11 Pr#!e"ure: 1& Swit), (N t,e experimental /oard /0 )onne)ting t,e power )ard to t,e a) mains& II/IV ECE (I Semester) Page $ of 5

$& <a'e s"re t,at t,e potentiometer are in minim"m position& %& Conne)t t,e =V 2C tapping of t,e transformer se)ondar0 to t,e /ridge re)tifier inp"t and s,ort !aw *C > e oltage point and pin 1$ of #$%& +& <eas"re t,e o"tp"t oltage wit, a *<< and also meas"re t,e o"tp"t wit, t,e 11?@ potentiometer wit, its maxim"m position& 5& Now dis)onne)t t,e =V 2C tapping and )onne)t 11V 2C tapping and note down t,e minim"m and maxim"m o"tp"t oltages wit, 11?@ minim"m and maxim"m positions& A& !epeat t,e same pro)ed"re for 1$V. 1AV . and 1=V 2C transformer se)ondar0 tapping and ta/"late t,ese al"es& #& Now. again )onne)t =V 2C to t,e /ridge re)tifier inp"t. set t,e o"tp"t *C oltage at 5V wit, 11?@ potentiometer& =& Conne)t t,e load resistor wit,(1751m2) milliammeter and ar0 t,e load resistor and note down t,e readings of t,e o"tp"t oltage and o"tp"t )"rrent wit, different load resistor& L#a" re$u%ati#n: 8& Cal)"late and ta/"late t,e load reg"lation at ea), load )"rrent& B !eg"lation C (VN37V53) D 111/ V53 E,ere VN3C *C o"tp"t oltage at no load V53 C *C o"tp"t oltage at f"ll load 11&*raw a grap, /etween load )"rrent Id) and load oltage Vd) reg"lation

S.No

LOAD Rl

VNL

VFL

Id)

B of load
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ECE Department IC APPLICATIONS LAB

Experiment No: 11 II/IV ECE (I Semester)
=

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reg"lation
E1 x111

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ECE Department IC APPLICATIONS LAB

Experiment No: 11 II/IV ECE (I Semester) Page + of 5

Cir!uit Dia$ram &i%ter:

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ECE Department IC APPLICATIONS LAB

Experiment No: 11 Re u%t: II/IV ECE (I Semester) Page 5 of 5

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