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TEST BENCH WAVEFORM

TESTBENCH WAVEFORM

TESTBENCH WAVEFORM

TESTBENCH WAVEFORM

TESTBENCH WAVEFORM

TESTBENCH WAVEFORM

TESTBENCH WAVEFORM

TESTBENCH WAVEFORM

TESTBENCH WAVEFORM

TESTBENCH WAVEFORM

CIRCUIT DIAGRAM:

V2
M 1

0Vdc
I

M b re a k N

V1
0Vdc

OUTPUT WAVEFORM:

CIRCUIT DIAGRAM:

M 2
M b re a k P

V1 = 0
V2 = 5V
T D = 0 .5 m
TR = .1 m
T F = .1 m
P W = .4 m
PER = 1m

V1
M 1
C 1

M b re a k N

1n

OUTPUT WAVEFORM:

V2
5v

CIRCUIT DIAGRAM:

R 1

V1
10V

R 2

1k

C 1

1k

M 1
V

M b re a k N

1n
VO FF = 0
VAM PL = 30m v
F R EQ = 1K

V2
R 3
1k

OUTPUT WAVEFORM:

CIRCUIT DAGRAM:
2
R 3

V1

1k

10Vdc

1
2

R 1
1

C 12

1k
2

1 0n u f
VO F F = 0v
VAM PL = 30m v
FR EQ = 1k

V3

1
2
R 2
1k
1

M1
M b re a k N
C 3
10nf

OUTPUT WAVEFORM:

CIRCUIT DIAGRAM:

M 1
M 2
V1
M b re a k P
I

15V

M b re a k P
I

R 2
500k

R 1

500k

OUTPUT CIRCUIT:

M1
8 . 26 37 97 p. A1 u A
0A
- 6 7 7 . M1 ub Ar e a k P
I

6 7 7 .1 u A
R 2
10K

M2

2 9 .6 4 u A
V1

0A
M b re a k P

- 2 91 . 96 24 .u1 Af A
I

R1

2 9 .6 4 u A
500k

15V
7 0 6 .8 u A

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