INTRODUCTION TO POWER

ELECTRONICS
Power Electronics is a field which combines Power (electric power), Electronics and
Control systems.
Power engineering deals with the static and rotating power equipment for the generation,
transmission and distribution of electric power.
Electronics deals with the study of solid state semiconductor power devices and circuits
for Power conversion to meet the desired control objectives (to control the output voltage
and output power).
Power electronics may be defined as the subject of applications of solid state power
semiconductor devices (Thyristors) for the control and conversion of electric power.
Power electronics deals with the study and design of Thyristorised power controllers for
variety of application like Heat control, Light/Illumination control, Motor control –
AC/DC motor drives used in industries, High voltage power supplies, Vehicle propulsion
systems, High voltage direct current (HVDC) transmission.
BRIEF HISTORY OF POWER ELECTRONICS
The first Power Electronic Device developed was the Mercury Arc Rectifier during the
year 1900. Then the other Power devices like metal tank rectifier, grid controlled vacuum
tube rectifier, ignitron, phanotron, thyratron and magnetic amplifier, were developed &
used gradually for power control applications until 1950.
The first SCR (silicon controlled rectifier) or Thyristor was invented and developed by
Bell Lab’s in 1956 which was the first PNPN triggering transistor.
The second electronic revolution began in the year 1958 with the development of the
commercial grade Thyristor by the General Electric Company (GE). Thus the new era of
power electronics was born. After that many different types of power semiconductor
devices & power conversion techniques have been introduced.The power electronics
revolution is giving us the ability to convert, shape and control large amounts of power.
SOME APPLICATIONS OF POWER ELECTRONICS
Advertising, air conditioning, aircraft power supplies, alarms, appliances – (domestic and
industrial), audio amplifiers, battery chargers, blenders, blowers, boilers, burglar alarms,
cement kiln, chemical processing, clothes dryers, computers, conveyors, cranes and
hoists, dimmers (light dimmers), displays, electric door openers, electric dryers, electric
fans, electric vehicles, electromagnets, electro mechanical electro plating, electronic
ignition, electrostatic precipitators, elevators, fans, flashers, food mixers, food warmer
trays, fork lift trucks, furnaces, games, garage door openers, gas turbine starting,
generator exciters, grinders, hand power tools, heat controls, high frequency lighting,
HVDC transmission, induction heating, laser power supplies, latching relays, light
flashers, linear induction motor controls, locomotives, machine tools, magnetic recording,
magnets, mass transit railway system, mercury arc lamp ballasts, mining, model trains,
motor controls, motor drives, movie projectors, nuclear reactor control rod, oil well
drilling, oven controls, paper mills, particle accelerators, phonographs, photo copiers,
power suppliers, printing press, pumps and compressors, radar/sonar power supplies,
1
refrigerators, regulators, RF amplifiers, security systems, servo systems, sewing
machines, solar power supplies, solid-state contactors, solid-state relays, static circuit
breakers, static relays, steel mills, synchronous motor starting, TV circuits, temperature
controls, timers and toys, traffic signal controls, trains, TV deflection circuits, ultrasonic
generators, UPS, vacuum cleaners, VAR compensation, vending machines, VLF
transmitters, voltage regulators, washing machines, welding equipment.
POWER ELECTRONIC APPLICATIONS
COMMERCIAL APPLICATIONS
Heating Systems Ventilating, Air Conditioners, Central Refrigeration, Lighting,
Computers and Office equipments, Uninterruptible Power Supplies (UPS), Elevators, and
Emergency Lamps.
DOMESTIC APPLICATIONS
Cooking Equipments, Lighting, Heating, Air Conditioners, Refrigerators & Freezers,
Personal Computers, Entertainment Equipments, UPS.
INDUSTRIAL APPLICATIONS
Pumps, compressors, blowers and fans. Machine tools, arc furnaces, induction furnaces,
lighting control circuits, industrial lasers, induction heating, welding equipments.
AEROSPACE APPLICATIONS
Space shuttle power supply systems, satellite power systems, aircraft power systems.
TELECOMMUNICATIONS
Battery chargers, power supplies (DC and UPS), mobile cell phone battery chargers.
TRANSPORTATION
Traction control of electric vehicles, battery chargers for electric vehicles, electric
locomotives, street cars, trolley buses, automobile electronics including engine controls.
UTILITY SYSTEMS
High voltage DC transmission (HVDC), static VAR compensation (SVC), Alternative
energy sources (wind, photovoltaic), fuel cells, energy storage systems, induced draft fans
and boiler feed water pumps.
POWER SEMICONDUCTOR DEVICES
• Power Diodes.
• Power Transistors (BJT’s).
• Power MOSFETS.
• IGBT’s.
• Thyristors
2
Thyristors are a family of p-n-p-n structured power semiconductor switching
devices
• SCR’s (Silicon Controlled Rectifier)
The silicon controlled rectifier is the most commonly and widely used
member of the thyristor family. The family of thyristor devices include SCR’s,
Diacs, Triacs, SCS, SUS, LASCR’s and so on.
POWER SEMICONDUCTOR DEVICES USED IN POWER
ELECTRONICS
The first thyristor or the SCR was developed in 1957. The conventional Thyristors
(SCR’s) were exclusively used for power control in industrial applications until 1970.
After 1970, various types of power semiconductor devices were developed and became
commercially available. The power semiconductor devices can be divided broadly into
five types
• Power Diodes.
• Thyristors.
• Power BJT’s.
• Power MOSFET’s.
• Insulated Gate Bipolar Transistors (IGBT’s).
• Static Induction Transistors (SIT’s).
The Thyristors can be subdivided into different types
• Forced-commutated Thyristors (Inverter grade Thyristors)
• Line-commutated Thyristors (converter-grade Thyristors)
• Gate-turn off Thyristors (GTO).
• Reverse conducting Thyristors (RCT’s).
• Static Induction Thyristors (SITH).
• Gate assisted turn-off Thyristors (GATT).
• Light activated silicon controlled rectifier (LASCR) or Photo SCR’s.
• MOS-Controlled Thyristors (MCT’s).
POWER DIODES
Power diodes are made of silicon p-n junction with two terminals, anode and
cathode. P-N junction is formed by alloying, diffusion and epitaxial growth. Modern
techniques in diffusion and epitaxial processes permit desired device characteristics.
The diodes have the following advantages
• High mechanical and thermal reliability
• High peak inverse voltage
3
• Low reverse current
• Low forward voltage drop
• High efficiency
• Compactness.
Diode is forward biased when anode is made positive with respect to the cathode. Diode
conducts fully when the diode voltage is more than the cut-in voltage (0.7 V for Si).
Conducting diode will have a small voltage drop across it.
Diode is reverse biased when cathode is made positive with respect to anode. When
reverse biased, a small reverse current known as leakage current flows. This leakage
current increases with increase in magnitude of reverse voltage until avalanche voltage is
reached (breakdown voltage).
DYNAMIC CHARACTERISTICS OF POWER SWITCHING
DIODES
At low frequency and low current, the diode may be assumed to act as a perfect switch
and the dynamic characteristics (turn on & turn off characteristics) are not very important.
But at high frequency and high current, the dynamic characteristics plays an important
role because it increases power loss and gives rise to large voltage spikes which may
damage the device if proper protection is not given to the device.
4
A K
R
V
+ −
R e v e r s e
L e a k a g e C u r r e n t
I
T
2
T
1
T
1
T
2
V
V
+ -
+
-
V
i
R
L
I
V
i
V
F
0 t
t
1
- V
R
( b )
( C )
t
0
p - p
a t
j u n c t i o n
n n 0
I
0
t
( d )
t
( e )
- V
R
0
V
I
0
t
2
t
1
F o r w a r d
b i a s
M i n o r i t y
c a r r i e r
s t o r a g e , t
s
T r a n s i t i o n
i n t e r v a l , t
t
I
F
V
F
R
L

− ≈

I
R
V
R
R
L
Fig: Storage & Transition Times during the Diode Switching
REVERSE RECOVERY CHARACTERISTIC
Reverse recovery characteristic is much more important than forward recovery
characteristics because it adds recovery losses to the forward loss. Current when diode is
forward biased is due to net effect of majority and minority carriers. When diode is in
forward conduction mode and then its forward current is reduced to zero (by applying
reverse voltage) the diode continues to conduct due to minority carriers which remains
stored in the p-n junction and in the bulk of semi-conductor material. The minority
carriers take some time to recombine with opposite charges and to be neutralized. This
time is called the reverse recovery time. The reverse recovery time (t
rr
) is measured from
the initial zero crossing of the diode current to 25% of maximum reverse current I
rr
. t
rr
has 2 components, t
1
and t
2
. t
1
is as a result of charge storage in the depletion region of
the junction i.e., it is the time between the zero crossing and the peak reverse current I
rr
.
t
2
is as a result of charge storage in the bulk semi-conductor material.
( )
1 2
1
rr
RR
t t t
di
I t
dt
· +
·
5
The waveform in
(a) Simple diode circuit.
(b)Input waveform
applied to the diode
circuit in (a);
(c) The excess-carrier
density at the junction; (d)
the diode current; (e) the
diode voltage.
The reverse recovery time depends on the junction temperature, rate of fall of
forward current and the magnitude of forward current prior to commutation (turning off).
When diode is in reverse biased condition the flow of leakage current is due to minority
carriers. Then application of forward voltage would force the diode to carry current in the
forward direction. But a certain time known as forward recovery time (turn-ON time) is
required before all the majority carriers over the whole junction can contribute to current
flow. Normally forward recovery time is less than the reverse recovery time. The forward
recovery time limits the rate of rise of forward current and the switching speed.
Reverse recovery charge
RR
Q
, is the amount of charge carriers that flow across
the diode in the reverse direction due to the change of state from forward conduction to
reverse blocking condition. The value of reverse recovery charge
RR
Q
is determined form
the area enclosed by the path of the reverse recovery current.
1 2
1 1 1
2 2 2
RR RR RR RR RR
Q I t I t I t
| `
≅ + ·

. ,

1
2
RR RR RR
Q I t ∴ ·
POWER DIODES TYPES
Power diodes can be classified as
• General purpose diodes.
• High speed (fast recovery) diodes.
• Schottky diode.
GENERAL PURPOSE DIODES
The diodes have high reverse recovery time of about 25 microsecs (µ sec). They are used
in low speed (frequency) applications. e.g., line commutated converters, diode rectifiers
and converters for a low input frequency upto 1 KHz. Diode ratings cover a very wide
6
t
1
t
2
t
r r
0 . 2 5 I
R R
t
I
R R
I
F
range with current ratings less than 1 A to several thousand amps (2000 A) and with
voltage ratings from 50 V to 5 KV. These diodes are generally manufactured by diffusion
process. Alloyed type rectifier diodes are used in welding power supplies. They are most
cost effective and rugged and their ratings can go upto 300A and 1KV.
FAST RECOVERY DIODES
The diodes have low recovery time, generally less than 5 µ s. The major field of
applications is in electrical power conversion i.e., in free-wheeling ac-dc and dc-ac
converter circuits. Their current ratings is from less than 1 A to hundreds of amperes with
voltage ratings from 50 V to about 3 KV. Use of fast recovery diodes are preferable for
free-wheeling in SCR circuits because of low recovery loss, lower junction temperature
and reduceddi dt . For high voltage ratings greater than 400 V they are manufactured by
diffusion process and the recovery time is controlled by platinum or gold diffusion. For
less than 400 V rating epitaxial diodes provide faster switching speeds than diffused
diodes. Epitaxial diodes have a very narrow base width resulting in a fast recovery time of
about 50 ns.
SCHOTTKY DIODES
A Schottky diode has metal (aluminium) and semi-conductor junction. A layer of metal is
deposited on a thin epitaxial layer of the n-type silicon. In Schottky diode there is a larger
barrier for electron flow from metal to semi-conductor.
When Schottky diode is forward biased free electrons on n-side gain enough energy to
flow into the metal causing forward current. Since the metal does not have any holes there
is no charge storage, decreasing the recovery time. Therefore a Schottky diode can
switch-off faster than an ordinary p-n junction diode. A Schottky diode has a relatively
low forward voltage drop and reverse recovery losses. The leakage current is higher than
a p-n junction diode. The maximum allowable voltage is about 100 V. Current ratings
vary from about 1 to 300 A. They are mostly used in low voltage and high current dc
power supplies. The operating frequency may be as high 100-300 kHz as the device is
suitable for high frequency application. Schottky diode is also known as hot carrier diode.
General Purpose Diodes are available upto 5000V, 3500A. The rating of fast-recovery
diodes can go upto 3000V, 1000A. The reverse recovery time varies between 0.1 and
5µ sec. The fast recovery diodes are essential for high frequency switching of power
converters. Schottky diodes have low-on-state voltage drop and very small recovery time,
typically a few nanoseconds. Hence turn-off time is very low for schottky diodes. The
leakage current increases with the voltage rating and their ratings are limited to 100V,
300A. The diode turns on and begins to conduct when it is forward biased. When the
anode voltage is greater than the cathode voltage diode conducts.
The forward voltage drop of a power diode is low typically 0.5V to 1.2V. If the cathode
voltage is higher than its anode voltage then the diode is said to be reverse biased.
Power diodes of high current rating are available in
• Stud or stud-mounted type.
• Disk or press pack or Hockey-pack type.
In a stud mounted type, either the anode or the cathode could be the stud.
7
COMPARISON BETWEEN DIFFERENT TYPES OF
DIODES
General Purpose Diodes Fast Recovery Diodes Schottky Diodes
Upto 5000V & 3500A Upto 3000V and 1000A Upto 100V and 300A
Reverse recovery time –
High
Reverse recovery time –
Low
Reverse recovery time –
Extremely low.
25
rr
t s µ ≈ 0.1 s to 5 s
rr
t µ µ ·
rr
t
= a few nanoseconds
Turn off time - High Turn off time - Low Turn off time – Extremely
low
Switching frequency –
Low
Switching frequency –
High
Switching frequency –
Very high.
F
V
= 0.7V to 1.2V
F
V
= 0.8V to 1.5V
F
V ≈
0.4V to 0.6V
Natural or AC line commutated Thyristors are available with ratings upto 6000V, 3500A.
The turn-off time of high speed reverse blocking Thyristors have been improved
substantially and now devices are available with
OFF
t
= 10 to 20µ sec for a 1200V,
2000A Thyristors.
RCT’s (reverse conducting Thyristors) and GATT’s (gate assisted turn-off Thyristors) are
widely used for high speed switching especially in traction applications. An RCT can be
considered as a thyristor with an inverse parallel diode. RCT’s are available up to 2500V,
1000A (& 400A in reverse conduction) with a switching time of 40µ sec. GATT’s are
available upto 1200V, 400A with a switching speed of 8µ sec. LASCR’s which are
available upto 6000V, 1500A with a switching speed of 200µ sec to 400µ sec are
suitable for high voltage power systems especially in HVDC.
For low power AC applications, triac’s are widely used in all types of simple heat
controls, light controls, AC motor controls, and AC switches. The characteristics of
triac’s are similar to two SCR’s connected in inverse parallel and having only one gate
terminal. The current flow through a triac can be controlled in either direction.
GTO’s & SITH’s are self turn-off Thyristors. GTO’s & SITH’s are turned ON by
applying and short positive pulse to the gate and are turned off by applying short negative
pulse to the gates. They do not require any commutation circuits.
GTO’s are very attractive for forced commutation of converters and are available upto
4000V, 3000A.
SITH’s with rating as high as 1200V and 300A are expected to be used in medium power
converters with a frequency of several hundred KHz and beyond the frequency range of
GTO.
An MCT (MOS controlled thyristor) can be turned ON by a small negative voltage pulse
on the MOS gate (with respect to its anode) and turned OFF by a small positive voltage
8
pulse. It is like a GTO, except that the turn off gain is very high. MCT’s are available
upto 1000V and 100A.
High power bipolar transistors (high power BJT’s) are commonly used in power
converters at a frequency below 10KHz and are effectively used in circuits with power
ratings upto 1200V, 400A.
A high power BJT is normally operated as a switch in the common emitter configuration.
The forward voltage drop of a conducting transistor (in the ON state) is in the range of
0.5V to 1.5V across collector and emitter. That is
0.5
CE
V V ·
to 1.5V in the ON state.
9
POWER TRANSISTORS
Transistors which have high voltage and high current rating are called power transistors.
Power transistors used as switching elements, are operated in saturation region resulting
in a low - on state voltage drop. Switching speed of transistors is much higher than the
thyristors. And they are extensively used in dc-dc and dc-ac converters with inverse
parallel connected diodes to provide bi-directional current flow. However, voltage and
current ratings of power transistor are much lower than the thyristors. Transistors are used
in low to medium power applications. Transistors are current controlled device and to
keep it in the conducting state, a continuous base current is required.
Power transistors are classified as follows
• Bi-Polar Junction Transistors (BJTs)
• Metal-Oxide Semi-Conductor Field Effect Transistors (MOSFETs)
• Insulated Gate Bi-Polar Transistors (IGBTs)
• Static Induction Transistors (SITs)
BI-POLAR JUNCTION TRANSISTOR
A Bi-Polar Junction Transistor is a 3 layer, 3 terminals device. The 3 terminals are base,
emitter and collector. It has 2 junctions’ collector-base junction (CB) and emitter-base
junction (EB). Transistors are of 2 types, NPN and PNP transistors.
The different configurations are common base, common collector and common emitter.
Common emitter configuration is generally used in switching applications.

Fig: NPN Transistor
Fig: Input
Characteristic
Fig: Output / Collector Characteristics
Transistors can be operated in 3 regions i.e., cut-off, active and saturation.
10
V
C C
V
C C
I
E
V
C E
V
B E
I
C
I
B
R
B
R
C
I
B
V
B E
V
C E 1
V
C E 2
> V
C E 1
V
C E 2
I
C
V
C E
I
B 1
I
B 2
I
B 3
I
B 1
> I > I
B B 2 3
In the cut-of region transistor is OFF, both junctions (EB and CB) are reverse biased. In
the cut-off state the transistor acts as an open switch between the collector and emitter.
In the active region, transistor acts as an amplifier (CB junction is reverse biased and EB
junction is forward biased),
In saturation region the transistor acts as a closed switch and both the junctions CB and
EB are forward biased.
SWITCHING CHARACTERISTICS
An important application of transistor is in switching circuits. When transistor is used as
a switch it is operated either in cut-off state or in saturation state. When the transistor is
driven into the cut-off state it operates in the non-conducting state. When the transistor is
operated in saturation state it is in the conduction state.
Thus the non-conduction state is operation in the cut-off region while the conducting state
is operation in the saturation region.
Fig: Switching Transistor in CE Configuration
As the base voltage V
B
rises from 0 to V
B
, the base current rises to I
B
, but the
collector current does not rise immediately. Collector current will begin to increase only
when the base emitter junction is forward biased and V
BE
> 0.6V. The collector current
I
C
will gradually increase towards saturation level
( ) C sat
I . The time required for the
collector current to rise to 10% of its final value is called delay time
d
t
. The time taken by
the collector current to rise from 10% to 90% of its final value is called rise time
r
t
. Turn
on times is sum of
d
t
and
r
t
.
on d r
t t t · +
The turn-on time depends on
• Transistor junction capacitances which prevent the transistors voltages from
changing instantaneously.
• Time required for emitter current to diffuse across the base region into the
collector region once the base emitter junction is forward biased. The turn on time
on
t
ranges from 10 to 300 ns. Base current is normally more than the minimum
required to saturate the transistor. As a result excess minority carrier charge is
stored in the base region.
When the input voltage is reversed from
1 B
V
to
2 B
V −
the base current also abruptly
changes but the collector current remains constant for a short time interval
S
t
called the
storage time.
11
The reverse base current helps to discharge the minority charge carries in the base region
and to remove the excess stored charge form the base region. Once the excess stored
charge is removed the baser region the base current begins to fall towards zero. The fall-
time
f
t
is the time taken for the collector current to fall from 90% to 10% of
( ) C sat
I
. The
turn off time
off
t
is the sum of storage time and the fall time.
off s f
t t t · +

Fig:
Switching Times of Bipolar Junction Transistor
12
t
− V
B 2
I
B
I
C
t
r
t
d
0 . 1 I
C
0 . 9 I
C
V
B 1
I
B 1
− I
B 2
t
s
t
f
t
t
I
C ( s a t )
t = T u r n o n d e l a y t i m e .
t = R i s e t i m e .
t = S t o r a g e t i m e .
t = F a l l T i m e .
t = ( t + t )
t = ( t + t )
d
r
s
f
o n d r
o f f s f
DIAC
A diac is a two terminal five layer semi-conductor bi-directional switching device. It can
conduct in both directions. The device consists of two p-n-p-n sections in anti parallel as
shown in figure.
1
T
and
2
T
are the two terminals of the device.
P
N N
N
N
P
P
P
T
1
T
1
T
2
T
2
Fig.: Diac Structure Fig.: Diac symbol
Figure above shows the symbol of diac. Diac will conduct when the voltage applied
across the device terminals
1 2
& T T
exceeds the break over voltage..
T
1
T
1
T
2
T
2
R
L
R
L
V V
I
I
Fig. 1.1 Fig. 1.2
Figure 1.1 shows the circuit diagram with
1
T
positive with respect to
2
T
. When the
voltage across the device is less than the break over voltage
01 B
V
a very small amount of
current called leakage current flows through the device. During this period the device is
in non-conducting or blocking mode. But once the voltage across the diac exceeds the
break over voltage
01 B
V
the diac turns on and begins to conduct. Once it starts conducting
the current through diac becomes large and the device current has to be limited by
connecting an external load resistance
L
R
, at the same time the voltage across the diac
decreases in the conduction state. This explain the forward characteristics.
13
Figure 1.2 shows the circuit diagram with
2
T
positive with respect to
1
T
. The reverse
characteristics obtained by varying the supply voltage are identical with the forward
characteristic as the device construction is symmetrical in both the directions.
In both the cases the diac exhibits negative resistance switching characteristic during
conduction. i.e., current flowing through the device increases whereas the voltage across
it decreases.
Figure below shows forward and reverse characteristics of a diac. Diac is mainly used for
triggering triacs.
Fig.: Diac Characteristics
14
V
B 0 2
V
B 0 1
B l o c k i n g s t a t e
F o r w a r d
c o n d u c t i o n r e g i o n
R e v e r s e
c o n d u c t i o n r e g i o n
I
V
TRIAC
A triac is a three terminal bi-directional switching thyristor device. It can conduct in both
directions when it is triggered into the conduction state. The triac is equivalent to two
SCRs connected in anti-parallel with a common gate. Figure below shows the triac
structure. It consists of three terminals viz.,
2
MT
,
1
MT
and gate G.
M T
2
M T
1
G
P
2
P
2
N
1
N
4
N
3
G
N
2
N
1
P
1
M T
1
M T
2
P
1
Fig. : Triac Structure Fig. : Triac Symbol
The gate terminal G is near the
1
MT
terminal. Figure above shows the triac symbol.
1
MT

is the reference terminal to obtain the characteristics of the triac. A triac can be operated
in four different modes depending upon the polarity of the voltage on the terminal
2
MT
with respect to
1
MT
and based on the gate current polarity.
The characteristics of a triac is similar to that of an SCR, both in blocking and conducting
states. A SCR can conduct in only one direction whereas triac can conduct in both
directions.
TRIGGERING MODES OF TRIAC
MODE 1 :
2
MT
positive, Positive gate current (
I
+
mode of operation)
When
2
MT and gate current are positive with respect to MT
1
, the gate current flows
through P
2
-N
2
junction as shown in figure below. The junction P
1
-N
1
and P
2
-N
2
are
forward biased but junction N
1
-P
2
is reverse biased. When sufficient number of charge
carriers are injected in P
2
layer by the gate current the junction N
1
-P
2
breakdown and
triac starts conducting through P
1
N
1
P
2
N
2
layers. Once triac starts conducting the current
increases and its V-I characteristics is similar to that of thyristor. Triac in this mode
operates in the first-quadrant.
15
P
1
N
1
N
2
P
2
I g
I g
M T
2
( + )
M T
1
( ) −
G
V
( + )
MODE 2 : MT
2
positive, Negative gate current (
I

mode of operation)
P
1
N
1
N
2
N
3
P
2
I g
M T
2
( + )
M T
1
( ) −
G
V
F i n a l
c o n d u c t i o n
I n i t i a l
c o n d u c t i o n
When MT
2
is positive and gate G is negative with respect to MT
1
the gate current flows
through P
2
-N
3
junction as shown in figure above. The junction P
1
-N
1
and P
2
-N
3
are
forward biased but junction N
1
-P
2
is reverse biased. Hence, the triac initially starts
conducting through P
1
N
1
P
2
N
3
layers. As a result the potential of layer between P
2
-N
3
rises towards the potential of MT
2
. Thus, a potential gradient exists across the layer P
2
with left hand region at a higher potential than the right hand region. This results in a
current flow in P
2
layer from left to right, forward biasing the P
2
N
2
junction. Now the
right hand portion P
1
-N
1
- P
2
-N
2
starts conducting. The device operates in first quadrant.
When compared to Mode 1, triac with MT
2
positive and negative gate current is less
sensitive and therefore requires higher gate current for triggering.
MODE 3 : MT
2
negative, Positive gate current (
III
+
mode of operation)
When MT
2
is negative and gate is positive with respect to MT
1
junction P
2
N
2
is forward
biased and junction P
1
-N
1
is reverse biased. N
2
layer injects electrons into P
2
layer as
shown by arrows in figure below. This causes an increase in current flow through
junction P
2
-N
1
. Resulting in breakdown of reverse biased junction N
1
-P
1
. Now the
16
device conducts through layers P
2
N
1
P
1
N
4
and the current starts increasing, which is
limited by an external load.
P
1
N
1
N
4
N
2
P
2
I g
M T
2
( ) −
M T
1
( + ) G
( + )
The device operates in third quadrant in this mode. Triac in this mode is less sensitive
and requires higher gate current for triggering.
MODE 4 : MT
2
negative, Negative gate current (
III

mode of operation)
P
1
N
1
N
4
P
2
I g
M T
2
( ) −
M T
1
( + )
N
3
G
( + )
In this mode both MT
2
and gate G are negative with respect to MT
1
, the gate current
flows through P
2
N
3
junction as shown in figure above. Layer N
3
injects electrons as
shown by arrows into P
2
layer. This results in increase in current flow across P
1
N
1
and
the device will turn ON due to increased current in layer N
1
. The current flows through
layers P
2
N
1
P
1
N
4
. Triac is more sensitive in this mode compared to turn ON with
positive gate current. (Mode 3).
Triac sensitivity is greatest in the first quadrant when turned ON with positive gate
current and also in third quadrant when turned ON with negative gate current. when
2
MT

is positive with respect to
1
MT
it is recommended to turn on the triac by a positive gate
current. When
2
MT
is negative with respect to
1
MT
it is recommended to turn on the triac
17
by negative gate current. Therefore Mode 1 and Mode 4 are the preferred modes of
operation of a triac (
I
+
mode and
III

mode of operation are normally used).
TRIAC CHARACTERISTICS
Figure below shows the circuit to obtain the characteristics of a triac. To obtain the
characteristics in the third quadrant the supply to gate and between
2
MT and MT
1
are
reversed.
R
L
M T
1
M T
2
R
g
V
s
V
g g
I
A
A
V
G
+
+
+
+
+
-
-
-
-
-
Figure below shows the V-I Characteristics of a triac. Triac is a bidirectional switching
device. Hence its characteristics are identical in the first and third quadrant. When gate
current is increased the break over voltage decreases.
V
B 0 2
M T
2
( )
G ( )


M T
2
( + )
G ( + )
V
B 0 1
V
B 0 1
, V
- B r e a k o v e r v o l t a g e s
B 0 1
I
g 1
I
g 2

I
→ V
V
I > I
g 2 g 2 1
Fig.: Triac Characteristic
Triac is widely used to control the speed of single phase induction motors. It is also used
in domestic lamp dimmers and heat control circuits, and full wave AC voltage controllers.
18
POWER MOSFET
Power MOSFET is a metal oxide semiconductor field effect transistor. It is a voltage
controlled device requiring a small input gate voltage. It has high input impedance.
MOSFET is operated in two states viz., ON STATE and OFF STATE. Switching speed
of MOSFET is very high. Switching time is of the order of nanoseconds.
MOSFETs are of two types
• Depletion MOSFETs
• Enhancement MOSFETs.
MOSFET is a three terminal device. The three terminals are gate (G), drain (D) and
source (S).
DEPLETION MOSFET
Depletion type MOSFET can be either a n-channel or p-channel depletion type
MOSFET.
A depletion type n-channel MOSFET consists of a p-type silicon substrate with two
highly doped n
+
silicon for low resistance connections. A n-channel is diffused between
drain and source. Figure below shows a n-channel depletion type MOSFET. Gate is
isolated from the channel by a thin silicon dioxide layer.
D
G
S
O x i d e
n
n
+
n
+
M e t a l
C h a n n e l
p - t y p e
s u b s t r a t e
G
S
D
Structure Symbol
Fig. : n-channel depletion type MOSFET
Gate to source voltage (V
GS
) can be either positive or negative. If V
GS
is
negative, electrons present in the n-channel are repelled leaving positive ions. This creates
a depletion.
19
D
G
S
O x i d e
p
p
+
p
+
M e t a l
C h a n n e l
n - t y p e
s u b s t r a t e
G
S
D
Structure Symbol
Fig. : P-channel depletion type MOSFET
Figure above shows a p-channel depletion type MOSFET. A P-channel depletion type
MOSFET consists of a n-type substrate into which highly doped p-regions and a P-
channel are diffused. The two P
+
regions act as drain and source P-channel operation is
same except that the polarities of voltages are opposite to that of n-channel.
ENHANCEMENT MOSFET
Enhancement type MOSFET has no physical channel. Enhancement type MOSFET can
be either a n-channel or p-channel enhancement type MOSFET.
D
G
S
O x i d e
n
+
n
+
M e t a l
p - t y p e
s u b s t r a t e
G
S
D
Structure Symbol
Fig. : n-channel enhancement type MOSFET
Figure above shows a n-channel enhancement type MOSFET. The P-substrate extends
upto the silicon dioxide layer. The two highly doped n regions act as drain and source.
When gate is positive (V
GS
) free electrons are attracted from P-substrate and they collect
near the oxide layer. When gate to source voltage, V
GS
becomes greater than or equal to
a value called threshold voltage (V
T
). Sufficient numbers of electrons are accumulated to
form a virtual n-channel and current flows from drain to source.
Figure below shows a p-channel enhancement type of MOSFET. The n-substrate extends
upto the silicon dioxide layer. The two highly doped P regions act as drain and source.
For p-channel the polarities of voltages are opposite to that of n-channel.
20
D
G
S
O x i d e
p
+
p
+
M e t a l
n - t y p e
s u b s t r a t e
G
S
D
Structure Symbol
Fig. : P-channel enhancement type MOSFET.
CHARACTERISTICS OF MOSFET
Depletion MOSFET
Figure below shows n-channel depletion type MOSFET with gate positive with respect to
source.
D
I
,
DS
V
and
GS
V
are drain current, drain source voltage and gate-source voltage.
A plot of variation of
D
I
with
DS
V
for a given value of
GS
V
gives the Drain characteristics
or Output characteristics.
V
G S
I
D
+
+


G
S
D
V
D S
Fig: n-channel Depletion MOSFET
n-channel Depletion type MOSFET
&
GS DS
V V
are positive.
D
I
is positive for n channel MOSFET .
GS
V
is negative for
depletion mode.
GS
V
is positive for enhancement mode.
Figure below shows the drain characteristic. MOSFET can be operated in three regions
• Cut-off region,
• Saturation region (pinch-off region) and
• Linear region.
21
In the linear region
D
I
varies linearly with
DS
V
. i.e., increases with increase in
DS
V
. Power
MOSFETs are operated in the linear region for switching actions. In saturation region
D
I

almost remains constant for any increase in
DS
V
.
Fig.: Drain Characteristic
Figure below shows the transfer characteristic. Transfer characteristic gives the variation
of
D
I
with
GS
V
for a given value of
DS
V
.
DSS
I
is the drain current with shorted gate. As
curve extends on both sides
GS
V
can be negative as well as positive.
V
G S
I
D
I
D S S
V
G S ( O F F )
Fig.: Transfer characteristic
Enhancement MOSFET
V
G S
I
D
+ +
− −
G
S
D
V
D S
Fig: n-channel Enhancement MOSFET
22
V
G S 1
V
G S 2
V
G S 3
L i n e a r
r e g i o n
S a t u r a t i o n
r e g i o n
V
D S
I
D
Enhancement type MOSFET
GS
V
is positive for a n-channel enhancement MOSFET.
DS
V
&
D
I
are also positive for n
channel enhancement MOSFET
Figure above shows circuit to obtain characteristic of n channel enhancement type
MOSFET. Figure below shows the drain characteristic. Drain characteristic gives the
variation of
D
I
with
DS
V
for a given value of
GS
V
.
V
G S
I
D
V
T
( )
T GS TH
V V · ·
Gate Source Threshold Voltage
Fig.: Transfer Characteristic
Figure below shows the transfer characteristic which gives the variation of
D
I
with
GS
V

for a given value of
DS
V
.
V
G S 1
V
G S 2
V
G S 3
L i n e a r
r e g i o n
S a t u r a t i o n
r e g i o n
V
D S
V
D S
I
D
3 2 1 GS GS GS
V V V > >
Fig. : Drain Characteristic
23
MOSFET PARAMETERS
The parameters of MOSFET can be obtained from the graph as follows.
Mutual Transconductance
Constant
D
m
DS GS
I
g
V V

·
· ∆
.
Output or Drain Resistance
Constant
DS
ds
GS D
V
R
V I

·
· ∆
.
Amplification factor
x
ds m
R g µ ·
Power MOSFETs are generally of enhancement type. Power MOSFETs are used in
switched mode power supplies.
Power MOSFET’s are used in high speed power converters and are available at a
relatively low power rating in the range of 1000V, 50A at a frequency range of several
tens of KHz ( )
max
100 f KHz ·
.
SWITCHING CHARACTERISTICS OF MOSFET
Power MOSFETs are often used as switching devices. The switching characteristic of a
power MOSFET depends on the capacitances between gate to source
GS
C
, gate to drain
GD
C
and drain to source
GS
C
. It also depends on the impedance of the gate drive circuit.
During turn-on there is a turn-on delay
( ) d on
t
, which is the time required for the input
capacitance
GS
C
to charge to threshold voltage level
T
V
. During the rise time
r
t
,
GS
C

charges to full gate voltage
GSP
V
and the device operate in the linear region (ON state).
During rise time
r
t
drain current
D
I
rises from zero to full on state current
D
I
.
• Total turn-on time,
( )
on r d on
t t t · +
MOSFET can be turned off by discharging capacitance
GS
C
.
( ) d off
t
is the turn-off delay
time required for input capacitance
GS
C
to discharge from
1
V
to
GSP
V
. Fall time
f
t
is the
time required for input capacitance to discharge from
GSP
V
to threshold voltage
T
V
.
During fall time
f
t
drain current falls from
D
I
to zero. Figure below shows the switching
waveforms of power MOSFET.
24
t
V
1
V
G S P
V
1
V
G
V
T
t
d ( o n )
t
d ( o f f )
t
r
t
f
25
INSULATED GATE BIPOLAR
TRANSISTOR (IGBT)
IGBT is a voltage controlled device. It has high input impedance like a MOSFET
and low on-state conduction losses like a BJT.
Figure below shows the basic silicon cross-section of an IGBT. Its construction is
same as power MOSFET except that n
+
layer at the drain in a power MOSFET is
replaced by P
+
substrate called collector.
n e p i

n B u f f e r l a y e r
+
p
+
p
n
+
n
+
G a t e G a t e
E m i t t e r
C o l l e c t o r
G
E
C
Structure Symbol
Fig.: Insulated Gate Bipolar Transistor
IGBT has three terminals gate (G), collector (C) and emitter (E). With collector and gate
voltage positive with respect to emitter the device is in forward blocking mode. When
gate to emitter voltage becomes greater than the threshold voltage of IGBT, a n-channel is
formed in the P-region. Now device is in forward conducting state. In this state p
+

substrate injects holes into the epitaxial n

layer. Increase in collector to emitter voltage
will result in increase of injected hole concentration and finally a forward current is
established.
CHARACTERISTIC OF IGBT
Figure below shows circuit diagram to obtain the characteristic of an IGBT. An
output characteristic is a plot of collector current
C
I
versus collector to emitter voltage
CE
V
for given values of gate to emitter voltage
GE
V
.
26
V
G
V
C C
E
V
C E
R
G E
I
C
G
R
S
R
C
V
G E
Fig.: Circuit Diagram to Obtain Characteristics
I
C
V
C E
V
G E 1
V
G E 2
V
G E 3
V
G E 4
V V V > V
G E G E G E G E 4 3 2 1
> >
Fig. : Output Characteristics
A plot of collector current
C
I
versus gate-emitter voltage
GE
V
for a given value of
CE
V

gives the transfer characteristic. Figure below shows the transfer characteristic.
Note
Controlling parameter is the gate-emitter voltage
GE
V
in IGBT. If
GE
V
is less than the
threshold voltage
T
V
then IGBT is in OFF state. If
GE
V
is greater than the threshold
voltage
T
V
then the IGBT is in ON state.
IGBTs are used in medium power applications such as ac and dc motor drives, power
supplies and solid state relays.
I
C
V
G E
V
T
Fig. : Transfer Characteristic
27
SWITCHING CHARACTERISTIC OF IGBT
Figure below shows the switching characteristic of an IGBT. Turn-on time
consists of delay time
( ) d on
t
and rise time
r
t
.
t
t
t
V
G E T
0 . 9 V
C E
0 . 9 V
C E
0 . 9 I
C E
0 . 1 V
C E
0 . 1 V
C E
0 . 1 I
C E
I
C
V
G E
V
C E
t
d ( o n )
t
d ( o f f )
t
d ( o f f )
t
f
t
f
t
r
t = t + t
t = t + t
( o n ) d ( o n ) r
( o f f ) d ( o f f ) f
Fig. : Switching Characteristics
The turn on delay time is the time required by the leakage current
CE
I
to rise to 0.1
C
I
,
where
C
I
is the final value of collector current. Rise time is the time required for
collector current to rise from 0.1
C
I
to its final value
C
I
. After turn-on collector-emitter
voltage
CE
V
will be very small during the steady state conduction of the device.
The turn-off time consists of delay off time
( ) d off
t
and fall time
f
t
. Off time delay is the
time during which collector current falls from
C
I
to 0.9
C
I
and
GE
V
falls to threshold
voltage
GET
V
. During the fall time
f
t
the collector current falls from 0.90
C
I
to 0.1
C
I
.
During the turn-off time interval collector-emitter voltage rises to its final value
CE
V
.
IGBT’s are voltage controlled power transistor. They are faster than BJT’s, but still not
quite as fast as MOSFET’s. the IGBT’s offer for superior drive and output characteristics
when compared to BJT’s. IGBT’s are suitable for high voltage, high current and
frequencies upto 20KHz. IGBT’s are available upto 1400V, 600A and 1200V, 1000A.
28
IGBT APPLICATIONS
Medium power applications like DC and AC motor drives, medium power supplies, solid
state relays and contractors, general purpose inverters, UPS, welder equipments, servo
controls, robotics, cutting tools, induction heating
TYPICAL RATINGS OF IGBT
Voltage rating = 1400V. Current rating = 600A. Maximum operating frequency = 20KHz.
Switching time
2.3 s µ ≈ ( )
ON OFF
t t ≈
. ON state resistance = 600mΩ =
3
60 10 x

Ω.
POWER MOSFET RATINGS
Voltage rating = 500V. Current rating = 50A. Maximum operating frequency = 100KHz.
Switching time
0.6 s µ ≈
to
1 s µ ( )
ON OFF
t t ≈
. ON state resistance
( ) D ON
R
= 0.4mΩ to
0.6mΩ.
A MOSFET/ IGBT SWITCH
MOSFET / IGBT can be used as a switch in the circuit shown above. If a n-channel
enhancement MOSFET is used then the input pulse is
GS
V
which is the pulse applied
between gate and source, which is a positive going voltage pulse.
IGBT’s
Minority carrier devices, superior conduction characteristics, ease of drive, wide SOA,
peak current capability and ruggedness. Generally the switching speed of an IGBT is
inferior to that of a power MOSFET.
POWER MOSFET’S (MAJORITY CARRIER DEVICES)
Higher switching speed, peak current capability, ease of drive, wide SOA, avalanche and
v
t
d
d
capability have made power MOSFET is the ideal choice in new power electronic
circuit designs.
29
IGBT (INSULATED GATE BIPOLAR TRANSISTORS)
FEATURES
IGBT combines the advantages of BJT’s and MOSFET’s. Features of IGBT are
• IGBT has high input impedance like MOSFET’s.
• Low ON state conduction power losses like BJT’s.
• There is no secondary breakdown problem like BJT’s.
• By chip design and structure design, the equivalent drain to source
resistance
DS
R
is controlled to behave like that of BJT.
DATA SHEET DETAILS OF THE IGBT MODULE CM400HA-24H
High power switching device by Mitsubishi Semiconductors Company
400
C
I A ·
,
1200
CES
V V ·
.
APPLICATIONS OF IGBT CM400HA-24H
AC and DC motor controls, general purpose inverters, UPS, welders, servo
controls, numeric control, robotics, cutting tools, induction heating.
MAXIMUM RATINGS
CES
V
Collector-Emitter (G-E short) voltage 1200V
GES
V
Gate-Emitter (C-E short) voltage 20V t .
C
I
Collector Current (steady / average current) 400A, at
0
25
C
T C · .
CM
I
Pulsed Collector Current 800A
E
I
Emitter Current 400A, at
0
25
C
T C · .
EM
I
Maximum Pulsed Emitter Current 800A
( ) max C
P
Maximum Collector Power Dissipation 2800W, at
0
25
C
T C · .
storage
T
Maximum Storage Temperature
0
40 c − to
0
125 c
J
T
Junction Temperature
0
40 c − to
0
150 c
Weight Typical Value 400gm (0.4Kg)
Electrical Characteristics
J
T
=
0
25 c
( ) TH
GE TH
V V Gate Emitter · · −
Threshold Voltage.
( )
( ) 6
TH
GE
V V Typ ·
.
( )
( ) 4.5 min
TH
GE
V V ·
to 7.5V maximum at
40
C
I mA ·
and
10
CE
V V ·
.
CES
I
Collector cut-off current = 2mA (maximum) at
, 0
CE CES GE
V V V · ·
GES
I
Gate leakage current
0.5 A µ ·
(maximum) at
, 0
GE GES CE
V V V · ·
30
( ) CE sat
V
Collector-Emitter saturation voltage ( )
0
25 , 400 , 15
J C GE
T C I A V V · · ·
( ) CE sat
V
: 2.5V (typical), 3.5V (maximum)
( ) ON
d
t
Turn ON delay time 300nsec (maximum) at
600 , 400
CC C
V V I A · ·
.
r
t
Turn ON rise time 500nsec (maximum), at
1 2
15
GE GE
V V V · ·
.
( ) ( ) 800 max
ON d r
t ns t t · · +
( ) d OFF
t
Turn off delay time = 350nsec.
f
t
Turn off fall time = 350nsec.
( )
700 sec
OFF f d OFF
t t t n · + ·
(maximum)
rr
t
Reverse recovery time 250nsec.
rr
Q
Reverse recovery charge = 2.97µ c (typical).
CHARACTERISTICS OF THE EMITTER TO COLLECTOR FWD CM 400HA-
24H IGBT CHARACTERISTICS
0 2 4 6 8 1 0
V ( V o l t s )
C E
1 6 0
3 2 0
6 4 0
8 0 0
4 8 0
I
A M P S
C
V = 1 5 V
G E
1 2
8
V = 1 0 V
G E
V = 7 V
G E
V = 9 V
G E
Fig: Output Collector Characteristics
31
2 4 6 8 1 0 1 2 1 4
1 6 0
3 2 0
4 8 0
6 4 0
8 0 0
0
V = 1 0 V
C E
T = 1 2 5 C
j
0
T = 2 5 C
j
0
V
G E ( T H )
V
G E
I
A M P S
C
I V s V C h a r a c t e r i s t i c s
C G E
Fig: Transfer Characteristics
POWER SEMICONDUCTOR DEVICES, THEIR SYMBOLS AND
CHARACTERISTICS
32
33
CONTROL CHARACTERISTICS OF
POWER DEVICES
The power semiconductor devices can be operated as switches by applying control signals
to the gate terminal of Thyristors (and to the base of bi-polar transistor). The required
output is obtained by varying the conduction time of these switching devices. Figure
below shows the output voltages and control characteristics of commonly used power
switching devices. Once a thyristor is in a conduction mode, the gate signal of either
positive or negative magnitude has no effect. When a power semiconductor device is in a
normal conduction mode, there is a small voltage drop across the device. In the output
voltage waveforms shown, these voltage drops are considered negligible.
34
Fig: Control Characteristics of Power Switching Devices
The power semiconductor switching devices can be classified on the basis of
• Uncontrolled turn on and turn off (e.g.: diode).
• Controlled turn on and uncontrolled turn off (e.g. SCR)
• Controlled turn on and off characteristics (e.g. BJT, MOSFET, GTO,
SITH, IGBT, SIT, MCT).
• Continuous gate signal requirement (e.g. BJT, MOSFET, IGBT, SIT).
• Pulse gate requirement (e.g. SCR, GTO, MCT).
• Bipolar voltage withstanding capability (e.g. SCR, GTO).
• Unipolar voltage withstanding capability (e.g. BJT, MOSFET, GTO,
IGBT, MCT).
• Bidirectional current capability (e.g.: Triac, RCT).
• Unidirectional current capability (e.g. SCR, GTO, BJT, MOSFET, MCT,
IGBT, SITH, SIT & Diode).
35
THYRISTORISED POWER CONTROLLERS
Block diagram given below, shows the system employing a thyristorised power
controller. The main power flow between the input power source and the load is shown
by solid lines.
T h y r i s t o r i s e d
P o w e r
C o n t r o l l e r s
P o w e r
S o u r c e
C o n t r o l
U n i t
L o a d
E q u i p m e n t
M e a s u r i n g
U n i t
C o m m a n d
I n p u t
T o m e a s u r e
v o l t a g e , c u r r e n t ,
s p e e d , t e m p e r a t u r e
Thyristorised power controllers are widely used in the industry. Old/conventional
controllers including magnetic amplifiers, mercury arc rectifiers, thyratrons, ignitrons,
rotating amplifiers, resistance controllers have been replaced by thyristorised power
controllers in almost all the applications.
A typical block diagram of a thyristorised power converter is shown in the above figure.
The thyristor power converter converts the available power from the source into a suitable
form to run the load or the equipment. For example the load may be a DC motor drive
which requires DC voltage for its operation. The available power supply is AC power
supply as is often the case. The thyristor power converter used in this case is a AC to DC
power converter which converts the input AC power into DC output voltage to feed to the
DC motor. Very often a measuring unit or an instrumentation unit is used so as to
measure and monitor the output parameters like the output voltage, the load current, the
speed of the motor or the temperature etc. The measuring unit will be provided with
meters and display devices so that the output parameters can be seen and noted. The
control unit is employed to control the output of the thyristorised power converter so as to
adjust the output voltage / current to the desired value to obtain optimum performance of
the load or equipment. The signal from the control unit is used to adjust the phase angle /
trigger angle of the Thyristors in the power controller so as to vary the output voltage to
the desired value.
SOME IMPORTANT APPLICATIONS OF THYRISTORISED POWER
CONTROLLERS
• Control of AC and DC motor drives in rolling mills, paper and textile mills,
traction vehicles, mine winders, cranes, excavators, rotary kilns, ventilation fans,
compression etc.
• Uninterruptible and stand by power supplies for critical loads such as computers,
special high tech power supplies for aircraft and space applications.
36
• Power control in metallurgical and chemical processes using arc welding,
induction heating, melting, resistance heating, arc melting, electrolysis, etc.
• Static power compensators, transformer tap changers and static contactors for
industrial power systems.
• Power conversion at the terminals of a HVDC transmission systems.
• High voltage supplies for electrostatic precipitators and x-ray generators.
• Illumination/light control for lighting in stages, theaters, homes and studios.
• Solid state power controllers for home/domestic appliances.
ADVANTAGES OF THYRISTORISED POWER CONTROLLERS
• High efficiency due to low losses in the Thyristors.
• Long life and reduced/minimal maintenance due to the absence of mechanical
wear.
• Control equipments using Thyristors are compact in size.
• Easy and flexibility in operation due to digital controls.
• Faster dynamic response compared to the electro mechanical converters.
• Lower acoustic noise when compared to electro magnetic controllers, relays and
contactors.
DISADVANTAGES OF THYRISTORISED POWER CONTROLLERS
• All the thyristorised power controllers generate harmonics (unwanted frequency
components) due to the switching ON and OFF of the thyristors. These
harmionics adversely affect the performance of the load connected to them. For
example when the load are motors, there are additional power losses (harmonic
power loss) torque harmonics, and increase in acoustic noise.
• The generated harmonics are injected into the supply lines and thus adversely
affect the other loads/equipments connected to the supply lines.
• In some applications example: traction, there is interference with the commutation
circuits due to the power supply line harmonics and due to electromagnetic
radiation.
• The thyristorised AC to DC converters and AC to AC converters can operate at
low power factor under some conditions.
• Special steps are then taken for correcting the line supply power factor (by
installing PF improvement apparatus).
• The thyristorised power controllers have no short time over loading capacity and
therefore they must be rated for maximum loading conditions. This leads to an
increase in the cost of the equipment.
• Special protection circuits must be employed in thyristorised power controllers in
order to protect and safe guard the expensive thyristor devices. This again adds to
the system cost.
37
TYPES OF POWER CONVERTERS or THYRISTORISED POWER
CONTROLLERS
For the control of electric power supplied to the load or the equipment/machinery
or for power conditioning the conversion of electric power from one form to other is
necessary and the switching characteristic of power semiconductor devices (Thyristors)
facilitate these conversions
The thyristorised power converters are referred to as the static power converters
and they perform the function of power conversion by converting the available input
power supply in to output power of desired form.
The different types of thyristor power converters are
• Diode rectifiers (uncontrolled rectifiers).
• Line commutated converters or AC to DC converters (controlled rectifiers)
• AC voltage (RMS voltage) controllers (AC to AC converters).
• Cyclo converters (AC to AC converters at low output frequency).
• DC choppers (DC to DC converters).
• Inverters (DC to AC converters).
LINE COMMUTATED CONVERTERS
(AC TO DC CONVERTERS)
L i n e
C o m m u t a t e d
C o n v e r t e r
+
-
D C O u t p u t
V
0 ( Q C )
A C
I n p u t
V o l t a g e
These are AC to DC converters. The line commutated converters are AC to DC power
converters. These are also referred to as controlled rectifiers. The line commutated
converters (controlled rectifiers) are used to convert a fixed voltage, fixed frequency AC
power supply to obtain a variable DC output voltage. They use natural or AC line
commutation of the Thyristors.
38
Fig: A Single Phase Full Wave Uncontrolled Rectifier Circuit (Diode Full Wave Rectifier) using a
Center Tapped Transformer
Fig: A Single Phase Full Wave Controlled Rectifier Circuit (using SCRs) using a Center Tapped
Transformer
Different types of line commutated AC to DC converters circuits are
• Diode rectifiers – Uncontrolled Rectifiers
• Controlled rectifiers using SCR’s.
o Single phase controlled rectifier.
o Three phase controlled rectifiers.
Applications Of Line Commutated Converters
AC to DC power converters are widely used in
• Speed control of DC motor in DC drives.
• UPS.
• HVDC transmission.
• Battery Chargers.
39
AC VOLTAGE REGULATORS OR RMS VOLTAGE
CONTROLLERS (AC TO AC CONVERTERS)
A C
V o l t a g e
C o n t r o l l e r
V
0 ( R M S )
f
S
V a r i a b l e A C
R M S O / P V o l t a g e
A C
I n p u t
V o l t a g e
f
s
V
s
f
s
The AC voltage controllers convert the constant frequency, fixed voltage AC supply into
variable AC voltage at the same frequency using line commutation.
AC regulators (RMS voltage controllers) are mainly used for
• Speed control of AC motor.
• Speed control of fans (domestic and industrial fans).
• AC pumps.
Fig: A Single Phase AC voltage Controller Circuit (AC-AC Converter using a TRIAC)
40
CYCLO CONVERTERS (AC TO AC CONVERTERS WITH
LOW OUTPUT FREQUENCY)
C y c l o
C o n v e r t e r s
V , f
0 0
f < f
0 S
V a r i a b l e F r e q u e n c y
A C O u t p u t
V
s
f
s
A C
I n p u t
V o l t a g e
The cyclo converters convert power from a fixed voltage fixed frequency AC supply to a
variable frequency and variable AC voltage at the output.
The cyclo converters generally produce output AC voltage at a lower output frequency.
That is output frequency of the AC output is less than input AC supply frequency.
Applications of cyclo converters are traction vehicles and gearless rotary kilns.
CHOPPERS (DC TO DC CONVERTERS)
D C
C h o p p e r
V
0 ( d c )
-
V a r i a b l e D C
O u t p u t V o l t a g e
V
s
+
+
-
The choppers are power circuits which obtain power from a fixed voltage DC supply and
convert it into a variable DC voltage. They are also called as DC choppers or DC to DC
converters. Choppers employ forced commutation to turn off the Thyristors. DC choppers
are further classified into several types depending on the direction of power flow and the
type of commutation. DC choppers are widely used in
• Speed control of DC motors from a DC supply.
• DC drives for sub-urban traction.
• Switching power supplies.
41
Fig: A DC Chopper Circuit (DC-DC Converter) using IGBT
INVERTERS (DC TO AC CONVERTERS)
I n v e r t e r
( F o r c e d
C o m m u t a t i o n )
A C
O u t p u t V o l t a g e
+
-
D C
S u p p l y
The inverters are used for converting DC power from a fixed voltage DC supply into an
AC output voltage of variable frequency and fixed or variable output AC voltage. The
inverters also employ force commutation method to turn off the Thyristors.
Application of inverters are in
• Industrial AC drives using induction and synchronous motors.
• Uninterrupted power supplies (UPS system) used for computers, computer
labs.
42
Fig: Single Phase DC-AC Converter (Inverter) using MOSFETS
DESIGN OF POWER ELECTRONICS CIRCUITS
The design and study of power electronic circuits involve
• Design and study of power circuits using Thyristors, Diodes, BJT’s or
MOSFETS.
• Design and study of control circuits.
• Design and study of logic and gating circuits and associated digital
circuits.
• Design and study of protection devices and circuits for the protection of
thyristor power devices in power electronic circuits.
The power electronic circuits can be classified into six types
• Diode rectifiers (uncontrolled rectifiers)
• AC to DC converters (Controlled rectifiers)
• AC to AC converters (AC voltage controllers)
• DC to DC converters (DC choppers)
• DC to AC converters (Inverters)
• Static Switches (Thyristorized contactors)
PERIPHERAL EFFECTS
The power converter operations are based mainly on the switching of power
semiconductor devices and as a result the power converters introduce current and voltage
harmonics (unwanted AC signal components) into the supply system and on the output of
the converters.
These induced harmonics can cause problems of distortion of the output voltage,
harmonic generation into the supply system, and interference with the communication and
signaling circuits. It is normally necessary to introduce filters on the input side and output
side of a power converter system so as to reduce the harmonic level to an acceptable
43
magnitude. The figure below shows the block diagram of a generalized power converter
with filters added. The application of power electronics to supply the sensitive electronic
loads poses a challenge on the power quality issues and raises the problems and concerns
to be resolved by the researchers. The input and output quantities of power converters
could be either AC or DC. Factors such as total harmonic distortion (THD), displacement
factor or harmonic factor (HF), and input power factor (IPF), are measures of the quality
of the waveforms. To determine these factors it is required to find the harmonic content of
the waveforms. To evaluate the performance of a converter, the input and output
voltages/currents of a converter are expressed in Fourier series. The quality of a power
converter is judged by the quality of its voltage and current waveforms.
Fig: A General Power Converter System
The control strategy for the power converters plays an important part on the harmonic
generation and the output waveform distortion and can be aimed to minimize or reduce
these problems. The power converters can cause radio frequency interference due to
electromagnetic radiation and the gating circuits may generate erroneous signals. This
interference can be avoided by proper grounding and shielding.
44
POWER TRANSISTORS
Power transistors are devices that have controlled turn-on and turn-off characteristics.
These devices are used a switching devices and are operated in the saturation region
resulting in low on-state voltage drop. They are turned on when a current signal is given
to base or control terminal. The transistor remains on so long as the control signal is
present. The switching speed of modern transistors is much higher than that of thyristors
and are used extensively in dc-dc and dc-ac converters. However their voltage and
current ratings are lower than those of thyristors and are therefore used in low to medium
power applications.
Power transistors are classified as follows
• Bipolar junction transistors(BJTs)
• Metal-oxide semiconductor filed-effect transistors(MOSFETs)
• Static Induction transistors(SITs)
• Insulated-gate bipolar transistors(IGBTs)
BIPOLAR JUNCTION TRANSISTORS
The need for a large blocking voltage in the off state and a high current carrying
capability in the on state means that a power BJT must have substantially different
structure than its small signal equivalent. The modified structure leads to significant
differences in the I-V characteristics and switching behavior between power transistors
and its logic level counterpart.
POWER TRANSISTOR STRUCTURE
If we recall the structure of conventional transistor we see a thin p-layer is sandwiched
between two n-layers or vice versa to form a three terminal device with the terminals
named as Emitter, Base and Collector.
The structure of a power transistor is as shown below
Fig. 1: Structure of Power Transistor
45
C o l l e c t o r
p n p B J T
E m i t t e r
B a s e
C o l l e c t o r
n p n B J T
E m i t t e r
B a s e
E m i t t e r B a s e
n
+
1 0
1 9
c m
- 3
p 1 0
1 6
c m
- 3
n

1 0
1 4
c m
- 3
n
+
1 0
1 9
c m
- 3
C o l l e c t o r
2 5 0 m µ
5 0 - 2 0 0 m µ
1 0 m µ
5 - 2 0 m µ
( C o l l e c t o r d r i f t
r e g i o n )
B a s e
T h i c k n e s s
The difference in the two structures is obvious.
A power transistor is a vertically oriented four layer structure of alternating p-type and n-
type. The vertical structure is preferred because it maximizes the cross sectional area and
through which the current in the device is flowing. This also minimizes on-state
resistance and thus power dissipation in the transistor.
The doping of emitter layer and collector layer is quite large typically 10
19
cm
-3
. A special
layer called the collector drift region (n
-
) has a light doping level of 10
14
.
The thickness of the drift region determines the breakdown voltage of the transistor. The
base thickness is made as small as possible in order to have good amplification
capabilities, however if the base thickness is small the breakdown voltage capability of
the transistor is compromised.
Practical power transistors have their emitters and bases interleaved as narrow fingers as
shown. The purpose of this arrangement is to reduce the effects of current crowding. This
multiple emitter layout also reduces parasitic ohmic resistance in the base current path
which reduces power dissipation in the transistor.
Fig. 2
STEADY STATE CHARACTERISTICS
Figure 3(a) shows the circuit to obtain the steady state characteristics. Fig 3(b) shows the
input characteristics of the transistor which is a plot of
B
I
versus
BE
V
. Fig 3(c) shows the
output characteristics of the transistor which is a plot
C
I
versus
CE
V
. The characteristics
shown are that for a signal level transistor.
The power transistor has steady state characteristics almost similar to signal level
transistors except that the V-I characteristics has a region of quasi saturation as shown by
figure 4.
46
Fig. 3: Characteristics of NPN Transistors
47
Q u a s i - s a t u r a t i o n
H a r d
S a t u r a t i o n
S e c o n d b r e a k d o w n
A c t i v e r e g i o n
P r i m a r y
b r e a k d o w n
v
C E
B V
C B O
B V
C E O
B V
S U S
I = 0
B
I < 0
B
0
I = 0
B
I
B 1
I
B 2
I
B 3
I
B 4
I
B 5
i
C
I > I , e t c .
B 5 B 4
- 1 / R
d
Fig. 4: Characteristics of NPN Power Transistors
There are four regions clearly shown: Cutoff region, Active region, quasi saturation and
hard saturation. The cutoff region is the area where base current is almost zero. Hence no
collector current flows and transistor is off. In the quasi saturation and hard saturation, the
base drive is applied and transistor is said to be on. Hence collector current flows
depending upon the load. The power BJT is never operated in the active region (i.e. as an
amplifier) it is always operated between cutoff and saturation. The
SUS
BV
is the maximum
collector to emitter voltage that can be sustained when BJT is carrying substantial
collector current. The
CEO
BV
is the maximum collector to emitter breakdown voltage that
can be sustained when base current is zero and
CBO
BV
is the collector base breakdown
voltage when the emitter is open circuited.
The primary breakdown shown takes place because of avalanche breakdown of collector
base junction. Large power dissipation normally leads to primary breakdown.
The second breakdown shown is due to localized thermal runaway. This is explained in
detail later.
48
TRANSFER CHARACTERISTICS
Fig. 5: Transfer Characteristics
1
1
E C B
C
fE
B
C B CEO
I I I
I
h
I
I I I
β
β
β
α
β
α
β
α
· +
· ·
· +
·
+
·

TRANSISTOR AS A SWITCH
The transistor is used as a switch therefore it is used only between saturation and cutoff.
From fig. 5 we can write the following equations
Fig. 6: Transistor Switch
49
( )
( ) .... 1
B BE
B
B
C CE CC C C
C B BE
C CC
B
CE CB BE
CB CE BE
V V
I
R
V V V I R
R V V
V V
R
V V V
V V V
β

·
· · −

· −
· +
· −
Equation (1) shows that as long as
CE BE
V V >
the CBJ is reverse biased and transistor is in
active region, The maximum collector current in the active region, which can be obtained
by setting
0
CB
V ·
and
BE CE
V V ·
is given as
CC CE CM
CM BM
C F
V V I
I I
R β

· ∴ ·
If the base current is increased above
,
BM BE
I V
increases, the collector current increases
and
CE
V
falls below
BE
V
. This continues until the CBJ is forward biased with
BC
V
of about
0.4 to 0.5V, the transistor than goes into saturation. The transistor saturation may be
defined as the point above which any increase in the base current does not increase the
collector current significantly.
In saturation, the collector current remains almost constant. If the collector emitter
voltage is
( ) CE sat
V
the collector current is
CC CESAT
CS
C
CS
BS
V V
I
R
I
I
β

·
·
Normally the circuit is designed so that
B
I
is higher that
BS
I
. The ratio of
B
I
to
BS
I
is
called to overdrive factor ODF.
B
BS
I
ODF
I
·
The ratio of
CS
I
to
B
I
is called as forced
β
.
CS
forced
B
I
I
β ·
The total power loss in the two functions is
T BE B CE C
P V I V I · +
A high value of ODF cannot reduce the CE voltage significantly. However
BE
V
increases
due to increased base current resulting in increased power loss. Once the transistor is
saturated, the CE voltage is not reduced in relation to increase in base current. However
the power is increased at a high value of ODF, the transistor may be damaged due to
50
thermal runaway. On the other hand if the transistor is under driven ( )
B BS
I I <
it may
operate in active region,
CE
V
increases resulting in increased power loss.
PROBLEMS
1. The BJT is specified to have a range of 8 to 40. The load resistance in
11
e
R · Ω
.
The dc supply voltage is V
CC
=200V and the input voltage to the base circuit is
V
B
=10V. If V
CE(sat)
=1.0V and V
BE(sat)
=1.5V. Find
a. The value of R
B
that results in saturation with a overdrive factor of 5.
b. The forced
f
β
.
c. The power loss P
T
in the transistor.
Solution
(a)
( )
200 1.0
18.1
11
CC CE sat
CS
C
V V
I A
R


· · ·

Therefore
min
18.1
2.2625
8
CS
BS
I
I A
β
· · ·
Therefore
11.3125
B BS
I ODF I A · × ·
( ) B BE sat
B
B
V V
I
R

·
Therefore
( )
10 1.5
0.715
11.3125
B BE sat
B
B
V V
R
I


· · · Ω
(b) Therefore
18.1
1.6
11.3125
CS
f
B
I
I
β · · ·
(c)
1.5 11.3125 1.0 18.1
16.97 18.1 35.07
T BE B CE C
T
T
P V I V I
P
P W
· +
· × + ×
· + ·
2. The
β
of a bipolar transistor varies from 12 to 75. The load resistance is
1.5
C
R · Ω
. The dc supply voltage is V
CC
=40V and the input voltage base circuit is
V
B
=6V. If V
CE(sat)
=1.2V, V
BE(sat)
=1.6V and R
B
=0.7Ω determine
a. The overdrive factor ODF.
b. The forced β
f
.
c. Power loss in transistor P
T
51
Solution
( )
40 1.2
25.86
1.5
CC CE sat
CS
C
V V
I A
R


· · ·
min
25.86
2.15
12
CS
BS
I
I A
β
· · ·
Also
( )
6 1.6
6.28
0.7
B BE sat
B
B
V V
I A
R


· · ·
(a) Therefore
6.28
2.92
2.15
B
BS
I
ODF
I
· · ·
Forced
25.86
4.11
6.28
CS
f
B
I
I
β · · ·
(c)
T BE B CE C
P V I V I · +
1.6 6.25 1.2 25.86
41.032
T
T
P
P Watts
· × + ×
·
(JULY / AUGUST 2004)
3. For the transistor switch as shown in figure
a. Calculate forced beta,
f
β
of transistor.
b. If the manufacturers specified
β
is in the range of 8 to 40, calculate the
minimum overdrive factor (ODF).
c. Obtain power loss
T
P
in the transistor.
52
( )
( )
10 , 0.75 ,
1.5 , 11 ,
1 , 200
B B
C BE sat
CC CE sat
V V R
V V R
V V V V
· · Ω
· · Ω
· ·
Solution
(i)
( )
10 1.5
11.33
0.75
B BE sat
B
B
V V
I A
R


· · ·
( )
200 1.0
18.09
11
CC CE sat
CS
C
V V
I A
R


· · ·
Therefore
min
18.09
2.26
8
CS
BS
I
I A
β
· · ·
18.09
1.6
11.33
CS
f
B
I
I
β · · ·
(ii)
11.33
5.01
2.26
B
BS
I
ODF
I
· · ·
(iii)
1.5 11.33 1.0 18.09 35.085
T BE B CE C
P V I V I W · + · × + × ·
(JAN / FEB 2005)
4. A simple transistor switch is used to connect a 24V DC supply across a relay coil,
which has a DC resistance of 200Ω . An input pulse of 0 to 5V amplitude is
applied through series base resistor
B
R
at the base so as to turn on the transistor
switch. Sketch the device current waveform with reference to the input pulse.
Calculate
a.
CS
I
.
b. Value of resistor
B
R
, required to obtain over drive factor of two.
c. Total power dissipation in the transistor that occurs during the saturation
state.
53
0
5 V
I / P
R
B
D
2 0 0 Ω
R e l a y
C o i l
+ V = 2 4 V
C C
β = 2 5 t o 1 0 0
V = 0 . 2 V
V = 0 . 7 V
C E ( s a t )
B E ( s a t )
v
B
5
0
I
C S
t
t
i
C
i
L
τ = L / R
L
τ = L / R
L
τ = L / R + R
L f
Solution
To sketch the device current waveforms; current through the device cannot
rise fast to the saturating level of
CS
I
since the inductive nature of the coil opposes
any change in current through it. Rate of rise of collector current can be
determined by the time constant
1
L
R
τ · . Where L is inductive in Henry of coil and
R is resistance of coil. Once steady state value of
CS
I
is reached the coil acts as a
short circuit. The collector current stays put at
CS
I
till the base pulse is present.
Similarly once input pulse drops to zero, the current
C
I
does not fall to
zero immediately since inductor will now act as a current source. This current will
now decay at the fall to zero. Also the current has an alternate path and now can
flow through the diode.
54
(i)
( )
24 0.2
0.119
200
CC CE sat
CS
C
V V
I A
R


· · ·
(ii) Value of
B
R
min
0.119
4.76
25
CS
BS
I
I mA
β
· · ·
2 4.76 9.52
B BS
I ODF I mA ∴ · × · × ·
( )
5 0.7
450
9.52
B BE sat
B
B
V V
R
I


∴ · · · Ω
(iii)
( ) ( )
0.7 9.52 0.2 0.119 6.68
T B CS BE sat CE sat
P V I V I W · × + × · × + × ·
SWITCHING CHARACTERISTICS
A forward biased p-n junction exhibits two parallel capacitances; a depletion layer
capacitance and a diffusion capacitance. On the other hand, a reverse biased p-n junction
has only depletion capacitance. Under steady state the capacitances do not play any role.
However under transient conditions, they influence turn-on and turn-off behavior of the
transistor.
TRANSIENT MODEL OF BJT
Fig. 7: Transient Model of BJT
55
Fig. 8: Switching Times of BJT
Due to internal capacitances, the transistor does not turn on instantly. As the voltage V
B
rises from zero to V
1
and the base current rises to I
B1
, the collector current does not
respond immediately. There is a delay known as delay time td, before any collector
current flows. The delay is due to the time required to charge up the BEJ to the forward
bias voltage V
BE
(0.7V). The collector current rises to the steady value of I
CS
and this time
is called rise time t
r
.
The base current is normally more than that required to saturate the transistor. As a result
excess minority carrier charge is stored in the base region. The higher the ODF, the
greater is the amount of extra charge stored in the base. This extra charge which is called
the saturating charge is proportional to the excess base drive.
This extra charge which is called the saturating charge, is proportional to the excess base
drive and the corresponding current I
e
.
( ) . 1
CS
e B BS BS BS
I
I I ODF I I I ODF
β
· − · − · −
Saturating charge
( 1)
S s e s BS
Q I I ODF τ τ · · −
where
s
τ
is known as the storage time
constant.
When the input voltage is reversed from V
1
to -V
2
, the reverse current –I
B2
helps to
discharge the base. Without –I
B2
the saturating charge has to be removed entirely due to
recombination and the storage time t
s
would be longer.
56
Once the extra charge is removed, BEJ charges to the input voltage –V
2
and the base
current falls to zero. t
f
depends on the time constant which is determined by the reverse
biased BEJ capacitance.
on d r
off s f
t t t
t t t
∴ · +
· +
PROBLEMS
1. For a power transistor, typical switching waveforms are shown. The various
parameters of the transistor circuit are as under
220
cc
V V ·
,
( )
2
CE sat
V V ·
,
80
CS
I A ·
,
0.4 td s µ ·
,
1
r
t s µ ·
,
50
n
t s µ ·
,
3
s
t s µ ·
,
2
f
t s µ ·
,
0
40 t s µ ·
,
5 f Khz ·
,
2
CEO
I mA ·
. Determine average power loss due to collector current
during t
on
and t
n
. Find also the peak instantaneous power loss, due to collector
current during turn-on time.
Solution
During delay time, the time limits are 0 t td ≤ ≤ . Figure shows that in this time
( )
c CEO
i t I ·
and ( )
CE CC
V t V ·
. Therefore instantaneous power loss during delay time is
( )
3
2 10 220 0.44
d C CE CEO CC
P t i V I V x x W

· · · ·
Average power loss during delay time 0 t td ≤ ≤ is given by
( ) ( )
0
1
td
c CE
Pd i t v t dt
T
·

0
1
td
CEO CC
Pd I V dt
T
·

.
CEO CC
Pd f I V td ·
3 3 6
5 10 2 10 220 0.4 10 0.88 Pd x mW
− −
· × × × × × ·
During rise time
0
r
t t ≤ ≤
( )
CS
c
r
I
i t t
t
·
( )
( ) CC CE sat
CE CC
r
V V
v t V t
t
] − | `
· −
]
. , ]
( )
( ) CE CC CE sat CC
r
t
v t V V V
t
] · + −
]
57
Therefore average power loss during rise time is
( )
( )
0
3 6
1
.
2 3
220 220 2
5 10 80 1 10 14.933
2 3
r
t
CS
r CC CC CE sat
r r
CC CC CES
r CS r
r
I t
P t V V V dt
T t t
V V V
P f I t
P x W

]
· + −
]
]

]
· −
]
]

]
· × × × − ·
]
]

Instantaneous power loss during rise time is
( )
( )
CC CE CS
r CC
r r
V V sat I
P t t V t
t t
− ]
· −
]
]
( )
( )
2
2
CS CSt
r CC CC CE sat
r r
I I
P t tV V V
t t
]
· − −
]
Differentiating the above equation and equating it to zero will give the time t
m
at
which instantaneous power loss during t
r
would be maximum.
Therefore
( )
[ ]
2
2
r CS CC CS
CC CEsat
r r
dP t I V I t
V V
dt t t
· − −
At
,
m
t t ·
( )
0
r
dP t
dt
·
Therefore
( ) 2
2
0
CS CS m
CC CC CE sat
r r
I I t
V V V
t t
]
· − −
]
( ) 2
2
CS CS m
cc CC CE sat
r r
I I t
V V V
t t
]
· −
]
( )
2
r CC
m CC CE sat
t V
t V V
]
· −
]
Therefore
( )
2
r CC
m
CC CE sat
t V
t
V V
·
]

]
Therefore
( )
[ ]
6
220 1 10
0.5046
2 200 2
2
CC r
m
CC CE sat
V t
t s
V V
µ

× ×
· · ·
− ]

]
Peak instantaneous power loss
rm
P
during rise time is obtained by substituting the
value of t=tm in equation (1) we get
58
( )
( )
( )
( )
[ ]
2
2
2 2
2
2
4
80 220
4440.4
4 220 2
CC r CC CE sat
CS CC r CS
rm
r r
CC CE sat
CC CE sat
rm
V t V V
I V t I
P
t t
V V
V V
P W
]

]
· −
]
− ]

]
]
×
· ·

Total average power loss during turn-on
0.00088 14.933 14.9339
on r
P Pd P W · + · + ·
During conduction time
0
n
t t ≤ ≤
( ) ( )
( )
&
C CS CE CE sat
i t I v t V · ·
Instantaneous power loss during t
n
is
( )
( )
80 2 160
n C CE CS CE sat
P t i v I V x W · · · ·
Average power loss during conduction period is
3 6
0
1
5 10 80 2 50 10 40
n
t
n C CE CS CES n
P i v dt fI V t W
T

· · · × × × × × ·

PERFORMANCE PARAMETERS
DC gain
FE
h

[ ]
C
CE
B
I
V
I
β ·
: Gain is dependent on temperature. A high gain would reduce
the values of forced
( )
&
CE sat
V β
.
( ) CE sat
V
: A low value of
( ) CE sat
V
will reduce the on-state losses.
( ) CE sat
V
is a function of the
collector circuit, base current, current gain and junction temperature. A small value of
forced β decreases the value of
( ) CE sat
V
.
( ) BE sat
V
: A low value of
( ) BE sat
V
will decrease the power loss in the base emitter junction.
( ) BE sat
V
increases with collector current and forced β .
Turn-on time
on
t
: The turn-on time can be decreased by increasing the base drive for a
fixed value of collector current.
d
t
is dependent on input capacitance does not change
significantly with
C
I
. However t
r
increases with increase in
C
I
.
Turn off time
off
t
: The storage time t
s
is dependent on over drive factor and does not
change significantly with I
C
. t
f
is a function of capacitance and increases with I
C
.
&
s f
t t
59
can be reduced by providing negative base drive during turn-off.
f
t
is less sensitive to
negative base drive.
Cross-over
C
t
: The crossover time
C
t
is defined as the interval during which the collector
voltage
CE
V
rises from 10% of its peak off state value and collector current.
C
I
falls to
10% of its on-state value.
C
t
is a function of collector current negative base drive.
60
Switching Limits
SECOND BREAKDOWN
It is a destructive phenomenon that results from the current flow to a small portion of the
base, producing localized hot spots. If the energy in these hot spots is sufficient the
excessive localized heating may damage the transistor. Thus secondary breakdown is
caused by a localized thermal runaway. The SB occurs at certain combinations of voltage,
current and time. Since time is involved, the secondary breakdown is basically an energy
dependent phenomenon.
FORWARD BIASED SAFE OPERATING AREA FBSOA
During turn-on and on-state conditions, the average junction temperature and second
breakdown limit the power handling capability of a transistor. The manufacturer usually
provide the FBSOA curves under specified test conditions. FBSOA indicates the
c ce
I V −
limits of the transistor and for reliable operation the transistor must not be subjected to
greater power dissipation than that shown by the FBSOA curve.
Fig. 9: FBSOA of Power BJT
The dc FBSOA is shown as shaded area and the expansion of the area for pulsed
operation of the BJT with shorter switching times which leads to larger FBSOA. The
second break down boundary represents the maximum permissible combinations of
voltage and current without getting into the region of
c ce
i v −
plane where second
breakdown may occur. The final portion of the boundary of the FBSOA is breakdown
voltage limit
CEO
BV
.
REVERSE BIASED SAFE OPERATING AREA RBSOA
During turn-off, a high current and high voltage must be sustained by the transistor, in
most cases with the base-emitter junction reverse biased. The collector emitter voltage
must be held to a safe level at or below a specified value of collector current. The
manufacturer provide
c ce
I V −
limits during reverse-biased turn off as reverse biased safe
area (RBSOA).
61
Fig. 10: RBSOA of a Power BJT
The area encompassed by the RBSOA is some what larger than FBSOA because of the
extension of the area of higher voltages than
CEO
BV
upto
CBO
BV
at low collector currents.
This operation of the transistor upto higher voltage is possible because the combination of
low collector current and reverse base current has made the beta so small that break down
voltage rises towards
CBO
BV
.
POWER DERATING
The thermal equivalent is shown. If the total average power loss is
T
P
,
The case temperature is
c j T jc
T T P T · −
.
The sink temperature is
s c T CS
T T P T · −
The ambient temperature is
A S T SA
T T P R · −
and ( )
j A T jc cs SA
T T P R R R − · + +
jc
R
: Thermal resistance from junction to case
α
ω
.
CS
R
: Thermal resistance from case to sink
0
C
ω
.
SA
R
: Thermal resistance from sink to ambient
0
C
ω
.
The maximum power dissipation in
T
P
is specified at
0
25
C
T C · .
Fig. 11: Thermal Equivalent Circuit of Transistor
62
V < 0
B E ( o f f )
V = 0
B E ( o f f )
B V
C B O
i
C
B V
C E O
v
C E
I
C M
BREAK DOWN VOLTAGES
A break down voltage is defined as the absolute maximum voltage between two terminals
with the third terminal open, shorted or biased in either forward or reverse direction.
SUS
BV
: The maximum voltage between the collector and emitter that can be sustained
across the transistor when it is carrying substantial collector current.
CEO
BV
: The maximum voltage between the collector and emitter terminal with base open
circuited.
CBO
BV
: This is the collector to base break down voltage when emitter is open circuited.
63
BASE DRIVE CONTROL
This is required to optimize the base drive of transistor. Optimization is required to
increase switching speeds.
on
t
can be reduced by allowing base current peaking during
turn-on, [ ]
CS
F
B
I
forced
I
β β
| `
·

. ,
resulting in low forces β at the beginning. After turn on,
F
β
can be increased to a sufficiently high value to maintain the transistor in quasi-
saturation region.
off
t
can be reduced by reversing base current and allowing base current
peaking during turn off since increasing
2 B
I
decreases storage time.
A typical waveform for base current is shown.
Fig. 12: Base Drive Current Waveform
Some common types of optimizing base drive of transistor are
• Turn-on Control.
• Turn-off Control.
• Proportional Base Control.
• Antisaturation Control
TURN-ON CONTROL
Fig. 13: Base current peaking during turn-on
When input voltage is turned on, the base current is limited by resistor
1
R
and therefore
initial value of base current is
1
1
BE
BO
V V
I
R

·
,
1
1 2
BE
BF
V V
I
R R

·
+
.
Capacitor voltage
2
1
1 2
C
R
V V
R R
·
+
.
64
t 0
- I
B 2
I
B S
I
B
I
B 1
Therefore
1 2
1 1
1 2
R R
C
R R
τ
| `
·

+
. ,
Once input voltage
B
v
becomes zero, the base-emitter junction is reverse biased
and C
1
discharges through R
2
. The discharging time constant is
2 2 1
R C τ ·
. To allow
sufficient charging and discharging time, the width of base pulse must be
1 1
5 t τ ≥
and off
period of the pulse must be
2 2
5 t τ ≥
.The maximum switching frequency is
1 2 1 2
1 1 0.2
s
f
T t t τ τ
· · ·
+ +
.
TURN-OFF CONTROL
If the input voltage is changed to during turn-off the capacitor voltage
C
V
is added to
2
V
as
reverse voltage across the transistor. There will be base current peaking during turn off.
As the capacitor
1
C
discharges, the reverse voltage will be reduced to a steady state
value,
2
V
. If different turn-on and turn-off characteristics are required, a turn-off circuit
using ( )
2 3 4
, & C R R
may be added. The diode
1
D
isolates the forward base drive circuit
from the reverse base drive circuit during turn off.
Fig: 14. Base current peaking during turn-on and turn-off
PROPORTIONAL BASE CONTROL
This type of control has advantages over the constant drive circuit. If the collector current
changes due to change in load demand, the base drive current is changed in proportion to
collector current.
When switch
1
S
is turned on a pulse current of short duration would flow through the base
of transistor
1
Q
and
1
Q
is turned on into saturation. Once the collector current starts to
flow, a corresponding base current is induced due to transformer action. The transistor
would latch on itself and
1
S
can be turned off. The turns ratio is
2
1
C
B
I N
N I
β · ·
. For
proper operation of the circuit, the magnetizing current which must be much smaller than
the collector current should be as small as possible. The switch
1
S
can be implemented by
a small signal transistor and additional arrangement is necessary to discharge capacitor
1
C
and reset the transformer core during turn-off of the power transistor.
65
Fig. 15: Proportional base drive circuit
ANTISATURATION CONTROL
Fig: 16: Collector Clamping Circuit
If a transistor is driven hard, the storage time which is proportional to the base current
increases and the switching speed is reduced. The storage time can be reduced by
operating the transistor in soft saturation rather than hard saturation. This can be
accomplished by clamping CE voltage to a pre-determined level and the collector current
is given by
CC CM
C
C
V V
I
R

·
.
Where
CM
V
is the clamping voltage and
( )
CM CE sat
V V >
.
The base current which is adequate to drive the transistor hard, can be found from
1
1
B D BE
B
B
V V V
I I
R
− −
· ·
and the corresponding collector current is
C L B
I I I β · ·
.
Writing the loop equation for the input base circuit,
1
ab D BE
V V V · +
Similarly
2
ab D CE
V V V · +
Therefore
1 2
CE BE D D
V V V V · + −
For clamping
1 2
D D
V V >
Therefore
0.7 .......
CE
V · +
66
This means that the CE voltage is raised above saturation level and there are no excess
carriers in the base and storage time is reduced.
The load current is
1 2
CC BE D D
CC CE
L
C C
V V V V
V V
I
R R
− − +

· ·
and the collector current
with clamping is [ ] ( )
1 1
1
C B C L L
I I I I I I I
β
β β
β
· · − + · +
+
For clamping,
1 2
D D
V V >
and this can be accomplished by connecting two or more
diodes in place of
1
D
. The load resistance
C
R
should satisfy the condition
B L
I I β >
,
( )
1 2
B C CC BE D D
I R V V V V β > − − +
.
The clamping action thus results a reduced collector current and almost
elimination of the storage time. At the same time, a fast turn-on is accomplished.
However, due to increased
CE
V
, the on-state power dissipation in the transistor is
increased, whereas the switching power loss is decreased.
ADVANTAGES OF BJT’S
• BJT’s have high switching frequencies since their turn-on and turn-off time are
low.
• The turn-on losses of a BJT are small.
• BJT has controlled turn-on and turn-off characteristics since base drive control is
possible.
• BJT does not require commutation circuits.
DEMERITS OF BJT
• Drive circuit of BJT is complex.
• It has the problem of charge storage which sets a limit on switching frequencies.
It cannot be used in parallel operation due to problems of negative temperature
coefficient.
67
POWER MOSFETS
INTRODUCTION TO FET’S
FET’s use field effect for their operation. FET is manufactured by diffusing two areas of
p-type into the n-type semiconductor as shown. Each p-region is connected to a gate
terminal; the gate is a p-region while source and drain are n-region. Since it is similar to
two diodes one is a gate source diode and the other is a gate drain diode.
Fig:1: Schematic symbol of JFET
Fig. 2: Structure of FET with biasing
In BJT’s we forward bias the B-E diode but in a JFET, we always reverse bias the gate-
source diode. Since only a small reverse current can exist in the gate lead. Therefore
0
G
I ·
, therefore ( )
in
R ideal · ∞
.
The term field effect is related to the depletion layers around each p-region as
shown. When the supply voltage
DD
V
is applied as shown it forces free electrons to flow
from source to drain. With gate reverse biased, the electrons need to flow from source to
drain, they must pass through the narrow channel between the two depletion layers. The
more the negative gate voltage is the tighter the channel becomes.
68
Therefore JFET acts as a voltage controlled device rather than a current controlled device.
JFET has almost infinite input impedance but the price paid for this is loss of control over
the output current, since JFET is less sensitive to changes in the output voltage than a
BJT.
JFET CHARACTERISTICS
69
The maximum drain current out of a JFET occurs when
0
GS
V ·
. As
DS
V
is increased for 0
to a few volts, the current will increase as determined by ohms law. As
DS
V
approaches
P
V
the depletion region will widen, carrying a noticeable reduction in channel width. If
DS
V
is increased to a level where the two depletion region would touch a pinch-off will
result.
D
I
now maintains a saturation level
DSS
I
. Between 0 volts and pinch off voltage
P
V
is the ohmic region. After
P
V
, the regions constant current or active region.
If negative voltage is applied between gate and source the depletion region similar to
those obtained with
0
GS
V ·
are formed but at lower values of
DS
V
. Therefore saturation
level is reached earlier.
We can find two important parameters from the above characteristics

ds
r ·
drain to source resistance =
DS
D
V
I


.

m
g
= transconductance of the device =
D
GS
I
V


.
• The gain of the device, amplification factor
ds m
r g µ ·
.
SHOCKLEY EQUATION
The FET is a square law device and the drain current
D
I
is given by the Shockley
equation
2
1
GS
D DSS
P
V
I I
V
| `
· −

. ,
and
1
D
GS P
DSS
I
V V
I
| `
· −


. ,
70
MOSFET
MOSFET stands for metal oxide semiconductor field effect transistor. There are two
types of MOSFET
• Depletion type MOSFET
• Enhancement type MOSFET
DEPLETION TYPE MOSFET
CONSTRUCTION
Symbol of n-channel depletion type MOSFET
It consists of a highly doped p-type substrate into which two blocks of heavily doped n-
type material are diffused to form a source and drain. A n-channel is formed by diffusing
between source and drain. A thin layer of
2
SiO
is grown over the entire surface and holes
are cut in
2
SiO
to make contact with n-type blocks. The gate is also connected to a metal
contact surface but remains insulated from the n-channel by the
2
SiO
layer.
2
SiO

layer results in an extremely high input impedance of the order of
10
10 to
15
10 Ω for this
area.
Fig. 4: Structure of n-channel depletion type MOSFET
71
OPERATION
When
0
GS
V V ·
and
DS
V
is applied and current flows from drain to source similar to
JFET. When
1
GS
V V · −
, the negative potential will tend to pressure electrons towards the
p-type substrate and attracts hole from p-type substrate. Therefore recombination occurs
and will reduce the number of free electrons in the n-channel for conduction. Therefore
with increased negative gate voltage
D
I
reduces.
For positive values,
gs
V
, additional electrons from p-substrate will flow into the channel
and establish new carriers which will result in an increase in drain current with positive
gate voltage.
DRAIN CHARACTERISTICS
TRANSFER CHARACTERISTICS
72
ENHANCEMENT TYPE MOSFET
Here current control in an n-channel device is now affected by positive gate to source
voltage rather than the range of negative voltages of JFET’s and depletion type MOSFET.
BASIC CONSTRUCTION
A slab of p-type material is formed and two n-regions are formed in the substrate. The
source and drain terminals are connected through metallic contacts to n-doped regions,
but the absence of a channel between the doped n-regions. The
2
SiO
layer is still present
to isolate the gate metallic platform from the region between drain and source, but now it
is separated by a section of p-type material.
Fig. 5: Structure of n-channel enhancement type MOSFET
OPERATION
If
0
GS
V V ·
and a voltage is applied between the drain and source, the absence of a n-
channel will result in a current of effectively zero amperes. With
DS
V
set at some positive
voltage and
GS
V
set at 0V, there are two reverse biased p-n junction between the n-doped
regions and p substrate to oppose any significant flow between drain and source.
If both
DS
V
and
GS
V
have been set at some positive voltage, then positive potential at the
gate will pressure the holes in the p-substrate along the edge of
2
SiO
layer to leave the
area and enter deeper region of p-substrate. However the electrons in the p-substrate will
be attracted to the positive gate and accumulate in the region near the surface of the
2
SiO

layer. The negative carriers will not be absorbed due to insulating
2
SiO
layer, forming an
inversion layer which results in current flow from drain to source.
The level of
GS
V
that results in significant increase in drain current is called threshold
voltage
T
V
. As
GS
V
increases the density of free carriers will increase resulting in
increased level of drain current. If
GS
V
is constant
DS
V
is increased; the drain current will
eventually reach a saturation level as occurred in JFET.
73
DRAIN CHARACTERISTICS
TRANSFER CHARACTERISTICS
74
POWER MOSFET’S
Power MOSFET’s are generally of enhancement type only. This MOSFET is turned ‘ON’
when a voltage is applied between gate and source. The MOSFET can be turned ‘OFF’ by
removing the gate to source voltage. Thus gate has control over the conduction of the
MOSFET. The turn-on and turn-off times of MOSFET’s are very small. Hence they
operate at very high frequencies; hence MOSFET’s are preferred in applications such as
choppers and inverters. Since only voltage drive (gate-source) is required, the drive
circuits of MOSFET are very simple. The paralleling of MOSFET’s is easier due to their
positive temperature coefficient. But MOSFTS’s have high on-state resistance hence for
higher currents; losses in the MOSFET’s are substantially increased. Hence MOSFET’s
are used for low power applications.
CONSTRUCTION
S o u r c e
G a t e
J
3
D r a i n
p
-
p
-
n
+
n
+ n
+
n
-
n
+
S o u r c e
M e t a l l a y e r
n
-
n
+
s u b s t r a t e
L o a d
V
D D
n
+
C u r r e n t p a t h
-
-
-
-
-
-
-
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
V
G S
S i l i c o n
d i o x i d e
M e t a l
Power MOSFET’s have additional features to handle larger powers. On the n
+
substrate
high resistivity n

layer is epitaxially grown. The thickness of n

layer determines the
voltage blocking capability of the device. On the other side of n
+
substrate, a metal layer
is deposited to form the drain terminal. Now p

regions are diffused in the epitaxially
grown n

layer. Further n
+
regions are diffused in the p

regions as shown.
2
SiO
layer
is added, which is then etched so as to fit metallic source and gate terminals.
A power MOSFET actually consists of a parallel connection of thousands of basic
MOSFET cells on the same single chip of silicon.
When gate circuit voltage is zero and
DD
V
is present, n p
+ −
− junctions are reverse biased
and no current flows from drain to source. When gate terminal is made positive with
respect to source, an electric field is established and electrons from n

channel in the p


regions. Therefore a current from drain to source is established.
Power MOSFET conduction is due to majority carriers therefore time delays caused by
removal of recombination of minority carriers is removed.
75
Because of the drift region the ON state drop of MOSFET increases. The thickness of the
drift region determines the breakdown voltage of MOSFET. As seen a parasitic BJT is
formed, since emitter base is shorted to source it does not conduct.
SWITCHING CHARACTERISTICS
The switching model of MOSFET’s is as shown in the figure 6(a). The various inter
electrode capacitance of the MOSFET which cannot be ignored during high frequency
switching are represented by
, &
gs gd ds
C C C
. The switching waveforms are as shown in
figure 7 . The turn on time
d
t
is the time that is required to charge the input capacitance to
the threshold voltage level. The rise time
r
t
is the gate charging time from this threshold
level to the full gate voltage
gsp
V
. The turn off delay time
doff
t
is the time required for the
input capacitance to discharge from overdriving the voltage
1
V
to the pinch off region.
The fall time is the time required for the input capacitance to discharge from pinch off
region to the threshold voltage. Thus basically switching ON and OFF depend on the
charging time of the input gate capacitance.
Fig.6: Switching model of MOSFET
76
Fig.7:
Switching waveforms and times of Power MOSFET
GATE DRIVE
The turn-on time can be reduced by connecting a RC circuit as shown to charge the
capacitance faster. When the gate voltage is turned on, the initial charging current of the
capacitance is
G
G
S
V
I
R
·
.
The steady state value of gate voltage is
1
G G
GS
S G
R V
V
R R R
·
+ +
.
Where
S
R
is the internal resistance of gate drive force.
Fig. 8: Fast turn on gate drive circuit 1
77
G a t e S i g n a l
V
G
C
1
+
-
R
S
R
1
R
G
R
D
V
D D
I
D
+
-
+ V
C C
C
V
i n
+
-
N P N
P N P
M 1
R
D
V
D D
I
D
+
-
V
D
V
D S ( o n )
V
S
V V I R V V V V V
D D D D D S D D S o n S D
· − · − ≈ , ,
b g
Fig. 8: Fast turn on gate drive circuit 2
The above circuit is used in order to achieve switching speeds of the order of 100nsec or
less. The above circuit as low output impedance and the ability to sink and source large
currents. A totem poll arrangement that is capable of sourcing and sinking a large current
is achieved by the PNP and NPN transistors. These transistors act as emitter followers
and offer a low output impedance. These transistors operate in the linear region therefore
minimize the delay time. The gate signal of the power MOSFET may be generated by an
op-amp. Let V
in
be a negative voltage and initially assume that the MOSFET is off
therefore the non-inverting terminal of the op-amp is at zero potential. The op-amp output
is high therefore the NPN transistor is on and is a source of a large current since it is an
emitter follower. This enables the gate-source capacitance C
gs
to quickly charge upto the
gate voltage required to turn-on the power MOSFET. Thus high speeds are achieved.
When V
in
becomes positive the output of op-amp becomes negative the PNP transistor
turns-on and the gate-source capacitor quickly discharges through the PNP transistor.
Thus the PNP transistor acts as a current sink and the MOSFET is quickly turned-off. The
capacitor C helps in regulating the rate of rise and fall of the gate voltage thereby
controlling the rate of rise and fall of MOSFET drain current. This can be explained as
follows
• The drain-source voltage
DS DD D D
V V I R · −
.
• If I
D
increases V
DS
reduces. Therefore the positive terminal of op-amp which is
tied to the source terminal of the MOSFET feels this reduction and this reduction
is transmitted to gate through the capacitor ‘C’ and the gate voltage reduces and
the drain current is regulated by this reduction.
78
COMPARISON OF MOSFET WITH BJT
• Power MOSFETS have lower switching losses but its on-resistance and
conduction losses are more. A BJT has higher switching loss bit lower conduction
loss. So at high frequency applications power MOSFET is the obvious choice. But
at lower operating frequencies BJT is superior.
• MOSFET has positive temperature coefficient for resistance. This makes parallel
operation of MOSFET’s easy. If a MOSFET shares increased current initially, it
heats up faster, its resistance increases and this increased resistance causes this
current to shift to other devices in parallel. A BJT is a negative temperature
coefficient, so current shaving resistors are necessary during parallel operation of
BJT’s.
• In MOSFET secondary breakdown does not occur because it have positive
temperature coefficient. But BJT exhibits negative temperature coefficient which
results in secondary breakdown.
• Power MOSFET’s in higher voltage ratings have more conduction losses.
• Power MOSFET’s have lower ratings compared to BJT’s . Power MOSFET’s →
500V to 140A, BJT →1200V, 800A.
MOSIGT OR IGBT
The metal oxide semiconductor insulated gate transistor or IGBT
combines the advantages of BJT’s and MOSFET’s. Therefore an
IGBT has high input impedance like a MOSFET and low-on
state power loss as in a BJT. Further IGBT is free from second
breakdown problem present in BJT.
IGBT BASIC STRUCTURE AND WORKING
79
E m i t t e r
G a t e
J
3
J
2
J
1
C o l l e c t o r
p p
n
+
n
+ n
+
n
-
p s u b s t r a t e
+
E m i t t e r
E G
M e t a l
S i l i c o n
d i o x i d e
M e t a l l a y e r
C
n
-
p
+
L o a d
V
C C
n
+
C u r r e n t p a t h
-
-
-
-
-
-
-
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
V
G
It is constructed virtually in the same manner as a power MOSFET. However, the
substrate is now a p
+
layer called the collector.
When gate is positive with respect to positive with respect to emitter and with gate
emitter voltage greater than
GSTH
V
, an n channel is formed as in case of power MOSFET.
This n

channel short circuits the n

region with n
+
emitter regions.
An electron movement in the n

channel in turn causes substantial hole injection from
p
+
substrate layer into the epitaxially n

layer. Eventually a forward current is
established.
The three layers p
+
, n

and
p
constitute a pnp transistor with p
+
as emitter, n

as base
and
p
as collector. Alson

,
p
and n
+
layers constitute a npn transistor. The MOSFET is
formed with input gate, emitter as source and n

region as drain. Equivalent circuit is as
shown below.
E
G
J
3
J
2
J
1
C
p n p
n p n
p
n
+
n
+
n
+
n
+
n
-
p s u b s t r a t e
+
S
G
D
80
Also
p
serves as collector for pnp device and also as base for npn transistor. The two pnp
and npn is formed as shown.
When gate is applied ( )
GS GSth
V V >
MOSFET turns on. This gives the base drive to
1
T
.
Therefore
1
T
starts conducting. The collector of
1
T
is base of
2
T
. Therefore regenerative
action takes place and large number of carriers are injected into the n

drift region. This
reduces the ON-state loss of IGBT just like BJT.
When gate drive is removed IGBT is turn-off. When gate is removed the induced channel
will vanish and internal MOSFET will turn-off. Therefore
1
T
will turn-off it
2
T
turns off.
Structure of IGBT is such that
1
R
is very small. If
1
R
small
1
T
will not conduct therefore
IGBT’s are different from MOSFET’s since resistance of drift region reduces when gate
drive is applied due to p
+
injecting region. Therefore ON state IGBT is very small.
IGBT CHARACTERISTICS
STATIC CHARACTERISTICS
Fig. 9: IGBT bias circuit
Static V-I characteristics (
C
I
versus
CE
V
)
Same as in BJT except control is by
GE
V
. Therefore IGBT is a voltage controlled
device.
Transfer Characteristics (
C
I
versus
GE
V
)
Identical to that of MOSFET. When
GE GET
V V <
, IGBT is in off-state.
81
APPLICATIONS
Widely used in medium power applications such as DC and AC motor drives, UPS
systems, Power supplies for solenoids, relays and contractors.
Though IGBT’s are more expensive than BJT’s, they have lower gate drive
requirements, lower switching losses. The ratings up to 1200V, 500A.
SERIES AND PARALLEL OPERATION
Transistors may be operated in series to increase their voltage handling capability. It is
very important that the series-connected transistors are turned on and off simultaneously.
Other wise, the slowest device at turn-on and the fastest devices at turn-off will be
subjected to the full voltage of the collector emitter circuit and the particular device may
be destroyed due to high voltage. The devices should be matched for gain,
transconductance, threshold voltage, on state voltage, turn-on time, and turn-off time.
Even the gate or base drive characteristics should be identical.
Transistors are connected in parallel if one device cannot handle the load current demand.
For equal current sharings, the transistors should be matched for gain, transconductance,
saturation voltage, and turn-on time and turn-off time. But in practice, it is not always
possible to meet these requirements. A reasonable amount of current sharing (45 to 55%
with two transistors) can be obtained by connecting resistors in series with the emitter
terminals as shown in the figure 10.
Fig. 10: Parallel connection of Transistors
82
The resistor will help current sharing under steady state conditions. Current sharing under
dynamic conditions can be accomplished by connecting coupled inductors. If the current
through
1
Q
rises, the ( ) l di dt
across
1
L
increases, and a corresponding voltage of
opposite polarity is induced across inductor
2
L
. The result is low impedance path, and the
current is shifted to
2
Q
. The inductors would generate voltage spikes and they may be
expensive and bulky, especially at high currents.
Fig. 11: Dynamic current sharing
BJTs have a negative temperature coefficient. During current sharing, if one BJT carries
more current, its on-state resistance decreases and its current increases further, whereas
MOSFETS have positive temperature coefficient and parallel operation is relatively easy.
The MOSFET that initially draws higher current heats up faster and its on-state resistance
increases, resulting in current shifting to the other devices. IGBTs require special care to
match the characteristics due to the variations of the temperature coefficients with the
collector current.
PROBLEM
1. Two MOSFETS which are connected in parallel carry a total current of
20
T
I A ·
.
The drain to source voltage of MOSFET
1
M
is
1
2.5
DS
V V ·
and that of MOSFET
2
M
is
2
3
DS
V V ·
. Determine the drain current of each transistor and difference in
current sharing it the current sharing series resistances are (a)
1
0.3
s
R · Ω
and
2
0.2
s
R · Ω
, and (b)
1 2
0.5
s s
R R · · Ω
.
Solution
(a) ( )
1 2 1 1 1 2 2 2 2
&
D D T DS D s DS D s s T D
I I I V I R V I R R I I + · + · + · −
2 1 2
1
1 2
1
2
3 2.5 20 0.2
9 45%
0.3 0.2
20 9 11 55%
55 45 10%
DS DS T s
D
s s
D
D
V V I R
I
R R
I A or
I A or
I
− +
·
+
− + ×
· ·
+
· − ·
∆ · − ·
83
(b)
1
3 2.5 20 0.5
10.5 52.5%
0.5 0.5
D
I A or
− + ×
· ·
+
2
20 10.5 9.5 47.5%
52.5 47.5 5%
D
I A or
I
· − ·
∆ · − ·
di dt AND dv dt LIMITATIONS
Transistors require certain turn-on and turn-off times. Neglecting the delay time
d
t
and
the storage time
s
t
, the typical voltage and current waveforms of a BJT switch is shown
below.
During turn-on, the collector rise and the di dt is
...(1)
cs L
r r
I I di
dt t t
· ·
During turn off, the collector emitter voltage must rise in relation to the fall of the
collector current, and is
...(2)
s cc
f f
V V dv
dt t t
· ·
The conditions di dt and dv dt in equation (1) and (2) are set by the transistor
switching characteristics and must be satisfied during turn on and turn off. Protection
circuits are normally required to keep the operating di dt and dv dt within the allowable
84
limits of transistor. A typical switch with di dt and dv dt protection is shown in figure
(a), with operating wave forms in figure (b). The RC network across the transistor is
known as the snubber circuit or snubber and limits the dv dt . The inductor
S
L
, which
limits the di dt , is sometimes called series snubber.
Let us assume that under steady state conditions the load current
L
I
is free wheeling
through diode
m
D
, which has negligible reverse reco`very time. When transistor
1
Q
is
turned on, the collector current rises and current of diode
m
D
falls, because
m
D
will
behave as short circuited. The equivalent circuit during turn on is shown in figure below
The turn on di dt is
...(3)
s
s
V di
dt L
·
Equating equations (1) and (3) gives the value of
s
L
...(4)
s r
s
L
V t
L
I
·
85
During turn off, the capacitor
s
C
will charge by the load current and the equivalent
circuit is shown in figure (4). The capacitor voltage will appear across the transistor and
the dv dt is
...(5)
L
s
I dv
dt C
·
Equating equation (2) to equation (5) gives the required value of capacitance,
...(6)
L f
s
s
I t
C
V
·
Once the capacitor is charge to
s
V
, the freewheeling diode will turn on. Due to the
energy stored in
s
L
, there will be damped resonant circuit as shown in figure (5). The
RLC circuit is normally made critically damped to avoid oscillations. For unity critical
damping, 1 δ · , and equation
0
2
R C
L
α
δ
ω
· · yields
2
s
s
s
L
R
C
·
The capacitor
s
C
has to discharge through the transistor and the increase the peak
current rating of the transistor. The discharge through the transistor can be avoided by
placing resistor
s
R
across
s
C
instead of placing
s
R
across
s
D
.
The discharge current is shown in figure below. When choosing the value of
s
R
,
the discharge time,
s s s
R C τ ·
should also be considered. A discharge time of one third the
switching period,
s
T
is usually adequate.
1
3
1
3
s s s
s
s
s s
R C T
f
R
f C
· ·
·
ISOLATION OF GATE AND BASE DRIVES
Necessity
Driver circuits are operated at very low power levels. Normally the gating circuit are
digital in nature which means the signal levels are 3 to 12 volts. The gate and base drives
are connected to power devices which operate at high power levels.
Illustration
The logic circuit generates four pulses; these pulses have common terminals. The
terminal
g
, which has a voltage of
G
V
, with respect to terminal C , cannot be connected
86
directly to gate terminal G , therefore
1 g
V
should be applied between
1 1
& G S
of transistor
1
Q
. Therefore there is need for isolation between logic circuit and power transistor.
GS G D D
V V I R · −
87
+
-
V
S
G
3
G
2
S
3
S
2
M
2
R
L
M
3
M
1
S
1
G
1
M
4
G
S
4
G
4
C
L o g i c
g e n e r a t o r
G
1
G
1
G
2
G
3
G
4
g
1
g
2
g
3
g
4
( a ) C i r c u i t a r r a n g e m e n t
( b ) L o g i c g e n e r a t o r
G a t e p u l s e s
0
V
G
0
V
G
V V
g 3 , g 4
V V
g 1 , g 2
t
V
G s
S
D I
D
V
G
G
V
D D
+
-
R = R
D L
G
+
-
There are two ways of floating or isolating control or gate signal with respect to ground.
• Pulse transformers
• Optocouplers
PULSE TRANSFORMERS
Pulse transformers have one primary winding and can have one or more secondary
windings.
Multiple secondary windings allow simultaneous gating signals to series and parallel
connected transistors. The transformer should have a very small leakage inductance and
the rise time of output should be very small.
The transformer would saturate at low switching frequency and output would be
distorted.
OPTOCOUPLERS
Optocouplers combine infrared LED and a silicon photo transistor. The input signal is
applied to ILED and the output is taken from the photo transistor. The rise and fall times
of photo transistor are very small with typical values of turn on time =
2.5 s µ
and turn off
of 300ns. This limits the high frequency applications. The photo transistor could be a
darlington pair. The phototransistor require separate power supply and add to complexity
and cost and weight of driver circuits.
88
V
1
- V
2
0
L o g i c
d r i v e
c i r c u i t
Q
1
I
C
R
C
+
-
V
C C
R
B
O p t o c o u p l e r
R
V
g 1
1
+
-
R
B
R
1
1
Q
1
0
R
2
+ V
C C
Q
3
G
R
3
I
D
R
G
R
D
S
M
1
D
I
D
G
V
D D
+
-
1
THYRISTORS
A thyristor is the most important type of power semiconductor devices. They are
extensively used in power electronic circuits. They are operated as bi-stable switches
from non-conducting to conducting state.
A thyristor is a four layer, semiconductor of p-n-p-n structure with three p-n junctions. It
has three terminals, the anode, cathode and the gate.
The word thyristor is coined from thyratron and transistor. It was invented in the year
1957 at Bell Labs. The Different types of Thyristors are
• Silicon Controlled Rectifier (SCR).
• TRIAC
• DIAC
• Gate Turn Off Thyristor (GTO)
SILICON CONTROLLED RECTIFIER (SCR)
The SCR is a four layer three terminal device with junctions
1 2 3
, , J J J
as shown. The construction of SCR shows that the
gate terminal is kept nearer the cathode. The approximate
thickness of each layer and doping densities are as indicated in
the figure. In terms of their lateral dimensions Thyristors are
the largest semiconductor devices made. A complete silicon
wafer as large as ten centimeter in diameter may be used to
make a single high power thyristor.
Fig.: Structure of a generic thyristor
89
Fig.: Symbol
¦
¦
¦
¦
G a t e C a t h o d e
J
3
J
2
J
1
A n o d e
1 0 c m
1 7 - 3
1 0 - 5 x 1 0 c m
1 3 1 4 - 3
1 0 c m
1 7 - 3
1 0 c m
1 9 - 3
1 0 c m
1 9 - 3
1 0 c m
1 9 - 3
n
+
n
+
p
-
n

p
p
+
1 0 m µ
3 0 - 1 0 0 m µ
5 0 - 1 0 0 0 m µ
3 0 - 5 0 m µ
QUALITATIVE ANALYSIS
When the anode is made positive with respect the cathode junctions
1 3
& J J
are forward
biased and junction
2
J
is reverse biased. With anode to cathode voltage
AK
V
being small,
only leakage current flows through the device. The SCR is then said to be in the forward
blocking state. If
AK
V
is further increased to a large value, the reverse biased junction
2
J

will breakdown due to avalanche effect resulting in a large current through the device.
The voltage at which this phenomenon occurs is called the forward breakdown voltage
BO
V
. Since the other junctions
1 3
& J J
are already forward biased, there will be free
movement of carriers across all three junctions resulting in a large forward anode current.
Once the SCR is switched on, the voltage drop across it is very small, typically 1 to 1.5V.
The anode current is limited only by the external impedance present in the circuit.
Fig.: Simplified model of a thyristor
Although an SCR can be turned on by increasing the forward voltage beyond
BO
V
, in
practice, the forward voltage is maintained well below
BO
V
and the SCR is turned on by
applying a positive voltage between gate and cathode. With the application of positive
gate voltage, the leakage current through the junction
2
J
is increased. This is because the
resulting gate current consists mainly of electron flow from cathode to gate. Since the
bottom end layer is heavily doped as compared to the p-layer, due to the applied voltage,
some of these electrons reach junction
2
J
and add to the minority carrier concentration in
the p-layer. This raises the reverse leakage current and results in breakdown of junction
2
J
even though the applied forward voltage is less than the breakdown voltage
BO
V
. With
increase in gate current breakdown occurs earlier.
90
V-I CHARACTERISTICS
Fig. Circuit
Fig: V-I Characteristics
A typical V-I characteristics of a thyristor is shown above. In the reverse direction the
thyristor appears similar to a reverse biased diode which conducts very little current until
avalanche breakdown occurs. In the forward direction the thyristor has two stable states
or modes of operation that are connected together by an unstable mode that appears as a
negative resistance on the V-I characteristics. The low current high voltage region is the
forward blocking state or the off state and the low voltage high current mode is the on
state. For the forward blocking state the quantity of interest is the forward blocking
voltage
BO
V
which is defined for zero gate current. If a positive gate current is applied to
a thyristor then the transition or break over to the on state will occur at smaller values of
91
V
A A
V
G G
R
L
A
K
anode to cathode voltage as shown. Although not indicated the gate current does not have
to be a dc current but instead can be a pulse of current having some minimum time
duration. This ability to switch the thyristor by means of a current pulse is the reason for
wide spread applications of the device.
However once the thyristor is in the on state the gate cannot be used to turn the device
off. The only way to turn off the thyristor is for the external circuit to force the current
through the device to be less than the holding current for a minimum specified time
period.
Fig.: Effects on gate current on forward blocking voltage
HOLDING CURRENT H
I
After an SCR has been switched to the on state a certain minimum value of anode current
is required to maintain the thyristor in this low impedance state. If the anode current is
reduced below the critical holding current value, the thyristor cannot maintain the current
through it and reverts to its off state usually
I
µ
is associated with turn off the device.
LATCHING CURRENT L
I
After the SCR has switched on, there is a minimum current required to sustain
conduction. This current is called the latching current.
L
I
associated with turn on and is
usually greater than holding current.
92
QUANTITATIVE ANALYSIS
TWO TRANSISTOR MODEL
The general transistor equations are,
( )
( )
1
1
C B CBO
C E CBO
E C B
B E CBO
I I I
I I I
I I I
I I I
β β
α
α
· + +
· +
· +
· − −
The SCR can be considered to be made up of two transistors as shown in above figure.
Considering PNP transistor of the equivalent circuit,
( ) ( )
1 1 1 1
1 1
1
1
, , , ,
1 1
E A C C CBO CBO B B
B A CBO
I I I I I I I I
I I I
α α
α
· · · · ·
∴ · − − − − −
Considering NPN transistor of the equivalent circuit,
( ) ( )
2 2 2
2 2
2 2
2
2
, ,
2
C C B B E K A G
C k CBO
C A G CBO
I I I I I I I I
I I I
I I I I
α
α
· · · · +
· +
· + + − − −
From the equivalent circuit, we see that
( )
2 1
2 1 2
1 2
1
C B
g CBO CBO
A
I I
I I I
I
α
α α
∴ ·
+ +
⇒ ·
− +
93
Two transistors analog is valid only till SCR reaches ON state
Case 1: When
0
g
I ·
,
( )
1 2
1 2
1
CBO CBO
A
I I
I
α α
+
·
− +
The gain
1
α
of transistor
1
T
varies with its emitter current
E A
I I ·
. Similarly varies with
E A g K
I I I I · + ·
. In this case, with
0
g
I ·
,
2
α
varies only with
A
I
. Initially when the
applied forward voltage is small, ( )
1 2
1 α α + <
.
If however the reverse leakage current is increased by increasing the applied forward
voltage, the gains of the transistor increase, resulting in ( )
1 2
1 α α + →
.
From the equation, it is seen that when ( )
1 2
1 α α + ·
, the anode current
A
I
tends towards

. This explains the increase in anode current for the break over voltage
0 B
V
.
Case 2: With gate current
g
I
applied.
When sufficient gate drive is applied, we see that
2
B g
I I ·
is established. This in turn
results in a current through transistor
2
T
, this increases
2
α
of
2
T
. But with the existence of
2 2
2 2 C g
I I I
β
β β · ·
, a current through T, is established. Therefore,
1 1 2
1 1 2 1 2 C B B g
I I I I β β β β β · · ·
. This current in turn is connected to the base of
2
T
. Thus
the base drive of
2
T
is increased which in turn increases the base drive of
1
T
, therefore
regenerative feedback or positive feedback is established between the two transistors.
This causes ( )
1 2
α α +
to tend to unity therefore the anode current begins to grow towards
a large value. This regeneration continues even if
g
I
is removed this characteristic of SCR
makes it suitable for pulse triggering; SCR is also called a Lathing Device.
94
SWITCHING CHARACTERISTICS (DYNAMIC
CHARACTERISTICS)
THYRISTOR TURN-ON CHARACTERISTICS

Fig.: Turn-on characteristics
When the SCR is turned on with the application of the gate signal, the SCR does not
conduct fully at the instant of application of the gate trigger pulse. In the beginning, there
is no appreciable increase in the SCR anode current, which is because, only a small
portion of the silicon pellet in the immediate vicinity of the gate electrode starts
conducting. The duration between 90% of the peak gate trigger pulse and the instant the
forward voltage has fallen to 90% of its initial value is called the gate controlled / trigger
delay time
gd
t
. It is also defined as the duration between 90% of the gate trigger pulse and
the instant at which the anode current rises to 10% of its peak value.
gd
t
is usually in the
range of 1µ sec.
Once
gd
t
has lapsed, the current starts rising towards the peak value. The period during
which the anode current rises from 10% to 90% of its peak value is called the rise time. It
is also defined as the time for which the anode voltage falls from 90% to 10% of its peak
value. The summation of
gd
t
and
r
t
gives the turn on time
on
t
of the thyristor.
95
THYRISTOR TURN OFF CHARACTERISTICS
A n o d e c u r r e n t
b e g i n s t o
d e c r e a s e
t
C
t
q
t
t
C o m m u t a t i o n
d i
d t
R e c o v e r y R e c o m b i n a t i o n
t
1
t
2
t
3
t
4
t
5
t
r r
t
g r
t
q
t
c
V
A K
I
A
t
q
= d e v i c e o f f t i m e
t
c
= c i r c u i t o f f t i m e
When an SCR is turned on by the gate signal, the gate loses control over the device and
the device can be brought back to the blocking state only by reducing the forward current
to a level below that of the holding current. In AC circuits, however, the current goes
through a natural zero value and the device will automatically switch off. But in DC
circuits, where no neutral zero value of current exists, the forward current is reduced by
applying a reverse voltage across anode and cathode and thus forcing the current through
the SCR to zero.
As in the case of diodes, the SCR has a reverse recovery time
rr
t
which is due to charge
storage in the junctions of the SCR. These excess carriers take some time for
recombination resulting in the gate recovery time or reverse recombination time
gr
t
.
Thus, the turn-off time
q
t
is the sum of the durations for which reverse recovery current
flows after the application of reverse voltage and the time required for the recombination
of all excess carriers present. At the end of the turn off time, a depletion layer develops
across
2
J
and the junction can now withstand the forward voltage. The turn off time is
dependent on the anode current, the magnitude of reverse
g
V
applied ad the magnitude
and rate of application of the forward voltage. The turn off time for converte grade SCR’s
is 50 to 100µ sec and that for inverter grade SCR’s is 10 to 20µ sec.
96
To ensure that SCR has successfully turned off , it is required that the circuit off time
c
t

be greater than SCR turn off time
q
t
.
THYRISTOR TURN ON
• Thermal Turn on: If the temperature of the thyristor is high, there will be an
increase in charge carriers which would increase the leakage current. This would
cause an increase in
1
α
&
2
α
and the thyristor may turn on. This type of turn on
many cause thermal run away and is usually avoided.
• Light: If light be allowed to fall on the junctions of a thyristor, charge carrier
concentration would increase which may turn on the SCR.
• LASCR: Light activated SCRs are turned on by allowing light to strike the silicon
wafer.
• High Voltage Triggering: This is triggering without application of gate voltage
with only application of a large voltage across the anode-cathode such that it is
greater than the forward breakdown voltage
BO
V
. This type of turn on is destructive
and should be avoided.
• Gate Triggering: Gate triggering is the method practically employed to turn-on
the thyristor. Gate triggering will be discussed in detail later.

dv
dt
Triggering: Under transient conditions, the capacitances of the p-n junction
will influence the characteristics of a thyristor. If the thyristor is in the blocking
state, a rapidly rising voltage applied across the device would cause a high current
to flow through the device resulting in turn-on. If
2
j
i
is the current throught the
junction
2
j
and
2
j
C
is the junction capacitance and
2
j
V
is the voltage across
2
j
,
then
( )
2 2
2 2
2 2
2
2
j J j
j j j j
C dV dC
dq d
i C V V
dt dt dt dt
· · · +
From the above equation, we see that if
dv
dt
is large,
2
1
j
will be large. A high value
of charging current may damage the thyristor and the device must be protected against
high
dv
dt
. The manufacturers specify the allowable
dv
dt
.
97
THYRISTOR RATINGS
First Subscript Second Subscript Third Subscript
D →off state W →working M →Peak Value
T →ON state R →Repetitive
F →Forward S →Surge or non-repetitive
R →Reverse
VOLTAGE RATINGS
DWM
V
: This specifies the peak off state working forward voltage of the device. This
specifies the maximum forward off state voltage which the thyristor can withstand during
its working.
DRM
V
: This is the peak repetitive off state forward voltage that the thyristor can block
repeatedly in the forward direction (transient).
DSM
V
: This is the peak off state surge / non-repetitive forward voltage that will occur
across the thyristor.
RWM
V
: This the peak reverse working voltage that the thyristor can withstand in the
reverse direction.
98
RRM
V
: It is the peak repetitive reverse voltage. It is defined as the maximum permissible
instantaneous value of repetitive applied reverse voltage that the thyristor can block in
reverse direction.
RSM
V
: Peak surge reverse voltage. This rating occurs for transient conditions for a
specified time duration.
T
V
: On state voltage drop and is dependent on junction temperature.
TM
V
: Peak on state voltage. This is specified for a particular anode current and junction
temperature.
dv
dt
rating: This is the maximum rate of rise of anode voltage that the SCR has to
withstand and which will not trigger the device without gate signal (refer
dv
dt
triggering).
CURRENT RATING
Taverage
I
: This is the on state average current which is specified at a particular temperature.
TRMS
I
: This is the on-state RMS current.
Latching current,
L
I
: After the SCR has switched on, there is a minimum current required
to sustain conduction. This current is called the latching current.
L
I
associated with turn
on and is usually greater than holding current
Holding current,
H
I
: After an SCR has been switched to the on state a certain minimum
value of anode current is required to maintain the thyristor in this low impedance state. If
the anode current is reduced below the critical holding current value, the thyristor cannot
maintain the current through it and reverts to its off state usually
I
µ
is associated with turn
off the device.
di
dt
rating: This is a non repetitive rate of rise of on-state current. This maximum value of
rate of rise of current is which the thyristor can withstand without destruction. When
thyristor is switched on, conduction starts at a place near the gate. This small area of
99
conduction spreads rapidly and if rate of rise of anode current
di
dt
is large compared to the
spreading velocity of carriers, local hotspots will be formed near the gate due to high
current density. This causes the junction temperature to rise above the safe limit and the
SCR may be damaged permanently. The
di
dt
rating is specified in sec A µ .
GATE SPECIFICATIONS
GT
I
: This is the required gate current to trigger the SCR. This is usually specified as a DC
value.
GT
V
: This is the specified value of gate voltage to turn on the SCR (dc value).
GD
V
: This is the value of gate voltage, to switch from off state to on state. A value below
this will keep the SCR in off state.
RR
Q
: Amount of charge carriers which have to be recovered during the turn off process.
thjc
R
: Thermal resistance between junction and outer case of the device.
GATE TRIGGERING METHODS
Types
The different methods of gate triggering are the following
• R-triggering.
• RC triggering.
• UJT triggering.
100
RESISTANCE TRIGGERING
A simple resistance triggering circuit is as shown. The resistor
1
R
limits the current
through the gate of the SCR.
2
R
is the variable resistance added to the circuit to achieve
control over the triggering angle of SCR. Resistor ‘R’ is a stabilizing resistor. The diode
D is required to ensure that no negative voltage reaches the gate of the SCR.
Fig.: Resistance firing circuit
Fig.: Resistance firing of an SCR in half wave circuit with dc load
(a) No triggering of SCR (b) α = 90
0
(c) α < 90
0
101
L O A D
v
O
a
b
i R
1
R
2
D
R V
g
V
T
v = V s i n t
S m
ω
V
S
π 2 π
3 π 4 π
ω t
V s i n t
m
ω
V
g V
g t
ω t
ω t
ω t
ω t
V
o
i
o
V
T
V
g p
V
g t V
g p
( a )
ω t
ω t
ω t
ω t
ω t
ω t
ω t
ω t
ω t
ω t
π 2 π
3 π 4 π
π 2 π
3 π 4 π
V
S
V
g
V
o
i
o
V
T
V
S
V
g
V
o
i
o
V
T
V = V
g p g t
α
2 7 0
0
π 2 π
3 π 4 π
α
9 0
0
α = 9 0
0
( c ) ( b )
α < 9 0
0
V > V
g p g t
Design
With
2
0 R ·
, we need to ensure that
1
m
gm
V
I
R
<
, where
gm
I
is the maximum or peak gate
current of the SCR. Therefore 1
m
gm
V
R
I

.
Also with
2
0 R ·
, we need to ensure that the voltage drop across resistor ‘R’ does not
exceed
gm
V
, the maximum gate voltage
( )
1
1
1
1
m
gm
gm gm m
gm m gm
gm
m gm
V R
V
R R
V R V R V R
V R R V V
V R
R
V V

+
∴ + ≥
∴ ≥ −


OPERATION
Case 1:
gp gt
V V <
gp
V
, the peak gate voltage is less then
gt
V
since
2
R
is very large. Therefore, current ‘I’
flowing through the gate is very small. SCR will not turn on and therefore the load
voltage is zero and
scr
v
is equal to
s
V
. This is because we are using only a resistive
network. Therefore, output will be in phase with input.
Case 2:
gp gt
V V ·
,
2
R →
optimum value.
When
2
R
is set to an optimum value such that
gp gt
V V ·
, we see that the SCR is triggered
at
0
90 (since
gp
V
reaches its peak at
0
90 only). The waveforms shows that the load voltage
is zero till
0
90 and the voltage across the SCR is the same as input voltage till it is
triggered at
0
90 .
Case 3:
gp gt
V V >
,
2
R →
small value.
The triggering value
gt
V
is reached much earlier than
0
90 . Hence the SCR turns on earlier
than
S
V
reaches its peak value. The waveforms as shown with respect to
sin
s m
V V t ω ·
.
At ( )
, , sin
S gt m gp gt gp
t V V V V V V ω α α · · · · Q
Therefore
1
sin
gt
gp
V
V
α

| `
·


. ,
But
1 2
m
gp
V R
V
R R R
·
+ +
102
Therefore
( )
1 2 1
sin
gt
m
V R R R
V R
α

+ + ]
·
]
]
Since
1
, ,
gt
V R R
are constants
2
R αα
RESISTANCE CAPACITANCE TRIGGERING
RC HALF WAVE
Capacitor ‘C’ in the circuit is connected to shift the phase of the gate voltage.
1
D
is used
to prevent negative voltage from reaching the gate cathode of SCR.
In the negative half cycle, the capacitor charges to the peak negative voltage of the
supply ( )
m
V −
through the diode
2
D
. The capacitor maintains this voltage across it, till the
supply voltage crosses zero. As the supply becomes positive, the capacitor charges
through resistor ‘R’ from initial voltage of
m
V −
, to a positive value.
When the capacitor voltage is equal to the gate trigger voltage of the SCR, the SCR is
fired and the capacitor voltage is clamped to a small positive value.
Fig.: RC half-wave trigger circuit
Fig.: Waveforms for RC half-wave trigger circuit
(a) High value of R (b) Low value of R
103
L O A D
v
O
R
C
V
T
v = V s i n t
S m
ω
D
2
V
C
+
-
D
1
v
s
0
V s i n t
m
ω
0
ω t
ω t
ω t
a
v
c
- / 2 π
a
v
c
V
g t
v
o
v
T
α α
π 2 π 3 π
α α
V
m
- V
m
v
s
0
V s i n t
m
ω
0
ω t
a
v
c
- / 2 π
a
v
c
V
g t
0
0
v
o
v
T
V
m
V
m
α
α
π 2 π 3 π
- V
m
( 2 + ) π α
( a )
( b )
ω t ω t
Case 1: R →Large.
When the resistor ‘R’ is large, the time taken for the capacitance to charge from
m
V −
to
gt
V
is large, resulting in larger firing angle and lower load voltage.
Case 2: R →Small
When ‘R’ is set to a smaller value, the capacitor charges at a faster rate towards
gt
V

resulting in early triggering of SCR and hence
L
V
is more. When the SCR triggers, the
voltage drop across it falls to 1 – 1.5V. This in turn lowers, the voltage across R & C.
Low voltage across the SCR during conduction period keeps the capacitor discharge
during the positive half cycle.
DESIGN EQUATION
From the circuit
1 C gt d
V V V · +
. Considering the source voltage and the gate circuit, we
can write
s gt C
v I R V · +
. SCR fires when
s gt C
v I R V ≥ +
that is
1 S g gt d
v I R V V ≥ + +
.
Therefore
1 s gt d
gt
v V V
R
I
− −

. The RC time constant for zero output voltage that is
maximum firing angle for power frequencies is empirically gives as
1.3
2
T
RC
| `


. ,
.
RC FULL WAVE
A simple circuit giving full wave output is shown in figure below. In this circuit the initial
voltage from which the capacitor ‘C’ charges is essentially zero. The capacitor ‘C’ is reset
to this voltage by the clamping action of the thyristor gate. For this reason the charging
time constant RC must be chosen longer than for half wave RC circuit in order to delay
the triggering. The RC value is empirically chosen as
50
2
T
RC ≥ . Also
s gt
gt
v V
R
I


.
Fig: RC full-wave trigger circuit
104
v
O
R
C
V
T
v = V s i n t
S m
ω
+
-
L O A D
+
-
D 1 D 3
D 4 D 2
v
d
Fig: Wave-forms for RC full-wave trigger circuit
(a) High value of R (b) Low value of R
PROBLEM
1. Design a suitable RC triggering circuit for a thyristorised network operation on a
220V, 50Hz supply. The specifications of SCR are
min
5
gt
V V ·
,
max
30
gt
I mA ·
.
7143.3
s gt D
g
v V V
R
I
− −
· · Ω
Therefore 0.013 RC ≥
7.143 R k ≤ Ω

1.8199 C F µ ≥
105
v
s
v
d
v
o
v
T
ω t
ω t
ω t
ω t
V s i n t
m
ω
v
d
v
c
v
c
v
c v
g t
α α α
V s i n t
m
ω
v
s
v
d
v
o
v
T
ω t
ω t
ω t
v
g t
α
( a ) ( b )
UNI-JUNCTION TRANSISTOR (UJT)
Fig.: (a) Basic structure of UJT (b) Symbolic representation
(c) Equivalent circuit
UJT is an n-type silicon bar in which p-type emitter is embedded. It has three terminals
base1, base2 and emitter ‘E’. Between
1
B
and
2
B
UJT behaves like ordinary resistor and
the internal resistances are given as
1 B
R
and
2 B
R
with emitter open
1 2 BB B B
R R R · +
.
Usually the p-region is heavily doped and n-region is lightly doped. The equivalent circuit
of UJT is as shown. When
BB
V
is applied across
1
B
and
2
B
, we find that potential at A is
1 1
1
1 2 1 2
BB B B
AB BB
B B B B
V R R
V V
R R R R
η η
]
· · ·
]
+ +
]
η
is intrinsic stand off ratio of UJT and ranges between 0.51 and 0.82. Resistor
2 B
R
is
between 5 to 10KΩ .
OPERATION
When voltage
BB
V
is applied between emitter ‘E’ with base 1
1
B
as reference and the
emitter voltage
E
V
is less than ( )
D BE
V V η +
the UJT does not conduct. ( )
D BB
V V η +
is
designated as
P
V
which is the value of voltage required to turn on the UJT. Once
E
V
is
equal to
P BE D
V V V η ≡ +
, then UJT is forward biased and it conducts.
The peak point is the point at which peak current
P
I
flows and the peak voltage
P
V
is
across the UJT. After peak point the current increases but voltage across device drops,
this is due to the fact that emitter starts to inject holes into the lower doped n-region.
Since p-region is heavily doped compared to n-region. Also holes have a longer life time,
therefore number of carriers in the base region increases rapidly. Thus potential at ‘A’
falls but current
E
I
increases rapidly.
1 B
R
acts as a decreasing resistance.
The negative resistance region of UJT is between peak point and valley point. After
valley point, the device acts as a normal diode since the base region is saturated and
1 B
R

does not decrease again.
106
R
B 2
V
B B
+
-
E
B
1
R
B 1
η V
B B
A
+
-
V
e
I
e
B
2
E
B
2
B
1
B
1
A
B
2
E
R
B 2
R
B 1
n - t y p e
p - t y p e
E t a - p o i n t
E t a - p o i n t
( a ) ( b )
( c )
V
e
V
B B
R l o a d l i n e
V
p
V
v
I
e
I
v
I
p
0
P e a k P o i n t
C u t o f f
r e g i o n
N e g a t i v e R e s i s t a n c e
R e g i o n
S a t u r a t i o n
r e g i o n
V a l l e y P o i n t
Fig.: V-I Characteristics of UJT
UJT RELAXATION OSCILLATOR
UJT is highly efficient switch. The switching times is in the range of nanoseconds. Since
UJT exhibits negative resistance characteristics it can be used as relaxation oscillator. The
circuit diagram is as shown with
1
R
and
2
R
being small compared to
1 B
R
and
2 B
R
of
UJT.
Fig.: UJT oscillator (a) Connection diagram and (b) Voltage waveforms
107
R
R
2
V
B B
R
1
C
E
B
2
B
1
V
e
v
o
V
e
V
p
V
V
V
o
t
t
C a p a c i t o r
c h a r g i n g
T = R C
1
α 1
ω
T
η V + V
B B
V
P
T = R C
2 1
C a p a c i t o r
d i s c h a r g i n g
V
v
( a ) ( b )
OPERATION
When
BB
V
is applied, capacitor ‘C’ begins to charge through resistor ‘R’ exponentially
towards
BB
V
. During this charging emitter circuit of UJT is an open circuit. The rate of
charging is
1
RC τ ·
. When this capacitor voltage which is nothing but emitter voltage
E
V

reaches the peak point
P BB D
V V V η · +
, the emitter base junction is forward biased and UJT
turns on. Capacitor ‘C’ rapidly discharges through load resistance
1
R
with time constant
( )
2 1 2 1
RC τ τ τ · =
. When emitter voltage decreases to valley point
v
V
, UJT turns off.
Once again the capacitor will charge towards
BB
V
and the cycle continues. The rate of
charging of the capacitor will be determined by the resistor R in the circuit. If R is small
the capacitor charges faster towards
BB
V
and thus reaches
P
V
faster and the SCR is
triggered at a smaller firing angle. If R is large the capacitor takes a longer time to charge
towards
P
V
the firing angle is delayed. The waveform for both cases is as shown below.
EXPRESSION FOR PERIOD OF OSCILLATION ‘T’
The period of oscillation of the UJT can be derived based on the voltage across the
capacitor. Here we assume that the period of charging of the capacitor is lot larger than
than the discharging time.
Using initial and final value theorem for voltage across a capacitor, we get
( )
t
RC
C final initial final
V V V V e

· + −
, , ,
C P initial V final BB
t T V V V V V V · · · ·
Therefore ( )
/ T RC
P BB V BB
V V V V e

· + −
log
BB V
e
BB P
V V
T RC
V V
| ` −
⇒ ·


. ,
If

,
ln
1
ln
1
V BB
BB
BB P
P
BB
V V
V
T RC
V V
RC
V
V
<
| `
·


. ,
]
]
] ·
]

]
]
But
P BB D
V V V η · +
108
If
D BB P BB
V V V V η · =
Therefore
1
ln
1
T RC
η
]
·
]

]
DESIGN OF UJT OSCILLATOR
Resistor ‘R’ is limited to a value between 3 kilo ohms and 3 mega ohms. The upper limit
on ‘R’ is set by the requirement that the load line formed by ‘R’ and
BB
V
intersects the
device characteristics to the right of the peak point but to the left of valley point. If the
load line fails to pass to the right of the peak point the UJT will not turn on, this condition
will be satisfied if
BB P P
V I R V − >
, therefore
BB P
P
V V
R
I

<
.
At the valley point
E V
I I ·
and
E V
V V ·
, so the condition for the lower limit on ‘R’ to
ensure turn-off is
BB V V
V I R V − <
, therefore
BB V
V
V V
R
I

>
.
The recommended range of supply voltage is from 10 to 35V. the width of the triggering
pulse
1 g B
t R C ·
.
In general
1 B
R
is limited to a value of 100 ohm and
2 B
R
has a value of 100 ohm or greater
and can be approximately determined as
4
2
10
B
BB
R
V η
·
.
PROBLEM
1. A UJT is used to trigger the thyristor whose minimum gate triggering voltage is
6.2V, The UJT ratings are:
0.66 η ·
,
0.5
p
I mA ·
,
3
v
I mA ·
,
1 2
5
B B
R R k + · Ω
,
leakage current = 3.2mA,
14
p
V v ·
and
1
v
V V ·
. Oscillator frequency is 2kHz and
capacitor C = 0.04µ F. Design the complete circuit.
Solution
1
ln
1
C
T R C
η
]
·
]

]
Here,
3
1 1
2 10
T
f
· ·
×
, since
2 f kHz ·
and putting other values,
6
3
1 1
0.04 10 ln 11.6
2 10 1 0.66
C
R k

| `
· × × · Ω

× −
. ,
The peak voltage is given as,
p BB D
V V V η · +
Let
0.8
D
V ·
, then putting other values,
109
14 0.66 0.8
BB
V · +
20
BB
V V ·
The value of
2
R
is given by
( )
2 1
2
0.7
B B
BB
R R
R
V η
+
·
( )
3
2
0.7 5 10
0.66 20
R
×
·
×
2
265 R ∴ · Ω
Value of
1
R
can be calculated by the equation
( )
1 2 1 2 BB leakage B B
V I R R R R · + + +
( )
3
1
20 3.2 10 265 5000 R

· × + +
1
985 R · Ω
The value of
( ) max c
R
is given by equation
( ) max
BB p
c
p
V V
R
I

·
( ) max 3
20 14
0.5 10
c
R


·
×
( ) max
12
c
R k · Ω
Similarly the value of
( ) min c
R
is given by equation
( ) min
BB v
c
v
V V
R
I

·
( ) min 3
20 1
3 10
c
R


·
×
( ) min
6.33
c
R k · Ω
2. Design the UJT triggering circuit for SCR. Given
20
BB
V V − ·
,
0.6 η ·
,
10
p
I A µ ·
,
2
v
V V ·
,
10
v
I mA ·
. The frequency of oscillation is 100Hz. The
triggering pulse width should be
50 s µ
.
Solution
The frequency f = 100Hz, Therefore
1 1
100
T
f
· ·
110
From equation
1
ln
1
c
T R C
η
| `
·


. ,
Putting values in above equation,
1 1
ln
100 1 0.6
c
R C
| `
·


. ,
0.0109135
c
R C ∴ ·
Let us select
1 C F µ ·
. Then
c
R
will be,
( ) min 6
0.0109135
1 10
c
R

·
×
( ) min
10.91
c
R k · Ω
.
The peak voltage is given as,
p BB D
V V V η · +
Let
0.8
D
V ·
and putting other values,
0.6 20 0.8 12.8
p
V V · × + ·
The minimum value of
c
R
can be calculated from
( ) min
BB v
c
v
V V
R
I

·
( ) min 3
20 2
1.8
10 10
c
R k


· · Ω
×
Value of
2
R
can be calculated from
4
2
10
BB
R
V η
·
4
2
10
833.33
0.6 20
R · · Ω
×
Here the pulse width is give, that is 50µ s.
Hence, value of
1
R
will be,
2 1
RC τ ·
The width
2
50 sec τ µ ·
and
1 C F µ ·
, hence above equation becomes,
6 6
1
50 10 1 10 R
− −
× · × ×
1
50 R ∴ · Ω
111
Thus we obtained the values of components in UJT triggering circuit as,
1
50 R · Ω
,
2
833.33 R · Ω
,
10.91
c
R k · Ω
,
1 C F µ ·
.
SYNCHRONIZED UJT OSCILLATOR
A synchronized UJT triggering circuit is as shown in figure below. The diodes rectify the
input ac to dc, resistor
d
R
lowers
dc
V
to a suitable value for the zener diode and UJT. The
zener diode ‘Z’ functions to clip the rectified voltage to a standard level
Z
V
which remains
constant except near
0
dc
V ·
. This voltage
Z
V
is applied to the charging RC circuit. The
capacitor ‘C’ charges at a rate determined by the RC time constant. When the capacitor
reaches the peak point
P
V
the UJT starts conducting and capacitor discharges through the
primary of the pulse transformer. As the current through the primary is in the from of a
pulse the secondary windings have pulse voltages at the output. The pulses at the two
secondaries feed SCRs in phase. As the zener voltage
Z
V
goes to zero at the end of each
half cycle the synchronization of the trigger circuit with the supply voltage across the
SCRs is archived, small variations in supply voltage and frequency are not going to effect
the circuit operation. In case the resistor ‘R’ is reduced so that the capacitor voltage
reaches UJT threshold voltage twice in each half cycle there will be two pulses in each
half cycle with one pulse becoming redundant.
Fig.: Synchronized UJT trigger circuit
112
R
C
+
-
D 1 D 3
D 4 D 2
V
d c
R
1
V
Z
+
-
Z
i
1
v
c
+
-
R
2
G
1
C
1
G
2
C
2
P u l s e T r a n s f
E
B
2
B
1
T o S C R
G a t e s
Fig.: Generation of output pulses for the synchronized UJT trigger circuit
DIGITAL FIRING CIRCUIT
Fig.: Block diagram of digital firing circuit
113
1 2
1 2
1 2
P u l s e
V o l t a g e
v
c
,
v
d c
v
c
v
c
v
c
V
d c
V
Z
η V
Z
ω t
ω t
α
ω
α
ω
F i x e d f r e q u e n c y
O s c i l l a t o r
( f )
f
L o g i c c i r c u i t
+
M o d u l a t o r
+
D r i v e r s t a g e
n - b i t
C o u n t e r
F l i p - F l o p
( F / F )
C l k
m a x
m i n
S
B
B
G
1
G
2
A A
R e s e t L o a d
E
n
R R e s e t
Z C D
D . C . 5 V
s u p p l y
S y n c
S i g n a l ( ~ 6 V )
A A
C
C a r r i e r
F r e q u e n c y
O s c i l l a t o r
( 1 0 K H z ) ∼
f
C y ( ’ 1 ’ o r ‘ 0 ’ )
P r e s e t
( ’ N ’ n o . o f c o u n t i n g b i t s )
A
B
A
B
y
y
I
H
J
K
0 . 1 F µ
B
A
A
B
f
c
0 . 1 F µ
T o
D r i v e r
C i r c u i t
T o
D r i v e r
C i r c u i t
L o g i c C i r c u i t M o d u l a t o r
f
c
G
1
G
2
G = A . B . f
1 c
G = A . B . f
2 c
Fig.: Logic circuit, Carrier Modulator
The digital firing scheme is as shown in the above figure. It constitutes a pre-settable
counter, oscillator, zero crossing detection, flip-flop and a logic control unit with NAND
and AND function.
Oscillator: The oscillator generates the clock required for the counter. The frequency of
the clock is say
C
f
. In order to cover the entire range of firing angle that is from 0
0
to
180
0
, a n-bit counter is required for obtaining 2
n
rectangular pulses in a half cycle of ac
source. Therefore 4-bit counter is used, we obtain sixteen pulses in a half cycle of ac
source.
Zero Crossing Detector: The zero crossing detector gives a short pulse whenever the
input ac signal goes through zeroes. The ZCD output is used to reset the counter,
oscillator and flip-flops for getting correct pulses at zero crossing point in each half cycle,
a low voltage synchronized signal is used.
Counter: The counter is a pre-settable n-bit counter. It counts at the rate of
C
f

pulses/second. In order to cover the entire range of firing angle from 0 to 180
0
, the n-bit
counter is required for obtaining 2
n
rectangular pulses in a half cycle.
Example: If 4-bit counter is used there will be sixteen pulses / half cycle duration. The
counter is used in the down counting mode. As soon as the synchronized signal crosses
zero, the load and enable become high and low respectively and the counter starts
counting the clock pulses in the down mode from the maximum value to the pre-set value
‘N’. ‘N’ is the binary equivalent of the control signal. once the counter reaches the preset
value ‘N’ counter overflow signal goes high. The counter overflow signal is processed to
trigger the Thyristors. Thus by varying the preset input one can control the firing angle of
Thyristors. The value of firing angle ( ) α
can be calculated from the following equation
( )
0 0
2
180 1 180 for 4
2 16
n
n
N N
n α
| ` −
| `
· · − ·

. ,
. ,
114
Modified R-S Flip-Flop: The reset input terminal of flip-flop is connected to the output
of ZCD and set is connected to output of counter. The pulse goes low at each zero
crossing of the ac signal. A low value of ZCD output resets the B-bar to 1 and B to 0.
A high output of the counter sets B-bar to 0 and B to 1. This state of the flip-flop is
latched till the next zero crossing of the synchronized signal. The output terminal B of
flip-flop is connected with enable pin of counter. A high at enable ‘EN’ of counter stops
counting till the next zero crossing.
Input Output Remarks
R S B B-bar
1 1 1 0
0 1 1 0 Set
0 0 0 1 Reset
1 0 0 1 Last Stage
1 1 1 0
Truth Table of Modified R-S Flip-Flop
Logic Circuit, Modulation and Driver Stage: The output of the flip-flop and pulses A
and A-bar of ZCD are applied to the logic circuit. The logic variable Y equal to zero or
one enables to select the firing pulse duration from
α
to
π
or
α

Overall Operation
The input sinusoidal signal is used to derive signals A and A-bar with the help of ZCD.
The zero crossing detector along with a low voltage sync signal is used to generate pulses
at the instant the input goes through zeroes. The signal C and C-bar are as shown. The
signal C-bar is used to reset the fixed frequency oscillator, the flip flop and the n-bit
counter. The fixed frequency oscillator determines the rate at which the counter must
count. The counter is preset to a value N which is the decimal equivalent of the trigger
angle. The counter starts to down count as soon as the C-bar connected to load pin is zero.
Once the down count N is over the counter gives a overflow signal which is processed to
be given to the Thyristors. This overflow signal is given to the Set input S of the modified
R-S flip flop. If S=1 B goes high as given by the truth table and B –bar has to go low. B
has been connected to the Enable pin of counter. Once B goes low the counter stops
counting till the next zero crossing. The carrier oscillator generates pulses with a
frequency of 10kHz for generating trigger pulses for the Thyristors. Depending upon the
values of A, A-bar, B, B-bar and Y the logic circuit will generate triggering pulses for
gate1 or gate 2 for Thyristors 1 and 2 respectively.
115
dv
dt
PROTECTION
The
dv
dt
across the thyristor is limited by using snubber circuit as shown in figure (a)
below. If switch
1
S
is closed at 0 t · , the rate of rise of voltage across the thyristor is
limited by the capacitor
S
C
. When thyristor
1
T
is turned on, the discharge current of the
capacitor is limited by the resistor
S
R
as shown in figure (b) below.
Fig. (a)
116
Fig. (b)
Fig. (c)
The voltage across the thyristor will rise exponentially as shown by fig (c) above. From
fig. (b) above, circuit we have (for SCR off)
( ) ( ) ( )
[ ] t 0
1
0
S S c
for
V i t R i t dt V
C
·
· + +

.
Therefore
( )
s
t
S
S
V
i t e
R
τ

·
, where
s S S
R C τ ·
Also ( ) ( )
T S S
V t V i t R · −
( )
s
t
S
T S S
S
V
V t V e R
R
τ

· −
Therefore ( ) 1
s s
t t
T S S S
V t V V e V e
τ τ
− −
]
· − · −
]
]
At t = 0, ( ) 0 0
T
V ·
At
s
t τ ·
, ( ) 0.632
T s S
V V τ ·
117
Therefore
( ) ( ) 0 0.632
T s T S
s S S
V V V dv
dt R C
τ
τ

· ·
And
S
S
TD
V
R
I
·
.
TD
I
is the discharge current of the capacitor.
It is possible to use more than one resistor for
dv
dt
and discharging as shown in the
figure (d) below. The
dv
dt
is limited by
1
R
and
S
C
.
1 2
R R +
limits the discharging current
such that
1 2
S
TD
V
I
R R
·
+
Fig. (d)
The load can form a series circuit with the snubber network as shown in figure (e) below.
The damping ratio of this second order system consisting RLC network is given as,
0
2
S S
S
R R C
L L
α
δ
ω
+
· ·
+
, where
S
L
is stray inductance and L, R is load
inductance and resistance respectively.
To limit the peak overshoot applied across the thyristor, the damping ratio should be in
the range of 0.5 to 1. If the load inductance is high,
S
R
can be high and
S
C
can be small
to retain the desired value of damping ratio. A high value of
S
R
will reduce discharge
current and a low value of
S
C
reduces snubber loss. The damping ratio is calculated for a
particular circuit
S
R
and
S
C
can be found.
118
Fig. (e)
di
dt
PROTECTION
Practical devices must be protected against high
di
dt
. As an example let us consider the
circuit shown above, under steady state operation
m
D
conducts when thyristor
1
T
is off.
If
1
T
is fired when
m
D
is still conducting
di
dt
can be very high and limited only by the
stray inductance of the circuit. In practice the
di
dt
is limited by adding a series inductor
S
L
as shown in the circuit above. Then the forward
S
S
V di
dt L
·
.
119
SERIES AND PARALLEL OPERATION
SCR ratings have improved considerably since its introduction in 1957. Presently, SCRs
with voltage and current rating of 10kV and 3kA are available. However, for some
industrial applications, the demand for voltage and current ratings is so high that a single
SCR cannot fulfill such requirements. In such cases, SCRs are connected in series in
order to meet the high voltage demand and in parallel for fulfilling high current demand.
The string efficiency that is a term used for measuring the degree of utilization of SCRs
in a string.
( )
Actual voltage / current rating
String efficiency =
, no. of SCRs voltage / current rating of one SCR
s
n ×
Usually the above ratio is less than one. Since SCRs of same ratings and specifications do
not have identical characteristics unequal voltage / current sharing is bound to occur for
all SCRs in a string. Therefore the string efficiency can never be equal to one.
DERATING FACTOR (DRF)
The use of an extra unit will improve the reliability of a string. A measure of the
reliability of the string is given by a factor called derating factor defined as
DRF = 1 - String efficiency
SERIES OPERATION OF SCRS
For high voltage applications two or more Thyristors can be connected in series to
provide the required voltage rating. However due to production spread the characteristics
of Thyristors of the same type are not identical.
STATIC EQUALIZATION
As seen from V-I characteristics, two identical Thyristors to be used in a string do not
have the same off state current for same off-state voltages. If these SCRs are used in a
string as such, unequal voltage distribution would occur. In order to overcome this, we
could connect resistors across individual SCRs to meet the requirement of equal off state
currents for the same off state voltage. But this is not practical therefore we use the same
resistor ‘R’ across each SCR to get fairly uniform voltage distribution.
120
We see that, equal resistors ‘R’ are connected across individual SCR’s which are
connected in series. Let
s
n
be the number of SCRs connected. Let
T
I
be the total current
that the string carries and individual SCRs have leakage currents
1 2
, ........,
D D Dn
I I I
.
As seen from the V-I characteristics, even though the voltage across each SCR is the
same, the leakage current in the off state differ. Let
1 2 D D
I I <
. Since SCR1 has lower
leakage current compared to other SCRs, it will block a higher voltage compared to other
SCRs.
Let the leakage current of other SCRs, be such that
2 3
........,
D D Dn
I I I · ·
. Therefore
( )
1 1
.... 1
D T
I I I · −
( )
2 2
.... 2
D T
I I I · −
If
1 D
V
is the voltage across SCR1, then
1 1 D
V I R ·
, and voltage across the rest of the SCRs
is ( )
2
1
s
n I R −
.
Therefore total voltage across the string = ( )
1 2
1
s s
V I R n I R · + −
.
But from equation (2) ( ) ( )
1 2
1
S s T D
V I R n I I · + − −
But from equation (1)
1 1 T D
I I I · +
Therefore ( ) [ ]
1 1 1 2
1
S s D D
V I R n I I I R · + − + −
( ) ( ) [ ]
1 1 1 2
1 1
S D s s D D
V V n I R n I I R · + − + − −
But
1 2 D D
I I <
,
∴ ( ) ( ) ( )
1 1 2 1
1 1
S D s s D D
V V n I R n I I R · + − − − −
121
2 1 D D D
I I I − · ∆
= difference between leakage currents of SCR1 and the rest
of the SCRs.
Therefore ( ) ( )
1 1
1 1
S D s D S D
V V n V n I R · + − − − ∆
( ) ( )
1
1 ... 3
S s D s D
V n V n I R · − − ∆
Also
( )
1
1
s D S
s D
n V V
R
n I

·
− ∆
From equation (3), considering the worst case condition of
1
0
D
I ·
,
( )
( )
2
1 max
1
S s D
D
s
V n RI
V
n
+ −
·
DYNAMIC EQUALIZATION
Under transient conditions, the voltage across individual SCRs in a string may not be
distributed equally. The cause for this is the unequal junction capacitances of individual
SCRs. During turn off the differences in stored charges causes differences in the reverse
voltage sharing. The thyristor with the least recovered charge will face the highest
transient voltage normally it is necessary to connect a capacitor
1
C
across each thyristor
as shown in the figure of series connected Thyristors.
122
DESIGN OF C
It is found that in series connected SCRs, voltage unbalance during turn off is more
predominant than the turn on time. Therefore the design of ‘C’ is based on turn off
characteristics.
Since SCR1 has recovered early, the voltage across capacitor ‘C’ is the difference
between charge storage of SCR1 and SCR2 so the transient voltage across SCR1 is,
D
Q
V I R
C

∆ · ∆ · , where
1
Q
is the stored charge of
1
T
and
2
Q
is the stored charge of
2
T

with
2 1
Q Q Q ∆ · −
.
Assuming there are ‘n
s
’ SCRs in the string, then
2 3
.......
n
Q Q Q ·
and
1 2
Q Q <
.
Voltage across SCR1 =
( )
1
1
S s D
D
s
V n I R
V
n
+ − ∆
·
.
Substituting for
D
I R ∆
, we have ( )
1
1
1
1
D S s
s
Q
V V n
n C
] ∆
· + −
]
]
.
The worst case transient voltage sharing will occur when
1
0 Q ·
, and
2
Q Q ∆ ·
and
( ) max DT
V
is given as
( )
( )
2
1 max
1
1
1
S s D
s
Q
V V n
n C
]
· + −
]
]
Derating factor is given as
( ) 1 max
1
S
s D
V
DRF
n V
· −
PROBLEM
1. Ten thyrisors are used in a string to withstand a DC voltage of
15
S
V kV ·
. The
maximum leakage current and recovery charges of Thyristors are 10mA and
150µ sec respectively. Each thyristor has a voltage sharing resistance of R=56kΩ
and capacitance
1
0.5 C F µ ·
. Determine
a. Maximum steady state voltage sharing
( ) max DS
V
.
b. Steady state voltage derating factor (DRF).
c. Maximum transient voltage sharing.
d. Transient voltage derating factor.
123
Solution

( )
( ) ( )
max
1 1
. 2004
S s D S s
DS
s s
V n I R V n
Q
V V
n n C
+ − ∆ + − ]

· · ·
]
]

( ) max
1
25.15%
S
s DT
V
DRF
n V

· ·

15.25%
Transient
DRF ·
• Transient voltage sharing = 1770V.
PARALLEL OPERATION OF SCRS.
Parallel operation is used whenever current required by the load is more than the
capability of the single SCRs.
In parallel operation, if one SCR carriers more current than the other SCRs, it will result
in a greater junction temperature which results in a decrease in the dynamic resistance
which has a cumulative effect of increasing the current further. This may lead to the
thermal runaway and finally damage the SCR. If one SCR is damaged, the load connected
may also be damaged. When SCRs are operated in parallel, it should be ensured that they
operated at the same temperature. This is done by mounting all the Thyristors on one
common heat sink.
It is also important that for parallel connection, sharing of current is ensured. This could
be done by connecting a small resistance in series. Unequal current distribution is
overcome by magnetic coupling of parallel paths as shown. If current through
1
T
increase,
a voltage of opposite polarity will be induced in the windings of thyristor
2
T
and
impedance through paths of
2
T
will be reduced, thereby increasing current flow through
2
T
.
124
THYRISTOR TYPES
Thyristors are manufactured almost exclusively by diffusion. The anode current requires a
finite time to propagate to the whole area of the junction, from the point near the gate
when the gate signal is initiated for turning on the thyristor. The manufacturers use
various gate structures to control the / di dt , turn-on time, and turn-off time. Depending on
the physical construction, and turn-on and turn-off behaviour, Thyristors can, broadly, be
classified into nine categories.
• Phase-control Thyristors (SCR’s).
• Fast-switching Thyristors (SCR’s).
• Gate-turn-off Thyristors (GTOs).
• Bidirectional triode Thyristors (TRIACs).
• Reverse-conducting Thyristors (RCTs).
• Static induction Thyristors (SITHs).
• Light-activated silicon-controlled rectifiers (LASCRs).
• FET controlled Thyristors (FET-CTHs).
• MOS controlled Thyristors (MCTs).
PHASE-CONTROL THYRISTORS
Fig.: Amplifying gate thyristor
This type of Thyristors generally operates at the line frequency and is turned off by
natural commutation. The turn-off time
q
t
is of the order of 50 to 100µ sec. This is most
suited for low-speed switching applications and is also known as converter thyristor.
Since a thyristor is basically silicon made controlled device, it is also known as silicon
controlled rectifier (SCR).
The on-state voltage,
T
V
, varies typically from about 1.15V for 600V to 2.5V for 4000V
devices; and for a 5000A 1200V thyristor it is typically 1.25V. The modern Thyristors
use an amplifying gate, where an auxiliary thyristor
A
T
is gated on by a gate signal and
then the amplified output of
A
T
is applied as a gate signal to the main thyristor
M
T
. This
is shown in the figure below. The amplifying gate permits high dynamic characteristics
125
with typical / dv dt of 1000V/µ sec and the / di dt of 500A/µ sec and simplifies the
circuit design by reducing or minimizing / di dt limiting inductor and / dv dt protection
circuits.
FAST SWITCHING THYRISTORS
These are used in high-speed switching applications with forced commutation. They have
fast turn-off time, generally in the rage 5 to 50µ sec, depending on the voltage range. The
on-state forward drop varies approximately as an inverse function of the turn-off time
q
t
.
This type of thyristor is also known as inverter thyristor.
These Thyristors have high / dv dt of typically 1000 V/µ sec & / di dt of 1000
A/µ sec. The fast turn-off and high / di dt are very important to reduce the size and
weight of commutating and or reactive circuit components. The on-state voltage of a
2200A, 1800V thyristor is typically 1.7V. Inverter Thyristors with a very limited reverse
blocking capability, typically 10V and a very fast turn-off time between 3 and 5µ sec are
commonly known as asymmetrical Thyristors (ASCRs).
GATE TURN-OFF THYRISTORS
A gate-turn-off thyristor (GTO) like an SCR can be turned on by applying a positive gate
signal. However, it can be turned off by a negative gate signal. A GTO is a latching
device and can be built with current and voltage ratings similar to those of an SCR. A
GTO is turned on by applying a short positive pulse and turned off by a short negative
pulse to its gate. The GTOs have advantages over SCRs.
• Elimination of commutating components in forced commutation, resulting in
reduction in cost, weight, and volume.
• Reduction in acoustic and electro-magnetic noise due to the elimination of
commutation chokes.
• Faster turn-off permitting high switching frequencies and
• Improved efficiency of converters.
126
In low power applications GTOs have the following advantages over bipolar transistors.
• A higher blocking voltage capability.
• A high ratio of peak controllable current to average current.
• A high ratio of surge peak current to average current, typically 10:1.
• A high on-state gain (anode current/gate current), typically 600; and
• A pulsed gate signal of short duration.
Under surge conditions, a GTO goes into deeper saturation due to regenerative action. On
the other hand, a bipolar transistor tends to come out of saturation.
A GTO has low gain during turn-off, typically 6, and requires a relatively high negative
current pulse to turn off. It has higher on-state voltage than that of SCRs. The on-state
voltage of typical 550A, 1200V GTO is typically 3.4V.
Controllable peak on-state current
TGQ
I
is the peak value of on-state current which can
be turned off by gate control. The off state voltage is reapplied immediately after turn-off
and the reapplied dv dt is only limited by the snubber capacitance. Once a GTO is turned
off, the load current
L
I
, which is diverted through and charges the snubber capacitor,
determines the reapplied dv dt .
L
s
I dv
dt C
·
Where
s
C
is the snubber capacitance
BIDIRECTIONAL TRIODE THYRISTORS
A TRIAC conducts in both directions unlike the SCR. Since it conducts in both
directions, the terminals are named as MT1 and MT2 and the Gate. As seen from the
diagram the gate ‘G’ is near terminal MT1. The cross hatched strip shows that ‘G’ is
connected to
3
n
as well as
2
p
. Similarly terminal MT1 is connected to
2
p
as well as
2
n
and terminal MT2 is connected to join
1
p
and
4
n
.

Fig.: Triac Structure
127
Fig.: Triac Symbol
With no signal to the gate the triac will block both half cycles of the applied AC voltage
in case the peak value of this voltage is less than the breakover voltage in either direction.
However the triac can be turned on by applying a positive voltage with respect to terminal
MT1. For convenience sake MT1 is taken as the reference terminal. There are four modes
of operation of the triac.
Fig.: V-I Characteristics of TRIAC
128
OPERATION
MODE (I): MT2 POSITIVE, GATE POSITIVE
When gate current is positive with respect to MT1, gate current mainly flows through
2 2
p n
junction like in ordinary SCR. When the gate current has injected sufficient charge
into the
2
p
layer the traic starts conducting through
1 1 2 2
p n p n
layers. This shows that
when MT2 and gate are positive with respect to MT1 triac acts like a conventional
thyristor. The quadrant of operation is the first quadrant.
MODE (II): MT2 POSITIVE, GATE NEGATIVE
When gate terminal is negative with respect to MT1 gate current flows through
2 3
p n

junction and forward biases this junction. As a result the triac starts conducting through
1 1 2 3
p n p n
initially. With the conduction of
1 1 2 3
p n p n
the voltage drop across this path falls
but the potential of layer between
2 3
p n
rises towards the anode potential of MT2. As the
right hand portion of
2
p
is clamped at cathode potential of MT1 a potential gradient exists
across layer
2
p
. Its left hand side being at a higher potential than its right hand side a
current is thus established in layer
2
p
from left to right which forward bias the
2 2
p n

junction and finally the main structure
1 1 2 2
p n p n
begins to conduct. The structure of
1 1 2 3
p n p n
may be regarded as an auxiliary SCR and the structure
1 1 2 2
p n p n
as the main
SCR. It can be stated that the anode current of the auxiliary SCR serves as the gate
current of the main SCR. This mode of operation is less sensitive as compared to the
previous mode since more gate current is required.

129
P
1
N
1
N
2
P
2
I g
I g
M T
2
( + )
M T
1
( ) −
G
V
( + )
MODE (III): MT2 NEGATIVE, GATE POSITIVE
The gate current
G
I
forward bias
2 2
p n
junction. Layer
2
n
injects negative electrons ( )
e s

into the
2
p
layer as shown . With
2
n
layer acting as a remote gate the structure
2 1 1 4
p n p n
eventually turns on. As usual the current after conduction is limited by the external load.
Since in this mode the triac is turned on by a remote gate
2
n
, the device is less sensitive
in the III quadrant with positive gate current.
MODE (IV): MT2 NEGATIVE, GATE NEGATIVE
In this mode the layer
3
n
acts as a remote gate. The gate current forward bias the
3 2
n p

junction. Finally the structure
2 1 1 4
p n p n
is turned on. Though the triac is turned on by a
remote gate
3
n
yet the device is more sensitive in this mode.
130
P
1
N
1
N
2
N
3
P
2
I g
M T
2
( + )
M T
1
( ) −
G
V
F i n a l
c o n d u c t i o n
I n i t i a l
c o n d u c t i o n
P
1
N
1
N
4
N
2
P
2
I g
M T
2
( ) −
M T
1
( + )
G
( + )
CONCLUSION
We can conclude that the sensitivity of the triac is greatest in first quadrant and third
quadrant. Thus the triac is rarely operated in the first quadrant with negative gate current
and in the third quadrant with positive gate current.
As the two conducting paths from MT1 to MT2 or from MT2 to MT1 interact
with each other in the structure of the traic, voltage, current and frequency ratings are
much lower as compared to conventional Thyristors. The maximum ratings are around
1200V, 300A.
APPLICATIONS
Triacs are used in heat control and for speed controls of small single phase series and
induction motors.
REVERSE CONDUCTING THYRISTORS
In many choppers and inverter circuits, an antiparallel diode is connected across an SCR
in order to allow a reverse current flow due to inductive load and to improve the turn-off
requirement of commutation circuit. The diode clamps the reverse blocking voltage of the
SCR to 1 or 2V under steady state conditions. However, under transient conditions, the
reverse voltage may rise to 30V due to inducted voltage in the circuit stray inductance
within the device.
131
P
1
N
1
N
4
P
2
I g
M T
2
( ) −
M T
1
( + )
N
3
G
( - )
An RCT is a compromise between the device characteristics and circuit requirement; and
it may be considered as a thyristor with a built-in antiparallel diode. An RCT is also
called an asymmetrical thyristor (ASCR). The forward blocking voltage varies from 400
to 2000V and the current rating goes up to 500A. The reverse blocking voltage is
typically 30 to 40V. Since the ratio of forward current through the thyristor to the reverse
current of diode is fixed for a given device, their applications will be limited to specific
circuit designs.
STATIC INDUCTION THYRISTORS
The characteristics of SITH are similar to those of a MOSFET. A SITH is normally
turned on by applying a positive gate voltage like normal Thyristors and is turned off by
application of negative voltage to its gate. A SITH is a minority carrier device. As a
result, SITH has low on-state resistance or voltage drop and it can be made with higher
voltage and current ratings.
A SITH has fast switching speeds and high dv dt and di dt capabilities. The switching
time is on the order of 1 to 6µ sec. The voltage rating can go upto 2500V and the current
rating is limited to 500A. This device is extremely process sensitive, and small
perturbations in the manufacturing process would produce major changes in the device
characteristics.
LIGHT-ACTIVATED SILICON CONTROLLED
RECTIFIERS
This device is turned on by direct radiation on the silicon wafer with light. Electron-hole
pairs which are created due to the radiation produce triggering current under the influence
of electric field. The gate structure is designed to provide sufficient gate sensitivity for
triggering from practical light source.
The LASACRs are used in high voltage and high current applications (e.g., high-voltage
dc (HVDC) transmission and static reactive power or volt-ampere reactive (VAR)
compensation). A LASCR offers complete electrical isolation between the light-triggering
source and the switching device of power converter, which floats at a potential of as high
as a few hundred kilovolts. The voltage rating of a LASCR could be as high as 4kV at
1500A with light-triggering power of less than 100mW. The typical di dt is 250 A/µ sec
and the dv dt could be as high as 2000 V/µ sec.
FET CONTROLLED THYRISTORS
A FET-CTH device combines a MOSFET and a thyristor in parallel is as shown in figure.
If a sufficient voltage is applied to the gate of the MOSFET, typically 3V, a triggering
current for the thyristor is generated internally. It has a high switching speed, high di dt
and high dv dt .
132
This device can be turned on like conventional Thyristors, but it can not be turned off by
gate control. This would find applications where optical firing is to be used for providing
electrical isolation between the input or control signal and the switching device of the
power converter.
MOS-CONTROLLED THYRISTOR
A MOS controlled Thyristors or MCTs are a new devices that have recently become
commercially available. It is basically a thyristor with two MOSFETs built in the gate
structure. One MOSFET is for turning on the MCT and the other is to turn off the MCT.
There are two types P-MCT and N-MCT. They have low on-state losses and large current
capabilities of Thyristors with the advantages of MOSFET controlled turn-on and turn-off
and relatively fast switching speeds.
The figure shows a single cell of MCT. Several thousands of such cells are fabricated
integrally on the same silicon wafer and all cells are connected electrically in parallel.
The thyristor portion of the device has the same structure as a conventional thyristor. The
NPNP structure is represented by two transistors, one NPN and the other a PNP
transistor. The MOS gate structure is represented a p-channel MOSFET M
1
which is the
ON FET and n -channel MOSFET M
2

which is the OFF FET.
Operation
133
O N - F E T
O F F - F E T
A n o d e
G a t e ( G )
C a t h o d e
D
n
+
n
n
n
p
p
+
Q 2
Q 1
p
-
n
+
p
-
M 1
S
D
S
M 2
The equivalent circuit of a p-MCT is shown due to NPNP structure rather than PNPN
structure of a normal SCR the anode serves as the reference terminal with respect to
which all gate signals are applied. Let MCT be in its forward blocking state and a
negative signal
GA
V
is applied. Then a p-channel is formed in the n-doped material of the
p-channel MOSFET
1
M
which causes holes to flow laterally from p

layer to the p
layer. This carrier movement causes transistor
1
Q
to turn-on. This in turn turns ON
transistor
2
Q
since the collector of
1
Q
is connected to the base of
2
Q
. Positive feedback
and regeneration between the two transistors takes place just like in a conventional
thyristor and hence MCT turns-on.
With the application of positive voltage applied between gate and anode an n-channel is
formed in the p-region of the n-channel MOSFET
2
M
. Now current flow is established
between the n and n
+
layer through the n-channel formed. Due to this the n-channel OFF
FET shorts out the base emitter junction of the PNP transistor and thus
2
Q
transistor is
turned off. This results in MCT returning to its blocking state.
The MCT can be operated as a gate controlled device if its current is less than the peak
controllable current. Attempting to turn off the MCT at currents higher than its rated
controllable current may result in destroying the device. For higher values of current, the
MCT has to be commutated off like a standard SCR. The gate pulse widths are not critical
for smaller device currents. For larger currents, the width of the turn-off pulse should be
larger. Moreover, the gate draws a peak current during turn-off. In many applications,
including inverters and choppers, a continuous gate pulse over the entire on/off period is
required to avoid state ambiguity.
An MCT has
• A low forward voltage drop during conduction.
• A fast turn-on time, typically 0.4µ sec and a fast turn-off time, typically
1.25µ sec for an MCT of 300A, 500V.
• Low switching losses.
• A low reverse voltage blocking capability and
• A high gate input impedance, which greatly simplifies the drive circuits. It
can be effectively paralleled to switch high currents with only modest
deratings of the per-device current rating. It cannot easily be driven from a
pulse transformer if a continuous bias is required to avoid state ambiguity.
134

refrigerators, regulators, RF amplifiers, security systems, servo systems, sewing machines, solar power supplies, solid-state contactors, solid-state relays, static circuit breakers, static relays, steel mills, synchronous motor starting, TV circuits, temperature controls, timers and toys, traffic signal controls, trains, TV deflection circuits, ultrasonic generators, UPS, vacuum cleaners, VAR compensation, vending machines, VLF transmitters, voltage regulators, washing machines, welding equipment.

POWER ELECTRONIC APPLICATIONS
COMMERCIAL APPLICATIONS
Heating Systems Ventilating, Air Conditioners, Central Refrigeration, Lighting, Computers and Office equipments, Uninterruptible Power Supplies (UPS), Elevators, and Emergency Lamps.

DOMESTIC APPLICATIONS
Cooking Equipments, Lighting, Heating, Air Conditioners, Refrigerators & Freezers, Personal Computers, Entertainment Equipments, UPS.

INDUSTRIAL APPLICATIONS
Pumps, compressors, blowers and fans. Machine tools, arc furnaces, induction furnaces, lighting control circuits, industrial lasers, induction heating, welding equipments.

AEROSPACE APPLICATIONS
Space shuttle power supply systems, satellite power systems, aircraft power systems.

TELECOMMUNICATIONS
Battery chargers, power supplies (DC and UPS), mobile cell phone battery chargers.

TRANSPORTATION
Traction control of electric vehicles, battery chargers for electric vehicles, electric locomotives, street cars, trolley buses, automobile electronics including engine controls.

UTILITY SYSTEMS
High voltage DC transmission (HVDC), static VAR compensation (SVC), Alternative energy sources (wind, photovoltaic), fuel cells, energy storage systems, induced draft fans and boiler feed water pumps.

POWER SEMICONDUCTOR DEVICES
• • • • • Power Diodes. Power Transistors (BJT’s). Power MOSFETS. IGBT’s. Thyristors

2

Thyristors are a family of p-n-p-n structured power semiconductor switching devices • SCR’s (Silicon Controlled Rectifier) The silicon controlled rectifier is the most commonly and widely used member of the thyristor family. The family of thyristor devices include SCR’s, Diacs, Triacs, SCS, SUS, LASCR’s and so on.

POWER SEMICONDUCTOR DEVICES USED IN POWER ELECTRONICS
The first thyristor or the SCR was developed in 1957. The conventional Thyristors (SCR’s) were exclusively used for power control in industrial applications until 1970. After 1970, various types of power semiconductor devices were developed and became commercially available. The power semiconductor devices can be divided broadly into five types • • • • • • • • • • • • • • Power Diodes. Thyristors. Power BJT’s. Power MOSFET’s. Insulated Gate Bipolar Transistors (IGBT’s). Static Induction Transistors (SIT’s). Forced-commutated Thyristors (Inverter grade Thyristors) Line-commutated Thyristors (converter-grade Thyristors) Gate-turn off Thyristors (GTO). Reverse conducting Thyristors (RCT’s). Static Induction Thyristors (SITH). Gate assisted turn-off Thyristors (GATT). Light activated silicon controlled rectifier (LASCR) or Photo SCR’s. MOS-Controlled Thyristors (MCT’s).

The Thyristors can be subdivided into different types

POWER DIODES
Power diodes are made of silicon p-n junction with two terminals, anode and cathode. P-N junction is formed by alloying, diffusion and epitaxial growth. Modern techniques in diffusion and epitaxial processes permit desired device characteristics. The diodes have the following advantages • • High mechanical and thermal reliability High peak inverse voltage

3

I A K L R + − R e v e r s e e a k a g e C T T u 2 1 r r e n t V DYNAMIC CHARACTERISTICS OF POWER SWITCHING DIODES At low frequency and low current. the dynamic characteristics plays an important role because it increases power loss and gives rise to large voltage spikes which may damage the device if proper protection is not given to the device. Diode is forward biased when anode is made positive with respect to the cathode. the diode may be assumed to act as a perfect switch and the dynamic characteristics (turn on & turn off characteristics) are not very important. Diode conducts fully when the diode voltage is more than the cut-in voltage (0. When reverse biased.• • • • Low reverse current Low forward voltage drop High efficiency Compactness. Conducting diode will have a small voltage drop across it. a small reverse current known as leakage current flows. This leakage current increases with increase in magnitude of reverse voltage until avalanche voltage is reached (breakdown voltage). But at high frequency and high current. V T 1 T 2 4 .7 V for Si). Diode is reverse biased when cathode is made positive with respect to anode.

t . (d) the diode current.. trr has 2 components.+ I V i + V V V i F R L 0 t1 t . This time is called the reverse recovery time.VR ( e ) Fig: Storage & Transition Times during the Diode Switching REVERSE RECOVERY CHARACTERISTIC Reverse recovery characteristic is much more important than forward recovery characteristics because it adds recovery losses to the forward loss. Current when diode is forward biased is due to net effect of majority and minority carriers. (e) the diode voltage. t1 is as a result of charge storage in the depletion region of the junction i. t2 is as a result of charge storage in the bulk semi-conductor material.VR ( b ) The waveform in (a) Simple diode circuit. t ( d ) F o r w a r M i n o r it y d c a r r i e r b i a s s t o r a sg e .e. The minority carriers take some time to recombine with opposite charges and to be neutralized. . (c) The excess-carrier density at the junction. When diode is in forward conduction mode and then its forward current is reduced to zero (by applying reverse voltage) the diode continues to conduct due to minority carriers which remains stored in the p-n junction and in the bulk of semi-conductor material. The reverse recovery time (trr) is measured from the initial zero crossing of the diode current to 25% of maximum reverse current I rr. it is the time between the zero crossing and the peak reverse current I rr. trr = t1 + t2 I RR = t1 di ( dt ) 5 . t1 and t2. (b)Input waveform applied to the diode circuit in (a).pn 0 a t j u n c t io n 0 n p t ( C ) I IF ≈ VF R L 0 I0 t −IR ≈ −V R R L V 0 t1 t2 t T r a n s it io n i n t e r vt a l .

g. High speed (fast recovery) diodes. They are used in low speed (frequency) applications. rate of fall of forward current and the magnitude of forward current prior to commutation (turning off).IF t1 tr r t2 0 . The forward recovery time limits the rate of rise of forward current and the switching speed. diode rectifiers and converters for a low input frequency upto 1 KHz. But a certain time known as forward recovery time (turn-ON time) is required before all the majority carriers over the whole junction can contribute to current flow. line commutated converters. Then application of forward voltage would force the diode to carry current in the forward direction. GENERAL PURPOSE DIODES The diodes have high reverse recovery time of about 25 microsecs (µ sec). When diode is in reverse biased condition the flow of leakage current is due to minority carriers. Normally forward recovery time is less than the reverse recovery time. Schottky diode. Reverse recovery charge QRR . Diode ratings cover a very wide 6 . The value of reverse recovery charge QRR is determined form the area enclosed by the path of the reverse recovery current. 2 R 5R I t IR R The reverse recovery time depends on the junction temperature.. e. 1 1  1 QRR ≅  I RR t1 + IRR t2  = IRR tRR 2 2  2 ∴ QRR = 1 I RR tRR 2 POWER DIODES TYPES Power diodes can be classified as • • • General purpose diodes. is the amount of charge carriers that flow across the diode in the reverse direction due to the change of state from forward conduction to reverse blocking condition.

Power diodes of high current rating are available in • • Stud or stud-mounted type. lower junction temperature and reduced di dt . Current ratings vary from about 1 to 300 A. The fast recovery diodes are essential for high frequency switching of power converters. 1000A. Epitaxial diodes have a very narrow base width resulting in a fast recovery time of about 50 ns. Alloyed type rectifier diodes are used in welding power supplies. Schottky diodes have low-on-state voltage drop and very small recovery time. The forward voltage drop of a power diode is low typically 0.5V to 1. Their current ratings is from less than 1 A to hundreds of amperes with voltage ratings from 50 V to about 3 KV. The major field of applications is in electrical power conversion i.2V. in free-wheeling ac-dc and dc-ac converter circuits. When the anode voltage is greater than the cathode voltage diode conducts. For high voltage ratings greater than 400 V they are manufactured by diffusion process and the recovery time is controlled by platinum or gold diffusion. The rating of fast-recovery diodes can go upto 3000V. 300A. generally less than 5 µ s. They are most cost effective and rugged and their ratings can go upto 300A and 1KV. FAST RECOVERY DIODES The diodes have low recovery time. In a stud mounted type. For less than 400 V rating epitaxial diodes provide faster switching speeds than diffused diodes. If the cathode voltage is higher than its anode voltage then the diode is said to be reverse biased. either the anode or the cathode could be the stud. In Schottky diode there is a larger barrier for electron flow from metal to semi-conductor. The diode turns on and begins to conduct when it is forward biased. These diodes are generally manufactured by diffusion process. The leakage current is higher than a p-n junction diode. Since the metal does not have any holes there is no charge storage. Therefore a Schottky diode can switch-off faster than an ordinary p-n junction diode. The operating frequency may be as high 100-300 kHz as the device is suitable for high frequency application. decreasing the recovery time. Schottky diode is also known as hot carrier diode. 3500A. The maximum allowable voltage is about 100 V. 7 .e. A layer of metal is deposited on a thin epitaxial layer of the n-type silicon.1 and 5µ sec. When Schottky diode is forward biased free electrons on n-side gain enough energy to flow into the metal causing forward current. The leakage current increases with the voltage rating and their ratings are limited to 100V. They are mostly used in low voltage and high current dc power supplies. Use of fast recovery diodes are preferable for free-wheeling in SCR circuits because of low recovery loss. SCHOTTKY DIODES A Schottky diode has metal (aluminium) and semi-conductor junction. typically a few nanoseconds.range with current ratings less than 1 A to several thousand amps (2000 A) and with voltage ratings from 50 V to 5 KV. Disk or press pack or Hockey-pack type. General Purpose Diodes are available upto 5000V. A Schottky diode has a relatively low forward voltage drop and reverse recovery losses. The reverse recovery time varies between 0.. Hence turn-off time is very low for schottky diodes.

GTO’s are very attractive for forced commutation of converters and are available upto 4000V. light controls.1µ s to 5µ s Turn off time .4V to 0.COMPARISON BETWEEN DIFFERENT TYPES OF DIODES General Purpose Diodes Upto 5000V & 3500A Fast Recovery Diodes Upto 3000V and 1000A Schottky Diodes Upto 100V and 300A Reverse recovery time – Reverse recovery time – Reverse recovery time – High Low Extremely low. 2000A Thyristors.2V VF = 0. RCT’s are available up to 2500V. The current flow through a triac can be controlled in either direction.8V to 1. and AC switches. VF ≈ 0. 3500A. LASCR’s which are available upto 6000V. The turn-off time of high speed reverse blocking Thyristors have been improved substantially and now devices are available with tOFF = 10 to 20µ sec for a 1200V.7V to 1. RCT’s (reverse conducting Thyristors) and GATT’s (gate assisted turn-off Thyristors) are widely used for high speed switching especially in traction applications. SITH’s with rating as high as 1200V and 300A are expected to be used in medium power converters with a frequency of several hundred KHz and beyond the frequency range of GTO. They do not require any commutation circuits.6V – VF = 0. GATT’s are available upto 1200V. An MCT (MOS controlled thyristor) can be turned ON by a small negative voltage pulse on the MOS gate (with respect to its anode) and turned OFF by a small positive voltage 8 . GTO’s & SITH’s are turned ON by applying and short positive pulse to the gate and are turned off by applying short negative pulse to the gates. trr ≈ 25µ s Turn off time . For low power AC applications. AC motor controls. An RCT can be considered as a thyristor with an inverse parallel diode. 400A with a switching speed of 8µ sec. triac’s are widely used in all types of simple heat controls. GTO’s & SITH’s are self turn-off Thyristors. 1500A with a switching speed of 200µ sec to 400µ sec are suitable for high voltage power systems especially in HVDC.5V Natural or AC line commutated Thyristors are available with ratings upto 6000V. 3000A. The characteristics of triac’s are similar to two SCR’s connected in inverse parallel and having only one gate terminal. 1000A (& 400A in reverse conduction) with a switching time of 40µ sec.Low – Switching High frequency trr = a few nanoseconds Turn off time – Extremely low – Switching frequency Very high.High Switching Low frequency trr = 0.

High power bipolar transistors (high power BJT’s) are commonly used in power converters at a frequency below 10KHz and are effectively used in circuits with power ratings upto 1200V.5V to 1. 400A. except that the turn off gain is very high. 9 . It is like a GTO.pulse. That is VCE = 0.5V across collector and emitter.5V in the ON state. MCT’s are available upto 1000V and 100A. A high power BJT is normally operated as a switch in the common emitter configuration.5V to 1. The forward voltage drop of a conducting transistor (in the ON state) is in the range of 0.

The 3 terminals are base.. Power transistors are classified as follows • • • • Bi-Polar Junction Transistors (BJTs) Metal-Oxide Semi-Conductor Field Effect Transistors (MOSFETs) Insulated Gate Bi-Polar Transistors (IGBTs) Static Induction Transistors (SITs) BI-POLAR JUNCTION TRANSISTOR A Bi-Polar Junction Transistor is a 3 layer. R R B IC C IB V V V C C C 2E C 1E V C 2E IB V C C V V B E > C V 1E C E IE V B E Fig: Characteristic NPN IC IB 1 IB 2 IB 3 I B 1> B2 Transistor Fig: Input I > B3 I V C E Fig: Output / Collector Characteristics Transistors can be operated in 3 regions i. Switching speed of transistors is much higher than the thyristors. Transistors are current controlled device and to keep it in the conducting state.POWER TRANSISTORS Transistors which have high voltage and high current rating are called power transistors. 3 terminals device. Transistors are used in low to medium power applications. active and saturation. And they are extensively used in dc-dc and dc-ac converters with inverse parallel connected diodes to provide bi-directional current flow. Power transistors used as switching elements. Transistors are of 2 types.on state voltage drop. However. are operated in saturation region resulting in a low . emitter and collector. cut-off.e. It has 2 junctions’ collector-base junction (CB) and emitter-base junction (EB). common collector and common emitter. The different configurations are common base. 10 . a continuous base current is required. voltage and current ratings of power transistor are much lower than the thyristors. Common emitter configuration is generally used in switching applications. NPN and PNP transistors.

The collector current IC will gradually increase towards saturation level I C ( sat ) . Turn ton = td + tr on times is sum of td and tr . Collector current will begin to increase only when the base emitter junction is forward biased and VBE > 0. Time required for emitter current to diffuse across the base region into the collector region once the base emitter junction is forward biased. transistor acts as an amplifier (CB junction is reverse biased and EB junction is forward biased). The turn on time ton ranges from 10 to 300 ns. SWITCHING CHARACTERISTICS An important application of transistor is in switching circuits. The time taken by the collector current to rise from 10% to 90% of its final value is called rise time tr . Thus the non-conduction state is operation in the cut-off region while the conducting state is operation in the saturation region. but the collector current does not rise immediately. In saturation region the transistor acts as a closed switch and both the junctions CB and EB are forward biased. Base current is normally more than the minimum required to saturate the transistor. Fig: Switching Transistor in CE Configuration As the base voltage VB rises from 0 to VB. In the cut-off state the transistor acts as an open switch between the collector and emitter. When transistor is used as a switch it is operated either in cut-off state or in saturation state.6V. The time required for the collector current to rise to 10% of its final value is called delay time td . As a result excess minority carrier charge is stored in the base region. When the transistor is operated in saturation state it is in the conduction state. When the input voltage is reversed from VB1 to −VB 2 the base current also abruptly changes but the collector current remains constant for a short time interval t S called the storage time.In the cut-of region transistor is OFF. both junctions (EB and CB) are reverse biased. the base current rises to IB. The turn-on time depends on • • Transistor junction capacitances which prevent the transistors voltages from changing instantaneously. 11 . When the transistor is driven into the cut-off state it operates in the non-conducting state. In the active region.

e .The reverse base current helps to discharge the minority charge carries in the base region and to remove the excess stored charge form the base region. C9 . C1 I I td tr ts tf IC ( s a t ) t Switching Times of Bipolar Junction Transistor 12 . The turn off time toff is the sum of storage time and the fall time. toff = ts + t f V B1 Fig: t −V B 2 IB IB1 td tr ts tf to to = = = = n f f T u r n R i s e S t o r a F a l l T = ( t d + = ( t s + o n t i m g e i m t r) t f) d e l a y e . Once the excess stored charge is removed the baser region the base current begins to fall towards zero. The falltime t f is the time taken for the collector current to fall from 90% to 10% of I C ( sat ) . t i m e . t −IB 2 IC 0 0 .

DIAC A diac is a two terminal five layer semi-conductor bi-directional switching device. T1 and T2 are the two terminals of the device. T 1 T 2 T 1 T 2 I V R L V I R L Fig.: Diac symbol Figure above shows the symbol of diac. Diac will conduct when the voltage applied across the device terminals T1 & T2 exceeds the break over voltage.2 Figure 1.1 Fig. But once the voltage across the diac exceeds the break over voltage VB 01 the diac turns on and begins to conduct. It can conduct in both directions. When the voltage across the device is less than the break over voltage VB 01 a very small amount of current called leakage current flows through the device.: Diac Structure Fig. 1. at the same time the voltage across the diac decreases in the conduction state. During this period the device is in non-conducting or blocking mode. The device consists of two p-n-p-n sections in anti parallel as shown in figure. This explain the forward characteristics. 1. Once it starts conducting the current through diac becomes large and the device current has to be limited by connecting an external load resistance RL . T 1 T P N P N T N P N P T 1 2 2 Fig.. 13 .1 shows the circuit diagram with T1 positive with respect to T2 .

current flowing through the device increases whereas the voltage across it decreases. i.Figure 1.. Diac is mainly used for triggering triacs. I c o F n o r w a r d d u c t i o n r e g i o n V B 0 2 V B R c o n e v e r s e d u c t i o n r e g i o l o n c k V B 0 1 i n g s t a t e Fig.: Diac Characteristics 14 . Figure below shows forward and reverse characteristics of a diac.e.2 shows the circuit diagram with T2 positive with respect to T1 . The reverse characteristics obtained by varying the supply voltage are identical with the forward characteristic as the device construction is symmetrical in both the directions. In both the cases the diac exhibits negative resistance switching characteristic during conduction.

It can conduct in both directions when it is triggered into the conduction state. Figure above shows the triac symbol. : Triac Structure Fig. A triac can be operated in four different modes depending upon the polarity of the voltage on the terminal MT2 with respect to MT1 and based on the gate current polarity.TRIAC A triac is a three terminal bi-directional switching thyristor device. : Triac Symbol The gate terminal G is near the MT1 terminal. It consists of three terminals viz. MT1 and gate G. MT1 is the reference terminal to obtain the characteristics of the triac. The triac is equivalent to two SCRs connected in anti-parallel with a common gate. MT2 . Triac in this mode operates in the first-quadrant.. The characteristics of a triac is similar to that of an SCR. both in blocking and conducting states. the gate current flows through P2-N2 junction as shown in figure below. M G 1 T N 2 M P 2 2 T N 3 P N 1 2 N P 1 1 G M 1 T N P 4 1 M 2 T Fig. TRIGGERING MODES OF TRIAC MODE 1 : MT2 positive. Figure below shows the triac structure. 15 . A SCR can conduct in only one direction whereas triac can conduct in both directions. The junction P 1-N1 and P2-N2 are forward biased but junction N1-P2 is reverse biased. Positive gate current ( I + mode of operation) When MT2 and gate current are positive with respect to MT1. Once triac starts conducting the current increases and its V-I characteristics is similar to that of thyristor. When sufficient number of charge carriers are injected in P2 layer by the gate current the junction N1-P2 breakdown and triac starts conducting through P1N1P2N2 layers.

a potential gradient exists across the layer P2 with left hand region at a higher potential than the right hand region. This causes an increase in current flow through junction P2-N1. Hence. Resulting in breakdown of reverse biased junction N1-P1. As a result the potential of layer between P2-N3 rises towards the potential of MT2. The device operates in first quadrant. N2 layer injects electrons into P2 layer as shown by arrows in figure below. The junction P1-N1 and P2-N3 are forward biased but junction N1-P2 is reverse biased. Now the 16 . Negative gate current ( I − mode of operation) M (T + ) 2 P 1 I n i t i a l c o n d u c t i o Nn 1 P2 N 3 G F i n a l c o n d u c t i o N 2 n M 1 (T − ) V I g When MT2 is positive and gate G is negative with respect to MT1 the gate current flows through P2-N3 junction as shown in figure above. This results in a current flow in P2 layer from left to right. Thus.M 2 (T + ) P N I g P 1 1 2 N 2 G ( + ) I g M 1 ( T− ) V MODE 2 : MT2 positive. Now the right hand portion P1-N1 . When compared to Mode 1. forward biasing the P2N2 junction. MODE 3 : MT2 negative. the triac initially starts conducting through P1N1P2N3 layers. triac with MT2 positive and negative gate current is less sensitive and therefore requires higher gate current for triggering.P2-N2 starts conducting. Positive gate current ( III + mode of operation) When MT2 is negative and gate is positive with respect to MT1 junction P2N2 is forward biased and junction P1-N1 is reverse biased.

Triac sensitivity is greatest in the first quadrant when turned ON with positive gate current and also in third quadrant when turned ON with negative gate current.device conducts through layers P2N1P1N4 and the current starts increasing. the gate current flows through P2N3 junction as shown in figure above. Triac in this mode is less sensitive and requires higher gate current for triggering. MODE 4 : MT2 negative. which is limited by an external load. when MT2 is positive with respect to MT1 it is recommended to turn on the triac by a positive gate current. When MT2 is negative with respect to MT1 it is recommended to turn on the triac 17 . The current flows through layers P2N1P1N4. M 2 ( T− ) N P N P G ( + 2 1 1 4 N M 2 1 (T + ) ) I g The device operates in third quadrant in this mode. This results in increase in current flow across P 1N1 and the device will turn ON due to increased current in layer N 1. Layer N3 injects electrons as shown by arrows into P2 layer. (Mode 3). Negative gate current ( III − mode of operation) M 2 ( T− ) N P N N G ( + P 3 4 1 1 2 M ) I g 1 (T + ) In this mode both MT2 and gate G are negative with respect to MT1. Triac is more sensitive in this mode compared to turn ON with positive gate current.

To obtain the characteristics in the third quadrant the supply to gate and between MT2 and MT1 are reversed. 18 . V B . Therefore Mode 1 and Mode 4 are the preferred modes of operation of a triac ( I + mode and III − mode of operation are normally used). It is also used in domestic lamp dimmers and heat control circuits. and full wave AC voltage controllers.0 1 BV 0 1 M ( T+ ) . Hence its characteristics are identical in the first and third quadrant. Triac is a bidirectional switching device.G + V s T V - V + g g - - Figure below shows the V-I Characteristics of a triac.B r e a k o v e r v ↑ I V B 0 2 G 2 o l t a g ( + Ig ) 2 Ig Ig V 1 2 > Ig 2 1 → V M (− T G − ( 2 V B 0 1 ) ) Fig. TRIAC CHARACTERISTICS Figure below shows the circuit to obtain the characteristics of a triac.by negative gate current. R M R 2 L - T + M 1 I A + g + A . When gate current is increased the break over voltage decreases.: Triac Characteristic Triac is widely used to control the speed of single phase induction motors.

electrons present in the n-channel are repelled leaving positive ions. It has high input impedance. MOSFETs are of two types • • Depletion MOSFETs Enhancement MOSFETs. : n-channel depletion type MOSFET Symbol Gate to source voltage (VGS) can be either positive or negative. MOSFET is operated in two states viz. D G S O x i d n n n + M e t a l D p .t y p e s u b s t r a t e + G e l S C h a n n e Structure Fig. Switching speed of MOSFET is very high. MOSFET is a three terminal device. The three terminals are gate (G). A n-channel is diffused between drain and source. Switching time is of the order of nanoseconds. Gate is isolated from the channel by a thin silicon dioxide layer. If VGS is negative. ON STATE and OFF STATE. drain (D) and source (S). 19 . DEPLETION MOSFET Depletion type MOSFET can be either a n-channel or p-channel depletion type MOSFET.. It is a voltage controlled device requiring a small input gate voltage. This creates a depletion. Figure below shows a n-channel depletion type MOSFET. A depletion type n-channel MOSFET consists of a p-type silicon substrate with two highly doped n+ silicon for low resistance connections.POWER MOSFET Power MOSFET is a metal oxide semiconductor field effect transistor.

When gate is positive (VGS) free electrons are attracted from P-substrate and they collect near the oxide layer. VGS becomes greater than or equal to a value called threshold voltage (VT). D G S O x i d n + M e t a l D p .t y p e s u b s t r a t e n + G S e Structure Fig.t y p e s u b s t r a t e + G e l S C h a n n e Structure Fig. Enhancement type MOSFET can be either a n-channel or p-channel enhancement type MOSFET. ENHANCEMENT MOSFET Enhancement type MOSFET has no physical channel. The P-substrate extends upto the silicon dioxide layer. : n-channel enhancement type MOSFET Symbol Figure above shows a n-channel enhancement type MOSFET. 20 . When gate to source voltage. The n-substrate extends upto the silicon dioxide layer. Sufficient numbers of electrons are accumulated to form a virtual n-channel and current flows from drain to source. The two highly doped P regions act as drain and source.D G S O x i d p p p + M e t a l D n . The two P+ regions act as drain and source P-channel operation is same except that the polarities of voltages are opposite to that of n-channel. For p-channel the polarities of voltages are opposite to that of n-channel. A P-channel depletion type MOSFET consists of a n-type substrate into which highly doped p-regions and a Pchannel are diffused. Figure below shows a p-channel enhancement type of MOSFET. The two highly doped n regions act as drain and source. : P-channel depletion type MOSFET Symbol Figure above shows a p-channel depletion type MOSFET.

Saturation region (pinch-off region) and Linear region. I D is positive for n channel MOSFET . A plot of variation of I D with VDS for a given value of VGS gives the Drain characteristics or Output characteristics. Figure below shows the drain characteristic. VGS is positive for enhancement mode.D G S O x i d p + M e t a l D n . drain source voltage and gate-source voltage. 21 . VGS is negative for depletion mode. MOSFET can be operated in three regions • • • Cut-off region.t y p e s u b s t r a t e p + G S e Structure Fig. I D . : P-channel enhancement type MOSFET. D G + G S ID V S D S V + − − Fig: n-channel Depletion MOSFET n-channel Depletion type MOSFET VGS & VDS are positive. Symbol CHARACTERISTICS OF MOSFET Depletion MOSFET Figure below shows n-channel depletion type MOSFET with gate positive with respect to source. VDS and VGS are drain current.

L i n e a r r e g i o n S a t u r a t i o n r e g i o n V G V V G S 3 ID S 2 G S 1 V Fig. i. increases with increase in VDS ..: Drain Characteristic D S Figure below shows the transfer characteristic. In saturation region I D almost remains constant for any increase in VDS . Transfer characteristic gives the variation of I D with VGS for a given value of VDS . As curve extends on both sides VGS can be negative as well as positive.In the linear region I D varies linearly with VDS . I DSS is the drain current with shorted gate. ID S S ID V G S ( O F F ) V G S Fig.e.: Transfer characteristic Enhancement MOSFET D G + G S ID V S D S V + − − Fig: n-channel Enhancement MOSFET 22 . Power MOSFETs are operated in the linear region for switching actions.

L i n e a r r e g i o n S a t u r a t i o n r e g i o n V G V V G S 3 ID S 2 G S 1 V D S VGS 3 > VGS 2 > VGS 1 Fig. Figure below shows the drain characteristic.: Transfer Characteristic Figure below shows the transfer characteristic which gives the variation of I D with VGS for a given value of VDS .Enhancement type MOSFET VGS is positive for a n-channel enhancement MOSFET. Drain characteristic gives the variation of I D with VDS for a given value of VGS . VDS & I D are also positive for n channel enhancement MOSFET Figure above shows circuit to obtain characteristic of n channel enhancement type MOSFET. ID V T V G S VT = VGS ( TH ) = Gate Source Threshold Voltage Fig. : Drain Characteristic 23 .

Fall time t f is the time required for input capacitance to discharge from VGSP to threshold voltage VT . gate to drain CGD and drain to source CGS . ton = td ( on ) + tr MOSFET can be turned off by discharging capacitance CGS . 24 . Power MOSFETs are used in switched mode power supplies. 50A at a frequency range of several tens of KHz ( f max = 100 KHz ) . During the rise time tr . ∆I D ∆VGS ∆VDS ∆I D Mutual Transconductance g m = VDS = Constant . td ( off ) is the turn-off delay time required for input capacitance CGS to discharge from V1 to VGSP . Power MOSFET’s are used in high speed power converters and are available at a relatively low power rating in the range of 1000V. Output or Drain Resistance Rds = VGS = Constant . Amplification factor µ = Rds x g m Power MOSFETs are generally of enhancement type. During rise time tr drain current I D rises from zero to full on state current I D . During fall time t f drain current falls from I D to zero. During turn-on there is a turn-on delay td ( on ) .MOSFET PARAMETERS The parameters of MOSFET can be obtained from the graph as follows. It also depends on the impedance of the gate drive circuit. The switching characteristic of a power MOSFET depends on the capacitances between gate to source CGS . which is the time required for the input capacitance CGS to charge to threshold voltage level VT . CGS charges to full gate voltage VGSP and the device operate in the linear region (ON state). SWITCHING CHARACTERISTICS OF MOSFET Power MOSFETs are often used as switching devices. Figure below shows the switching waveforms of power MOSFET. • Total turn-on time.

V V G 1 t V V G 1 S T P V td tr ( o n ) td ( o tf f ) 25 .

Increase in collector to emitter voltage will result in increase of injected hole concentration and finally a forward current is established. With collector and gate voltage positive with respect to emitter the device is in forward blocking mode. a n-channel is formed in the P-region. It has high input impedance like a MOSFET and low on-state conduction losses like a BJT. When gate to emitter voltage becomes greater than the threshold voltage of IGBT. CHARACTERISTIC OF IGBT Figure below shows circuit diagram to obtain the characteristic of an IGBT. collector (C) and emitter (E). C o l l e c t o r p n n n G a t e + + + − C B e p p n + u i f f e r l a y e r G E G a t e E m i t t e r Structure Fig. An output characteristic is a plot of collector current I C versus collector to emitter voltage VCE for given values of gate to emitter voltage VGE . Its construction is same as power MOSFET except that n+ layer at the drain in a power MOSFET is replaced by P+ substrate called collector. 26 . In this state p + substrate injects holes into the epitaxial n − layer. Now device is in forward conducting state.: Insulated Gate Bipolar Transistor Symbol IGBT has three terminals gate (G). Figure below shows the basic silicon cross-section of an IGBT.INSULATED GATE BIPOLAR TRANSISTOR (IGBT) IGBT is a voltage controlled device.

Note Controlling parameter is the gate-emitter voltage VGE in IGBT.R R G V IC C S V G E V C E C C V G R G E E Fig. Figure below shows the transfer characteristic. If VGE is less than the threshold voltage VT then IGBT is in OFF state. IC V V T G E Fig. If VGE is greater than the threshold voltage VT then the IGBT is in ON state. IGBTs are used in medium power applications such as ac and dc motor drives. power supplies and solid state relays.: Circuit Diagram to Obtain Characteristics IC V V V V G G G G 4 E E E E 3 V G 4 >E V G3 >E V 2G E > V1 G E 2 1 V Fig. : Transfer Characteristic 27 . : Output Characteristics C E A plot of collector current I C versus gate-emitter voltage VGE for a given value of VCE gives the transfer characteristic.

1C E E ( o n ) tr td ( o f f ) tf t 0 0 V V t( o t( o n ) f f ) = = td td ( o n ) ( o f f ) + + r t f t E t 0 0 IC . During the turn-off time interval collector-emitter voltage rises to its final value VCE . Rise time is the time required for collector current to rise from 0. : Switching Characteristics The turn on delay time is the time required by the leakage current I CE to rise to 0. IGBT’s are voltage controlled power transistor. During the fall time t f the collector current falls from 0. V V G E G E T td V C .90 I C to 0. high current and frequencies upto 20KHz. After turn-on collector-emitter voltage VCE will be very small during the steady state conduction of the device. Turn-on time consists of delay time td ( on ) and rise time tr . Off time delay is the time during which collector current falls from I C to 0.9 I C and VGE falls to threshold voltage VGET .1 I C . 28 . the IGBT’s offer for superior drive and output characteristics when compared to BJT’s. IGBT’s are available upto 1400V. but still not quite as fast as MOSFET’s. C1 E I I td ( o f ff ) E t t Fig. IGBT’s are suitable for high voltage. C9 . 1000A.1 I C . They are faster than BJT’s.SWITCHING CHARACTERISTIC OF IGBT Figure below shows the switching characteristic of an IGBT. 9C .1 I C to its final value I C . The turn-off time consists of delay off time td ( off ) and fall time t f . where I C is the final value of collector current. 600A and 1200V.

medium power supplies. avalanche and dv capability have made power MOSFET is the ideal choice in new power electronic dt circuit designs. ON state resistance = 600mΩ = 60 x10−3 Ω . superior conduction characteristics. ON state resistance RD( ON ) = 0. 29 .3µ s ( tON ≈ tOFF ) .6mΩ . welder equipments. cutting tools. induction heating TYPICAL RATINGS OF IGBT Voltage rating = 1400V. wide SOA. POWER MOSFET’S (MAJORITY CARRIER DEVICES) Higher switching speed. Generally the switching speed of an IGBT is inferior to that of a power MOSFET. which is a positive going voltage pulse. IGBT’s Minority carrier devices. ease of drive. UPS.IGBT APPLICATIONS Medium power applications like DC and AC motor drives. Current rating = 600A.6 µ s to 1µ s ( tON ≈ tOFF ) . Switching time ≈ 0. peak current capability. Maximum operating frequency = 20KHz. solid state relays and contractors. peak current capability and ruggedness. servo controls. POWER MOSFET RATINGS Voltage rating = 500V. A MOSFET/ IGBT SWITCH MOSFET / IGBT can be used as a switch in the circuit shown above. ease of drive. Current rating = 50A. wide SOA. If a n-channel enhancement MOSFET is used then the input pulse is VGS which is the pulse applied between gate and source. Maximum operating frequency = 100KHz.4mΩ to 0. robotics. general purpose inverters. Switching time ≈ 2.

at TC = 25 C . Low ON state conduction power losses like BJT’s.IGBT (INSULATED GATE BIPOLAR TRANSISTORS) FEATURES IGBT combines the advantages of BJT’s and MOSFET’s. induction heating. VGE( TH ) = 4. servo controls. Weight Typical Value Electrical Characteristics VGE( TH ) = VTH = Gate − Emitter Threshold Voltage.5V maximum at I C = 40mA and VCE = 10V . cutting tools. VGE = 0 Gate leakage current = 0. VCE = 0 30 . I CES I GES Collector cut-off current = 2mA (maximum) at VCE = VCES . welders. at TC = 25 C . at TC = 25 C . MAXIMUM RATINGS VCES VGES IC I CM IE I EM Collector-Emitter (G-E short) voltage Gate-Emitter (C-E short) voltage 1200V ±20V . OF IGBT CM400HA-24H APPLICATIONS AC and DC motor controls.4Kg) TJ = 250 c VGE( TH ) = 6V ( Typ ) . 800A 0 2800W. By chip design and structure design.5V ( min ) to 7. DATA SHEET DETAILS OF THE IGBT MODULE CM400HA-24H . There is no secondary breakdown problem like BJT’s. robotics. 0 Collector Current (steady / average current) 400A. VCES High power switching device by Mitsubishi Semiconductors Company I C = 400 A = 1200V . Pulsed Collector Current Emitter Current Maximum Pulsed Emitter Current 800A 0 400A. general purpose inverters. numeric control. the equivalent drain to source resistance RDS is controlled to behave like that of BJT.5µ A (maximum) at VGE = VGES . PC ( max ) Maximum Collector Power Dissipation Tstorage Maximum Storage Temperature TJ Junction Temperature −400 c to 1250 c −400 c to 1500 c 400gm (0. Features of IGBT are • • • • IGBT has high input impedance like MOSFET’s. UPS.

3. tOFF = td ( OFF ) + t f = 700n sec (maximum) trr Qrr Reverse recovery time 250nsec.5V (typical).5V (maximum) td( ON ) tr Turn ON delay time 300nsec (maximum) at VCC = 600V . at VGE1 = VGE 2 = 15V . IC = 400 A . Turn ON rise time 500nsec (maximum).VCE ( sat ) Collector-Emitter saturation voltage ( TJ = 250 C .97µ c (typical). tON = 800ns ( max ) = ( td + tr ) td ( OFF ) Turn off delay time = 350nsec. tf Turn off fall time = 350nsec. CHARACTERISTICS OF THE EMITTER TO COLLECTOR FWD CM 400HA24H IGBT CHARACTERISTICS 8 0 0 6 4 0 IC A M 4 8 0 P S 3 2 0 1 6 0 V G E V G E = 1 5 V 1 2 = E 1 0 V = 9 V V 1 0 = 7 V V G 8 G E 0 2 4 V C 6 E 8 ( V o lt s ) Fig: Output Collector Characteristics 31 . VGE = 15V ) VCE ( sat ) : 2. IC = 400 A. Reverse recovery charge = 2.

THEIR SYMBOLS AND 32 .8 0 0 6 4 0 IC A M 4 8 0 P S 3 2 0 T 1 6 0 V 0 2 4 6 V G j V C E = 1 0 V T = 1 2 5 0 j = 0 2 5 C C G E 8 E ( T H ) 1 0 IC 1 2 V s V G 1 4 E C h a r a c t e r i s t ic s Fig: Transfer Characteristics POWER SEMICONDUCTOR CHARACTERISTICS DEVICES.

33 .

Once a thyristor is in a conduction mode. Figure below shows the output voltages and control characteristics of commonly used power switching devices. these voltage drops are considered negligible. there is a small voltage drop across the device.CONTROL CHARACTERISTICS OF POWER DEVICES The power semiconductor devices can be operated as switches by applying control signals to the gate terminal of Thyristors (and to the base of bi-polar transistor). the gate signal of either positive or negative magnitude has no effect. In the output voltage waveforms shown. 34 . The required output is obtained by varying the conduction time of these switching devices. When a power semiconductor device is in a normal conduction mode.

MOSFET.g. MOSFET. IGBT. BJT. MCT). GTO.: Triac. MOSFET. SITH. SIT). SIT & Diode). GTO. BJT. RCT). Unidirectional current capability (e. Controlled turn on and uncontrolled turn off (e. Bipolar voltage withstanding capability (e.: diode). SCR.g. Bidirectional current capability (e.g. IGBT. MOSFET. SIT.Fig: Control Characteristics of Power Switching Devices The power semiconductor switching devices can be classified on the basis of • • • • • • • • • Uncontrolled turn on and turn off (e. GTO.g. GTO). IGBT.g. IGBT.g. Unipolar voltage withstanding capability (e.g. BJT. BJT. SCR. MCT).g. SCR. GTO. MCT. Pulse gate requirement (e. SITH. Continuous gate signal requirement (e. SCR) Controlled turn on and off characteristics (e. 35 .g. MCT).

compression etc. the speed of the motor or the temperature etc. Very often a measuring unit or an instrumentation unit is used so as to measure and monitor the output parameters like the output voltage. • 36 . Old/conventional controllers including magnetic amplifiers. A typical block diagram of a thyristorised power converter is shown in the above figure. mercury arc rectifiers. thyratrons. Uninterruptible and stand by power supplies for critical loads such as computers. The thyristor power converter converts the available power from the source into a suitable form to run the load or the equipment. The thyristor power converter used in this case is a AC to DC power converter which converts the input AC power into DC output voltage to feed to the DC motor. rotating amplifiers. s p e e d .THYRISTORISED POWER CONTROLLERS Block diagram given below. mine winders. The available power supply is AC power supply as is often the case. ignitrons. P o w e r S o u r c e T h y r i s t o r is e d P o w e r C o n t r o l le r s L o a d E q u ip m e n t s u r e c u rre n t. The signal from the control unit is used to adjust the phase angle / trigger angle of the Thyristors in the power controller so as to vary the output voltage to the desired value. t e C C o m In p m u t a n d U o n t r o l n it M e a s u r in g U n i t Thyristorised power controllers are widely used in the industry. m p e ra t u re T o m e a v o lt a g e . The main power flow between the input power source and the load is shown by solid lines. For example the load may be a DC motor drive which requires DC voltage for its operation. The measuring unit will be provided with meters and display devices so that the output parameters can be seen and noted. resistance controllers have been replaced by thyristorised power controllers in almost all the applications. paper and textile mills. The control unit is employed to control the output of the thyristorised power converter so as to adjust the output voltage / current to the desired value to obtain optimum performance of the load or equipment. shows the system employing a thyristorised power controller. SOME IMPORTANT CONTROLLERS • APPLICATIONS OF THYRISTORISED POWER Control of AC and DC motor drives in rolling mills. ventilation fans. rotary kilns. special high tech power supplies for aircraft and space applications. cranes. the load current. traction vehicles. excavators.

Special steps are then taken for correcting the line supply power factor (by installing PF improvement apparatus). Static power compensators. High voltage supplies for electrostatic precipitators and x-ray generators. Faster dynamic response compared to the electro mechanical converters. Easy and flexibility in operation due to digital controls. homes and studios. theaters. induction heating. melting. The thyristorised AC to DC converters and AC to AC converters can operate at low power factor under some conditions. there is interference with the commutation circuits due to the power supply line harmonics and due to electromagnetic radiation. electrolysis. These harmionics adversely affect the performance of the load connected to them. Long life and reduced/minimal maintenance due to the absence of mechanical wear. In some applications example: traction. Control equipments using Thyristors are compact in size. Solid state power controllers for home/domestic appliances. Power conversion at the terminals of a HVDC transmission systems. All the thyristorised power controllers generate harmonics (unwanted frequency components) due to the switching ON and OFF of the thyristors. This leads to an increase in the cost of the equipment. The generated harmonics are injected into the supply lines and thus adversely affect the other loads/equipments connected to the supply lines.• • • • • • • • • • • • Power control in metallurgical and chemical processes using arc welding. The thyristorised power controllers have no short time over loading capacity and therefore they must be rated for maximum loading conditions. transformer tap changers and static contactors for industrial power systems. and increase in acoustic noise. there are additional power losses (harmonic power loss) torque harmonics. Special protection circuits must be employed in thyristorised power controllers in order to protect and safe guard the expensive thyristor devices. ADVANTAGES OF THYRISTORISED POWER CONTROLLERS DISADVANTAGES OF THYRISTORISED POWER CONTROLLERS • • • • • • • 37 . For example when the load are motors. Lower acoustic noise when compared to electro magnetic controllers. High efficiency due to low losses in the Thyristors. relays and contactors. etc. Illumination/light control for lighting in stages. This again adds to the system cost. arc melting. resistance heating.

LINE COMMUTATED CONVERTERS (AC TO DC CONVERTERS) + A C In p u t V o lt a g C o L in e D C m m u t a t e d V 0 o n v e rt e r O ( Q C ) u t p u t e C These are AC to DC converters. Cyclo converters (AC to AC converters at low output frequency).TYPES OF POWER CONTROLLERS CONVERTERS or THYRISTORISED POWER For the control of electric power supplied to the load or the equipment/machinery or for power conditioning the conversion of electric power from one form to other is necessary and the switching characteristic of power semiconductor devices (Thyristors) facilitate these conversions The thyristorised power converters are referred to as the static power converters and they perform the function of power conversion by converting the available input power supply in to output power of desired form. They use natural or AC line commutation of the Thyristors. Line commutated converters or AC to DC converters (controlled rectifiers) AC voltage (RMS voltage) controllers (AC to AC converters). Inverters (DC to AC converters). 38 . These are also referred to as controlled rectifiers. fixed frequency AC power supply to obtain a variable DC output voltage. The line commutated converters are AC to DC power converters. DC choppers (DC to DC converters). The line commutated converters (controlled rectifiers) are used to convert a fixed voltage. The different types of thyristor power converters are • • • • • • Diode rectifiers (uncontrolled rectifiers).

Applications Of Line Commutated Converters AC to DC power converters are widely used in • • • • Speed control of DC motor in DC drives. HVDC transmission.Fig: A Single Phase Full Wave Uncontrolled Rectifier Circuit (Diode Full Wave Rectifier) using a Center Tapped Transformer Fig: A Single Phase Full Wave Controlled Rectifier Circuit (using SCRs) using a Center Tapped Transformer Different types of line commutated AC to DC converters circuits are • • Diode rectifiers – Uncontrolled Rectifiers Controlled rectifiers using SCR’s. 39 . o Single phase controlled rectifier. o Three phase controlled rectifiers. UPS. Battery Chargers.

Speed control of fans (domestic and industrial fans). fixed voltage AC supply into variable AC voltage at the same frequency using line commutation. AC regulators (RMS voltage controllers) are mainly used for • • • Speed control of AC motor. Fig: A Single Phase AC voltage Controller Circuit (AC-AC Converter using a TRIAC) 40 . AC pumps.AC VOLTAGE REGULATORS OR RMS CONTROLLERS (AC TO AC CONVERTERS) V0 A C Vs In p u t V o l t a g fes fs VOLTAGE ( R M S ) A C V a r ia b le A C V o lt a g e R M S O / P V o lt a C o n t r o lle r fS g e The AC voltage controllers convert the constant frequency.

The cyclo converters generally produce output AC voltage at a lower output frequency. DC choppers are widely used in • • • Speed control of DC motors from a DC supply. Choppers employ forced commutation to turn off the Thyristors. CHOPPERS (DC TO DC CONVERTERS) + V0 + Vs D C C h o p p e ( d c ) V a r ia b le D C r O u t p u t V o lt a - g e The choppers are power circuits which obtain power from a fixed voltage DC supply and convert it into a variable DC voltage. 41 . Applications of cyclo converters are traction vehicles and gearless rotary kilns. DC choppers are further classified into several types depending on the direction of power flow and the type of commutation. le f0 F re q u e n c u t p u t fS y The cyclo converters convert power from a fixed voltage fixed frequency AC supply to a variable frequency and variable AC voltage at the output.CYCLO CONVERTERS (AC TO AC CONVERTERS WITH LOW OUTPUT FREQUENCY) V0 A C Vs In p u t V o l t a g fe s C C V a r ia y c lo o n v e rt e r s A C b O f0 < . They are also called as DC choppers or DC to DC converters. That is output frequency of the AC output is less than input AC supply frequency. Switching power supplies. DC drives for sub-urban traction.

Fig: A DC Chopper Circuit (DC-DC Converter) using IGBT

INVERTERS (DC TO AC CONVERTERS)

D C S u p

+ p ly C

In v e rt e r ( F o rc e d o m m u t a

O t io

A C u tp u t n )

V o

lt a

g

e

The inverters are used for converting DC power from a fixed voltage DC supply into an AC output voltage of variable frequency and fixed or variable output AC voltage. The inverters also employ force commutation method to turn off the Thyristors. Application of inverters are in • • Industrial AC drives using induction and synchronous motors. Uninterrupted power supplies (UPS system) used for computers, computer labs.

42

Fig: Single Phase DC-AC Converter (Inverter) using MOSFETS

DESIGN OF POWER ELECTRONICS CIRCUITS
The design and study of power electronic circuits involve • • • • Design and study of power circuits using Thyristors, Diodes, BJT’s or MOSFETS. Design and study of control circuits. Design and study of logic and gating circuits and associated digital circuits. Design and study of protection devices and circuits for the protection of thyristor power devices in power electronic circuits. Diode rectifiers (uncontrolled rectifiers) AC to DC converters (Controlled rectifiers) AC to AC converters (AC voltage controllers) DC to DC converters (DC choppers) DC to AC converters (Inverters) Static Switches (Thyristorized contactors)

The power electronic circuits can be classified into six types • • • • • •

PERIPHERAL EFFECTS
The power converter operations are based mainly on the switching of power semiconductor devices and as a result the power converters introduce current and voltage harmonics (unwanted AC signal components) into the supply system and on the output of the converters. These induced harmonics can cause problems of distortion of the output voltage, harmonic generation into the supply system, and interference with the communication and signaling circuits. It is normally necessary to introduce filters on the input side and output side of a power converter system so as to reduce the harmonic level to an acceptable

43

magnitude. The figure below shows the block diagram of a generalized power converter with filters added. The application of power electronics to supply the sensitive electronic loads poses a challenge on the power quality issues and raises the problems and concerns to be resolved by the researchers. The input and output quantities of power converters could be either AC or DC. Factors such as total harmonic distortion (THD), displacement factor or harmonic factor (HF), and input power factor (IPF), are measures of the quality of the waveforms. To determine these factors it is required to find the harmonic content of the waveforms. To evaluate the performance of a converter, the input and output voltages/currents of a converter are expressed in Fourier series. The quality of a power converter is judged by the quality of its voltage and current waveforms.

Fig: A General Power Converter System

The control strategy for the power converters plays an important part on the harmonic generation and the output waveform distortion and can be aimed to minimize or reduce these problems. The power converters can cause radio frequency interference due to electromagnetic radiation and the gating circuits may generate erroneous signals. This interference can be avoided by proper grounding and shielding.

44

However their voltage and current ratings are lower than those of thyristors and are therefore used in low to medium power applications. The modified structure leads to significant differences in the I-V characteristics and switching behavior between power transistors and its logic level counterpart. The transistor remains on so long as the control signal is present. These devices are used a switching devices and are operated in the saturation region resulting in low on-state voltage drop.2µ 0 T h ic k n e s s m p 1 0 1 6 c m . They are turned on when a current signal is given to base or control terminal.3 C o lle c t o r Fig.3 n + 1 0 1 9 c m .2µ 0 0 o lle c t o r r e g io n ) 2 5 µ0 m m d r if t n – 1 0 1 4 c m . Base and Collector. The switching speed of modern transistors is much higher than that of thyristors and are used extensively in dc-dc and dc-ac converters. The structure of a power transistor is as shown below C o lle c t o r B a s e n p n E m B J T i t t e r B a s e C o lle c t o r p n p E m B J T i t t e r B a s e E m it t e r 1 0 µ m n + 1 0 1 9 c m .POWER TRANSISTORS Power transistors are devices that have controlled turn-on and turn-off characteristics.3 ( C 5 0 . Power transistors are classified as follows • • • • Bipolar junction transistors(BJTs) Metal-oxide semiconductor filed-effect transistors(MOSFETs) Static Induction transistors(SITs) Insulated-gate bipolar transistors(IGBTs) BIPOLAR JUNCTION TRANSISTORS The need for a large blocking voltage in the off state and a high current carrying capability in the on state means that a power BJT must have substantially different structure than its small signal equivalent. POWER TRANSISTOR STRUCTURE If we recall the structure of conventional transistor we see a thin p-layer is sandwiched between two n-layers or vice versa to form a three terminal device with the terminals named as Emitter.3 B a s e 5 . 1: Structure of Power Transistor 45 .

The difference in the two structures is obvious. The power transistor has steady state characteristics almost similar to signal level transistors except that the V-I characteristics has a region of quasi saturation as shown by figure 4. A power transistor is a vertically oriented four layer structure of alternating p-type and ntype. however if the base thickness is small the breakdown voltage capability of the transistor is compromised. The vertical structure is preferred because it maximizes the cross sectional area and through which the current in the device is flowing. This also minimizes on-state resistance and thus power dissipation in the transistor. The doping of emitter layer and collector layer is quite large typically 10 19 cm-3. Fig 3(c) shows the output characteristics of the transistor which is a plot I C versus VCE . The characteristics shown are that for a signal level transistor. The base thickness is made as small as possible in order to have good amplification capabilities. 46 . The thickness of the drift region determines the breakdown voltage of the transistor. 2 STEADY STATE CHARACTERISTICS Figure 3(a) shows the circuit to obtain the steady state characteristics. A special layer called the collector drift region (n-) has a light doping level of 1014. Practical power transistors have their emitters and bases interleaved as narrow fingers as shown. This multiple emitter layout also reduces parasitic ohmic resistance in the base current path which reduces power dissipation in the transistor. The purpose of this arrangement is to reduce the effects of current crowding. Fig 3(b) shows the input characteristics of the transistor which is a plot of I B versus VBE . Fig.

Fig. 3: Characteristics of NPN Transistors 47 .

In the quasi saturation and hard saturation.s a t u r a t i o n H a r d S a t u r a t io n S 1 d/ R e c o n d b r e a k d o w n iC IB IB IB IB IB 0 5 IB 5 > IB 4 . the base drive is applied and transistor is said to be on. e t c . The BVCEO is the maximum collector to emitter breakdown voltage that can be sustained when base current is zero and BVCBO is the collector base breakdown voltage when the emitter is open circuited. The second breakdown shown is due to localized thermal runaway. Hence no collector current flows and transistor is off. This is explained in detail later. Hence collector current flows depending upon the load. The primary breakdown shown takes place because of avalanche breakdown of collector base junction. 4: Characteristics of NPN Power Transistors There are four regions clearly shown: Cutoff region. The power BJT is never operated in the active region (i. Active region. quasi saturation and hard saturation. 48 . Large power dissipation normally leads to primary breakdown. The BVSUS is the maximum collector to emitter voltage that can be sustained when BJT is carrying substantial collector current. The cutoff region is the area where base current is almost zero. 4 A 3 c t iv e r e g i o Pn r i m a r y b r e a k d o w n 2 1 IB = 0 B V S U S IB B IB < = 0 V C E O 0 v B V C B O C E Fig.Q u a s i. as an amplifier) it is always operated between cutoff and saturation.e.

6: Transistor Switch 49 . 5: Transfer Characteristics I E = IC + I B β = h fE = β β +1 α β= 1−α IC IB I C = β I B + ICEO α= TRANSISTOR AS A SWITCH The transistor is used as a switch therefore it is used only between saturation and cutoff. 5 we can write the following equations Fig. From fig.TRANSFER CHARACTERISTICS Fig.

VBE increases. In saturation. However the power is increased at a high value of ODF. Once the transistor is saturated.IB = VB − VBE RB RC ( VB − VBE ) RB . However VBE increases due to increased base current resulting in increased power loss. The ratio of I B to I BS is called to overdrive factor ODF.4 to 0. which can be obtained by setting VCB = 0 and VBE = VCE is given as I CM = VCC − VCE RC ∴ IBM = ICM βF If the base current is increased above I BM . The transistor saturation may be defined as the point above which any increase in the base current does not increase the collector current significantly. ( 1) VC = VCE = VCC − IC RC VC = VCC − β VCE = VCB + VBE VCB = VCE − VBE Equation (1) shows that as long as VCE > VBE the CBJ is reverse biased and transistor is in active region. This continues until the CBJ is forward biased with VBC of about 0. If the collector emitter voltage is VCE ( sat ) the collector current is I CS = I BS = VCC − VCESAT RC I CS β Normally the circuit is designed so that I B is higher that I BS . ODF = IB I BS The ratio of I CS to I B is called as forced β . The maximum collector current in the active region. the CE voltage is not reduced in relation to increase in base current.5V. the collector current remains almost constant. the transistor may be damaged due to 50 . the transistor than goes into saturation.. the collector current increases and VCE falls below VBE ... β forced = I CS IB The total power loss in the two functions is PT = VBE I B + VCE IC A high value of ODF cannot reduce the CE voltage significantly.

0 = 18. The power loss PT in the transistor. The overdrive factor ODF. The forced β f . The dc supply voltage is VCC=40V and the input voltage base circuit is VB=6V. c.07W 2.2625 A β min 8 I B = ODF × I BS = 11. The β of a bipolar transistor varies from 12 to 75.3125 + 1.5 × 11.97 + 18. The dc supply voltage is VCC=200V and the input voltage to the base circuit is VB=10V.1A 11Ω I CS 18. Find a.1 PT = 16. VCE increases resulting in increased power loss.5 = 0. VBE(sat)=1.3125 A IB = VB − VBE ( sat ) RB VB − VBE ( sat ) IB = 10 − 1.0 ×18.0V and VBE(sat)=1. c. Power loss in transistor PT 51 . If VCE(sat)=1.7Ω determine a.3125 PT = VBE I B + VCE IC (c) PT = 1. b. PROBLEMS 1.thermal runaway. The BJT is specified to have a range of 8 to 40. The forced β f. The load resistance in Re = 11Ω .6 I B 11.715Ω 11.2V. b.6V and RB=0. The load resistance is RC = 1.5V.3125 Therefore (b) Therefore RB = βf = I CS 18.1 = = 2. If VCE(sat)=1. On the other hand if the transistor is under driven ( I B < I BS ) it may operate in active region. Solution (a) Therefore Therefore I CS = I BS = VCC − VCE ( sat ) RC = 200 − 1. The value of RB that results in saturation with a overdrive factor of 5.1 = = 1.5Ω .1 = 35.

28 A 0.2 × 25.6 × 6.86 A 1. VCE ( sat ) = 1V .5 I CS 25. 52 . RC = 11Ω.032Watts (JULY / AUGUST 2004) 3.28 (c) PT = VBE I B + VCE IC PT = 1.15 A β min 12 RB = 6 − 1. Calculate forced beta.86 = = 4.28 = = 2. β f of transistor. VCC = 200V VBE ( sat ) = 1. c. b.86 = = 2.5V . VB = 10V . calculate the minimum overdrive factor (ODF).75Ω.7 VB − VBE ( sat ) (a) Therefore Forced β f = ODF = I B 6. RB = 0.6 = 6.25 + 1.86 PT = 41.11 IB 6. Obtain power loss PT in the transistor.92 I BS 2.15 I CS 25. For the transistor switch as shown in figure a.2 = 25.Solution I CS = I BS = Also IB = VCC − VCE ( sat ) RC = 40 − 1. If the manufacturers specified β is in the range of 8 to 40.

09 = = 1. which has a DC resistance of 200Ω . c.5 = 11.33 + 1. b. I CS .Solution (i) IB = VB − VBE ( sat ) RB RC = 10 − 1.33 βf = (ii) ODF = I B 11.09 = 35.01 I BS 2.085W (JAN / FEB 2005) 4.6 I B 11.26 A β min 8 I CS 18.0 ×18.75 = 200 − 1.0 = 18. A simple transistor switch is used to connect a 24V DC supply across a relay coil. Value of resistor RB . Calculate a.09 = = 2.26 (iii) PT = VBE I B + VCE IC = 1.5 ×11.33 = = 5. 53 .09 A 11 I CS = Therefore I BS = VCC − VCE ( sat ) I CS 18. Total power dissipation in the transistor that occurs during the saturation state. Sketch the device current waveform with reference to the input pulse. required to obtain over drive factor of two.33 A 0. An input pulse of 0 to 5V amplitude is applied through series base resistor RB at the base so as to turn on the transistor switch.

2 V 0 . 54 . Where L is inductive in Henry of coil and R R is resistance of coil. the current I C does not fall to zero immediately since inductor will now act as a current source. Also the current has an alternate path and now can flow through the diode. The collector current stays put at I CS till the base pulse is present. Rate of rise of collector current can be L determined by the time constant τ 1 = . current through the device cannot rise fast to the saturating level of I CS since the inductive nature of the coil opposes any change in current through it. 7 V C E ( s a t ) B E ( s a t ) v B 5 0 iC t τ= IC S L L/ R t τ= Solution iL L L/ R τ= L L/ R +f R To sketch the device current waveforms. This current will now decay at the fall to zero. Similarly once input pulse drops to zero. Once steady state value of I CS is reached the coil acts as a short circuit.+ C C V = 2 4 V 2 0 Ω0 R e la y C o il D I / P 5 V 0 R B β= V V 2 5 t o = = 1 0 0 0 .

TRANSIENT MODEL OF BJT Fig.52 + 0.119 = 6. 7: Transient Model of BJT 55 . a reverse biased p-n junction has only depletion capacitance.7 × 9. they influence turn-on and turn-off behavior of the transistor. However under transient conditions.52mA ∴ RB = VB − VBE ( sat ) IB = 5 − 0.68W SWITCHING CHARACTERISTICS A forward biased p-n junction exhibits two parallel capacitances.52 (iii) PT = VBE ( sat ) × I B + VCE ( sat ) × ICS = 0.7 = 450Ω 9.76mA β min 25 ∴ I B = ODF × I BS = 2 × 4.119 = = 4. On the other hand. a depletion layer capacitance and a diffusion capacitance.2 × 0.(i) I CS = VCC − VCE ( sat ) RC = 24 − 0. Under steady state the capacitances do not play any role.2 = 0.76 = 9.119 A 200 (ii) Value of RB I BS = I CS 0.

The higher the ODF. The collector current rises to the steady value of ICS and this time is called rise time tr. The base current is normally more than that required to saturate the transistor. Ie = IB − I CS = ODF . This extra charge which is called the saturating charge is proportional to the excess base drive. Without –IB2 the saturating charge has to be removed entirely due to recombination and the storage time ts would be longer. the greater is the amount of extra charge stored in the base. the collector current does not respond immediately.7V). 8: Switching Times of BJT Due to internal capacitances. As a result excess minority carrier charge is stored in the base region. As the voltage VB rises from zero to V1 and the base current rises to IB1. the transistor does not turn on instantly. There is a delay known as delay time td. is proportional to the excess base drive and the corresponding current Ie. This extra charge which is called the saturating charge. before any collector current flows. 56 . When the input voltage is reversed from V1 to -V2.Fig. The delay is due to the time required to charge up the BEJ to the forward bias voltage VBE(0.IBS − IBS = IBS ( ODF − 1) β Saturating charge QS = τ s I e = τ s I BS (ODF − 1) where τ s is known as the storage time constant. the reverse current –IB2 helps to discharge the base.

Once the extra charge is removed. f = 5 Khz . Determine average power loss due to collector current during ton and tn.4 µ s . For a power transistor. t f = 2 µ s . BEJ charges to the input voltage –V2 and the base current falls to zero. The various parameters of the transistor circuit are as under Vcc = 220V . Find also the peak instantaneous power loss. ∴ PROBLEMS 1. t0 = 40 µ s . VCE ( sat ) = 2V . I CS = 80 A . Figure shows that in this time ic ( t ) = ICEO and VCE ( t ) = VCC .I CEOVCC td Pd = 5 x103 × 2 ×10−3 × 220 × 0. td = 0. tn = 50µ s . typical switching waveforms are shown. Solution During delay time. I CEO = 2mA . due to collector current during turn-on time. the time limits are 0 ≤ t ≤ td .4 × 10−6 = 0.88mW During rise time 0 ≤ t ≤ tr ic ( t ) = I CS t tr   V −V   vCE ( t ) = VCC −  CC CE ( sat )  t  tr     t vCE ( t ) = VCC + VCE (sat ) − VCC   t r 57 .44W td ton = td + tr toff = ts + t f Average power loss during delay time 0 ≤ t ≤ td is given by Pd = Pd = 1 ic ( t ) vCE ( t ) dt T∫ 0 1 I CEOVCC dt T∫ 0 td Pd = f . tr = 1µ s . t s = 3µ s . Therefore instantaneous power loss during delay time is Pd ( t ) = iCVCE = ICEOVCC = 2 x10−3 x 220 = 0. tf depends on the time constant which is determined by the reverse biased BEJ capacitance.

I CS tr  CC − CC CES  3  2  t ( )  220 220 − 2  Pr = 5 x103 × 80 ×1× 10−6  − = 14. dPr ( t ) I CSVCC ICS 2t = − 2 [ VCC − VCEsat ] dt tr tr dPr ( t ) =0 dt 0= I CS 2I t VCC − CS m VCC − VCE ( sat )   tr tr 2  Therefore At t = tm .933W 3   2  Instantaneous power loss during rise time is Pr ( t ) = Pr ( t ) = I CS tr  V − V ( sat ) t VCC − CC CE tr   t  I CS I 2 tVCC − CSt VCC − VCE ( sat )   tr tr 2  Differentiating the above equation and equating it to zero will give the time tm at which instantaneous power loss during tr would be maximum. Therefore I CS 2I t Vcc = CS m VCC − VCE ( sat )   tr tr 2  trVCC = tm VCC − VCE ( sat )    2 Therefore tm = trVCC 2 VCC − VCE ( sat )    VCC tr 2 VCC − VCE ( sat )    = 220 ×1×10−6 = 0.Therefore average power loss during rise time is 1 r I CS  t Pr = ∫ t VCC + VCE ( sat ) − VCC dt T 0 tr  tr  V −V  V Pr = f .5046µ s 2 [ 200 − 2] Therefore tm = Peak instantaneous power loss Prm during rise time is obtained by substituting the value of t=tm in equation (1) we get 58 .

base current. tf is a function of capacitance and increases with IC.2 I CS VCC 2tr ICS ( VCC tr ) VCC − VCE ( sat )    Prm = − 2 2 tr 2 VCC − VCE sat  tr 4 VCC − VCE ( sat )  ( )    2 80 × 220 Prm = = 4440. td is dependent on input capacitance does not change significantly with I C .00088 + 14. VBE ( sat ) : A low value of VBE ( sat ) will decrease the power loss in the base emitter junction. Turn off time toff : The storage time ts is dependent on over drive factor and does not change significantly with IC. DC gain hFE β = VCE ( sat ) : A low value of VCE ( sat ) will reduce the on-state losses.9339W During conduction time 0 ≤ t ≤ tn iC ( t ) = ICS & vCE ( t ) = VCE ( sat ) Instantaneous power loss during tn is Pn ( t ) = iC vCE = ICS VCE ( sat ) = 80 x 2 = 160W Average power loss during conduction period is 1 n Pn = ∫ iC vCE dt = fICS VCES tn = 5 ×103 × 80 × 2 × 50 × 10−6 = 40W T 0 t PERFORMANCE PARAMETERS IC [ VCE ] : Gain is dependent on temperature. VBE ( sat ) increases with collector current and forced β . However tr increases with increase in I C . A high gain would reduce IB the values of forced β & VCE ( sat ) . current gain and junction temperature. A small value of forced β decreases the value of VCE ( sat ) . VCE ( sat ) is a function of the collector circuit.4W 4 [ 220 − 2] Total average power loss during turn-on Pon = Pd + Pr = 0.933 = 14. t s & t f 59 . Turn-on time ton : The turn-on time can be decreased by increasing the base drive for a fixed value of collector current.

60 . t f is less sensitive to negative base drive. tC is a function of collector current negative base drive. Cross-over tC : The crossover time tC is defined as the interval during which the collector voltage VCE rises from 10% of its peak off state value and collector current.can be reduced by providing negative base drive during turn-off. I C falls to 10% of its on-state value.

Since time is involved. the secondary breakdown is basically an energy dependent phenomenon. 9: FBSOA of Power BJT The dc FBSOA is shown as shaded area and the expansion of the area for pulsed operation of the BJT with shorter switching times which leads to larger FBSOA. FBSOA indicates the I c − Vce limits of the transistor and for reliable operation the transistor must not be subjected to greater power dissipation than that shown by the FBSOA curve. The SB occurs at certain combinations of voltage. Thus secondary breakdown is caused by a localized thermal runaway. The collector emitter voltage must be held to a safe level at or below a specified value of collector current. The manufacturer usually provide the FBSOA curves under specified test conditions. The manufacturer provide I c − Vce limits during reverse-biased turn off as reverse biased safe area (RBSOA). If the energy in these hot spots is sufficient the excessive localized heating may damage the transistor. Fig. a high current and high voltage must be sustained by the transistor. the average junction temperature and second breakdown limit the power handling capability of a transistor. The second break down boundary represents the maximum permissible combinations of voltage and current without getting into the region of ic − vce plane where second breakdown may occur. producing localized hot spots. The final portion of the boundary of the FBSOA is breakdown voltage limit BVCEO .Switching Limits SECOND BREAKDOWN It is a destructive phenomenon that results from the current flow to a small portion of the base. 61 . in most cases with the base-emitter junction reverse biased. FORWARD BIASED SAFE OPERATING AREA FBSOA During turn-on and on-state conditions. REVERSE BIASED SAFE OPERATING AREA RBSOA During turn-off. current and time.

10: RBSOA of a Power BJT The area encompassed by the RBSOA is some what larger than FBSOA because of the extension of the area of higher voltages than BVCEO upto BVCBO at low collector currents. Fig. 0 The maximum power dissipation in PT is specified at TC = 25 C . This operation of the transistor upto higher voltage is possible because the combination of low collector current and reverse base current has made the beta so small that break down voltage rises towards BVCBO . ω. The case temperature is The sink temperature is The ambient temperature is Tc = T j − P Tjc . 11: Thermal Equivalent Circuit of Transistor 62 . T Ts = Tc − P TCS T TA = TS − P RSA and T j − TA = P ( R jc + Rcs + RSA ) T T R jc : Thermal resistance from junction to case α 0 RCS : Thermal resistance from case to sink C ω.iC IC M V V B E ( o f f ) B E ( o f f ) < 0 = B 0 C V vC E O E B C VB O Fig. 0 RSA : Thermal resistance from sink to ambient C ω. POWER DERATING The thermal equivalent is shown. If the total average power loss is PT .

BVCEO : The maximum voltage between the collector and emitter terminal with base open circuited. BVCBO : This is the collector to base break down voltage when emitter is open circuited.BREAK DOWN VOLTAGES A break down voltage is defined as the absolute maximum voltage between two terminals with the third terminal open. BVSUS : The maximum voltage between the collector and emitter that can be sustained across the transistor when it is carrying substantial collector current. shorted or biased in either forward or reverse direction. 63 .

Turn-off Control. 12: Base Drive Current Waveform Some common types of optimizing base drive of transistor are • • • • Turn-on Control. A typical waveform for base current is shown. R1 + R2 64 .BI 2 Fig. Antisaturation Control TURN-ON CONTROL Fig. toff can be reduced by reversing base current and allowing base current peaking during turn off since increasing I B 2 decreases storage time. IB   β F can be increased to a sufficiently high value to maintain the transistor in quasisaturation region. ton can be reduced by allowing base current peaking during   I turn-on. Proportional Base Control. After turn on.BASE DRIVE CONTROL This is required to optimize the base drive of transistor. I BF = . Optimization is required to increase switching speeds. R1 R1 + R2 Capacitor voltage VC = V1 R2 . IB 1 IB IB 0 S t . 13: Base current peaking during turn-on When input voltage is turned on.  β F = CS [ forced β ]  resulting in low forces β at the beginning. the base current is limited by resistor R1 and therefore V1 − VBE V1 − VBE initial value of base current is I BO = .

If different turn-on and turn-off characteristics are required. V2 . the magnetizing current which must be much smaller than the collector current should be as small as possible. For 1 B proper operation of the circuit. There will be base current peaking during turn off. the base-emitter junction is reverse biased and C1 discharges through R2. The discharging time constant is τ 2 = R2C1 . When switch S1 is turned on a pulse current of short duration would flow through the base of transistor Q1 and Q1 is turned on into saturation. the base drive current is changed in proportion to collector current. 65 . a turn-off circuit using ( C2 . The transistor I N would latch on itself and S1 can be turned off. The turns ratio is 2 N = C I = β .Therefore  RR  τ 1 =  1 2  C1  R1 + R2  Once input voltage vB becomes zero. R3 & R4 ) may be added. The switch S1 can be implemented by a small signal transistor and additional arrangement is necessary to discharge capacitor C1 and reset the transformer core during turn-off of the power transistor. Fig: 14. The diode D1 isolates the forward base drive circuit from the reverse base drive circuit during turn off. the reverse voltage will be reduced to a steady state value. the width of base pulse must be t1 ≥ 5τ1 and off period of the pulse must be t2 ≥ 5τ 2 . a corresponding base current is induced due to transformer action. If the collector current changes due to change in load demand. Base current peaking during turn-on and turn-off PROPORTIONAL BASE CONTROL This type of control has advantages over the constant drive circuit. Once the collector current starts to flow. T t1 + t2 τ1 + τ 2 TURN-OFF CONTROL If the input voltage is changed to during turn-off the capacitor voltage VC is added to V2 as reverse voltage across the transistor.The maximum switching frequency is 1 1 0. As the capacitor C1 discharges. To allow sufficient charging and discharging time.2 fs = = = .

. The base current which is adequate to drive the transistor hard.. can be found from V −V −V I B = I1 = B D1 BE and the corresponding collector current is I C = I L = β I B . 66 .7 + . The storage time can be reduced by operating the transistor in soft saturation rather than hard saturation.Fig... Vab = VD1 + VBE Similarly Therefore Vab = VD2 + VCE VCE = VBE + VD1 − VD2 For clamping VD1 > VD2 Therefore VCE = 0. 15: Proportional base drive circuit ANTISATURATION CONTROL Fig: 16: Collector Clamping Circuit If a transistor is driven hard.. RB Writing the loop equation for the input base circuit. RC Where VCM is the clamping voltage and VCM > VCE ( sat ) . the storage time which is proportional to the base current increases and the switching speed is reduced. This can be accomplished by clamping CE voltage to a pre-determined level and the collector current VCC − VCM is given by I C = ..

due to increased VCE . DEMERITS OF BJT • • Drive circuit of BJT is complex. β I B RC > ( VCC − VBE − VD1 + VD2 ) . a fast turn-on is accomplished. whereas the switching power loss is decreased. 67 . The load resistance RC should satisfy the condition β I B > I L . At the same time. the on-state power dissipation in the transistor is increased. BJT has controlled turn-on and turn-off characteristics since base drive control is possible. However. VD1 > VD2 and this can be accomplished by connecting two or more diodes in place of D1 . The turn-on losses of a BJT are small. VCC − VCE VCC − VBE − VD1 + VD2 = and the collector current RC RC β ( I1 + IL ) with clamping is I C = β I B = β [ I1 − IC + IL ] = 1+ β The load current is I L = For clamping. It cannot be used in parallel operation due to problems of negative temperature coefficient. ADVANTAGES OF BJT’S • • • • BJT’s have high switching frequencies since their turn-on and turn-off time are low.This means that the CE voltage is raised above saturation level and there are no excess carriers in the base and storage time is reduced. The clamping action thus results a reduced collector current and almost elimination of the storage time. It has the problem of charge storage which sets a limit on switching frequencies. BJT does not require commutation circuits.

With gate reverse biased. The more the negative gate voltage is the tighter the channel becomes. The term field effect is related to the depletion layers around each p-region as shown. therefore Rin = ∞ ( ideal ) . Therefore I G = 0 .POWER MOSFETS INTRODUCTION TO FET’S FET’s use field effect for their operation. 2: Structure of FET with biasing In BJT’s we forward bias the B-E diode but in a JFET. the gate is a p-region while source and drain are n-region. they must pass through the narrow channel between the two depletion layers. Since it is similar to two diodes one is a gate source diode and the other is a gate drain diode. FET is manufactured by diffusing two areas of p-type into the n-type semiconductor as shown. we always reverse bias the gatesource diode. Each p-region is connected to a gate terminal. Since only a small reverse current can exist in the gate lead. the electrons need to flow from source to drain. Fig:1: Schematic symbol of JFET Fig. 68 . When the supply voltage VDD is applied as shown it forces free electrons to flow from source to drain.

since JFET is less sensitive to changes in the output voltage than a BJT. JFET has almost infinite input impedance but the price paid for this is loss of control over the output current.Therefore JFET acts as a voltage controlled device rather than a current controlled device. JFET CHARACTERISTICS 69 .

carrying a noticeable reduction in channel width. SHOCKLEY EQUATION The FET is a square law device and the drain current I D is given by the Shockley equation  V  I D = I DSS 1 − GS   VP  and  ID VGS = VP 1 −  I DSS  2     70 . If negative voltage is applied between gate and source the depletion region similar to those obtained with VGS = 0 are formed but at lower values of VDS . We can find two important parameters from the above characteristics • • • rds = drain to source resistance = ∆VDS . I D now maintains a saturation level I DSS . Therefore saturation level is reached earlier. After VP . the regions constant current or active region. As VDS is increased for 0 to a few volts. the current will increase as determined by ohms law. ∆I D ∆I D . amplification factor µ = rds g m . If VDS is increased to a level where the two depletion region would touch a pinch-off will result.The maximum drain current out of a JFET occurs when VGS = 0 . ∆VGS g m = transconductance of the device = The gain of the device. Between 0 volts and pinch off voltage VP is the ohmic region. As VDS approaches VP the depletion region will widen.

Fig. The gate is also connected to a metal contact surface but remains insulated from the n-channel by the SiO2 layer. 4: Structure of n-channel depletion type MOSFET 71 . There are two types of MOSFET • • Depletion type MOSFET Enhancement type MOSFET DEPLETION TYPE MOSFET CONSTRUCTION Symbol of n-channel depletion type MOSFET It consists of a highly doped p-type substrate into which two blocks of heavily doped ntype material are diffused to form a source and drain. A thin layer of SiO2 is grown over the entire surface and holes are cut in SiO2 to make contact with n-type blocks. A n-channel is formed by diffusing between source and drain. SiO2 layer results in an extremely high input impedance of the order of 1010 to 1015 Ω for this area.MOSFET MOSFET stands for metal oxide semiconductor field effect transistor.

For positive values. the negative potential will tend to pressure electrons towards the p-type substrate and attracts hole from p-type substrate. DRAIN CHARACTERISTICS TRANSFER CHARACTERISTICS 72 .OPERATION When VGS = 0V and VDS is applied and current flows from drain to source similar to JFET. Vgs . Therefore with increased negative gate voltage I D reduces. When VGS = −1V . Therefore recombination occurs and will reduce the number of free electrons in the n-channel for conduction. additional electrons from p-substrate will flow into the channel and establish new carriers which will result in an increase in drain current with positive gate voltage.

With VDS set at some positive voltage and VGS set at 0V. forming an inversion layer which results in current flow from drain to source. but the absence of a channel between the doped n-regions.ENHANCEMENT TYPE MOSFET Here current control in an n-channel device is now affected by positive gate to source voltage rather than the range of negative voltages of JFET’s and depletion type MOSFET. If VGS is constant VDS is increased. BASIC CONSTRUCTION A slab of p-type material is formed and two n-regions are formed in the substrate. The SiO2 layer is still present to isolate the gate metallic platform from the region between drain and source. The negative carriers will not be absorbed due to insulating SiO2 layer. 5: Structure of n-channel enhancement type MOSFET OPERATION If VGS = 0V and a voltage is applied between the drain and source. the absence of a nchannel will result in a current of effectively zero amperes. there are two reverse biased p-n junction between the n-doped regions and p substrate to oppose any significant flow between drain and source. 73 . The level of VGS that results in significant increase in drain current is called threshold voltage VT . However the electrons in the p-substrate will be attracted to the positive gate and accumulate in the region near the surface of the SiO2 layer. Fig. but now it is separated by a section of p-type material. If both VDS and VGS have been set at some positive voltage. then positive potential at the gate will pressure the holes in the p-substrate along the edge of SiO2 layer to leave the area and enter deeper region of p-substrate. As VGS increases the density of free carriers will increase resulting in increased level of drain current. The source and drain terminals are connected through metallic contacts to n-doped regions. the drain current will eventually reach a saturation level as occurred in JFET.

DRAIN CHARACTERISTICS TRANSFER CHARACTERISTICS 74 .

The thickness of n − layer determines the voltage blocking capability of the device.. A power MOSFET actually consists of a parallel connection of thousands of basic MOSFET cells on the same single chip of silicon. Further n + regions are diffused in the p − regions as shown. The MOSFET can be turned ‘OFF’ by removing the gate to source voltage.. an electric field is established and electrons from n − channel in the p − regions. which is then etched so as to fit metallic source and gate terminals. Thus gate has control over the conduction of the MOSFET. The paralleling of MOSFET’s is easier due to their positive temperature coefficient. The turn-on and turn-off times of MOSFET’s are very small. On the other side of n + substrate. Hence MOSFET’s are used for low power applications. losses in the MOSFET’s are substantially increased. But MOSFTS’s have high on-state resistance hence for higher currents.. On the n + substrate high resistivity n − layer is epitaxially grown..- . hence MOSFET’s are preferred in applications such as choppers and inverters. CONSTRUCTION V S i l ic o n d io x id e L o a d n + G S S o u r c e G a t e S o u r c e M e t a l n p - + . Now p − regions are diffused in the epitaxially grown n − layer.+ + + + + + + .- n + p - J3 n + V D D n n C + + n - n s u b s t r a t e p a t h M e t a l l a y e r u r r e n t D r a in Power MOSFET’s have additional features to handle larger powers.. SiO2 layer is added. Power MOSFET conduction is due to majority carriers therefore time delays caused by removal of recombination of minority carriers is removed. Since only voltage drive (gate-source) is required. When gate terminal is made positive with respect to source. n + − p − junctions are reverse biased and no current flows from drain to source. a metal layer is deposited to form the drain terminal. 75 . When gate circuit voltage is zero and VDD is present.POWER MOSFET’S Power MOSFET’s are generally of enhancement type only.. Hence they operate at very high frequencies. Therefore a current from drain to source is established.. This MOSFET is turned ‘ON’ when a voltage is applied between gate and source. the drive circuits of MOSFET are very simple.

The turn off delay time tdoff is the time required for the input capacitance to discharge from overdriving the voltage V1 to the pinch off region. The thickness of the drift region determines the breakdown voltage of MOSFET. SWITCHING CHARACTERISTICS The switching model of MOSFET’s is as shown in the figure 6(a). The turn on time td is the time that is required to charge the input capacitance to the threshold voltage level.Because of the drift region the ON state drop of MOSFET increases. As seen a parasitic BJT is formed. since emitter base is shorted to source it does not conduct. The various inter electrode capacitance of the MOSFET which cannot be ignored during high frequency switching are represented by C gs . The fall time is the time required for the input capacitance to discharge from pinch off region to the threshold voltage.6: Switching model of MOSFET 76 . The rise time tr is the gate charging time from this threshold level to the full gate voltage Vgsp . Fig. Thus basically switching ON and OFF depend on the charging time of the input gate capacitance. Cgd & Cds . The switching waveforms are as shown in figure 7 .

8: Fast turn on gate drive circuit 1 77 . RS RGVG .7: Switching waveforms and times of Power MOSFET GATE DRIVE The turn-on time can be reduced by connecting a RC circuit as shown to charge the capacitance faster. When the gate voltage is turned on. the initial charging current of the capacitance is IG = VG . ID C R 1 D G a t e S i g n a l S + V G R V R 1 + D D - R G Fig. RS + R1 + RG The steady state value of gate voltage is VGS = Where RS is the internal resistance of gate drive force.Fig.

These transistors operate in the linear region therefore minimize the delay time. If ID increases VDS reduces. This can be explained as follows • • The drain-source voltage VDS = VDD − I D RD . Thus the PNP transistor acts as a current sink and the MOSFET is quickly turned-off. Thus high speeds are achieved. Let Vin be a negative voltage and initially assume that the MOSFET is off therefore the non-inverting terminal of the op-amp is at zero potential. These transistors act as emitter followers and offer a low output impedance. Therefore the positive terminal of op-amp which is tied to the source terminal of the MOSFET feels this reduction and this reduction is transmitted to gate through the capacitor ‘C’ and the gate voltage reduces and the drain current is regulated by this reduction. The op-amp output is high therefore the NPN transistor is on and is a source of a large current since it is an emitter follower. The capacitor C helps in regulating the rate of rise and fall of the gate voltage thereby controlling the rate of rise and fall of MOSFET drain current. When Vin becomes positive the output of op-amp becomes negative the PNP transistor turns-on and the gate-source capacitor quickly discharges through the PNP transistor.C + CV C R ID D N + P N M 1 V V D D V D D + - V in S ( o n ) P N P V S V D =V D D − IDRD . V S ≈ V D Fig. This enables the gate-source capacitance Cgs to quickly charge upto the gate voltage required to turn-on the power MOSFET. A totem poll arrangement that is capable of sourcing and sinking a large current is achieved by the PNP and NPN transistors. The above circuit as low output impedance and the ability to sink and source large currents. The gate signal of the power MOSFET may be generated by an op-amp. V S =V D −V D S on b g. 78 . 8: Fast turn on gate drive circuit 2 The above circuit is used in order to achieve switching speeds of the order of 100nsec or less.

COMPARISON OF MOSFET WITH BJT • Power MOSFETS have lower switching losses but its on-resistance and conduction losses are more.. IGBT BASIC STRUCTURE AND WORKING E E m L o a d n + V G G a t e E m it t e r M e t a l S i l ic o n d io x id e it t e rG n p + . Therefore an IGBT has high input impedance like a MOSFET and low-on state power loss as in a BJT. In MOSFET secondary breakdown does not occur because it have positive temperature coefficient. Further IGBT is free from second breakdown problem present in BJT.. Power MOSFET’s in higher voltage ratings have more conduction losses. So at high frequency applications power MOSFET is the obvious choice. • • • • MOSIGT OR IGBT The metal oxide semiconductor insulated gate transistor or IGBT combines the advantages of BJT’s and MOSFET’s. 800A. Power MOSFET’s have lower ratings compared to BJT’s . If a MOSFET shares increased current initially. so current shaving resistors are necessary during parallel operation of BJT’s.... This makes parallel operation of MOSFET’s easy.- n + J3 n + p - V C C n p C + n s u b s t r a t e p a t h C p + - J2 J1 u r r e n t C M e t a l o ll e c t o r l a y e r 79 .. MOSFET has positive temperature coefficient for resistance..+ + + + + + + . But at lower operating frequencies BJT is superior. A BJT has higher switching loss bit lower conduction loss. Power MOSFET’s → 500V to 140A. its resistance increases and this increased resistance causes this current to shift to other devices in parallel.- . But BJT exhibits negative temperature coefficient which results in secondary breakdown. BJT → 1200V. A BJT is a negative temperature coefficient. it heats up faster.

An electron movement in the n − channel in turn causes substantial hole injection from p + substrate layer into the epitaxially n − layer. the substrate is now a p + layer called the collector. The three layers p + . When gate is positive with respect to positive with respect to emitter and with gate emitter voltage greater than VGSTH . The MOSFET is formed with input gate. n − as base and p as collector. Eventually a forward current is established. n − and p constitute a pnp transistor with p + as emitter. This n − channel short circuits the n − region with n + emitter regions. E G n + n + S G D n + n p n p n p p + J3 p n + n - J2 J1 s u b s t r a t e C 80 . However. emitter as source and n − region as drain. an n channel is formed as in case of power MOSFET.It is constructed virtually in the same manner as a power MOSFET. Also n − . p and n + layers constitute a npn transistor. Equivalent circuit is as shown below.

The collector of T1 is base of T2 . Therefore regenerative action takes place and large number of carriers are injected into the n − drift region. When gate drive is removed IGBT is turn-off. 9: IGBT bias circuit Static V-I characteristics ( I C versus VCE ) Same as in BJT except control is by VGE . If R1 small T1 will not conduct therefore IGBT’s are different from MOSFET’s since resistance of drift region reduces when gate drive is applied due to p + injecting region. 81 . Therefore IGBT is a voltage controlled device. Transfer Characteristics ( I C versus VGE ) Identical to that of MOSFET. Therefore T1 starts conducting. Therefore T1 will turn-off it T2 turns off. This reduces the ON-state loss of IGBT just like BJT. When gate is applied ( VGS > VGSth ) MOSFET turns on. The two pnp and npn is formed as shown. Therefore ON state IGBT is very small. IGBT is in off-state.Also p serves as collector for pnp device and also as base for npn transistor. When gate is removed the induced channel will vanish and internal MOSFET will turn-off. This gives the base drive to T1 . Structure of IGBT is such that R1 is very small. IGBT CHARACTERISTICS STATIC CHARACTERISTICS Fig. When VGE < VGET .

threshold voltage. relays and contractors. turn-on time. the transistors should be matched for gain. transconductance. 10: Parallel connection of Transistors 82 . they have lower gate drive requirements. It is very important that the series-connected transistors are turned on and off simultaneously. UPS systems. transconductance. The ratings up to 1200V. and turn-on time and turn-off time.APPLICATIONS Widely used in medium power applications such as DC and AC motor drives. SERIES AND PARALLEL OPERATION Transistors may be operated in series to increase their voltage handling capability. and turn-off time. But in practice. Fig. For equal current sharings. saturation voltage. it is not always possible to meet these requirements. Power supplies for solenoids. lower switching losses. The devices should be matched for gain. 500A. Transistors are connected in parallel if one device cannot handle the load current demand. Though IGBT’s are more expensive than BJT’s. the slowest device at turn-on and the fastest devices at turn-off will be subjected to the full voltage of the collector emitter circuit and the particular device may be destroyed due to high voltage. A reasonable amount of current sharing (45 to 55% with two transistors) can be obtained by connecting resistors in series with the emitter terminals as shown in the figure 10. Even the gate or base drive characteristics should be identical. Other wise. on state voltage.

and the current is shifted to Q2 . and a corresponding voltage of opposite polarity is induced across inductor L2 .3 + 0.2Ω .3Ω and Rs 2 = 0. Fig. Determine the drain current of each transistor and difference in current sharing it the current sharing series resistances are (a) Rs1 = 0. During current sharing.2 = 20 − 9 = 11A or ∆I = 55 − 45 = 10% 83 . whereas MOSFETS have positive temperature coefficient and parallel operation is relatively easy. its on-state resistance decreases and its current increases further.2 = 9A 0. The drain to source voltage of MOSFET M 1 is VDS 1 = 2. The inductors would generate voltage spikes and they may be expensive and bulky.5Ω . the l ( di dt ) across L1 increases. 11: Dynamic current sharing BJTs have a negative temperature coefficient. The result is low impedance path. Solution (a) I D1 + I D 2 = IT & VDS 1 + ID1 Rs1 = VDS 2 + ID 2 Rs 2 = Rs 2 ( IT − ID ) I D1 = I D1 = I D2 VDS 2 − VDS 1 + IT Rs 2 Rs1 + Rs 2 or 55% 45% 3 − 2. especially at high currents. Current sharing under dynamic conditions can be accomplished by connecting coupled inductors. If the current through Q1 rises. Two MOSFETS which are connected in parallel carry a total current of IT = 20 A . resulting in current shifting to the other devices.5V and that of MOSFET M 2 is VDS 2 = 3V .5 + 20 × 0.The resistor will help current sharing under steady state conditions. if one BJT carries more current. The MOSFET that initially draws higher current heats up faster and its on-state resistance increases. IGBTs require special care to match the characteristics due to the variations of the temperature coefficients with the collector current. PROBLEM 1. and (b) Rs1 = Rs 2 = 0.

(2) dt t f tf The conditions di dt and dv dt in equation (1) and (2) are set by the transistor switching characteristics and must be satisfied during turn on and turn off.5 + 20 × 0.5 + 0. Neglecting the delay time td and the storage time t s . and is dv Vs Vcc = = .5% di dt AND dv dt LIMITATIONS Transistors require certain turn-on and turn-off times. the typical voltage and current waveforms of a BJT switch is shown below. During turn-on.5 = 9..5 A ∆I = 52.5 = 5% 47.5 = 10. Protection circuits are normally required to keep the operating di dt and dv dt within the allowable 84 .(b) I D1 = 3 − 2. the collector rise and the di dt is di I L I cs = = dt tr tr ..5 or or 52.(1) During turn off... the collector emitter voltage must rise in relation to the fall of the collector current.5 A 0.5 − 47.5% I D 2 = 20 − 10.

The RC network across the transistor is known as the snubber circuit or snubber and limits the dv dt . because Dm will behave as short circuited.. When transistor Q1 is turned on. Let us assume that under steady state conditions the load current I L is free wheeling through diode Dm . A typical switch with di dt and dv dt protection is shown in figure (a). The inductor LS .(3) Equating equations (1) and (3) gives the value of Ls Ls = Vs tr IL ..(4) 85 . The equivalent circuit during turn on is shown in figure below The turn on di dt is di Vs = dt Ls . is sometimes called series snubber. which has negligible reverse reco`very time..limits of transistor. the collector current rises and current of diode Dm falls. with operating wave forms in figure (b). which limits the di dt ..

Due to the energy stored in Ls . 3Rs Cs = Ts = Rs = 1 3 f s Cs 1 fs ISOLATION OF GATE AND BASE DRIVES Necessity Driver circuits are operated at very low power levels. Ts is usually adequate. δ = 1 . the capacitor Cs will charge by the load current and the equivalent circuit is shown in figure (4). The discharge through the transistor can be avoided by placing resistor Rs across Cs instead of placing Rs across Ds . The capacitor voltage will appear across the transistor and the dv dt is dv I L = dt Cs I Lt f Vs . The gate and base drives are connected to power devices which operate at high power levels. The RLC circuit is normally made critically damped to avoid oscillations. The discharge current is shown in figure below. these pulses have common terminals.(6) Once the capacitor is charge to Vs ..During turn off. the freewheeling diode will turn on. which has a voltage of VG . Rs Cs = τ s should also be considered.(5) Equating equation (2) to equation (5) gives the required value of capacitance. the discharge time. For unity critical α R C = damping. with respect to terminal C ... Illustration The logic circuit generates four pulses. When choosing the value of Rs . Normally the gating circuit are digital in nature which means the signal levels are 3 to 12 volts. Cs = . cannot be connected 86 . there will be damped resonant circuit as shown in figure (5).. and equation δ = yields ω0 2 L Rs = 2 Ls Cs The capacitor Cs has to discharge through the transistor and the increase the peak current rating of the transistor. A discharge time of one third the switching period. The terminal g .

t Vg 4 0 G a t e p u l s e s D G + V V G G s ID + S R D = R L V D D G VGS = VG − I D RD 87 . therefore Vg1 should be applied between G1 & S1 of transistor Q1 . + G 3 M S 3 3 M R L 1 G S 1 G 1 1 2 3 4 g g g g 1 2 3 4 G G G L o g i c g e n e r a t o r V S G - 2 M S 2 2 M 4 G S 4 4 G C ir c u it ( a ) a r r a n g e m e n t ( b ) C L o g ic g e n e r a t V V G g 1 . Therefore there is need for isolation between logic circuit and power transistor. Vg 2 0 V V G g 3 .directly to gate terminal G .

The transformer would saturate at low switching frequency and output would be distorted. Multiple secondary windings allow simultaneous gating signals to series and parallel connected transistors.There are two ways of floating or isolating control or gate signal with respect to ground.V2 C C 0 - OPTOCOUPLERS Optocouplers combine infrared LED and a silicon photo transistor. The phototransistor require separate power supply and add to complexity and cost and weight of driver circuits. The transformer should have a very small leakage inductance and the rise time of output should be very small. The photo transistor could be a darlington pair. This limits the high frequency applications. O + 1 V g 1 p t o c o u p le r + R CV C R 2 ID R 0 3 ID 1 D G M S G 1 + V D D R 1 B Q 1 1 - R Q 3 R R D G 88 . IC R L o g i c d r iv e c i r c u i t B R Q V 1 1 C + V . • • Pulse transformers Optocouplers PULSE TRANSFORMERS Pulse transformers have one primary winding and can have one or more secondary windings. The rise and fall times of photo transistor are very small with typical values of turn on time = 2.5µ s and turn off of 300ns. The input signal is applied to ILED and the output is taken from the photo transistor.

3 1 7 . G a t e C a t h o d e n J3 J2 + 1 0 1 9 - c m p n .3 + 1 0 1 9 c m 1 0 µ 1 0 1 0 1 0 – 1 3 x 1 0 1 4 c m .5 c m .µ5 0 m 1 0 c m A n o d e Fig. They are extensively used in power electronic circuits. It was invented in the year 1957 at Bell Labs. A complete silicon wafer as large as ten centimeter in diameter may be used to make a single high power thyristor.1µ 0 0 5 0 .: Structure of a generic thyristor 89 . J 3 as shown. J 2 .3 n c m . TRIAC DIAC Gate Turn Off Thyristor (GTO) SILICON CONTROLLED RECTIFIER (SCR) Fig.: Symbol The SCR is a four layer three terminal device with junctions J1 . the anode. It has three terminals. The Different types of Thyristors are • • • • Silicon Controlled Rectifier (SCR).3 .3 m m m 3 0 . semiconductor of p-n-p-n structure with three p-n junctions. In terms of their lateral dimensions Thyristors are the largest semiconductor devices made. The approximate thickness of each layer and doping densities are as indicated in the figure. The word thyristor is coined from thyratron and transistor. cathode and the gate.THYRISTORS A thyristor is the most important type of power semiconductor devices. A thyristor is a four layer. The construction of SCR shows that the gate terminal is kept nearer the cathode.1 µ0 0 0 3 0 .3 J1 p p + 1 7 1 9 } } } } . They are operated as bi-stable switches from non-conducting to conducting state.

The anode current is limited only by the external impedance present in the circuit. Since the other junctions J1 & J 3 are already forward biased. Fig. With anode to cathode voltage VAK being small. The voltage at which this phenomenon occurs is called the forward breakdown voltage VBO . the voltage drop across it is very small. in practice.QUALITATIVE ANALYSIS When the anode is made positive with respect the cathode junctions J1 & J 3 are forward biased and junction J 2 is reverse biased. due to the applied voltage. the reverse biased junction J 2 will breakdown due to avalanche effect resulting in a large current through the device. With the application of positive gate voltage.5V. there will be free movement of carriers across all three junctions resulting in a large forward anode current. only leakage current flows through the device. Once the SCR is switched on. some of these electrons reach junction J 2 and add to the minority carrier concentration in the p-layer. typically 1 to 1. This is because the resulting gate current consists mainly of electron flow from cathode to gate. the leakage current through the junction J 2 is increased.: Simplified model of a thyristor Although an SCR can be turned on by increasing the forward voltage beyond VBO . This raises the reverse leakage current and results in breakdown of junction J 2 even though the applied forward voltage is less than the breakdown voltage VBO . the forward voltage is maintained well below VBO and the SCR is turned on by applying a positive voltage between gate and cathode. The SCR is then said to be in the forward blocking state. 90 . If VAK is further increased to a large value. Since the bottom end layer is heavily doped as compared to the p-layer. With increase in gate current breakdown occurs earlier.

In the forward direction the thyristor has two stable states or modes of operation that are connected together by an unstable mode that appears as a negative resistance on the V-I characteristics. Circuit Fig: V-I Characteristics A typical V-I characteristics of a thyristor is shown above. If a positive gate current is applied to a thyristor then the transition or break over to the on state will occur at smaller values of 91 .V-I CHARACTERISTICS RL A VA A VG G K Fig. For the forward blocking state the quantity of interest is the forward blocking voltage VBO which is defined for zero gate current. The low current high voltage region is the forward blocking state or the off state and the low voltage high current mode is the on state. In the reverse direction the thyristor appears similar to a reverse biased diode which conducts very little current until avalanche breakdown occurs.

This current is called the latching current. However once the thyristor is in the on state the gate cannot be used to turn the device off. Fig. LATCHING CURRENT IL After the SCR has switched on. there is a minimum current required to sustain conduction. Although not indicated the gate current does not have to be a dc current but instead can be a pulse of current having some minimum time duration.anode to cathode voltage as shown. The only way to turn off the thyristor is for the external circuit to force the current through the device to be less than the holding current for a minimum specified time period. 92 . the thyristor cannot maintain the current through it and reverts to its off state usually I µ is associated with turn off the device. If the anode current is reduced below the critical holding current value.: Effects on gate current on forward blocking voltage HOLDING CURRENT IH After an SCR has been switched to the on state a certain minimum value of anode current is required to maintain the thyristor in this low impedance state. This ability to switch the thyristor by means of a current pulse is the reason for wide spread applications of the device. I L associated with turn on and is usually greater than holding current.

QUANTITATIVE ANALYSIS TWO TRANSISTOR MODEL The general transistor equations are. I E 1 = I A . I C = IC2 . I C = β I B + ( 1 + β ) ICBO I C = α I E + ICBO I E = IC + I B I B = I E ( 1 − α ) − ICBO The SCR can be considered to be made up of two transistors as shown in above figure. Considering PNP transistor of the equivalent circuit. we see that ∴ ⇒ I C2 = I B1 IA = − − − ( 2) α 2 I g + ICBO1 + ICBO 2 1 − ( α1 + α 2 ) 93 . α = α1 . IC = IC1 . I E2 = IK = I A + IG I C2 = α 2 I k + ICBO2 I C2 = α 2 ( I A + IG ) + ICBO2 From the equivalent circuit. IB = IB1 ∴ I B1 = I A ( 1 − α1 ) − ICBO1 − − − ( 1) Considering NPN transistor of the equivalent circuit. I B = I B2 . ICBO = ICBO1 .

But with the existence of I C2 = β 2 I β2 = β 2 I g . SCR is also called a Lathing Device. This regeneration continues even if I g is removed this characteristic of SCR makes it suitable for pulse triggering. Initially when the applied forward voltage is small. When sufficient gate drive is applied. α 2 varies only with I A . This in turn results in a current through transistor T2 . I C1 = β1 I B1 = β1 β 2 I B2 = β1 β2 Ig . it is seen that when ( α1 + α 2 ) = 1 . resulting in ( α1 + α 2 ) → 1 . In this case. ( α1 + α 2 ) < 1 . This current in turn is connected to the base of T2 . If however the reverse leakage current is increased by increasing the applied forward voltage. the anode current I A tends towards ∞ . Case 2: With gate current I g applied. Therefore. 94 . Similarly varies with I E = I A + I g = I K . IA = 1 − ( α1 + α 2 ) I CBO1 + I CBO2 The gain α1 of transistor T1 varies with its emitter current I E = I A . Thus the base drive of T2 is increased which in turn increases the base drive of T1 . we see that I B2 = I g is established. with I g = 0 . This explains the increase in anode current for the break over voltage VB 0 . From the equation. the gains of the transistor increase.Two transistors analog is valid only till SCR reaches ON state Case 1: When I g = 0 . is established. this increases α 2 of T2 . a current through T. therefore regenerative feedback or positive feedback is established between the two transistors. This causes ( α1 + α 2 ) to tend to unity therefore the anode current begins to grow towards a large value.

The period during which the anode current rises from 10% to 90% of its peak value is called the rise time. there is no appreciable increase in the SCR anode current. The duration between 90% of the peak gate trigger pulse and the instant the forward voltage has fallen to 90% of its initial value is called the gate controlled / trigger delay time t gd . It is also defined as the duration between 90% of the gate trigger pulse and the instant at which the anode current rises to 10% of its peak value. which is because. t gd is usually in the range of 1µ sec.: Turn-on characteristics When the SCR is turned on with the application of the gate signal. the current starts rising towards the peak value.SWITCHING CHARACTERISTICS CHARACTERISTICS) THYRISTOR TURN-ON CHARACTERISTICS (DYNAMIC Fig. Once t gd has lapsed. The summation of t gd and tr gives the turn on time ton of the thyristor. It is also defined as the time for which the anode voltage falls from 90% to 10% of its peak value. the SCR does not conduct fully at the instant of application of the gate trigger pulse. 95 . In the beginning. only a small portion of the silicon pellet in the immediate vicinity of the gate electrode starts conducting.

where no neutral zero value of current exists. the SCR has a reverse recovery time trr which is due to charge storage in the junctions of the SCR. the magnitude of reverse Vg applied ad the magnitude and rate of application of the forward voltage. the turn-off time tq is the sum of the durations for which reverse recovery current flows after the application of reverse voltage and the time required for the recombination of all excess carriers present. But in DC circuits. the gate loses control over the device and the device can be brought back to the blocking state only by reducing the forward current to a level below that of the holding current. however. The turn off time for converte grade SCR’s is 50 to 100µ sec and that for inverter grade SCR’s is 10 to 20µ sec. a depletion layer develops across J 2 and the junction can now withstand the forward voltage. At the end of the turn off time. the forward current is reduced by applying a reverse voltage across anode and cathode and thus forcing the current through the SCR to zero. 96 . the current goes through a natural zero value and the device will automatically switch off. These excess carriers take some time for recombination resulting in the gate recovery time or reverse recombination time t gr . Thus. In AC circuits.THYRISTOR TURN OFF CHARACTERISTICS V A K tC tq t IA d i C o m m u t a t io n d t A n o d e c u r r e n t b e g in s t o d e c r e a s e R e c o v e rR y e c o m t1 t2 t3 t4 t5 t tq= tc= b i n a t i o n d e v i c e c ir c u it o f f o f f t im r t i mr e e tg tc r t tq When an SCR is turned on by the gate signal. As in the case of diodes. The turn off time is dependent on the anode current.

dv Triggering: Under transient conditions. If i j2 is the current throught the junction j2 and C j2 is the junction capacitance and V j2 is the voltage across j2 . we see that if 97 . Light: If light be allowed to fall on the junctions of a thyristor. Gate Triggering: Gate triggering is the method practically employed to turn-on the thyristor. it is required that the circuit off time tc be greater than SCR turn off time tq . A high value dt of charging current may damage the thyristor and the device must be protected against dv dv high .To ensure that SCR has successfully turned off . This would cause an increase in α1 & α 2 and the thyristor may turn on. Gate triggering will be discussed in detail later. LASCR: Light activated SCRs are turned on by allowing light to strike the silicon wafer. The manufacturers specify the allowable . High Voltage Triggering: This is triggering without application of gate voltage with only application of a large voltage across the anode-cathode such that it is greater than the forward breakdown voltage VBO . the capacitances of the p-n junction dt will influence the characteristics of a thyristor. THYRISTOR TURN ON • Thermal Turn on: If the temperature of the thyristor is high. This type of turn on many cause thermal run away and is usually avoided. dt dt From the above equation. there will be an increase in charge carriers which would increase the leakage current. If the thyristor is in the blocking state. a rapidly rising voltage applied across the device would cause a high current to flow through the device resulting in turn-on. charge carrier concentration would increase which may turn on the SCR. then ij 2 = C j dVJ 2 dC j2 dq2 d = C j Vj = 2 + Vj2 2 2 dt dt dt dt • • • • • ( ) dv is large. This type of turn on is destructive and should be avoided. 1 j2 will be large.

VDSM : This is the peak off state surge / non-repetitive forward voltage that will occur across the thyristor. VDRM : This is the peak repetitive off state forward voltage that the thyristor can block repeatedly in the forward direction (transient).THYRISTOR RATINGS First Subscript D → off state T → ON state F → Forward R → Reverse VOLTAGE RATINGS VDWM : This specifies the peak off state working forward voltage of the device. VRWM : This the peak reverse working voltage that the thyristor can withstand in the reverse direction. This specifies the maximum forward off state voltage which the thyristor can withstand during its working. Second Subscript W → working R → Repetitive S →Surge or non-repetitive Third Subscript M → Peak Value 98 .

This current is called the latching current. This small area of 99 . Latching current. the thyristor cannot maintain the current through it and reverts to its off state usually I µ is associated with turn off the device. If the anode current is reduced below the critical holding current value. VT : On state voltage drop and is dependent on junction temperature.VRRM : It is the peak repetitive reverse voltage. This rating occurs for transient conditions for a specified time duration. dv rating: This is the maximum rate of rise of anode voltage that the SCR has to dt dv withstand and which will not trigger the device without gate signal (refer triggering). I L : After the SCR has switched on. This is specified for a particular anode current and junction temperature. This maximum value of dt rate of rise of current is which the thyristor can withstand without destruction. When thyristor is switched on. VRSM : Peak surge reverse voltage. I L associated with turn on and is usually greater than holding current Holding current. I H : After an SCR has been switched to the on state a certain minimum value of anode current is required to maintain the thyristor in this low impedance state. conduction starts at a place near the gate. VTM : Peak on state voltage. di rating: This is a non repetitive rate of rise of on-state current. dt CURRENT RATING ITaverage : This is the on state average current which is specified at a particular temperature. ITRMS : This is the on-state RMS current. It is defined as the maximum permissible instantaneous value of repetitive applied reverse voltage that the thyristor can block in reverse direction. there is a minimum current required to sustain conduction.

dt conduction spreads rapidly and if rate of rise of anode current GATE SPECIFICATIONS I GT : This is the required gate current to trigger the SCR. 100 . to switch from off state to on state. A value below this will keep the SCR in off state. QRR : Amount of charge carriers which have to be recovered during the turn off process. local hotspots will be formed near the gate due to high current density. This is usually specified as a DC value. This causes the junction temperature to rise above the safe limit and the di SCR may be damaged permanently.di is large compared to the dt spreading velocity of carriers. UJT triggering. GATE TRIGGERING METHODS Types The different methods of gate triggering are the following • • • R-triggering. The rating is specified in A µ sec . RC triggering. Rthjc : Thermal resistance between junction and outer case of the device. VGT : This is the specified value of gate voltage to turn on the SCR (dc value). VGD : This is the value of gate voltage.

The resistor R1 limits the current through the gate of the SCR.: Resistance firing of an SCR in half wave circuit with dc load (a) No triggering of SCR (b) α = 900 (c) α < 900 101 .RESISTANCE TRIGGERING A simple resistance triggering circuit is as shown. vO L O A D a i R b 1 R 2 vS = V mω s i n D t V T R V g Fig. R2 is the variable resistance added to the circuit to achieve control over the triggering angle of SCR. The diode D is required to ensure that no negative voltage reaches the gate of the SCR. Resistor ‘R’ is a stabilizing resistor.: Resistance firing circuit V S Vm π ω i n s t 3π 4π ωt V S V 3π π 2π 4π ωt S 3π π 2π 4π ωt 2π Vg Vg t Vg Vg p = Vg t ωt Vg Vg p > Vg t Vo Vg p Vg p V g t ωt Vo ωt α ωt Vo io io 2 7 0 3π 4π 0 ωt io ωt VT ωt VT ωt VT ωt ωt α π 9 0 0 2π α= 9 0 0 ωt α< 9 0 0 ωt ( a ) ( b ) ( c ) Fig.

The waveforms shows that the load voltage is zero till 900 and the voltage across the SCR is the same as input voltage till it is triggered at 900 . Therefore. Therefore R1 ≥ Vm < I gm . When R2 is set to an optimum value such that Vgp = Vgt . R2 → optimum value. At Therefore But ω t = α . current ‘I’ flowing through the gate is very small. we need to ensure that current of the SCR. the peak gate voltage is less then Vgt since R2 is very large. the maximum gate voltage Vgm ≥ ∴ ∴ Vm R R1 + R Vgm R1 + Vgm R ≥ Vm R Vgm R1 ≥ R ( Vm − Vgm ) R≤ Vgm R1 Vm − Vgm OPERATION Case 1: Vgp < Vgt Vgp . I gm Also with R2 = 0 . we see that the SCR is triggered at 900 (since Vgp reaches its peak at 900 only). Case 2: Vgp = Vgt . Hence the SCR turns on earlier than VS reaches its peak value. VS = Vgt .Design With R2 = 0 . The waveforms as shown with respect to Vs = Vm sin ω t .Vm = Vgp ( Q Vgt = Vgp sin α ) V  α = sin −1  gt  V   gp  Vgp = Vm R R1 + R2 + R 102 . output will be in phase with input. This is because we are using only a resistive network. SCR will not turn on and therefore the load voltage is zero and vscr is equal to Vs . we need to ensure that the voltage drop across resistor ‘R’ does not exceed Vgm . R2 → small value. Case 3: Vgp > Vgt . The triggering value Vgt is reached much earlier than 900 . Therefore. where I gm is the maximum or peak gate R1 Vm .

Therefore

V ( R + R + R )  α = sin −1  gt 1 2  Vm R  

Since Vgt , R1 , R are constants αα R2

RESISTANCE CAPACITANCE TRIGGERING
RC HALF WAVE Capacitor ‘C’ in the circuit is connected to shift the phase of the gate voltage. D1 is used to prevent negative voltage from reaching the gate cathode of SCR. In the negative half cycle, the capacitor charges to the peak negative voltage of the supply ( −Vm ) through the diode D2 . The capacitor maintains this voltage across it, till the supply voltage crosses zero. As the supply becomes positive, the capacitor charges through resistor ‘R’ from initial voltage of −Vm , to a positive value. When the capacitor voltage is equal to the gate trigger voltage of the SCR, the SCR is fired and the capacitor voltage is clamped to a small positive value.
v
L O
O

A

D

+ R D
2

V 1

T

v

S

=

V mω
V

s i n
C

t
C

D

Fig.: RC half-wave trigger circuit
vs -π / 20 0 a vo α π vc a vc α 3 πωt ωt a vo 0 vT Vm α - Vm ( a ) α ωt α vc Vm Vm s in ω Vg t -π t vs / 2 0 Vm s in ω Vg t 0 a vc Vm ωt t

ωt

vT

2 π

0 α

π

- Vm ( b )

2 π ( 2π

3 π ωt + α )

Fig.: Waveforms for RC half-wave trigger circuit

(a) High value of R

(b) Low value of R

103

Case 1: R → Large. When the resistor ‘R’ is large, the time taken for the capacitance to charge from −Vm to Vgt is large, resulting in larger firing angle and lower load voltage. Case 2: R → Small When ‘R’ is set to a smaller value, the capacitor charges at a faster rate towards Vgt resulting in early triggering of SCR and hence VL is more. When the SCR triggers, the voltage drop across it falls to 1 – 1.5V. This in turn lowers, the voltage across R & C. Low voltage across the SCR during conduction period keeps the capacitor discharge during the positive half cycle.

DESIGN EQUATION
From the circuit VC = Vgt + Vd 1 . Considering the source voltage and the gate circuit, we can write vs = I gt R + VC . SCR fires when vs ≥ I gt R + VC that is vS ≥ I g R + Vgt + Vd 1 . Therefore R ≤ vs − Vgt − Vd 1 I gt . The RC time constant for zero output voltage that is

T  maximum firing angle for power frequencies is empirically gives as RC ≥ 1.3   . 2

RC FULL WAVE
A simple circuit giving full wave output is shown in figure below. In this circuit the initial voltage from which the capacitor ‘C’ charges is essentially zero. The capacitor ‘C’ is reset to this voltage by the clamping action of the thyristor gate. For this reason the charging time constant RC must be chosen longer than for half wave RC circuit in order to delay vs − Vgt 50T the triggering. The RC value is empirically chosen as RC ≥ . Also R ≤ . I gt 2
v
+ D 1 D 3 v
O

L O

A

D

+ R C V
T

d

vS

=

V mω

s i n

D

4

t
-

D

2

Fig: RC full-wave trigger circuit

104

vs

Vm

s in ω

t

vs

Vm

s in ω

t

ωt vd vc α α vd vd vc v g tv c α ωt vg t α vT

ωt

vo

vo

ωt

vT

ωt

ωt

( a )

ωt

( b )

Fig: Wave-forms for RC full-wave trigger circuit

(a) High value of R PROBLEM

(b) Low value of R

1. Design a suitable RC triggering circuit for a thyristorised network operation on a 220V, 50Hz supply. The specifications of SCR are Vgt min = 5V , I gt max = 30mA . vs − Vgt − VD Ig

R=

= 7143.3Ω

Therefore

RC ≥ 0.013

R ≤ 7.143k Ω C ≥ 1.8199 µ F

105

p o in t R E + V e B 2 p . we find that potential at A is VAB1 = VBB RB1 = ηVBB RB1 + RB 2  RB1  η =  RB1 + RB 2   η is intrinsic stand off ratio of UJT and ranges between 0. The negative resistance region of UJT is between peak point and valley point. After peak point the current increases but voltage across device drops. The peak point is the point at which peak current I P flows and the peak voltage VP is across the UJT.UNI-JUNCTION TRANSISTOR (UJT) B 2 B R B B 2 2 2 E t a . therefore number of carriers in the base region increases rapidly. base2 and emitter ‘E’. The equivalent circuit of UJT is as shown. RB1 acts as a decreasing resistance. Once VE is equal to VP ≡ ηVBE + VD .p o i n t + E t a . Between B1 and B2 UJT behaves like ordinary resistor and the internal resistances are given as RB1 and RB 2 with emitter open RB B = RB1 + RB 2 . 106 .: (a) Basic structure of UJT (b) Symbolic representation (c) Equivalent circuit UJT is an n-type silicon bar in which p-type emitter is embedded. After valley point. Resistor RB 2 is between 5 to 10KΩ . When VBB is applied across B1 and B2 . then UJT is forward biased and it conducts. Also holes have a longer life time. this is due to the fact that emitter starts to inject holes into the lower doped n-region.82. the device acts as a normal diode since the base region is saturated and RB1 does not decrease again.t y p e A R B 1 E A Ie R B 1 V B B ηV B B B 1 B 1 B 1 ( a ) ( b ) ( c ) Fig. Usually the p-region is heavily doped and n-region is lightly doped. OPERATION When voltage VBB is applied between emitter ‘E’ with base 1 B1 as reference and the emitter voltage VE is less than ( VD + ηVBE ) the UJT does not conduct. Thus potential at ‘A’ falls but current I E increases rapidly. It has three terminals base1. ( VD + ηVBB ) is designated as VP which is the value of voltage required to turn on the UJT.t y p e E n . Since p-region is heavily doped compared to n-region.51 and 0.

Since UJT exhibits negative resistance characteristics it can be used as relaxation oscillator. Ve VB B R B E 2 B1 R2 VV R1 v o Vo α1 ω t ( a ) ( b ) Fig.N V C u t o ef f r e g i o n VB B Vp e g a t iv e R e s i s t a n c e R e g i o n S a t u r a t i o n r e g i o n R lo a d l in e P o i n t P e a k V a ll e y Vv P o i n t 0 Ip Iv Ie Fig. The switching times is in the range of nanoseconds.: V-I Characteristics of UJT UJT RELAXATION OSCILLATOR UJT is highly efficient switch.: UJT oscillator (a) Connection diagram and (b) Voltage waveforms T1 T = R C Vp C a p a c i tη V r o c h a r g i n gB B T2 VP + = C a p a c it o r Vd is c h a r g in g R 1 C Vv t C Ve 107 . The circuit diagram is as shown with R1 and R2 being small compared to RB1 and RB 2 of UJT.

If R is large the capacitor takes a longer time to charge towards VP the firing angle is delayed. Using initial and final value theorem for voltage across a capacitor. The waveform for both cases is as shown below. UJT turns off. The rate of charging is τ 1 = RC . Here we assume that the period of charging of the capacitor is lot larger than than the discharging time. During this charging emitter circuit of UJT is an open circuit. Vinitial = VV . capacitor ‘C’ begins to charge through resistor ‘R’ exponentially towards VBB . The rate of charging of the capacitor will be determined by the resistor R in the circuit. V final = VBB VP = VBB + ( VV − VBB ) e −T / RC  V −V  T = RC log e  BB V   VBB − VP  VV < VBB . EXPRESSION FOR PERIOD OF OSCILLATION ‘T’ The period of oscillation of the UJT can be derived based on the voltage across the capacitor. When emitter voltage decreases to valley point Vv . Capacitor ‘C’ rapidly discharges through load resistance R1 with time constant τ 2 = R1C ( τ 2 = τ1 ) .  VBB  T = RC ln    VBB − VP     1   = RC ln  1 − VP   VBB    But VP = ηVBB + VD Therefore ⇒ If 108 . we get VC = V final + ( Vinitial − Vfinal ) e −t RC t = T . VC = VP . If R is small the capacitor charges faster towards VBB and thus reaches VP faster and the SCR is triggered at a smaller firing angle. When this capacitor voltage which is nothing but emitter voltage VE reaches the peak point VP = ηVBB + VD .OPERATION When VBB is applied. Once again the capacitor will charge towards VBB and the cycle continues. the emitter base junction is forward biased and UJT turns on.

Design the complete circuit.5mA . therefore R > . V p = ηVBB + VD Let VD = 0.66 . RB1 + RB 2 = 5k Ω . I v = 3mA . therefore R < .04 × 10−6 ln   = 11. the width of the triggering pulse t g = RB1C . leakage current = 3. Solution  1  T = RC C ln   1 − η  Here. since f = 2kHz and putting other values. this condition VBB − VP will be satisfied if VBB − I P R > VP .2V. ηVBB 1  1  = RC × 0.8 . The upper limit on ‘R’ is set by the requirement that the load line formed by ‘R’ and VBB intersects the device characteristics to the right of the peak point but to the left of valley point. then putting other values. V p = 14v and Vv = 1V .66  The peak voltage is given as.6k Ω 3 2 ×10  1 − 0. T= 1 1 = . If the load line fails to pass to the right of the peak point the UJT will not turn on. The UJT ratings are: η = 0.If VD = VBB VP = ηVBB Therefore  1  T = RC ln   1 − η  DESIGN OF UJT OSCILLATOR Resistor ‘R’ is limited to a value between 3 kilo ohms and 3 mega ohms. I p = 0. 109 .2mA. IV The recommended range of supply voltage is from 10 to 35V. f 2 ×103 104 . A UJT is used to trigger the thyristor whose minimum gate triggering voltage is 6.04µ F. In general RB1 is limited to a value of 100 ohm and RB 2 has a value of 100 ohm or greater and can be approximately determined as RB 2 = PROBLEM 1. Oscillator frequency is 2kHz and capacitor C = 0. IP At the valley point I E = IV and VE = VV . so the condition for the lower limit on ‘R’ to VBB − VV ensure turn-off is VBB − IV R < VV .

I p = 10 µ A . Solution The frequency f = 100Hz.2 ×10−3 ( R1 + 265 + 5000 ) R1 = 985Ω The value of Rc( max ) is given by equation Rc( max ) = Rc( max ) = VBB − Vp Ip 20 − 14 0.14 = 0.33k Ω 2.7 ( RB 2 + RB1 ) ηVBB 0.66 × 20 ∴ R2 = 265Ω Value of R1 can be calculated by the equation VBB = I leakage ( R1 + R2 + RB1 + RB 2 ) 20 = 3. I v = 10mA . Design the UJT triggering circuit for SCR.8 VBB = 20V The value of R2 is given by R2 = R2 = 0. The triggering pulse width should be 50 µ s .7 ( 5 ×103 ) 0.6 . η = 0. The frequency of oscillation is 100Hz. Vv = 2V .66VBB + 0. Given −VBB = 20V . Therefore T = 1 1 = f 100 110 .5 ×10−3 Rc( max ) = 12k Ω Similarly the value of Rc( min ) is given by equation Rc( min ) = Rc( min ) = VBB − Vv Iv 20 − 1 3 ×10−3 Rc( min ) = 6.

8k Ω 10 × 10−3 Value of R2 can be calculated from 104 R2 = ηVBB R2 = 104 = 833. V p = 0.6 × 20 Here the pulse width is give. τ 2 = R1C The width τ 2 = 50 µ sec and C = 1µ F .8V The minimum value of Rc can be calculated from Rc( min ) = Rc( min ) = VBB − Vv Iv 20 − 2 = 1. The peak voltage is given as. 50 ×10−6 = R1 × 1×10−6 ∴ R1 = 50Ω 111 .0109135 Let us select C = 1µ F . V p = ηVBB + VD Let VD = 0.8 = 12.0109135 1×10−6 Rc( min ) = 10. 1  From equation T = Rc C ln    1−η  Putting values in above equation. value of R1 will be.6 × 20 + 0.6  ∴ RcC = 0. Hence. 1  1  = Rc C ln   100  1 − 0. Rc( min ) = 0. that is 50µ s.8 and putting other values.91k Ω . Then Rc will be.33Ω 0. hence above equation becomes.

The pulses at the two secondaries feed SCRs in phase.33Ω . The diodes rectify the input ac to dc. In case the resistor ‘R’ is reduced so that the capacitor voltage reaches UJT threshold voltage twice in each half cycle there will be two pulses in each half cycle with one pulse becoming redundant.: Synchronized UJT trigger circuit 112 . As the current through the primary is in the from of a pulse the secondary windings have pulse voltages at the output. As the zener voltage VZ goes to zero at the end of each half cycle the synchronization of the trigger circuit with the supply voltage across the SCRs is archived. When the capacitor reaches the peak point VP the UJT starts conducting and capacitor discharges through the primary of the pulse transformer. The zener diode ‘Z’ functions to clip the rectified voltage to a standard level VZ which remains constant except near Vdc = 0 . The capacitor ‘C’ charges at a rate determined by the RC time constant. SYNCHRONIZED UJT OSCILLATOR A synchronized UJT triggering circuit is as shown in figure below. R1 = 50Ω . small variations in supply voltage and frequency are not going to effect the circuit operation.Thus we obtained the values of components in UJT triggering circuit as. R + D 1 D 3 V Z V 1 + i1 + R B d c Z 2 R E B 1 2 P u ls e G C G C 1 1 2 2 T r a n s f T o S C R G a t e s v D 4 D 2 - c C - Fig. resistor Rd lowers Vdc to a suitable value for the zener diode and UJT. C = 1µ F .91k Ω . R2 = 833. This voltage VZ is applied to the charging RC circuit. Rc = 10.

b i t c ill a t o r C o u n t e r m ff ) R e s e t L o a d En F lip ( F R / R e s e t fC y ( ’ 1 ’ o r ‘ 0 ’) S y n c S ig n a l D .vc.: Block diagram of digital firing circuit 113 . a x i nS o f c o u n t in g B F lo p B F ) b it s ) L o g i c c ir c u i t + G1 M o d u la t o r + G2 D r iv e r s t a g e A C d f r e q u el k n c y m n . 5 V s u p p ly ( ~ Z C 6 V ) D C C a r r ie r F r e q u e n c y O s c ill a t o r ( ∼ 1 0 K H z ) A A Fig.: Generation of output pulses for the synchronized UJT trigger circuit DIGITAL FIRING CIRCUIT A P r e s e t ( ’ N F ix e O s ( ’ n o . vd c VZ Vd c ηVZ vc P u ls e V o l t a g e 1 α ω 2 1 α ω 2 vc vc ωt 1 2 ωt Fig. C .

It counts at the rate of f C pulses/second. The ZCD output is used to reset the counter. The frequency of the clock is say f C . The value of firing angle ( α ) can be calculated from the following equation  2n − N   N 0 0 α = 180 = 1 − 180 ( for n = 4 ) n  16   2  114 . oscillator.: Logic circuit. a n-bit counter is required for obtaining 2n rectangular pulses in a half cycle of ac source. once the counter reaches the preset value ‘N’ counter overflow signal goes high. B . cf Fig. µ1 F T o D r iv e r C ir c u it G2 = A . µ1 H C ir c u it M T o G1 D r iv e r C ir c u it G1 = A . Carrier Modulator The digital firing scheme is as shown in the above figure. The counter is used in the down counting mode. Zero Crossing Detector: The zero crossing detector gives a short pulse whenever the input ac signal goes through zeroes. we obtain sixteen pulses in a half cycle of ac source. Oscillator: The oscillator generates the clock required for the counter. zero crossing detection. ‘N’ is the binary equivalent of the control signal. Thus by varying the preset input one can control the firing angle of Thyristors. It constitutes a pre-settable counter. In order to cover the entire range of firing angle that is from 0 0 to 1800. oscillator and flip-flops for getting correct pulses at zero crossing point in each half cycle. the n-bit counter is required for obtaining 2n rectangular pulses in a half cycle. Example: If 4-bit counter is used there will be sixteen pulses / half cycle duration. Counter: The counter is a pre-settable n-bit counter. cf F L o g ic o d u l a t o r A B A B y K fc G2 0 . B . In order to cover the entire range of firing angle from 0 to 1800 . The counter overflow signal is processed to trigger the Thyristors. Therefore 4-bit counter is used. As soon as the synchronized signal crosses zero.A B A B y I J fc 0 . flip-flop and a logic control unit with NAND and AND function. the load and enable become high and low respectively and the counter starts counting the clock pulses in the down mode from the maximum value to the pre-set value ‘N’. a low voltage synchronized signal is used.

Modulation and Driver Stage: The output of the flip-flop and pulses A and A-bar of ZCD are applied to the logic circuit. If S=1 B goes high as given by the truth table and B –bar has to go low. This overflow signal is given to the Set input S of the modified R-S flip flop. The output terminal B of flip-flop is connected with enable pin of counter. Input R 1 0 0 1 1 S 1 1 0 0 1 B 1 1 0 0 1 Output B-bar 0 0 1 1 0 Set Reset Last Stage Remarks Truth Table of Modified R-S Flip-Flop Logic Circuit. Once B goes low the counter stops counting till the next zero crossing. The logic variable Y equal to zero or one enables to select the firing pulse duration from α to π or α Overall Operation The input sinusoidal signal is used to derive signals A and A-bar with the help of ZCD. The signal C-bar is used to reset the fixed frequency oscillator. This state of the flip-flop is latched till the next zero crossing of the synchronized signal. The counter is preset to a value N which is the decimal equivalent of the trigger angle. A high at enable ‘EN’ of counter stops counting till the next zero crossing. Depending upon the values of A. The zero crossing detector along with a low voltage sync signal is used to generate pulses at the instant the input goes through zeroes. the flip flop and the n-bit counter. The pulse goes low at each zero crossing of the ac signal. B has been connected to the Enable pin of counter. 115 . The fixed frequency oscillator determines the rate at which the counter must count. The signal C and C-bar are as shown. A low value of ZCD output resets the B-bar to 1 and B to 0.Modified R-S Flip-Flop: The reset input terminal of flip-flop is connected to the output of ZCD and set is connected to output of counter. A-bar. Once the down count N is over the counter gives a overflow signal which is processed to be given to the Thyristors. A high output of the counter sets B-bar to 0 and B to 1. B-bar and Y the logic circuit will generate triggering pulses for gate1 or gate 2 for Thyristors 1 and 2 respectively. The counter starts to down count as soon as the C-bar connected to load pin is zero. B. The carrier oscillator generates pulses with a frequency of 10kHz for generating trigger pulses for the Thyristors.

(a) 116 . If switch S1 is closed at t = 0 . When thyristor T1 is turned on. the rate of rise of voltage across the thyristor is limited by the capacitor CS .dv PROTECTION dt dv across the thyristor is limited by using snubber circuit as shown in figure (a) dt below. The Fig. the discharge current of the capacitor is limited by the resistor RS as shown in figure (b) below.

(b) Fig. where τ s = RS CS RS VT ( t ) = VS − i ( t ) RS VT ( t ) = VS − VS − t τ s e RS RS −t Therefore At t = 0. C∫ Therefore Also i( t) = VS − t τ s e . circuit we have (for SCR off) VS = i ( t ) RS + 1 i ( t ) dt + Vc ( 0 ) [ for t = 0] . From fig. (c) The voltage across the thyristor will rise exponentially as shown by fig (c) above. At t = τ s .Fig. (b) above.632VS 117 . VT ( t ) = VS − VS e VT ( 0 ) = 0 τs −t   = VS 1 − e τ s    VT ( τ s ) = 0.

where LS is stray inductance and L.632VS = = dt τs RS CS RS = VS . The damping ratio is calculated for a particular circuit RS and CS can be found. RS can be high and CS can be small to retain the desired value of damping ratio. R is load ω0 2 LS + L inductance and resistance respectively. CS α RS + R = . If the load inductance is high. The damping ratio of this second order system consisting RLC network is given as. 118 . dv and discharging as shown in the dt It is possible to use more than one resistor for figure (d) below.5 to 1. R1 + R2 limits the discharging current dt Fig. A high value of RS will reduce discharge current and a low value of CS reduces snubber loss. The such that ITD = VS R1 + R2 dv is limited by R1 and CS . δ= To limit the peak overshoot applied across the thyristor. the damping ratio should be in the range of 0. (d) The load can form a series circuit with the snubber network as shown in figure (e) below. ITD ITD is the discharge current of the capacitor.Therefore And dv VT ( τ s ) − VT ( 0 ) 0.

Then the forward . under steady state operation Dm conducts when thyristor T1 is off. dt LS Practical devices must be protected against high 119 . In practice the is limited by adding a series inductor dt di VS = LS as shown in the circuit above. di If T1 is fired when Dm is still conducting can be very high and limited only by the dt di stray inductance of the circuit.Fig. (e) di PROTECTION dt di . As an example let us consider the dt circuit shown above.

of SCRs) × voltage / current rating of one SCR Usually the above ratio is less than one.String efficiency SERIES OPERATION OF SCRS For high voltage applications two or more Thyristors can be connected in series to provide the required voltage rating. SCRs with voltage and current rating of 10kV and 3kA are available. the demand for voltage and current ratings is so high that a single SCR cannot fulfill such requirements. no. SCRs are connected in series in order to meet the high voltage demand and in parallel for fulfilling high current demand. In such cases. The string efficiency that is a term used for measuring the degree of utilization of SCRs in a string. 120 . Since SCRs of same ratings and specifications do not have identical characteristics unequal voltage / current sharing is bound to occur for all SCRs in a string. unequal voltage distribution would occur. STATIC EQUALIZATION As seen from V-I characteristics. for some industrial applications. Presently. we could connect resistors across individual SCRs to meet the requirement of equal off state currents for the same off state voltage. However.SERIES AND PARALLEL OPERATION SCR ratings have improved considerably since its introduction in 1957. A measure of the reliability of the string is given by a factor called derating factor defined as DRF = 1 . In order to overcome this. two identical Thyristors to be used in a string do not have the same off state current for same off-state voltages. But this is not practical therefore we use the same resistor ‘R’ across each SCR to get fairly uniform voltage distribution. However due to production spread the characteristics of Thyristors of the same type are not identical. If these SCRs are used in a string as such. DERATING FACTOR (DRF) The use of an extra unit will improve the reliability of a string. Therefore the string efficiency can never be equal to one. String efficiency = Actual voltage / current rating ( ns .

. IDn . Therefore total voltage across the string = Vs = I1 R + ( ns − 1) I2 R .. then VD1 = I1 R . Let IT be the total current that the string carries and individual SCRs have leakage currents I D1 .. Let the leakage current of other SCRs. ∴ VS = VD1 + ( ns − 1) I1 R − ( ns − 1) ( ID 2 − ID1 ) R But from equation (2) But from equation (1) Therefore But 121 . it will block a higher voltage compared to other SCRs. Therefore I D1 = IT − I1 ...We see that.. ( 1) I D 2 = IT − I 2 ..... equal resistors ‘R’ are connected across individual SCR’s which are connected in series... I D 2 . As seen from the V-I characteristics. VS = I1 R + ( ns − 1) ( IT − ID 2 ) IT = I D1 + I1 VS = I1 R + ( ns − 1) [ I D1 + I1 − ID 2 ] R VS = VD1 + ( ns − 1) I1 R + ( ns − 1) [ ID1 − ID 2 ] R I D1 < I D 2 . Since SCR1 has lower leakage current compared to other SCRs.. be such that I D 2 = I D 3 = . I Dn . Let I D1 < I D 2 .. Let ns be the number of SCRs connected.. and voltage across the rest of the SCRs is ( ns − 1) I 2 R . the leakage current in the off state differ...... even though the voltage across each SCR is the same. ( 2 ) If VD1 is the voltage across SCR1...

. The cause for this is the unequal junction capacitances of individual SCRs. ( 3) Also R= VD1( max ) From equation (3). . 122 .. The thyristor with the least recovered charge will face the highest transient voltage normally it is necessary to connect a capacitor C1 across each thyristor as shown in the figure of series connected Thyristors.I D 2 − I D1 = ∆I D = difference between leakage currents of SCR1 and the rest of the SCRs. considering the worst case condition of V + ( ns − 1) RI D 2 = S ns DYNAMIC EQUALIZATION Under transient conditions. During turn off the differences in stored charges causes differences in the reverse voltage sharing. the voltage across individual SCRs in a string may not be distributed equally. Therefore VS = VD1 + ( ns − 1) VD1 − ( nS − 1) ∆ID R VS = nsVD1 − ( ns − 1) ∆ID R nsVD1 − VS ( ns − 1) ∆I D I D1 = 0 .

.. C1   Q1 = 0 . ∆V = ∆I D R = Assuming there are ‘ns’ SCRs in the string.. then Q2 = Q3 .DESIGN OF C It is found that in series connected SCRs. b. voltage unbalance during turn off is more predominant than the turn on time. d. Determine a.Qn and Q1 < Q2 . where Q1 is the stored charge of T1 and Q2 is the stored charge of T2 C with ∆Q = Q2 − Q1 .5µ F . Steady state voltage derating factor (DRF). c. The maximum leakage current and recovery charges of Thyristors are 10mA and 150µ sec respectively. Each thyristor has a voltage sharing resistance of R=56kΩ and capacitance C1 = 0. VS + ( ns − 1) ∆I D R . ∆Q . we have The worst case transient voltage sharing will occur when VDT ( max ) is given as VD1( max ) = Derating factor is given as 1 ns  Q2  VS + ( ns − 1)  C1   DRF = 1 − VS nsVD1( max ) PROBLEM 1. Therefore the design of ‘C’ is based on turn off characteristics.. ns VD1 = 1 ns  ∆Q  VS + ( ns − 1) . Maximum transient voltage sharing. Since SCR1 has recovered early. Transient voltage derating factor.. the voltage across capacitor ‘C’ is the difference between charge storage of SCR1 and SCR2 so the transient voltage across SCR1 is. Maximum steady state voltage sharing VDS ( max ) . Ten thyrisors are used in a string to withstand a DC voltage of VS = 15kV . and ∆Q = Q2 and Voltage across SCR1 = VD1 = Substituting for ∆I D R . 123 ..

Solution • • • •

VDS ( max ) =

VS + ( ns − 1) ∆I D R VS + ( ns − 1) ∆Q  = .  = 2004V ns ns C   1 − VS DRF = = 25.15% nsVDT ( max ) DRFTransient = 15.25%

Transient voltage sharing = 1770V.

PARALLEL OPERATION OF SCRS.
Parallel operation is used whenever current required by the load is more than the capability of the single SCRs.

In parallel operation, if one SCR carriers more current than the other SCRs, it will result in a greater junction temperature which results in a decrease in the dynamic resistance which has a cumulative effect of increasing the current further. This may lead to the thermal runaway and finally damage the SCR. If one SCR is damaged, the load connected may also be damaged. When SCRs are operated in parallel, it should be ensured that they operated at the same temperature. This is done by mounting all the Thyristors on one common heat sink.

It is also important that for parallel connection, sharing of current is ensured. This could be done by connecting a small resistance in series. Unequal current distribution is overcome by magnetic coupling of parallel paths as shown. If current through T1 increase, a voltage of opposite polarity will be induced in the windings of thyristor T2 and impedance through paths of T2 will be reduced, thereby increasing current flow through T2 .

124

THYRISTOR TYPES
Thyristors are manufactured almost exclusively by diffusion. The anode current requires a finite time to propagate to the whole area of the junction, from the point near the gate when the gate signal is initiated for turning on the thyristor. The manufacturers use various gate structures to control the di / dt , turn-on time, and turn-off time. Depending on the physical construction, and turn-on and turn-off behaviour, Thyristors can, broadly, be classified into nine categories. • • • • • • • • • Phase-control Thyristors (SCR’s). Fast-switching Thyristors (SCR’s). Gate-turn-off Thyristors (GTOs). Bidirectional triode Thyristors (TRIACs). Reverse-conducting Thyristors (RCTs). Static induction Thyristors (SITHs). Light-activated silicon-controlled rectifiers (LASCRs). FET controlled Thyristors (FET-CTHs). MOS controlled Thyristors (MCTs).

PHASE-CONTROL THYRISTORS

Fig.: Amplifying gate thyristor

This type of Thyristors generally operates at the line frequency and is turned off by natural commutation. The turn-off time tq is of the order of 50 to 100µ sec. This is most suited for low-speed switching applications and is also known as converter thyristor. Since a thyristor is basically silicon made controlled device, it is also known as silicon controlled rectifier (SCR). The on-state voltage, VT , varies typically from about 1.15V for 600V to 2.5V for 4000V devices; and for a 5000A 1200V thyristor it is typically 1.25V. The modern Thyristors use an amplifying gate, where an auxiliary thyristor TA is gated on by a gate signal and then the amplified output of TA is applied as a gate signal to the main thyristor TM . This is shown in the figure below. The amplifying gate permits high dynamic characteristics 125

with typical dv / dt of 1000V/µ sec and the di / dt of 500A/µ sec and simplifies the circuit design by reducing or minimizing di / dt limiting inductor and dv / dt protection circuits.

FAST SWITCHING THYRISTORS
These are used in high-speed switching applications with forced commutation. They have fast turn-off time, generally in the rage 5 to 50µ sec, depending on the voltage range. The on-state forward drop varies approximately as an inverse function of the turn-off time tq . This type of thyristor is also known as inverter thyristor. These Thyristors have high dv / dt of typically 1000 V/µ sec & di / dt of 1000 A/µ sec. The fast turn-off and high di / dt are very important to reduce the size and weight of commutating and or reactive circuit components. The on-state voltage of a 2200A, 1800V thyristor is typically 1.7V. Inverter Thyristors with a very limited reverse blocking capability, typically 10V and a very fast turn-off time between 3 and 5µ sec are commonly known as asymmetrical Thyristors (ASCRs). GATE TURN-OFF THYRISTORS

A gate-turn-off thyristor (GTO) like an SCR can be turned on by applying a positive gate signal. However, it can be turned off by a negative gate signal. A GTO is a latching device and can be built with current and voltage ratings similar to those of an SCR. A GTO is turned on by applying a short positive pulse and turned off by a short negative pulse to its gate. The GTOs have advantages over SCRs. • • • • Elimination of commutating components in forced commutation, resulting in reduction in cost, weight, and volume. Reduction in acoustic and electro-magnetic noise due to the elimination of commutation chokes. Faster turn-off permitting high switching frequencies and Improved efficiency of converters. 126

and requires a relatively high negative current pulse to turn off.4V. 1200V GTO is typically 3. typically 10:1. which is diverted through and charges the snubber capacitor.: Triac Structure 127 . • • • • • A higher blocking voltage capability. Similarly terminal MT1 is connected to p2 as well as n2 and terminal MT2 is connected to join p1 and n4 . As seen from the diagram the gate ‘G’ is near terminal MT1. a bipolar transistor tends to come out of saturation. a GTO goes into deeper saturation due to regenerative action. The on-state voltage of typical 550A. A high ratio of peak controllable current to average current. It has higher on-state voltage than that of SCRs. A GTO has low gain during turn-off. determines the reapplied dv dt . The off state voltage is reapplied immediately after turn-off and the reapplied dv dt is only limited by the snubber capacitance. the load current I L . Under surge conditions. Once a GTO is turned off. The cross hatched strip shows that ‘G’ is connected to n3 as well as p2 .In low power applications GTOs have the following advantages over bipolar transistors. dv I L = dt Cs Where Cs is the snubber capacitance BIDIRECTIONAL TRIODE THYRISTORS A TRIAC conducts in both directions unlike the SCR. Since it conducts in both directions. typically 6. A high ratio of surge peak current to average current. and A pulsed gate signal of short duration. typically 600. On the other hand. Fig. A high on-state gain (anode current/gate current). Controllable peak on-state current ITGQ is the peak value of on-state current which can be turned off by gate control. the terminals are named as MT1 and MT2 and the Gate.

: V-I Characteristics of TRIAC 128 . However the triac can be turned on by applying a positive voltage with respect to terminal MT1.Fig.: Triac Symbol With no signal to the gate the triac will block both half cycles of the applied AC voltage in case the peak value of this voltage is less than the breakover voltage in either direction. For convenience sake MT1 is taken as the reference terminal. Fig. There are four modes of operation of the triac.

M 2 (T + ) P N I g P 1 1 2 N 2 G ( + ) I g M 1 ( T− ) V MODE (II): MT2 POSITIVE. As a result the triac starts conducting through p1n1 p2 n3 initially. The structure of p1n1 p2 n3 may be regarded as an auxiliary SCR and the structure p1n1 p2 n2 as the main SCR. 129 . This mode of operation is less sensitive as compared to the previous mode since more gate current is required. GATE NEGATIVE When gate terminal is negative with respect to MT1 gate current flows through p2 n3 junction and forward biases this junction. When the gate current has injected sufficient charge into the p2 layer the traic starts conducting through p1n1 p2 n2 layers.OPERATION MODE (I): MT2 POSITIVE. With the conduction of p1n1 p2 n3 the voltage drop across this path falls but the potential of layer between p2 n3 rises towards the anode potential of MT2. Its left hand side being at a higher potential than its right hand side a current is thus established in layer p2 from left to right which forward bias the p2 n2 junction and finally the main structure p1n1 p2 n2 begins to conduct. The quadrant of operation is the first quadrant. It can be stated that the anode current of the auxiliary SCR serves as the gate current of the main SCR. gate current mainly flows through p2 n2 junction like in ordinary SCR. As the right hand portion of p2 is clamped at cathode potential of MT1 a potential gradient exists across layer p2 . GATE POSITIVE When gate current is positive with respect to MT1. This shows that when MT2 and gate are positive with respect to MT1 triac acts like a conventional thyristor.

M 2 (T + ) P 1 I n i t i a l N c o n d u c t i o n1 P2 N 3 G F i n a l c o n d u c t i o N 2 n M 1 (T − ) V I g MODE (III): MT2 NEGATIVE. GATE NEGATIVE In this mode the layer n3 acts as a remote gate. As usual the current after conduction is limited by the external load. 130 . GATE POSITIVE − The gate current I G forward bias p2 n2 junction. Layer n2 injects negative electrons ( e s ) into the p2 layer as shown . the device is less sensitive in the III quadrant with positive gate current. Finally the structure p2 n1 p1n4 is turned on. Since in this mode the triac is turned on by a remote gate n2 . M 2 ( T− ) N P N P G 2 1 1 4 N M 2 1 (T + ) ( + ) I g MODE (IV): MT2 NEGATIVE. The gate current forward bias the n3 p2 junction. Though the triac is turned on by a remote gate n3 yet the device is more sensitive in this mode. With n2 layer acting as a remote gate the structure p2 n1 p1n4 eventually turns on.

The diode clamps the reverse blocking voltage of the SCR to 1 or 2V under steady state conditions. voltage. the reverse voltage may rise to 30V due to inducted voltage in the circuit stray inductance within the device. As the two conducting paths from MT1 to MT2 or from MT2 to MT1 interact with each other in the structure of the traic. under transient conditions. Thus the triac is rarely operated in the first quadrant with negative gate current and in the third quadrant with positive gate current. However. current and frequency ratings are much lower as compared to conventional Thyristors. The maximum ratings are around 1200V.) P 3 4 1 1 2 M I g 1 (T + ) CONCLUSION We can conclude that the sensitivity of the triac is greatest in first quadrant and third quadrant. an antiparallel diode is connected across an SCR in order to allow a reverse current flow due to inductive load and to improve the turn-off requirement of commutation circuit.M 2 ( T− ) N P N N G ( . 131 . 300A. APPLICATIONS Triacs are used in heat control and for speed controls of small single phase series and induction motors. REVERSE CONDUCTING THYRISTORS In many choppers and inverter circuits.

The switching time is on the order of 1 to 6µ sec. This device is extremely process sensitive. SITH has low on-state resistance or voltage drop and it can be made with higher voltage and current ratings. and small perturbations in the manufacturing process would produce major changes in the device characteristics. their applications will be limited to specific circuit designs. Electron-hole pairs which are created due to the radiation produce triggering current under the influence of electric field. and it may be considered as a thyristor with a built-in antiparallel diode. The forward blocking voltage varies from 400 to 2000V and the current rating goes up to 500A. typically 3V. The gate structure is designed to provide sufficient gate sensitivity for triggering from practical light source. An RCT is also called an asymmetrical thyristor (ASCR). If a sufficient voltage is applied to the gate of the MOSFET. which floats at a potential of as high as a few hundred kilovolts.g. Since the ratio of forward current through the thyristor to the reverse current of diode is fixed for a given device. The voltage rating can go upto 2500V and the current rating is limited to 500A. The LASACRs are used in high voltage and high current applications (e. It has a high switching speed. 132 . As a result. a triggering current for the thyristor is generated internally. The reverse blocking voltage is typically 30 to 40V. STATIC INDUCTION THYRISTORS The characteristics of SITH are similar to those of a MOSFET. A SITH has fast switching speeds and high dv dt and di dt capabilities. The typical di dt is 250 A/µ sec and the dv dt could be as high as 2000 V/µ sec.An RCT is a compromise between the device characteristics and circuit requirement. A SITH is normally turned on by applying a positive gate voltage like normal Thyristors and is turned off by application of negative voltage to its gate.. high di dt and high dv dt . The voltage rating of a LASCR could be as high as 4kV at 1500A with light-triggering power of less than 100mW. A LASCR offers complete electrical isolation between the light-triggering source and the switching device of power converter. high-voltage dc (HVDC) transmission and static reactive power or volt-ampere reactive (VAR) compensation). A SITH is a minority carrier device. LIGHT-ACTIVATED SILICON CONTROLLED RECTIFIERS This device is turned on by direct radiation on the silicon wafer with light. FET CONTROLLED THYRISTORS A FET-CTH device combines a MOSFET and a thyristor in parallel is as shown in figure.

The MOS gate structure is represented a p-channel MOSFET M1 which is the ON FET and n -channel MOSFET M2 which is the OFF FET. They have low on-state losses and large current capabilities of Thyristors with the advantages of MOSFET controlled turn-on and turn-off and relatively fast switching speeds.This device can be turned on like conventional Thyristors. MOS-CONTROLLED THYRISTOR A MOS controlled Thyristors or MCTs are a new devices that have recently become commercially available. Several thousands of such cells are fabricated integrally on the same silicon wafer and all cells are connected electrically in parallel.F E T 2 S F F . one NPN and the other a PNP transistor. It is basically a thyristor with two MOSFETs built in the gate structure. This would find applications where optical firing is to be used for providing electrical isolation between the input or control signal and the switching device of the power converter. The figure shows a single cell of MCT. but it can not be turned off by gate control. One MOSFET is for turning on the MCT and the other is to turn off the MCT. Operation A n o d e D n + p p + S G a t e M O ( G ) n Q 2 n D p - M O N 1 . The NPNP structure is represented by two transistors. There are two types P-MCT and N-MCT. The thyristor portion of the device has the same structure as a conventional thyristor.F E T n Q 1 n C + p - a t h o d e 133 .

a continuous gate pulse over the entire on/off period is required to avoid state ambiguity. It can be effectively paralleled to switch high currents with only modest deratings of the per-device current rating. typically 1. including inverters and choppers. For higher values of current. Due to this the n-channel OFF FET shorts out the base emitter junction of the PNP transistor and thus Q2 transistor is turned off.The equivalent circuit of a p-MCT is shown due to NPNP structure rather than PNPN structure of a normal SCR the anode serves as the reference terminal with respect to which all gate signals are applied. Positive feedback and regeneration between the two transistors takes place just like in a conventional thyristor and hence MCT turns-on. In many applications.4µ sec and a fast turn-off time. 134 . This results in MCT returning to its blocking state. Let MCT be in its forward blocking state and a negative signal VGA is applied. which greatly simplifies the drive circuits. This carrier movement causes transistor Q1 to turn-on. typically 0. Then a p-channel is formed in the n-doped material of the p-channel MOSFET M 1 which causes holes to flow laterally from p − layer to the p layer. The MCT can be operated as a gate controlled device if its current is less than the peak controllable current. Low switching losses.25µ sec for an MCT of 300A. An MCT has • • • • • A low forward voltage drop during conduction. 500V. A low reverse voltage blocking capability and A high gate input impedance. the width of the turn-off pulse should be larger. Moreover. the MCT has to be commutated off like a standard SCR. This in turn turns ON transistor Q2 since the collector of Q1 is connected to the base of Q2 . Attempting to turn off the MCT at currents higher than its rated controllable current may result in destroying the device. Now current flow is established between the n and n + layer through the n-channel formed. A fast turn-on time. the gate draws a peak current during turn-off. It cannot easily be driven from a pulse transformer if a continuous bias is required to avoid state ambiguity. The gate pulse widths are not critical for smaller device currents. With the application of positive voltage applied between gate and anode an n-channel is formed in the p-region of the n-channel MOSFET M 2 . For larger currents.

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