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The Pseudo-NMOS Load

There is another type of active load that is used for NMOS logic, but this load is made from a PMOS transistor! Hence, NMOS logic that uses this load is referred to as Pseudo NMOS Logic, since not all of the devices in the circuit will be NMOS (the load will be PMOS!). We therefore call this load the Pseudo NMOS Load, since it is the load used in Pseudo NMOS logic. But, keep in mind that the pseudo NMOS load is made from a PMOS device (this can cause great confusion!).

VDD i
+

vGS Vt = (VDD +Vt )

vGS = 0 VDD = DD V vDS = v

iD = i

The Pseudo-NMOS Load

Jim Stiles

The Univ. of Kansas

Dept. of EECS

11/19/2004

The Psuedo NMOS Load.doc

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Note that vGS = DD < Vt , so that the load is not in cutoffit V can either be in saturation or triode. The PMOS will be in triode if:

vDS > vGS Vt

v > (VDD +Vt )

v < (VDD +Vt )

In which case the current is:
2 iD = K 2 (vGS Vt )vDS vDS 2 i = K 2 (VDD +Vt ) ( v ) ( v )

i = K 2 (VDD +Vt ) v v 2
Likewise, the PMOS will be in saturation if:

vDS < vGS Vt

v < (VDD +Vt )

v > (VDD +Vt )

In which case the current is:

iD = K (vGS Vt )
2

i = K (VDD +Vt )

vDS ro v + ro

Jim Stiles

The Univ. of Kansas

Dept. of EECS

11/19/2004

The Psuedo NMOS Load.doc

3/4

where in this case:

ro =

K (vGS Vt )

K (VDD +Vt )

Combining these two results, we find that the pseudo NMOS load behaves very much like the depletion load:

K 2 (V +V ) v v 2 if 0 < v < (V +V ) t DD DD t i = v 2 K (VDD +Vt ) + if v > (VDD +Vt ) ro

Pseudo NMOS Load

Resistor ( i =v/R )

v VDD+Vt
Jim Stiles The Univ. of Kansas Dept. of EECS

11/19/2004

The Psuedo NMOS Load.doc

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VDD

A Pseudo-NMOS Logic Example

Jim Stiles

The Univ. of Kansas

Dept. of EECS