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Faculty of Computer Science and Engineering

Ghulam Ishaq Khan Institute of


Engineering Sciences and Technology

EE211 Circuit Analysis I (Fall 2015)


Assignment #02 [Cognitive Level: C3(Applying)]
Due Date: Thursday, 1st Oct, 2015
The assignment must be submitted by due date during lecture timings in class. Submissions after class timings will lead to
zero marks. Do not copy and do not assist in copying else both parties will get negative marking for their assignments.

Note: The following assignment will be evaluated against CLO-2 and PLO-2.

Q1. Find currents I1 to I4 using KCL

Q2. Find the current through 1 resistor using current divider rule and the voltage Vx. Also find the
power absorbed by the 12 resistor.

Q3. Find V and ix in the following network using mesh equations.

Q4. For the following network determine:


(a) voltages V1, V3 using voltage divider rule
(b) voltage Vab
(c) source current Is.

Q5. Using Delta-Y transformation, simplify the following network and calculate the total resistance seen
through terminal d-d. Use the simplified network to find the supply current i .

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