2017 IEEE Region 10 Humanitarian Technology Conference (R10-HTC)
21 - 23 Dec 2017, Dhaka, Bangladesh
A Hybrid DC-DC Buck Converter for Very Low
Voltage Gain at High Efficiency
Md. Ashiqur Rahman*, Sadman Sakib , Golam Sarowar , Md. Fahim Hasan Khan , Md. Zamilur Reza
Department of Electrical and Electronic Engineering, Islamic University of Technology
Board Bazar, Gazipur – 1704, Bangladesh
*ashiqurrahman@iut-dhaka.edu
Abstract— A hybrid dc-dc step-down converter is designed to
achieve a low output to input voltage conversion ratio with high
efficiency. Both switched capacitor and switched inductor
topologies are used to develop the proposed buck converter. The
mathematical model of the proposed buck circuit is derived
considering continuous conduction mode of operation. The steady-
state analysis of the converter is validated by simulation result
from MATLAB SIMULINK. The proposed converter maintains
efficiency higher than 90% for a load of 100W- 250W.
Keywords—efficiency; buck converter; switched-capacitor;
switched-inductor; voltage conversion ratio;
I. INTRODUCTION
Various electronic and smart devices require dc-dc converter
to step down the battery supply to the voltage level required to
run these devices. In recent days, the integrated circuits (IC)
including different types of microprocessors are being
manufactured to run by less voltage supply, 3 V or even less
voltage, in order to increase energy efficiency and reduce power
loss [1]. Buck converter is used to step down the supply voltage.
The conventional buck converter has output to input voltage
conversion ratio of D. Here, D is the duty cycle of the switching
signal. The conventional buck converter needs to operate at low
duty cycle to fulfill the requirement of these devices. However,
low duty cycle imposes some problems in the converter circuit.
Such as, the efficiency becomes low [2], a fast comparator is
necessary, designing robust and stable feedback control system
becomes difficult [3].
To resolve this, transformer can provide a solution. But, it is not
feasible to apply such a bulk set up in an era where devices are
getting smaller day by day. Cascading several conventional
buck converters can give a reduced conversion ratio. It is not
also applicable as it declines the energy efficiency to a great
extent. To provide good efficiency several quadratic converters
are presented in [4, 5]. But this imposes overstress on transistor
current and voltage.
There are two ways to further improve the buck converter. The
buck circuits introduced in [6-9] use switched capacitor
topology. Switched capacitor converter has some inherent
978-1-5386-2175-2/17/$31.00 ©2017 IEEE
710
advantages like better efficiency and wide voltage conversion
ratio [10, 11]. Another way is using switched inductor,
introduced in [6, 12]. Switched inductor converter provides
input current with less ripple and better efficiency. But the use
of both the switched capacitor and switched inductor in a buck
circuit is yet to be made. In this paper, a hybrid buck converter
topology is proposed utilizing both the switched inductor and
the switched capacitor. The proposed circuit provides a voltage
conversion ratio of D/(2-D)2 . So, a low output voltage can be
achieved avoiding low duty cycle. The paper is divided into five
sections. Section II analyzes the operation of the proposed
circuit, section III describes the mathematical modeling and
design equations of different circuit components, section IV
shows the simulation results and section V draws the
conclusion.
II. PROPOSED CONVERTER O PERATIONAL ANALYSIS
The proposed hybrid buck converter circuit is shown in Fig.
1. The proposed circuit is comprised of a switched capacitor
branch, a switched inductor branch, an input inductor L1, an
output capacitor C3 and a load R. The switched capacitor branch
is composed of capacitor C1, C2 and diode D1, D2 and D3.
Capacitor C1 and C2 have equal value. The switched inductor
branch is made up of inductor L2, L3 and diode D4, D5 where
inductor L2 and L3 have equal value. Operation stages of the
proposed circuit can be divided into two modes. Circuit
operation when the MOSFET M1 is on, is denoted as ton, is
shown in Fig. 2(a). Capacitor C1 and C2 are discharged in
parallel as diode D1 and D2 conduct and D3 is off. The voltage
across the capacitor C1 and C2 are equal during ton. Inductor L2
and L3 are charged in series as diode D4, D5 are off. Charging
current through inductor L2 and L3 are equal (IL2 = IL3 ). Circuit
operation when the MOSFET M1 is off, is denoted as toff, is
shown in Fig. 2(b). Capacitor C1 and C2 are charged in series
as Diode D1 and D2 are off and D3 is on. So, the capacitor C1
and C2 are charged up to the same voltage (VC1 =VC2 ). Inductor
L2 and L3 are discharged in parallel as diode D4 and D5 are on
and the discharging current through them are also equal (IL2 =
IL3 ).
 2017 IEEE Region 10 Humanitarian Technology Conference (R10-HTC)
21 - 23 Dec 2017, Dhaka, Bangladesh

toff VC2
∆IL2 = ∆IL3 = (5)
L2

During toff , current through L2 and L3 decrease

(a)
Replacing ton =DT and toff =(1-D)T in equation (4) and (5) and
equating them,
2-D
VC1 = VC2 (6)
D
Fig. 1. Proposed Hybrid Buck Converter From equation (3) and (6),
1 2-D
V
2-D in
= V
D C2

VO D
or, = (2-D)2
(7)
Vin

Because voltage (VC2 ) across capacitor C2 and voltage (VO )

across load R are equal. Equation (7) shows the steady state
voltage conversion ratio of the proposed buck converter.
(a) B. Design Equation
1
T = switching period = f , f = switching frequency
T = ton +toff (8)
From equation (1) and (2), putting the value of ton and toff in
equation (8)
L1 ∆IL1 L1 ∆IL1
T= -
Vin -VC1 Vin -2VC1
VC1
or, T=L1 ∆IL1
(Vin -VC1 )(Vin -2VC1 )
(b) Replacing the value of VC1 from equation (3),
D(1 − D)V T
L =
Fig. 2. Circuit Operation during (a) On state (b) Off State of MOSFET M1 ∆I

D(1-D)Vin
or, L1 =
f∆IL1
(9)
III. MATHEMATICAL M ODEL In a similar way, the design equation for inductor L2 or L3 is
D(1-D)Vin
A. Steady State Analysis L2 =L3 = 2
(10)
f(2-D) ∆IL2
Steady State Analysis of the circuit is carried out Capacitor C1 and C2 are charged during toff = (1-D)T. IC1 is
considering continuous conduction mode (CCM) of the the current through the capacitor C1 and C2.
1 (1-D)T
inductor current. Waveforms of CCM characteristics of ∆VC1 = ∆VC2 = IC1 dt
C1 0
capacitor voltage and inductor current are shown in Fig. 3. Iin (1-D)T
During ton, current through inductor L1 increases or, C1 = C2 =
∆VC1
∆IL1
Vin -VC1 = L1 During toff , IC1 = Iin
ton
Assuming that output current Io is constant and ripple in Io is
ton (Vin -VC1 )
or, ∆IL1 = (1) negligible, ∆IL2 = ∆IC3
L1 ∆I
During toff, current through inductor L1 decreases So, IC3 = 4L2
∆IL1 Capacitor C3 is charged during toff = (1-D)T
Vin -2VC1 = -L1 1 (1-D)T
toff ∆VC3 = IC3 dt
-toff (Vin -2VC1 ) C3 0
or,∆IL1 = (2)
L1 ∆IL2 (1-D)T
or, C3 =
Replacing ton =DT and toff =(1-D)T in (1) and (2) and equating 4∆VC3
them, From equation (5), replacing the value of ∆IL2
1 D(1-D)2 T2
VC1 = V (3) C3 =
2-D in 4L (2-D)2 ∆V2 C3
Current through inductor L2 and L3 are equal and increase D(1-D)2
or, C3 = 2 (2-D) 2 (11)
during ton 4L2 f ∆VC3
(V -V )t
∆IL2 = ∆IL3 = C1 C2 on (4)
2L 2

711
 2017 IEEE Region 10 Humanitarian Technology Conference (R10-HTC)
21 - 23 Dec 2017, Dhaka, Bangladesh

100

80 Input Voltage
Output Voltage

Voltage (V)
60

40

20

0
0 0.02 0.04 0.06 0.08 0.1
t ime (s)

Fig. 4. Waveforms of input and output voltage at D=0.7

8
Input Current
Output Current
6
Curr ent (A)

Fig. 3. Waveforms of Capacitor Voltage and Inductor Current at CCM

4

TABLE I. SIMULATION PARAMETERS

Parameter Value 2
Input Voltage, V 100 V
Switching Frequency, f 100 kHz
Capacitor, C , C 1 μF 0
Capacitor, C 220 μF 0 0.02 0.04 0.06 0.08 0.1
Inductor, L 1 mH time (s)
Inductor, L , L 1 mH
Fig. 5. Waveforms of input and output current at D=0.7

IV. SIMULATION RESULT 1

Conventional
Simulation of the proposed buck converter is carried out
Proposed
in MATLAB SIMULINK using the parameters shown in 0.8
Table I. The input and output voltage waveforms are shown
in Fig. 4. The simulation is conducted at 70% duty cycle.
When the input voltage is given 100V dc, the average output
Voltage Gain

0.6
voltage is received 40V (Fig. 4). At this duty cycle, the
average input current is measured 1.75A and the average
output current is measured 4.1A (Fig. 5). The comparison of 0.4
voltage conversion ratio between conventional [13] and
proposed circuit is shown in Fig. 6. This informs that the
proposed circuit can generate lower voltage than the 0.2
conventional one at a certain duty cycle. The variation of
efficiency with the change in output power is compared in
Fig. 7 between conventional and proposed converter. The 0
0 0.2 0.4 0.6 0.8 1
output power is varied in the range of 50 W to 250 W by Duty Cycle
varying the load, R. With the change in load in this range, the
efficiency varies from 80% to 95%. The efficiency at low Fig. 6. Voltage Gain Versus Duty Cycle
output power like 50 W, is low because a portion of input

712

96
94
92
90
Efficiency (%)
88
Proposed
86 Conventional
84
82
80
78
50 100 150 200 250
Out put Power (W)
Fig. 7. Efficiency Versus Output Power
power is lost due to switching. At higher output power, the
switching loss becomes smaller compared to input power.
Consequently, the overall efficiency increases. The
comparison, shown in Fig. 7, proves that the proposed
converter will provide higher efficiency than the
conventional circuit.
V. CONCLUSION
The proposed dc-dc buck converter shows more than 90%
efficiency for a load ranging from 100W to 250W. Negligible
deviation of the simulation results from the detailed
mathematical model justifies the compatibility of the
proposed converter. The proposed circuit is obtained by
introducing two hybrid networks to the conventional dc-dc
buck converter. The circuit, presented in this paper, is an open
loop system. Developing the closed loop system of the circuit
with a feedback from the output side and a compensator may
further improve the transient behavior of the circuit.
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