FPGA BASED

NEAREST LEVEL MODULATION FOR

THD REDUCTION IN MULTILEVEL
INVERTERS
Prepared By
MIDHUN E.V.
9400165556
 Concept Of Multilevel Inverter
• Modification of two-level inverter
• To create a smoother stepped output waveform, more than
two voltage levels are combined together
• Output waveform has lower dv/dt and lower harmonic
distortions
• Waveforms for the three, five and seven level inverters
 A LITERATURE SURVEY ON
TOPOLOGIES
• Features of Multi level inverters are high-power and
medium-voltage energy control
• Synthesize switched waveforms with lower levels of
harmonic distortion
• To decrease the harmonic distortion in the output waveform
without decreasing the inverter power output
Topologies
1. Cascaded H-bridge multilevel inverters
2. Diode Clamped multilevel inverters
3. Flying Capacitor multilevel inverters
1.
 CASCADED H BRIDGE INVERTER
• H-bridge inverters connected in series to provide
a sinusoidal output voltage
• The number of output voltage levels are 2k+1,
where k is the number of cells
• Advantage :it needs less number of components ,
so comparatively the price and the weight of the
inverter is less
fig: One phase of a cascaded
H-bridge multilevel inverter
 Applications of Multilevel Inverters
• Renewable resources’ of energy and battery
based applications
• Can be used as photovoltaic cell or fuel cell
• Produces better output with Inductive loads
 Advantages and Disadvantages of
Cascade H Bridge Multilevel Inverters
Advantages
1. Output voltage levels are doubled the number of sources.
2. Manufacturing can be done easily and quickly.
3. Packing and Layout is modularized.
4. Easily controllable with a transformer.
5. Cost effective.

Disadvantages
1. Every H Bridge needs separate dc sources
2. Limited applications due to large number of sources
 Low Harmonic Nearest Level
Modulation
Fig: principle of the low harmonic NLM method
 Advantages of FPGA Implementation
1. Can be implemented faster and parallel
processing signals.
2. Faster time to market.
3. No non recurring expenses.
4. Simpler design cycle.
5. Reusabiliy.
 PROJECT OBJECTIVES

➢ Conventional type inverters(2 Level, THD-45.68%)

➢ Multilevel inverter(15 Level , THD-15.68%)
➢ Different types of PWM technique
➢ proposed system (81 Level, THD- <5%)
PROJECT SPECIFICATION

➢ 81 Level

➢ Output voltage – 230V

➢ Output power – 500W

➢ THD – < 5%
HARDWARE AND SOFTWARE REQUIREMENTS

➢ Matlab – 2017 (Simulink)

➢ Spartan 3 Development Board with Xilinx
➢ Proteus
➢ Circuit wizard
➢ Transformer (230/18V,6A)
 BLOCK DIAGRAM
Power
supply
V dc
Opto coupler
interface H Bridge

3Vdc
Opto coupler
Spartan 3
interface H Bridge L
FPGA O
A
9Vdc D
Opto coupler
interface H Bridge

Reference 27Vdc
Opto coupler
Signal
interface H Bridge
 COMPONENT SELECTION

1. Optocoupler – TLP350
2. IGBT – 60N100(60A)/25N120(25A)
3. FPGA – Spartan 3
4. Zener
5. Resistor (330Ω,22Ω,1KΩ)
6. Rectifier Bridge module
7. Capacitor 1000μF,0.1μF
8. Voltage Regulator- 7805
 WORK SCHEDULE

PHAS DATE SHEDULE STATUS

E
1 15-10-2018 TOPIC SELECTION
2 15-10-2018 LITERATURE SURVEY- First DC
meeting
3 INTRODUCTION TO SIMULINK
4 SIMPLE INVERTER SIMULATION

5 MODIFICATION SPW INVERTER

6 5 LEVEL SIMULATION
7 PCB DESIGN
8 HARDWARE IMPLIMENTATION
AND ANALYSIS
9 OUTPUT VALUATION
10 REPORT PREPARATION
&PRESENTATION
 REFERENCE

➢ MATLAB based Analysis and Simulation of Multilevel Inverters

➢ New Multilevel Inverter Topology with reduced number of Switches using
Advanced Modulation Strategies
➢ A Hybrid Cascade Multilevel Converter for Battery Energy Management
Applied in Electric Vehicles
➢ A DER Based Single –Phase Asymmetrical 27 Level Inverter Topology
➢ The 27-level multilevel inverter for solar pv applications
➢ Mitigation of harmonics in inverter
➢ Harmonic reduction using multilevel inverter concepts
CONCLUSION
 n k s
T h a