Diode Circuits – Recent GATE Problems

1. The diodes and capacitors in the circuit shown are ideal. The voltage v(t)
across the diode 𝐷𝐷1 is
𝐶𝐶1 𝐷𝐷2

+
cos(𝜔𝜔𝜔𝜔) AC 𝐷𝐷1 𝐶𝐶1
-

(a) cos(𝜔𝜔𝜔𝜔) − 1 (c) 1 − cos(𝜔𝜔𝜔𝜔)

(b) sin(𝜔𝜔𝜔𝜔) (d) 1 − sin(𝜔𝜔𝜔𝜔)
[GATE 2012: 1 Mark]
Soln. Given,
Voltage 𝒗𝒗(𝒕𝒕) = 𝒄𝒄𝒄𝒄𝒄𝒄 𝝎𝝎𝝎𝝎
Find the voltage across the diode D1 (diodes and capacitors are ideal)
When the positive cycle of the input is applied diode D1 is forward
biased and D2 is reverse biased.
Capacitor C1 charges to maximum voltage (here 1 V)
When negative cycle of the input comes D1 is reverse biased, so
replaced by open.
Note that D2 is reverse biased forever and can be replaced by a open
switch.

+1
cos(𝜔𝜔𝜔𝜔) 0 t
+ C
- + -1
+
cos(𝜔𝜔𝜔𝜔) AC
𝑉𝑉(𝑡𝑡) = cos(𝜔𝜔𝜔𝜔) − 1

-
- 0 t
(cos 𝜔𝜔𝜔𝜔 − 1) -1
-2
 In this circuit C1 & D1 form a clamper circuit while D2 and C2 form
peak detector. This cascaded circuit acts as peak to peak detector.
Option (a)

2. The i – v characteristics of the diode in the circuit given below are

𝑣𝑣 − 0.7
𝑖𝑖 = � 𝐴𝐴, 𝑣𝑣 ≥ 0.7 𝑉𝑉
500
0𝐴𝐴, 𝑣𝑣 ≥ 0.7 𝑉𝑉

1 𝑘𝑘Ω

i
+
10 𝑉𝑉 v
-
The current in the circuit is
(a) 10 mA (c) 6.67 mA
(b) 9.3 mA (d) 6.2 mA
[GATE 2012: 1 Mark]
Soln. As per the given i – v characteristics
𝒗𝒗−𝟎𝟎.𝟕𝟕
𝒊𝒊 = 𝑨𝑨 𝒇𝒇𝒇𝒇𝒇𝒇 𝒗𝒗 ≥ 𝟎𝟎. 𝟕𝟕 𝑽𝑽 − − − − − − − − − −(𝟏𝟏)
𝟓𝟓𝟓𝟓𝟓𝟓

From the given circuit, 𝒗𝒗 = 𝟏𝟏𝟏𝟏 − 𝟏𝟏𝟏𝟏𝟏𝟏𝟏𝟏𝟏𝟏 − − − − − (𝟐𝟐)

1 𝑘𝑘Ω

i
+
10 𝑉𝑉 v
-
From equation (1) and (2) eliminate v

𝟏𝟏𝟏𝟏 − 𝟏𝟏𝟏𝟏𝟏𝟏𝟏𝟏𝟏𝟏 − 𝟎𝟎. 𝟕𝟕 𝟗𝟗. 𝟑𝟑

𝒊𝒊 = = − 𝟐𝟐𝟐𝟐
𝟓𝟓𝟓𝟓𝟓𝟓 𝟓𝟓𝟓𝟓𝟓𝟓
 𝟗𝟗. 𝟑𝟑 𝟑𝟑. 𝟏𝟏
𝒐𝒐𝒐𝒐, 𝟑𝟑𝟑𝟑 = 𝒐𝒐𝒐𝒐 𝒊𝒊 = = 𝟔𝟔. 𝟐𝟐𝟐𝟐𝟐𝟐
𝟓𝟓𝟓𝟓𝟓𝟓 𝟓𝟓𝟓𝟓𝟓𝟓
Thus, option (d)

3. In the circuit shown below, the knee current of the ideal Zener diode is 10
mA. To maintain 5 V across RL, the minimum value of RL in Ω and the
minimum power rating of the Zener diode in mW, respectively are

100Ω

𝐼𝐼𝐿𝐿𝑜𝑜𝑜𝑜𝑜𝑜
10V

𝑉𝑉𝑍𝑍 = 5𝑉𝑉 𝑅𝑅𝐿𝐿

(a) 125 and 125 (c) 250 and 125

(b) 125 and 250 (d) 250 and 250
[GATE 2013: 2 Marks]
Soln. Given,
Knee current of Zener (𝑰𝑰𝒛𝒛𝒛𝒛 ) = 𝟏𝟏𝟏𝟏𝟏𝟏𝟏𝟏
Knee current of Zener is the minimum current that should flow
through the diode for proper Zener action
Zener is of 5V i.e. 𝑽𝑽𝒛𝒛 = 𝟓𝟓𝟓𝟓
Find, minimum RL and diode power rating.
The minimum value of RL means the load current is maximum (Imax)
So,
𝑽𝑽𝑹𝑹𝑹𝑹 = 𝑰𝑰𝑳𝑳𝑳𝑳𝑳𝑳𝑳𝑳 . 𝑹𝑹𝒎𝒎𝒎𝒎𝒎𝒎

𝑽𝑽𝑹𝑹𝑹𝑹 𝟓𝟓
𝒐𝒐𝒐𝒐, 𝑹𝑹𝒎𝒎𝒎𝒎𝒎𝒎 = = − − − − − −(𝟏𝟏)
𝑰𝑰𝑳𝑳𝑳𝑳𝑳𝑳𝑳𝑳 𝑰𝑰𝑳𝑳𝑳𝑳𝑳𝑳𝑳𝑳
 Note,
𝑰𝑰 = 𝑰𝑰𝒛𝒛𝒛𝒛 + 𝑰𝑰𝑳𝑳𝑳𝑳𝑳𝑳𝑳𝑳
𝒐𝒐𝒐𝒐, 𝑰𝑰𝑳𝑳𝑳𝑳𝑳𝑳𝑳𝑳 = 𝑰𝑰 − 𝑰𝑰𝒛𝒛𝒛𝒛 = 𝟓𝟓𝟓𝟓 − 𝟏𝟏𝟏𝟏 = 𝟒𝟒𝟒𝟒𝟒𝟒𝟒𝟒

𝟓𝟓 𝟓𝟓𝟓𝟓𝟓𝟓𝟓𝟓 𝟓𝟓𝟓𝟓𝟓𝟓
𝑹𝑹𝒎𝒎𝒎𝒎𝒎𝒎 = = = = 𝟏𝟏𝟏𝟏𝟏𝟏𝛀𝛀
𝟒𝟒𝟒𝟒 × 𝟏𝟏𝟏𝟏−𝟑𝟑 𝟒𝟒𝟒𝟒 𝟒𝟒
Minimum power rating of Zener diode.
It will be decided by the maximum current in Zener.
𝑷𝑷𝒛𝒛 = 𝑽𝑽𝒛𝒛 . 𝑰𝑰𝒛𝒛𝒛𝒛𝒛𝒛𝒛𝒛
= 𝟓𝟓 × 𝟓𝟓𝟓𝟓 𝒎𝒎𝒎𝒎 = 𝟐𝟐𝟐𝟐𝟐𝟐 𝒎𝒎𝒎𝒎
Option (b)

4. A voltage 1000 sin(𝜔𝜔𝜔𝜔) volts is applied across YZ. Assuming ideal

diodes, the voltage measured across WX in volts, is

1 𝑘𝑘Ω
W Y X
Z

+ 1 𝑘𝑘Ω -
(a) sin(𝜔𝜔𝜔𝜔) (c) (sin 𝜔𝜔𝜔𝜔 − |sin 𝜔𝜔𝜔𝜔|)/2
(b) (sin 𝜔𝜔𝜔𝜔 + |sin 𝜔𝜔𝜔𝜔|)/2 (d) 0 for all t
[GATE 2013: 2 Marks]
Soln. Voltage applied across Y – Z terminals 𝒗𝒗𝒊𝒊 = 𝟏𝟏𝟏𝟏𝟏𝟏𝟏𝟏 𝒔𝒔𝒔𝒔𝒔𝒔 𝝎𝝎𝝎𝝎
Diodes are assumed ideal
For positive cycle of the input
All four diodes are Reverse biased
𝑽𝑽𝑾𝑾 − 𝑽𝑽𝑿𝑿 = 𝟎𝟎
𝒐𝒐𝒐𝒐, 𝑽𝑽𝑾𝑾𝑾𝑾 = 𝟎𝟎
For negative cycle of the input
 All diodes are forward biased i.e. short circuited
𝑽𝑽𝑾𝑾𝑾𝑾 = 𝑽𝑽𝑾𝑾 − 𝑽𝑽𝑿𝑿 = 𝟎𝟎
Thus,
VWX is zero for all times
Option (d)

5. The figure shows a half-wave rectifier. The diode D is ideal. The average
steady-state current (in Amperes) through the diode is approximately ___
D

10 sin 𝜔𝜔𝑡𝑡AC R 100Ω

C 4 mF
f = 50 Hz

[GATE 2014: 1 Mark]

Soln. Given,
Input signal = 𝟏𝟏𝟏𝟏 𝒔𝒔𝒔𝒔𝒔𝒔 𝝎𝝎𝝎𝝎
Frequency = 50 Hz
𝟏𝟏 𝟏𝟏
Period of the waveform 𝑻𝑻 = = = 𝟐𝟐𝟐𝟐 𝒎𝒎 𝒔𝒔𝒔𝒔𝒔𝒔
𝒇𝒇 𝟓𝟓𝟓𝟓

Time constant = 𝑹𝑹𝑹𝑹 = 𝟏𝟏𝟏𝟏𝟏𝟏 × 𝟒𝟒 × 𝟏𝟏𝟏𝟏−𝟑𝟑 𝒔𝒔𝒔𝒔𝒔𝒔.

= 400 m sec.
Note here,
RC >> T
Thus the voltage across the resistor can be approximated to 10V
(DC).
 D

+ + 𝑰𝑰𝑫𝑫𝑫𝑫 +
AC
10V 100 Ω 10V 100 Ω
- - -

Current through the diode

𝟏𝟏𝟏𝟏𝟏𝟏
𝑰𝑰𝑫𝑫 (𝑫𝑫𝑫𝑫) = = 𝟎𝟎. 𝟏𝟏 𝑨𝑨
𝟏𝟏𝟏𝟏𝟏𝟏

This circuit is also sometimes called half wave peak detector. In AM

receives it is used to detect envelope of AM wave
Answer 0.1 A

6. Two silicon diodes, with a forward voltage drop of 0.7 V, are used in the
circuit shown in the figure. The range of input voltage Vi for which the
output voltage V0 = Vi is
(a) −0.3 𝑉𝑉 < 𝑉𝑉𝑖𝑖 < 1.3 𝑉𝑉 (c) −1.0 𝑉𝑉 < 𝑉𝑉𝑖𝑖 < 2.0 𝑉𝑉
(b) −0.3 𝑉𝑉 < 𝑉𝑉𝑖𝑖 < 2 𝑉𝑉 (d) −1.7 𝑉𝑉 < 𝑉𝑉𝑖𝑖 < 2.7 𝑉𝑉
𝑅𝑅
+ +

𝐷𝐷1 𝐷𝐷2
𝑉𝑉0 𝑉𝑉0
−1 𝑉𝑉 DC DC

2 𝑉𝑉
- - [GATE 2014: 1 Mark]
Soln. Given,
Forward voltage drop of the given Si diodes is 0.7V
Find, the range of Vi for which output voltage 𝑽𝑽𝟎𝟎 = 𝑽𝑽𝒊𝒊
Let us see the D2 branch of the circuit.
D2 will be forward biased when 𝑽𝑽𝒊𝒊 > 𝟎𝟎. 𝟕𝟕 + 𝟐𝟐 = 𝟐𝟐. 𝟕𝟕𝟕𝟕
 D2 will be Reverse biased when 𝑽𝑽𝒊𝒊 < 𝟐𝟐. 𝟕𝟕𝟕𝟕
See the branch D1
D1 will be forward biased when 𝑽𝑽𝒊𝒊 < −𝟏𝟏 − 𝟎𝟎. 𝟕𝟕 = 𝟏𝟏. 𝟕𝟕𝟕𝟕
D1 will be Reverse biased when 𝑽𝑽𝒊𝒊 > −𝟏𝟏. 𝟕𝟕 𝑽𝑽
When both the diodes will be Reverse biased (both shunt branches
will be open) then 𝑽𝑽𝟎𝟎 = 𝑽𝑽𝒊𝒊𝒊𝒊
Thus, it will happen when
D2 is Reverse biased i.e. 𝑽𝑽𝒊𝒊 < 𝟐𝟐. 𝟕𝟕𝟕𝟕
D1 is Reverse biased i.e. 𝑽𝑽𝒊𝒊 > −𝟏𝟏. 𝟕𝟕𝟕𝟕
Thus,
−𝟏𝟏. 𝟕𝟕𝟕𝟕 < 𝑽𝑽𝒊𝒊 < 𝟐𝟐. 𝟕𝟕𝟕𝟕
Option (d)

7. For the circuit with ideal diodes shown in the figure, the shape of the
output (𝑉𝑉𝑜𝑜𝑜𝑜𝑜𝑜 ) for the given sine wave input (𝑉𝑉𝑖𝑖𝑖𝑖 ) will be
+ +
𝑉𝑉0𝑢𝑢𝑢𝑢
-
0 𝑇𝑇 𝑉𝑉𝑖𝑖𝑖𝑖
0.5 𝑇𝑇
-

(𝑎𝑎) 0 𝑇𝑇 (𝑏𝑏) 0 𝑇𝑇
0.5 𝑇𝑇 0.5 𝑇𝑇

(𝑐𝑐) 0 𝑇𝑇 (𝑑𝑑) 0 𝑇𝑇
0.5 𝑇𝑇 0.5 𝑇𝑇

[GATE 2015: Mark]

Soln. The given circuit can be redrawn as
 D1
a A
Vi -
T Vin Vout 0.5T T
t R t
0.5T D2
+
b B
For +ve half cycle of the input
D1 and D2 are ON
𝑽𝑽𝒐𝒐𝒐𝒐𝒐𝒐 = −𝑽𝑽𝒊𝒊𝒊𝒊
For –ve half cycle of the input
D1 and D2 are off
𝑽𝑽𝒐𝒐𝒐𝒐𝒐𝒐 = 𝟎𝟎𝟎𝟎
Option (c)

8. In the circuit shown below, the Zener diode is ideal and Zener voltage is
6 V. The output voltage V0 (in volts) is _________.
1 𝑘𝑘Ω

+
10 𝑉𝑉 1 𝑘𝑘Ω 𝑉𝑉0

-
[GATE 2015: 1 Mark]
Soln. Given,
Zener voltage = 6 V
Zener diode is reverse biased during its operation. Here with the
applied voltage, the voltage across the Zener diode is
𝟏𝟏 𝑲𝑲𝛀𝛀
𝑽𝑽𝟎𝟎 = × 𝟏𝟏𝟏𝟏𝟏𝟏 = 𝟓𝟓𝟓𝟓
𝟏𝟏𝟏𝟏+𝟏𝟏 𝑲𝑲𝛀𝛀

Diode will be reverse biased but not in the Zener region, so open
circuited.
 Answer Thus, V0 = 5V

9. If the circuit shown has to function as a clamping circuit, then which one
of the following conditions should be satisfied for the sinusoidal signal of
period T?

+ C
-
𝑉𝑉 AC R

(a) RC << T (c) RC = T

(b) RC = 0.35 T (d) RC >> T
[GATE 2015: 1 Mark]
Soln. Observe the following circuit

+ C
-
𝑉𝑉 DC D

This circuit is of a negative clamper.

The present circuit has a load resistor connected in shunt.
When diode is off the capacitor discharges through resistor R. The
output falls exponentially with time constant RC to avoid the
discharge of capacitor significantly
RC >> T
Where T is period of the sinusoidal waveform applied to the given
circuit.
Option (d)

10. The diode in the circuit given below has 𝑉𝑉𝑂𝑂𝑂𝑂 = 0.7 𝑉𝑉 but ideal
otherwise. The current (in mA) in the 4 kΩ resistor is ______.
 𝟐𝟐 𝒌𝒌𝛀𝛀 𝟑𝟑 𝒌𝒌𝛀𝛀
D 𝟏𝟏 𝒌𝒌𝛀𝛀
1 mA

𝟒𝟒 𝒌𝒌𝛀𝛀 𝟔𝟔 𝒌𝒌𝛀𝛀

[GATE 2015: 2 Marks]

Soln. The given circuit is a bridge circuit note that the cross arm product is
same i.e.
𝟐𝟐 × 𝟔𝟔 = 𝟒𝟒 × 𝟑𝟑
12 = 12
So, bridge is balanced
So no current through 1 kΩ resistor
Now current through 4 kΩ resistor will be

𝟗𝟗
𝑰𝑰 = × 𝟏𝟏𝟏𝟏𝟏𝟏
𝟗𝟗 + 𝟔𝟔
𝟗𝟗
= 𝒎𝒎𝒎𝒎 = 𝟎𝟎. 𝟔𝟔 𝒎𝒎𝒎𝒎
𝟏𝟏𝟏𝟏

Answer 0.6 mA
11. In the circuit shown, assume that diodes D1 and D2 are ideal. In the
steady-state condition the average voltage Vab (in Volts) across the 0.5 µF
capacitor is _______.
1 𝜇𝜇𝐹𝐹

D1 D2
50 sin(𝜔𝜔𝜔𝜔)AC

0.5 𝜇𝜇𝜇𝜇

𝒃𝒃 - + 𝒂𝒂
𝑉𝑉𝑎𝑎𝑎𝑎

[GATE 2015: 1 Mark]

Soln. The given circuit can be redrawn as follows:
𝟏𝟏𝟏𝟏𝟏𝟏

+
50 sin(𝜔𝜔𝜔𝜔) AC D1 D2

- 𝟎𝟎. 𝟓𝟓 𝝁𝝁𝝁𝝁

b a
−𝑽𝑽𝒂𝒂𝒂𝒂 +

During –ve half cycle of the applied sinewave input

D1 is forward biased
𝟏𝟏𝟏𝟏𝟏𝟏

Applying KVL
+
-𝑽𝑽 +
𝑪𝑪𝑪𝑪
−𝟓𝟓𝟓𝟓 + 𝑽𝑽𝑪𝑪𝑪𝑪 = 𝟎𝟎
50𝑉𝑉 AC
𝒐𝒐𝒐𝒐, 𝑽𝑽𝑪𝑪𝑪𝑪 = 𝟓𝟓𝟓𝟓𝟓𝟓
-
During +ve cycle of input

Applying KVL
+
-50𝑉𝑉+
𝟓𝟓𝟓𝟓 + 𝟓𝟓𝟓𝟓 − 𝑽𝑽𝒂𝒂𝒂𝒂 = 𝟎𝟎 50𝑉𝑉 AC
𝒐𝒐𝒐𝒐, 𝑽𝑽𝒂𝒂𝒂𝒂 = 𝟏𝟏𝟏𝟏𝟏𝟏𝟏𝟏 -
−𝑽𝑽𝒂𝒂𝒂𝒂 +

Answer 100V
12. In the circuit shown, assume that the diodes D1 and D2 are ideal. The
average value of voltage Vab (in volts) across terminals ‘a’ and ‘b’ is ___.

D1 D2

6𝜋𝜋 sin(𝜔𝜔𝜔𝜔) AC 𝒂𝒂 + 10 𝑘𝑘Ω

- 𝒃𝒃

10 𝑘𝑘Ω 𝑉𝑉𝑎𝑎𝑎𝑎 20 𝑘𝑘Ω

[GATE 2015: 1 Mark]

Soln. During positive cycle of the input
D1 is Forward biased and
D2 is Reverse biased
The circuit reduces to

a
10 𝐾𝐾

𝑽𝑽𝒊𝒊𝒊𝒊 = 𝟔𝟔𝟔𝟔 𝒔𝒔𝒔𝒔𝒔𝒔 𝝎𝝎𝝎𝝎 𝑽𝑽𝒊𝒊𝒊𝒊 AC 10 𝐾𝐾 b

20 𝐾𝐾

𝟏𝟏𝟏𝟏 𝑲𝑲
𝑽𝑽𝒂𝒂𝒂𝒂 = . 𝑽𝑽
𝟏𝟏𝟏𝟏 𝑲𝑲 + 𝟐𝟐𝟐𝟐 𝑲𝑲 𝒊𝒊𝒊𝒊

𝑽𝑽𝒊𝒊𝒊𝒊 𝟔𝟔𝟔𝟔 𝒔𝒔𝒔𝒔𝒔𝒔 𝝎𝝎𝝎𝝎

= = = 𝟐𝟐𝟐𝟐 𝒔𝒔𝒔𝒔𝒔𝒔 𝝎𝝎𝝎𝝎
𝟑𝟑 𝟑𝟑
During negative cycle of the input

D1 is Reverse biased b

D2 is Forward biased
𝑽𝑽𝒂𝒂𝒂𝒂 10 𝐾𝐾
𝟏𝟏𝟏𝟏𝟏𝟏 𝑽𝑽 a
𝑽𝑽𝒂𝒂𝒂𝒂 = . 𝑽𝑽 = 𝒊𝒊𝒊𝒊�𝟐𝟐 𝑽𝑽𝒊𝒊𝒊𝒊 AC 20 𝐾𝐾
𝟏𝟏𝟏𝟏𝟏𝟏 + 𝟏𝟏𝟏𝟏𝟏𝟏 𝒊𝒊𝒊𝒊
𝟔𝟔𝟔𝟔 𝒔𝒔𝒔𝒔𝒔𝒔 𝝎𝝎𝝎𝝎 10 𝐾𝐾
= = 𝟑𝟑𝟑𝟑 𝒔𝒔𝒔𝒔𝒔𝒔 𝝎𝝎𝒕𝒕
𝟐𝟐

V0

𝟑𝟑𝟑𝟑
𝟐𝟐𝝅𝝅

0
 𝟐𝟐𝟐𝟐 𝟑𝟑𝟑𝟑
𝑽𝑽𝒂𝒂𝒂𝒂 = + = 𝟓𝟓 𝒗𝒗𝒗𝒗𝒗𝒗𝒗𝒗𝒗𝒗
𝝅𝝅 𝝅𝝅
Answer: 5 volts

13. Assume that the diode in the figure has 𝑉𝑉𝑜𝑜𝑜𝑜 = 0.7 𝑉𝑉, but is otherwise
ideal.

R1
i2
𝟐𝟐 𝒌𝒌𝛀𝛀
DC 𝟐𝟐 𝐕𝐕 R2
𝟔𝟔 𝒌𝒌𝛀𝛀

The magnitude of the current i2 (in mA) is equal to ________

[GATE 2016: 1 Mark]
Soln. The given circuit can be redrawn as

2𝑉𝑉 DC
𝟐𝟐𝟐𝟐𝛀𝛀

𝟔𝟔𝑲𝑲𝛀𝛀
Thevenin equivalent

This circuit can be further simplified using Thevenins theorem

𝟐𝟐𝟐𝟐‖𝟔𝟔𝟔𝟔

𝟐𝟐 × 𝟐𝟐 𝟒𝟒
DC
= = 𝟎𝟎. 𝟓𝟓𝟓𝟓
𝟔𝟔 + 𝟐𝟐 𝟖𝟖
 Voltage across diode is 0.5V thus the diode is OFF. The circuit
reduces to

2𝐾𝐾
DC

6𝐾𝐾

𝒊𝒊𝟐𝟐

The current through 6 K

𝟐𝟐 𝟐𝟐
𝒊𝒊𝟐𝟐 = = = 𝟎𝟎. 𝟐𝟐𝟐𝟐 𝒎𝒎𝒎𝒎
𝟐𝟐𝟐𝟐 + 𝟔𝟔𝟔𝟔 𝟖𝟖𝟖𝟖
Answer: 0.25 mA

14. The diodes D1 and D2 in the figure are ideal and the capacitors are
identical. The product RC is very large compared to the time period of the
ac voltage. Assuming that the diodes do not breakdown in the reverse
bias, the output voltage V0 (in volt) at the steady state is ___________
D1

𝟏𝟏𝟏𝟏 𝐬𝐬𝐬𝐬𝐬𝐬(𝝎𝝎𝝎𝝎) C +
AC

R V0
C -
D2
[GATE 2016: 1 Mark]
Soln. Diodes D1 and D2 are ideal. The above circuit can be redrawn as
 + V0
𝟏𝟏𝟏𝟏 𝐬𝐬𝐬𝐬𝐬𝐬(𝝎𝝎𝝎𝝎) AC 10V 10V
- + +
- -
During positive cycle of input D1 and D2 are shorted thus 𝑽𝑽𝟎𝟎 = 𝟎𝟎𝟎𝟎
During negative cycle the diodes are reverse biased
𝑽𝑽𝟎𝟎 = 𝟎𝟎𝟎𝟎
Thus 𝑽𝑽𝟎𝟎 = 𝟎𝟎𝟎𝟎 all the times

15. The figure shows a half-wave rectifier with a 475 µF filter capacitor. The
load a draws a constant current I0 = 1 A from the rectifier. The figure also
shows the input voltage Vi the output voltage Vc and the peak-to-peak
voltage ripple u on Vc. The input voltage Vi is a triangle-wave with an
amplitude of 10V and a period of 1 ms.

+ 10V Vi

0 t
- 10V

VC
u

0 t
The value of the ripple u (in volts) is ______.
[GATE 2016: 2 Marks]
Soln. Given,
Half wave rectifier circuit
Filter capacitor = 475 µF
Load draws constant current of 1 Amp.
The input voltage is triangular.
Output voltage Vc is given
One has to determine ripple (peak to peak)
Amount of charge lost by the capacitor should be equal to the charge
gained during charging i.e
𝑰𝑰𝒅𝒅𝒅𝒅 . 𝑻𝑻 = 𝑽𝑽𝒓𝒓(𝒑𝒑−𝒑𝒑) . 𝑪𝑪

𝑰𝑰𝒅𝒅𝒅𝒅 . 𝑻𝑻 𝟏𝟏𝟏𝟏 .× 𝟏𝟏 × 𝟏𝟏𝟏𝟏−𝟑𝟑

𝑻𝑻𝑻𝑻𝑻𝑻𝑻𝑻, 𝑽𝑽𝒓𝒓 (𝒑𝒑−𝒑𝒑) = =
𝑪𝑪 𝟒𝟒𝟒𝟒𝟒𝟒 × 𝟏𝟏𝟏𝟏−𝟔𝟔
𝟏𝟏
= × 𝟏𝟏𝟏𝟏𝟑𝟑 = 𝟐𝟐. 𝟏𝟏𝟏𝟏
𝟒𝟒𝟒𝟒𝟒𝟒