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IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 17, NO.

2, APRIL 2002 537

A Power Electronic-Based Distribution Transformer


Edward R. Ronan, Member, IEEE, Scott D. Sudhoff, Member, IEEE, Steven F. Glover, and
Dudley L. Galloway, Member, IEEE

Abstract—The distribution transformer has been in use by util-


ities throughout the twentieth century. Until now, it has consisted
of a configuration of iron or steel cores and copper/aluminum
coils, with mineral oil serving as both coolant and dielectric
medium. Inherent in this type of construction are regulation,
significant weight, losses, environmental concerns, and power
quality issues. For the 21st century, a new kind of distribution
transformer is proposed; one that can be made self-regulating,
oil-free, and able to correct power quality problems. A power
electronic transformer has been analyzed, simulated, prototyped,
and tested. Results of this effort as well as the novel features of
this new type of transformer are discussed herein.
Index Terms—Converters, power conversion, power electronics, Fig. 1. AC/ac buck converter.
transformers.

be economical in the future, particularly in view of its enhanced


I. INTRODUCTION capabilities versus the traditional transformer.

D ISTRIBUTION transformers are fundamental compo-


nents of the power distribution system and are relatively
inexpensive, highly reliable, and fairly efficient. However,
II. BACKGROUND
The idea of a “solid-state transformer” has been discussed for
they possess some undesirable properties including sensitivity some time. Nearly 20 years ago, Navy researchers [2] proposed
to harmonics, voltage drop under load, (required) protection a power-electronic transformer that consisted of an ac/ac buck
from system disruptions and overload, protection of the system converter shown in Fig. 1 to reduce the input voltage to a lower
from problems arising at or beyond the transformer, envi- one. This was followed in 1995 by a similar EPRI sponsored
ronmental concerns regarding mineral oil, and performance effort [3]. Both of these efforts yielded working prototypes, but
under dc-offset load unbalances [1]. These disadvantages are they operated at power and primary voltage levels that were or-
becoming increasingly important as power quality becomes ders of magnitude below utility distribution levels.
more of a concern. This paper introduces the architecture of The ac/ac buck converter is perhaps the most direct approach
a power-electronics based transformer that is insensitive to to single phase ac power conversion. In this arrangement,
harmonics, keeps user-induced harmonics from propagating switches and are bidirectional. Turning a switch on
into the power system, keeps system harmonics from prop- permits it to conduct current in either direction. Conversely,
agating to the user, performs input power factor correction, turning it off can block voltage of either polarity. In Fig. 1,
has zero regulation, prevents user faults from affecting the the two devices tied in series indicate an arrangement of some
power distribution system, can supply loads with dc offsets, number of semiconductors that would be needed to achieve the
and does not utilize mineral oil or other liquid dielectrics. This desired voltage ratings. (The number of devices required would
architecture was used in the design of a 10-kVA, 7.2-kV to be a function of voltage level and the type of semiconductor).
240/120-V distribution transformer. The performance of the The bidirectional switches and are alternately turned
design is established using computer simulation and has been on at a high frequency relative to the fundamental component
validated in hardware. Although the design is considerably of the voltage and current waveforms. Under these conditions,
more expensive than a conventional distribution transformer it can be shown that
and currently less efficient, falling costs and improved perfor-
mance of switching semiconductors will enable the design to
(1)

Manuscript received November 15, 1999; revised September 25, 2001. This
work was supported by ABB. where is the duty cycle (the time the upper switch is on rel-
E. R. Ronan is with the University of Missouri–Kansas City, Kansas City, ative to the switching period) and “ ” designates the phasor
MO 64110 USA. representation of the fundamental component.
S. D. Sudhoff and S. F. Glover are with the Department of Electrical Engi-
neering and Computer Science, Purdue University, West Lafayette, IN 47907 Although this is the most straightforward approach to ac–ac
USA. power conversion, it is problematic in several respects. First,
D. L. Galloway was with ABB, Inc, Jefferson City, MO 65101 USA. each switch must be able to block full primary voltage and also
He is now at Galloway Transformer Technology, LLC, Jefferson City, MO
65110-5946 USA (e-mail: gallowaytt@aol.com). be capable of conducting full secondary current. The fact that
Publisher Item Identifier S 0885-8977(02)02713-9. both the blocking voltage and peak current are large implies that
0885–8977/02$17.00 © 2002 IEEE
538 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 17, NO. 2, APRIL 2002

Fig. 2. High-frequency modulated AC/ac transformer.

this design would be very costly. A convenient way of quanti-


fying this is by the stress factor defined by Kassakian [4]. In
the case of the ac/ac buck converter applied to a 7200-V pri-
mary distribution line, the stress factor would be very high, in
the range of 120 (VA of semiconductor product per VA of output
power). This disadvantage could be partially mitigated by per- Fig. 3. Three-stage solid state transformer.
forming the power conversion in several stages, although such
a tactic complicates the design.
essary. Second, because of the three-stage topology and the
Other drawbacks of this approach include the use of series-
unique capabilities of each stage, the total stress factor is much
tied devices, which are often difficult to control, the lack of
lower than it would be for the ac/ac chopper. In particular,
magnetic isolation, inability to correct load power factor, and
input-stage devices see high voltage but low current, while
inability to prevent load harmonics from propagating into the
output-stage devices see high current but low voltage. For a
primary-voltage system. In view of these disadvantages, the
7200-V transformer, a typical stress-factor value would be
ac/ac buck converter is not practical for distribution transformer
17.5; about fifteen percent of the stress factor for a comparable
applications.
ac/ac buck converter. Third, the plurality of input stage modules
Another attempt at high-power ac/ac conversion has been
can be used to achieve an effective switching frequency that
recently proposed in [5]. For that topology, shown in Fig. 2,
is many times the actual switching frequency—an effect that
the incoming ac waveform is modulated by a power-electronic
can be used to make the switching losses of the input stage
converter to a high-frequency square wave and passed through
nearly inconsequential. Similarly, the frequency as well as the
a small high-frequency transformer. Another converter, syn-
duty cycle of the isolation stage can be varied to minimize
chronous with the high-voltage side but at a lower voltage,
losses of this stage as a function of load. Fourth, unlike some
demodulates it. This scheme has the benefit of reducing the
solid-state transformer designs, magnetic isolation is achieved
transformer size and weight and the stress factor is more
between the primary and secondary. In addition, although not
reasonable, but it does not provide any benefits in terms of
incorporated into this design, the low voltage dc bus would
control or power-factor improvement.
be an excellent point to add energy storage to enhance the
ride-through capability of the power electronic transformer.
III. PROPOSED TOPOLOGY Finally, it is evident that the same general design could be used
The transformer design proposed herein is shown in block to deliver three-phase power from a single-phase source.
diagram form in Fig. 3. As can be seen, this is a three-part design Advantages of this solid-state transformer over its more tra-
that utilizes an input stage, an isolation stage, and an output ditional counterpart include the fact that the output voltages are
stage. Furthermore, the input and isolation stages are themselves sinusoidal regardless of the input power quality or the output
divided into several input and isolation modules. current waveshape. This is because the controls on the output
In the input stage, the primary voltage is divided equally be- stage actively suppress output voltage harmonics. Conversely,
tween the input stage modules. Each module’s voltage is rec- by suitable control of the input stage the input current is sinu-
tified using a unity-power factor rectifier. Each isolation stage soidal and of unity power factor, regardless of the output current
module generates a high-frequency square wave from the in- waveshape. In addition, current limiting at the output and input
coming dc, transforms and isolates it, and re-rectifies the trans- stages is readily used to prevent secondary faults from propa-
former output. The bipolar dc outputs can then be connected in gating through the transformer.
parallel to supply the output stage. The series to parallel con- For a sample design in which the input voltage was 7.2 kV
nection provides the bulk of the voltage reduction. and the output voltage was 240/120 V, both typical of utility dis-
The output state converts the resulting bipolar low-voltage dc tribution systems in the U.S., 12 input/isolation modules were
into single-phase ac with a groundable mid-tap. utilized. The dc connection between each input and isolation
The three-stage topology described herein has many at- module pair was designed to operate at 1000 V and the output
tractive features. First, series-tied semiconductor devices are of each isolation stage would be set at 550 V. At this point, the
avoided because the voltage on the individual modules is design of each of the stages of this design will be considered
reduced to the point where series tying of devices is unnec- separately.
RONAN et al.: POWER ELECTRONIC-BASED DISTRIBUTION TRANSFORMER 539

Fig. 6. Isolation stage module.


Fig. 4. Input stage module.

Fig. 7. Isolation stage control.

Fig. 5. Input stage control overview. frequency is times the actual switching frequency, where
is the number of modules in the stage. As a result, switching
A. Input Stage Design losses in the input stage are minimal. Voltage division is aided
by varistors placed across the input of each module. These de-
Each input stage module consists of a unity power factor ac- vices are only active during significant imbalances that might
tive rectifier [6] shown in Fig. 4. By control of the active switch occur, for example, during startup.
in the boost converter portion, current entering the rectifier can
be shaped into a sinusoid while the output voltage is regulated. B. Isolation Stage Design
An overview of the control system for the input stage is shown
in Fig. 5. Direct current from each input module is fed to a full bridge
In the voltage regulator, the output dc voltage is compared converter in the isolation stage module, shown in Fig. 6. This
with the required level and used to formulate the input cur- converter provides a high-frequency square wave to a small air-
rent magnitude command , which is in turn passed to the cooled transformer that reduces the voltage approximately in
current command synthesizer. In parallel with this process, the half while providing the needed isolation. The high frequency
voltage observer extracts the shape of the fundamental compo- transformer’s secondary (which is center tapped) is then recti-
nent of the input voltage waveform. There are three signals as- fied to form a bipolar dc supply. The series to parallel connection
sociated with the voltage observer; the estimated instantaneous of the isolation stage provides the bulk of the voltage reduction
value of the waveform obtained as the absolute value of the without a large transformer turns ratio.
fundamental component of the input voltage, an estimate of the The isolation stage converter control has two distinct parts as
time derivative of , designated , and the peak value of shown in Fig. 7. First, the duty cycle control regulates the duty
over a cycle . cycle of the square-wave voltage so as to achieve the desired
The current command synthesizer utilizes , , and output voltage . Second, the switching frequency control
to formulate an instantaneous current command , as well as slowly varies the switching frequency as a function of load to
an estimate for the derivative of this command . The current optimize isolation stage efficiency.
command and its derivative are calculated as One subtlety of the control is that, since the isolation stage
control is based on regulating , the individual dc voltages
(2) are not regulated. However, by proper choice of the voltage set
point, a significant imbalance of the individual rail voltages (as
(3) would occur if the output stage supplied a 120-V half-wave rec-
tifier) can be tolerated without adverse effects.
The current command , its time derivative , and are
inputs to a duty cycle synthesizer which formulates the duty- C. Output Stage Design
cycle command to control the relative amount of time each of The paralleled bipolar dc output from the isolation modules
the modules is “on” to insure that the rectifier current is equal is fed into a single-module output stage, shown in Fig. 8. As
to the commanded current. can be seen, this stage consists of two halves to produce
One of the features of the input stage is that the switching and , respectively. The two converter halves, as well as
of input-stage modules is staggered so the effective switching their controls, operate independently. The ground, or mid-tap, is
540 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 17, NO. 2, APRIL 2002

TABLE I
PRINCIPAL PARAMETERS

Fig. 8. Output stage.

Fig. 9. Output stage control.

carried from the midpoint of the isolation modules and is used


in the control system for each of the output legs.
Control of the output stage is by means of a load current feed
forward, proportional voltage error feedback algorithm shown
in Fig. 9. (There are identical controls for each leg). Therein, “ ”
can be replaced by “ ” or “ ,” as appropriate. Although
only proportional feedback is used, the presence of feedforward
compensation of the load current causes the error in the voltage
waveform to be minimal. The current command is also limited Fig. 10. Simulated full load operation, output.
to prevent overcurrents. The final output of this algorithm is the
current command to a hysteresis current control. The cur- to the hysteresis switching; because of the load inductance the
rent control, which has hysteresis level of Amperes, forces load current is nearly a perfect sinusoid. Because of the type
the actual current to be very close to the commanded level. The of control chosen, a range of higher-order harmonics is evident
commanded voltage output is synthesized using a waveform in the figure. The hysteresis band could be set smaller to reduce
generator, and can be phase locked to the input voltage for syn-
the voltage ripple, but at the cost of a higher hysteresis switching
chronization.
frequency and consequent higher switching losses.
Fig. 11 illustrates the input voltage and current for the same
IV. SIMULATED PERFORMANCE conditions. Although the output current clearly lags the voltage,
To evaluate the expected performance of the power-electronic the input current is approximately in phase. This steady-state
based transformer, or solid state transformer (SST), the design simulation demonstrates that the input current for this power
was simulated to predict steady state and transient performance. electronics based transformer is sinusoidal and in phase with the
The simulation language used was ACSL [7], which is a gen- input voltage, regardless of load power factor. The input current
eral purpose state-variable based simulator. All switches and waveform has some visible switching noise as a result of the
diodes as well as all passive devices were included in the sim- waveform-shaping topology selected, but all of the frequency
ulation. The resulting model constitutes a 103rd order system. components are well above the fundamental.
Descriptions and values of the principal parameters are set forth Fig. 12 depicts the performance of the system during a step
in Table I. change in load. Initially, the load draws 25% of rated current. At
Fig. 10 depicts the simulated steady state output voltage and t=0.5s, the load is doubled. As can be seen the output voltage is
current for nominal input voltage when both output phases are essentially unaffected.
connected to loads of rated complex power and 0.8 power Figs. 13 and 14 demonstrate performance of the transformer
factor (lagging). The voltage waveform has a small ripple due during a fault at the output. In this study, the system fed a bal-
RONAN et al.: POWER ELECTRONIC-BASED DISTRIBUTION TRANSFORMER 541

anced load in steady state. A fault was applied to both legs of the
secondary, then cleared after 0.15 s. The fault was represented as
a very low resistance for convenience. As can be seen in Fig. 13,
the output stage control has effectively limited the fault current
(lower trace) to a level that can be tolerated by the semiconduc-
tors. Corresponding input traces are shown in Fig. 14. These
demonstrate that the input current and power during this event
are quite small. The current flowing supplies the power being
dissipated by the low-impedance fault as well as system losses.
There is no current surge on the primary, typical of a fault on
a conventional distribution transformer, so the feeder voltage
would not be affected by this fault event. New protective algo-
rithms would be required to recognize and isolate the fault in an
Fig. 11. Simulated full load operation, input.
appropriate manner.
In regard to efficiency of the design, simulation studies have
shown that the input stage efficiency should be very high (99%)
and that the efficiency of this stage will be relatively flat with
power level. The isolation stage efficiency is somewhat lower,
on the order of 97% at one-quarter load and approximately 98%
at full load. The output stage is the least efficient; just over
96% at full load. The combined efficiency of the SST described
herein should be able to exceed 90%. To achieve greater effi-
ciencies in a SST, soft switching could be employed to reduce
switching losses in the isolation and output stages. The use of
(new) high-voltage silicon-carbide (SiC) Shottkey diodes would
also significantly reduce switching losses.
The initial design and prototype were set at 10 kVA, but exten-
sion to the entire range of single-phase distribution transformer
Fig. 12. Suddenly applied load (output), simulated. ratings is possible with the general topology chosen. For higher
voltages, more input-stage modules (or higher-voltage semi-
conductors) would be used. For higher capacity, larger devices
could be employed within the same topology. Eventually, par-
alleled devices would be necessary—particularly for the output
stage. Until higher efficiencies can be achieved, supplemental
cooling would be needed at higher ratings. As capacity is in-
creased, the overall system efficiency should rise since controls
and other overhead would consume a decreasing proportion of
the input power.

V. MEASURED PERFORMANCE
Fig. 15 illustrates a prototype constructed to demonstrate the
solid-state transformer system. In this prototype, the layout was
Fig. 13. Simulated fault performance, output. spread out to facilitate design modifications and to allow ex-
tensive measurements. The transformer has been operated as an
integrated unit at one-half rated voltage. The presence of high
levels of electro-magnetic interference (EMI) precluded opera-
tion of this early prototype at full voltage, although all compo-
nents were individually tested to that level.
Fig. 16 illustrates the output waveforms of the initial pro-
totype at one-half rated voltage, 0.4 per-unit load power and
0.89 pf. The output waveforms are comparable to those pre-
dicted, with a small ripple evident on both current and voltage
due to the switching of the output-stage converter.
The input voltage and current are displayed in Fig. 17. The
input current and particularly the voltage contain much more
ripple than is predicted by the simulation. The cause of this is
Fig. 14. Simulated fault performance, input. that, in the experimental set-up, the transformer was supplied
542 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 17, NO. 2, APRIL 2002

Fig. 18. Sudden application of load at 1/2 rated voltage.

Fig. 15. Prototype solid state transformer.

Fig. 16. Measured output at 1/2 rated voltage.

Fig. 19. Unbalanced load output at 1/2 rated voltage.

mentioned above, partially due to EMI present in the experi-


mental set-up that caused switching errors. These problems are
results of the way the prototype was constructed. Solutions of
all of these problems have been identified and are being incor-
porated into a second-generation prototype.
Despite these difficulties, tests of the prototype where load
was suddenly applied or removed showed that the power elec-
tronic transformer could eliminate detrimental results such as
voltage dips and flicker. Fig. 18 shows the output waveforms for
a load that was suddenly increased from 25% to 50% at one-half
rated voltage and unity power factor. There is no visible change
in the output voltage in either test. The ability to mitigate flicker
and other side-effects of stepped loads is limited only by the
Fig. 17. Measured input at 1/2 rated voltage. ability of the current modulator to track rapidly-changing cur-
rent commands. In general, this ability is quite good, so the re-
by a very high impedance source comprised of the nominal sponse of the voltage control is excellent.
impedance looking into the utility, a variac with a very high The prototype was further tested under unbalanced load con-
leakage inductance, a step up transformer, and a series resistor. ditions. A load at 0.8 pf that drew 50% of rated current was
Elimination of these elements from the test procedure will be placed on the positive side (rail to neutral) of the output, while
possible once the prototype can reach full operating voltage. the other side was given only a very small load (less than one
The input voltage and current traces, despite the presence of percent). Fig. 19 shows output voltages and currents for this
noise, show that the power factor seen at the output is not re- loading. As can be seen, voltage on the positive and negative
flected to the input and that the current waveform is (in this rails remained equal, despite the extreme imbalance.
case, roughly) sinusoidal. The low-frequency ripple in the cur- The input voltage and current were essentially unaffected
rent waveform is partially a result of the source-voltage drop by the unbalance on the output, thanks to the presence of the
RONAN et al.: POWER ELECTRONIC-BASED DISTRIBUTION TRANSFORMER 543

two intermediate dc buses and the isolation-stage control de- [11] S. F. Glover and S. D. Sudhoff, “An experimentally validated nonlinear
scribed earlier. Experiments also confirmed that the prototype stabilizing control for power electronics based power systems,” in Proc
SAE Aerosp. Power Syst. Conf, 1998.
performed well under loads with extreme dc offsets, such as [12] S. D. Sudhoff, “Solid state transformer,” U.S. Patent no. 5 943 229, Aug.
would be encountered with half-wave rectifiers. 24, 1999.

VI. CONCLUSIONS AND FUTURE WORK


Detailed simulations as well as a working prototype have Edward R. Ronan (M’85) received the B.S. degree in electrical engineering
confirmed that the power electronic transformer described from Rice University, Houston, TX, in 1963 and the Ph.D. degree in electrical
herein could provide desirable features that are currently not engineering from the University of Missouri–Rolla, in 2000.
available in distribution transformers. Among these features He is a Visiting Assistant Professor at the University of Missouri–Kansas
City. He had been employed by the Westinghouse Distribution Transformer Di-
are self-protection, excellent power quality at both input vision, Jefferson City, MO, and later with ABB at the same location, for 28 years
and output, power-factor correction, and elimination of oil in various capacities. His research interests are in the area of utility distribution
systems.
as a dielectric and coolant. Currently, the construction of a
second-generation EMI-hardened design is being pursued.
Improvements in printed-circuit-board layout and elimination
of most of the original design’s analog control circuitry should
Scott D. Sudhoff (M’88) received the B.S.E.E., M.S.E.E., and Ph.D. degrees
yield significant improvement. Interesting future questions that from Purdue University, West Lafayette, IN, in 1988, 1989, and 1991, respec-
remain include investigating ways to increase efficiency (partic- tively.
ularly in the output stage, for which techniques are available). From 1991 to 1993 he served as a Half-Time Visiting Faculty at Purdue Uni-
versity. From 1993 to 1997, he served as an Assistant Professor at the University
As the design matures, one interesting concern is whether the of Missouri–Rolla. Later in 1997, he joined the Faculty at Purdue University,
high-bandwidth constant power nature of the load could lead where he serves as a Professor in electrical engineering and computer science.
to negative impedance instabilities such are commonly seen in His interests include the analysis, simulation, and design of electric machinery,
drive systems, and finite inertia power systems. He has authored or co-authored
dc systems [8], and occasionally in power-electronics based ac over 40 journal papers in these areas.
systems [9]. These types of instabilities are often best studied
using admittance space techniques [10]. If this does prove
problematic, it should be possible to eliminate the instability
using the techniques set forth in [11]. Steven F. Glover received the B.S. and M.S.E.E. degrees (honor scholar,
summa cum laude) in electrical engineering from the University of Mis-
souri–Rolla (UMR), in 1995 and 1997, respectively. He is currently pursuing
REFERENCES the Ph.D. degree in electrical engineering from Purdue University, West
[1] Blue-Sky Workshop, Raleigh, NC, Dec. 1996. Lafayette, IN.
[2] J. L. Brooks, “Solid state transformer concept development,” in Naval In 1997, he served as an Associate Research Engineer for UMR and Paul C.
Material Command. Port Hueneme, CA: Civil Eng. Lab., Naval Con- Krause and Associates (P.C.K.A.). Since 1998, he has worked as a Research
struction Battalion Center, 1980. Engineer for Purdue University and P.C.K.A. His interests include analysis, de-
[3] “Proof of the principle of the solid-state transformer and the AC/AC sign, and control of electromechanical systems, drives, and power systems.
switchmode regulator,” San Jose State Univ., San Jose, CA, EPRI
TR-105 067, 1995.
[4] J. G. Kassakian, M. F. Schlecht, and G. C. Verghese, Principles of Power
Electronics. Reading, MA: Addison-Wesley, 1991.
[5] M. Kang, P. N. Enjeti, and I. J. Pitel, “Analysis and design of electronic Dudley L. Galloway (S’62–M’66–M’91) received the B.S. degree in electrical
transformers for electric power distribution system,” in Proc. IEEE In- engineering from Lehigh University, Bethlehem, PA, and the M.S. degree in
dustry Applicat. Soc. Annu. Meet., Oct. 1997. engineering management from the University of Missouri–Rolla, in 1964 and
[6] C. P. Henze and N. Mohan, “A digitally controlled AC to DC power con- 1977, respectively.
ditioner that draws sinusoidal input current,” in Proc. 17th IEEE Power He joined the Westinghouse Transformer Plant in Sharon, PA, in 1965, and
Electr. Specialists Conf., Piscataway, NJ, 1986, pp. 531–540. moved to the Jefferson City, MO, plant (now ABB Inc.), in 1972. He holds seven
[7] “Advanced continues simulation language,” Aegis Res. Corp. U.S. Patents related to transformer design and construction. His recent work has
[8] R. D. Middlebrook, “Input filter considerations in design and application been in fuse application and coordination, thermal loading and design optimiza-
of switching regulators,” in Proc. IASAM, 1976. tion, and the effects of harmonic loading on distribution transformers. He has
[9] M. Belkyayat and O. Wasynczuk, “Stability analysis of AC power authored several articles and technical papers on these subjects including the
systems with regulated electronic loads,” SAE Trans., J. Aerosp., pp. “distribution transformers” subsection of the Electric Power Engineering Hand-
116–123, 1998. book (Boca Raton, FL, CRC Press). He is presently an Independent Consultant.
[10] S. D. Sudhoff, D. H. Schmucker, R. A. Youngs, and H. J. Hegner, “Sta- Mr. Galloway is a member of the IEEE Power Engineering Society and the
bility analysis of DC distribution systems using admittance space con- IEEE Transformers Committee, as well as several ANSI C57 working groups
straints,” in Proc. Inst. Marine Eng., All Electric Ship, London, U.K., and the Canadian Electricity Association Distribution Transformer Working
Sept. 29–30, 1998. Group.

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