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TTL Technology
The nominal value of the dc supply voltage ‘VCC’ is +5V. Each gate of the IC is connected to
‘VCC’ and GND as shown below.
There are four different logic-level specifications for each state (High and Low)
High State:
VOH (High Level Output Voltage): The minimum voltage level at a logic circuit output in the
Logic ‘1’ state. (VOH-min = 2.4V)
IOH (High Level Output Current): The current that flows from the output in the logic ‘1’ state.
VIH (High Level Input Voltage): The minimum voltage level required for logic ‘1’ at the input.
(VIH-min = 2V)
IIH (High Level Input Current): The current that flows into an input when VIH is applied at it.
VOL (Low Level Output Voltage): The maximum voltage level at a logic circuit output in the
Logic ‘0’ state. (VOL-max = 0.4V)
IOL (Low Level Output Current): The current that flows from the output in the logic ‘0’ state.
VIL (Low Level Input Voltage): The maximun voltage level required for logic ‘0’ at the input.
(VIL-max = 0.8V)
IIL (Low Level Input Current): The current that flows into an input when VIL is applied at it.
Example:
Power Dissipation:
Total power supplied to the IC. A logic IC draws current from the dc power supply ‘VCC’ when the
output is High and Low as shown below.
ICCH: The supply current when all outputs on the IC chip are high state.
ICCL: The supply current when all outputs on the IC chip are Low state.
I CCH I CCL
I CC
2
PD I CC VCC
When a signal passes (propagate) through a logic circuit, it always experience a time delay as shown
below.
tPLH : The time between a specified reference point on the input pulse and a corresponding reference
point on the output pulse , with the output changing from the LOW level to the HIGH level.
tPHL : The time between a specified reference point on the input pulse and the corresponding
reference point on the output pulse , with the output changing from HIGH level to the LOW
level.
The propagation time delay ‘tP’ can be defined as the average of these two times that is
t PLH t PHL
tP
2
Speed-Power Product
ELEC 224 5 J. Altiti
It is generally desirable to have high speed (short delay time) and low power (lower supply voltage)
loigc gates. So the samller the ‘tP‘ and the lower ‘PD‘ values the better the performance of the gate.
Fan-Out
Fan-Out: The number of load gate inputs that a given gate can drive. When the output of a logic gate
is connected to one or more inputs of other gates, a load on the driving gate is created as shown
below.
The of the above discussion on TTL applies to the CMOS technology. CMOS uses several nominal
value of the dc supply voltage ‘VCC’ is 5V, 3.3V, 2.5V and 1.2V.
5V COMS
3.3V COMS