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An OP Amp-less Band-gap Voltage Reference

with High PSRR and Low Voltage


Xu Min , Yang Wei-ming*, Yang Wu-tao, Zou Jing, Zhou Yi-chuan
School of Physics and Electronic Technology, Ferroelectric & Piezoelectric Material and Device of Hubei Province
Hubei University
Wuhan, 430062, P.R. CHN
*Corresponding author, Email: ywmwy@sina.com

Abstract- With the trend of low-power, low-voltage in in order to improve PSRR, a high performance op amp
IC design, conventional band-gap voltage reference will with high gain and high speed and low offset is desired.
not be the most suitable candidate anymore. In this paper, This trades off the circuit complex and power
an op amp-less band-gap voltage reference is designed in dissipation. So the Op Amp-Less Band-gap is
0.35um 5V/3.3V CMOS process. After the principle and presented. In this paper, an op Amp-less Band-gap
stability of the voltage reference is introduced, the power voltage reference with high PSRR and low voltage is
supply noise rejection ratio (PSRR) and temperature designed in 0.35um 5V/3.3V CMOS process.
coefficient in low voltage supply are analyzed too. The
simulation results indicate that the temperature range is II. THE PRINCIPLE OF PRE-REGULATOR AND THE
-40 to 125 , the reference voltage is 1.166V~1.171V STABILITY OF THE BANDGAP REFERENCE
and the PSRR is 104dB at 1KHz when the supply voltage
range is 2.5V±10%. So the proposed op amp-less A. The principle of pre-regulator
band-gap reference has the features of high- PSRR,
In order to meet the goals of low supply voltage
low-voltage and low temperature coefficient. It is very
and low power dissipation in mixed signal system, it is
suitable to be applied in low voltage ADC and DAC.
desirable to use a simple circuit configuration without
I. INTRODUCTION operational amplifier. The proposed circuit is shown in
Fig.1. This circuit has a high PSRR over relatively
Reference voltage generators are used in many broad frequency range in order to reject noise from the
analog circuits, such as high precise comparators, A/D high speed digital circuits on the chip. The band-gap
convertors, DRAMs, flash memory circuits, and other operates from an internal pre-regulated supply VREG in
analog circuits. The band-gap reference is the most order to improve PSRR. The band-gap core comprises
popular circuit. The conventional band-gap reference two feedback loops for equality of voltage at node A
circuit composed of an op-amp, two bipolar transistors and B. One is a positive feedback loop including M1,
and resistors, the bipolar transistor is implemented in M2, M4, another is a negative feedback loop including
[1, 2]
CMOS technology, and is connected as diode . M9, M8, M5, M4, M1. The voltage of VREG is stabled by
With the improvement of the performance PSRR, it a main negative loop including M5, M3 and the current
has been used widely in band-gap circuits. In normal of node VREG is supplied by M12 which mirrors the
application, the op amp is just a basic differential input PTAT current through M18. The start-up circuit is
operational amplifier, but in low voltage application, composed of M11, M14, M15, M16, M17. If the negative
feedback gain is larger than the positive one, the written as follows.
equality of voltage at node A and B can be achieved.
( g m 4 − g m8 ) + g m 4 g m8 ro9
In Fig.1, suppose S represents the aspect ratio of A = − g m3 rreg (4)
g m 4 (1 + g m8 ro9 )
the transistor, according to the stable condition, VA=VB,
S1: S2: S9 =2:1:2, I1: I2: I9 = 2:1:2, S4: S5: S8 = 2:1:2, so Where, rreg is the resistance seen at node VREG. M12,
gm1=gm9=2gm2. If VA>VB, the effective VGS of M1, M2 M13 and M18 mirror the PTAT current for VREG.
and M9 would increase, and the negative feedback will
make it stable. The positive loop gain is given as: III. THE MAIN PERFORMANCES OF OP AMP-LESS
gm2 BAND-GAP REFERENCE
Av (+) = rC g m 4 rD (1)
1 + g m 2 ( R1 + reb 2 )
A. Low Voltage Structure
Where, rC is the resistance at node C, rD is the
resistance at node D; reb2 is the total emitter resistance
The minimum power supply voltage can be
of Q2. The negative loop gain is
expressed as:
g m9 1
Av (-) = ( // ro 9 ) g m 5 rC g m 4 rD (2) VDDmin=Veb3+VOV3+VOV6+VOV12+VTN+VTP (5)
1 + g m9 reb 4 g m8
Where VOV3, VOV6, VOV12 represent the over driven
Where ro9 represents the resistance seen into drain of M9,
voltages of M3, M6, M12, respectively. Given,
1
reb4 is the emitter resistance of Q4. Since << ro 9 , Veb3=0.75V, VTN=0.63V, VTP=0.52V and
g m8
VOV3=VOV6=VOV12=0.2V, then VDDmin=2.5V. In Fig.2,
gm9=2gm2, and the area ratio of M8 and M5 is 2:1, then
gm8=2gm5, thus the source of M3 cannot be connected to the ground
g m2 because the minimum voltage of node C is:
Av(-) = rC g m 4 rD (3)
1 + g m 2 reb 4 VCmin= Veb1+ VTN +VOV1 -VTP1.1V (6)

Comparing equation (1) and (3), we can find that Av(-) However, if the source of M3 is connected to the

is larger than Av(+). So the voltage of node A can ground, the voltage of node C will clamp to

reach equality with the one of node B by adjustment. VC=VGS30.9V. The band-gap core would not work
effectively. The simulated result of Line Regulation is
B. The stability of band-gap reference illustrated in Fig.2. We can see that the reference
voltage is 1.166V~1.171V.
The stability of VREG is realized by feedback. The
voltage variation at VREG is sensed by M4 and the
current variation is produced. However, the effective
trans-conductance of M2 is smaller than M9. So the
current of M5 is not the same as M2. VC is changed
synchronously with VREG. VC is sensed by M3 and feed
back to VREG to make the VREG voltage stable.
According to the current mirror relations, we can draw
the conclusion that the increment of VC makes the
reduction of VREG. Thus the negative feedback forces
the VREG stable. In fact, the loop made up of M4, M1,
Fig.2 The simulation of Line Regulation
M18, M13 and M12 also enhanced the stability of VREG. (VDD=2V~6V @Typical Corner)
The loop gain of the circuit can be approximately
B. High PSRR performance C. Low temperature coefficient

It is difficult to obtain high PSRR without op amp, If the pre-regulator is composed of the simple
so the pre-regulator circuit is a good choice. Now a diode structure, its temperature coefficient (TC) is not
new method is adopted for the pre-regulator as shown so good. In order to improve the TC of VBG, the TC of
in Fig.1. It reuses the band-gap core with negative pre-regulator must be low. In Fig.1, PTAT current is
feedback to stable the voltage of regulator as described feedback to the pre-regulator to obtain the positive
above and the source current for the pre-regulator temperature coefficient contribution. VREG can be
come from the PTAT current. PSRR can be given as : expressed as:
g m 4 (1 + g m8 ro 9 ) + ro12 gg VREG= Veb3+VGS3+VGS6
PSRR =
g m 4 g m10 R2 (7) =-Veb3+VTN+VTP+ 2 I 3 + 2I 6 (8)
K N S3 K P S6
gg = g m3 g m4 g m8 ro9 + g m5 g m8 + gg1
Where, KN and KP is the trans-conductance parameter.
gg1 = g m 4 ( g m 4 + g m 6 + g m8 + g m10 )
Let dV REG / dT = 0 , then
Equation (7) has given the relative parameters with
[3]
PSRR . Wideband and high PSRR are achieved by
1 + 1 ln N =15.4 (9)
the following methods: 1) M3 is used to stable VREG R1
2 2K N I 3 S3 2 2K P I 6 S 6
by amplified the voltage VC so as to improve PSRR. 2)
The gate of M10 connecting to VC is also profitable to
Where dVeb3 = -1.5mV/°C, dVT =0.086mV/°C.
improve PSRR because VREG and VC vary in the same dT dT
direction and weaken the current variation of M10. 3) To achieve other better characteristics to fit for the
The band-gap core is supplied by regulated voltage application, the transistors must work at the low
designed with several negative feedback loops. 4) The temperature coefficient other than zero temperature
wideband PSRR is achieved by op amp-less and coefficient[4,5]. The simulated temperature performance
reducing the resistance of the first pole. The simulated of VBG indicate that the temperature range is
PSRR is shown in Fig.3. Where, VDD=3.3V @Typical -40 ć to 125 ć , which is shown in Fig.4. The
Corner. We can see that the PSRR is 104dB at1KHz, transient characteristics are illustrated in Fig.5. Where,
85.26dB at 10 KHz, and 56.68dB at 100 KHz, VDD=3.3V @Typical Corner.
respectively.

Fig.3 The simulation result of PSRR


Fig.4 The simulated temperature performance of VBG
ACKNOWLEDGEMENTS

This work was supported by the grant from the


Teaching Research Programs of Education Department
Foundation of Hubei Province, the granted No. is
2009164.

REFERENCES

[1] D. F. Hilbiber, “A new semiconductor voltage standard”, ISSCC


Digest Technical Papers, vol. 7, pp. 32-33, 1964
[2] T. L. Brooks and A. L. Westwick, “A low-power differential
Fig.5 The simulated transition characteristics.
CMOS band-gap reference,” in ISSCC Dig. Tech. Papers, Feb.
1994, pp. 248–249.
IV. CONCLUSION
[3] Behzad Razavi, “ Design of Analog CMOS Integrated Circuits”,

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Fig.1 the schematic structure of the proposed op amp-less band-gap

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