Day7 PA Share PDF

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AMPLIFIER
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Theory
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Transmission Line Connected Two-port Network inserted into the line
between source and load b r 1 = S 11 a i1 + S 12 a i2
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b r 2 = S 21 a i1 + S 22 a i2
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Theory
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ZS Zin Zout ZL
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 Determine ZS and ZL  Use Lumped Elements
 Use Distributed Elements

www.vlsi-expert.com
Match ZS to Z0 www.vlsi-expert.com
 Use Combination of Lumped and
 Matchwww.vlsi-expert.com
ZL to Z0
Distributed Elements
Amplifier Circuit
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1 − Γ𝑠𝑠 2 1 − Γ𝐿𝐿 2
𝐺𝐺𝑡𝑡 = 𝑆𝑆21
1 − Γ𝑖𝑖𝑖𝑖 Γ𝑠𝑠 2 1 − 𝑆𝑆22 Γ𝐿𝐿 2
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− Γ𝑠𝑠 2
1 1 − Γ𝐿𝐿 2
𝐺𝐺𝑡𝑡 = 𝑆𝑆21
1 − 𝑆𝑆11 Γ𝑠𝑠 2 1 − Γ𝑜𝑜𝑜𝑜𝑜𝑜 Γ𝐿𝐿 2
Stability Considerations
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𝑆𝑆12 𝑆𝑆21 Γ𝐿𝐿 𝑆𝑆12 𝑆𝑆21 Γ𝑠𝑠

Γ𝑖𝑖𝑖𝑖 = 𝑆𝑆11 + Γ𝑜𝑜𝑜𝑜𝑜𝑜 = 𝑆𝑆22 +
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1 − 𝑆𝑆22 Γ𝐿𝐿 1 − 𝑆𝑆22 Γ𝑠𝑠
In the above circuit, oscillation is possible if either the input
or output port impedance has a negative real value
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Γin > 1 or Γout > 1 Stability of the Amplifier Depends on
ΓS and ΓL
Stability Considerations
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Unconditional Stability: The network is unconditionally stable if

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Γ
𝑖𝑖𝑖𝑖 < 1 𝑎𝑎𝑎𝑎𝑎𝑎 𝑜𝑜𝑜𝑜𝑜𝑜 < 1
Γ
for all passive source and load impedances. (ie Γ𝑠𝑠 < 1 𝑎𝑎𝑎𝑎𝑎𝑎 Γ𝐿𝐿 < 1)
Conditional Stability: The network is conditionally stable if
Γ
𝑖𝑖𝑖𝑖 < 1 𝑎𝑎𝑎𝑎𝑎𝑎 Γ𝑜𝑜𝑜𝑜𝑜𝑜 < 1
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for certain range of passive source and load impedances. This case is also
referred as potential unstable. (ie Γ𝑠𝑠 < 1 𝑎𝑎𝑎𝑎𝑎𝑎 Γ𝐿𝐿 < 1)
Input and Output Stability Circles
𝑆𝑆12 𝑆𝑆21 Γ𝐿𝐿 𝑆𝑆12 𝑆𝑆21 Γ𝑠𝑠
Γ𝑖𝑖𝑖𝑖 = 𝑆𝑆11 + <1 Γ𝑜𝑜𝑜𝑜𝑜𝑜 = 𝑆𝑆22 + <1
1 − 𝑆𝑆22 Γ𝐿𝐿 www.vlsi-expert.com 1 − 𝑆𝑆 Γ
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22 𝑠𝑠
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Stability Circles: Defined as the loci in the ΓL(or Γs ) Plane for which Γ𝑖𝑖𝑖𝑖 = 1 𝑜𝑜𝑜𝑜 Γ𝑜𝑜𝑜𝑜𝑜𝑜 = 1 .
These circles define the boundaries between stable and potentially unstable regions of Γ𝑠𝑠 𝑎𝑎𝑎𝑎𝑎𝑎 Γ𝐿𝐿
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∆𝑆𝑆11 ∗ ∗
𝑆𝑆22 −www.vlsi-expert.com 𝑆𝑆12 𝑆𝑆21
OUTPUT STABILITY CIRCLE 𝐶𝐶𝐿𝐿 = 𝑅𝑅𝐿𝐿 =
2
𝑆𝑆22 − ∆ 2 𝑆𝑆22 2 − ∆ 2
∗ ∗
𝑆𝑆11 − ∆𝑆𝑆22 𝑆𝑆12 𝑆𝑆21
INPUT STABILITY CIRCLE
www.vlsi-expert.com 𝐶𝐶𝑠𝑠 = 𝑅𝑅𝐿𝐿 =
𝑆𝑆11 2 − ∆ 2 𝑆𝑆11 2 − ∆ 2
∆= 𝑆𝑆11 𝑆𝑆22 − 𝑆𝑆12 𝑆𝑆21
Region of Stability
𝑆𝑆11 < 1 𝑆𝑆11 > 1

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Unconditional Stability Conditions
1 + 𝑆𝑆11 𝑆𝑆22 − 𝑆𝑆12 𝑆𝑆21 2 − 𝑆𝑆11 2 2

− 𝑆𝑆22www.vlsi-expert.com www.vlsi-expert.com
𝐾𝐾 = www.vlsi-expert.com ∆= 𝑆𝑆11 𝑆𝑆22 − 𝑆𝑆12 𝑆𝑆21
2 𝑆𝑆12 𝑆𝑆21
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For unconditional Stability, the necessary and sufficient conditions are that
∆ < 1 𝑎𝑎𝑎𝑎𝑎𝑎 𝐾𝐾 < 1

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Recent Combined Formula to determine stability

1− 𝑆𝑆11 2
www.vlsi-expert.com 𝜇𝜇 = >1
∗
𝑆𝑆22 − 𝑆𝑆11 ∆ + 𝑆𝑆12 𝑆𝑆21
Stability Improvement Using resistive loading
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To make device unconditionally stable, total input and output loop

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resistances should be positive
Re (Zs + Zin ) > 0; Re(ZL + Zout ) > 0
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To achieve this, we use resistive loadings at the input and output of the
amplifier
Stability Improvement Using resistive loading
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Single Stage Amplifier Design
1. Given the device S-parameters, Draw Stability Circles on the Smith Chart.
2. www.vlsi-expert.com
Since
Gd is fixed, the overall amplifier gain is controlled by the gains Gs and GL.
3. Maximum gain will be realized when the matching section provide a conjugate
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match at the input and output.
Γ𝑖𝑖𝑖𝑖 =Γ𝑠𝑠 ∗ 𝑎𝑎𝑎𝑎𝑎𝑎 Γ𝑜𝑜𝑜𝑜𝑜𝑜 = Γ𝐿𝐿 ∗
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4. Determine Γs and ΓL
5. Design Suitable matching networks at the I/O
1 1 − Γ𝐿𝐿 2
𝐺𝐺𝑡𝑡𝑡𝑡𝑡𝑡𝑡𝑡
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1 − Γ𝑠𝑠 2 1 − S22 Γ𝐿𝐿 2
Design for Specific Gain-Constant Gain Circles
OBJECTIVE: To Improve Bandwidth or to obtain a specific value of amplifier gain, it is

sometimes preferred to design amplifier for less
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than the maximum
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APPROACH:
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 Redesign the input and output matching sections to have less than maximum
gains
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 Introduce mismatches intentionally to reduce overall gain
 Design procedure is simplified by plotting constant gain circles on the smith

chart
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 Gain Circles: Loci of Γs and ΓL that give fixed value of gain GS or GL
Constant Gain Circle
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Constant Gain Circle
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CONSTANT 𝑔𝑔𝐿𝐿 𝑆𝑆22 ∗
1 − 𝑔𝑔𝐿𝐿 1 − 𝑆𝑆22 2
GAIN CIRCLE 𝐶𝐶𝑔𝑔𝑔𝑔 = 𝑅𝑅𝑔𝑔𝑔𝑔 =
1− 1 − 𝑔𝑔𝐿𝐿 𝑆𝑆22 2 1 − 1 − 𝑔𝑔𝐿𝐿 𝑆𝑆22 2
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INPUT CONSTANT
𝑔𝑔𝑠𝑠 𝑆𝑆11 ∗ 1 − 𝑔𝑔𝑠𝑠 1 − 𝑆𝑆11 2
𝐶𝐶𝑔𝑔𝑔𝑔 = 𝑅𝑅𝑔𝑔𝑔𝑔 =
GAIN CIRCLE 1 − 1 − 𝑔𝑔𝐿𝐿 𝑆𝑆11 2 1 − 1 − 𝑔𝑔𝑠𝑠 𝑆𝑆11 2
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EXAMPLE
Q - Design an amplifier to have gain of 11 dB at 4.0 GHz. Plot constant gain circles for
GS=2 dB and 3 dB and GL=0dB and 1dB. Design matching networks using single stub and
piece of transmission www.vlsi-expert.com
line. Calculate the gain
from 3 to 5 GHz. The GaAs FET has the
following S-parameters (Z0= 50 ohm)
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F(GHz) S11 S21 S12 S22
3.0 0.80∠ −900 2.8∠1000 0 0.66∠ − 500

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4.0 0.75∠ − 1200 2.5∠800 0 0.60∠ − 700

5.0 0.71∠ − 140 0 2.3∠600 0 0.58∠ − 850
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EXAMPLE
Q - Design an amplifier to have gain of 11 dB at 4.0 GHz. Plot constant gain circles for
GS=2 dB and 3 dB and GL=0dB and 1dB. Design matching networks using single stub and
piece of transmission www.vlsi-expert.com
line. Calculate the gain
from 3 to 5 GHz. The GaAs FET has the
following S-parameters (Z0= 50 ohm)
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EXAMPLE
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Power Gain Concepts
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P in Power input to the matching network or to the transistor.
𝑃𝑃𝐴𝐴 www.vlsi-expert.com
- Power delivered to the load or to the outputwww.vlsi-expert.com
matching network
case of 𝑷𝑷𝒊𝒊𝒊𝒊 𝒘𝒘𝒘𝒘𝒘𝒘𝒘𝒘 Γ𝑖𝑖𝑖𝑖 =Γ𝑠𝑠 ∗

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𝑃𝑃𝑎𝑎𝑎𝑎𝑎𝑎 - Special
𝑃𝑃𝑎𝑎𝑎𝑎𝑎𝑎𝑎𝑎 - Power available from transistor when Γ𝑜𝑜𝑜𝑜𝑜𝑜 =Γ𝐿𝐿 ∗

Power Gain Concepts
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𝑷𝑷𝑨𝑨
Transducer Power Gain: 𝑮𝑮𝒕𝒕 =
𝑷𝑷𝒂𝒂𝒂𝒂𝒂𝒂
𝑷𝑷𝑨𝑨
Operating Power Gain: 𝑮𝑮𝑷𝑷 =
𝑷𝑷𝒊𝒊𝒊𝒊
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𝑷𝑷𝒂𝒂𝒂𝒂𝒂𝒂𝒂𝒂
Available Power Gain: 𝑮𝑮𝒂𝒂 =
𝑷𝑷𝒂𝒂𝒂𝒂𝒂𝒂
DESIGN FORMULAE
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DESIGN FORMULAE
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DESIGN FORMULAE
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Trade off Example
The S-parameters of the GaAs FET at 12 GHz are
S11 = 0.6∠360, S12 = 0.14∠−850 ,S21 = 2.3∠−800 ,S22 = 0.15∠450
K = 1.17 and Δ = 0.368
Transistor is unconditionally stable
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Γ𝑀𝑀𝑀𝑀 = 0.714⌊− 40.450
Γ𝑀𝑀𝑀𝑀 = 0.387⌊129.360
VSWR at IN and OUT ports=1
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𝑆𝑆21
𝐺𝐺𝐴𝐴𝐴𝐴𝐴𝐴𝐴𝐴 = 𝐾𝐾 − 𝐾𝐾 2 − 1 = 9.24 9.66 𝑑𝑑𝑑𝑑
𝑆𝑆12
Maximum Value of Associated Gain
𝐺𝐺 𝐴𝐴 = 8.66𝑑𝑑𝑑𝑑 Design Goal for Gain
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Ca = 0.602∠ − 40.45 ; 0
ra = 0.3
Trade off Example
S11 = 0.6∠360, S12 = 0.14∠−850 ,S21 = 2.3∠−800 ,S22 = 0.15∠450
K = 1.17 and Δ = 0.368
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Γ𝑀𝑀𝑀𝑀 = 0.714⌊− 40.450
Γ𝑀𝑀𝑀𝑀 = 0.387⌊129.360
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𝑆𝑆21
𝑆𝑆12
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Ca = 0.602∠ − 40.45 ; 0
ra = 0.3
Trade off Example
S11 = 0.6∠360, S12 = 0.14∠−850 ,S21 = 2.3∠−800 ,S22 = 0.15∠450
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K = 1.17 and Δ = 0.368
Γ𝑀𝑀𝑀𝑀 = 0.714⌊− 40.450
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Γ𝑀𝑀𝑀𝑀 = 0.387⌊129.360
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𝑆𝑆21
𝑆𝑆12
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Ca = 0.602∠ − 40.45 ; 0
ra = 0.3
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General Non-linear Device or Network
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• All realistic components have a small loss- thermal noise generated by a lossy component
- Devices are non-linear at very low power levels due to noise effects
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• At high power levels, we have gain compression or generation of spurious frequency components
- Devices are non-linear at high power levels as well
These effect set a minimum and maximum realistic power range
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(Dynamic Range)
over which a component will operate as desired
Output Response of a Non-linear Circuit
Response is approximated by Taylor series:
v = a + a v + a v 2 + a v 3 + .......
0 0 1 i 2 i 3 i
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Where Taylor coefficients are given by:
a0 = v 0 (0) (DC Output) Rectifier

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dv0
a1 = (Linear Output) Attenuator a1<1
dv i vi =0 Amplifier a1>1
d2 vwww.vlsi-expert.com www.vlsi-expert.com
a = 0
(Squared Output)
2 Mixer etc.
dvi v =0 www.vlsi-expert.com
2
i
Gain Compression
Single Frequency Sinusoid Applied to the Non-linear Circuit vi = V0 cosω0t
a V cos ω t + a V 2 cos2 ω t + a V 3 coswww.vlsi-expert.com

v0 = a +www.vlsi-expert.com 3
ω t +....... www.vlsi-expert.com
1   3 3  1
v 0 =  a 0 + a 2 V 02  +www.vlsi-expert.com
a V
 1 0 + a V
3 0 
cos ω 0
t + a 2 V02 cos 2 ω0 t
 2   4  2
1
+ a 3 V 03 cos 3 ω 0 t + .......
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3 2
𝑎𝑎 𝑉𝑉 + 𝑎𝑎
𝑣𝑣0 www.vlsi-expert.com
1 𝑜𝑜 𝑉𝑉
3 𝑜𝑜
𝐺𝐺𝑣𝑣 = = 4 www.vlsi-expert.com
𝑣𝑣𝑖𝑖 𝑉𝑉𝑜𝑜
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3
= 𝑎𝑎1 + 𝑎𝑎3 𝑉𝑉 2 𝑜𝑜
4 P1(dB) – in terms of output power for amplifiers and in
terms of input power for mixer
Inter Modulation Distortion

1   3 3  1
a V
 1 0 + a V
3 0 
cos ω 0
t + a 2 V02 cos 2 ω0 t
 2   4  2
1
+ a 3 V 03 cos 3 ω 0 t + .......
The first term – Represents dc Voltage [useful in a rectifier application

Second term – Primarily for amplifier application
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Last two terms – useful for frequency multiplier circuits
Single - Tone Input

1   3 3  1
a V
 1 0 + a V
3 0 
cos ω 0
t + a 2 V02 cos 2 ω0 t
 2   4  2
1
+ a 3 V 03 cos 3 ω 0 t + .......
Presence of other frequency components lead to signal distortion if these

are in www.vlsi-expert.com
the pass band of the amplifier www.vlsi-expert.com
consists of harmonics of input frequency of the form nω0

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 Output
 Usually these harmonics do not interfere with the desired signal at ω0
Two - Tone Input
Two tone Frequency Sinusoid Applied to the Non-linear Circuit : v i = V0 (cos ω1 t + cos ω2 t )

1 1
a 2 V02 (1 + cos 2 ω1 t ) + a 2 V02 (1 + cos 2 ω 2 t )
Squared terms: 2 2
+ a 2 V02 cos (ω 1 − ω 2 ) t + a 2 V02 cos (ω 1 + ω 2 ) t
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Four Inter-modulation products of second order

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• These second order products are undesired in
an amplifier
• In a mixer, www.vlsi-expert.com
sum and difference products are www.vlsi-expert.com
desired outputs
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𝜔𝜔1 is close to𝜔𝜔2 ; sec ond order products can be
filtered
Two - Tone Input
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Two - Tone Input
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Input signal consisting of many frequencies of varying amplitude and phase will result
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in distortion of output signal- 3rdorder inter-modulation distortion
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Third Order Intercept Point
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Intersection point where first order and third order powers are
equal is called 3rd order Intercept point [pointP3]
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P3 is referenced at the output for amplifiers and at the input for mixers :
Usually P3 is 12-15 dB greater thanP1
Linear and Spurious-free Dynamic Range
Dynamic Range: Operating range for which a component has desirable characteristics

Linear Dynamic Range:
 For power amplifier, the power range may
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be limited at low end by noise and at the
high end by the compression point
𝐷𝐷𝐷𝐷𝑙𝑙 = 𝑃𝑃1 − 𝑁𝑁𝑜𝑜

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Spurious Free Dynamic Range:
 For low noise amplifier and mixer, the
operationwww.vlsi-expert.com
may be limited at low end by www.vlsi-expert.com
noise and at the maximum power level for
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which inter-modulation distortion becomes
unacceptable.
2
𝐷𝐷𝐷𝐷𝑓𝑓 = 𝑃𝑃3 − 𝑁𝑁𝑜𝑜
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Device utilization factor
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Efficiency Matrix of a PA
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Why Efficiency?
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Power Amplifier Design
Power Amplifier: An Amplifier that is designed to deliver maximum output power for a given
active device.
Difference as compare to Linear RF Amplifier

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design:
 In Linear RF Amplifier design both the input
and output are conjugate match in order to
achieve maximum available gain.
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 In Power Amplifier (PA) design the input is

conjugatewww.vlsi-expert.com
match an the output is power www.vlsi-expert.com
match in order to achieve maximum output
power. www.vlsi-expert.com
Effect of Output Termination on PA performance
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Typical behaviour of PA with Conjugate Match
and Power Match
 Practically, conjugate match implementation is limited by: The current supplied by
the device and the voltage that the device can sustain across its terminals without
any damage.
 From Fig. Linear output power range is

higher in powerwww.vlsi-expert.com
match as compare to
conjugate match. The gain at lower signal
levels are 1 dB or so less in power match
as compare to conjugate match.
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 Maximum linear output power (point A and
A’) and power at 1 dB compression point
(point www.vlsi-expert.com
B and B’) is 2 dB higher in case of www.vlsi-expert.com
power match as compare to conjugate
match.
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The improvement may vary between 0.5 dB – 4 dB. Fig. PA characteristics for conjugate match and
power match [1]
OBTAINING POWER MATCH
A load pull measurement setup consists of Device Under Test
(DUT) with some form of calibrated impedance tuning at its
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output. The input may or may not be tunable. Input is mainly
matched to boost the power gain i.e. conjugately matched at
the desired frequency.www.vlsi-expert.com
Using this output tuner, different impedance are shown to the

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DUT over the smith chart region and its output parameters Fig. Typical load pull data [1]
such as output power, efficiency etc. are measured.

This process of measuring the output parameters by changing
the impedances shown to DUT using tuner is known as load
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pull measurement.
PA Classes : Class A
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PA Classes : Class B
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PA Classes: Class C
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SUMMARY
Class of operation
depends on the conduction
angle (time for which the
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device conducts current)

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Class-A and push-pull
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Class-AB are inherently www.vlsi-expert.com
more linear than class

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C,D,E,F,J
SUMMARY
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Design Steps for Power Amplifier
Plot contours of constant power output on a smith
chart as a function of ΓLP with transistor conjugately
matched at www.vlsi-expert.com
its input- These are called Load-pull
contours.
Select suitable ΓLP depending

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on Desired P1-dB
Calculate ΓIN Using bilateral design formula based on

ΓLP instead of ΓL
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Use conjugate matching at the input i.e
Γ𝑠𝑠𝑠𝑠 = Γ𝑖𝑖𝑖𝑖 ∗
Use small signal S-parameters to check
stability www.vlsi-expert.com
Doherty Power Amplifier
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 If an auxiliary transistor is introduced that provides gain only when the main transistor begins to compress,
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then the overall gain can remain relatively constant for higher input and output levels.
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 If the voltage swing at X is large enough to drive M1 into the triode region, then it is likely to drive M2 into
the triode region, too.
Doherty Power Amplifier
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Class-F Waveform
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Thank You www.vlsi-expert.com
www.vlsi-expert.com

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 Use Distributed Elements

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𝑆𝑆12 𝑆𝑆21 Γ𝐿𝐿 𝑆𝑆12 𝑆𝑆21 Γ𝑠𝑠

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Unconditional Stability: The network is unconditionally stable if

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𝑆𝑆11 < 1 𝑆𝑆11 > 1

1 + 𝑆𝑆11 𝑆𝑆22 − 𝑆𝑆12 𝑆𝑆21 2 − 𝑆𝑆11 2 2

∆ < 1 𝑎𝑎𝑎𝑎𝑎𝑎 𝐾𝐾 < 1

Recent Combined Formula to determine stability

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To make device unconditionally stable, total input and output loop

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OBJECTIVE: To Improve Bandwidth or to obtain a specific value of amplifier gain, it is

 Design procedure is simplified by plotting constant gain circles on the smith

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3.0 0.80∠ −900 2.8∠1000 0 0.66∠ − 500

4.0 0.75∠ − 1200 2.5∠800 0 0.60∠ − 700

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case of 𝑷𝑷𝒊𝒊𝒊𝒊 𝒘𝒘𝒘𝒘𝒘𝒘𝒘𝒘 Γ𝑖𝑖𝑖𝑖 =Γ𝑠𝑠 ∗

𝑃𝑃𝑎𝑎𝑎𝑎𝑎𝑎𝑎𝑎 - Power available from transistor when Γ𝑜𝑜𝑜𝑜𝑜𝑜 =Γ𝐿𝐿 ∗

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a0 = v 0 (0) (DC Output) Rectifier

a V cos ω t + a V 2 cos2 ω t + a V 3 coswww.vlsi-expert.com

a V cos ω t + a V 2 cos2 ω t + a V 3 coswww.vlsi-expert.com

The first term – Represents dc Voltage [useful in a rectifier application

a V cos ω t + a V 2 cos2 ω t + a V 3 coswww.vlsi-expert.com

Presence of other frequency components lead to signal distortion if these

consists of harmonics of input frequency of the form nω0

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Four Inter-modulation products of second order

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𝐷𝐷𝐷𝐷𝑙𝑙 = 𝑃𝑃1 − 𝑁𝑁𝑜𝑜

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Difference as compare to Linear RF Amplifier

 In Power Amplifier (PA) design the input is

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 From Fig. Linear output power range is

Using this output tuner, different impedance are shown to the

such as output power, efficiency etc. are measured.

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device conducts current)

more linear than class

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Select suitable ΓLP depending

Calculate ΓIN Using bilateral design formula based on

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