SLIDE 1

INTRODUCTION

Good afternoon I hope you all are doing good. I am Sonia ,B.tech 3rd year student,persuaing electronics
and communication engineering from NIT Hamirpur.first of all i would like to thank all my teachers who
gave me an opportunity to present myself through this platform considering ongoing pandemic
situation.

Today i am going to tell you about TFET i.e. tunnelling field effect transistor. I am sure you all must be
familiar with the term , in case you are not then you surely will get to know about this through my
presentation

SLIDE 2

OUTLINE

So talking of contents , i will be discussing about TFET,its basic principle,its designs considerations and
applications. So let’s get started.

SLIDE 2

MOTIVATION

Before i start i wold like to tell you about my interst for choosing this topic.as we all know that with the
development of country technology need to be fast and secured. And also many electronics devices are
coming with their enhanced features but basic of all is same that is they are made components like
diode transistors etc. So talking of transistos generally MOSFET is used .besides its application, it has
many limitations also such as problem of leakage current power supply. TFET can be considered as
alternative to this problem as in TFET lower VDD is required and leakage current produce is also much
less. Additionally it provide steep switching you can also see from graph shown here. In first it shows
power density of active region and subtreshod region which clearly states that with scaling of length
power consumption increases for MOSFETS and second shows comparison of transfer characteristics of
ideal transistor(in orange),MOSFET in black lines and steep slope devices (green lines).

SLIDE 3

TFET

TFET structure is very similar to MOSFET as it is 4 terminal device with source drain gate and substrate
part. Its basic design is gated p-i-n diode. It incorporates delta layer silicon gellenium at the edge of P
REGION

BASIC WORKING PRINCIPLE

The gated p-i-n diode is reversed biased to obtain ultra low leakage .so when =ve voltage is applied to n-
doped region p-i-n diode become reversed biased and ready to switched by gates
Band to band tunnelling

After this band to band tunnelling is suppressed due to gap between source valence band maximum and
channel conduction band minimum. This process involve transfer of electron from source band to
conduction band without emission and absorption of photon in direct tunnelling. Therefore for band to
band tunnelling to take place there should be available states from source to tunnel form,available
states rom channel to tunnel form, tunnelling barrier width and conservation of momentum.

ON STATE CURRENT

based on band to band tunnelling probability on state current is calculated though it require some
complex calculations but at the end it can be seen that high band to band tunnelling current is expected
if effective mass and tunnelling barrier width is as small as possible.

OFF STATE LEAKAGE

When TFET is in OFF state only p-i-n diode extremely low leakage current flows between source and
drain . there are 5 mechanismcontributing to off state leakage these are gate leakage through the high
k gate dielectric, thermionic emission over source drain built in potential ,Shockley Read Hall generation
and combination in heavily doped source and drain region and ambipolar conduction

SUBTHRESHOLD SLOPE

It is feature of IV characteristic.in subthreshold region drain current behavipur controlled by gate

region.given graph shows qualitative comparison of transfer characteristic of MOSFET and TFET showing
non constant subthreshold swing for TFET. The subthreshold slope of TFET is Smallest at lowest vgs and
rises with increasing VGS.

DESIGNS CONSIDERATION OF TFET

BAND TO BAND ALIGNMENT

based on different band alignment type of source channel materials TFET can be classified as

homojuntion, staggered gap and broken gap structure as illustrated in diagram

for homojunction TFET same material was used for source channel and drain region they exhibit low
onstste current due to large tunnelling barrier width.for staggered gap source channel junction is
formed by 2 different material with type 2 staggered band alignment. Compared to homojunction its
tunnelling barrier width is reduced which result in high onstate current. For broken gap TFET the source
channel tunnel hunction is formed by type 2 heterostructure with further reduction in tunnelling barrier
width leads to even higher onstate current
DOPING LEVEL

First diagram shows inefficient turn-ON of an n-type TFET device if the source region is highly
degenerated. Energy states in the source valence band in the energy windoΔ Φ is only partially
occupied according to Fermi Daric distribution,resulting in reduced I ON and degraded SS.Figure 2
represents TFET structure with a lower doped source. A majority of the sourcevalence band energy
states are occupied, providing ample supply of electrons to contribute to tunneling when paired up
states are available,resulting in steeper SS and higher I ON at lower V GS .

HIGH K GATE DIELECTRIC

Comparison of transfer characteristics of TFETs with different gate dielectrics. With Four different gate
oxides with the same physical thickness of 3 nm and By using high- κ gate dielectric, both the drive
current and SS of TFETs are improved due to better gate coupling.
Figure B shows Comparison of the transfer characteristics of TFETs with different channel lengths.it can
be seen that of state current increases sharply with channel length<50 nm

CHANNEL LENGTH
Lets make it clear by some example length shown here with scaling depleted region become narrower
and less defind eg. With l=10nm devices with both types of gate dielectrics are showing Zener
breakdown (electron tunneling) at OFF-state,

APPLICATIONS

The TFET belongs to the family of so called steep slope devices that are presently being examined for
ultra low power electronic applications
Because of their low off currents they are suitable for low standby power logic and low power
applications which are functioning at moderate frequency.other applications of tunnel fet include ultra
low specific analog ICs with better temperature strength and low power SRAM.

CONCLUSION
The TFET has been proposed as one of the most promising steep slope switch candidates to be used
under a supply voltage below 0.3 V for ultra-low stand power logic applications. The unique band-to-
band tunneling transport mechanism enables the TFET to offer significantly reduced SS and thereby
lower operation voltage and power dissipation. Also TFETs would provide excellent opportunities to be
integrated with Si-MOSFETs as ultra-low power devices in an advanced hybrid circuit platform and also
provide chances to replace MOSFETs for beyond CMOS applications