Experiment No.

05
Multistage BJT CC-CC Amplifier (Darlington Configuration)
OBJECTIVE
 Construct an RC coupled Multistage Amplifier with two Common Collector
amplifiers then analyze its performance in terms of gain, input and output
impedance.

EQUIPMENT
Instruments
• Digital Multimeter (DMM)
• Oscilloscope with probes.
• Function generator.
Components
• Transistors: 2N3904 (02)
• Resistors: 68 kΩ (02), 680 Ω
• Capacitors: 0.1F, 100µF
• Potentiometer 1 kΩ, 5 kΩ, 100 kΩ, 500 kΩ

THEORY

The Darlington Transistor named after its inventor, Sidney Darlington is a special arrangement
of two standard NPN or PNP bipolar junction transistors (BJT) connected together. The Emitter
of one transistor is connected to the Base of the other to produce a more sensitive transistor with
a much larger current gain being useful in applications where current amplification or switching
is required.

The Darlington Pair may sometimes also be referred to as a super-alpha pair, but this name is
used less these days. The circuit configuration was invented at Bell Laboratories by Sidney
Darlington in 1953 at the time when a significant amount of work was being undertaken into
transistor development. The idea is to have two or three transistors on a single chip where the
emitter of one transistor was connected to the base of the next, and all the transistors in the
Darlington configuration shared the same collector.

Darlington pair transistor circuits can be formed from two individual electronic components, i.e.
two transistors, or it is also possible to obtain them as a single electronic component with the two
transistors integrated onto one chip. Many Darlington arrays are also available where several
Darlington transistor pairs are contained within the same package. Typically these are contained
within an IC package as these are often used to drive displays, etc. This makes Darlington
transistor pairs very easy to use and incorporate into a new electronic design.

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CIRCUIT DIAGRAM

I1

IB1 =
I1 - I2

I2
VO1

Fig 5.1: Multistage Darlington configuration.

PROCEDURE

1. Using a Multimeter, measure the value of all Resistors and Capacitors being used in the
circuit. Also verify working of your BJT by testing it with DMM.
2. To find Q point:
Connect the circuit without Vin and capacitors. Set Vcc= 15V. Measure dc voltages at the
base VB1, VB2, collector Vc1, VC2 and Emitter VE1, VE2 with respect to ground. Determine
VCE1, VCE2 and IB1, IE2. The Q points are respectively Q1 (VCE1, IB1) and Q2 (VCE2,IE2).
3. Now connect the circuit as per the circuit diagram.
4. Mid-band Gain and Mid-band frequency:
a. Connect the signal generator and apply a sine wave of peak-to peak amplitude 1 V at 10
kHz.
b. Connect input (Vin) and first stage output VO1 and actual output VO of the circuit
separately to oscilloscope channels and observe the waveforms.

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 c. Vary the frequency of the input signal (between 1 kHz till 1 MHz) till the output signal
VO maximizes.
d. If the output signal becomes distorted, reduce the input signal amplitude till the output
signal is free of distortion.
e. Once maximum is achieved, note down the peak to peak amplitude of Vin, VO1 and VO.
f. Calculate Mid-band voltage gain of both amplifier stages using the values evaluated in
last step AV1 = VO1/Vin and AV2 = VO/ VO1 and overall voltage gain GV= AV1 x AV2.
g. The frequency at which maximum gain is achieved is the mid-band frequency.

5. Input impedance:

POT

Vo
Vin

Fig 5.2: Input impedance finding technique.

a. Connect a Potentiometer (POT) between input voltage source and the base of the
transistor (series connection).
 Set Potentiometer (POT) to zero.
 Keep Input sine wave amplitude to the one evaluated in step 4(e).
 Keep Input sine wave frequency to any mid band frequency evaluated in step
4(f).
b. Connect AC voltmeter (Range: 0-10V) across the biasing resistor R2.
c. Vary the value of Potentiometer such that the AC voltmeter reads a voltage half of the
input signal value.
d. Measure the value of the potentiometer with a multimeter. This is the Input Impedance at
mid-band frequency.
6. Output impedance:

Pot Vo
Vin

Fig 5.3: Output impedance finding technique.

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 a. Connect a Potentiometer between input voltage source and the base of the transistor
(series connection)
b. Set the following:
 Potentiometer to maximum value.
 Keep Input sine wave amplitude to the one evaluated in step 4(e).
 Keep Input sine wave frequency to any mid band frequency evaluated in step
4(f).
c. Connect AC voltmeter (Range: 0-10 V) across the biasing resistor RC and measure
Output Voltage.
d. Decrease Potentiometer till output voltage reduces to one half of the one achieved in
step 6(c).
e. Measure the value of the potentiometer with a multimeter. This is the Output Impedance
at mid-band frequency.
6. Theoretical Calculations:
a. Solve the circuit using a pen and paper and evaluate the theoretical values of the mid-
band gain, input and output impedance.
7. Observations:
a. Write down your observations in the Conclusions portion.

RESULTS & CALCULATIONS

Table 5.1: Measured Circuit Parameter

Parameter Measured Parameter Measured
Name Value Name Value
Cb1 0.1 uF I1 0.11 mA
R1 68 KΩ I2 0.11 mA
R2 68 KΩ IB1 40.738uA
Re 680 Ω IE2 9.078 mA
Ce2 100 uF β1 150
VCC 15 V β2 150
VCE1 8.104 V
VCE2 8.827 V

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 Table 5.2: Representation of Mid-band gain and frequency
Input Output Output
Freq. Voltage Voltage Voltage Av1= GV = GV (dB) =
Av2=
(Hz) AV! * AV2 20log AV
(Vi ) (VO1) (VO) VO1/Vin VO2/VO1
10 K 1 Vp 0.995 Vp 0.99 Vp 0.995 0.994 0.989 -0.096 db

Table 5.3: Comparison of theoretical and practical values

practical
Input impedance 484.07 microvolt
Output impedance 478.399microvolt
midband 0.989

CONCLUSION:
I Construct an RC coupled Multistage Amplifier with two Common Collector amplifiers .I calculate
its performance in terms of gain, input and output impedance.

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 Activity Name  Experiment No 5
Group No. 1 Section A

Student Roll No. 5611


C P Domain Awarded Score (out of 4 for each cell)
L L + Beg in ning Developing Exe mplary
O O Taxonomy (1) (2) Accomplished (4)
Student is With (3) Student is
unable to instructor/ With able to
design supervisor’s instructor/ independentl
systems, guidance, supervisor’s y design
guidance, systems,
No. Criteria components student is able
and/or to partially student is able components
processes to design to fully design and/or
meet systems, systems, processes to
specificatio components components meet
ns despite and/or and/or specification
instructor/ processes to processes to s without
supervisor’s meet meet instructor/
specifications. supervisor’s
guidance. specifications.
guidance.

1 4 2 P4 Design systems, components and/or processes to

me e t specifications
2 5 10 A3 Effe ctively document/ communicate performed
activities

Signature With Date: ____ _

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