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iin Lf ig 1 L
ig(t) i
+
iin(t) 2
vg(t) + Cf C v R
–
0
0 –
0 DTs Ts t
Input filter
EMC
Emission Susceptibility
Spectrum
analyzer Test result: spectrum of the voltage across a standard impedance in the LISN
iac(t) + + +
i(t)
LISN EMI DC/DC
vac(t) filter vg(t) C vC(t) converter v(t) load
– – –
“Earth” ground
Measurement points
RN • Purpose: to standardize
LISN example
iac(t) + + +
ig(t) i2(t) i(t)
LISN EMI DC/DC
vac(t) vg(t) C vC(t) converter v(t) load
filter
– – –
Regulated
AC/DC rectifier DC output
“Earth” ground
Converter model
1:D i L
+
–
(no input filter) +
Vg d
(buck vg + Id C R v
–
converter
example) –
+
–
ac model is +
Lf
modified by Vg d
input filter vg + Cf Id C R v
–
40 dB
|| Gvd || ∠ Gvd Effect of L-C input
|| Gvd || filter on control-to-
30 dB
output transfer
20 dB function Gvd (s),
buck converter
10 dB example.
∠ Gvd
0 dB 0˚ Dashed lines:
original magnitude
– 10 dB
– 180˚
and phase
Solid lines: with
– 360˚ addition of input
filter
– 540˚
100 Hz 1 kHz 10 kHz
f
H(s)
Input Converter
filter Zo(s) Zi(s) v
vg +
–
d T(s)
v(s)
Gvd (s) =
d(s) v g(s) = 0
v(s)
Gvd (s) =
d(s) v g(s) = 0 Converter
v
Zo(s)
vg(s) source ➞ short circuit Gvd(s)
We will use Middlebrook’s Extra Element Theorem to show that the input
filter modifies Gvd (s) as follows:
Z o(s)
1+
Z N (s)
Gvd (s) = Gvd (s) Z o(s) = 0
Z o(s)
1+
Z D(s)
Z N (s) = Z i(s) v(s) o 0 is the converter input impedance, with the output v
nulled to zero
1 + s L + s 2LC sL
Buck – R2 R R
D D2
D2 1 + sRC
1 + s L2 + s 2 LC2
Boost – D′ R 1 – sL2
2
D′ R D′ sL
D′ R D′ 2R
1 + sRC
2 1 + s L2 + s 2 LC2
Buck–boost – D′ 2R 1 – sDL D′ 2R D′ R D′ sL
D D′ 2R D2
D2 1 + sRC
Z o(s)
1+
Z N (s)
Gvd (s) = Gvd (s) Z o(s) = 0
Z o(s)
1+
Z D(s)
The correction factor Z o(s)
1+ shows how the input filter modifies the
Z N (s)
transfer function Gvd (s).
Z o(s)
1+
Z D(s)
Ze = Zi v=0
Input Converter
filter Zo(s) Zi(s) v
vg +
–
d T(s)
Controller
Z N (s) = Z i(s) v(s) o 0 is the converter input impedance, with the output v
nulled to zero
Note that this is the same as the function performed by an ideal
controller, which varies the duty cycle as necessary to maintain zero
error of the output voltage. So ZN coincides with the input impedance
when an ideal feedback loop perfectly regulates the output voltage.
Fundamentals of Power Electronics 18 Chapter 10: Input Filter Design
When the output voltage is perfectly regulated
Closed-loop
voltage regulator
i g(t) Ts
• For a given load
+ characteristic, the output
power Pload is independent of
vg(t) + Pload + V the converter input voltage
Ts – – R
Vg 2 R
+ Cf C
v
–
470 µF 100 µF 3Ω
30 V
–
+
–
330 µH 100 µH +
Vg d
Cf C R
vg + Id v
–
470 µF 100 µF 3Ω
Zo(s) Zi(s) –
d
Fundamentals of Power Electronics 21 Chapter 10: Input Filter Design
Determination of ZD
1:D i L
+
Z D(s) = 12 sL + R || 1
D sC
C R
v
ZD(s)
40 dBΩ
1 fo = 1
f1 = 2π LC ωL
2πRC
30 dBΩ
R = 12 Ω 1.59 kHz D2 || ZD ||
530 Hz
D2
20 dBΩ || ZN ||
1
10 dBΩ
ωD 2C R0 /D 2
Q=R C = fo = 3 → 9.5 dB
L f1
0 dBΩ
100 Hz 1 kHz 10 kHz
f
Fundamentals of Power Electronics 22 Chapter 10: Input Filter Design
Determination of ZN
vtest(s) io0 L
Z N (s) = 1:D
i test(s)
+
–
vo0 + + +
Vg d
itest vtest Id vs o 0 C R vo0
ZN(s)
– – –
Solution: Hence,
i test(s) = Id (s) Vg d(s)
–
D
Vg d (s) Z N (s) = = – R2
vtest(s) = – Id(s) D
D
40 dBΩ
Qf → ∞
30 dBΩ
Lf
20 dBΩ
Cf
10 dBΩ || Zo ||
Zo(s)
Lf
0 dBΩ R0 f = = 0.84 Ω
Cf
ωL f
Z o(s) = sL f || 1 – 10 dBΩ 1
sC f ff = 1 = 400 Hz ωC f
2π L f C f
– 20 dBΩ
100 Hz 1 kHz
f
40 dBΩ
f1 = 530 Hz
Qf → ∞ ωL
30 dBΩ
fo = 1.59 kHz D2 || ZD ||
12 Ω
20 dBΩ || ZN ||
1
ωD 2C R0 /D 2 Can meet
10 dBΩ
|| Zo || Q=3 inequalities
0 dBΩ R0f
everywhere
except at
ωL f
– 10 dBΩ 1 resonant
ff = 400 Hz ωC f frequency ff.
– 20 dBΩ
100 Hz 1 kHz 10 kHz Need to damp
f input filter!
10 dB
Zo
1+
ZN 0 dB
Z
1+ o
ZD
– 10 dB
0˚
Zo
1+
ZN
– 180˚ ∠
Z
1+ o
ZD
– 360˚
100 Hz 1 kHz 10 kHz
f
40 dB
|| Gvd || ∠ Gvd
|| Gvd ||
30 dB
Dashed lines: no
20 dB input filter
10 dB Solid lines:
including effect of
∠ Gvd
0 dB 0˚ input filter
– 10 dB
– 180˚
– 360˚
– 540˚
100 Hz 1 kHz 10 kHz
f
Lf
Cf Cf Rf
Zo(s)
Rf
Lf
Cf
Lf
To meet the requirement Rf < || ZN ||:
R f < R2
D Cf Rf
Lf
Rf R0f
Cf
ωL f ff
Cb 1
ωC f
40 dBΩ
f1 = 530 Hz ωL
30 dBΩ
fo = 1.59 kHz D2 || ZD ||
12 Ω
20 dBΩ || ZN ||
1
R0 /D 2
10 dBΩ ωD 2C
Q=3
|| Zo ||
0 dBΩ Rf = 1 Ω R0f
ωL f 1
– 10 dBΩ
ff = 400 Hz ωC f
– 20 dBΩ
100 Hz 1 kHz 10 kHz
f
– 10 dB
– 90˚
– 180˚
100 Hz 1 kHz 10 kHz
f
–
Rf –Lb Parallel Damping
Rf Lb
v1 +
–
Cf v2 • Need to optimize design
30 dB
Original undamped Undamped
filter (Qf = ∞) filter (Qf = 0)
20 dB
Suboptimal damping Suboptimal damping For this
(Qf = 5Qopt ) (Qf = 0.2Qopt ) example,
10 dB
n = Lb/L = 0.516
Zo Optimal damping
0 dB (Qopt = 0.93)
R0 f
-10 dB
-20 dB
-30 dB
0.1 1 10
f
fo
Lf
• Filter is damped by Rf
+
Rf • Cb blocks dc current from
+ flowing through Rf
v1 Cf v2
–
Cb • Cb can be large in value,
and is an element to be
–
optimized
The value of the peak output impedance for the optimum design is
2 2+n where R0f = characteristic impedance
Zo mm
= R0 f n of original undamped input filter
Given a desired value of the peak output impedance, can solve above
equation for n. The required value of damping resistance Rf can then be
found from:
Rf 2 + n 4 + 3n
Qopt = =
R0 f 2n 2 4 + n
The peak occurs at the frequency
fm = f f 2
2+n
20 dBΩ
|| Zo || Undamped
10 dBΩ
Suboptimal
damping
Comparison of designs Cb = 4700 µF
0 dBΩ Rf = 1 Ω
Optimal damping
achieves same peak – 10 dBΩ
Optimal
output impedance, with damping
Cb = 1200 µF
much smaller Cb. – 20 dBΩ Rf = 0.67 Ω
– 30 dBΩ
100 Hz 1 kHz 10 kHz
f
Summary +
R
+
v1 C v2
Optimal R-Cd damping –
Cd
–
Z mm 2 2+n
= n
R0
10
with Z o mm
Cd Ro
n=
C
1
R0 = L
C
0.1
0.1 1 10
Cd
n=
C
Fundamentals of Power Electronics 38 Chapter 10: Input Filter Design
R Ld
+
L
v1 + C v2
30 dB
Basic results Original undamped Undamped
filter (Q = ∞) filter (Q = 0)
20 dB
n 3 + 4n 1 + 2n
Qopt = Suboptimal damping Suboptimal damping
2 1 + 4n (Q = 5Qopt ) (Q = 0.2Qopt )
10 dB
Optimal damping
Z mm Z mm 0 dB (Qopt = 0.93)
= 2n 1 + 2n R0
R0
-10 dB
with -20 dB
-30 dB
optimum value of R
Qopt = 0.1 1 10
R0 f
f0
Ld L
n= R0 =
L C
Discussion: L
+
+
Optimal R-Ld damping v1
– C v2
30 dB
• Ld is physically very small
• A simple low-cost approach to
damping the input filter 20 dB Degradation of HF
filter attenuation
• Disadvantage: Ld degrades high- Z mm
R0
frequency attenuation of filter, by
10 dB
the factor
L =1+ 1
L||L d n
0 dB
• Basic tradeoff: peak output
impedance vs. high-frequency
attenuation
-10 dB
• Example: the choice n = 1 (Ld = L) 0.1 1 10
degrades the HF attenuation by 6 Ld
L
dB, an leads to peak output
impedance of
Z mm
= 6 R0
Fundamentals of Power Electronics 40 Chapter 10: Input Filter Design
Ld
Optimal R-Ld +
R L
+
v1 C v2
series damping –
with
Z mm
L
n= d 10 R0
L
R0 = L
C Qopt
1
0.1 1 10
Ld
n=
Fundamentals of Power Electronics 41 L
Chapter 10: Input Filter Design
10.4.4 Cascading Filter Sections
+
Additional Existing
vg + filter Za Zi1 filter Zo v itest
– test
section
–
How the additional filter section changes the output impedance of the
existing filter:
Z (s)
1+ a
Z N1(s)
modified Z o(s) = Z o(s) Z (s) = 0
a Z (s)
1+ a
Z D1(s)
+
Additional Existing
vg + filter Za Zi1 filter Zo v itest
– test
section
–
• Section 1 to satisfy Zo
impedance inequalities as Section 2 Section 1
before:
40 dBΩ
1 fo = 1
f1 = 2π LC ωL
2πRC
30 dBΩ
R = 12 Ω 1.59 kHz D2 || ZD ||
530 Hz
D2
20 dBΩ || ZN ||
1
10 dBΩ
ωD 2C R0 /D 2
Q=R C = fo = 3 → 9.5 dB
L f1
0 dBΩ
100 Hz 1 kHz 10 kHz
f
Fundamentals of Power Electronics 45 Chapter 10: Input Filter Design
Section 2 impedance inequalities
R2 n2L2 R1 n1L1
L2 L1
+
vg + C2 Za Zi1 C1 vtest itest
–
–
Section 2 Section 1
Z a < Z D1 = Z i1 = 1 + R + sn L ||sL
1 1 1 1
output open-circuited sC 1
20 dBΩ || ZD1 ||
0 dBΩ
|| ZN1 ||
|| Za ||
–20 dBΩ
90˚
∠ZN1
45˚
0˚ ∠Za
–45˚
∠ZD1
–90˚
1 kHz 10 kHz 100 kHz 1 MHz
30 dBΩ
|| ZD ||
|| ZN ||
20 dBΩ
fo
Cascaded
sections 1 and 2
10 dBΩ
Section 1
alone
0 dBΩ
-10 dBΩ
-20 dBΩ
1 kHz 10 kHz 100 kHz
20 dB
|| H ||
0 dB
-20 dB
-40 dB
-60 dB
-80 dB – 80 dB
at 250 kHz
-100 dB
-120 dB
1 kHz 10 kHz 100 kHz 1 MHz
f
330 µH Rf
Cf 0.67 Ω
vg +
–
470 µF Cb
1200 µF
R2 n2L2 R1 n1L1
0.65 Ω 2.9 µH 1.9 Ω 15.6 µH
L2 5.8 µH L1 31.2 µH
C2 C1
vg +
–
11.7 µF 6.9 µF