By changing the OSCCAL register from SW, see Section 8.12.

1 “OSCCAL – Oscillator Calibration Register” on page 32, it is

possible to get a higher calibration accuracy than by using the factory calibration. The accuracy of this calibration is shown
as User calibration in Table 28-1 on page 260.
When this oscillator is used as the chip clock, the watchdog oscillator will still be used for the watchdog timer and for the
reset time-out. For more information on the pre-programmed calibration value, see Section 27.4 “Calibration Byte” on page
244.

Table 8-10. Internal Calibrated RC Oscillator Operating Modes(1)(2)

Nominal Frequency (MHz) CKSEL3..0
8 0010
Notes: 1. The device is shipped with this option selected.
2. If 8MHz frequency exceeds the specification of the device (depends on VCC), the CKDIV8 fuse can be
programmed in order to divide the internal frequency by 8.

When this oscillator is selected, start-up times are determined by the SUT fuses as shown in Table 8-11.

Table 8-11. Start-up Times for the Internal calibrated RC Oscillator Clock Selection
Start-up Time from Power-down and Additional Delay from Reset
Power Conditions Power-save (VCC = 5.0V) SUT1..0
(1)
BOD enabled 6CK 14CK 00
Fast rising power 6CK 14CK + 4.1ms 01
Slowly rising power 6CK 14CK + 65ms(2) 10
Reserved 11
Notes: 1. If the RSTDISBL fuse is programmed, this start-up time will be increased to
14CK + 4.1ms to ensure programming mode can be entered.
2. The device is shipped with this option selected.

8.7 128 kHz Internal Oscillator

The 128kHz internal oscillator is a low power oscillator providing a clock of 128kHz. The frequency is nominal at 3V and
25°C. This clock may be select as the system clock by programming the CKSEL fuses to “11” as shown in Table 8-12.
.
Table 8-12. 128kHz Internal Oscillator Operating Modes

Nominal Frequency CKSEL3..0

128kHz 0011

When this clock source is selected, start-up times are determined by the SUT fuses as shown in Table 8-13.

Table 8-13. Start-up Times for the 128 kHz Internal Oscillator
Start-up Time from Power-down and
Power Conditions Power-save Additional Delay from Reset SUT1..0
(1)
BOD enabled 6CK 14CK 00
Fast rising power 6CK 14CK + 4ms 01
Slowly rising power 6CK 14CK + 64ms 10
Reserved 11
Note: 1. If the RSTDISBL fuse is programmed, this start-up time will be increased to
14CK + 4.1ms to ensure programming mode can be entered.

30 ATmega328P [DATASHEET]
7810D–AVR–01/15