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OBJECTIVES:
1. To familiarize with analog multiplexer
2. To familiarize with LVDT-displacement sensor.
3. To analyse the signal conditioning circuit of LVDT.
INTRODUCTION:
Analog multiplexer using ADG408 IC:
The ADG408 is a monolithic CMOS analog multiplexer
comprising eight single channels and four differential
channels, respectively. The ADG408 switches one of eight
inputs to a common output as determined by the 3-bit
binary address lines A0, A1, and A2. An EN input is used
to enable or disable the device. When the device is
disabled, all channels are switched off.
The operation of any multiplexer (MUX for short) is
conceptually the same, be it analog or digital. In essence
we have a set of numbered data inputs (usually a power of
2, let us say N=2n, inputs named, say, X0, X1... etc.), a set
of digital selection inputs (in number of n) and an output.
A MUX works by sending one (and only one) data input
signal to the output. The data input to be "routed" to the
output is the one selected using the selection inputs, i.e., the
one whose number, expressed in binary, is put on the
selection inputs.
In other words, a MUX acts like a digitally-selectable
single-pole/N-throw switch. The difference between
analog and digital MUXes, seen from the outer world, is
that the data inputs and the output are digital (two-level) for
digital MUXes, whereas in analog MUXes the data signals
can be analog.
LVDT: The linear variable differential transformer (LVDT) is an accurate and reliable method for
measuring linear distance. LVDTs find uses in modern machine-tools, robotics, avionics, and
computerized manufacturing.
2. Connect +5 V to the address line A0, A1, A2, in this case input channel S8 will be selected
and passed to the output D. If V6=+2 V, observe S8 and D.
3. Connect -5 V to the address line A0, A1, A2, now the input channel S1 will be selected and
passed to the output D. If V6=-3 V, observe S1 and D.
4. Connect -5 V/GND to EN pin and check whether channels are disabled at the D output both
in step 2 and step 3.
Discussion:
1. Comment on the output of ADG408 for different A0, A1, A2 combinations?
Step-2:
1. Draw neatly the below circuit in LTSpice. All the components should be chosen as ideal.
2. Connect +5 volts to A0 keeping A1 and A2 connected to GND and observe the waveform
at the node out.
3. Now connect -5 volts to A0 and observe out waveform.
4. Generate a square wave and give it to A0 and observe the out waveform.
Discussions:
1. Comment on the phase difference between the input and output waveforms observed in
step 2, step 3
2. Justify your answer by deriving the equation of out.
Step-3: Getting familiarize with LVDT and its signal conditioning circuit.
1. Draw neatly the circuit in the next page in LTSpice. All the components should be chosen
as ideal.
2. The LVDT is modelled as L1, L2 and L3 windings. Vary the value of the coupling co-
efficient K1, K2 in steps of 0.2 starting from K1=1, K2=0. Note that the sum of K1 and K2
should be always 1.
3. Tabluate the peak-to-peak amplitude of the waveform observed at the output of difference
amplifier (U1) for each incremental value of K1, K2.
S.No K1 K2 Peak-to-Peak
Amplitude(mV)
1 1 0
2 0.8 0.2
3 0.6 0.4
4 0.4 0.6
5 0.2 0.8
6 0 1
4. Plot the characteristics of LVDT from the above table. (Consider k1=0.5, k2=0.5 as null
point)
5. Observe the full wave phase sensitive demodulated (PSD) output waveform at the node out
(output of U3).
Modification: Please ADD this result also
The resistor R7 connected to the primary of the inductor is adding a phase shift in the previous
setup. So, you are getting a phase-shifted PSD from which it is difficult to predict the amount of
displacement.
If you reduce R7 to 1 µΩ then your phase shift will be almost zero and you will get a rectified
output at the node out. This is PSD with zero phase shift. Please try this as well and add in the
report by repeating Step-3. Attaching a sample waveform as well.
Discussions:
1. Comment on the effect of K1, K2 on output of differential amplifier and output of PSD
2. Draw the characteristics of non-ideal LVDT and define the residual voltage in the plot?