A DQ Synchronous Reference Frame Control for Single-Phase Converters

U.A. Miranda and M. Aredes L.G.B. Rolim

Federal University of Rio de Janeiro Federal University of Rio de Janeiro
COPPE / Electrical Engineering Programm Polytechnic School / Department of Electrical Engineering
21945-970 Rio de Janeiro, RJ - BRASIL 21945-970 Rio de Janeiro, RJ - BRASIL
Email: ulisses@coe.ufrj.br Email: rolim@dee.ufrj.br

Abstract— This paper presents a current control using the

DQ synchronous reference frame for single-phase converters.
This control method consists in transforming an orthogonal pair
composed by the actual single-phase input current and a fictitious
current, from a stationary to a rotating frame. The steady state 1
current components in DQ frame become DC instead of AC (a) Real input delayed by 4
of the line period
values so a zero error current control can be implemented. A
single-phase PFC boost rectifier is used as an example application
of this control. To validate the control method simulation and
experimental results are presented.

I. I NTRODUCTION
Single-phase converters with input current regulation are
widely used in several applications such as Active Power
Filters, Power Factor Control (PFC) Rectifiers, Uninterrupted
Power Supplies (UPS), Photo-Voltaic Generation, etc. [1].
The current regulation is based on current control loops, (b) Notch filters tuned at twice the line frequency
however for AC power converters it is not simple to design Fig. 1. Reference and real currents
this controllers, due their time variant currents and voltages.
For DC converters it is quite simple to design linear current
controllers with no steady state error, but if the AC controllers across the capacitor at the reference value and also drain a
are designed the same way as DC controllers, a significant sinusoidal current with unitary power factor.
steady state error in both amplitude and phase may occur.
In three-phase systems the steady-state AC quantities be-
come DC by means of the transformation from ABC static
frame to dq synchronous frame. To perform this transformation
in a single-phase system it is necessary to create a second
quantity in quadrature with the real one so as to apply the
transformation from the static to the synchronous frame. In
the technical literature this second quantity is obtained either
using the capacitor current feedback [2] , delaying the real one
by 14 of the line period or by means of notch filters tuned at
twice the line frequency [3], [4]. Figure 1 shows some of this
methods. Fig. 2. Boost Rectifier
The control presented in this paper is based on the detection
of the frequency and phase of the input voltage by a PLL and The block diagram of the control is showed in Figure 3. The
∗
then generates a fictitious input current. The proposed method reference value Vdc is compared with the measured voltage
neither requires tuned filters nor store samples to produces a Vdc . The error signal is applied to a PI controller and its output
quarter cycle delay. Using this method the current control can is the amplitude Iˆ∗ of the reference current i∗s . The frequency
also be made unsusceptible to switching noise with a proper and phase of the i∗s current are the same of the input voltage
PLL design. A proper choice for the current peak value also vs . They are determined applying vs in a PLL circuit. Once
make possible the reduction of the computational requirements calculated the reference current i∗s it must be synthesized by
in a digital implementation. a current controller.

II. T HE B OOST R ECTIFIER III. DQ S INGLE -P HASE C URRENT C ONTROLLER

Figure 2 shows the rectifier topology. This is a well known A. DQ Transformation
circuit and there are many papers describing it [5], [6], [7]. The transformation to the synchronous frame DQ requires
The circuit control must be able to regulate the voltage Vdc two orthogonal components. In three-phase systems the ABC

0-7803-9033-4/05/$20.00 ©2005 IEEE. 1377

 C. Input currents DQ transformation
The input current is is defined as iα (7) and the fictitious
input current i0β is defined as the reference current i∗β (8).
This choice for the fictitious input current will result in a
simplification, as will be shown.

iα = is = Iˆ cos(ωt) (7)
∗
i0β = i∗β =ˆ sin(ωt) (8)
Fig. 3. Rectifier Control Block Diagram The values of Id and Iq are obtained using equation (1)
where α is the input current (7) and β the fictitious current (8).

components are transformed to the orthogonal and stationary D. Control circuit

αβ frame system and then to the synchronous frame DQ as
shown in Figure 4 and equation (1). The inverse transformation
is showed in (2).
The purpose of this control is to regulate the inductor current
is . Considering no losses in the circuit of Figure 2, its average
equation through a switching period is given by (9).
dIs
L = Vs − Vpwm (9)
dt
This equation is converted to dq frame substituting the
variables for its values in equations (10), (11) and (12).

Vs (t) = V̂ cos ωt (10)

Is = Id cos(ωt) − Iq sin(ωt) (11)

Fig. 4. Frames
Vpwm = Vpwmd cos(ωt) − Vpwmq sin(ωt) (12)

      Splitting the resulting equation in the cosine and sine terms,

d cos(θ) sin(θ) α leads to the circuit equations for the d (13) and q (14) axis.
= · (1)
q − sin(θ) cos(θ) β
dId Vpwmd V̂
      = −ωIq − + (13)
α cos(θ) − sin(θ) d dt L L
= · (2)
β sin(θ) cos(θ) q
dIq Vpwmq
= ωId − (14)
However this transformation cannot be applied directly in dt L
the single-phase systems, because there is only one variable. The equilibrium point (15),(16) is reached when the deriva-
This drawback can be solved creating a fictitious input current. tives terms are equal to zero.
B. Reference Values Vpwmd = −ωLIq + V̂ (15)
As showed in the previous section, the desired current i∗s
has phase and frequency obteined from the ωt signal of the
Vpwmq = ωLId (16)
PLL circuit. It is also possible to create a second reference
current in quadrature and delayed in relation with i∗s , using the Now the references and the control variables are DC quan-
same ωt signal. These reference currents are equivalents to the tities and the controller can be implemented the same way as
currents in the αβ frame, as show in equations (3) and (4). in the DC converters. Note that were added coupling terms
between the d and q axis but these terms can be decoupled
i∗α = i∗s = Iˆ∗ cos(ωt) (3) with a proper controller design.
The block diagram of the control is showed in Figure 5. Id
i∗β = Iˆ∗ sin(ωt) (4) and Iq currents are compared with their references values and
the PI controllers guarantee no steady state current error. The
Performing the DQ transformation taking to the input gain ωL provide the decoupling terms and the addition of the
voltage vs as reference, it is equivalent to make θ = ωt in peak voltage V is intend to compensate the countereffect of
equation (1), leads to equations (5) and (6). the supply voltage, with respect to the converter output voltage
vpwm , which has the same behavior as a disturbance signal.
Id∗ = Iˆ∗ (5) When transformed to the stationary reference frame (2) the
β term is discarded and the α term is the signal vpwm that is
Iq∗ = 0 (6) applied to the single-phase unipolar SPWM.

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 Fig. 5. Single-Phase dq Current Control Block Diagram

E. Simplified Control Circuit

As the main concern is the real implementation of this
control, it is useful to reduce the number of mathematical
operations. A simplification in the current control loop is
possible due the value attributed to the fictitious input current
i0β (8), as follow.
The steady state current error in dq frame in Figure 5 is Fig. 6. Simplified Single-Phase dq Current Control Block Diagram
given by equations (17) and (18).

IV. R ESULTS
errord = Id∗ − Id
A. Simulation Results
errord = [i∗α cos(ωt) + i∗β sin(ωt)] −
Simulations of the simplified dq current control have been
[iα cos(ωt) + i0β sin(ωt)] made by using EMTDC/PSCAD software. The simulated
errord = (i∗α − iα ) cos(ωt) + (i∗β − i0β ) sin(ωt) (17) circuit is shown in Figure 2 and its parameters in Table I.

Switching frequency fs 5kHz

Input Voltage vs 220V
errorq = Iq∗ − Iq Boost inductor L 5mH
Rated Direct Voltage Vdc 425V
errorq = [−i∗α sin(ωt) − i∗β cos(ωt)] − Load RL 50Ω
[−iα sin(ωt) − i0β cos(ωt)]
TABLE I
errorq = (iα − i∗α ) sin(ωt) + (i∗β − i0β ) cos(ωt) (18) S IMULATED CIRCUIT PARAMETERS

Using equation (8) in equations (17) and (18) results in the

simplified equations (19), (20) for the steady-state errors.
errord = (i∗α − iα ) cos(ωt)
errorq = −(i∗α − iα ) sin(ωt)
At the simulation instant of 0.5s the rectifier is turned on
and the load at 1.5s. The reference and the real currents in
(19) the synchronous dq and in the static reference frames at this
instants are shown in Figures 7 to 10 . Figure 11 shows the
(20) input voltage and current.

The decoupling terms have the objective to improve the
controller dynamic and can be neglect without committing its
operation. The input voltage feed-forward is added directly to
the vpwm signal. It has exactly the same effect of adding the
peak value in the vpwmd component and has the advantage
that is no more necessary the voltage peak detector.
As result, Figure 6 shows the simplified current control
block diagram.
B. Experimental Results
The experimental implementation of the simplified dq cur-
rent control was done using the Texas Instruments DSP
TMS320F2812. Figure 12 shows the turn on transition mo-
ment. Once the capacitor voltage was regulated, as Figure 13
shows, the load was applied, this instant is showed in
Figure 14. The steady state input voltage ande current are
showed in Figure 15.

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 Fig. 7. Id and Iq : Rectifier on

Fig. 11. Input voltage and current

Fig. 8. Id and Iq : Load on

Fig. 12. Input voltage and current at the beginning of the rectifier switching
Fig. 9. is : Rectifier on

Fig. 10. is : Load on

V. C ONCLUSION
A single-phase synchronous reference frame current control
based on the PLL circuit was presented. The calculation of the
fictitious input current using the frequency and phase detected
by the PLL was successful. It has the advantage that it is not Fig. 13. Capacitor Voltage
necessary the use of filters and does not require digital memory
to allocate samples.
And also, the proper choice for the peak value of this without compromising its operation. After this simplification
current has made possible a simplification in the control the control become very simple to be implemented in a digital

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 [4] J. Salaet, S. Alepuz, A. Gilabert, and J. Bordonau. Comparison between
two methods of dq transformation for single phase converters control.
application to a 3-level boost rectifier. Power Electronics Specialists
Conference, 1:214 – 220, June 2004.
[5] S. Manias. Novel full bridge semicontrolled switch mode rectifier. IEE
Proceedings on Electric Power Applications, 138:252 – 256, September
1991.
[6] Boon-Teck Ooi and Omar Stihi. A single-phase controlled-current pwm
rectifier. IEEE Transactions on Power Electronics, 3(4):453–459, October
1988.
[7] V.B. Sriram, S. SenGupta, and A. Patra. Control of a transistorised single-
phase bridge converter operated in the rectifier mode. Proceedings of
IEEE International Conference on Industrial Technology 2000, 2:353 –
358, January 2000.

Fig. 14. Input voltage and current when the load is applied

Fig. 15. Steady state Input voltage and current

controller.
The control was able to achieve zero steady state current
error. It was validated by the simulation and experimental
results presented.

ACKNOWLEDGMENT
This project was supported by CAPES/CNPq.

R EFERENCES
[1] B Singh, B.N. Singh, A. Chandra, K. Al-Haddad, A. Pandey, and
D.P. Kothari. A review of single-phase improved power quality ac-dc
converters. IEEE Transactions on Industrial Electronics, 50(5):962 –
981, October 2003.
[2] M.J. Ryan and R.D. Lorenz. A synchronous-frame controller for a single-
phase sine wave inverter. Conference Proceedings of Applied Power
Electronics Conference, 2:813 – 819, February 1997.
[3] Richard Zhang, Makr Cardinal, Paul Szczesny, and Mark Dame. A grid
simulator with control of single-phase power converters in d-q rotating
frame. Power Electronics Specialists Conference, 3:1431–1436, June
2002.

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