Acer Aspire A715-71 Compal LA-E911P Rev 1A Схема

A B C D E
1 1
Compal Confidential 2
C5MMH MB Schematic Document

LA-E911P
3 3
Rev:1A
2017.04.11
4 4
Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2_LA-E361P
Date: Tuesday, April 11, 2017 Sheet 1 of 64
A B C D E
A B C D E
Fan Control*2
page 42
eDP Interleaved
Memory
Memory BUS 260 pin DDR4-SO-DIMM X1
BANK 0, 1, 2, 3 page 14
1
Dual Channel 1
HDMI Kabylake H PROCESSOR

CONN 1.2V DDR4 1333/1600 260pin DDR4-SO-DIMM X1
page 31
page 30 BGA1440 BANK 4, 5, 6, 7 page 15
eDP
(42X28) (SKL-H_4+2)
HDMI x 4 lanes Nvidia N17P-GX PEG x16
8GT/s Processor page 06~13
with gDDR5 x4
page 23~29
X4 DMI USB 3.0 USB 3.0

page 37
NGFF page 34 conn Type-C x2 CMOS
WLAN PCIE 2.0
PCIE 3.0 x4 USB (port 2) USB/B (port 3,4) Camera
USB port 7 5GT/s
2 8GT/s USB (port 9) 2
port 3 Port 9-12 Flexible IO
page 32 page 38 Skylake PCH - H USBx8
USB2.0 Finger Print
PCIE 2.0 SATA3.0 FCBGA(23X23) USB/B (port 5,6)
USB (port 10)
5GT/s 6.0 Gb/s
port 4 port 3 page 33 page 30 page 42
48MHz page 35 page 36

LAN(GbE)/CardReader SATA Re-Driver
Realtek 8411H PARADE PS8527 837pin FCBGA HD Audio 3.3V 24MHz
page 16~22
Card Reader RJ45 conn. SATA HDD Conn. HDA Codec

LPC/eSPI BUS ALC255
3 page 40 3
CLK=24MHz
page 32. ENE

page 38 KB9022/9032 TPM
page 39 page 41
SPI Int. Speaker Int. DMIC UAJ
RTC CKT. Sub Board on Camera on Sub/B
page 40 page 30 page 33
page 21
LS-E911P Touch Pad Int.KBD
Hall sensor/B PS2 / I2C
page 33 SPI ROM x1
Power On/Off CKT.
page 17
page 41 LS-E912P
USB2/B page 41 page 41
page 33
4 DC/DC Interface CKT. 4
page 43
Security Classification Compal Secret Data Compal Electronics, Inc.

2016/01/29 2017/01/10 Title
Power Circuit DC/DC Issued Date Deciphered Date Block Diagrams
page 44~61 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5MMH M/B LA-E911P
A B C D E
A B C D E
1 1
CPU_XDP_TMS
<9,18> CPU_XDP_TMS CPU_XDP_TDI SKYLAKE_HALO
<9,18> CPU_XDP_TDI UC1D
BGA1440
CPU_XDP_TDO K36 D29
<9,18> CPU_XDP_TDO CPU_XDP_TCK0 DDI1_TXP[0] EDP_TXP[0] EDP_TXP0 <30>
<9,18> CPU_XDP_TCK0 K37 E29
PCH_JTAG_TCK1 DDI1_TXN[0] EDP_TXN[0] EDP_TXN0 <30>
<18> PCH_JTAG_TCK1 J35 F28
DDI1_TXP[1] EDP_TXP[1] EDP_TXP1 <30>
J34 E28
DDI1_TXN[1] EDP_TXN[1] EDP_TXN1 <30>
H37
DDI1_TXP[2] EDP_TXN[2]
B29
EDP_TXN2 <30> <eDP>
H36 A29
DDI1_TXN[2] EDP_TXP[2] EDP_TXP2 <30>
J37 B28
DDI1_TXP[3] EDP_TXN[3] EDP_TXN3 <30>
J38 C28
DDI1_TXN[3] EDP_TXP[3] EDP_TXP3 <30>
If need debug from usb port. this cmc@ need pop D27
DDI1_AUXP EDP_AUXP
C26 EDP_AUXP <30>
E27 B26 EDP_AUXN <30>
DDI1_AUXN EDP_AUXN
+1.0VS_VCCSTG H34
H33 DDI2_TXP[0]
DDI2_TXN[0] +1.0VS_VCCIO
TMS/TDI pin CPU on-die termination F37
DDI2_TXP[1] EDP_DISP_UTIL
A33
RC5 2 CMC@ 1 51_0402_5% CPU_XDP_TMS G38
F34 DDI2_TXN[1]
2 RC6 2 CMC@ 1 51_0402_5% CPU_XDP_TDI F35 DDI2_TXP[2] D37 EDP_COMP 2 1 2
DDI2_TXN[2] EDP_RCOMP
Place to PCH side E37
DDI2_TXP[3]
24.9_0402_1% RC1
RC7 1 CMC@ 2 100_0402_1% CPU_XDP_TDO E36 CAD note:
DDI2_TXN[3] Trace width=20 mils,Spacing=25mil,Max length=100mils
RC14 2 @ 1 51_0402_5% PCH_JTAG_TCK1 F26
E26 DDI2_AUXP
DDI2_AUXN
C34
D34 DDI3_TXP[0]
B36 DDI3_TXN[0]
+1.0VS_VCCSTG B34 DDI3_TXP[1]
F33 DDI3_TXN[1]
E33 DDI3_TXP[2]
RC8 1 CMC@ 2 100_0402_1% CPU_XDP_TDO C33 DDI3_TXN[2]
DDI3_TXP[3]
Place to CPU side B33
DDI3_TXN[3] G27 CPU_DISPA_BCLK <18>
RC13 2 CMC@ 1 51_0402_1% CPU_XDP_TCK0 A27 PROC_AUDIO_CLK G25
DDI3_AUXP PROC_AUDIO_SDI CPU_DISPA_SDO <18>
B27 G29 CPU_DISPA_SDI 2 1
DDI3_AUXN PROC_AUDIO_SDO CPU_DISPA_SDI_R <18>
RC2
4 OF 14 20_0402_5%
SKL-H_BGA1440 Close to CPU
@ REV = 1 ?
1.0 Modify
UC1 UC1 UH1

3 SR32S@ SR32Q@ SR30W @ 3
S IC CL8067702870309 SR32S B0 2.5G ABO! S IC CL8067702870109 SR32Q B0 2.8G ABO! S IC GL82HM175 SR30W D1 FCBGA PCH-H ABO!
SA0000AD850 SA0000AD750 SA0000ADB30
UV1 UV1
G0@ G1@
S IC N17P-G0-A1 FCBGA 908P GPU 1706 S IC N17P-G1-A1 FCBGA 908P GPU 1707
SA0000A0540 SA0000A0660
1.A Modify
ZZZ
DAZ@
PCB C5MMH LA-E911P LS-E911P/E912P

DAZ20Z00102
1A Modify
4 4
2016/11/03
Compal Secret Data
2017/01/10 Title
SKL-H(1/9)DDI,EDP
C5MMH M/B LA-E911P

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D E
A B C D E
Interleaved Memory
UC1A SKYLAKE_HALO
UC1B SKYLAKE_HALO
BGA1440
<14> DDR_A_D[0..15] DDR_A_D0 DDR_A_CLK0
1 BR6 AG1 DDR_A_CLK0 <14> BGA1440 1
DDR_A_D1 DDR0_DQ[0] DDR0_CKP[0] DDR_A_CLK#0 <15> DDR_B_D[0..15] DDR_B_D0 DDR_B_CLK0
BT6 AG2 DDR_A_CLK#0 <14> BT11 AM9 DDR_B_CLK0 <15>
DDR_A_D2 BP3 DDR0_DQ[1] DDR0_CKN[0] AK1 DDR_A_CLK#1 DDR_B_D1 BR11 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKP[0] AN9 DDR_B_CLK#0
DDR_A_D3 DDR0_DQ[2] DDR0_CKN[1] DDR_A_CLK1 DDR_A_CLK#1 <14> DDR_B_D2 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[0] DDR_B_CLK#1 DDR_B_CLK#0 <15>
BR3 AK2 DDR_A_CLK1 <14> BT8 AM8 DDR_B_CLK#1 <15>
DDR_A_D4 BN5 DDR0_DQ[3] DDR0_CKP[1] AL3 DDR_B_D3 BR8 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKN[1] AM7 DDR_B_CLK1
DDR_A_D5 DDR0_DQ[4] DDR0_CLKP[2] DDR_B_D4 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] DDR_B_CLK1 <15>
BP6 AK3 BP11 AM11
DDR_A_D6 BP2 DDR0_DQ[5] DDR0_CLKN[2] AL2 DDR_B_D5 BN11 DDR1_DQ[4]/DDR0_DQ[20] DDR1_CLKP[2] AM10
DDR_A_D7 BN3 DDR0_DQ[6] DDR0_CLKP[3] AL1 DDR_B_D6 BP8 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CLKN[2] AJ10
DDR_A_D8 BL4 DDR0_DQ[7] DDR0_CLKN[3] DDR_B_D7 BN8 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CLKP[3] AJ11
DDR_A_D9 BL5 DDR0_DQ[8] AT1 DDR_A_CKE0 DDR_B_D8 BL12 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CLKN[3]
DDR_A_D10 DDR0_DQ[9] DDR0_CKE[0] DDR_A_CKE1 DDR_A_CKE0 <14> DDR_B_D9 DDR1_DQ[8]/DDR0_DQ[24] DDR_B_CKE0
BL2 AT2 DDR_A_CKE1 <14> BL11 AT8 DDR_B_CKE0 <15>
DDR_A_D11 BM1 DDR0_DQ[10] DDR0_CKE[1] AT3 DDR_B_D10 BL8 DDR1_DQ[9]/DDR0_DQ[25] DDR1_CKE[0] AT10 DDR_B_CKE1
DDR_A_D12 DDR0_DQ[11] DDR0_CKE[2] DDR_B_D11 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CKE[1] DDR_B_CKE1 <15>
BK4 AT5 BJ8 AT7
DDR_A_D13 BK5 DDR0_DQ[12] DDR0_CKE[3] DDR_B_D12 BJ11 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CKE[2] AT11
DDR_A_D14 BK1 DDR0_DQ[13] AD5 DDR_A_CS#0 DDR_B_D13 BJ10 DDR1_DQ[12]/DDR0_DQ[28] DDR1_CKE[3]
DDR_A_D15 DDR0_DQ[14] DDR0_CS#[0] DDR_A_CS#1 DDR_A_CS#0 <14> DDR_B_D14 DDR1_DQ[13]/DDR0_DQ[29] DDR_B_CS#0
BK2 AE2 DDR_A_CS#1 <14> BL7 AF11 DDR_B_CS#0 <15>
<14> DDR_A_D[16..31] DDR_A_D16 DDR0_DQ[15] DDR0_CS#[1] DDR_B_D15 DDR1_DQ[14]/DDR0_DQ[30] DDR1_CS#[0] DDR_B_CS#1
BG4 AD2 BJ7 AE7 DDR_B_CS#1 <15>
DDR_A_D17 DDR0_DQ[16]/DDR0_DQ[32] DDR0_CS#[2] <15> DDR_B_D[16..31] DDR_B_D16 DDR1_DQ[15]/DDR0_DQ[31] DDR1_CS#[1]
BG5 AE5 BG11 AF10
DDR_A_D18 BF4 DDR0_DQ[17]/DDR0_DQ[33] DDR0_CS#[3] DDR_B_D17 BG10 DDR1_DQ[16]/DDR0_DQ[48] DDR1_CS#[2] AE10
DDR_A_D19 BF5 DDR0_DQ[18]/DDR0_DQ[34] AD3 DDR_A_ODT0 DDR_B_D18 BG8 DDR1_DQ[17]/DDR0_DQ[49] DDR1_CS#[3]
DDR_A_D20 DDR0_DQ[19]/DDR0_DQ[35] DDR0_ODT[0] DDR_A_ODT1 DDR_A_ODT0 <14> DDR_B_D19 DDR1_DQ[18]/DDR0_DQ[50] DDR_B_ODT0
BG2 AE4 DDR_A_ODT1 <14> BF8 AF7 DDR_B_ODT0 <15>
DDR_A_D21 BG1 DDR0_DQ[20]/DDR0_DQ[36] DDR0_ODT[1] AE1 DDR_B_D20 BF11 DDR1_DQ[19]/DDR0_DQ[51] DDR1_ODT[0] AE8 DDR_B_ODT1
DDR_A_D22 DDR0_DQ[21]/DDR0_DQ[37] DDR0_ODT[2] DDR_B_D21 DDR1_DQ[20]/DDR0_DQ[52] DDR1_ODT[1] DDR_B_ODT1 <15>
BF1 AD4 BF10 AE9
DDR_A_D23 BF2 DDR0_DQ[22]/DDR0_DQ[38] DDR0_ODT[3] DDR_B_D22 BG7 DDR1_DQ[21]/DDR0_DQ[53] DDR1_ODT[2] AE11
DDR_A_D24 BD2 DDR0_DQ[23]/DDR0_DQ[39] AH5 DDR_A_BA0 DDR_B_D23 BF7 DDR1_DQ[22]/DDR0_DQ[54] DDR1_ODT[3]
DDR_A_D25 DDR0_DQ[24]/DDR0_DQ[40] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR_A_BA1 DDR_A_BA0 <14> DDR_B_D24 DDR1_DQ[23]/DDR0_DQ[55] DDR_B_MA16
BD1 AH1 DDR_A_BA1 <14> BB11 AH10 DDR_B_MA16 <15>
DDR_A_D26 BC4 DDR0_DQ[25]/DDR0_DQ[41] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] AU1 DDR_A_BG0 DDR_B_D25 BC11 DDR1_DQ[24]/DDR0_DQ[56] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] AH11 DDR_B_MA14
DDR_A_D27 DDR0_DQ[26]/DDR0_DQ[42] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR_A_BG0 <14> DDR_B_D26 DDR1_DQ[25]/DDR0_DQ[57] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] DDR_B_MA15 DDR_B_MA14 <15>
BC5 BB8 AF8 DDR_B_MA15 <15>
DDR_A_D28 BD5 DDR0_DQ[27]/DDR0_DQ[43] AH4 DDR_A_MA16 DDR_B_D27 BC8 DDR1_DQ[26]/DDR0_DQ[58] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR_A_D29 DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDR_A_MA14 DDR_A_MA16 <14> DDR_B_D28 DDR1_DQ[27]/DDR0_DQ[59] DDR_B_BA0
BD4 AG4 DDR_A_MA14 <14> BC10 AH8 DDR_B_BA0 <15>
DDR_A_D30 BC1 DDR0_DQ[29]/DDR0_DQ[45] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] AD1 DDR_A_MA15 DDR_B_D29 BB10 DDR1_DQ[28]/DDR0_DQ[60] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] AH9 DDR_B_BA1
DDR_A_D31 DDR0_DQ[30]/DDR0_DQ[46] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDR_A_MA15 <14> DDR_B_D30 DDR1_DQ[29]/DDR0_DQ[61] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR_B_BG0 DDR_B_BA1 <15>
BC2 BC7 AR9 DDR_B_BG0 <15>
<14> DDR_A_D[32..47] DDR_A_D32 DDR0_DQ[31]/DDR0_DQ[47] DDR_A_MA0 DDR_B_D31 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
AB1 AH3 DDR_A_MA0 <14> BB7
DDR_A_D33 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR_A_MA1 <15> DDR_B_D[32..47] DDR_B_D32 DDR1_DQ[31]/DDR0_DQ[63] DDR_B_MA0
AB2 AP4 DDR_A_MA1 <14> AA11 AJ9 DDR_B_MA0 <15>
DDR_A_D34 AA4 DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] AN4 DDR_A_MA2 DDR_B_D33 AA10 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] AK6 DDR_B_MA1
2 DDR_A_D35 DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR_A_MA3 DDR_A_MA2 <14> DDR_B_D34 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR_B_MA2 DDR_B_MA1 <15> 2
AA5 AP5 DDR_A_MA3 <14> AC11 AK5 DDR_B_MA2 <15>
DDR_A_D36 AB5 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] AP2 DDR_A_MA4 DDR_B_D35 AC10 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] AL5 DDR_B_MA3
DDR_A_D37 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] DDR_A_MA5 DDR_A_MA4 <14> DDR_B_D36 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[3] DDR_B_MA4 DDR_B_MA3 <15>
AB4 AP1 DDR_A_MA5 <14> AA7 AL6 DDR_B_MA4 <15>
DDR_A_D38 AA2 DDR0_DQ[37]/DDR1_DQ[5] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] AP3 DDR_A_MA6 DDR_B_D37 AA8 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[4] AM6 DDR_B_MA5
DDR_A_D39 DDR0_DQ[38]/DDR1_DQ[6] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR_A_MA7 DDR_A_MA6 <14> DDR_B_D38 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR_B_MA6 DDR_B_MA5 <15>
AA1 AN1 DDR_A_MA7 <14> AC8 AN7 DDR_B_MA6 <15>
DDR_A_D40 V5 DDR0_DQ[39]/DDR1_DQ[7] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] AN3 DDR_A_MA8 DDR_B_D39 AC7 DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] AN10 DDR_B_MA7
V2 AT4 DDR_A_MA9 <14> W8 AN8 DDR_B_MA8 <15>
DDR_A_D42 U1 DDR0_DQ[41]/DDR1_DQ[9] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] AH2 DDR_A_MA10 DDR_B_D41 W7 DDR1_DQ[40]/DDR1_DQ[24] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] AR11 DDR_B_MA9
DDR_A_D43 DDR0_DQ[42]/DDR1_DQ[10] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR_A_MA11 DDR_A_MA10 <14> DDR_B_D42 DDR1_DQ[41]/DDR1_DQ[25] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR_B_MA10 DDR_B_MA9 <15>
U2 AN2 DDR_A_MA11 <14> V10 AH7 DDR_B_MA10 <15>
DDR_A_D44 V1 DDR0_DQ[43]/DDR1_DQ[11] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] AU4 DDR_A_MA12 DDR_B_D43 V11 DDR1_DQ[42]/DDR1_DQ[26] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] AN11 DDR_B_MA11
V4 AE3 DDR_A_MA13 <14> W11 AR10 DDR_B_MA12 <15>
DDR_A_D46 U5 DDR0_DQ[45]/DDR1_DQ[13] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] AU2 DDR_A_BG1 DDR_B_D45 W10 DDR1_DQ[44]/DDR1_DQ[28] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] AF9 DDR_B_MA13
DDR_A_D47 DDR0_DQ[46]/DDR1_DQ[14] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR_A_ACT# DDR_A_BG1 <14> DDR_B_D46 DDR1_DQ[45]/DDR1_DQ[29] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] DDR_B_BG1 DDR_B_MA13 <15>
U4 AU3 DDR_A_ACT# <14> V7 AR7 DDR_B_BG1 <15>
<14> DDR_A_D[48..63] DDR_A_D48 DDR0_DQ[47]/DDR1_DQ[15] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR_B_D47 DDR1_DQ[46]/DDR1_DQ[30] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDR_B_ACT#
R2 V8 AT9 DDR_B_ACT# <15>
DDR_A_D49 DDR0_DQ[48]/DDR1_DQ[32] DDR_A_PARITY <15> DDR_B_D[48..63] DDR_B_D48 DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
P5 AG3 DDR_A_PARITY <14> R11
DDR_A_D50 R4 DDR0_DQ[49]/DDR1_DQ[33] DDR0_PAR AU5 DDR_A_ALERT# DDR_B_D49 P11 DDR1_DQ[48] AJ7 DDR_B_PARITY
DDR_A_D51 DDR0_DQ[50]/DDR1_DQ[34] DDR0_ALERT# DDR_A_ALERT# <14> DDR_B_D50 DDR1_DQ[49] DDR1_PAR DDR_B_ALERT# DDR_B_PARITY <15>
P4 P7 AR8 DDR_B_ALERT# <15>
DDR_A_D52 R5 DDR0_DQ[51]/DDR1_DQ[35] DDR_B_D51 R8 DDR1_DQ[50] DDR1_ALERT#
DDR_A_D53 P2 DDR0_DQ[52]/DDR1_DQ[36] BR5 DDR_A_DQS#0 DDR_B_D52 R10 DDR1_DQ[51]
DDR_A_D54 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSN[0] DDR_A_DQS#1 DDR_A_DQS#0 <14> DDR_B_D53 DDR1_DQ[52] DDR_B_DQS#0
R1 BL3 DDR_A_DQS#1 <14> P10 BP9 DDR_B_DQS#0 <15>
DDR_A_D55 P1 DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQSN[1] BG3 DDR_A_DQS#2 DDR_B_D54 R7 DDR1_DQ[53] DDR1_DQSN[0]/DDR0_DQSN[2] BL9 DDR_B_DQS#1
DDR_A_D56 DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[2]/DDR0_DQSN[4] DDR_A_DQS#3 DDR_A_DQS#2 <14> DDR_B_D55 DDR1_DQ[54] DDR1_DQSN[1]/DDR0_DQSN[3] DDR_B_DQS#2 DDR_B_DQS#1 <15>
M4 BD3 DDR_A_DQS#3 <14> P8 BG9 DDR_B_DQS#2 <15>
DDR_A_D57 M1 DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSN[3]/DDR0_DQSN[5] AB3 DDR_A_DQS4 DDR_B_D56 L11 DDR1_DQ[55] DDR1_DQSN[2]/DDR0_DQSN[6] BC9 DDR_B_DQS#3
DDR_A_D58 DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSP[4]/DDR1_DQSP[0] DDR_A_DQS5 DDR_A_DQS4 <14> DDR_B_D57 DDR1_DQ[56] DDR1_DQSN[3]/DDR0_DQSN[7] DDR_B_DQS#4 DDR_B_DQS#3 <15>
L4 V3 DDR_A_DQS5 <14> M11 AC9 DDR_B_DQS#4 <15>
DDR_A_D59 L2 DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSP[5]/DDR1_DQSP[1] R3 DDR_A_DQS6 DDR_B_D58 L7 DDR1_DQ[57] DDR1_DQSN[4]/DDR1_DQSN[2] W9 DDR_B_DQS#5
DDR_A_D60 DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQSP[6]/DDR1_DQSP[4] DDR_A_DQS7 DDR_A_DQS6 <14> DDR_B_D59 DDR1_DQ[58] DDR1_DQSN[5]/DDR1_DQSN[3] DDR_B_DQS#6 DDR_B_DQS#5 <15>
M5 M3 DDR_A_DQS7 <14> M8 R9 DDR_B_DQS#6 <15>
DDR_A_D61 M2 DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQSP[7]/DDR1_DQSP[5] DDR_B_D60 L10 DDR1_DQ[59] DDR1_DQSN[6] M9 DDR_B_DQS#7
DDR_A_D62 DDR0_DQ[61]/DDR1_DQ[45] DDR_A_DQS0 DDR_B_D61 DDR1_DQ[60] DDR1_DQSN[7] DDR_B_DQS#7 <15>
L5 BP5 DDR_A_DQS0 <14> M10
DDR_A_D63 L1 DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQSP[0] BK3 DDR_A_DQS1 DDR_B_D62 M7 DDR1_DQ[61] BR9 DDR_B_DQS0
DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSP[1] DDR_A_DQS2 DDR_A_DQS1 <14> DDR_B_D63 DDR1_DQ[62] DDR1_DQSP[0]/DDR0_DQSP[2] DDR_B_DQS1 DDR_B_DQS0 <15>
BF3 DDR_A_DQS2 <14> L8 BJ9 DDR_B_DQS1 <15>
BA2 DDR0_DQSP[2]/DDR0_DQSP[4] BC3 DDR_A_DQS3 DDR1_DQ[63] DDR1_DQSP[1]/DDR0_DQSP[3] BF9 DDR_B_DQS2
DDR0_ECC[0] DDR0_DQSP[3]/DDR0_DQSP[5] DDR_A_DQS#4 DDR_A_DQS3 <14> DDR1_DQSP[2]/DDR0_DQSP[6] DDR_B_DQS3 DDR_B_DQS2 <15>
BA1 AA3 DDR_A_DQS#4 <14> AW11 BB9 DDR_B_DQS3 <15>
AY4 DDR0_ECC[1] DDR0_DQSN[4]/DDR1_DQSN[0] U3 DDR_A_DQS#5 AY11 DDR1_ECC[0] DDR1_DQSP[3]/DDR0_DQSP[7] AA9 DDR_B_DQS4
DDR0_ECC[2] DDR0_DQSN[5]/DDR1_DQSN[1] DDR_A_DQS#6 DDR_A_DQS#5 <14> DDR1_ECC[1] DDR1_DQSP[4]/DDR1_DQSP[2] DDR_B_DQS5 DDR_B_DQS4 <15>
AY5 P3 DDR_A_DQS#6 <14> AY8 V9 DDR_B_DQS5 <15>
3 BA5 DDR0_ECC[3] DDR0_DQSN[6]/DDR1_DQSN[4] L3 DDR_A_DQS#7 AW8 DDR1_ECC[2] DDR1_DQSP[5]/DDR1_DQSP[3] P9 DDR_B_DQS6 3
DDR0_ECC[4] DDR0_DQSN[7]/DDR1_DQSN[5] DDR_A_DQS#7 <14> DDR1_ECC[3] DDR1_DQSP[6] DDR_B_DQS7 DDR_B_DQS6 <15>
BA4 AY10 L9 DDR_B_DQS7 <15>
AY1 DDR0_ECC[5] AY3 AW10 DDR1_ECC[4] DDR1_DQSP[7]
AY2 DDR0_ECC[6] DDR0_DQSP[8] BA3 AY7 DDR1_ECC[5] AW9
DDR0_ECC[7] DDR0_DQSN[8] AW7 DDR1_ECC[6] DDR1_DQSP[8] AY9
DDR1_ECC[7] DDR1_DQSN[8]
DDR CHANNEL B
DDR CHANNEL A
121_0402_1% 2 1 RC17 SM_RCOMP0 G1 BN13 +0.6V_VREFCA
SM_RCOMP1 H1 DDR_RCOMP[0] DDR_VREF_CA +0.6V_VREFCA
75_0402_1% 2 1 RC18 BP13
1 OF 14 100_0402_1% 2 1 RC19 SM_RCOMP2 J2 DDR_RCOMP[1] DDR0_VREF_DQ BR13 +0.6V_B_VREFDQ
DDR_RCOMP[2] 2 OF 14 DDR1_VREF_DQ +0.6V_B_VREFDQ
SKL-H_BGA1440
@ REV = 1 ? close to CPU SKL-H_BGA1440
@ REV = 1 ?
4 4
2016/11/03
Compal Secret Data
2017/01/10 Title
SKL-H(2/9)DDRIII
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom
C5MMH M/B LA-E911P 1A

A B C D E
A B C D E
1 1
UC1C SKYLAKE_HALO
BGA1440
CC6 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P15 E25 B25 PEG_HTX_GRX_P15 0.22U_0201_6.3V6K 2 1VGA@ CC7
<23> PEG_GTX_HRX_P15 PEG_GTX_C_HRX_N15 PEG_RXP[0] PEG_TXP[0] PEG_HTX_GRX_N15 0.22U_0201_6.3V6K PEG_HTX_C_GRX_P15 <23>
<23> PEG_GTX_HRX_N15 CC8 VGA@ 1 2 0.22U_0201_6.3V6K D25 A25 2 1VGA@ CC9
PEG_RXN[0] PEG_TXN[0] PEG_HTX_C_GRX_N15 <23>
<23> PEG_GTX_HRX_N14 CC12 VGA@ 1 2 0.22U_0201_6.3V6K F24 C24 2 1VGA@ CC13
<23> PEG_GTX_HRX_P9 PEG_GTX_C_HRX_N9 PEG_RXP[6] PEG_TXP[6] PEG_HTX_GRX_N9 PEG_HTX_C_GRX_P9 <23>
<23> PEG_GTX_HRX_N9 CC27 VGA@ 1 2 0.22U_0201_6.3V6K D19 A19 0.22U_0201_6.3V6K 2 1VGA@ CC28
<23> PEG_GTX_HRX_N8 CC31 VGA@ 1 2 0.22U_0201_6.3V6K F18 C18 0.22U_0201_6.3V6K 2 1VGA@ CC32
2 2
CC33 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P7 D17 A17 PEG_HTX_GRX_P7 0.22U_0201_6.3V6K 2 1VGA@ CC34
<23> PEG_GTX_HRX_N7 CC35 VGA@ 1 2 0.22U_0201_6.3V6K E17 B17 0.22U_0201_6.3V6K 2 1VGA@ CC36
CC37 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P6 F16 C16 PEG_HTX_GRX_P6 0.22U_0201_6.3V6K 2 1VGA@ CC38
1 2 PEG_RCOMP G2
+1.0VS_VCCIO PEG_RCOMP
CAD note: RC20 24.9_0402_1%
Trace width=12 mils,Spacing=15mil,Max
3 length=400mils 3
DMI_CRX_PTX_P0 D8 B8 DMI_CTX_PRX_P0
<16> DMI_CRX_PTX_P0 DMI_CRX_PTX_N0 DMI_RXP[0] DMI_TXP[0] DMI_CTX_PRX_N0 DMI_CTX_PRX_P0 <16>
<16> DMI_CRX_PTX_N0 E8 A8 DMI_CTX_PRX_N0 <16>
DMI_RXN[0] DMI_TXN[0]
DMI_CRX_PTX_P1 E6 C6 DMI_CTX_PRX_P1
<16> DMI_CRX_PTX_N1 F6 B6 DMI_CTX_PRX_N1 <16>
DMI_CRX_PTX_P2 D5 B5 DMI_CTX_PRX_P2
<16> DMI_CRX_PTX_N2 E5 A5 DMI_CTX_PRX_N2 <16>
DMI_CRX_PTX_P3 J8 D4 DMI_CTX_PRX_P3
<16> DMI_CRX_PTX_N3 J9 B4 DMI_CTX_PRX_N3 <16>
3 OF 14
SKL-H_BGA1440
@ REV = 1
?
4 4
2016/11/03
Compal Secret Data
2017/01/10 Title
SKL-H(3/9) PEG,DMI
Custom

A B C D E
A B C D E
SVID Alert / Data

SKYLAKE_HALO
1 UC1E 1
CFG4 1 2
CPU_BCLK BGA1440
<19> CPU_BCLK B31 BN25 CFG0 @ RC23 1K_0402_1%
CPU_BCLK# BCLKP CFG[0]
Place the PU resistors close to CPU <19> CPU_BCLK# A32
BCLKN CFG[1]
BN27
BN26 CFG2 PAD T1 CFG5 1 2
RC34 1 2 56_0402_5% CPU_PCIBCLK D35 CFG[2] BN28 RC25 @ 1K_0402_1%
+1.0V_VCCST <19> CPU_PCIBCLK CPU_PCIBCLK# C36 PCI_BCLKP CFG[3]
<19> CPU_PCIBCLK# BR20 CFG4
PCI_BCLKN CFG[4]
(To VR) CFG[5]
BM20 CFG5 CFG2 1 2
CPU_SVID_ALERT# 1 2 CPU_24M E31 BT20 RC26 1K_0402_1%
CPU_SVID_ALERT#_R <52> <19> CPU_24M CPU_24M# CLK24P CFG[6]
RC36 220_0402_5% <19> CPU_24M# D31 BP20 CFG7 @
CLK24N CFG[7] BR23
CFG[8] BR22 PAD T2
RC38 1 2 100_0402_1% CFG[9] BT23
+1.0V_VCCST CFG[10] BT22
CFG[11]
(To VR) CFG[12]
BM19
CPU_SVID_DAT BR19
CPU_SVID_DAT <52> CFG[13] BP19
CPU_SVID_ALERT# BH31 CFG[14] BT19
CPU_SVID_CLK BH32 VIDALERT# CFG[15]
<52> CPU_SVID_CLK CPU_SVID_DAT BH29 VIDSCK BN23
PCIE Config. Signals
H_PROCHOT#_R BR30 VIDSOUT
PROCHOT#
CFG[17]
CFG[16]
BP23 port
DDR_PG_CTRL BT13 CFG[19]
BP22
BN22
assign CFG[6] CFG[5] CFG[2]
+1.0VS_VCCSTG DDR_VTT_CNTL CFG[18]
From EC(open-drain) BPM#[0]
BR27 1 x 16 1 1 1
BT27
BPM#[1]
1
BM31 1 x 16 *
EC_VCCST_PG H13 BPM#[2] BT30
RC31
1K_0402_5% VCCST_PWRGD BPM#[3] reverse 1 1 0
2 RC33 H_CPUPW RGD BT31 2
<18> H_CPUPW RGD PLTRST_CPU# PROCPWRGD CPU_XDP_TDO
499_0402_1% <17> PLTRST_CPU# BP35 BT28 2 x 8 1 0 1
CPU_XDP_TDO <6,18>
2
1 2 H_PROCHOT#_R H_PM_SYNC BM34 RESET# PROC_TDO BL32 CPU_XDP_TDI

<39,46> H_PROCHOT# <17> H_PM_SYNC PM_DOW N PM_SYNC PROC_TDI CPU_XDP_TMS CPU_XDP_TDI <6,18>
BP31 BP28 2 x 8
H_PECI PM_DOWN PROC_TMS CPU_XDP_TCK0 CPU_XDP_TMS <6,18>
<17,39> H_PECI BT34 BR28 1 0 0
+1.0V_VCCST
<17> THERMTRIP#
THERMTRIP# J31 PECI
THERMTRIP#
PROC_TCK CPU_XDP_TCK0 <6,18> reverse
BP30 1 x 8
RC21 1 2 0_0402_5% H_SKTOCC#_R BR33 PROC_TRST# BL30
<18> H_SKTOCC#
@
SKTOCC# PROC_PREQ# + 2 x 4 0 0 1
1
SKL_CNL_N BN1 BP27

PROC_SELECT# PROC_PRDY#
RC27 1x8+2x4
2
H_CATERR# BM30
1K_0402_5%
RC29 @ RC22
@
CATERR# BT25 CFG_RCOMP reverse 0 0 0
From EC OD output 60.4_0402_1% 0_0402_5% T3 PAD CFG_RCOMP
2
1
1 2 EC_VCCST_PG
<39,43> EC_VCCST_PG_R
FLOAT FOR SKL 5 OF 14 RC24
1
RC30 GND FOR CNL 49.9_0402_1%
20_0402_1% SKL-H_BGA1440
2 1 PM_DOW N @ REV = 1 ?
<17> PM_DOW N_R
2
2
@ RC32
Reference SKL EDS 0.85 Table 6-8
1K_0402_5% CFG signals internal PH default value = 1
1
+1.0V_VCCST Description
DDR_VTT_CNTL to DDR +1.2V_VDDQ
RC28 1 2 1K_0402_5% THERMTRIP# VTT supplied ramped
+3VS
Stall reset sequence after PCU PLL
3
<35uS lock until de-asserted 3
(tCPU18) CFG[0] — 1 = (Default) Normal Operation;
XEMC@
CH65 1 2 .1U_0402_16V7K H_PECI 0.1U_0201_10V6K 2 1 CC65
* No stall.
1
UC2
— 0 = Stall.
1 5 RC35
NC VCC
DDR_PG_CTRL
220K_0402_5% Enable eDP
2 CFG[4] — 1 = Disabled.
2
A
1.0 Modify XEMC@
H_CPUPW RGD Y
4
SM_PG_CTRL <48>
* — 0 = Enabled.
CH1 1 2 .1U_0402_16V7K 3
GND
2
EMC@ 74AUP1G07GW _TSSOP5
H_PROCHOT#_R
CH2 1 2 1000P_0402_50V7K RC37 PEG Training:
@ 2M_0402_5%
* — 1 = (default) PEG Train immediately
XEMC@ CFG[7] following RESET# de assertion.
CH3 1 2 .1U_0402_16V7K THERMTRIP# 1
— 0 = PEG Wait for BIOS for training
EMC@
EC_VCCST_PG
CH67 1 2 1000P_0402_50V7K CFG[1]
CFG[3] Reserved configuration lane.
CFG[8:19]
ESD Reserve ,pleace close to cpu
4 4
2016/11/03
Compal Secret Data
2017/01/10 Title
SKL-H(4/9)CLK,GPIO
Custom

A B C D E
A B C D E
EDS:Rail is unconnected for Processors without GT3/4.

H-4+2/68A H-4+2/55A
+VCC_GT +VCC_GT +VCC_GT
+VCC_CORE +VCC_CORE SKYLAKE_HALO
UC1N
UC1G SKYLAKE_HALO UC1H SKYLAKE_HALO
BGA1440
1 AJ29 1
BGA1440 BG34 BGA1440 AV29 AJ30 VCCGT
AA13 V32 BG35 VCCGT VCCGT AV30 AJ31 VCCGT AF29
AA31 VCC VCC V33 BG36 VCCGT VCCGT AV31 AJ32 VCCGT VCCGTX AF30
AA32 VCC VCC V34 BH33 VCCGT VCCGT AV32 AJ33 VCCGT VCCGTX AF31
AA36 VCC VCC V38 BH37 VCCGT VCCGT AV36 AK31 VCCGT VCCGTX AG13
AA37 VCC VCC W13 BH38 VCCGT VCCGT AW14 AK32 VCCGT VCCGTX AG14
AA38 VCC VCC W14 BJ37 VCCGT VCCGT AW31 AK33 VCCGT VCCGTX AG31
AB29 VCC VCC W29 BJ38 VCCGT VCCGT AW32 AK34 VCCGT VCCGTX AG32
AB30 VCC VCC W30 BL36 VCCGT VCCGT AW33 AK35 VCCGT VCCGTX AG33
AB31 VCC VCC W31 BL37 VCCGT VCCGT AW34 AK36 VCCGT VCCGTX AG34
AB32 VCC VCC W32 BM36 VCCGT VCCGT AW35 AK37 VCCGT VCCGTX AG35
AB35 VCC VCC W35 BM37 VCCGT VCCGT AW36 AK38 VCCGT VCCGTX AG36
AB36 VCC VCC W36 BN36 VCCGT VCCGT AW37 AL13 VCCGT VCCGTX AH13
AB37 VCC VCC W37 BN37 VCCGT VCCGT AW38 AL29 VCCGT VCCGTX AH14
AB38 VCC VCC W38 BN38 VCCGT VCCGT AY29 AL30 VCCGT VCCGTX AH29
AC13 VCC VCC Y29 BP37 VCCGT VCCGT AY30 AL31 VCCGT VCCGTX AH30
AC14 VCC VCC Y30 BP38 VCCGT VCCGT AY31 AL32 VCCGT VCCGTX AH31
AC29 VCC VCC Y31 BR37 VCCGT VCCGT AY32 AL35 VCCGT VCCGTX AH32
AC30 VCC VCC Y32 BT37 VCCGT VCCGT AY35 AL36 VCCGT VCCGTX AJ13
AC31 VCC VCC Y33 BE38 VCCGT VCCGT AY36 AL37 VCCGT VCCGTX AJ14
AC32 VCC VCC Y34 BF13 VCCGT VCCGT AY37 AL38 VCCGT VCCGTX
AC33 VCC VCC Y35 BF14 VCCGT VCCGT AY38 AM13 VCCGT
AC34 VCC VCC Y36 BF29 VCCGT VCCGT BA13 AM14 VCCGT
AC35 VCC VCC L14 BF30 VCCGT VCCGT BA14 AM29 VCCGT
AC36 VCC VCC P29 BF31 VCCGT VCCGT BA29 AM30 VCCGT
2 AD13 VCC VCC P30 BF32 VCCGT VCCGT BA30 AM31 VCCGT 2
AD14 VCC VCC P31 BF35 VCCGT VCCGT BA31 AM32 VCCGT
AD34 VCC VCC P35 BG29 VCCGT VCCGT BA35 AM36 VCCGT
AD35 VCC VCC P36 BG30 VCCGT VCCGT BA36 AN13 VCCGT
AD36 VCC VCC R13 BG31 VCCGT VCCGT BB13 AN14 VCCGT
AE13 VCC VCC R33 BC36 VCCGT VCCGT BB32 AN33 VCCGT
AE31 VCC VCC R36 BD13 VCCGT VCCGT BB35 AN36 VCCGT
AE36 VCC VCC T29 BD30 VCCGT VCCGT BB38 AP13 VCCGT
AE37 VCC VCC T30 BD31 VCCGT VCCGT BC29 AP14 VCCGT
AE38 VCC VCC T31 BD32 VCCGT VCCGT BC30 AP29 VCCGT
AF35 VCC VCC T32 BD33 VCCGT VCCGT BC31 AP30 VCCGT
AF38 VCC VCC T37 BD36 VCCGT VCCGT BE33 AP35 VCCGT
K13 VCC VCC T38 BE31 VCCGT VCCGT BE34 AP36 VCCGT
K14 VCC VCC U29 BE32 VCCGT VCCGT BE35 AP37 VCCGT
L13 VCC VCC U30 BE37 VCCGT VCCGT BE36 AP38 VCCGT
N13 VCC VCC U31 VCCGT VCCGT AR29 VCCGT
N14 VCC VCC U32 AR30 VCCGT
N30 VCC VCC U33 AR31 VCCGT
VCC VCC 8 OF 14 VCCGT
3 N31 U34 AR32 3
VCC VCC SKL-H_BGA1440 VCCGT
N32 U35 AR33 AH38 VCCGT_SENSE
VCC VCC ? VCCGT VCCGT_SENSE VCCGT_SENSE <52>
N35 U36 @ REV = 1 AR34 AH35
N36 VCC VCC V13 AR35 VCCGT VSSGTX_SENSE AH37 VSSGT_SENSE
VCC VCC VCCGT VSSGT_SENSE VSSGT_SENSE <52>
N37 V14 AR36 AH36
N38 VCC VCC V31 AT14 VCCGT VCCGTX_SENSE
P13 VCC VCC P14 AT31 VCCGT
VCC VCC VCCGT
AT32
VCCGT
Trace Length < 25 mils
Trace Length < 25 mils AT33
VCCGT
AT34
AG37 AT35 VCCGT
VCC_SENSE VCCSENSE <52> VCCGT
AG38 AT36
VSS_SENSE VSSSENSE <52> VCCGT
AT37
VCCGT
PH/PL on pwr side AT38
VCCGT
7 OF 14
10/07 Dan AU14
AU29 VCCGT
SKL-H_BGA1440 AU30 VCCGT
@ REV = 1 ? AU31 VCCGT
AU32 VCCGT
AU35 VCCGT
AU36 VCCGT
AU37 VCCGT
AU38 VCCGT 14 OF 14
VCCGT
SKL-H_BGA1440 @
?
4 4
2016/11/03
Compal Secret Data
2017/01/10 Title
SKL-H(5/9)Power,SVID
Custom

A B C D E
A B C D E
+1.2V_VDDQ_CPU +1.2V_VDDQ_CPU +VDDQ_CLK
RC40 BSC Side

For Power consumption+1.2V_VDDQ 1 @ 2
10U_0603_6.3V6M
DDR4/2.8A Measurement 1
SKYLAKE_HALO
RVP11 47u*1,10u*7,1u*3 UC1I
JPC1
0_0603_5%
CC70
CAP place on PWR side. BGA1440
+VCC_SA J30 AA6 2 1
K29 VCCSA VDDQ AE12 2
VCCSA VDDQ
K30
VCCSA VDDQ
AF5
JUMP_43X118
@ Place at Back Side
1 H-4+2/11.1A K31
VCCSA VDDQ
AF6 1
K32 AG5
VCCSA VDDQ JPC2
K33 AG9
K34 VCCSA VDDQ AJ12 2 1
K35 VCCSA VDDQ AL11
L31 VCCSA VDDQ AP6 @
L32 VCCSA VDDQ AP7 JUMP_43X118
VCCSA VDDQ
L35
VCCSA VDDQ
AR12 (1.35V)
L36 AR6
L37 VCCSA VDDQ AT12 +1.2V_VDDQ +VCCSFR_OC_1 +VCCSFR_OC_2
L38 VCCSA VDDQ AW6
M29 VCCSA VDDQ AY6
M30 VCCSA VDDQ J5 1 @ 2
M31 VCCSA VDDQ J6 RC41 0_0402_5%
M32 VCCSA VDDQ K12 1 @ 2
M33 VCCSA VDDQ K6 RC42 0_0402_5%
VCCSA VDDQ
1U_0402_6.3V6K
1U_0402_6.3V6K
M34 L12 1 1
M35 VCCSA VDDQ L6
VCCSA VDDQ
CC71
CC72
M36 R6
VCCSA VDDQ
VDDQ
T6 NOTE:
W6 2 2
VDDQ VCCPLL_OC is allowed to be turned off
RVP11 +1.0VS_VCCIO AG12
VCCIO during S3 & DS3 if it is not powered
PWR NEED PROVIDE G15 Y12 +VDDQ_CLK directly from VDDQ
G17 VCCIO VDDQC
0.95V FOR VCCIO VCCIO
G19 BH13 +VCCSFR_OC_1
VCCIO VCCPLL_OC
H /5.5A G21
VCCIO VCCPLL_OC
G11 +VCCSFR_OC_2 130mA
H15
VCCIO
Place at Back Side
H16
H17 VCCIO H30
VCCIO VCCST +1.0V_VCCST
2 H19 2
VCCIO +1.0VS_VCCSTG
H20
VCCIO VCCSTG
H29 20mA +1.0VS_VCCSTG
H21 (1.0VS) +1.0V_VCCST
H26 VCCIO G30
H27 VCCIO VCCSTG
VCCIO
1U_0402_6.3V6K
1U_0402_6.3V6K
J15
VCCIO VCCPLL
H28 150mA +1.0V_VCCSFR 1 1 1
J16 J28
VCCIO VCCPLL
CC68
CC69
J17 CC67
J19 VCCIO
VCCIO 1U_0402_6.3V6K
J20 M38 VCCSA_SENSE 2 2 2
VCCIO VCCSA_SENSE VSSSA_SENSE VCCSA_SENSE <52>
J21 M37
VCCIO VSSSA_SENSE VSSSA_SENSE <52>
J26
VCCIO
Place at Back Side
J27 H14 VCCIO_SENSE
VCCIO VCCIO_SENSE VSSIO_SENSE VCCIO_SENSE <51>
J14
VSSIO_SENSE VSSIO_SENSE <51>
9 OF 14
+1.0V_VCCST +1.0V_VCCSFR
SKL-H_BGA1440
@ REV = 1 ?
RC39 1 @ 2 0_0402_5% CC66 1 2 1U_0402_6.3V6K
3 3
+1.2V_VDDQ_CPU
+1.0VS_VCCIO
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1
CC83
CC84
CC85
CC86
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1 1 1 1 1 1 1
CC73
CC74
CC75
CC76
CC77
CC78
CC79
CC80
CC81
CC82
CC90
CC87
CC88
CC93
CC91
CC92
CC89
2 2 2 2 2 2 2 2 2 2 2 2 2 2
2 2 2 2 2 2 2
Place at Back Side

Place at Back Side Follow ORB 3/20
+1.2V_VDDQ_CPU : 10UF/6.3V/0603 *10
22UF/6.3V/0603 * 4
update CRB cap QTY
4
CPU_CORE/VCCGT/VCCSA decoupling capacitor place to PWR side 4
2016/11/03
Compal Secret Data
2017/01/10 Title
SKL-H(6/9)POWER
Custom

A B C D E
A B C D E
SKYLAKE_HALO SKYLAKE_HALO
UC1J UC1F SKYLAKE_HALO UC1M SKYLAKE_HALO UC1L
BGA1440 BGA1440 BGA1440 BGA1440

Y38 K1 BB4 AK30 C17 C25
BJ17 Y37 VSS VSS J36 BB3 VSS VSS AK29 C13 VSS VSS C23
BJ19 VCCOPC Y14 VSS VSS J33 BB2 VSS VSS AK4 C9 VSS VSS C21
BJ20 VCCOPC Y13 VSS VSS J32 BB1 VSS VSS AJ38 BT32 VSS VSS C19
BK17 VCCOPC Y11 VSS VSS J25 BA38 VSS VSS AJ37 BT26 VSS VSS C15
BL16 VCCOPC Y8 VSS VSS J10 BA11 VSS VSS AJ4 BT18 VSS VSS C5
1
EDRAM BL17 VCCOPC
VCCOPC
Y7 VSS
VSS
VSS
VSS
J7 BA10 VSS
VSS
VSS
VSS
AJ3 BT14 VSS
VSS
VSS
VSS
BM29 1
BL18 W34 J4 BA9 AJ2 BT12 BM25
BL19 VCCOPC W33 VSS VSS H35 BA8 VSS VSS AJ1 BT9 VSS VSS BM18
BL20 VCCOPC W12 VSS VSS H32 BA7 VSS VSS AH34 BT5 VSS VSS BM11
BL21 VCCOPC W5 VSS VSS H25 BA6 VSS VSS AH33 BR36 VSS VSS BM8
BM17 VCCOPC W4 VSS VSS H22 B9 VSS VSS AH12 BR34 VSS VSS BM7
BN17 VCCOPC W3 VSS VSS H18 AY34 VSS VSS AH6 BR29 VSS VSS BM5
VCCOPC W2 VSS VSS H12 AY33 VSS VSS AG30 BR26 VSS VSS BM3
BJ23 W1 VSS VSS H11 AY14 VSS VSS AG29 BR24 VSS VSS BL38
BJ26 RSVD V30 VSS VSS G28 AY12 VSS VSS AG11 BR21 VSS VSS BL35
BJ27 RSVD V29 VSS VSS G26 AW30 VSS VSS AG10 BR18 VSS VSS BL13
BK23 RSVD V12 VSS VSS G24 AW29 VSS VSS AG8 BR14 VSS VSS BL6
BK26 RSVD V6 VSS VSS G23 AW12 VSS VSS AG7 BR12 VSS VSS BK25
BK27 RSVD U38 VSS VSS G22 AW5 VSS VSS AG6 BR7 VSS VSS BK22
BL23 RSVD U37 VSS VSS G20 AW4 VSS VSS AF14 BP34 VSS VSS BK13
CRB BL24 RSVD
RSVD
U6 VSS
VSS
VSS
VSS
G18 AW3 VSS
VSS
VSS
VSS
AF13 BP33 VSS
VSS
VSS
VSS
BK6
EDRAM BL25
BL26 RSVD
T34
T33 VSS VSS
G16
G14
AW2
AW1 VSS VSS
AF12
AF4
BP29
BP26 VSS VSS
BJ30
BJ29
BL27 RSVD T14 VSS VSS G12 AV38 VSS VSS AF3 BP24 VSS VSS BJ15
BL28 RSVD T13 VSS VSS G10 AV37 VSS VSS AF2 BP21 VSS VSS BJ12
BM24 RSVD T12 VSS VSS G9 AU34 VSS VSS AF1 BP18 VSS VSS BH11
RSVD T11 VSS VSS G8 AU33 VSS VSS AE34 BP14 VSS VSS BH10
T10 VSS VSS G6 AU12 VSS VSS AE33 BP12 VSS VSS BH7
BL15 T9 VSS VSS G5 AU11 VSS VSS AE6 BP7 VSS VSS BH6
BM16 VCCOPC_SENSE T8 VSS VSS G4 AU10 VSS VSS AD30 BN34 VSS VSS BH3
VSSOPC_SENSE T7 VSS VSS F36 AU9 VSS VSS AD29 BN31 VSS VSS BH2
BL22 T5 VSS VSS F31 AU8 VSS VSS AD12 BN30 VSS VSS BG37
BM22 RSVD T4 VSS VSS F29 AU7 VSS VSS AD11 BN29 VSS VSS BG14
RSVD T3 VSS VSS F27 AU6 VSS VSS AD10 BN24 VSS VSS BG6
2 T2 VSS VSS F25 AT30 VSS VSS AD9 BN21 VSS VSS BF34 2
BP15 T1 VSS VSS F23 AT29 VSS VSS AD8 BN20 VSS VSS BF6
BR15 VCCEOPIO R30 VSS VSS F21 AT6 VSS VSS AD7 BN19 VSS VSS BE30
BT15 VCCEOPIO R29 VSS VSS F19 AR38 VSS VSS AD6 BN18 VSS VSS BE5
VCCEOPIO R12 VSS VSS F17 AR37 VSS VSS AC38 BN14 VSS VSS BE4
BP16 P38 VSS VSS F15 AR14 VSS VSS AC37 BN12 VSS VSS BE3
BR16 RSVD P37 VSS VSS F13 AR13 VSS VSS AC12 BN9 VSS VSS BE2
BT16 RSVD P12 VSS VSS F11 AR5 VSS VSS AC6 BN7 VSS VSS BE1
RSVD P6 VSS VSS F9 AR4 VSS VSS AC5 BN4 VSS VSS BD38
N34 VSS VSS F8 AR3 VSS VSS AC4 BN2 VSS VSS BD37
BN15 N33 VSS VSS F5 AR2 VSS VSS AC3 BM38 VSS VSS BD12
BM15 VCCEOPIO_SENSE N12 VSS VSS F4 AR1 VSS VSS AC2 BM35 VSS VSS BD11
VSSEOPIO_SENSE N11 VSS VSS F3 AP34 VSS VSS AC1 BM28 VSS VSS BD10
BP17 N10 VSS VSS F2 AP33 VSS VSS AB34 BM27 VSS VSS BD8
BN16 RSVD N9 VSS VSS E38 AP12 VSS VSS AB33 BM26 VSS VSS BD7
RSVD N8 VSS VSS E35 AP11 VSS VSS AB6 BM23 VSS VSS BD6
N7 VSS VSS E34 AP10 VSS VSS AA30 BM21 VSS VSS BC33
BM14 N6 VSS VSS E9 AP9 VSS VSS AA29 BM13 VSS VSS BC14
BL14 VCC_OPC_1P8 N5 VSS VSS E4 AP8 VSS VSS AA12 BM12 VSS VSS BC13
VCC_OPC_1P8 N4 VSS VSS D33 AN30 VSS VSS A30 BM9 VSS VSS BC6
BJ35 N3 VSS VSS D30 AN29 VSS VSS A28 BM6 VSS VSS BB30
BJ36 RSVD N2 VSS VSS D28 AN12 VSS VSS A26 BM2 VSS VSS BB29
RSVD N1 VSS VSS D26 AN6 VSS VSS A24 BL29 VSS VSS BB6
M14 VSS VSS D24 AN5 VSS VSS A22 BK29 VSS VSS BB5
AT13 M13 VSS VSS D22 AM38 VSS VSS A20 BK15 VSS VSS
AW13 ZVM# M12 VSS VSS D20 AM37 VSS VSS A18 BK14 VSS
MSM# M6 VSS VSS D18 AM12 VSS VSS A16 BJ32 VSS
AU13 L34 VSS VSS D16 AM5 VSS VSS A14 BJ31 VSS
AY13 ZVM2# L33 VSS VSS D14 AM4 VSS VSS A12 BJ25 VSS
3 MSM2# L30 VSS VSS D12 AM3 VSS VSS A10 BJ22 VSS 3
OPC_RCOMP BT29 L29 VSS VSS D10 AM2 VSS VSS A9 BH14 VSS
T4 @ OPCE_RCOMP OPC_RCOMP VSS VSS VSS VSS VSS
T5 @ BR25 K38 D9 AM1 A6 BH12 C2
OPCE_RCOMP2 BP25 OPCE_RCOMP K11 VSS VSS D6 AL34 VSS VSS BH9 VSS NCTFVSS BT36
T6 @ OPCE_RCOMP2 VSS VSS VSS VSS NCTFVSS
K10 D3 AL33 BH8 BT35
10 OF 14 K9 VSS VSS C37 AL14 VSS B37 BH5 VSS NCTFVSS BT4
K8 VSS VSS C31 AL12 VSS NCTFVSS B3 BH4 VSS NCTFVSS BT3
SKL-H_BGA1440 K7 VSS VSS C29 AL10 VSS NCTFVSS A34 BH1 VSS NCTFVSS BR38
@ REV = 1 K5 VSS VSS C27 AL9 VSS NCTFVSS A4 BG38 VSS NCTFVSS
? VSS VSS VSS NCTFVSS VSS
K4 AL8 A3 BG13
K3 VSS D38 AL7 VSS NCTFVSS BG12 VSS
K2 VSS NCTFVSS AL4 VSS BF33 VSS
VSS 6 OF 14 VSS BF12 VSS
13 OF 14 BE29 VSS
SKL-H_BGA1440 BE6 VSS
@ REV = 1 ? SKL-H_BGA1440 BD9 VSS
@ REV = 1 ? BC34 VSS
BC12 VSS
BB12 VSS
VSS 12 OF 14
SKL-H_BGA1440
@ REV = 1 ?
4 4
2016/11/03
Compal Secret Data
2017/01/10 Title
SKL-H(8/9)GND
Custom

A B C D E
A B C D E
+1.0VALW TO +1.0V_VCCST
1 1
+5VALW +1.0VALW
1
1 CC94
CC98 1U_0402_6.3V6K
1U_0402_6.3V6K
2
2 +1.0V_VCCST
1.0 Modify UC3 JC1
Rev_0.53 1 6 +1.0V_VCCST_L 1 2
UC1K SKYLAKE_HALO
RC43 2 IN OUT 1 2
0_0402_5% 3 IN 7 +1.0VALW
BGA1440 VBIAS VCC_PAD JUMP_43X79 1
2 @ 1 EN_1.0V_VCCSTU 4 5
<39,43,48,50> SYSON ON GND @
D1 BM33 1 CC96
E1 RSVD_TP RSVD_TP BL33
RSVD_TP RSVD_TP AOZ1334DI-01_DFN8-7_3X3 0.1U_0201_10V6K
E3 CC95 2
E2 RSVD_TP BJ14
RSVD_TP RSVD_TP 1U_0402_6.3V6K
BJ13 2
RSVD_TP @
BR1
BT2 RSVD_TP BK28
RSVD_TP RSVD BJ28 +1.0V_VCCST: 60mA
RSVD
BN35
RSVD
R ON = 4.5mΩ
BJ18
J24 VSS VDROP= 1.32mV
RSVD
2 H24
BN33 RSVD RSVD_TP
BJ16
BK16
Delay time: 270us 2
BL34 RSVD RSVD_TP

RSVD
N29 BK24
R14 RSVD RSVD_TP BJ24
AE29 RSVD RSVD_TP
AA14 RSVD BK21
RSVD RSVD BJ21
A36 RSVD
A37 RSVD BT17
RSVD RSVD BR17
PROC_TRIGIN_R H23 RSVD
<22> PROC_TRIGIN_R
<22> PROC_TRIGOUT_R
1 2PROC_TRIGOUT J23 PROC_TRIGIN
PROC_TRIGOUT VSS
BK18 +1.0VALW TO +1.0VS_VCCSTG
RC44 F30 BJ34
RSVD RSVD_TP
30_0402_1% E30
RSVD RSVD_TP
BJ33 VCCSTG and VCCIO SLEW RATE <=65us
UNPOP
B30
RSVD Default use POWER side
C30
RSVD 1.0 Modify
G13
G3 RSVD AJ8
J3 RSVD RSVD BL31 +1.0VS_VCCIO
RSVD RSVD
B2 NCTF_0 +5VALW +1.0VALW
NCTF NCTF_1 @ T7 PAD
B38 @ T8 PAD
NCTF BP1 NCTF_2 RH169 1 @ 2 0_0805_5%
NCTF NCTF_3 @ T9 PAD
BR35 BR2 @ T10 PAD
BR31 RSVD NCTF C1 NCTF_4
RSVD NCTF @ T11 PAD 1 1
3 BH30 C38 NCTF_5 CC100 3
RSVD 11 OF 14 NCTF @ T12 PAD
CC99 1U_0402_6.3V6K
0.1U_0201_10V6K +1.0VS_VCCSTG
2 2
SKL-H_BGA1440 UC4
REV = 1 ?
@ 1 6 +1.0VS_VCCSTG_IO 1 @ 2
RC46 2 IN OUT RC45 0_0805_5%
IN 1
0_0402_5% 3 7 +1.0VALW
SUSP# 2 @ 1 4 VBIAS VCC_PAD 5 CC101
<39,43,46,48,50,51> SUSP# ON GND
0.1U_0201_10V6K
2
1 AOZ1334DI-01_DFN8-7_3X3
1.0 Modify
CC102
@ 1U_0402_6.3V6K
2
+1.0VS_VCCSTG: 60mA
R ON = 4.4mΩ
VDROP= 11mV
Delay time: 9.3us
4 4
2016/11/03
Compal Secret Data
2017/01/10 Title
SKL-H(9/9)RSVD
Custom

A B C D E
A B C D E
<7> DDR_A_DQS#[0..7] Layout Note:

Place near JDIMM1.164
Reverse Type-4H
+1.2V_VDDQ JDIMM1A
<7> DDR_A_D[0..63] DDR_A_CLK0 137 REVERSE 8 DDR_A_D0
DDR_A_CLK#0 139 CK0(T) DQ0 7 DDR_A_D1 2-3A to 1 DIMMs/channel
<7> DDR_A_DQS[0..7] CPU Side DDR_A_CLK1 138 CK0#(C) DQ1 20 DDR_A_D2
0.1U_0201_10V6K
+0.6V_VREFCA DDR_A_CLK#1 140 CK1(T) DQ2 21 DDR_A_D3
Dimm1 Side CK1#(C) DQ3
2
DDR_A_D4
1K_0402_1%
1 4
<7> DDR_A_MA[0..16] DDR_A_CKE0 109 DQ4 3 DDR_A_D5
CD1
DDR_A_BA0 RD1 DDR_A_CKE1 110 CKE0 DQ5 16 DDR_A_D6
<7> DDR_A_BA0 DDR_A_BA1 +0.6V_DDRA_VREFCA CKE1 DQ6 DDR_A_D7
17
<7> DDR_A_BA1 DDR_A_BG0 2 DDR_A_CS#0 DQ7 DDR_A_DQS0
RD2 149 13
<7> DDR_A_BG0
1
DDR_A_BG1 2_0402_1% DDR_A_CS#1 157 S0# DQS0(T) 11 DDR_A_DQS#0
1 <7> DDR_A_BG1 +0.6V_DDRA_VREFCA
#543016 PDG 1.0164 S1# DQS0#(C) 1
2 1 20mils wide & spacing 162
165 S2#/C0 28 DDR_A_D8
1 S3#/C1 DQ8 DDR_A_D9
29 JDIMM1B
0.1U_0201_10V6K
DDR_A_CLK0 CD2 DDR_A_ODT0 155 DQ9 41 DDR_A_D10 +1.2V_VDDQ REVERSE +1.2V_VDDQ
<7> DDR_A_CLK0 ODT0 DQ10
2
DDR_A_CLK#0 DDR_A_ODT1 DDR_A_D11
1K_0402_1%
0.022U_0402_16V7K 1 161 42 111 141
<7> DDR_A_CLK#0 DDR_A_CLK1 2 ODT1 DQ11 DDR_A_D12 VDD1 VDD11
24 112 142
RD3
CD3
<7> DDR_A_CLK1 DDR_A_CLK#1 DDR_A_BG0 115 DQ12 25 DDR_A_D13 117 VDD2 VDD12 147
<7> DDR_A_CLK#1 BG0 DQ13 VDD3 VDD13
1
DDR_A_BG1 113 38 DDR_A_D14 118 148
RD4 2 DDR_A_BA0 150 BG1 DQ14 37 DDR_A_D15 123 VDD4 VDD14 153
1
DDR_A_CKE0 DDR_A_BA1 145 BA0 DQ15 34 DDR_A_DQS1 124 VDD5 VDD15 154
<7> DDR_A_CKE0 24.9_0402_1% BA1 DQS1(T) VDD6 VDD16
DDR_A_CKE1 32 DDR_A_DQS#1 129 159
<7> DDR_A_CKE1 DDR_A_CS#0 DDR_A_MA0 144 DQS1#(C) 130 VDD7 VDD17 160
<7> DDR_A_CS#0
2
DDR_A_CS#1 DDR_A_MA1 133 A0 50 DDR_A_D16 135 VDD8 VDD18 163
<7> DDR_A_CS#1 DDR_A_MA2 A1 DQ16 DDR_A_D17 VDD9 VDD19 +0.6VS_VTT
132 49 136
DDR_A_MA3 131 A2 DQ17 62 DDR_A_D18 +0.6V_DDRA_VREFCA VDD10
D_CK_SDATA Place near to SO-DIMM DDR_A_MA4 128 A3 DQ18 63 DDR_A_D19 +3VS_DIMMA 255 258
<15,18,38> D_CK_SDATA D_CK_SCLK DDR_A_MA5 A4 DQ19 DDR_A_D20 VDDSPD VTT
<15,18,38> D_CK_SCLK connector. DDR_A_MA6
126
127 A5 DQ20
46
45 DDR_A_D21 164 257
+2.5V
DDR_A_MA7 122 A6 DQ21 58 DDR_A_D22 VREFCA VPP1 259

DDR_A_ODT0 DDR_A_MA8 125 A7 DQ22 59 DDR_A_D23 VPP2
<7> DDR_A_ODT0 DDR_A_ODT1 DDR_A_MA9 A8 DQ23 DDR_A_DQS2
121 55 1 99
<7> DDR_A_ODT1 DDR_A_MA10 146 A9 DQS2(T) 53 DDR_A_DQS#2 2 VSS VSS 102
DDR_A_MA11 120 A10_AP DQS2#(C) 5 VSS VSS 103
DDR_A_MA12 119 A11 70 DDR_A_D24 6 VSS VSS 106
DDR_A_MA13 158 A12 DQ24 71 DDR_A_D25 9 VSS VSS 107
DDR_A_MA14 151 A13 DQ25 83 DDR_A_D26 10 VSS VSS 167
DDR_A_MA15 156 A14_W E# DQ26 84 DDR_A_D27 14 VSS VSS 168
Layout Note: Note: DDR_A_MA16 A15_CAS# DQ27 DDR_A_D28 VSS VSS
152 66 15 171
Place near JDIMM1 place caps close to DIMM A16_RAS# DQ28 67 DDR_A_D29 18 VSS VSS 172
4 on each side of DIMM Layout Note: DDR_A_ACT# 114 DQ29 79 DDR_A_D30 19 VSS VSS 175
<7> DDR_A_ACT# ACT# DQ30 DDR_A_D31 VSS VSS
80 22 176
2
Place near JDIMM1.257/259 DDR_A_PARITY 143 DQ31 76 DDR_A_DQS3 23 VSS VSS 180 2
+1.2V_VDDQ <7> DDR_A_PARITY DDR_A_ALERT# 116 PARITY DQS3(T) 74 DDR_A_DQS#3 VSS VSS
26 181
<7> DDR_A_ALERT#
1 2 DDR_A_EVENT# 134 ALERT# DQS3#(C) 27 VSS VSS 184
+1.2V_VDDQ +1.2V_VDDQ RD5 240_0402_1% DDR_DRAMRST#_R 108 EVENT# 174 DDR_A_D32 30 VSS VSS 185
RESET# DQ32 173 DDR_A_D33 31 VSS VSS 188
DQ33 187 DDR_A_D34 35 VSS VSS 189
+2.5V D_CK_SDATA 254 DQ34 186 DDR_A_D35 36 VSS VSS 192
0.1U_0201_10V6K
0.1U_0201_10V6K
D_CK_SCLK SDA DQ35 DDR_A_D36 VSS VSS

1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
253 170 39 193

SCL DQ36 169 DDR_A_D37 40 VSS VSS 196
1 1 1 1 1 1 1 1 1 1 DDR_A_SA2 DQ37 DDR_A_D38 VSS VSS
166 183 43 197
CD12
CD13
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
DDR_A_SA1 SA2 DQ38 DDR_A_D39 VSS VSS
CD4
CD5
CD6
CD7
CD8
CD9
CD10
CD11
1 1 1 1 260 182 44 201

CD14 DDR_A_SA0 256 SA1 DQ39 179 DDR_A_DQS4 47 VSS VSS 202
CD15
CD16
CD17
2 2 2 2 2 2 2 2 2 2 SA0 DQS4(T) 177 DDR_A_DQS#4 48 VSS VSS 205
DQS4#(C) 51 VSS VSS 206
2 2 2 2 DDR_A_D40 VSS VSS
SPD Address for CHANNEL0 92
CB0_NC DQ40
195
DDR_A_D41
52
VSS VSS
209
91 194 56 210
Write Adress 0xA0 101 CB1_NC DQ41 207 DDR_A_D42 57 VSS VSS 213
Read Address 0xA1 105 CB2_NC DQ42 208 DDR_A_D43 60 VSS VSS 214
SA0=0;SA1=0;SA2=0 88 CB3_NC DQ43 191 DDR_A_D44 61 VSS VSS 217
87 CB4_NC DQ44 190 DDR_A_D45 64 VSS VSS 218
+1.2V_VDDQ 100 CB5_NC DQ45 203 DDR_A_D46 65 VSS VSS 222
104 CB6_NC DQ46 204 DDR_A_D47 68 VSS VSS 223
Follow 97 CB7_NC DQ47 200 DDR_A_DQS5 69 VSS VSS 226
DQS8(T) DQS5(T) DDR_A_DQS#5 VSS VSS
MA51
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
95 198 72 227
DQS8#(C) DQS5#(C) 73 VSS VSS 230
1 DDR_A_D48 VSS VSS
216 77 231
+ CD26 12 DQ48 215 DDR_A_D49 78 VSS VSS 234
1 1 1 1 1 1 1 1 DM0#/DBI0# DQ49 DDR_A_D50 VSS VSS
+1.2V_VDDQ
CD18
CD19
CD20
CD21
CD22
CD23
CD24
CD25
330U_D2_2V_Y 33 228 81 235

54 DM1#/DBI1# DQ50 229 DDR_A_D51 82 VSS VSS 238
2 75 DM2#/DBI2# DQ51 211 DDR_A_D52 85 VSS VSS 239
2 2 2 2 2 2 2 2 SGA00009S00 178 DM3#/DBI3# DQ52 212 DDR_A_D53 86 VSS VSS 243
330U 2V H1.9 199 DM4#/DBI4# DQ53 224 DDR_A_D54 89 VSS VSS 244
3
9mohm POLY 220 DM5#/DBI5# DQ54 225 DDR_A_D55 90 VSS VSS 247 3
241 DM6#/DBI6# DQ55 221 DDR_A_DQS6 93 VSS VSS 248
96 DM7#/DBI7# DQS6(T) 219 DDR_A_DQS#6 94 VSS VSS 251
DM8#/DBI8# DQS6#(C) 98 VSS VSS 252
VSS VSS
262 261
237 DDR_A_D56 GND GND
+1.2V_VDDQ DQ56 DDR_A_D57
Layout Note: DQ57
236
DDR_A_D58
249 LOTES_ADDR0206-P001A
Place near JDIMM1.258 DQ58 250 DDR_A_D59
DQ59 DDR_A_D60 CONN@
232
DQ60
2
233 DDR_A_D61
RD6 DQ61 245 DDR_A_D62
DQ62 246 DDR_A_D63
470_0402_5% DQ63 242 DDR_A_DQS7
+0.6VS_VTT @ RD7 DQS7(T) 240 DDR_A_DQS#7
1
2 1 DQS7#(C)
<18> DDR_DRAMRST# DDR_DRAMRST#_R <15>
1
1 0_0402_5% CD27
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
XEMC@ LOTES_ADDR0206-P001A
100P_0402_50V8J
CD34
1 1 1 1 1 1 @ 0.1U_0201_10V6K CONN@
2@
CD32
CD33
2
CD28
CD29
CD30
CD31
2 2 2 2 2 2
Layout NOTE
PLACE THE CAP within 200mil from Pin108
Place Holder
*2015MOW02, Can't install Cap on DRAMRST
4 +0.6V_DDRA_VREFCA 4
@
RD8
2 1 +3VS_DIMMA
+3VS
Interleaved Memory
0.1U_0201_10V6K
2.2U_0402_6.3V6M
0_0402_5%
0.1U_0201_10V6K
2.2U_0402_6.3V6M
1 1 1
CD36
CD37
CD38

CD35
Security Classification Compal Secret Data

2 2 2
Layout Note: 2 Issued Date 2016/11/03 Deciphered Date 2017/01/10 Title
Place near JDIMM1.255 Layout Note:
Place near JDIMM1.164 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR4_DIMMA
within 200mils DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom

A B C D E
A B C D E
<7> DDR_B_DQS#[0..7]
Reverse Type-8H
+1.2V_VDDQ
<7> DDR_B_D[0..63] 2-3A to 1 DIMMs/channel
0.1U_0201_10V6K
<7> DDR_B_DQS[0..7]
JDIMM2A
CPU Side 1 Dimm2 Side
2
DDR_B_CLK0 DDR_B_D0
1K_0402_1%
137 RESERVE 8
CD39
+0.6V_B_VREFDQ +0.6V_DDRB_VREFCA DDR_B_CLK#0 139 CK0(T) DQ0 7 DDR_B_D1
RD9
<7> DDR_B_MA[0..16] DDR_B_CLK1 138 CK0#(C) DQ1 20 DDR_B_D2
2 DDR_B_CLK#1 140 CK1(T) DQ2 21 DDR_B_D3
DDR_B_BA0
Layout Note: CK1#(C) DQ3 DDR_B_D4
RD10 4
<7> DDR_B_BA0 Place near JDIMM2.164
1
DDR_B_BA1 2_0402_1% DDR_B_CKE0 109 DQ4 3 DDR_B_D5
<7> DDR_B_BA1 DDR_B_BG0 2 1 DDR_B_CKE1 110 CKE0 DQ5 16 DDR_B_D6
1 <7> DDR_B_BG0 DDR_B_BG1 CKE1 DQ6 DDR_B_D7 1
1 17
<7> DDR_B_BG1 DDR_B_CS#0 149 DQ7 13 DDR_B_DQS0
20mils wide & spacing DDR_B_CS#1 S0# DQS0(T) DDR_B_DQS#0
CD40 157 11 JDIMM2B
S1# DQS0#(C)
2
+1.2V_VDDQ +1.2V_VDDQ
1K_0402_1%
0.022U_0402_16V7K 1 162 RESERVE
DDR_B_CLK0 2 165 S2#/C0 28 DDR_B_D8 111 141
RD11
<7> DDR_B_CLK0 S3#/C1 DQ8 VDD1 VDD11
1
DDR_B_CLK#0 CD41 29 DDR_B_D9 112 142
<7> DDR_B_CLK#0 DDR_B_CLK1 DDR_B_ODT0 155 DQ9 41 DDR_B_D11 117 VDD2 VDD12 147
RD12 0.1U_0201_10V6K
<7> DDR_B_CLK1 DDR_B_CLK#1 2 DDR_B_ODT1 ODT0 DQ10 DDR_B_D15 VDD3 VDD13
24.9_0402_1% 161 42 118 148
1
<7> DDR_B_CLK#1 ODT1 DQ11 24 DDR_B_D14 123 VDD4 VDD14 153
DDR_B_BG0 115 DQ12 25 DDR_B_D10 124 VDD5 VDD15 154
2
DDR_B_CKE0 DDR_B_BG1 113 BG0 DQ13 38 DDR_B_D12 129 VDD6 VDD16 159
<7> DDR_B_CKE0 DDR_B_CKE1 DDR_B_BA0 150 BG1 DQ14 37 DDR_B_D13 130 VDD7 VDD17 160
<7> DDR_B_CKE1 DDR_B_CS#0 DDR_B_BA1 145 BA0 DQ15 34 DDR_B_DQS1 135 VDD8 VDD18 163
<7> DDR_B_CS#0 DDR_B_CS#1 BA1 DQS1(T) DDR_B_DQS#1 VDD9 VDD19 +0.6VS_VTT
32 136
<7> DDR_B_CS#1 DDR_B_MA0 144 DQS1#(C) +0.6V_DDRB_VREFCA VDD10
Place near to SO-DIMM connector. DDR_B_MA1 133 A0 50 DDR_B_D16 +3VS_DIMMB 255 258
D_CK_SDATA DDR_B_MA2 132 A1 DQ16 49 DDR_B_D17 VDDSPD VTT +2.5V
<14,18,38> D_CK_SDATA D_CK_SCLK DDR_B_MA3 131 A2 DQ17 62 DDR_B_D19 164 257
<14,18,38> D_CK_SCLK DDR_B_MA4 A3 DQ18 DDR_B_D20 VREFCA VPP1
128 63 259
DDR_B_MA5 126 A4 DQ19 46 DDR_B_D22 VPP2
DDR_B_ODT0 DDR_B_MA6 127 A5 DQ20 45 DDR_B_D18 1 99
<7> DDR_B_ODT0 DDR_B_ODT1 DDR_B_MA7 122 A6 DQ21 58 DDR_B_D23 2 VSS VSS 102
<7> DDR_B_ODT1 DDR_B_MA8 A7 DQ22 DDR_B_D21 VSS VSS
125 59 5 103
DDR_B_MA9 121 A8 DQ23 55 DDR_B_DQS2 6 VSS VSS 106
DDR_B_MA10 146 A9 DQS2(T) 53 DDR_B_DQS#2 9 VSS VSS 107
DDR_B_MA11 120 A10_AP DQS2#(C) 10 VSS VSS 167
DDR_B_MA12 119 A11 70 DDR_B_D30 14 VSS VSS 168
DDR_B_MA13 A12 DQ24 DDR_B_D25 VSS VSS
Layout Note: Note: DDR_B_MA14
158
A13 DQ25
71
DDR_B_D26
15
VSS VSS
171
151 83 18 172
Place near JDIMM2 place caps close to DIMM DDR_B_MA15 156 A14_W E# DQ26 84 DDR_B_D24 19 VSS VSS 175
4 on each side of DIMM Layout Note: DDR_B_MA16 152 A15_CAS# DQ27 66 DDR_B_D28 22 VSS VSS 176
2
A16_RAS# DQ28 67 DDR_B_D27 23 VSS VSS 180 2
Place near JDIMM2.257/259 DDR_B_ACT# 114 DQ29 79 DDR_B_D29 26 VSS VSS 181
<7> DDR_B_ACT# ACT# DQ30 80 DDR_B_D31 27 VSS VSS 184
DDR_B_PARITY 143 DQ31 76 DDR_B_DQS3 30 VSS VSS 185
+1.2V_VDDQ +1.2V_VDDQ<7> DDR_B_PARITY DDR_B_ALERT# 116 PARITY DQS3(T) 74 DDR_B_DQS#3 31 VSS VSS 188
<7> DDR_B_ALERT#
1 2 DDR_B_EVENT# 134 ALERT# DQS3#(C) 35 VSS VSS 189
+1.2V_VDDQ RD13 240_0402_1% DDR_DRAMRST#_R 108 EVENT# 174 DDR_B_D34 36 VSS VSS 192
+2.5V RESET# DQ32 173 DDR_B_D35 39 VSS VSS 193
DQ33 DDR_B_D36 VSS VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
187 40 196
0.1U_0201_10V6K
0.1U_0201_10V6K
D_CK_SDATA 254 DQ34 186 DDR_B_D32 43 VSS VSS 197

1 1 1 1 1 1 1 1 1 1 D_CK_SCLK SDA DQ35 DDR_B_D39 VSS VSS
253 170 44 201
CD50
CD51
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
+3VS SCL DQ36 DDR_B_D38 VSS VSS
CD42
CD43
CD44
CD45
CD46
CD47
CD48
CD49
1 1 1 1 169 47 202
DDR_B_SA2 166 DQ37 183 DDR_B_D37 48 VSS VSS 205
CD52
CD53
CD54
CD55
RD14
2 2 2 2 2 2 2 2 2 2 1 @ 2 DDR_B_SA1 260 SA2 DQ38 182 DDR_B_D33 51 VSS VSS 206
DDR_B_SA0 256 SA1 DQ39 179 DDR_B_DQS4 52 VSS VSS 209
2 2 2 2 0_0402_5% SA0 DQS4(T) 177 DDR_B_DQS#4 56 VSS VSS 210
DQS4#(C) 57 VSS VSS 213
92 195 DDR_B_D40 60 VSS VSS 214
91 CB0_NC DQ40 194 DDR_B_D41 61 VSS VSS 217
SPD Address for CHANNELB CB1_NC DQ41 DDR_B_D42 VSS VSS
101 207 64 218
Write Adress 0xA4 105 CB2_NC DQ42 208 DDR_B_D43 65 VSS VSS 222
+1.2V_VDDQ Read Address 0xA3 88 CB3_NC DQ43 191 DDR_B_D44 68 VSS VSS 223
SA0=0;SA1=1;SA2=0 87 CB4_NC DQ44 190 DDR_B_D45 69 VSS VSS 226
Follow 100 CB5_NC DQ45 203 DDR_B_D46 72 VSS VSS 227
CB6_NC DQ46 DDR_B_D47 VSS VSS
MA51
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
104 204 73 230

97 CB7_NC DQ47 200 DDR_B_DQS5 77 VSS VSS 231
1 DQS8(T) DQS5(T) DDR_B_DQS#5 VSS VSS
95 198 78 234
+ CD64 DQS8#(C) DQS5#(C) 81 VSS VSS 235
1 1 1 1 1 1 1 1 DDR_B_D48 VSS VSS
+1.2V_VDDQ
CD56
CD57
CD58
CD59
CD60
CD61
CD62
CD63
330U_D2_2V_Y 216 82 238

@ 12 DQ48 215 DDR_B_D52 85 VSS VSS 239
2 33 DM0#/DBI0# DQ49 228 DDR_B_D50 86 VSS VSS 243
2 2 2 2 2 2 2 2 SGA00009S00 54 DM1#/DBI1# DQ50 229 DDR_B_D55 89 VSS VSS 244
3 330U 2V H1.9 75 DM2#/DBI2# DQ51 211 DDR_B_D51 90 VSS VSS 247 3
9mohm POLY 178 DM3#/DBI3# DQ52 212 DDR_B_D54 93 VSS VSS 248
199 DM4#/DBI4# DQ53 224 DDR_B_D49 94 VSS VSS 251
220 DM5#/DBI5# DQ54 225 DDR_B_D53 98 VSS VSS 252
241 DM6#/DBI6# DQ55 221 DDR_B_DQS6 VSS VSS
96 DM7#/DBI7# DQS6(T) 219 DDR_B_DQS#6 262 261
DM8#/DBI8# DQS6#(C) GND GND
Layout Note: DDR_B_D61

LOTES_ADDR0070-P009A
237
Place near JDIMM2.258 DQ56 236 DDR_B_D57 CONN@
DQ57 249 DDR_B_D60
DQ58 250 DDR_B_D56
From CPU to CHB DQ59 232 DDR_B_D62
DQ60 233 DDR_B_D59
DQ61 245 DDR_B_D63
DDR_DRAMRST#_R <14> DQ62 246 DDR_B_D58
+0.6VS_VTT
DQ63 242 DDR_B_DQS7
1 DQS7(T) DDR_B_DQS#7
240
CD65 DQS7#(C)
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0201_10V6K
@ 2 @
1 1 1 1 1 1
CD70
CD71
LOTES_ADDR0070-P009A
CD66
CD67
CD68
CD69
CONN@
2 2 2 2 2 2
Layout NOTE
Place Holder PLACE THE CAP within 200mil from Pin108
4 *2015MOW02, Can't install Cap on DRAMRST 4
+0.6V_DDRB_VREFCA
@
RD15
Interleaved Memory
2 1 +3VS_DIMMB
+3VS
0.1U_0201_10V6K
2.2U_0402_6.3V6M
0_0402_5%
0.1U_0201_10V6K
2.2U_0402_6.3V6M
1 1 1

CD72
CD73
CD74
CD75
1 Security Classification Compal Secret Data

Issued Date 2016/11/03 Deciphered Date 2017/01/10 Title
2 2 2
Layout Note:
Place near JDIMM1.255
2
Layout Note: THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR4_DIMMB
Size Document Number Rev
Place near JDIMM1.164 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
within 200mils
Custom

A B C D E
A B C D E
SPT-H_PCH
UH1F
C11 AT22 LPC_AD0 +3VS
LPC/eSPI
B11 USB3_1_TXN GPP_A1/LAD0/ESPI_IO0 AV22 LPC_AD1 LPC_AD0 <39,41>
B7 USB3_1_TXP GPP_A2/LAD1/ESPI_IO1 AT19 LPC_AD2 LPC_AD1 <39,41> LPC Bus
A7 USB3_1_RXN GPP_A3/LAD2/ESPI_IO2 BD16 LPC_AD3 LPC_AD2 <39,41> TPM_SERIRQ 1 2
USB3_1_RXP GPP_A4/LAD3/ESPI_IO3 LPC_AD3 <39,41> LPC : +3.3V
B12 RH1 10K_0402_5%
<35> USB3_PTX_DRX_N2 A12 USB3_2_TXN/SSIC_1_TXN BE16 LPC_FRAME#
<35> USB3_PTX_DRX_P2 USB3_2_TXP/SSIC_1_TXP GPP_A5/LFRAME#/ESPI_CS0# LPC_FRAME# <39,41> DG requierment 8.2k PH +3VS
C8 BA17 TPM_SERIRQ
<35> USB3_PRX_DTX_N2 USB3_2_RXN/SSIC_1_RXN GPP_A6/SERIRQ/ESPI_CS1# LPC_PIRQA# TPM_SERIRQ <39,41> To TPM CRB 10K PH +3vs
1 B8 AW17 1
USB3 MB <35> USB3_PRX_DTX_P2 USB3_2_RXP/SSIC_1_RXP GPP_A7/PIRQA#/ESPI_ALERT0# AT17
B15 GPP_A0/RCIN#/ESPI_ALERT1# BC18 ESPI_RST#
C15 USB3_6_TXN GPP_A14/SUS_STAT#/ESPI_RESET# ESPI_RST# <39>
K15 USB3_6_TXP
USB3_6_RXN CLK_LPC
USB
K13 BC17 RH3 2 1 22_0402_5%
B14 USB3_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK AV19 CLK_LPC_TPM 2 TPM@ 1 22_0402_5% CLK_LPC_R <39>
<33> USB3_PTX_DRX_N5 USB3_5_TXN GPP_A10/CLKOUT_LPC1
RH4
CLK_LPC_TPM_R <41> To EC
C14
<33> USB3_PTX_DRX_P5 G13 USB3_5_TXP M45
USB3 SUB <33> USB3_PRX_DTX_N5
H13 USB3_5_RXN GPP_G19/SMI# N43
<33> USB3_PRX_DTX_P5 USB3_5_RXP GPP_G18/NMI# +3VALW_PCH_PRIM
D13
<36> USB3_PTX_DRX_P3 C13 USB3_3_TXP/SSIC_2_TXP AE45
<36> USB3_PTX_DRX_N3 A9 USB3_3_TXN/SSIC_2_TXN GPP_E6/DEVSLP2 AG43 LPC_PIRQA# 2 1
<36> USB3_PRX_DTX_P3 USB3_3_RXP/SSIC_2_RXP GPP_E5/DEVSLP1 SSD_DEVSLP0
B10 AG42 RH5 10K_0402_5%
<36> USB3_PRX_DTX_N3 USB3_3_RXN/SSIC_2_RXN GPP_E4/DEVSLP0 SSD_DEVSLP0 <34>
USB3 Type C AB39
B13 GPP_F9/DEVSLP7 AB36
SATA
<36> USB3_PTX_DRX_P4 A14 USB3_4_TXP GPP_F8/DEVSLP6 AB43
<36> USB3_PTX_DRX_N4 G11 USB3_4_TXN GPP_F7/DEVSLP5 AB42
<36> USB3_PRX_DTX_P4 USB3_4_RXP GPP_F6/DEVSLP4
E11 6 OF 12 AB41
<36> USB3_PRX_DTX_N4 USB3_4_RXN GPP_F5/DEVSLP3
1.0 Modify
EMC@
SKL-H-PCH_BGA837 USB_OC0#
? CH68 1 2 1000P_0402_50V7K
@ REV = 1.3
2 SPT-H_PCH 2
UH1B
DMI_CTX_PRX_N0 L27 AF5
<8> DMI_CTX_PRX_N0 DMI_CTX_PRX_P0 DMI_RXN0 USB2N_1 reference PDG1.0 50-30 +3VALW_PCH_PRIM
N27 AG7
<8> DMI_CTX_PRX_P0 DMI_CRX_PTX_N0 DMI_RXP0 USB2P_1 USB20_N2
C27 AD5
<8> DMI_CRX_PTX_N0 DMI_CRX_PTX_P0 DMI_TXN0 USB2N_2 USB20_P2 USB20_N2 <35> RPH1
B27 AD7 USB3 MB
<8> DMI_CRX_PTX_P0 DMI_CTX_PRX_N1 DMI_TXP0 USB2P_2 USB20_N3 USB20_P2 <35> USB_OC0#
E24 AG8 8 1
<8> DMI_CTX_PRX_N1 DMI_CTX_PRX_P1 DMI_RXN1 USB2N_3 USB20_P3 USB20_N3 <36> USB_OC1#
G24 AG10 TYPE C 7 2
<8> DMI_CTX_PRX_P1 DMI_CRX_PTX_N1 DMI_RXP1 USB2P_3 USB20_P3 <36> USB_OC3#
B28 AE1 6 3
<8> DMI_CRX_PTX_N1 DMI_CRX_PTX_P1 DMI_TXN1 USB2N_4 USB_OC2#
A28 DMI AE2 5 4
<8> DMI_CRX_PTX_P1 DMI_CTX_PRX_N2 DMI_TXP1 USB2P_4 USB20_N5
G27 AC2
<8> DMI_CTX_PRX_N2 DMI_CTX_PRX_P2 DMI_RXN2 USB2N_5 USB20_P5 USB20_N5 <33>
E26 AC3 10K_0804_8P4R_5%
<8> DMI_CTX_PRX_P2 DMI_CRX_PTX_N2 DMI_RXP2 USB2P_5 USB20_N6 USB20_P5 <33>
B29 AF2 USB2 (SUB/B)
<8> DMI_CRX_PTX_N2 DMI_CRX_PTX_P2 DMI_TXN2 USB2N_6 USB20_P6 USB20_N6 <33>
C29 AF3
<8> DMI_CRX_PTX_P2 DMI_CTX_PRX_N3 DMI_TXP2 USB2P_6 USB20_N7 USB20_P6 <33> RPH2
L29 AB3
<8> DMI_CTX_PRX_N3 DMI_CTX_PRX_P3 DMI_RXN3 USB2N_7 USB20_P7 USB20_N7 <37> USB_OC5
K29 USB 2.0 AB2 BT 8 1
<8> DMI_CTX_PRX_P3 DMI_CRX_PTX_N3 DMI_RXP3 USB2P_7 USB20_N8 USB20_P7 <37> USB_OC4
B30 AL8 7 2
<8> DMI_CRX_PTX_N3 DMI_CRX_PTX_P3 DMI_TXN3 USB2N_8 USB20_P8 USB20_N8 <30> USB_OC6
A30 AL7 TS 6 3
<8> DMI_CRX_PTX_P3 DMI_TXP3 USB2P_8 USB20_N9 USB20_P8 <30> USB_OC7
AA1 5 4
1 2 100_0402_1% PCIE_RCOMPN B18 USB2N_9 AA2 USB20_P9 USB20_N9 <30>
RH6 Camera
PCIE_RCOMPP C17 PCIE_RCOMPN USB2P_9 AJ8 USB20_N10 USB20_P9 <30>
10K_0804_8P4R_5%
PCIE_RCOMPP USB2N_10 AJ7 USB20_P10 USB20_N10 <42>
FingerPrint @
USB2P_10 W2 USB20_P10 <42>
#546884 P.231 PCIE_RCOMPN/PCIE_RCOMPP USB2N_11
H15 W3
BO=4 W=12~15 S=12 R=100ohm G15 PCIE1_RXN/USB3_7_RXN USB2P_11 AD3
A16 PCIE1_RXP/USB3_7_RXP USB2N_12 AD2
PCIe/USB 3
B16 PCIE1_TXN/USB3_7_TXN USB2P_12 V2

B19 PCIE1_TXP/USB3_7_TXP USB2N_13 V1
C19 PCIE2_TXN/USB3_8_TXN USB2P_13 AJ11
PCIE2_TXP/USB3_8_TXP USB2N_14 CHECK ACER DVR for port use
E17 AJ13
G17 PCIE2_RXN/USB3_8_RXN USB2P_14 12/08 Change Port, follow DVR1044_R1.03
3 PCIE_PRX_DTX_N3 L17 PCIE2_RXP/USB3_8_RXP 3
<37> PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3 K17 PCIE3_RXN/USB3_9_RXN
NGFF <37> PCIE_PRX_DTX_P3 PCIE_PTX_DRX_N3 PCIE3_RXP/USB3_9_RXP USB_OC0#
CH5 2 1 .1U_0402_16V7K B20 AD43
WL+BT(KEY E) <37> PCIE_PTX_C_DRX_N3
CH6 2 1 .1U_0402_16V7K PCIE_PTX_DRX_P3 C20 PCIE3_TXN/USB3_9_TXN GPP_E9/USB2_OC0# AD42 USB_OC1#
<37> PCIE_PTX_C_DRX_P3 PCIE_PRX_DTX_N4 PCIE3_TXP/USB3_9_TXP GPP_E10/USB2_OC1# USB_OC2# USB_OC1# <35>
E20 AD39
<32> PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4 G19 PCIE4_RXN/USB3_10_RXN GPP_E11/USB2_OC2# AC44 USB_OC3#
<32> PCIE_PRX_DTX_P4 2 1 .1U_0402_16V7K PCIE_PTX_DRX_N4 B21 PCIE4_RXP/USB3_10_RXP GPP_E12/USB2_OC3# Y43 USB_OC4
GLAN <32> PCIE_PTX_C_DRX_N4
CH7
PCIE_PTX_DRX_P4 PCIE4_TXN/USB3_10_TXN GPP_F15/USB2_OCB_4 USB_OC5
CH8 2 1 .1U_0402_16V7K A21 Y41
<32> PCIE_PTX_C_DRX_P4 K19 PCIE4_TXP/USB3_10_TXP GPP_F16/USB2_OCB_5 W44 USB_OC6
L19 PCIE5_RXN GPP_F17/USB2_OCB_6 W43 USB_OC7
D22 PCIE5_RXP GPP_F18/USB2_OCB_7
C22 PCIE5_TXN
G22 PCIE5_TXP AG3 USB2_COMP RH7 1 2 113_0402_1%
E22 PCIE6_RXN USB2_COMP AD10 USB2_VBUSSENSE RH8 1 @ 2 0_0402_5%
B22 PCIE6_RXP USB2_VBUSSENSE AB13
A23 PCIE6_TXN RSVD_AB13 AG2 USB2_ID RH9 1 @ 2 0_0402_5%
L22 PCIE6_TXP USB2_ID
K22 PCIE7_RXN
C23 PCIE7_RXP
B23 PCIE7_TXN BD14
K24 PCIE7_TXP GPD7/RSVD
L24 PCIE8_RXN
PCIE8_RXP 546765_2015WW10_Skylake_MOW_Rev_1_0
C24
B24 PCIE8_TXN 2 OF 12
05/19 RH150
PCIE8_TXP
SKL-H-PCH_BGA837
?
@ REV = 1.3
4 4
2016/11/03
Compal Secret Data
2017/01/10 Title
PCH(1/7)DMI,PCIE,USB
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom

A B C D E
A B C D E
SPT-H_PCH
UH1A
1 @ 2 EC_PME#_R BD17 BB27 PLT_RST#

<32,39> EC_PME# GPP_A11/PME# GPP_B13/PLTRST# PLT_RST# <23,39,41>
RH10 0_0402_5%
AG15 P43
AG14 RSVD GPP_G16/GSXCLK R39
AF17 RSVD GPP_G12/GSXDOUT R36
AE17 RSVD GPP_G13/GSXSLOAD R42 +3VS
RSVD GPP_G14/GSXDIN R41
AR19 GPP_G15/GSXSRESET#
AN17 TP2 TP_INT# RH13 1 2 100K_0402_5%
TP1 AF41
PCH_SPI_SI BB29 GPP_E3/CPU_GP0 AE44
PCH_SPI_SO BE30 SPI0_MOSI GPP_E7/CPU_GP1 BC23 TP_INT#2 1
1 PCH_SPI_CS#0 BD31 SPI0_MISO GPP_B3/CPU_GP2 BD24 EC_TP_INT# <39,41> 1
DH1
PCH_SPI_CLK BC31 SPI0_CS0# GPP_B4/CPU_GP3 RB751V-40_SOD323-2
AW31 SPI0_CLK BC36
SPI ROM PCH_SPI_IO2 BC29 SPI0_CS1# GPP_H18/SML4ALERT# BE34
PCH_SPI_IO3 BD30 SPI0_IO2 GPP_H17/SML4DATA BD39
+3VALW_PCH_PRIM AT31 SPI0_IO3 GPP_H16/SML4CLK BB36
SPI0_CS2# GPP_H15/SML3ALERT# BA35
AN36 GPP_H14/SML3DATA BC35 for server and WS use
GPP_D1/SPI1_CLK GPP_H13/SML3CLK
1
AL39 BD35
AN41 GPP_D0/SPI1_CS# GPP_H12/SML2ALERT# AW35 PAD @ T14
RH42
UMA@ AN38 GPP_D3/SPI1_MOSI GPP_H11/SML2DATA BD34 RH12
10K_0402_5% GPP_D2/SPI1_MISO GPP_H10/SML2CLK
AH43 1M_0402_5%
AG44 GPP_D22/SPI1_IO3 BE11 SM_INTRUDER# 1 2
+RTCVCC
2
GPP_D21/SPI1_IO2 1 OF 12 INTRUDER#
DGPU_PRSNT#
SPI0_MOSI
SKL-H-PCH_BGA837
int. PH
This strap should sample HIGH. There should NOT be any
1
@ SPT-H_PCH on-board device driving it to opposite direction during

RH43 UH1C M.2 SSD PCIE L0 strap sampling.
10K_0402_5% VGA@
G31 PCIE_PRX_DTX_N9
AV2 PCIE9_RXN/SATA0A_RXN H31 PCIE_PRX_DTX_P9 PCIE_PRX_DTX_N9 <34>
SPI0_MISO
2
AV3 CL_CLK CLINK PCIE9_RXP/SATA0A_RXP C31 PCIE_PTX_DRX_N9 PCIE_PRX_DTX_P9 <34>

AW2 CL_DATA PCIE9_TXN/SATA0A_TXN B31 PCIE_PTX_DRX_P9 PCIE_PTX_DRX_N9 <34> int. PH
CL_RST# PCIE9_TXP/SATA0A_TXP PCIE_PTX_DRX_P9 <34> This strap should sample HIGH. There should NOT be any
R44
GPP_F13 R43 GPP_G8/FAN_PWM_0 G29 PCIE_PRX_DTX_N10M.2 SSD PCIE L1 on-board device driving it to opposite direction during
DGPU_PRSNT# U39 GPP_G9/FAN_PWM_1 PCIE10_RXN/SATA1A_RXN E29 PCIE_PRX_DTX_P10 PCIE_PRX_DTX_N10 <34> strap sampling.
N42 GPP_G10/FAN_PWM_2 PCIE10_RXP/SATA1A_RXP C32 PCIE_PTX_DRX_N10 PCIE_PRX_DTX_P10 <34>
GPP_G11/FAN_PWM_3 FAN PCIE10_TXN/SATA1A_TXN B32 PCIE_PTX_DRX_P10 PCIE_PTX_DRX_N10 <34>
DIS,Optimus 0 U43 PCIE10_TXP/SATA1A_TXP PCIE_PTX_DRX_P10 <34>
2 U42 GPP_G0/FAN_TACH_0 F41 SATA_PRX_DTX_N2 SPI0_IO2 2
UMA 1 U41 GPP_G1/FAN_TACH_1 PCIE15_RXN/SATA2_RXN E41 SATA_PRX_DTX_P2 SATA_PRX_DTX_N2 <38> int. PH
GPP_G2/FAN_TACH_2 PCIE15_RXP/SATA2_RXP SATA_PTX_DRX_N2 SATA_PRX_DTX_P2 <38>
M44
GPP_G3/FAN_TACH_3 PCIE15_TXN/SATA2_TXN
B39
SATA_PTX_DRX_P2 SATA_PTX_DRX_N2 <38>
HDD This strap should sample HIGH. There should NOT be any
U36 A39
P44 GPP_G4/FAN_TACH_4 PCIE15_TXP/SATA2_TXP SATA_PTX_DRX_P2 <38> on-board device driving it to opposite direction during
T45 GPP_G5/FAN_TACH_5 D43 strap sampling.
PCIe/SATA
T44 GPP_G6/FAN_TACH_6 PCIE16_RXN/SATA3_RXN E42
GPP_G7/FAN_TACH_7 PCIE16_RXP/SATA3_RXP A41
PCIE_PTX_DRX_P11 B33 PCIE16_TXN/SATA3_TXN A40
<34> PCIE_PTX_DRX_P11 PCIE_PTX_DRX_N11 C33 PCIE11_TXP PCIE16_TXP/SATA3_TXP SPI0_IO3
M.2 SSD PCIE L2 <34> PCIE_PTX_DRX_N11 PCIE_PRX_DTX_P11 K31 PCIE11_TXN H42 int. PH
<34> PCIE_PRX_DTX_P11 PCIE_PRX_DTX_N11 PCIE11_RXP PCIE17_RXN/SATA4_RXN
<34> PCIE_PRX_DTX_N11
L31
PCIE11_RXN PCIE17_RXP/SATA4_RXP
H40 This strap should sample HIGH. There should NOT be any
E45
AB33 PCIE17_TXN/SATA4_TXN F45 +3VS on-board device driving it to opposite direction during
AB35 GPP_F10/SCLOCK PCIE17_TXP/SATA4_TXP strap sampling.
DGPU_PRSNT# AA44 GPP_F11/SLOAD K37
GPP_F13/SDATAOUT0 PCIE18_RXN/SATA5_RXN
2
AA45 G37
GPP_F12/SDATAOUT1 PCIE18_RXP/SATA5_RXP G45 RH16
B38 PCIE18_TXN/SATA5_TXN G44
GPP_H12
10K_0402_5%
C38 PCIE14_TXN/SATA1B_TXN PCIE18_TXP/SATA5_TXP int. PD
D39 PCIE14_TXP/SATA1B_TXP AD44 M.2 SSD PCIE/SATA select pin This strap should sample LOW.
1
E37 PCIE14_RXN/SATA1B_RXN GPP_E8/SATALED# AG36 SATA_GP0
PCIE14_RXP/SATA1B_RXP GPP_E0/SATAXPCIE0/SATAGP0 AG35 1 @ 2 SATA_GP0 <34>
C36 GPP_E1/SATAXPCIE1/SATAGP1 AG39 RH19 1 @ 2 10K_0402_5%
B36 PCIE13_TXN/SATA0B_TXN GPP_E2/SATAXPCIE2/SATAGP2 AD35 RH20 1 PBA@2 10K_0402_5%
G35 PCIE13_TXP/SATA0B_TXP GPP_F0/SATAXPCIE3/SATAGP3 AD31 RH21 1 @ 2 1K_0402_1%
E35 PCIE13_RXN/SATA0B_RXN GPP_F1/SATAXPCIE4/SATAGP4 AD38 RH22 1 @ 2 10K_0402_5%
PCIE13_RXP/SATA0B_RXP GPP_F2/SATAXPCIE5/SATAGP5 AC43 RH24 10K_0402_5%
PCIE_PTX_DRX_P12 A35 GPP_F3/SATAXPCIE6/SATAGP6 AB44 FOR SERVER & WS ONLY PCH_BKL_PWM RH31 1 2 100K_0402_5%
<34> PCIE_PTX_DRX_P12 PCIE_PTX_DRX_N12 B35 PCIE12_TXP GPP_F4/SATAXPCIE7/SATAGP7 ENBKL RH32 1 2 100K_0402_5%
<34> PCIE_PTX_DRX_N12 PCIE_PRX_DTX_P12 H33 PCIE12_TXN W36 PCH_BKL_PWM PCH_PECI 1 2 10K_0402_5%
M.2 SSD PCIE L3 <34> PCIE_PRX_DTX_P12 PCIE_PRX_DTX_N12 PCIE12_RXP GPP_F21/EDP_BKLTCTL PCH_BKL_PWM <30>
RH33 @
G33 W35 ENBKL
3 <34> PCIE_PRX_DTX_N12 J45 PCIE12_RXN GPP_F20/EDP_BKLTEN W42 PCH_ENVDD ENBKL <39> 1 2 3
@ +1.0VALW_PRIM
K44 PCIE20_TXP/SATA7_TXP GPP_F19/EDP_VDDEN PCH_ENVDD <30>
RH34 10K_0402_5%
N38 PCIE20_TXN/SATA7_TXN AJ3 PCH_THERMTRIP# RH25 1 2 620_0402_5%
HOST THERMTRIP# <9>
N39 PCIE20_RXP/SATA7_RXP THERMTRIP# AL3 PCH_PECI RH26 1 @ 2 12.1_0402_1%
H44 PCIE20_RXN/SATA7_RXN PECI AJ4 H_PM_SYNC_R H_PECI <9,39>
RH27 2 1 30_0402_1%
H43 PCIE19_TXP/SATA6_TXP PM_SYNC AK2 PLTRST_CPU# H_PM_SYNC <9>
L39 PCIE19_TXN/SATA6_TXN PLTRST_PROC# AH2 PLTRST_CPU# <9>
L37 PCIE19_RXP/SATA6_RXP PM_DOWN PM_DOWN_R <9>
3 OF 12
PCIE19_RXN/SATA6_RXN
?
SKL-H-PCH_BGA837
@ REV = 1.3
1.A Modify +3VALW_SPI

PCH
SPI ROM ( 8MByte )
CH17 0.1U_0201_10V6K
+3VALW_SPI PLTRST
UH3 1 2 PCH_SPI_CS#0 1 @ 2 Follow MOW 2015WW09 Buf f er +3VS
PCH_SPI_CS#0 1 8 RH35 4.7K_0402_5% +3VALW_SPI CH16 0.1U_0201_10V6K
PCH_SPI_SO_0_R 2 /CS VCC 7 PCH_SPI_IO3_0_R DVT modify 1 2
PCH_SPI_IO2_0_R 3 DO(IO1) /HOLD(IO3) 6 PCH_SPI_CLK_0_R
/WP(IO2) CLK
5
4 5 PCH_SPI_SI_0_R RPH3 and close UH6 PCH_SPI_IO2 RH36 1 @ 2 1K_0402_1% UH2
GND DI(IO0) Single SPI ROM_CS0# PLT_RST# 1
P
W25Q64FVSSIQ_SO8 IN1 4 PLT_RST_BUF#
2 O PLT_RST_BUF# <32,34,37>
SA000039A40 IN2
1
RPH3
@ @ PCH_SPI_SI_0_R 1 8 PCH_SPI_SI PCH_SPI_IO3 RH40 1 @ 2 1K_0402_1% MC74VHC1G08DFT2G_SC70-5 RH28
3
PCH_SPI_CLK_0_R 1 2 1 2 PCH_SPI_SO_0_R 2 7 PCH_SPI_SO
100K_0402_5%
PCH_SPI_IO3_0_R 3 6 PCH_SPI_IO3
To SPI ROM PCH_SPI_CLK_0_R 4 5 PCH_SPI_CLK Follow MOW WW36
RH44 CH19
pull down with pre-ES1/ES1 samples
2
0_0402_5% 68P_0402_50V8J
4 15_0804_8P4R_5% 4
PCH_SPI_IO2_0_R 1 2 PCH_SPI_IO2
RH38 15_0402_5%
2016/11/03
Compal Secret Data
2017/01/10 Title
PCH(2/7)SPI,SATA,XDP
Custom

A B C D E
A B C D E
UH1E
HDA for AUDIO SPT-H_PCH
1 @ 2 BB3
<39> ME_EN GPP_I7/DDPC_CTRLCLK
RH47 0_0402_5% AW4 BD6
HDMI_HPD_PCH AY2 GPP_I0/DDPB_HPD0 GPP_I8/DDPC_CTRLDATA BA5
<23,31> HDMI_HPD_PCH GPP_I1/DDPC_HPD1 GPP_I5/DDPB_CTRLCLK
RPH6 AV4 BC4
1 8 HDA_SDOUT EC_SCI#_I3 BA4 GPP_I2/DDPD_HPD2 GPP_I6/DDPB_CTRLDATA BE5
<40> HDA_SDOUT_R HDA_RST# T15 GPP_I3/DDPE_HPD3 GPP_I9/DDPD_CTRLCLK
2 7 @ PAD BE6
<40> HDA_RST_AUDIO# HDA_SYNC GPP_I10/DDPD_CTRLDATA
3 6
<40> HDA_SYNC_R HDA_BIT_CLK
4 5 Y44
<40> HDA_BIT_CLK_R GPP_F14 H_SKTOCC# <9>
V44
33_0804_8P4R_5% PCH_EDP_HPD BD7 GPP_F23 W39
HDA_SDIN0 <30> PCH_EDP_HPD GPP_I4/EDP_HPD GPP_F22 L43
<40> HDA_SDIN0 GPP_G23 L44
1 GPP_G22 U35 1
GPP_G21 R35
+3VALW_PCH_PRIM GPP_G20 BD36
RPH7 GPP_H23
8 1 SYS_RESET#
7 2 PCH_PWROK
6 3 EC_RSMRST# 5 OF 12
5 4 LAN_WAKE# +3VS
+3VALW_DSW 2 1 SKL-H-PCH_BGA837
@ REV = 1.3 ? CRB 8.2K
10K_0804_8P4R_5% CH64 CH62 PM_CLKRUN# RH48 1 2 10K_0402_5%
SPT-H_PCH
.1U_0402_16V7K 0.047U_0402_16V7K UH1D
XEMC@ 1 2 XEMC@
Follow 543016_SKL_U_Y_PDG_0_9 +3VALW_PCH_PRIM
HDA_BIT_CLK BA9 BB17
HDA_RST# BD8 HDA_BCLK GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF# AW22 PM_CLKRUN# PCH_VRALERT# RH52 2 @ 1 10K_0402_5%
HDA_SDIN0 BE7 HDA_RST# GPP_A8/CLKRUN# PM_CLKRUN# <41>
+3VALW_DSW BC8 HDA_SDI0 AR15 +3VALW_DSW
HDA_SDI1 GPD11/LANPHYPC
HDA_SDOUT BB7 AV13 SLP_WLAN# PBTN_OUT#_R RH53 2 1 100K_0402_5%
1 2 10K_0402_5% PM_BATLOW# HDA_SYNC BD9 HDA_SDO GPD9/SLP_WLAN# PAD @ T16
RH49
HDA_SYNC BC14 DDR_DRAMRST# @ RH55
AC_PRESENT_R DRAM_RESET# PCH_VRALERT# DDR_DRAMRST# <14>
RH50 1 @ 2 10K_0402_5% BD1 BD23 0_0402_5%
RH56 BE2 RSVD_BD1 GPP_B2/VRALERT# AL27 TYPEC_3A_1P5A# PBTN_OUT#_R 1 2
RSVD_BE2 GPP_B1 LAN_GPO TYPEC_3A_1P5A# <36> PBTN_OUT# <39>
RH51 1 2 1K_0402_5% WAKE# close 30_0402_1% AR27
1 2 CPU_DISPA_SDO_R AM1 AUDIO GPP_B0 N44 LAN_GPO <32>
@ RH59
<6> CPU_DISPA_SDO to PCH CPU_DISPA_SDI_R
AN2 DISPA_SDO GPP_G17/ADR_COMPLETE AN24
<6> CPU_DISPA_SDI_R 0_0402_5%
1 2 CPU_DISPA_BCLK_R AM2 DISPA_SDI GPP_B11 AY1 SYS_PWROK AC_PRESENT_R 1 2
WAKE# (DSX wake event) <6> CPU_DISPA_BCLK DISPA_BCLK SYS_PWROK SYS_PWROK <39,43> AC_PRESENT <39>
10 KΩ pull- up t o Vcc DS W3_3 RH58 30_0402_1%
The pull-up is required even if AL42 BC13 WAKE#
AN42 GPP_D8/I2S0_SCLK WAKE# BC15 PM_SLP_A#
PCIe* interface GPP_D7/I2S0_RXD GPD6/SLP_A# SLP_LAN# PAD @ T17 PM_SLP_S3#
AM43 AV15
is not used on the plat f or m
. AJ33 GPP_D6/I2S0_TXD SLP_LAN# BC26 PM_SLP_S0#_R PAD @ T18 PAD @ T19
2 PCH_DMIC_DATA0 AH44 GPP_D5/I2S0_SFRM GPP_B12/SLP_S0# AW15 PM_SLP_S3# 2
<40> PCH_DMIC_DATA0 PCH_DMIC_CLK0 GPP_D20/DMIC_DATA0 GPD4/SLP_S3# PM_SLP_S4# PM_SLP_S3# <39,43> PM_SLP_S4#
AJ35 BD15
<40> PCH_DMIC_CLK0 PCH_DMIC_DATA1 AJ38 GPP_D19/DMIC_CLK0 GPD5/SLP_S4# BA13 PM_SLP_S5# PM_SLP_S4# <39,43> PAD @ T20
T203 @ PAD RH166
+RTCVCC PCH_DMIC_CLK1 AJ42 GPP_D18/DMIC_DATA1 GPD10/SLP_S5# PAD @ T21
T204 @ PAD 0_0402_5%
GPP_D17/DMIC_CLK1 AN15 SUSCLK PM_SLP_S0#_R 1 @ 2
GPD8/SUSCLK BD13 PM_BATLOW# SUSCLK <34,37> PM_SLP_S0# <39>
RH60 1 2 20K_0402_5% PCH_SRTCRST# GPD0/BATLOW# BB19
PCH_RTCRST# BC10 GPP_A15/SUSACK# BD19 1 2 PAD @ T22 SYS_PWROK 1 2
<39> PCH_RTCRST# @
1 2 PCH_SRTCRST# BB10 RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK SUSPWRDNACK <39>
CH21 1U_0402_6.3V6K RH62 0_0402_5% RH61 10K_0402_5%
SRTCRST#
PCH_PWROK AW11 BD11 LAN_WAKE# 1 2
Remove CLR ME <39,43> PCH_PWROK EC_RSMRST# PCH_PWROK GPD2/LAN_WAKE# AC_PRESENT_R
BA11 BB15 CH61 .1U_0402_16V7K
<39> EC_RSMRST# RSMRST# GPD1/ACPRESENT PM_SLP_SUS#
BB13 XEMC@
PCH_RTCRST# PCH_DPWROK AV11 SLP_SUS# PBTN_OUT#_R PAD @ T23 SYS_RESET#
RH63 1 2 20K_0402_5% AT13 1 2
PCH_SMBALERT# BB41 DSW_PWROK GPD3/PWRBTN# AW1 SYS_RESET# CH22
T24 @ PAD PCH_SMBCLK GPP_C2/SMBALERT# SYS_RESET# PCH_SPKR
CH23 1 2 1U_0402_6.3V6K AW44 BD26 .1U_0402_16V7K
SMBUS
PCH_SMBDATA BB43 GPP_C0/SMBCLK GPP_B14/SPKR H_CPUPWRGD PCH_SPKR <40>
(SO-DIMM,G-sensor) AM3 H_CPUPWRGD <9> XEMC@
JCMOS1 1 @ 2 0_0603_5% PCH_SML0ALERT#BA40 GPP_C1/SMBDATA PROCPWRGD
T25 @ PAD PCH_SML0CLK GPP_C5/SML0ALERT# XDP_ITP_PMODE
AY44 AT2
PCH_SML0DATA BB39 GPP_C3/SML0CLK ITP_PMODE AR3 CPU_XDP_TCK0 PAD @ T26
Place at RAM DOOR CLR CMOS
PCH_SML1ALERT#AT27 GPP_C4/SML0DATA JTAGX CPU_XDP_TMS CPU_XDP_TCK0 <6,9>
JTA G AR2
T27 @ PAD PCH_SML1CLK AW42 GPP_B23/SML1ALERT#/PCHHOT# JTAG_TMS CPU_XDP_TDO CPU_XDP_TMS <6,9>
AP1
PCH_SML1DATA AW45 GPP_C6/SML1CLK JTAG_TDO AP2 CPU_XDP_TDI CPU_XDP_TDO <6,9>
GPP_C7/SML1DATA JTAG_TDI AN3 PCH_JTAG_TCK1 CPU_XDP_TDI <6,9>
JTAG_TCK PCH_JTAG_TCK1 <6>
(VGA, EC, RTD2168) 4 OF 12
SKL-H-PCH_BGA837
@ REV = 1.3 ?
EC_RSMRST# 2 @ 1 PCH_DPWROK
3
RH54 0_0402_5% Functional Strap Definitions 3
SYS_PWROK 2 @ 1 PCH_PWROK
RH57 0_0402_5%
SMBALERT# / GPP_C2
int. PD
0 = Disable Intel ME (TLS) (Default)
+3VALW_PCH_PRIM
1 = Enable Intel ME (TLS)
RH64 1 2 4.7K_0402_5% PCH_SMBALERT#

+3VS
2 4.7K_0402_5% PCH_SML0ALERT#
SML0ALERT# / GPP_C5
RH1671 @
RH1681 @ 2 4.7K_0402_5% PCH_SML1ALERT# int. PD
1.0 Modify 0 = LPC Is selected for EC. (Default) DDPB_CTRLDATA / GPP_I6
QH1A 1 = eSPI Is selected for EC. int. PD
2
+3VALW_PCH_PRIM DMN65D8LDW-7_SOT363-6 (DDR,G-Sensor)

PCH_SML0CLK PCH_SMBCLK D_CK_SCLK
0 = Port B is not detected.
1 2 6 1 SML1ALERT# / PCHHOT# / GPP_B23
RH65 499_0402_1%
D_CK_SCLK <14,15,38> 1 = Port B is detected. (Default)
1 2 PCH_SML0DATA int. PD
5
RH66 499_0402_1% QH1B DDPC_CTRLDATA / GPP_I8

DMN65D8LDW-7_SOT363-6
PCH_SMBDATA 3 4 D_CK_SDATA
SPKR / GPP_B14 int. PD
D_CK_SDATA <14,15,38>
RPH8
EC_SMB_DA2 int. PD 0 = Port C is not detected.
8 1
+3VS
7 2 EC_SMB_CK2 +3VS 0 = Disable Top Swap mode. (Default) 1 = Port C is detected. (Default)
6 3 PCH_SML1CLK
+3VALW_PCH_PRIM
5 4 PCH_SML1DATA 1 = Enable Top Swap mode.
2.2K_0804_8P4R_5% QH2A HDA_SDO DDPD_CTRLDATA / GPP_I10

2
4
DMN65D8LDW-7_SOT363-6 (EC, VGA) int. PD int. PD 4
+3VALW_PCH_PRIM PCH_SML1CLK 6 1 EC_SMB_CK2 0 = Enable security measures defined in the Flash 0 = Port D is not detected. (Default)
EC_SMB_CK2 <23,33,39>
RPH9 Descriptor. (Default) 1 = Port D is detected.
8 1 PCH_SMBDATA
1 = Disable Flash Descriptor Security (override).
5
7 2 PCH_SMBCLK QH2B
6 3 D_CK_SCLK DMN65D8LDW-7_SOT363-6
+3VS D_CK_SDATA PCH_SML1DATA EC_SMB_DA2
5 4 3 4
EC_SMB_DA2 <23,33,39>
2.2K_0804_8P4R_5% Security Classification
2016/11/03
Compal Secret Data
2017/01/10 Title
PDG_0_71 requirement PH to +3V_PCH THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH(3/7)GPIO,SMBUS
10/14 Dan AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom

A B C D E
A B C D E
1B Modify
24M X'tal
1 EMC@ 2XTAL24_OUT
RH164 33_0402_1%
1 2 1 EMC@ 2XTAL24_IN
RH72 1M_0402_5% RH165 33_0402_1%
YH2
24MHZ_18PF_XRCGB24M000F2P51R0
1 1
3 1
3 1
33P_0402_50V8J
18P_0402_50V8J
NC NC
CH24
CH25
4 2
1B Modify
RTC X'tal
RTCX1
1 2 RTCX2
SPT-H_PCH
RH71 10M_0402_5% UH1G
AR17
GPP_A16/CLKOUT_48
YH1
1 2 G1 L1 CLK_CPU_ITP#
<9> CPU_24M CLKOUT_CPUNSSC_P CLKOUT_ITPXDP_N @ T28 PAD
F1 L2 CLK_CPU_ITP
<9> CPU_24M# CLKOUT_CPUNSSC_N CLKOUT_ITPXDP_P @ T29 PAD
32.768KHZ_9PF_CM7V-T1A9.0PF20PPM J1 CPU_PCIBCLK#
CLKOUT_CPUPCIBCLK_N CPU_PCIBCLK CPU_PCIBCLK# <9>
G2 J2
<9> CPU_BCLK CLKOUT_CPUBCLK_P CLKOUT_CPUPCIBCLK_P CPU_PCIBCLK <9>
8.2P_0402_50V8D
8.2P_0402_50V8D
1 1 H2
<9> CPU_BCLK# CLKOUT_CPUBCLK_N
XTAL24_OUT CLK_PEG_VGA#
CH26
CH27
A5 N7
XTAL24_IN XTAL24_OUT CLKOUT_PCIE_N0 CLK_PEG_VGA CLK_PEG_VGA# <23>
2 2
A6
XTAL24_IN CLKOUT_PCIE_P0
N8
CLK_PEG_VGA <23> DGPU
2 2 1 XCLK_BIASREF E1 L7 CLK_PCIE_LAN# 2
+1.0VALW _VCCCLK5 XCLK_BIASREF CLKOUT_PCIE_N1 CLK_PCIE_LAN CLK_PCIE_LAN# <32>
RH67
CLKOUT_PCIE_P1
L5
CLK_PCIE_LAN <32> GLAN
2.7K_0402_1% RTCX1 BC9
RTCX2 BD10 RTCX1 D3 CLK_PCIE_W LAN#
RTCX2 CLKOUT_PCIE_N2 CLK_PCIE_W LAN CLK_PCIE_W LAN# <37>
VGA_CLKREQ# CLKOUT_PCIE_P2
F2
CLK_PCIE_W LAN <37> NGFF WL+BT(KEY E)
BC24
LAN_CLKREQ# GPP_B5/SRCCLKREQ0#
Follow PDG 0.71Table 52-17 <32> LAN_CLKREQ# AW24
GPP_B6/SRCCLKREQ1# CLKOUT_PCIE_N3
E5
10/13 Dan W LAN_CLKREQ# AT24 G4
<37> W LAN_CLKREQ# CLKREQ_PCIE#3 GPP_B7/SRCCLKREQ2# CLKOUT_PCIE_P3
CHECK NEEDED IF UNUSE? BD25
NGFF_CLKREQ# BB24 GPP_B8/SRCCLKREQ3# D5 CLK_PCIE_NGFF#
<34> NGFF_CLKREQ# CLKREQ_PCIE#5 GPP_B9/SRCCLKREQ4# CLKOUT_PCIE_N4 CLK_PCIE_NGFF CLK_PCIE_NGFF# <34>
CLKREQ_PCIE#6
BE25
GPP_B10/SRCCLKREQ5# CLKOUT_PCIE_P4
E6
CLK_PCIE_NGFF <34> M2 SSD
AT33
+3VS CLKREQ_PCIE#7 AR31 GPP_H0/SRCCLKREQ6# D8
CLKREQ_PCIE#8 BD32 GPP_H1/SRCCLKREQ7# CLKOUT_PCIE_N5 D7
CLKREQ_PCIE#9 BC32 GPP_H2/SRCCLKREQ8# CLKOUT_PCIE_P5
GPP_H3/SRCCLKREQ9#
1
CLKREQ_PCIE#10 BB31 R8
RH68 CLKREQ_PCIE#11 BC33 GPP_H4/SRCCLKREQ10# CLKOUT_PCIE_N6 R7
@ 10K_0402_5% CLKREQ_PCIE#12 BA33 GPP_H5/SRCCLKREQ11# CLKOUT_PCIE_P6
CLKREQ_PCIE#13 AW33 GPP_H6/SRCCLKREQ12# U5
CLKREQ_PCIE#14 BB33 GPP_H7/SRCCLKREQ13# CLKOUT_PCIE_N7 U7
2
CLKREQ_PCIE#3 CLKREQ_PCIE#15 BD33 GPP_H8/SRCCLKREQ14# CLKOUT_PCIE_P7

GPP_H9/SRCCLKREQ15# W10
R13 CLKOUT_PCIE_N8 W11
R11 CLKOUT_PCIE_N15 CLKOUT_PCIE_P8
CLKOUT_PCIE_P15 N3
P1 CLKOUT_PCIE_N9 N2
R2 CLKOUT_PCIE_N14 CLKOUT_PCIE_P9
+3VS CLKOUT_PCIE_P14 P3
RPH10 CLKOUT_PCIE_N10
W7 P2
3 8 1 LAN_CLKREQ# Y5 CLKOUT_PCIE_N13 CLKOUT_PCIE_P10 3
7 2 VGA_CLKREQ# CLKOUT_PCIE_P13 R3
W LAN_CLKREQ# VGA_CLKREQ# <23> CLKOUT_PCIE_N11
6 3 U2 R4
5 4 NGFF_CLKREQ# U3 CLKOUT_PCIE_N12 CLKOUT_PCIE_P11
CLKOUT_PCIE_P12 7 OF 12
10K_0804_8P4R_5%
RPH11 SKL-H-PCH_BGA837 ?
@
8 1 CLKREQ_PCIE#12 @ REV = 1.3
7 2 CLKREQ_PCIE#7
6 3 CLKREQ_PCIE#10
5 4 CLKREQ_PCIE#5
10K_0804_8P4R_5%
RPH12
@
8 1 CLKREQ_PCIE#9
7 2 CLKREQ_PCIE#8
6 3 CLKREQ_PCIE#6
5 4 CLKREQ_PCIE#13
10K_0804_8P4R_5%
RPH13
@
8 1 CLKREQ_PCIE#14
7 2 CLKREQ_PCIE#11
6 3 CLKREQ_PCIE#15
5 4
4 4
10K_0804_8P4R_5%
2016/11/03
Compal Secret Data
2017/01/10 Title
PCH(4/7)CLK
Custom

A B C D E
A B C D E
Functional Strap Definitions

GSPI1_MOSI / GPP_B22
int. PD
Boot BIOS Destination
0 = SPI (Default)
1 = LPC
1 1
GSPI0_MOSI / GPP_B18
int. PD
0 = Disable No Reboot mode. (Default)
1 = Enable No Reboot mode (PCH will disable the TCO UH1K SPT-H_PCH
Timer system reboot feature). AT29
AR29 GPP_B22/GSPI1_MOSI AL44 VGA_ID1
EC_SCI# AV29 GPP_B21/GSPI1_MISO GPP_D9 AL36 VGA_ID2
BC27 GPP_B20/GSPI1_CLK GPP_D10 AL35 PROJECT_ID0
GPP_B19/GSPI1_CS# GPP_D11 AJ39 PROJECT_ID1
BD28 GPP_D12
GC6_FB_EN BD27 GPP_B18/GSPI0_MOSI AJ43
AW27 GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS# AL43
AR24 GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS# AK44
GPP_B15/GSPI0_CS# GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C2_SCL AK45 SUB_DET
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C2_SDA SUB_DET <33>
AV44
1 @ 2 PCH_AC_DET BA41 GPP_C9/UART0_TXD
<23,39> DGPU_AC_DETECT GPP_C8/UART0_RXD
RH77 AU44
+3VS 0_0402_5% GPU_EVENT_R# AV43 GPP_C11/UART0_CTS#
GPP_C10/UART0_RTS#
PCH internal PU 20K AU41 BC38
EC_SCI# GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H20/ISH_I2C0_SCL PAD @ T30
RH14 2 @ 1 10K_0402_5% AT44 BB38
EC_SCI# <39> DGPU_HOLD_RST# GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_H19/ISH_I2C0_SDA PAD @ T31
AT43
<23> DGPU_HOLD_RST# DGPU_PW R_EN GPP_C13/UART1_TXD/ISH_UART1_TXD
AU43 BD38
<23,27> DGPU_PW R_EN GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL PAD @ T32
BE39
UART_2_CCTS_DRTS GPP_H21/ISH_I2C1_SDA PAD @ T33
AN43
+3VS UART_2_CRTS_DCTS AN44 GPP_C23/UART2_CTS#
2 UART_2_CTXD_DRXD AR39 GPP_C22/UART2_RTS# 2
<37> UART_2_CTXD_DRXD UART_2_CRXD_DTXD GPP_C21/UART2_TXD
AR45 BC22
<37> UART_2_CRXD_DTXD GPP_C20/UART2_RXD GPP_A23/ISH_GP5
RH73 2 1 49.9K_0402_1% UART_2_CRXD_DTXD BD18
I2C_1_SCL GPP_A22/ISH_GP4 PAD @ T34
AR41 BE21
<41> I2C_1_SCL GPP_C19/I2C1_SCL GPP_A21/ISH_GP3 PAD @ T35
RH74 2 1 49.9K_0402_1% UART_2_CTXD_DRXD <Touch PAD> I2C_1_SDA AR44 BD22 G_INT
<41> I2C_1_SDA GPP_C18/I2C1_SDA GPP_A20/ISH_GP2
AR38 BD21
GPP_C17/I2C0_SCL GPP_A19/ISH_GP1 PAD @ T36
RH76 2 @ 1 49.9K_0402_1% UART_2_CCTS_DRTS AT42 BB22
PCH_GPP_D4 AM44 GPP_C16/I2C0_SDA GPP_A18/ISH_GP0 BC19
@ PAD GPP_D4/ISH_I2C2_SDA/ISH_I2C3_SDA GPP_A17/ISH_GP7
RH75 2 @ 1 49.9K_0402_1% UART_2_CRTS_DCTS AJ44
T37 GPP_D23/ISH_I2C2_SCL/ISH_I2C3_SCL
11 OF 12
SKL-H-PCH_BGA837
REV = 1.3 ?
@
+3VALW _PCH_PRIM +3VALW _PCH_PRIM
+3VALW _PCH_PRIM VGA_ID1 1 G1@ 2 PROJECT_ID0 1 @ 2

RH88 1K_0402_1% RH89 1K_0402_1%
RH80 1 2 2.2K_0402_5% I2C_1_SCL 1 G0@ 2 1 2
RH90 10K_0402_5% RH91 10K_0402_5%
RH81 1 2 2.2K_0402_5% I2C_1_SDA +3VS
VGA_ID2 1 @ 2 PROJECT_ID1 1 @ 2
RH92 1K_0402_1% RH93 1K_0402_1%
2
<Touch PAD/PNL> 1 2 1 2
RH94 VGA@ 10K_0402_5% RH95 10K_0402_5% RH82 @
3 +3VS 3
10K_0402_5%
RH83 2 VGA@ 1 10K_0402_5% DGPU_PW R_EN
1
G_INT
G_INT <38>
RH85 2 VGA@ 1 10K_0402_5% DGPU_HOLD_RST#
2
VGA_ID2 VGA_ID1 Project_ID1 Project_ID0 @ RH84
VGA ID Project ID
GPP_D10 GPP_D9 GPP_D12 GPP_D11 100K_0402_5%
N17P-G0 0 0 *C5MMH 0 0
1
GPU_EVENT# 1 @ 2 GPU_EVENT_R# N17P-G1 0 1 C5PRH 0 1
<23> GPU_EVENT#
RH86 0_0402_5%
TO DGPU GC6_FB_EN3V3 1 @ 2 GC6_FB_EN N17E-G1 1 0 Reserved 1 0
<23> GC6_FB_EN3V3
RH87 0_0402_5%
Reserved 1 1 Reserved 1 1
4 4
2016/11/03
Compal Secret Data
2017/01/10 Title
PCH(5/7)UART,I2C,GPIO
Custom

A B C D E
A B C D E
+3VALW +3VALW_DSW +3VALW_PCH_PRIM

1.0 Modify
+1.0VALW +1.0VALW_PRIM
RH97 1 @ 2 0_0603_5%
JC2
CH29 1 2 1U_0402_6.3V6K
2 1 1.0 Modify @ Near PIN BD3,BE3,BE4
+3VALW_PCH_PRIM
@
JUMP_43X118 RH99 1 @ 2 0_0805_5%
CH33 1 2 1U_0402_6.3V6K
+1.0VALW_PCH @ Near PIN BA20
+3VALW_HDA
RH98 1 @ 2 0_0805_5% 1 @ 2
RH100 0_0603_5% CH35 1 2 0.1U_0201_10V6K
Near PIN AN5
1 1
RH101 for Deep SX +3VALW_PCH_PRIM +3VALW_SPI CH36 1 2 1U_0402_6.3V6K

No requirment
+1.0VALW_PCH +1.0VALW_DCPDSW Near PIN BC44
1 @ 2 1
1 @ 2 RH102 0_0603_5%
RH101 0_0402_5% Near PIN CH66 CH37 1 2 0.1U_0201_10V6K
1 BA29 0.1U_0201_10V6K Near PIN BC42,BD40
2
CH28 PCH_EDS Table10-4
1U_0402_6.3V6K 12/30 J
2 CH38 1 2 0.1U_0201_10V6K
+1.0VALW_PRIM Near PIN AJ41 , AL41
UH1H SPT-H_PCH
2.899A AA23
+1.0VALW_VCCCLK AA26 VCCPRIM_1P0 CH43 1 2 0.1U_0201_10V6K
AA28 VCCPRIM_1P0 AL22 0.0908A Near PIN AD41
VCCPRIM_1P0 VCCPRIM_1P0 +1.0VALW_PRIMAL22
CORE
RH103 AC23
1 @ 2 AC26 VCCPRIM_1P0 BA24 0.195A
VCCPRIM_1P0 VCCDSW_3P3 +3VALW_DSW
AC28 BA31 0.082A +3VALW_PCH_PRIM
VCCPRIM_1P0 VCCPGPPA
VCCGPIO
0_0603_5% AE23 CH45 1 2 0.1U_0201_10V6K
AE26 VCCPRIM_1P0 BC42 0.2726A
Y23 VCCPRIM_1P0 VCCPGPPBCH BD40 CH46 1 2 1U_0402_6.3V6K
LH1 +1.0VALW_VCCCLK5 Y25 VCCPRIM_1P0 VCCPGPPBCH AJ41 0.1410A Near PIN BA20
FBMA-L11-160808-800LMT_0603 0.0454A BA29 VCCPRIM_1P0 VCCPGPPEF AL41
+1.0VALW_DCPDSW DCPDSW_1P0 VCCPGPPEF
1 2 AD41 0.1318A
Near PIN 0.021A N17 VCCPGPPG AN5 0.2875A
+1.0VALW_VCCCLK VCCCLK1 VCCPRIM_3P3
22U_0603_6.3V6M
1 1 1 K2,K3 0.050A R19

VCCCLK3
CH31
0.024A U20
CH30 CH32 0.137A V17 VCCCLK4 AD15 0.0061A +3VS +3VS_VCCATS
VCCCLK2 VCCPRIM_1P0 +1.0VALW_PRIMAD15
22U_0603_6.3V6M 1U_0402_6.3V6K R17 AD13 0.007A +3VS_VCCATS
2 2 2 0.006A K2 VCCCLK2 VCCATS BA20 0.0002A 1 @ 2 CH50 1 2 1U_0402_6.3V6K
2 @ VCCCLK5 VCCRTCPRIM_3P3 +3VALW_PCH_PRIM 2
+1.0VALW_VCCCLK5 K3 BA22 +RTCVCC Near PIN BA26 RH105 0_0402_5% @ Near PIN
VCCCLK5 VCCRTC BA26 1 2 AD13
DCPRTC CH34 0.1U_0201_10V6K
+1.0VALW_MPHY 1.307A U21 AJ20 +1.0VALW_PRIM
U23 VCCMPHY_1P0 VCCPRIM_1P0 AJ21
MPHY
V26 VCCMPHY_1P0 VCCPRIM_1P0
0.110A A43 VCCMPHY_1P0
+1.0VALW_AMPHYPLL VCCMPHYPLL_1P0
B43 BE41 0.029A +3VALW_SPI
C44 VCCMPHYPLL_1P0 VCCSPI BE43
modify follow PDG 05/18 C45 VCCPCIE3PLL_1P0 VCCSPI BE42
0.030A V28 VCCPCIE3PLL_1P0 VCCSPI BC44 0.078A
+1.0VALW_MPHY VCCAPLLEBB_1P0 VCCPGPPD +3VALW_PCH_PRIM
0.533A AC17 BA45
VCCPRIM_1P0 VCCPGPPD
USB
+1.0VALW_AUSB_AZPLL 0.012A AJ5 BC45
AL5 VCCUSB2PLL_1P0 VCCPGPPD BB45
+1.0VALW_MPHY 0.033A AN19 VCCUSB2PLL_1P0 VCCPGPPD
RH104 modify follow PDG 05/18 VCCHDAPLL_1P0 BD3 0.117A
VCCPRIM_3P3 +3VALW_PCH_PRIM
1 @ 2 +3VALW_HDA 0.075A BA15 BE3
W15 VCCHDA VCCPRIM_3P3 BE4
+3VALW_DSW VCCDSW_3P3 VCCPRIM_3P3
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0_0603_5% 1 1 1 1 8 OF 12
CH40
CH41
CH42
CH39
SKL-H-PCH_BGA837
22U_0603_6.3V6M 1 ?
2 2 2 2 @ REV = 1.3
NO USE MPHYGT ON H CH44
CHANGE TO +1.0VALW_MPHY
1U_0402_6.3V6K
2 +3VALW_PCH_PRIM +1.0VALW_PRIM
Near PIN Near PIN V28
1U_0402_6.3V6K
1U_0402_6.3V6K
U21,U23,U25,U26,V26 Near PIN AC17 1 1
CH51
CH52
Near PIN W15 @ @
+1.0VALW_AMPHYPLL Add 05/18
2 2
3 LH2 1 2 3
Near PIN
22U_0603_6.3V6M
FBMA-L11-160808-800LMT_0603 1 1 1 A42,A43,B43
CH48
CH47 CH49 +3VALW_PCH_PRIM +1.0VALW_PRIM

22U_0603_6.3V6M 1U_0402_6.3V6K
2 2 2
@
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1 1 1 1
CH55
CH57
CH56
CH58
@
2
@
2
@
2
@
2
RTC Battery
+RTCVCC
+1.0VALW_AUSB_AZPLL VCCMPHY power defined by HSIO lane qty. BAV70W_SOT323-3
LH3 1 2 2 +CHGRTC
Near PIN 1
FBMA-L11-160808-800LMT_0603 1 1 AJ5,AL5 1 1 3 1 2 +RTCBATT
1.0 Modify CH60
RH163 10K_0402_5%
CH53 CH54 CH59 DH3 W=20mils
22U_0603_6.3V6M 22U_0603_6.3V6M 0.1U_0201_10V6K 1U_0402_6.3V6K
2 2 +1.0VALW_MPHY +1.0VALW_MPHY 2 2
Power Rail Voltage
PN :
2
EMC@
2
EMC@
+CHGRTC 3.383V(MAX) SC600000B00
+1.0VALW_PRIMAL22 CH69 CH70 +RTCBATT Near PIN BA22
JRTC1
1000P_0402_50V7K 1000P_0402_50V7K BAT54C(VF) 240 mV 09/26 dan
1 @ 2 1 1 1
RH106 0_0402_5% 2 1
2
+3VL_RTC 3.143V
3
4
4 GND 4
+1.0VALW_PRIMAD15 GND
1.0 Modify Sensitive net cap for V28,AC17 Result : Pass
ACES_50271-0020N-001
1 @ 2 2 CONN@
RH107 0_0402_5% EMC@
CH71 SP02000RO00
1000P_0402_50V7K
1
Sensitive net cap for AD15

2016/01/29
Compal Secret Data
2017/01/10 Title
PCH(6/7)POWER
Custom

A B C D E
A B C D E
UH1I
UH1LSPT-H_PCH
SPT-H_PCH
AC18 AR5 SPT-H_PCH
UH1J
AN4 VSS VSS AR7 C42 AB11
AN10 VSS VSS U15 D10 VSS VSS AB7
BE14 VSS VSS AL4 D12 VSS VSS AB14
1 1
BE18 VSS VSS AE29 D15 VSS VSS AB31 BD2 AR22
BE23 VSS VSS AE4 D16 VSS VSS AB32 BD45 VSS RSVD W13
BE28 VSS VSS AE42 D17 VSS VSS AB38 BD44 VSS RSVD U13
BE32 VSS VSS AF18 D19 VSS VSS AB4 BE44 VSS RSVD P31
BE37 VSS VSS AF20 D21 VSS VSS AB5 D45 VSS RSVD N31
BE40 VSS VSS AF21 D24 VSS VSS AC1 A42 VSS RSVD
BE9 VSS VSS AF23 D25 VSS VSS AC20 B45 VSS P27
C10 VSS VSS AF25 D27 VSS VSS AC21 B44 VSS RSVD R27
C2 VSS VSS AF26 D29 VSS VSS AC25 A4 VSS RSVD N29
C28 VSS VSS AF28 D30 VSS VSS AC29 A3 VSS RSVD P29
C37 VSS VSS AF29 D31 VSS VSS AC45 B2 VSS RSVD AN29
J7 VSS VSS AG11 D33 VSS VSS AB8 A2 VSS RSVD R24
K10 VSS VSS AG13 D35 VSS VSS AD11 B1 VSS RSVD P24
K27 VSS VSS AG31 D36 VSS VSS AD14 BB1 VSS RSVD AT3
K33 VSS VSS AG32 E13 VSS VSS AB15 BC1 VSS PREQ# AT4 RH108
K36 VSS VSS AG33 E15 VSS VSS AD32 A44 VSS PRDY# AY5 30_0402_1%
K4 VSS VSS AG38 E31 VSS VSS AD33 VSS CPU_TRST# AL2 PROC_TRIGIN 2 1
VSS VSS VSS VSS PCH_TRIGOUT PROC_TRIGIN_R <13>
K42 AG4 E33 AD36 C1 AK1 PROC_TRIGOUT_R PROC_TRIGOUT_R <13>
K43 VSS VSS AH1 F44 VSS VSS AD4 D1 RSVD PCH_TRIGIN
L12 VSS VSS AH17 F8 VSS VSS AD8 RSVD
L13 VSS VSS AH18 G42 VSS VSS AE18 10 OF 12
L15 VSS VSS AH20 G9 VSS VSS AE20
L4 VSS VSS AH21 H17 VSS VSS AE21
VSS VSS VSS VSS SKL-H-PCH_BGA837 ?
L41 AH23 H19 AE25
L8 VSS VSS AH25 H22 VSS VSS AE28 @ REV = 1.3
M35 VSS VSS AH26 H24 VSS VSS AL10
M42 VSS VSS AH28 H27 VSS VSS AL11
N10 VSS VSS AH29 H29 VSS VSS AL13
2 N15 VSS VSS AH45 H3 VSS VSS AL17 2
N19 VSS VSS AJ10 H35 VSS VSS AL19
N22 VSS VSS AJ14 J10 VSS VSS AL24
N41 VSS VSS AJ28 T42 VSS VSS AM15
N5 VSS VSS AJ29 U10 VSS VSS AM17
P17 VSS VSS AJ31 U11 VSS VSS AM19
P45 VSS VSS AK4 U18 VSS VSS AM27
R10 VSS VSS AK42 U28 VSS VSS AM29
R14 VSS VSS AU7 U29 VSS VSS AM45
R22 VSS VSS AV17 U31 VSS VSS AN11
T1 VSS VSS AV6 U8 VSS VSS AN7
T2 VSS VSS AW13 V18 VSS VSS AN8
T4 VSS VSS AW19 V20 VSS VSS AP11
Y18 VSS VSS AW29 V21 VSS VSS AP4
Y20 VSS VSS AW37 V23 VSS VSS AR33
Y21 VSS VSS AW9 V25 VSS VSS AR34
Y26 VSS VSS AY38 V29 VSS VSS AR42
Y28 VSS VSS AY45 V3 VSS VSS AR9
Y29 VSS VSS B25 V45 VSS VSS AT10
3 A18 VSS VSS B3 W14 VSS VSS AT15 3
A25 VSS VSS B37 W31 VSS VSS AT36
A32 VSS VSS B40 W32 VSS VSS AT9
A37 VSS VSS B6 W33 VSS VSS AU1
AA17 VSS VSS BA1 W38 VSS VSS AU35
AA18 VSS VSS BB11 W4 VSS VSS AU36
AA20 VSS VSS BB16 W8 VSS VSS AU39
AA21 VSS VSS BB21 Y17 VSS VSS AU45
AA25 VSS VSS BB25 VSS VSS C4
AA29 VSS VSS BB30 VSS
AA4 VSS VSS BB34
AA42 VSS VSS BC2
AB10 VSS VSS BD43 12 OF 12
VSS 9 OF 12 VSS
SKL-H-PCH_BGA837
SKL-H-PCH_BGA837 ?
? @ REV = 1.3
@ REV = 1.3
4 4
2016/11/03
Compal Secret Data
2017/01/10 Title
PCH(7/7)GND
Custom

A B C D E
A B C D E
+1.8VSDGPU_AON
RVP1
UV1A +1.8VSDGPU_AON 10K_0804_8P4R_5%
VGA_OVERT# 8 1
AN12 Part 1 of 7 VGA_ALERT 7 2
<8> PEG_HTX_C_GRX_P0 PEX_RX0
5
AM12 P6 DGPU_VID VGA@ FRM_LCK# 6 3
<8> PEG_HTX_C_GRX_N0 PEX_RX0_N GPIO0 GC6_FB_EN1V8 DGPU_VID <58> ACIN_BUF
AN14 M3 VGA@ 5 4
VCC
<8> PEG_HTX_C_GRX_P1
AM14 PEX_RX1 GPIO1 L6 GPU_EVENT#_1 PLTRST_VGA#_1V8 1
DV8 2 1
<8> PEG_HTX_C_GRX_N1 PEX_RX1_N GPIO2 DGPU_S_VID GPU_EVENT# <20> IN B VGA_GATE
AP14 P5 4 VGA@
<8> PEG_HTX_C_GRX_P2 PEX_RX2 GPIO3 1.8VSDGPU_MAIN_EN DGPU_S_VID <59> OUT Y
AP15 P7 RB751S40T1G_SOD523-2 2
GND
<8> PEG_HTX_C_GRX_N2 PEX_RX2_N GPIO4 FRM_LCK# +1.8VSDGPU_MAIN IN A 1
AN15 L7 1.8VSDGPU_MAIN_EN <27> RVP2
<8> PEG_HTX_C_GRX_P3 AM15 PEX_RX3 GPIO5 M7 DGPU_PSI CV201 10K_0804_8P4R_5%
<8> PEG_HTX_C_GRX_N3
AN17 PEX_RX3_N GPIO6 N8 DGPU_PSI <58,59> GPU_EVENT#_1 8 1
UV12 0.01U_0402_16V7K
<8> PEG_HTX_C_GRX_P4
3
AM17 PEX_RX4 GPIO7 L3 VRAM_VDD_CTL NL17SZ08DFT2G_SC70-5 2 VGA@ VRAM_VREF_CTL 7 2
<8> PEG_HTX_C_GRX_N4 PEX_RX4_N GPIO8 VGA_ALERT VRAM_VDD_CTL <56> GC6_FB_EN1V8
AP17 M2 6 3
<8> PEG_HTX_C_GRX_P5 PEX_RX5 GPIO9 VRAM_VREF_CTL 1.8VSDGPU_MAIN_EN
AP18 L1 5 4
<8> PEG_HTX_C_GRX_N5 PEX_RX5_N GPIO10 VRAM_VREF_CTL <28,29>
AN18 M5
<8> PEG_HTX_C_GRX_P6 PEX_RX6 GPIO11 ACIN_BUF
AM18 N3 DV2 2 1 VGA@
GPIO
<8> PEG_HTX_C_GRX_N6 PEX_RX6_N GPIO12 DGPU_AC_DETECT <20,39>
1 AN20 M4 1
<8> PEG_HTX_C_GRX_P7 PEX_RX7 GPIO13 SYS_PEX_RST_MON#
AM20 N4 RB751S40T1G_SOD523-2 RV1 2 VGA@ 1 10K_0402_5%
<8> PEG_HTX_C_GRX_N7 PEX_RX7_N GPIO14 VGA_I2CS_SDA
AP20 P2 VGA@ RV2 1 VGA@ 2 1.8K_0402_1%
<8> PEG_HTX_C_GRX_P8 PEX_RX8 GPIO15 SYS_PEX_RST_MON# VGA_I2CS_SCL
AP21 R8 RV3 1 VGA@ 2 1.8K_0402_1%
<8> PEG_HTX_C_GRX_N8 AN21 PEX_RX8_N GPIO16 M6 DGPU_PSI 2 1
RV4 VGA@ 10K_0402_5%
<8> PEG_HTX_C_GRX_P9 PEX_RX9 GPIO17 GPU_PEX_RST_HOLD#
AM21 R1 RV82 2 VGA@ 1 10K_0402_5%
<8> PEG_HTX_C_GRX_N9 PEX_RX9_N GPIO18 NVVDDS_PSI
AN23 P3 RV84 2 @ 1 10K_0402_5%
<8> PEG_HTX_C_GRX_P10 PEX_RX10 GPIO19 NVVDDS_PSI
AM23 P4
<8> PEG_HTX_C_GRX_N10
AP23 PEX_RX10_N GPIO20 P1 VGA_GATE
<8> PEG_HTX_C_GRX_P11 PEX_RX11 GPIO21 +1.8VSDGPU_MAIN
AP24 P8
<8> PEG_HTX_C_GRX_N11 PEX_RX11_N GPIO22 GPU_PEX_RST_HOLD#
AN24 T8
<8> PEG_HTX_C_GRX_P12 PEX_RX12 GPIO23
AM24 L2
<8> PEG_HTX_C_GRX_N12 PEX_RX12_N GPIO24
5
AN26 R4 QV1A QV2A
<8> PEG_HTX_C_GRX_P13 PEX_RX13 GPIO25
AM26 R5 PJT138KA 2N SOT363-6 PJT138KA 2N SOT363-6
G
<8> PEG_HTX_C_GRX_N13 PEX_RX13_N GPIO26 HDMI_HPD_GPU# VGA_OVERT# VGA_I2CS_SCL
AP26 U3 <25> VGA_OVERT#
4 3 GPU_OVERT# <39>
4 3
<8> PEG_HTX_C_GRX_P14 PEX_RX14 GPIO27 EC_SMB_CK2 <18,33,39>
AP27
D
VGA@ VGA@
<8> PEG_HTX_C_GRX_N14 PEX_RX14_N VGA_GATE +1.8VSDGPU_MAIN
AN27
<8> PEG_HTX_C_GRX_P15 PEX_RX15
AM27 AK9
<8> PEG_HTX_C_GRX_N15 PEX_RX15_N NC
2
AL10 QV1B
NC
2
AL9 PJT138KA 2N SOT363-6 QV2B
G
AK14 NC AM9 VGA_ALERT 1 6 PJT138KA 2N SOT363-6
G
<8> PEG_GTX_HRX_P0 PEX_TX0 NC GPU_ALERT <39> VGA_I2CS_SDA
AJ14 AN9 1 6
D
<8> PEG_GTX_HRX_N0 VGA@ EC_SMB_DA2 <18,33,39>
AH14 PEX_TX0_N NC AG10
D
<8> PEG_GTX_HRX_P1 VGA@
AG14 PEX_TX1 NC AP8
<8> PEG_GTX_HRX_N1 PEX_TX1_N NC
<8> PEG_GTX_HRX_P2 AK15 AK26
AJ15 PEX_TX2 NC AJ26 ALL_GPWRGD
<8> PEG_GTX_HRX_N2 PEX_TX2_N NC
AL16
PCI EXPRESS
<8> PEG_GTX_HRX_P3 PEX_TX3
<8> PEG_GTX_HRX_N3 AK16 27MHZ_10PF_XRCGB27M000F2P18R0
PEX_TX3_N
5
<8> PEG_GTX_HRX_P4 AK17 XV1
AJ17 PEX_TX4 PCH side
G
<8> PEG_GTX_HRX_N4 PEX_TX4_N DGPU_CLKREQ# 4
<8> PEG_GTX_HRX_P5 AH17 AP9 3 XTALOUT 2 RV80 1 XTALOUT_R 1 3 XTALIN
PEX_TX5 TS_VREF VGA_CLKREQ# <19> 1 3
AG17
D
<8> PEG_GTX_HRX_N5 0_0402_5%
AK18 PEX_TX5_N QV5A VGA@ VGA@ NC NC
1 1
12P_0402_50V8J
12P_0402_50V8J
<8> PEG_GTX_HRX_N6 AJ18 PJT138KA 2N SOT363-6 VGA@ VGA@
AL19 PEX_TX6_N VGA@ 2 4
<8> PEG_GTX_HRX_P7 PEX_TX7 +1.8VSDGPU_AON
<8> PEG_GTX_HRX_N7 AK19 CV1 CV2
AK20 PEX_TX7_N unused pin PH 2K to 1V8AON 2 2
<8> PEG_GTX_HRX_N8
AJ20
AH20 PEX_TX8_N R7 RV86 1 VGA@ 2 2K_0402_5%
2 <8> PEG_GTX_HRX_P9 PEX_TX9 I2CB_SCL Crystals must have a max ESR of 2
<8> PEG_GTX_HRX_N9 AG20 R6 RV85 1 VGA@ 2 2K_0402_5% 80 ohm
AK21 PEX_TX9_N I2CB_SDA
I2C
AJ21 R2 RV5 1 VGA@ 2 2K_0402_5% +1.8VSDGPU_MAIN

<8> PEG_GTX_HRX_N10 PEX_TX10_N I2CC_SCL
<8> PEG_GTX_HRX_P11
AL22 R3 RV6 1 VGA@ 2 2K_0402_5%
AK22 PEX_TX11 I2CC_SDA
<8> PEG_GTX_HRX_N11 PEX_TX11_N VGA_I2CS_SCL
SM010019400
AK23 T4 +GPU_PLLVDD
<8> PEG_GTX_HRX_P12 PEX_TX12 I2CS_SCL VGA_I2CS_SDA 3000ma 33ohm@100mhz DCR 0.05
<8> PEG_GTX_HRX_N12 AJ23 T3 1.0 Modify
AH23 PEX_TX12_N I2CS_SDA VGA@
<8> PEG_GTX_HRX_P13 PEX_TX13 +GPU_PLLVDD
<8> PEG_GTX_HRX_N13 AG23 LV1 1 2
AK24 PEX_TX13_N CHILISIN PBY160808T-330Y-N
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
4.7U_0402_6.3V6M
22U_0603_6.3V6M
<8> PEG_GTX_HRX_N14
AJ24 1 1 1 1 1 2 @ 1
AL25 PEX_TX14_N CV5 CV6 CV3 CV42 CV4 RV114 0_0402_5%
<8> PEG_GTX_HRX_P15 PEX_TX15 +1.8VSDGPU_AON
<8> PEG_GTX_HRX_N15
AK25
PEX_TX15_N VGA@ VGA@ VGA@ VGA@ VGA@
AD8 2 2 2 2 2 +1.8VSDGPU_AON
XS_PLLVDD
1
AJ11 Near VGA@
NC AE8 RG180
SP_PLLVDD GPU
AL13 Near Near Near VGA@ 10K_0402_5%
<19> CLK_PEG_VGA PEX_REFCLK
AK13 AD7 AD7 AD8 AE8 CG340
<19> CLK_PEG_VGA# DGPU_CLKREQ# AK12 PEX_REFCLK_N VID_PLLVDD 2 1
2
PEX_CLKREQ_N HDMI_HPD_GPU#
CLK
+1.8VSDGPU_AON RV7 1 VGA@ 2 10K_0402_5% H3 XTALIN 0.1U_0201_10V6K

XTAL_IN
5
H2 XTALOUT RV9
XTAL_OUT 10K_0402_5%
VCC
1
PLTRST_VGA#_1V8 AJ12 J4 XTAL_OUTBUFF1 2 VGA@ HDMI_HPD_PCH 1 D
1 2 PEX_TREMP PEX_RST_N XTAL_OUTBUFF XTAL_SSIN <18,31> HDMI_HPD_PCH IN B
AP29 H1 1 2 VGA@ 4 2
RV10 PEX_TERMP XTAL_SSIN RV11 PLTRST_VGA#_1V8 2 OUT Y G
GND
10K_0402_5% IN A S VGA@
3
2.49K_0402_1% QG5
VGA@ VGA@ MESS138W-G_SOT323-3
3
UG28
GP107-ES-A1_BGA908 NL17SZ08DFT2G_SC70-5 1.0 Modify
@
+3VS +1.8VSDGPU_AON
+3VS
2
3 3
UV11 RV83 +3VS
VGA@ 10K_0402_5%
5
1
MC74VHC1G09DFT2G_SC70-5 VGA@
1VS_DGPU_PG 1 RV106 RV108
G VCC
B 4 ALL_GPWRGD 10K_0402_5% 10K_0402_5%

Y
5
<56> 1.35VS_DGPU_PG 2 VGA@ VGA@ VGA@
A
VCC
2
2
1.8VSDGPU_MAIN1
3
IN B 4GPUCORE_EN
OUT Y GPUCORE_EN <27>
3
Enable: 2
GND
PJT138KA 2N SOT363-6
5
D IN A
Vh:2.1V
G
6
Vl:1V
S
1.8VSDGPU_MAIN_EN 2 G
D
QV7A UV10
3
QV7B S VGA@ NL17SZ08DFT2G_SC70-5
DV4 2 1
GC6 2.0 function PJT138KA 2N SOT363-6
DGPU_PWR_EN <20,27> VGA_CORE_EN <58>
1
VGA@
RB751S40T1G_SOD523-2 Enable: Vh:1.5V
+3VS
GC6_FB_EN3V3 2
DV3 +1.8VSDGPU_AON 1.0 Modify VGA@ Vl:0.7V
+1.8VSDGPU_AON 1 2
1 1.35VSDGPU_PWR_EN <56> RV105 2
1
3 VGA@ 2 33K_0402_1%
<57> 1VS_DGPU_PG
RV113 VGA@ CV197
1
10K_0402_5% BAV70W_SOT323-3 CV199 0.1U_0201_10V6K

RV111 VGA@ RV12 RV102 0.1U_0201_10V6K GPU_OVERT# DV7 1 2 1 VGA@
10K_0402_5% 200K_0402_1% 10K_0402_5% 1 VGA@
3 2
VGA@ GC6_FB_EN3V3 VGA@ VGA@ RB751S40T1G_SOD523-2

GC6_FB_EN3V3 <20>
5
VGA@ VGA@ DV5 1 2

VGA_CORE_S_EN <57,59>
6 2
5
D
VCC
S PJT138KA 2N SOT363-6 PLTRST_VGA#_1V8 1 3 RB751S40T1G_SOD523-2

GC6_FB_EN1V8 2 D
QV8A IN B 4 5
D
QV6A
G G
VGA@ VDDS delay
4
QV8B VGA@ +3VS GC6_FB_EN1V8# 2 OUT Y 1 2

PJT138KA 2N SOT363-6 1.33ms
GND
S S
PJT138KA 2N SOT363-6 IN A RV103 15K_0402_5%

1
VGA@ UV2 2 VGA@ RV104 VGA@ 2

VGA@ UV9 1 2 +3VS
3
5
MC74VHC1G09DFT2G_SC70-5 CV224 NL17SZ08DFT2G_SC70-5 10K_0402_5% CV196

PLT_RST# 1 GC6_FB_EN1V8 2 D
0.1U_0201_10V6K VGA@ 0.22U_0402_16V7K
G VCC
G
<17,39,41> PLT_RST# B 4 2 RV99 @ 1 SYS_PEX_RST_MON# 1@ 1
S VGA@ VGA@
DGPU_HOLD_RST# 2 Y 0_0402_5% DV6 2 1
<20> DGPU_HOLD_RST# VGA_CORE_PG <58>
1
A
1
4 QV6B VGA@ 4
+1.8VSDGPU_AON RV15 PJT138KA 2N SOT363-6 1.A Modify RB751S40T1G_SOD523-2
3
VGA@ 10K_0402_5%
+1.8VSDGPU_AON VGA_CORE_S_PG <59>
RV14 @ RV109
1
0_0402_5% 1 2 +3VS
2
UV3 RV100 Thermal shutdown protection 10K_0402_5%

5
@ NL17SZ08DFT2G_SC70-5 10K_0402_5% VGA@

1
VGA@
VCC
SYS_PEX_RST_MON# 1
2
IN B 4 PLTRST_VGA#_1V8
GPU_PEX_RST_HOLD# 2 OUT Y
GND
IN A Security Classification Compal Secret Data

RV16 1 2 @ 100K_0402_5% 2016/01/29 2017/01/10 Title
N17P PEG 1/7
3
CV200 1 2 @ 0.1U_0201_10V6K
Custom 1A
A B C D E
A B C D E
GDDR5 Mode H Mapping

UV1B UV1C
<28> FBA_D[63..0] FBA_CMD[31..0] <28> <29> FBB_D[63..0] FBB_CMD[31..0] <29> DATA Bus
Part 2 of 7 Part 3 of 7
FBA_D0 FBA_CMD0 FBB_D0 FBB_CMD0 Address
FBA_D1
L28
FBA_D0 FBA_CMD0
U30
FBA_CMD1 FBB_D1
G9
FBB_D0 FBB_CMD0
D13
FBB_CMD1
0..31 32..63
M29 T31 E9 E14
FBA_D2 FBA_D1 FBA_CMD1 FBA_CMD2 FBB_D2 FBB_D1 FBB_CMD1 FBB_CMD2
FBA_D3
L29
FBA_D2 FBA_CMD2
U29
FBA_CMD3 FBB_D3
G8
FBB_D2 FBB_CMD2
F14
FBB_CMD3
CMD0 CS#
M28 R34 F9 A12
FBA_D5
N31
FBA_D4 FBA_CMD4
R33
FBA_CMD5 FBB_D5
F11
FBB_D4 FBB_CMD4
B12
FBB_CMD5
CMD1 A3_BA3
P29 U32 G11 C14
FBA_D7
R29
FBA_D6 FBA_CMD6
U33
FBA_CMD7 FBB_D7
F12
FBB_D6 FBB_CMD6
B14
FBB_CMD7
CMD2 A2_BA0
P28 U28 G12 G15
FBA_D9
J28
FBA_D8 FBA_CMD8
V28
FBA_CMD9 FBB_D9
G6
FBB_D8 FBB_CMD8
F15
FBB_CMD9
CMD3 A4_BA2
H29 V29 F5 E15
1 FBA_D10 FBA_D9 FBA_CMD9 FBA_CMD10 FBB_D10 FBB_D9 FBB_CMD9 FBB_CMD10 1
FBA_D11
J29
FBA_D10 FBA_CMD10
V30
FBA_CMD11 FBB_D11
E6
FBB_D10 FBB_CMD10
D15
FBB_CMD11
CMD4 A5_BA1
H28 U34 F6 A14
FBA_D13
G29
FBA_D12 FBA_CMD12
U31
FBA_CMD13 FBB_D13
F4
FBB_D12 FBB_CMD12
D14
FBB_CMD13
CMD5 WE#
E31 V34 G4 A15
FBA_D15
E32
FBA_D14 FBA_CMD14
V33
FBA_CMD15 FBB_D15
E2
FBB_D14 FBB_CMD14
B15
FBB_CMD15
CMD6 A7_A8
F30 Y32 F3 C17
FBA_D17
C34
FBA_D16 FBA_CMD16
AA31
FBA_CMD17 FBB_D17
C2
FBB_D16 FBB_CMD16
D18
FBB_CMD17
CMD7 A6_A11
D32 AA29 D4 E18
FBA_D19
B33
FBA_D18 FBA_CMD18
AA28
FBA_CMD19 FBB_D19
D3
FBB_D18 FBB_CMD18
F18
FBB_CMD19
CMD8 ABI#
C33 AC34 C1 A20
FBA_D21
F33
FBA_D20 FBA_CMD20
AC33
FBA_CMD21 FBB_D21
B3
FBB_D20 FBB_CMD20
B20
FBB_CMD21
CMD9 A12_RFU
F32 AA32 C4 C18
FBA_D23
H33
FBA_D22 FBA_CMD22
AA33
FBA_CMD23 FBB_D23
B5
FBB_D22 FBB_CMD22
B18
FBB_CMD23
CMD10 A0_A10
H32 Y28 C5 G18
FBA_D25
P34
FBA_D24 FBA_CMD24
Y29
FBA_CMD25 FBB_D25
A11
FBB_D24 FBB_CMD24
G17
FBB_CMD25
CMD11 A1_A9
P32 W31 C11 F17
FBA_D27
P31
FBA_D26 FBA_CMD26
Y30
FBA_CMD27 FBB_D27
D11
FBB_D26 FBB_CMD26
D16
FBB_CMD27
CMD12 RAS#
P33 AA34 B11 A18
MEMORY INTERFACE B
FBA_D29
L31
FBA_D28 FBA_CMD28
Y31
FBA_CMD29 FBB_D29
D8
FBB_D28 FBB_CMD28
D17
FBB_CMD29
CMD13 RST#
L34 Y34 A8 A17
FBA_D31
L32
FBA_D30 FBA_CMD30
Y33
FBA_CMD31 FBB_D31
C8
FBB_D30 FBB_CMD30
B17
FBB_CMD31
CMD14 CKE#
L33 V31 B8 E17
FBA_D32 FBA_D31 FBA_CMD31 FBB_D32 FBB_D31 FBB_CMD31
FBA_D33
AG28
FBA_D32 FBA_CMD32
R28
FBB_D33
F24
FBB_D32 FBB_CMD32
G14 CMD15 CAS#
AF29 AC28 G23 G20
FBA_D34 FBA_D33 FBA_CMD33 FBA_DEBUG0 FBB_D34 FBB_D33 FBB_CMD33 FBB_DEBUG0
MEMORY INTERFACE
FBA_D35
AG29
FBA_D34 FBA_CMD34
R32
FBA_DEBUG1
@TV1
FBB_D35
E24
FBB_D34 FBB_CMD34
C12
FBB_DEBUG1
@TV2 CMD16 CS#
AF28 AC32 @TV3 G24 C20 @TV4
FBA_D36 FBA_D35 FBA_CMD35 FBB_D36 FBB_D35 FBB_CMD35
FBA_D37
AD30
FBA_D36 FBB_D37
D21
FBB_D36 CMD17 A3_BA3
AD29 E21
FBA_D38 FBA_D37 FBB_D38 FBB_D37
FBA_D39
AC29
FBA_D38 FBB_D39
G21
AD28 F21
FBA_D41
AJ29
FBA_D40 FBB_D41
G27
AK29 D27
2 FBA_D43
AJ30
FBA_D42 FBB_D43
G26
FBB_D42 CMD20 A5_BA1 2
AK28 E27
FBA_D45
AM29
FBA_D44 FBB_D45
E29
FBB_D44 CMD21 WE#
AM31 R30 F29 D12
FBA_D46 FBA_D45 FBA_CLK0 FBA_CLKA0 <28> FBB_D46 FBB_D45 FBB_CLK0 FBB_CLKA0 <29>
FBA_D47
AN29
FBA_D46 FBA_CLK0_N
R31
FBA_CLKA0# <28> FBB_D47
E30
FBB_D46 FBB_CLK0_N
E12
FBB_CLKA0# <29> CMD22 A7_A8
AM30 AB31 D30 E20
FBA_D48 FBA_D47 FBA_CLK1 FBA_CLKA1 <28> FBB_D48 FBB_D47 FBB_CLK1 FBB_CLKA1 <29>
FBA_D49
AN31
FBA_D48 FBA_CLK1_N
AC31
FBA_CLKA1# <28> FBB_D49
A32
FBB_D48 FBB_CLK1_N
F20
FBB_CLKA1# <29> CMD23 A6_A11
AN32 C31
FBA_D49 FBB_D49
A
FBA_D50 FBB_D50
FBA_D51
AP30
FBA_D50 FBB_D51
C32
FBB_D50 CMD24 ABI#
AP32 B32
FBA_D53
AM33
FBA_D52 FBA_WCK01
K31
FBA_WCK01 <28> FBB_D53
D29
FBB_D52 FBB_WCK01
F8
FBB_WCK01 <29> CMD25 A12_RFU
AL31 L30 A29 E8
FBA_D54 FBA_D53 FBA_WCK01_N FBA_WCK01# <28> FBB_D54 FBB_D53 FBB_WCK01_N FBB_WCK01# <29>
FBA_D55
AK33
FBA_D54 FBA_WCK23
H34
C29
FBB_D54 FBB_WCK23
A5
FBB_WCK23 <29> CMD26 A0_A10
AK32 J34 B29 A6
FBA_D57
AD34
FBA_D56 FBA_WCK45
AG30
B21
FBB_D56 FBB_WCK45
D24
FBB_WCK45 <29> CMD27 A1_A9
AD32 AG31 C23 D25
FBA_D59
AC30
FBA_D58 FBA_WCK67
AJ34
A21
FBB_D58 FBB_WCK67
B27
FBB_WCK67 <29> CMD28 RAS#
AD33 AK34 C21 C27
FBA_D61
AF31
FBA_D60 FBB_D61
B24
FBB_D60 CMD29 RST#
AG34 C24
FBA_D63
AG32
FBA_D62 FBB_D63
B26
FBB_D62 CMD30 CKE#
AG33 J30 C26 D6
FBA_D63 FBA_WCKB01 FBB_D63 FBB_WCKB01
28> FBA_DBI[7..0] FBA_DBI0 FBA_WCKB01_N
J31
<29> FBB_DBI[7..0] FBB_DBI0 FBB_WCKB01_N
D7 CMD31 CAS#
P30 J32 E11 C6
FBA_DBI1 F31 FBA_DQM0 FBA_WCKB23 J33 FBB_DBI1 E3 FBB_DQM0 FBB_WCKB23 B6
FBA_DBI2 F34 FBA_DQM1 FBA_WCKB23_N AH31 FBB_DBI2 A3 FBB_DQM1 FBB_WCKB23_N F26
FBA_DBI3 M32 FBA_DQM2 FBA_WCKB45 AJ31 FBB_DBI3 C9 FBB_DQM2 FBB_WCKB45 E26
FBA_DBI4 AD31 FBA_DQM3 FBA_WCKB45_N AJ32 FBB_DBI4 F23 FBB_DQM3 FBB_WCKB45_N A26
FBA_DBI5 AL29 FBA_DQM4 FBA_WCKB67 AJ33 FBB_DBI5 F27 FBB_DQM4 FBB_WCKB67 A27
FBA_DBI6 AM32 FBA_DQM5 FBA_WCKB67_N FBB_DBI6 C30 FBB_DQM5 FBB_WCKB67_N
FBA_DBI7 AF34 FBA_DQM6 FBB_DBI7 A24 FBB_DQM6
FBA_DQM7 +1.8VSDGPU_MAIN FBB_DQM7
28> FBA_EDC[7..0] FBA_EDC0 GPU_BUFRST# <29> FBB_EDC[7..0] FBB_EDC0
M31 E1 @TV9 D10
FBA_EDC1 G31 FBA_DQS_WP0 BUFRST_N FBB_EDC1 D5 FBB_DQS_WP0
3 FBA_EDC2 E33 FBA_DQS_WP1 FBB_EDC2 C3 FBB_DQS_WP1 3
FBA_EDC3 M33 FBA_DQS_WP2 VGA@ FBB_EDC3 B9 FBB_DQS_WP2
FBA_EDC4 AE31 FBA_DQS_WP3 K27 +FB_PLLAVDD 2 1 LV3 FBB_EDC4 E23 FBB_DQS_WP3 H17 +FB_PLLAVDD
FBA_EDC5 AK30 FBA_DQS_WP4 FB_REFPLL_AVDD FBB_EDC5 FBB_DQS_WP4 FBB_PLL_AVDD
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
1 1 1 CHILISIN PBY160808T-330Y-N E28 1 1
FBA_EDC6 AN33 FBA_DQS_WP5 FBB_EDC6 FBB_DQS_WP5
22U_0603_6.3V6M
B30
FBA_EDC7 AF33 FBA_DQS_WP6 CV9 CV10 CV11 FBB_EDC7 A23 FBB_DQS_WP6 CV12 CV7
FBA_DQS_WP7 U27 VGA@ VGA@ VGA@ FBB_DQS_WP7 VGA@ VGA@
M30 FBA_PLL_AVDD 2 2 2 D9 2 2
H30 FBA_DQS_RN0 +GPU_PLLVDD E4 FBB_DQS_RN0
E34 FBA_DQS_RN1 B2 FBB_DQS_RN1
M34 FBA_DQS_RN2 H26 A9 FBB_DQS_RN2
AF30 FBA_DQS_RN3 GPCPLL_AVDD D22 FBB_DQS_RN3
AK31 FBA_DQS_RN4 D28 FBB_DQS_RN4
FBA_DQS_RN5 Near Near FBB_DQS_RN5
AM34 U27 K27 A30 Near
AF32 FBA_DQS_RN6 B23 FBB_DQS_RN6
FBA_DQS_RN7 FBB_DQS_RN7 H17
GP107-ES-A1_BGA908 GP107-ES-A1_BGA908
@ @
+GPU_PLLVDD +1.35VSDGPU
+1.35VSDGPU
FBA_CMD14 2 VGA@ 1
FBB_CMD14
CV195
0.1U_0201_10V6K
CV194
0.1U_0201_10V6K
CV124
0.1U_0201_10V6K
RV87 10K_0402_5% 2 VGA@ 1

FBA_CMD30 2 VGA@ 1 RV91 10K_0402_5%
1 1 1 CKE FBB_CMD30
RV88 10K_0402_5% signal 2 VGA@ 1
RV92 10K_0402_5%
VGA@
VGA@
VGA@
2 2 2 FBA_CMD13 2 VGA@ 1
RV89 10K_0402_5% FBB_CMD13 2 VGA@ 1
FBA_CMD29 2 VGA@ 1 RV93 10K_0402_5%
4 RST 4
RV90 10K_0402_5% FBB_CMD29 2 VGA@ 1
signal
Near RV94 10K_0402_5%
H26

N17P VRAM 2/7
Custom 1A
A B C D E
A B C D E
UV1D
Part 4 of 7
AL6
IFPA_L0 +1.8VSDGPU_AON
MULTI LEVELFor N17x
AK6 AC6
AN5 IFPA_L0_N
IFPA_L1
NC
NC
AJ28 STRAPS
AM5 AJ4
AP3 IFPA_L1_N NC AJ5
AN3 IFPA_L2 NC AL11 strap0 strap1 strap2 strap3 strap4 strap5
AM6 IFPA_L2_N NC C15
IFPA_L3 NC
2
AN6 D19 RV26 RV27 RV28 RV29 RV30 RV78 RV31 RV32 RV33
IFPA_L3_N NC D20 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5%
NC
1 NC 1
D23 @ @ @ X76@ @ @ X76@ X76@ X76@
AN8 NC D26
AM8 IFPB_L0 NC V32
1
AM7 IFPB_L0_N NC
AL7 IFPB_L1
AP6 IFPB_L1_N STRAP0
AP5 IFPB_L2 STRAP1 ROM_SI
AJ9 IFPB_L2_N STRAP2 ROM_SO
AH9 IFPB_L3 STRAP3 ROM_SCLK
IFPB_L3_N STRAP4
H31 STRAP5
AK1 FB_VREF
<31> GPU_HDMI_TX2P IFPC_L0
2
AJ1
<31> GPU_HDMI_TX2N IFPC_L0_N
2
AJ3 L4 VCCSENSE_VGA RV34 RV35 RV36 RV37 RV38 RV79 RV39 RV40 RV41
HDMI <31>
<31>
<31>
GPU_HDMI_TX1P
GPU_HDMI_TX1N
GPU_HDMI_TX0P
AJ2
AH3
AH4
IFPC_L1
IFPC_L1_N
IFPC_L2
VDD_SENSE
L5 VSSSENSE_VGA
VCCSENSE_VGA <58> 100K_0402_5%
@
100K_0402_5%
@
100K_0402_5%
@
100K_0402_5%
@
100K_0402_5% 100K_0402_5%
X76@ X76@
100K_0402_5%
@
100K_0402_5%
@
100K_0402_5%
@
2.0 <31> GPU_HDMI_TX0N VSSSENSE_VGA <58>
1
AG5 IFPC_L2_N GND_SENSE
<31> GPU_HDMI_TXCP
1
AG4 IFPC_L3
<31> GPU_HDMI_TXCN IFPC_L3_N
AM1
AM2 IFPD_L0
AM3 IFPD_L0_N TEST
AM4 IFPD_L1 AK11 TESTMODE RV42 1 VGA@ 2 10K_0402_5%
AL3 IFPD_L1_N NVJTAG_SEL
AL4 IFPD_L2 AM10 JTAG_TCK_VGA @TV5
AK4 IFPD_L2_N JTAG_TCK AM11 JTAG_TDI @TV6
AK5 IFPD_L3 JTAG_TDI AP12 JTAG_TDO @TV7
IFPD_L3_N JTAG_TDO AP11 JTAG_TMS @TV8
JTAG_TMS AN11 JTAG_RST RV43 1 VGA@ 210K_0402_5%
AD2 JTAG_TRST_N
IFPE_L0
LVDS/TMDS
AD3
2 AD1 IFPE_L0_N 2
AC1 IFPE_L1
AC2 IFPE_L1_N
AC3 IFPE_L2
AC4 IFPE_L2_N SERIAL
AC5 IFPE_L3 H6
IFPE_L3_N ROM_CS_N H4 ROM_SCLK
ROM_SCLK H5 ROM_SI
AE3 ROM_SI H7 ROM_SO
AE4 IFPF_L0 ROM_SO
AF4 IFPF_L0_N
AF5 IFPF_L1
AD4 IFPF_L1_N
AD5 IFPF_L2
AG1 IFPF_L2_N
AF1 IFPF_L3 GENERAL
IFPF_L3_N
AJ6 M1 VGA_OVERT#
IFPA_AUX_SCL OVERT VGA_OVERT# <23>
AH6
IFPA_AUX_SDA_N
AK8
AL8 IFPB_AUX_SCL
IFPB_AUX_SCL_N
AG3 J2 STRAP0
<31> GPU_HDMI_CTRLCLK IFPC_AUX_SCL STRAP0
AG2 J7 STRAP1
<31> GPU_HDMI_CTRLDAT IFPC_AUX_SDA_N STRAP1 J6 STRAP2
AK3 STRAP2 J5 STRAP3
AK2 IFPD_AUX_SCL STRAP3 J3 STRAP4
IFPD_AUX_SDA_N STRAP4 J1 STRAP5
AB3 STRAP5
AB4 IFPE_AUX_SCL
IFPE_AUX_SDA_N K3
3 AF3 THERMDP K4 3
AF2 IFPF_AUX_SCL THERMDN
IFPF_AUX_SDA_N
GP107-ES-A1_BGA908
@
SMB_ATL_ADDR
* LOW Single GPU

High Dual GPU
DEVID_SEL
* LOW Orig. Device ID

High Support G-Sync GPUID
VGA_DEVICE
LOW
High
3D Device
VGA Device
HDMI audio output
*
4 4
PCIE_CFG
* LOW Normal signal swing

High Reduce the signal amplitude

N17P STRAP 3/7
Custom 1A
A B C D E
A B C D E
+1.35VSDGPU
Under
CHA GPU
/6*1uF+2*10uF 1*22uF+1*10uF+2*4.7uF+4*1uF
1 1 1 1 1 1 1 1 Under Near
1U_0402_6.3V6K GPU GPU
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
CV18 CV19 CV20 CV21 CV22 CV23 CV24 CV26 +1.0VSDGPU
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2 2 2 2 2 2 2 2
1 1 1 1 1 1 1
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
CV134 CV13 CV14 CV33 CV29 CV16 CV28
22U_0603_6.3V6M
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ CV34
2 2 2 2 2 2 2 VGA@
1 2 1
UV1E
CHB Part 5 of 7
/6*1uF+2*10uF
AA27 AG19
AA30 FBVDDQ_0 PEX_DVDD AG21
AB27 FBVDDQ_1 PEX_DVDD AG22
1 1 1 1 1 1 1 1 FBVDDQ_2 PEX_DVDD
AB33 AG24
FBVDDQ_3 PEX_DVDD
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
CV126 CV127 CV128 CV129 CV130 CV131 CV132 CV133 AC27 AH21
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ AD27 FBVDDQ_4 PEX_DVDD AH25
2 2 2 2 2 2 2 2 AE27 FBVDDQ_5 PEX_DVDD
FBVDDQ_6 1*22uF+2*10uF+2*4.7uF+4*1uF
AF27
AG27 FBVDDQ_7 AG13
B13 FBVDDQ_8 PEX_HVDD AG15
FBVDDQ_9 PEX_HVDD Under Near
B19 AG16 GPU GPU +1.8VSDGPU_MAIN
E13 FBVDDQ_11 PEX_HVDD AG18
E19 FBVDDQ_12 PEX_HVDD AG25
FBVDDQ_14 PEX_HVDD 1 1 1 1 1 1 1 1 1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
H10 AH15 CV137 CV136 CV25 CV15 CV17 CV32 CV30 CV27 CV31
H11 FBVDDQ_15 PEX_HVDD AH18
H12 FBVDDQ_16 PEX_HVDD AH26 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
H13 FBVDDQ_17 PEX_HVDD AH27 2 2 2 2 2 2 2 2 2
GPU FBVDDQ_18 PEX_HVDD
/5*22uF+2*10uF H14 AJ27
H18 FBVDDQ_19 PEX_HVDD AK27
H19 FBVDDQ_22 PEX_HVDD AL27
1 1 1 1 1 1 1 FBVDDQ_23 PEX_HVDD
H20 AM28
POWER
FBVDDQ_24 PEX_HVDD
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
CV37 CV38 CV202 CV36 CV39 CV40 CV41 H21 AN28
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ H22 FBVDDQ_25 PEX_HVDD
2 2 2 2 2 2 2 H23 FBVDDQ_26
H24 FBVDDQ_27
H8 FBVDDQ_28 AH12
FBVDDQ_29 PEX_PLL_HVDD +1.8VSDGPU_MAIN
H9 1
FBVDDQ_30
0.1U_0201_10V6K
L27
M27 FBVDDQ_31 CV43
2 N27 FBVDDQ_32 AG12 VGA@ 2
Place close to FBVDDQ_33 NC 2
Near
GPU P27 AG26 GPU
R27 FBVDDQ_34 NC AG7
T27 FBVDDQ_35 NC AN2
FBVDDQ_36 NC 2*4.7uF+1*1uF+2*0.1uF
T30 +1.8VSDGPU_AON
T33 FBVDDQ_37
1 1 1 1 1 1 1 FBVDDQ_38
Y27 1 1 1 1
FBVDDQ_43
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
4.7U_0402_6.3V6M
CV217 CV218 CV219 CV220 CV221 CV222 CV223
1U_0402_6.3V6K
@ @ @ @ @ @ @ J8 CV135 CV49 CV51 CV50
2 2 2 2 2 2 2 1V8_AON K8 VGA@ VGA@ VGA@ VGA@
1V8_AON L8 2 2 2 2
B16 VDD18 M8
E16 FBVDDQ VDD18
H15 FBVDDQ
H16 FBVDDQ
V27 FBVDDQ AH8
near GPU for NV update spec 1210 FBVDDQ IFPAB_PLLVDD Under Near
W27 AJ8 GPU GPU
W30 FBVDDQ IFPAB_RSET
+1.35VSDGPU FBVDDQ 2*4.7uF+1*1uF+2*0.1uF
W33 +1.8VSDGPU_MAIN
FBVDDQ AF7
IFPCD_PLLVDD
2
AF8 2 1 1 1 1 1
IFPCD_RSET
0.1U_0201_10V6K
0.1U_0201_10V6K
4.7U_0402_6.3V6M
RV45 RG38 1K_0402_1%
1U_0402_6.3V6K
@ 0_0402_5% CV52 CV53 CV54 CV55
AB8 VGA@ VGA@ VGA@ VGA@
IFPEF_PLLVDD AD6 2 1 2 2 2 2
1
FB_VDDQ_SENSE F1 IFPEF_RSET RG182 1K_0402_1%

<56> FB_VDDQ_SENSE FB_VDDQ_SENSE
TV10@ FB_GND_SENSE F2 Under

PROBE_FB_GND
GPU Near
AG8 GPU
RV47 1 VGA@ 2 40.2_0402_1% FB_CAL_PD_VDDQ J27 IFP_IOVDD AG9
+1.35VSDGPU FB_CAL_PD_VDDQ IFP_IOVDD AG6
3 IFP_IOVDD AF6 3
FB_CAL_PU_GND IFP_IOVDD +GPU_PLLVDD
RV48 1 VGA@ 2 40.2_0402_1% H27 AC7
FB_CAL_PU_GND IFP_IOVDD AC8
IFP_IOVDD 1 1
0.1U_0201_10V6K
0.1U_0201_10V6K
1 VGA@2 FB_CAL_TERM_GND H25 CV215 CV216
RV49 60.4_0402_1% FB_CAL_TERM_GND VGA@ VGA@
2 2
Under GPU
1 per ball
GP107-ES-A1_BGA908 3*4.7uF+3*1uF+6*0.1uF
@
+1.0VSDGPU
1 1 1 1 1 1
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CV214 CV213 CV212 CV205 CV204 CV203
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2 2 2 2 2 2
Near
GPU
1 1 1 1 1 1
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
CV210 CV211 CV209 CV208 CV207 CV206
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
4
2 2 2 2 2 2 4
Under GPU 1
per ball
N17P POWER 4/7
Custom 1A
A B C D E
A B C D E
N17P VDDS UV1F

1uF*5/4.7uF*5 (under GPU)
330uF*1/22uF*3/10uF*2/4.7uF*2 Part 6 of 7
A2 D2
AA17 GND_0 GND_100 D31
AA18 GND_1 GND_101 D33
AA20 GND_2 GND_102 E10
AA22 GND_3 GND_103 E22
AB12 GND_4 GND_104 E25
UV1G AB14 GND_5 GND_105 E5
AB16 GND_6 GND_106 E7
+VGA_CORE +VGA_CORE_S AB19 GND_7 GND_107 F28
AA14 Part 7 of 7 P23 AB2 GND_8 GND_108 F7
AA21 VDD_1 VDDS P19 AB21 GND_9 GND_109 G10
AB13 VDD_4 VDDS AA12 A33 GND_10 GND_110 G13
1 AB15 VDD_6 VDDS AA16 AB23 GND_11 GND_111 G16 1
AB17 VDD_7 VDDS AA19 AB28 GND_12 GND_112 G19
AB18 VDD_8 VDDS AA23 AB30 GND_13 GND_113 G2
AB20 VDD_9 VDDS AC14 AB32 GND_14 GND_114 G22
AB22 VDD_10 VDDS AC21 AB5 GND_15 GND_115 G25
AC12 VDD_11 VDDS M14 AB7 GND_16 GND_116 G28
AC16 VDD_12 VDDS M21 AC13 GND_17 GND_117 G3
AC19 VDD_14 VDDS P12 AC15 GND_18 GND_118 G30
AC23 VDD_15 VDDS P16 AC17 GND_19 GND_119 G32
M12 VDD_17 VDDS W21 AC18 GND_20 GND_120 G33
M16 VDD_18 VDDS W14 AA13 GND_21 GND_121 G5
M19 VDD_20 VDDS V18 AC20 GND_22 GND_122 G7
M23 VDD_21 VDDS U17 AC22 GND_23 GND_123 K2
N13 VDD_23 VDDS T21 AE2 GND_24 GND_124 K28
N15 VDD_24 VDDS T14 AE28 GND_25 GND_125 K30
N17 VDD_25 VDDS AE30 GND_26 GND_126 K32
N18 VDD_26 AE32 GND_27 GND_127 K33
N20 VDD_27 U1 VCCSENSE_VGA_S AE33 GND_28 GND_128 K5
N22 VDD_28 VDDS_SENSE U2 VSSSENSE_VGA_S VCCSENSE_VGA_S <59> AE5 GND_29 GND_129 K7
POWER
VDD_29 GNDS_SENSE VSSSENSE_VGA_S <59> GND_30 GND_130
P14 AE7 M13
P21 VDD_31 AH10 GND_31 GND_131 M15
R13 VDD_34 +VGA_CORE AA15 GND_32 GND_132 M17
R15 VDD_36 U4 AH13 GND_33 GND_133 M18
R17 VDD_37 XVDD U5 AH16 GND_34 GND_134 M20
R18 VDD_38 XVDD U6 AH19 GND_35 GND_135 M22
R20 VDD_39 XVDD U7 AH2 GND_36 GND_136 N12
R22 VDD_40 XVDD U8 AH22 GND_37 GND_137 N14
T12 VDD_41 XVDD V1 AH24 GND_38 GND_138 N16
U13 VDD_47 XVDD V5 AH32 GND_42 GND_142 N23
GND
U22 VDD_52 XVDD W2 AJ7 GND_46 GND_146 N33
2 VDD_53 XVDD GND_47 GND_147 2
V13 W3 AK10 N5
V15 VDD_54 XVDD W4 AK7 GND_48 GND_148 N7
V17 VDD_55 XVDD W5 AL12 GND_49 GND_149 P13
W12 VDD_59 XVDD AL17 GND_52 GND_152 P18
W16 VDD_60 AL18 GND_53 GND_153 P20
W19 VDD_62 Y1 AL2 GND_54 GND_154 P22
W23 VDD_63 XVDD Y2 AL20 GND_55 GND_155 R12
Y13 VDD_65 XVDD Y3 AL21 GND_56 GND_156 R14
Y22 VDD_70 XVDD Y8 AL30 GND_61 GND_161 T13
VDD_71 XVDD AL32 GND_62 GND_162 T15
AL33 GND_63 GND_163 T17
AA1 AL5 GND_64 GND_164 T18
XVDD AA2 AM13 GND_65 GND_165 T2
XVDD AA5 AM22 GND_68 GND_168 AG11
XVDD AA7 AN1 GND_70 GND_170 T32
XVDD AA8 AN10 GND_71 GND_171 T5
XVDD AN13 GND_72 GND_172 T7
AN16 GND_73 GND_173 U12
AN19 GND_74 GND_174 U14
AN22 GND_75 GND_175 U16
GP107-ES-A1_BGA908 AN25 GND_76 GND_176 U19
AN30 GND_77 GND_177 U21
@ GND_78 GND_178
AN34 U23
AN4 GND_79 GND_179 V12
AN7 GND_80 GND_180 V14
+1.8V_AON/+1.8V_MAIN +1.0VSDGPU AP2 GND_81 GND_181 V16

AP33 GND_82 GND_182 V19
3 3
B1 GND_83 GND_183 V21
GND_84 GND_184
2
VGA@ B10 V23
+1.8VSDGPU_AON +1.8VSDGPU_AON R39 B22 GND_85 GND_185 W13
UG27 B25 GND_86 GND_186 W15
20_0402_5% GND_87 GND_187
+1.8VS 1 14 B28 W17
VIN1 VOUT1 GND_88 GND_188
1
2 13 B31 W18
6 1
10U_0603_6.3V6M
@ RG179 CG335 220P_0402_50V8J B34 W20

10K_0402_5% 1V8_AON_EN_R 3 12 1 2 B4 GND_90 GND_190 W22
ON1 CT1 1 GND_91 GND_191
+5VS
CG334
VGA@ B7 W28
4 11 Q17A C10 GND_92 GND_192 Y12
VGA@
2
VBIAS GND CG336 220P_0402_50V8J VGA@ 2 C13 GND_93 GND_193 Y14

DMN65D8LDW-7_SOT363-6 GND_94 GND_194
5 10 1 2 2 +5VS C19 Y16
<23> 1.8VSDGPU_MAIN_EN +1.8VS ON2 CT2 +1.8VSDGPU_MAIN GND_95 GND_195
C22 Y19
1
6 9 C25 GND_96 GND_196 Y21
1 VGA@
2
CG337 7 8 VGA@ C28 Y23

10U_0603_6.3V6M
0.1U_0201_10V6K R214 C7 AH11

VGA@ 15 100K_0402_5% +VGA_CORE_S GND_99 GND_199 C16
GPAD 1 GND_OPT
2 +1.8VS
CG338
W32
GND_OPT
EM5209VF_DFN14_2X3 1.0 Modify
1
GPUCORE_EN#
VGA@ 1
VGA@ 2
22U_0603_6.3V6M
VGA@
R40
1
3
CG339
VGA@ 1_0805_1% GP107-ES-A1_BGA908

@
2
1 2
GPUCORE_EN 5
<23> GPUCORE_EN D
Q16
DMN65D8LDW-7_SOT363-6 2 L2N7002SWT1G 1N SC-70-3
4
Q17B G VGA@
VGA@ S
3
4
For Power down sequence 4
DV1
DGPU_PWR_EN 2 1 1V8_AON_EN_R
<20,23> DGPU_PWR_EN
RB751S40T1G_SOD523-2
VGA@
1 2
RV22
49.9K_0402_5%
1 Security Classification Compal Secret Data Compal Electronics, Inc.
VGA@ CV35 2016/01/29 2017/01/10 Title
0.1U_0201_10V6K
1.0 Modify 2 VGA@
N17P POWER & GND 5/7
Custom 1A
A B C D E
A B C D E
MF=1
<24> FBA_D[63:0]
MF=0
UV4B 2 OF 2 +1.35VSDGPU UV5B 2 OF 2
K4 A4 FBA_D0 K4 A4 FBA_D56
<24> FBA_CMD6 A8/A7 DQ0 <24> FBA_CMD26 A8/A7 DQ0
1
H5 A2 FBA_D1 H5 A2 FBA_D57
<24> FBA_CMD11 A9/A1 DQ1 FBA_D2 <24> FBA_CMD23 A9/A1 DQ1 FBA_D58
H4 B4 RV50 H4 B4
K5 B2 549_0402_1% K5 B2
J5 E4 VGA@ J5 E4
<24> FBA_CMD9 A12/RFU#J5/NC#J5 DQ4 FBA_D5 <24> FBA_CMD25 A12/RFU#J5/NC#J5 DQ4 FBA_D61
E2 RV51 E2
2
H11 DQ5 F4 FBA_D6 931_0402_1% H11 DQ5 F4 FBA_D62
1 <24> FBA_CMD2 BA0/A2 DQ6 FBA_D7 FBA0_VREFC <24> FBA_CMD19 BA0/A2 DQ6 FBA_D63 1
K10 F2 1 2 K10 F2
<24> FBA_CMD4 BA1/A5 DQ7 FBA_D8 <24> FBA_CMD17 BA1/A5 DQ7 FBA_D48
K11 A11 K11 A11
<24> FBA_CMD3 BA2/A4 DQ8 FBA_D9 <24> FBA_CMD18 BA2/A4 DQ8 FBA_D49
H10 A13 VGA@ H10 A13
<24> FBA_CMD1 BA3/A3 DQ9 <24> FBA_CMD20 BA3/A3 DQ9
1
B11 FBA_D10 B11 FBA_D50
J4 DQ10 B13 FBA_D11 RV52 J4 DQ10 B13 FBA_D51
<24> FBA_CMD8 ABI# DQ11 FBA_D12 <24> FBA_CMD24 ABI# DQ11 FBA_D52
G3 E11 1.33K_0402_1% G3 E11
<24> FBA_CMD12 RAS# DQ12 FBA_D13 <24> FBA_CMD31 RAS# DQ12 FBA_D53
G12 E13 G12 E13
<24> FBA_CMD0 CS# DQ13 FBA_D14 <24> FBA_CMD21 CS# DQ13 FBA_D54
L3 F11 VGA@ L3 F11
<24> FBA_CMD15 <24> FBA_CMD28
2
L12 CAS# DQ14 F13 FBA_D15 L12 CAS# DQ14 F13 FBA_D55
<24> FBA_CMD5 WE# DQ15 FBA_D16 <24> FBA_CMD16 WE# DQ15 FBA_D40
U11 U11
J12 DQ16 U13 FBA_D17 J12 DQ16 U13 FBA_D41
<24> FBA_CLKA0 CK DQ17 FBA_D18 FBA_VREFC_R <24> FBA_CLKA1 CK DQ17 FBA_D42
J11 T11 J11 T11
<24> FBA_CLKA0# CK# DQ18 FBA_D19 <24> FBA_CLKA1# CK# DQ18 FBA_D43
J3 T13 J3 T13
<24> FBA_CMD14 CKE# DQ19 FBA_D20 <24> FBA_CMD30 CKE# DQ19 FBA_D44
N11 +1.35VSDGPU N11
D2 DQ20 N13 FBA_D21 D2 DQ20 N13 FBA_D45
<24> FBA_DBI0 DBI0# DQ21 FBA_D22 <24> FBA_DBI7 DBI0# DQ21 FBA_D46
D13 M11 D13 M11
<24> FBA_DBI1 DBI1# DQ22 <24> FBA_DBI6 DBI1# DQ22
1
P13 M13 FBA_D23 P13 M13 FBA_D47
P2 U4 RV53 P2 U4
U2 549_0402_1% U2
DQ25 DQ25
1
J2 T4 FBA_D26 D J2 T4 FBA_D34
VGA@
<24> FBA_CMD13 RESET# DQ26 FBA_D27 <24> FBA_CMD29 RESET# DQ26 FBA_D35
T2 2 RV54 T2
<23,29> VRAM_VREF_CTL
2
J10 DQ27 N4 FBA_D28 G 931_0402_1% RV55 VGA@ J10 DQ27 N4 FBA_D36
FBA0_ZQ1 J13 SEN DQ28 N2 FBA_D29 VGA@ 1 2 FBA1_VREFC 1K_0402_5% FBA1_ZQ3 J13 SEN DQ28 N2 FBA_D37
S
3
J1 ZQ DQ29 M4 FBA_D30 QV3 1 2 J1 ZQ DQ29 M4 FBA_D38
MF DQ30 FBA_D31 +1.35VSDGPU MF DQ30 FBA_D39
M2 MESS138W-G_SOT323-3 VGA@ M2
DQ31 DQ31
1
D4 D4
<24> FBA_WCK01 WCK01 <24> FBA_WCK67 WCK01
D5 C2 1.0 Modify RV56 D5 C2
<24> FBA_WCK01# WCK01# EDC0 FBA_EDC0 <24> <24> FBA_WCK67# WCK01# EDC0 FBA_EDC7 <24>
C13 1.33K_0402_1% C13
EDC1 FBA_EDC1 <24> EDC1 FBA_EDC6 <24>
P4 R13 P4 R13
<24> FBA_WCK23 WCK23 EDC2 FBA_EDC2 <24> <24> FBA_WCK45 WCK23 EDC2 FBA_EDC5 <24>
P5 R2 VGA@ P5 R2
<24> FBA_WCK23# FBA_EDC3 <24> <24> FBA_WCK45# FBA_EDC4 <24>
2
WCK23# EDC3 WCK23# EDC3
1
1
X76@ X76@
2 VGA@ VGA@ VGA@ VGA@ VGA@ 2
RV57 RV58 RV59 RV60 RV61
1K_0402_5% 121_0402_1% 1K_0402_5% 1K_0402_5% 121_0402_1%
2
2
+1.35VSDGPU
UV4A 1 OF 2 +1.35VSDGPU
UV5A 1 OF 2
C5 B5
C10 VDD VSS B10 C5 B5
D11 VDD VSS D10 C10 VDD VSS B10
G1 VDD VSS G5 D11 VDD VSS D10
VDD VSS FBA_CLKA0 FBA_CLKA0# +1.35VSDGPU VDD VSS
G4 G10 G1 G5
G11 VDD VSS H1 G4 VDD VSS G10
VDD VSS VDD VSS
1
G14 H14 G11 H1
+1.35VSDGPU VDD VSS VDD VSS
L1 K1 RV63 RV95 G14 H14
L4 VDD VSS K14 40.2_0402_1% 40.2_0402_1% L1 VDD VSS K1
VDD VSS 1 1 1 1 1 1 1 VDD VSS
L11 L5 VGA@ VGA@ L4 K14
VDD VSS VDD VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
L14 L10 CV61 CV62 CV63 CV64 CV65 CV66 CV69 L11 L5
2
P11 VDD VSS P10 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ L14 VDD VSS L10
1 1 1 1 1 1 1 VDD VSS VDD VSS
R5 T5 2 2 2 2 2 2 2 P11 P10
VDD VSS 1 VDD VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.01U_0402_16V7K
CV58 CV59 CV67 CV56 CV57 CV60 CV68 R10 T10 VGA@ R5 T5
VDD VSS VDD VSS
CV190
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ R10 T10
2 2 2 2 2 2 2 B1 A1 VDD VSS
B3 VDDQ VSSQ A3 2 B1 A1
B12 VDDQ VSSQ A12 B3 VDDQ VSSQ A3
B14 VDDQ VSSQ A14 B12 VDDQ VSSQ A12
D1 VDDQ VSSQ C1 B14 VDDQ VSSQ A14
VDDQ VSSQ Close to VDDQ VSSQ
D3 C3 VRAM D1 C1
D12 VDDQ VSSQ C4 D3 VDDQ VSSQ C3
D14 VDDQ VSSQ C11 D12 VDDQ VSSQ C4
Close to VDDQ VSSQ 1 1 1 1 1 1 1 VDDQ VSSQ
VRAM E5 C12 D14 C11
VDDQ VSSQ VDDQ VSSQ
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
3 E10 C14 CV77 CV78 CV79 CV80 CV81 CV82 CV83 E5 C12 3
F1 VDDQ VSSQ E1 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ E10 VDDQ VSSQ C14
1 1 1 1 1 1 1 VDDQ VSSQ 2 2 2 2 2 2 2 VDDQ VSSQ
F3 E3 F1 E1
VDDQ VSSQ VDDQ VSSQ
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
CV141 CV142 CV140 CV73 CV74 CV75 CV76 F12 E12 F3 E3

VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ F14 VDDQ VSSQ E14 FBA_CLKA1 FBA_CLKA1# F12 VDDQ VSSQ E12
2 2 2 2 2 2 2 G2 VDDQ VSSQ F5 F14 VDDQ VSSQ E14
VDDQ VSSQ VDDQ VSSQ
1
1
G13 F10 G2 F5
H3 VDDQ VSSQ H2 RV96 RV62 G13 VDDQ VSSQ F10
H12 VDDQ VSSQ H13 40.2_0402_1% 40.2_0402_1% H3 VDDQ VSSQ H2
K3 VDDQ VSSQ K2 VGA@ VGA@ H12 VDDQ VSSQ H13
VDDQ VSSQ Close to VDDQ VSSQ
K12 K13 VRAM K3 K2
2
L2 VDDQ VSSQ M5 K12 VDDQ VSSQ K13

L13 VDDQ VSSQ M10 L2 VDDQ VSSQ M5
Close to VDDQ VSSQ 1 VDDQ VSSQ
0.01U_0402_16V7K
VRAM M1 N1 VGA@ 1 1 1 1 1 1 1 L13 M10

VDDQ VSSQ VDDQ VSSQ
CV191
M3 N3 M1 N1
VDDQ VSSQ VDDQ VSSQ
10U_0402_6.3V6M
10U_0402_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
M12 N12 CV86 CV87 CV143 CV144 CV145 CV147 CV146 M3 N3
M14 VDDQ VSSQ N14 2 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ M12 VDDQ VSSQ N12
1 1 1 1 1 1 1 VDDQ VSSQ 2 2 2 2 2 2 2 VDDQ VSSQ
N5 R1 M14 N14
VDDQ VSSQ VDDQ VSSQ
10U_0402_6.3V6M
10U_0402_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
CV84 CV85 CV70 CV71 CV72 CV138 CV139 N10 R3 N5 R1

VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ P1 VDDQ VSSQ R4 N10 VDDQ VSSQ R3
2 2 2 2 2 2 2 P3 VDDQ VSSQ R11 P1 VDDQ VSSQ R4
P12 VDDQ VSSQ R12 P3 VDDQ VSSQ R11
P14 VDDQ VSSQ R14 P12 VDDQ VSSQ R12
VDDQ VSSQ (3GHz and VDDQ VSSQ
T1 U1 up) P14 R14
T3 VDDQ VSSQ U3 T1 VDDQ VSSQ U1
VDDQ VSSQ Around VDDQ VSSQ
T12 U12 VRAM T3 U3
T14 VDDQ VSSQ U14 T12 VDDQ VSSQ U12
VDDQ VSSQ T14 VDDQ VSSQ U14
Around FBA0_VREFC VDDQ VSSQ
VRAM J14 A5
VREFC VPP/NC#A5 FBA1_VREFC
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
U5 1 1 1 1 1 1 1 1 J14 A5
VPP/NC#U5 VREFC VPP/NC#A5
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 A10 U5
U10 VREFD CV166 CV168 CV167 CV170 CV169 CV172 CV171 CV173 A10 VPP/NC#U5
1 VREFD 1 VREFD
CV161 CV160 CV158 CV162 CV163 CV164 CV159 CV165 CV89 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ U10
2 2 2 2 2 2 2 2 VREFD
820P_0402_50V7K
820P_0402_50V7K
4 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ CV88 4
2 2 2 2 2 2 2 2 X76@ VGA@
2 2 X76@
x32
x32 only
only
N17P GDDR5 CHA 6/7
Custom 1A
A B C D E
A B C D E
MF=1
+1.35VSDGPU
<24> FBB_D[63:0] MF=0 UV7B 2 OF 2
1
UV6B 2 OF 2 K4 A4 FBB_D56
<24> FBB_CMD26 A8/A7 DQ0 FBB_D57
RV64 H5 A2
FBB_D0 <24> FBB_CMD23 A9/A1 DQ1 FBB_D58
K4 A4 549_0402_1% H4 B4
<24> FBB_CMD6 A8/A7 DQ0 FBB_D1 <24> FBB_CMD22 A10/A0 DQ2 FBB_D59
H5 A2 VGA@ K5 B2
<24> FBB_CMD11 A9/A1 DQ1 FBB_D2 <24> FBB_CMD27 A11/A6 DQ3 FBB_D60
H4 B4 RV65 J5 E4
<24> FBB_CMD10 <24> FBB_CMD25
2
K5 A10/A0 DQ2 B2 FBB_D3 931_0402_1% A12/RFU#J5/NC#J5 DQ4 E2 FBB_D61
<24> FBB_CMD7 A11/A6 DQ3 FBB_D4 FBB0_VREFC DQ5 FBB_D62
J5 E4 1 2 H11 F4
1 <24> FBB_CMD9 A12/RFU#J5/NC#J5 DQ4 FBB_D5 <24> FBB_CMD19 BA0/A2 DQ6 FBB_D63 1
E2 K10 F2
DQ5 FBB_D6 <24> FBB_CMD17 BA1/A5 DQ7 FBB_D48
H11 F4 VGA@ K11 A11
<24> FBB_CMD2 BA0/A2 DQ6 <24> FBB_CMD18 BA2/A4 DQ8
1
K10 F2 FBB_D7 H10 A13 FBB_D49
<24> FBB_CMD4 BA1/A5 DQ7 FBB_D8 <24> FBB_CMD20 BA3/A3 DQ9 FBB_D50
K11 A11 RV66 B11
<24> FBB_CMD3 BA2/A4 DQ8 FBB_D9 DQ10 FBB_D51
H10 A13 1.33K_0402_1% J4 B13
<24> FBB_CMD1 BA3/A3 DQ9 FBB_D10 <24> FBB_CMD24 ABI# DQ11 FBB_D52
B11 G3 E11
DQ10 FBB_D11 <24> FBB_CMD31 RAS# DQ12 FBB_D53
J4 B13 VGA@ G12 E13
<24> FBB_CMD8 <24> FBB_CMD21
2
G3 ABI# DQ11 E11 FBB_D12 L3 CS# DQ13 F11 FBB_D54
<24> FBB_CMD12 RAS# DQ12 FBB_D13 <24> FBB_CMD28 CAS# DQ14 FBB_D55
G12 E13 L12 F13
<24> FBB_CMD0 CS# DQ13 FBB_D14 FBB_VREFC_R <24> FBB_CMD16 WE# DQ15 FBB_D40
L3 F11 U11
<24> FBB_CMD15 CAS# DQ14 FBB_D15 DQ16 FBB_D41
L12 F13 J12 U13
<24> FBB_CMD5 WE# DQ15 FBB_D16 <24> FBB_CLKA1 CK DQ17 FBB_D42
U11 J11 T11
DQ16 FBB_D17 <24> FBB_CLKA1# CK# DQ18 FBB_D43
J12 U13 +1.35VSDGPU J3 T13
<24> FBB_CLKA0 CK DQ17 FBB_D18 <24> FBB_CMD30 CKE# DQ19 FBB_D44
J11 T11 N11
<24> FBB_CLKA0# CK# DQ18 FBB_D19 DQ20 FBB_D45
J3 T13 D2 N13
<24> FBB_CMD14 CKE# DQ19 <24> FBB_DBI7 DBI0# DQ21
1
N11 FBB_D20 D13 M11 FBB_D46
DQ20 FBB_D21 <24> FBB_DBI6 DBI1# DQ22 FBB_D47
D2 N13 RV67 P13 M13
<24> FBB_DBI0 DBI0# DQ21 D <24> FBB_DBI5 DBI2# DQ23
1
D13 M11 FBB_D22 549_0402_1% P2 U4 FBB_D32
<24> FBB_DBI1 DBI1# DQ22 FBB_D23 <24> FBB_DBI4 DBI3# DQ24 FBB_D33
P13 M13 2 VGA@ U2
<24> FBB_DBI2 DBI2# DQ23 FBB_D24 <23,28> VRAM_VREF_CTL DQ25 FBB_D34
P2 U4 G RV68 J2 T4
<24> FBB_DBI3 <24> FBB_CMD29
2
DBI3# DQ24 U2 FBB_D25 VGA@ 931_0402_1% RESET# DQ26 T2 FBB_D35
S
3
J2 DQ25 T4 FBB_D26 QV4 1 2 FBB1_VREFC RV69 J10 DQ27 N4 FBB_D36
<24> FBB_CMD13 RESET# DQ26 FBB_D27 FBB1_ZQ3 J13 SEN DQ28 FBB_D37
T2 MESS138W-G_SOT323-3 1K_0402_5% N2
J10 DQ27 N4 FBB_D28 VGA@ 1 2 J1 ZQ DQ29 M4 FBB_D38
SEN DQ28 +1.35VSDGPU MF DQ30
1
FBB0_ZQ1 J13 N2 FBB_D29 M2 FBB_D39
ZQ DQ29 FBB_D30
1.0 Modify DQ31
J1 M4 RV70 VGA@ D4
MF DQ30 FBB_D31 <24> FBB_WCK67 WCK01
M2 1.33K_0402_1% D5 C2
DQ31 <24> FBB_WCK67# WCK01# EDC0 FBB_EDC7 <24>
D4 C13
<24> FBB_WCK01 WCK01 EDC1 FBB_EDC6 <24>
D5 C2 VGA@ P4 R13
<24> FBB_WCK01# FBB_EDC0 <24> <24> FBB_WCK45 FBB_EDC5 <24>
2
WCK01# EDC0 C13 P5 WCK23 EDC2 R2
EDC1 FBB_EDC1 <24> <24> FBB_WCK45# WCK23# EDC3 FBB_EDC4 <24>
P4 R13
<24> FBB_WCK23 WCK23 EDC2 FBB_EDC2 <24>
P5 R2
<24> FBB_WCK23# WCK23# EDC3 FBB_EDC3 <24>
1
X76@
2 VGA@ VGA@ 2
1
X76@ RV71 RV72

VGA@ VGA@ VGA@ 1K_0402_5% 121_0402_1%
RV73 RV74 RV75
2
1K_0402_5% 121_0402_1% 1K_0402_5%
2
+1.35VSDGPU
UV7A 1 OF 2
+1.35VSDGPU C5 B5
1 OF 2 +1.35VSDGPU VDD VSS
UV6A C10 B10
D11 VDD VSS D10
+1.35VSDGPU VDD VSS
C5 B5 G1 G5
C10 VDD VSS B10 G4 VDD VSS G10
D11 VDD VSS D10 G11 VDD VSS H1
VDD VSS 1 1 1 1 1 1 1 VDD VSS
G1 G5 G14 H14
VDD VSS VDD VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 G4 G10 CV90 CV94 CV96 CV97 CV91 CV95 CV98 L1 K1
G11 VDD VSS H1 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ L4 VDD VSS K14
VDD VSS FBB_CLKA0 FBB_CLKA0# 2 2 2 2 2 2 2 VDD VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CV99 CV100 CV101 CV92 CV93 CV102 CV103 G14 H14 L11 L5
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ L1 VDD VSS K1 L14 VDD VSS L10
VDD VSS VDD VSS
1
2 2 2 2 2 2 2 L4 K14 P11 P10
L11 VDD VSS L5 RV76 RV77 R5 VDD VSS T5
L14 VDD VSS L10 40.2_0402_1% 40.2_0402_1% R10 VDD VSS T10
P11 VDD VSS P10 VGA@ VGA@ VDD VSS
R5 VDD VSS T5 B1 A1
2
R10 VDD VSS T10 B3 VDDQ VSSQ A3
VDD VSS Close to VDDQ VSSQ
1 VRAM B12 A12
VDDQ VSSQ
0.01U_0402_16V7K
Close to B1 A1 B14 A14
VDDQ VSSQ VDDQ VSSQ
CV193
VRAM B3 A3 1 1 1 1 1 1 1 D1 C1
B12 VDDQ VSSQ A12 D3 VDDQ VSSQ C3
VDDQ VSSQ 2 VDDQ VSSQ
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1 1 1 1 B14 A14 CV104 CV105 CV106 CV174 CV108 CV109 CV110 D12 C4
D1 VDDQ VSSQ C1 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ D14 VDDQ VSSQ C11
VDDQ VSSQ 2 2 2 2 2 2 2 VDDQ VSSQ
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
CV111 CV112 CV113 CV114 CV115 CV116 CV117 D3 C3 E5 C12

3 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ D12 VDDQ VSSQ C4 E10 VDDQ VSSQ C14 3
2 2 2 2 2 2 2 D14 VDDQ VSSQ C11 F1 VDDQ VSSQ E1
E5 VDDQ VSSQ C12 F3 VDDQ VSSQ E3
VDDQ VSSQ VGA@ VDDQ VSSQ
E10 C14 F12 E12
F1 VDDQ VSSQ E1 F14 VDDQ VSSQ E14
F3 VDDQ VSSQ E3 FBB_CLKA1 FBB_CLKA1# G2 VDDQ VSSQ F5
F12 VDDQ VSSQ E12 G13 VDDQ VSSQ F10
VDDQ VSSQ
1 Close to VDDQ VSSQ
1
F14 E14 VRAM H3 H2
G2 VDDQ VSSQ F5 RV97 RV98 H12 VDDQ VSSQ H13
Close to VDDQ VSSQ VDDQ VSSQ
VRAM G13 F10 40.2_0402_1% 40.2_0402_1% K3 K2
H3 VDDQ VSSQ H2 VGA@ VGA@ K12 VDDQ VSSQ K13
VDDQ VSSQ 1 1 1 1 1 1 1 VDDQ VSSQ
H12 H13 L2 M5
2
VDDQ VSSQ VDDQ VSSQ
10U_0402_6.3V6M
10U_0402_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1 1 1 1 1 1 1 K3 K2 CV118 CV119 CV153 CV155 CV154 CV156 CV157 L13 M10
K12 VDDQ VSSQ K13 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ M1 VDDQ VSSQ N1
VDDQ VSSQ 1 VDDQ VSSQ
2 2 2 2 2 2 2
10U_0402_6.3V6M
10U_0402_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
0.01U_0402_16V7K
CV120 CV121 CV148 CV149 CV150 CV152 CV151 L2 M5 M3 N3

VDDQ VSSQ VDDQ VSSQ
CV192
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ L13 M10 M12 N12
2 2 2 2 2 2 2 M1 VDDQ VSSQ N1 M14 VDDQ VSSQ N14
M3 VDDQ VSSQ N3 2 N5 VDDQ VSSQ R1
M12 VDDQ VSSQ N12 N10 VDDQ VSSQ R3
M14 VDDQ VSSQ N14 P1 VDDQ VSSQ R4
N5 VDDQ VSSQ R1 P3 VDDQ VSSQ R11
N10 VDDQ VSSQ R3 P12 VDDQ VSSQ R12
VDDQ VSSQ Around VDDQ VSSQ
P1 R4 VGA@ VRAM P14 R14
P3 VDDQ VSSQ R11 T1 VDDQ VSSQ U1
Around VDDQ VSSQ (3GHz and VDDQ VSSQ
VRAM P12 R12 up) T3 U3
P14 VDDQ VSSQ R14 T12 VDDQ VSSQ U12
VDDQ VSSQ VDDQ VSSQ
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
T1 U1 1 1 1 1 1 1 1 1 T14 U14
T3 VDDQ VSSQ U3 VDDQ VSSQ
T12 VDDQ VSSQ U12 CV182 CV184 CV183 CV185 CV186 CV188 CV187 CV189 FBB1_VREFC J14 A5
VDDQ VSSQ VREFC VPP/NC#A5
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 T14 U14 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ U5
VDDQ VSSQ 2 2 2 2 2 2 2 2 A10 VPP/NC#U5
CV107 CV176 CV175 CV177 CV178 CV180 CV179 CV181 FBB0_VREFC J14 A5 U10 VREFD
VREFC VPP/NC#A5 1 VREFD
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ U5
2 2 2 2 2 2 2 2 VPP/NC#U5
820P_0402_50V7K
4 A10 CV122 4
U10 VREFD VGA@ X76@
VREFD 2
1 x32
CV123 only
820P_0402_50V7K
VGA@ X76@
x32 2
only

N17P GDDR5 CHB 7/7
Custom 1A
A B C D E
A B C D E
LCD POWER CIRCUIT

+3VS +LCDVDD +19VB_CPU +INVPW R_B+
Place closed to JEDP1
UX1 +LCDVDD
W=60mils +3VS
1U_0402_6.3V6K
CX2
5 1 W=60mils W=60mils
IN OUT LX1
1 1 1
2 1 1 HCB2012KF-221T30_0805
10U_0402_6.3V6M
0.1U_0201_10V6K
GND 1 2 1 1 1
0.1U_0201_10V6K
4 3 CX3 CX4 EMC@ CX7
2 EN OC
1000P_0402_50V7K
CX6
0.1U_0201_10V6K SM01000EJ00 3000ma 1 1 CX8 CX1
SY6288C20AAC_SOT23-5 2 2 @ CX5 @
220ohm@100mhz 2 2 2
10U_0402_6.3V6M DCR 0.04 68P_0402_50V8J
<17> PCH_ENVDD
XEMC@ EMC@
1
2 2
RX1
100K_0402_5%
2
1B Modify
1.0 Modify
RX3
0_0402_5%
1 @ 2 EDP_HPD
<18> PCH_EDP_HPD
1
RX4
100K_0402_5%
2
2 LED PANEL Conn. 2
W=60mils JEDP1
XEMC@ +INVPW R_B+ 1
PCH_BKL_PW M CX9 1 2 220P_0402_50V7K 2 1
<17> PCH_BKL_PW M 2
XEMC@ 3
BKOFF# CX10 1 2 220P_0402_50V7K 4 3
<39> BKOFF# W=60mils 5 4
RX5 1 @ 2 10K_0402_5% PCH_BKL_PW M 6 5
BKOFF# 7 6
EDP_HPD 8 7
9 8
+LCDVDD 9
10
11 10
12 11
13 12
EDP_AUXN_C 14 13
EDP_AUXP_C 15 14
16 15
EDP_TXP0 CX11 1 2 0.1U_0201_6.3V6K EDP_TXP0_C EDP_TXP0_C 17 16
<6> EDP_TXP0 EDP_TXN0 EDP_TXN0_C EDP_TXN0_C 17
CX12 1 2 0.1U_0201_6.3V6K 18
<6> EDP_TXN0 EDP_TXP1 EDP_TXP1_C 18
CX13 1 2 0.1U_0201_6.3V6K 19
<6> EDP_TXP1 EDP_TXN1 EDP_TXN1_C EDP_TXP1_C 19
CX14 1 2 0.1U_0201_6.3V6K 20
<6> EDP_TXN1 EDP_TXP2 EDP_TXP2_C EDP_TXN1_C 20
CX15 1 2 0.1U_0201_6.3V6K 21
<6> EDP_TXP2 EDP_TXN2 EDP_TXN2_C 21
CX16 1 2 0.1U_0201_6.3V6K 22
<6> EDP_TXN2 EDP_TXP3 EDP_TXP3_C EDP_TXP2_C 22
CX17 1 2 0.1U_0201_6.3V6K 23
<6> EDP_TXP3 EDP_TXN3 EDP_TXN3_C EDP_TXN2_C 23
CX18 1 2 0.1U_0201_6.3V6K 24
<6> EDP_TXN3 24
25
3 EDP_AUXP CX19 1 2 0.1U_0201_6.3V6K EDP_AUXP_C EDP_TXP3_C 26 25 3
<6> EDP_AUXP EDP_AUXN CX20 EDP_AUXN_C EDP_TXN3_C 26
<6> EDP_AUXN 1 2 0.1U_0201_6.3V6K 27
28 27
USB20_P8 29 28
<16> USB20_P8 USB20_N8 29
30
<16> USB20_N8 30
31
Touch Screen Touch +TS_PW R 32 31
32
Screen 33
+TS_PW R TS_EN 34 33
+3VS <39> TS_EN 34
+3VS 35
+5VS RX6 1 @ 2 0_0603_5% USB20_N9_CAMERA 36 35 41
RX7 1 @ 2 0_0603_5% USB20_P9_CAMERA 37 36 G1 42
For 37 G2
Camera 38 43
DMIC_CLK_R 39 38 G3 44
<40> DMIC_CLK_R DMIC_DATA_R 39 G4
40 45
<40> DMIC_DATA_R 40 G5
1.0 Modify ACES_50398-04041-001
Camera DMIC_CLK_R
CONN@
DMIC_DATA_R
USB20_N9 RX8 1 @ 2 0_0402_5% USB20_N9_CAMERA SP010013I00
<16> USB20_N9
2
USB20_P9 RX9 1 @ 2 0_0402_5% USB20_P9_CAMERA DX1
<16> USB20_P9
YSLC05CH_SOT23-3
XEMC@
ESD request 12/02

4 4
1

eDP CONN.
A B C D E
A B C D E
GPU_HDMI_C_TXCP RY15 1 2 6.04_0402_1% HDMI_R_CK+
2
@ CY26
3.3P_0402_50V8
1
GPU_HDMI_C_TXCN RY14 1 2 6.04_0402_1% HDMI_R_CK-
1 1
GPU_HDMI_C_TX0P RY16 1 2 6.04_0402_1% HDMI_R_D0+
CY22 1 2 .1U_0402_16V7K GPU_HDMI_C_TXCP GPU_HDMI_C_TX0N RY17 1 2 6.04_0402_1% HDMI_R_D0-

<25> GPU_HDMI_TXCP GPU_HDMI_C_TXCN
CY24 1 2 .1U_0402_16V7K
<25> GPU_HDMI_TXCN
CY16 1 2 .1U_0402_16V7K GPU_HDMI_C_TX0P
<25> GPU_HDMI_TX0P GPU_HDMI_C_TX0N GPU_HDMI_C_TX1P HDMI_R_D1+
CY17 1 2 .1U_0402_16V7K RY18 1 2 6.04_0402_1%
<25> GPU_HDMI_TX0N
CY18 1 2 .1U_0402_16V7K GPU_HDMI_C_TX1P GPU_HDMI_C_TX1N RY19 1 2 6.04_0402_1% HDMI_R_D1-
<25> GPU_HDMI_TX1P
CY19 1 2 .1U_0402_16V7K GPU_HDMI_C_TX1N +5VS W=40mils +HDMI_5V_OUT
<25> GPU_HDMI_TX1N
CY20 1 2 .1U_0402_16V7K GPU_HDMI_C_TX2P
<25> GPU_HDMI_TX2P GPU_HDMI_C_TX2N GPU_HDMI_C_TX2P HDMI_R_D2+ UY2
CY21 1 2 .1U_0402_16V7K RY20 1 2 6.04_0402_1%
<25> GPU_HDMI_TX2N
GPU_HDMI_C_TX2N RY22 1 2 6.04_0402_1% HDMI_R_D2- 3
OUT
1
1
+1.8VSDGPU_AON IN CY23
2 0.1U_0201_10V6K
GND 2
RPY2 AP2330W -7_SC59-3

499_0804_8P4R_1%
5
QY1A GPU_HDMI_C_TX2P 4 5
PJT138KA 2N SOT363-6 GPU_HDMI_C_TX2N 3 6
G
4 3 HDMI_SCLK GPU_HDMI_C_TX1P 2 7
<25> GPU_HDMI_CTRLCLK GPU_HDMI_C_TX1N +HDMI_5V_OUT
1 8
S
RPY1
HDMI_GND
2 2 HDMI_SDATA 8 1 2
QY1B GPU_HDMI_C_TX0P 4 5 HDMI_SCLK 7 2
PJT138KA 2N SOT363-6 GPU_HDMI_C_TX0N 3 6 GPU_HDMI_CTRLDAT 6 3
G
1 6 HDMI_SDATA GPU_HDMI_C_TXCP 2 7 GPU_HDMI_CTRLCLK 5 4

<25> GPU_HDMI_CTRLDAT GPU_HDMI_C_TXCN +1.8VSDGPU_AON
1 8
S
2.2K_0804_8P4R_5%
RPY3
499_0804_8P4R_1%
+3VS HDMI connector
3
+3VS QY2B JHDMI1
DMN65D8LDW -7_SOT363-6 HDMI_HPD 19
18 HP_DET
+HDMI_5V_OUT +5V
2
+3VS 5 17
HDMI_SDATA 16 DDC/CEC_GND
RY24 HDMI_SCLK 15 SDA
4
1M_0402_5% 14 SCL
13 Reserved
1
CEC
2
HDMI_R_CK- 12
CK-
HDMI_HPD
Stuff on 1.0 HDMI_R_CK+
11
CK_shield
1 6 10
<18,23> HDMI_HPD_PCH HDMI_R_D0- CK+
9
EMC@ 8 D0-
D0_shield
2
QY2A DY2 HDMI_R_D0+ 7

HDMI_R_CK- 1 1 HDMI_R_CK- HDMI_R_D1- D0+
DMN65D8LDW -7_SOT363-6 RY11 10 9 6
5 D1-
100K_0402_5% D1_shield
HDMI_R_CK+ 2 2 9 8 HDMI_R_CK+ HDMI_R_D1+ 4 20
HDMI_R_D2- 3 D1+ GND 21
1
HDMI_R_D0- 4 4 HDMI_R_D0- D2- GND

7 7 2 22
3 HDMI_R_D2+ 1 D2_shield GND 23 3
HDMI_R_D0+ 5 5 HDMI_R_D0+ D2+ GND
6 6
3 3 CCM_C100042GR019M298ZL
CONN@
8 ZZZ2
DC232003500
L05ESDL5V0NA-4 SLP2510P8
1B Modify
HDMI_ROYALTY
DY1 DY3 EMC@ ROYALTY HDMI W /LOGO+HDCP
EMC@ HDMI_R_D1- 1 1 10 9 HDMI_R_D1- RO0000003HM
HDMI_HPD 6 3 HDMI_SDATA 45@
I/O4 I/O2 HDMI_R_D1+ 2 2 HDMI_R_D1+
9 8
+HDMI_5V_OUT
HDMI_R_D2- 4 4 7 7 HDMI_R_D2-
5 2
VDD GND HDMI_R_D2+ 5 5 HDMI_R_D2+
6 6
3 3
HDMI_SCLK 4 1
I/O3 I/O1 8
AZC199-04S.R7G SOT23-6
SC300002900 L05ESDL5V0NA-4 SLP2510P8
4 4

HDMI CONN.
A B C D E
A B C D E
LDO mode
LAN-RTL8411B W=60mil RL1 2 LDO@
SWR@
1 0_0603_5%
IDC=1200mA
W=60mil
300mA
+LAN_VDD +3V_LAN
W=60mil
1.4A
+REGOUT LL1 1 2
+3VALW +3V_LAN 2.2UH_HPC252012NF-2R2M_20%
0.1U_0201_10V6K
4.7U_0402_6.3V6M
CL2
0.1U_0201_10V6K
CL28
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
1U_0402_6.3V6K
CL8
0.1U_0201_10V6K
4.7U_0402_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
CL1
CL3
CL4
CL5
CL6
CL7
CL9
RL2 1 Using for Switch mode 1 1 1 1 1 1 1 1 1 1 1 1 1
CL10
CL11
CL12
CL13
0_0805_5% LDO@ SWR@ SWR@
1 2 The trace length from
Lx to PIN48 (REGOUT)
2 2 2 2 2 2 2 2 2 2 2 2 2 2
60mil 60mil and from C to Lx must
UL1 < 200mils.
1 5 1 1
IN OUT
2
GND Using for Switch mode
Place near Pin Place near Pin Place near Pin
4 3 11/27: P/N change to SH00000RT00 3,8,33,46 20 11,32,48
EN OC
2 The trace length
SY6288C20AAC_SOT23-5 ( S COIL 2.2UH +-20% from C to
CL14 @ HPC252012NF-2R2M 1.3A) PIN34,35(VDDREG)
1U_0402_6.3V6K LAN_PWR_EN
1 LAN_PWR_EN <39> must < 200mils.
PVT modify 01/06

UL2 R2534, R2537, R2539, R2535, R2536
Power Manahement/Isolation change to R-short
reserve EC_PME# pull high 100K to +3VALW_EC
From EC ISOLATEB 31
0_0402_5% 2 @ 1 RL3 LAN_PME# 39 ISOLATEBPIN
<17,39> EC_PME# LANWAKEB
High active. Card Reader
RL5 1 2 10K_0402_5% 15 SD_D0 RL6 1 @ 2 0_0402_5% SD_D0_R
EN threshold voltage min:1.2V +3V_LAN SD_D0/MS_D1
PCI-Express 14 SD_D1 RL7 1 @ 2 0_0402_5% SD_D1_R
typ:1.6V max:2.0V CLK_PCIE_LAN SD_D1 SD_CLK SD_CLK_R
Current limit threshold 1.5~2.8A 23 16 RL4 1 2 10_0402_5%
<19> CLK_PCIE_LAN CLK_PCIE_LAN# REFCLK_P SD_CLK/MS_D0 SD_CMD SD_CMD_R
24 17 RL8 1 @ 2 0_0402_5%
<19> CLK_PCIE_LAN# REFCLK_N SD_CMD/MS_D2 SD_D3 SD_D3_R
+3V_LAN Rising time must >0.5ms and <100ms 18 RL9 1 @ 2 0_0402_5% 2
PLT_RST_BUF# 30 SD_D3/MS_D3 19 SD_D2 RL10 1 @ 2 0_0402_5% SD_D2_R
<17,34,37> PLT_RST_BUF# LAN_CLKREQ# 29 PERSTBPIN SD_D2/MS_CLK 28 SD_WP CL16
+3VS <19> LAN_CLKREQ# CLKREQBPIN SD_WP/MS_BS
5P_0402_50V8C
CL15 1 2 .1U_0402_16V7K PCIE_PRX_C_DTX_P4 25 1
<16> PCIE_PRX_DTX_P4 PCIE_PRX_C_DTX_N4 HSOP @EMC@
CL17 1 2 .1U_0402_16V7K 26
<16> PCIE_PRX_DTX_N4 HSON
1
21 42 SD_CD#
<16> PCIE_PTX_C_DRX_P4 HSIP SD_CD# close to
RL15 22 43 pin17
<16> PCIE_PTX_C_DRX_N4 HSIN MS_CD#
1K_0402_5%
Transceiver Interface
LAN_MIDI0+ 1
2
2 ISOLATEB LAN_MIDI0- 2 MDIP0 2

LAN_MIDI1+ 4 MDIN0
MDIP1
Protect cotact
2
LAN_MIDI1- 5 48 +3V_LAN
RL18 LAN_MIDI2+ 6 MDIN1 AVDD33 11 Card
LAN_MIDI2- MDIP2 AVDD33
15K_0402_5%
LAN_MIDI3+
7
9 MDIN2 DVDD33
12
32
1400mA contact
1B Modify LAN_MIDI3- 10 MDIP3 DVDD33 Write protect Write Enable
1
MDIN3
(Lock) (Unlock)
RL14
330_0402_1% XTLI 44 33
XTLO_R 1 2 XTLO 45 CKXTAL1 Clock DVDD10 3
+LAN_VDD Card Uninsert Open Open Open
+3V_LAN CKXTAL2 AVDD10 8 300mA
SWR mode AVDD10 Card insert Open Close Close
Regulator and Reference
RL11 1 SWR@2 0_0402_5% +REGOUT 36 20
35 REG_OUT EVDD10
+3V_LAN VDDREG
RL13 1 LDO@2 0_0402_5% ENSWREG ENSWREG 34 800mA
46 ENSWREG_H 13
+LAN_VDD AVDD10 Card_3V3 +CARD_3V3
LDO mode LAN_RST
2 RL16 1 47
2.49K_0402_1% RSET 27 +VDD33_18
DV33/18
@ T45
0.1U_0201_10V6K
4.7U_0402_6.3V6M
41
1 @ 2 GPO 38 LED0
<18> LAN_GPO LED1/GPO 1 1 1
+3V_LAN
CL20
CL21
RL17 0_0402_5% 37 LEDs CL22
for disable PHY 40 LED3 0.1U_0201_10V6K
reserve 0 ohm @ T46 LED_CR
RL12 1 @ 2 10K_0402_5% GPO @ T47 49 @
E_Pad 2 2 2
YL1
25MHZ_20PF_XRCGB25M000F2P18R0
XTLO_R
Place near Pin
3 3 1 3
1B Modify XTLI 1B Modify 27
3
NC NC
1 RTL8411B-CGT_QFN48_6X6 Card Reader Connector
1 1
18P_0402_50V8J +CARD_3V3
10P_0402_50V8J 4 2 CL19
CL18
2 2
LAN Connector JSD1
JRJ45 1.0 Modify 6

SD_CMD_R 3 VDD
SD_CLK_R CMD
4.7U_0402_6.3V6M
0.1U_0201_10V6K
12 SD Write protect inverter circuit 7
RJ45_MIDI3- GND CLK
CL23
CL24
8 1 1 5
PR4- 11 8 VSS1
TL1 RJ45_MIDI3+ 7 GND VSS2
PR4+ SD_WP# 1 @ 2 SD_WP SD_D0_R 9
LAN_TERMAL1 24 RJ45_MIDI1- 6 RL21 0_0402_5% 2 2 SD_D1_R 10 DAT0
LAN_MIDI0+ 2 TCT1 MCT1 23 RJ45_MIDI0+ PR2- SD_D2_R 1 DAT1
LAN_MIDI0- 3 TD1+ MX1+ 22 RJ45_MIDI0- RJ45_MIDI2- 5 SD_D3_R 2 DAT2
TD1- MX1- PR3- +3VS CD/DAT3
RJ45_MIDI2+
IC side
4 21 4 12
TCT2 MCT2 PR3+ GND
1
LAN_MIDI1+ 5 20 RJ45_MIDI1+ 13
B88069X9231T203_4P5X3P2-2
LAN_MIDI1- 6 TD2+ MX2+ 19 RJ45_MIDI1- RJ45_MIDI1+ 3 RL20 SD_WP SD_WP# 11 GND

TD2- MX2- PR2+ CL26 100K_0402_5% SD_CD# 4 W/P
7 18 RJ45_MIDI0- 2
40mil 40mil CD
10P_0402_50V8J Close to Card Reader CONN
TCT3 MCT3 PR1- D
1
LAN_MIDI2+ 8 17 RJ45_MIDI2+ 10 LANGND 2 1 RJ45_GND QL1 TAITW_PSDATQ09GLBS1NN4H1
2
LAN_MIDI2- TD3+ MX3+ RJ45_MIDI2- RJ45_MIDI0+ GND SD_WP#
MESC5V02BD03_SOT23-3
9 16 1 2 L2N7002SWT1G 1N SC-70-3 CONN@

TD3- MX3- PR1+
1
9 G
GND
3
10 15 S
3
LAN_MIDI3+ 11 TCT4 MCT4 14 RJ45_MIDI3+ RL19
LAN_MIDI3- 12 TD4+ MX4+ 13 RJ45_MIDI3- SD_CLK_R 1 @EMC@2 0_0402_5%1 2
TD4- MX4-
SINGA_2RJ1660-000111F @ Connector side
@EMC@
DC234009H00 JPL1 CL27 @EMC@

JP1
1 JUMP_43X118 10P_0402_50V8J
2
EMC@
CL25 CONN@
4
3
2
1
4 GST5009-E Close to JREAD1 for EMI 4

DL1
0.1U_0201_10V6K SP050006B10 RPL1 LANGND

2 75_0804_8P4R_1%
1
Place close to TCT pin

5
6
7
8
RJ45_GND
LAN RTL8411H
Custom 1A
A B C D E
A B C D E
To USB/B Co lay CONN HPOUT_L_1

HPOUT_R_1
1
2
JIO3
1
SLEEVE 3 2
RING2 4 3
JIO2 HP_PLUG# 5 4
HPOUT_L_1 1 6 5
<40> HPOUT_L_1 HPOUT_R_1 1 GNDA 6
<40> HPOUT_R_1 2 7
1 <40>
<40>
SLEEVE
RING2
SLEEVE
RING2
HP_PLUG#
3
4
5
2
3
4
USB20_P5
USB20_N5
8
9
10
7
8
9
To Hall sensor/B 1
<40> HP_PLUG# 5 10
GNDA 6 11
7 6 USB20_P6 12 11 +3VLP
8 7 USB20_N6 13 12
USB20_P5 9 8 14 13 JHS1
<16> USB20_P5 USB20_N5 9 BATT_AMB_LED# 14
10 15 1
<16> USB20_N5 10 BATT_BLUE_LED# 15 LID_SW # 1
11 16 <39> LID_SW# 2
USB20_P6 12 11 PWR_SUSP_LED# 17 16 3 2
<16> USB20_P6 USB20_N6 12 PW R_LED# 17 3
13 18 4
<16> USB20_N6 13 18 4
14 19
BATT_AMB_LED# 15 14 USB_EN 20 19 5
<39> BATT_AMB_LED# BATT_BLUE_LED# 15 20 GND
<39> BATT_BLUE_LED# 16 21 6
PWR_SUSP_LED# 17 16 22 21 GND
<39> PW R_SUSP_LED# PW R_LED# 17 22
<39> PW R_LED# 18 23 ACES_51524-0040N-001
19 18 24 23 CONN@
USB_EN 20 19 25 24
<39> USB_EN
21 20
+5VALW 26 25 SP010022M00
22 21 27 26
23 22 28 27
23 +3VALW 28
24 29
25 24 30 29
26 25 31 30
+5VALW 26 31
27 32
GND <16> USB3_PRX_DTX_N5 32
28 33
GND <16> USB3_PRX_DTX_P5 33
34
35 34
<16> USB3_PTX_DRX_N5 35
ACES_51522-02601-001 <16> USB3_PTX_DRX_P5 36 41
2 37 36 G1 42 2
CONN@ 37 G2
38 43
<20> SUB_DET 38 G3
SP01001AO00 39
40 39 G4
44
45
40 G5
ACES_50398-04041-001
CONN@
SP010013I00
+3VS
1
RF8 TMS@
10K_0402_5%
THERMAL SENSOR
2
+3VS THERMAL_ALERT#
Thermal sensor SMBus address

0.1U_0201_10V6K
1 -->100-1_100xb : 0x4C
CF4
(x=0)Write Address(0x98h)
TMS@ (x=1)Read Address(0x99h)
3 3
2 SA000067P00
UF1
1 8 EC_SMB_CK2
VDD SCLK EC_SMB_CK2 <18,23,39>
H_THERMDA 2 7 EC_SMB_DA2
D+ SDATA EC_SMB_DA2 <18,23,39>
CF11TMS@
1 2 H_THERMDC 3 6 THERMAL_ALERT#
D- ALERT# THERMAL_ALERT# <39>
2200P_0402_50V7K
+3VS 1 2 CPU_THERM# 4 5
RF6 TMS@ 33K_0402_5% THERM# GND
NCT7718W _MSOP8
TMS@
4 4

FUN/B & LED/B
A B C D E
5 4 3 2 1
1.0 Modify
+3VS +3VS_SSD_NGFF
RM1
0_1206_5% 1.A Modify
1 @ 2
1
10U_0603_6.3V6M
0.1U_0201_10V6K
1 1
+ CM3
CM1 CM2 150U_6.3V_M_D2
2 2 2
SGA00009000
D D
M.2 SSD +3VS_SSD_NGFF
JSSD1
1 2
3 GND 3P3VAUX 4
PCIE_PRX_DTX_N12 5 GND 3P3VAUX 6
<17> PCIE_PRX_DTX_N12 PCIE_PRX_DTX_P12 PERn3 NC
<17> PCIE_PRX_DTX_P12
7
PERp3 NC
8 1.0 Modify
9 10
CM6 1 2 0.22U_0402_16V7K PCIE_PTX_C_DRX_N12 11 GND DAS/DSS# 12
<17> PCIE_PTX_DRX_N12 CM4 1 2 0.22U_0402_16V7K PCIE_PTX_C_DRX_P12 13 PETn3 3P3VAUX 14 EMC@
<17> PCIE_PTX_DRX_P12 15 PETp3 3P3VAUX 16 NGFF_SSD_RST#_R CM16 2 1 100P_0402_50V8J
PCIE_PRX_DTX_N11 17 GND 3P3VAUX 18
<17> PCIE_PRX_DTX_N11 PCIE_PRX_DTX_P11 19 PERn2 3P3VAUX 20
<17> PCIE_PRX_DTX_P11 21 PERp2 NC 22
CM5 1 2 0.22U_0402_16V7K PCIE_PTX_C_DRX_N11 23 GND NC 24
Place close to JSSD pin 50
<17> PCIE_PTX_DRX_N11 CM7 1 2 0.22U_0402_16V7K PCIE_PTX_C_DRX_P11 25 PETn2 NC 26
<17> PCIE_PTX_DRX_P11 27 PETp2 NC 28
ESD request 01/13
PCIE_PRX_DTX_N10 29 GND NC 30
<17> PCIE_PRX_DTX_N10 PCIE_PRX_DTX_P10 31 PERn1 NC 32
<17> PCIE_PRX_DTX_P10 33 PERp1 NC 34
<17> PCIE_PTX_DRX_N10 CM9 1 2 0.22U_0402_16V7K PCIE_PTX_C_DRX_P10 37 PETn1 NC 38 RM2 1 @ 2 0_0402_5%
<17> PCIE_PTX_DRX_P10 PETp1 DEVSLP SSD_DEVSLP0 <16>
39 40
RM3 1 @ 2 0_0402_5% PCIE_PRX_R_DTX_P9 41 GND NC 42 RM4 1 2 0_0402_5%
<17> PCIE_PRX_DTX_P9 RM5 1 @ 2 0_0402_5% PCIE_PRX_R_DTX_N9 43 PERn0/SATA-B+ NC 44
C <17> PCIE_PRX_DTX_N9 45 PERp0/SATA-B- NC 46 C
<17> PCIE_PTX_DRX_N9 CM11 1 2 0.22U_0402_16V7K PCIE_PTX_C_DRX_P9 49 PETn0/SATA-A- NC 50 NGFF_SSD_RST#_R RM6 1 @ 2 0_0402_5%
<17> PCIE_PTX_DRX_P9 PETp0/SATA-A+ PERST# NGFF_CLKREQ#_R PLT_RST_BUF# <17,32,37>
51 52 RM7 1 @ 2 0_0402_5% NGFF_CLKREQ# <19>
PVT modify 53 GND CLKREQ# 54
<19> CLK_PCIE_NGFF# REFCLKN PEWake#
<19> CLK_PCIE_NGFF 55 56
57 REFCLKP NC 58
GND NC
+3VS_SSD_NGFF
59 60 SUSCLK_SSD RM8 1 @ 2 0_0402_5%
SSD_DET# NC SUSCLK(32kHz) SUSCLK <18,37>
61 62
63 PEDET(NC-PCIE/GND-SATA) 3P3VAUX 64
GND 3P3VAUX
2
65 66 +3VS_SSD_NGFF
RM9 67 GND 3P3VAUX
@ GND 68
10K_0402_5% GND1
1.0 Modify GND2
69
1
RM10 BELLW _80159-3221

0_0402_5% CONN@
2 @ 1 SSD_DET#
<17> SATA_GP0
SP070018L00
D
1
@ QM1 2
BSS138W -7-F_SOT323-3 G
B B
S
3
SSD_DET#
SATA Device 0
PCIE Device 1
A A

mSATA-SSD
5 4 3 2 1
A B C D E
+5VALW
USB3.0 1.0 Modify

USB3_PTX_L_DRX_P2
For ESD request
1 1
DS1 EMC@
10 9 USB3_PTX_L_DRX_P2
CS1
1
EMC@
2 5
US1
1
+USB3_VCCA
IN OUT W=60mils
<16> USB3_PTX_DRX_P2 1 2 USB3_PTX_C_DRX_P2 RS86 1 @ 2 0_0402_5% USB3_PTX_L_DRX_P2
CS2 .1U_0402_16V7K USB3_PTX_L_DRX_N2 2 2 9 8 USB3_PTX_L_DRX_N2 .1U_0402_16V7K 2
GND
1 2 USB3_PTX_C_DRX_N2 RS89 1 @ 2 0_0402_5% USB3_PTX_L_DRX_N2 USB3_PRX_L_DTX_P2 4 4 7 7 USB3_PRX_L_DTX_P2 USB_CHARGE_2A4 3 1 @ 2
<16> USB3_PTX_DRX_N2 <39> USB_CHARGE_2A EN OC USB_OC1# <16>
CS3 .1U_0402_16V7K
USB3_PRX_L_DTX_N2 5 5 6 6 USB3_PRX_L_DTX_N2 SY6288C20AAC_SOT23-5 RS3 1
SA000079400 0_0402_5%
3 3 CS4
1 0.1U_0201_10V6K 1
8 2 @
+USB3_VCCA
USB3_PRX_DTX_P2 RS90 1 @ 2 0_0402_5% USB3_PRX_L_DTX_P2
<16> USB3_PRX_DTX_P2
SM070003Z00 W=100mils
MCM1012B900F06BP_4P
USB3_PRX_DTX_N2 RS91 1 @ 2 0_0402_5% USB3_PRX_L_DTX_N2 U2DP2 2 1 U2DP2_L
<16> USB3_PRX_DTX_N2 1 2
EMC@
CS5 + CS6
U2DN2 3 4 U2DN2_L
.1U_0402_16V7K
220U_6.3V_M 1
LS1 EMC@ 2
USB3.0 Conn.
JUSB1 CONN@
1
USB Host Charger USB20_N2
USB20_P2
RS96 1 NCHG@ 2 0_0402_5%
RS97 1 NCHG@ 2 0_0402_5%
U2DN2
U2DP2
U2DN2_L
U2DP2_L
2
3
4
VBUS
D-
D+
CB SELCDP GND
USB3_PRX_L_DTX_N2 5
DS2 EMC@ USB3_PRX_L_DTX_P2 6 SSRX- 10
0 X DCP(Dedicated Charging Port) U2DN2_L SSRX+ GND
autodetect with mouse/keyboard wakeup 6 3 7 11
+3VLP I/O4 I/O2 USB3_PTX_L_DRX_N2 8 GND GND 12
+USB3_VCCA USB3_PTX_L_DRX_P2 9 SSTX- GND 13
1 0 S0 charging with SDP(Standard Downstream Port) only SSTX+ GND
1
1 1 S0 charging with CDP(Charging Downstream Port) or CHG@ 5 2 ACON_TARB5-9V1391
RS94 VDD GND
SDP only DC23300NH00
2 10K_0402_5% 2
0_0402_5% US10 4 1 U2DP2_L
2
RS93 1 @ 2 8 1 USB_CEN I/O3 I/O1
<39> USB_CB USB20_N2 CB CEN USB_CEN <39>
7 2 U2DN2 AZC099-04S.R7G_SOT23-6
<16> USB20_N2 USB20_P2 TDM DM
6 3 U2DP2
<16> USB20_P2 5 TDP DP 4 1 2
+5VALW @ +5VALW
VDD SELCDP 9 RS95 10K_0402_5%
1 Thermal Pad
CHG@
CS89 SLG55594AVTR_TDFN8_2X2 USB_SELCDP <39>
.1U_0402_16V7K SA00006L600
2 CHG@
3 3
4 4

USB3.0 Conn/USB Charger
Custom 1A
A B C D E
5 4 3 2 1
USB3.0 (Port 3) 1.0 Modify
LS10 EMC@
<16> USB3_PTX_DRX_P3 CS58 1 2USB3_PTX_C_DRX_P3 RS64 1 @ 2 0_0402_5% USB3_PTX_L_DRX_P3 USB20_P3 2 1 USB20_P3_L
For ESD request
<16> USB20_P3
.1U_0402_16V7K
<16> USB3_PTX_DRX_N3 CS59 1 2USB3_PTX_C_DRX_N3 RS65 1 @ 2 0_0402_5% USB3_PTX_L_DRX_N3 USB20_N3 3 4 USB20_N3_L DS3 EMC@
<16> USB20_N3 TBTA_SBU1 1 1 TBTA_SBU1
.1U_0402_16V7K 10 9
MCM1012B900F06BP_4P
SM070003Z00 CC1_VCONN 2 2 9 8 CC1_VCONN
USB3_PTX_L_DRX_N3 4 USB3_PTX_L_DRX_N3
D 4 7 7 D
USB3_PTX_L_DRX_P3 5 USB3_PTX_L_DRX_P3
5 6 6
3 3
8
<16> USB3_PRX_DTX_P3
USB3_PRX_DTX_N3 RS76 1 @ 2 0_0402_5% USB3_PRX_L_DTX_N3
<16> USB3_PRX_DTX_N3 DS4 EMC@
USB3_PTX_L_DRX_P4 1 USB3_PTX_L_DRX_P4
1 10 9
USB3_PTX_L_DRX_N4 2 USB3_PTX_L_DRX_N4
2 9 8
4 4 7 7
USB3.0 (Port 4) 5 5
3 3
6 6
8
CS60 1 2 USB3_PTX_C_DRX_P4 RS82 1 @ 2 0_0402_5% USB3_PTX_L_DRX_P4
<16> USB3_PTX_DRX_P4
.1U_0402_16V7K L05ESDL5V0NA-4 SLP2510P8
CS61 1 2 USB3_PTX_C_DRX_N4 RS83 1 @ 2 0_0402_5% USB3_PTX_L_DRX_N4

<16> USB3_PTX_DRX_N4
.1U_0402_16V7K
DS5 EMC@
USB3_PRX_L_DTX_N3 1 USB3_PRX_L_DTX_N3
1 10 9
USB3_PRX_L_DTX_P3 2 USB3_PRX_L_DTX_P3
2 9 8
CC2_VCONN 4 4 7 7
CC2_VCONN
TBTA_SBU2 5 5 TBTA_SBU2
6 6
C C
3 3
<16> USB3_PRX_DTX_P4 8
USB3_PRX_DTX_N4 RS85 1 @ 2 0_0402_5% USB3_PRX_L_DTX_N4 L05ESDL5V0NA-4 SLP2510P8

<16> USB3_PRX_DTX_N4
DS6 EMC@
USB20_P3_L 1 1 USB20_P3_L
10 9
USB20_N3_L 2 2 9 8 USB20_N3_L
USB3_PRX_L_DTX_N4 4 USB3_PRX_L_DTX_N4
4 7 7
USB3_PRX_L_DTX_P4 5 USB3_PRX_L_DTX_P4
5 6 6
3 3
+5VALW +3VALW +3VALW_CC +5VALW_CC_VOUT

1.0 Modify
1.A Modify RS10 1 @ 2 0_0603_5% 1

10U_0402_6.3V6M
.1U_0402_16V7K
0.01U_0402_16V7K
1 CS8
1 1 2 1 10U_0402_6.3V6M
CS11 + CS12
2
CS7
CS9
CS10
10U_0402_6.3V6M 150U_6.3V_M_D2
2 2
SGA00009000 2 1 2
+USB3_VCCC +USB3_VCCC
B @ J13 1.A Modify B
1 2
1 2
JUMP_43X118
+USB3_VCCC JTYPEC1
+5VALW +5VALW_CC_VOUT A1 B12
US2
30V 10mOhm
@ QS1 AON6405L 1P DFN GND GND
+3VALW_CC 120mils 120mils 1
120mils USB3_PTX_L_DRX_P3 A2 B11 USB3_PRX_L_DTX_P3
+3VALW_CC 3A 2 14 3A 2 3A USB3_PTX_L_DRX_N3 A3 SSTXP1 SSRXP1 B10 USB3_PRX_L_DTX_N3
3 IN1 OUT 15 5 3 0.47U_0402_25V6K 2 1 CS84 SSTXN1 SSRXN1
4 IN1 OUT A4 B9 CS87 1 2 0.47U_0402_25V6K
IN2 VBUS VBUS
1
@
3
RS13 1 2 100K_0402_5% CC_FAULT# 5 RS15 RS12 CC1_VCONN A5 B8 TBTA_SBU2
4
AUX CC1 SBU2
1
RS14 1 2 100K_0402_5% CC_LD_DET# 1 CC_FAULT# +3VALW_CC 100K_0402_5% @ 1M_0402_5% CS13
RS16 1 2 100K_0402_5% CC_UFP# FAULTb 20 CC_LD_DET# 10U_0805_25V6K USB20_P3_L A6 B7 USB20_N3_L
RS19 1 2 100K_0402_5% CC_POL# 2 @ 1 CC_EN 6 LD_DETb DS19 USB20_N3_L A7 DP1 DN2 B6 USB20_P3_L
<39> EC_TYPEC_EN
2
EN DN1 DP2
1
RS17 1 2 100K_0402_5% CC_AUDIO# RS37 0_0402_5% MESC5V02BD03_SOT23-3

3
RS18 1 2 100K_0402_5% CC_DEBUG# RS39 EMC@ TBTA_SBU1 A8 B5 CC2_VCONN

CC_CHG 7 11 CC1_VCONN SBU1 CC2
1.0 Modify CC_CHG_HI CHG CC1 CC2_VCONN
@ 10K_0402_5% @ 0.47U_0402_25V6K
8 13 QS2B 2 1 CS86 A9 B4 CS85 1 2 0.47U_0402_25V6K
RS20 1 2 100K_0402_5% CC_CHG CHG_HI CC2 5 DMN65D8LDW-7_SOT363-6 VBUS VBUS
6 2
1
RS21 1 @ 2 100K_0402_5% CC_CHG_HI USB3_PRX_L_DTX_N4 A10 B3 USB3_PTX_L_DRX_N4
16 CC_DEBUG# USB3_PRX_L_DTX_P4 A11 SSRXN2 SSTXN2 B2 USB3_PTX_L_DRX_P4
4
RS22 1 @ 2 0_0402_5% CC_EN CC_REF 10 DEBUGb 17 CC_AUDIO# @ 3/8-for leakage current to connector SSRXP2 SSTXP2
REF AUDIOb 18 CC_POL# QS2A A12 B1
POLb 19 CC_UFP# 2 DMN65D8LDW-7_SOT363-6 GND GND
RS23 1 2 100K_0402_1% 9 UFPb
2 @ 1 CC_CHG_HI 12 GND1 21 1 5
<18> TYPEC_3A_1P5A#
1
RS38 0_0402_5% GND2 powerpad 2 GND GND 6

3 GND GND 7
4 GND GND 8
1.0 Modify GND GND
TPS25810RVCR_QFN20_4X3 LOTES_AUSB0181-P001A
CONN@
US1 update -s footprint
A DC021701040 A
Change type-C symbol 03/01
2016/01/29
Compal Secret Data
2017/01/10 Title
CC+USB TYPE C
Note : 2017 BIOS SPEC define DC mode 30% stop charge

Custom

5 4 3 2 1
A B C D E
Wireless LAN
1 1
+3VS 60mil +3VS_W LAN +3VALW W=60mils +3VS_W LAN

UM1
1U_0402_6.3V6K
CM15
RM11 1 NIOAC@ 2 0_0805_5% 5 1
IN OUT
CM12
4.7U_0402_6.3V6M
1
@ CM13
1 1
CM14
1
@ GND
2 NGFF WL+BT (KEY E)
0.1U_0201_10V6K 0.1U_0201_10V6K 4 3
2 2 2 2 <39> W LAN_ON EN OC
SY6288C20AAC_SOT23-5
IOAC@
KEY E +3VS_W LAN
JNGFF1
1 2
USB20_P7 3 GND_1 3.3VAUX_2 4
<16> USB20_P7 USB20_N7 USB_D+ 3.3VAUX_4
USB2 Port.7 <16> USB20_N7
5
USB_D- LED1#
6 @ T52
7 8
(For BT) 9 GND_7 PCM_CLK 10
11 SDIO_CLK PCM_SYNC 12
2 13 SDIO_CMD PCM_OUT 14 2
15 SDIO_DAT0 PCM_IN 16
SDIO_DAT1 LED2# @ T53
17 18
19 SDIO_DAT2 GND_18 20
21 SDIO_DAT3 UART_WAKE 22 UART_2_CRXD_DTXD
SDIO_WAKE UART_TX UART_2_CRXD_DTXD <20>
23
SDIO_RST
PH +3VS at SOC side, for win7 USB3 debug
UART_2_CTXD_DRXD
24
UART_RX UART_2_CTXD_DRXD <20>
25 26
PCIE_PTX_C_DRX_P3 27 GND_33 UART_RTS 28
<16> PCIE_PTX_C_DRX_P3 PCIE_PTX_C_DRX_N3 PET_RX_P0 UART_CTS E51TXD_P80DATA_R
29 30 RM12 2 @ 1 0_0402_5%
<16> PCIE_PTX_C_DRX_N3 PET_RX_N0 CLink_RST E51RXD_P80CLK_R E51TXD_P80DATA <39>
31 32 RM13 2 @ 1 0_0402_5%
PCIE_PRX_DTX_P3 GND_39 CLink_DATA E51RXD_P80CLK <39>
(link to PICE Port 3) <16> PCIE_PRX_DTX_P3 33 34
PCIE_PRX_DTX_N3 PER_TX_P0 CLink_CLK
PCIE X1 <16> PCIE_PRX_DTX_N3 35
PER_TX_N0 COEX3
36 @ T54
37 38 @ T55
CLK_PCIE_W LAN 39 GND_45 COEX2 40
<19> CLK_PCIE_W LAN CLK_PCIE_W LAN# REFCLK_P0 COEX1 SUSCLK_R @ T56
41 42 RM14 1 @ 2 0_0402_5%
<19> CLK_PCIE_W LAN# REFCLK_N0 SUSCLK(32KHz) W L_RST#_R SUSCLK <18,34>
(From PCH CLKOUT2) 43 44 RM15 1 @ 2 0_0402_5%
W LAN_CLKREQ# GND_51 PERST0# BT_ON PLT_RST_BUF# <17,32,34>
PCIE CLK <19> W LAN_CLKREQ# W LAN_PME#
45
CLKREQ0# W_DISABLE2#
46
W L_OFF# BT_ON <39>
47 48
<39> W LAN_PME# PEWAKE0# W_DISABLE1# W L_OFF# <39>
49 50
51 GND_57 I2C_DAT 52
53 RSVD/PCIE_RX_P1 I2C_CLK 54
2 1 55 RSVD/PCIE_RX_N1 I2C_IRQ 56
+3VS_W LAN GND_63 RSVD_64 E51TXD_P80DATA_R
RM16 10K_0402_5% 57 58
59 RSVD/PCIE_TX_P1 RSVD_66 60
61 RSVD/PCIE_TX_N1 RSVD_68 62
GND_69 RSVD_70
1
63 64
65 RSVD_71 3.3VAUX_72 66 RM19
3 67 RSVD_73 3.3VAUX_74 3
GND_75 100K_0402_5%
68
69 GND1
2
GND2
BELLW _80152-3221
CONN@
SP070013E00
4 4

M.2 Key E (WLAN)
A B C D E
A B C D E
SATA Re-Driver and cable HDD Conn. 1.0 Modify

1
2
JHDD2
1
3 2
3
B_EQ1
A_EQ2
A_EQ1
+3VS 4
4
DEW
5
6 5
+3VS 7 6
CO1 +5VS 7
8
2 1 1 @ 2+5VS_HDD 9 8
RO4 0_0805_5% 10 9
1 1
0.01U_0402_16V7K UO1 11 10
20
19
18
17
16
PS8527CTQFN20GTR2A_TQFN20_4X4 G_INT2 1 @ 2G_INT2_R 12 11
RO5 0_0402_5% 13 12
VDD2
B_EQ1
A_EQ2
A_EQ1
DEW
14 13
RDSATA_PRX_DTX_P2 CO7 1 2 0.01U_0402_16V7K RDSATA_PRX_C_DTX_P2 15 14
CO4 2 1 SATA_PTX_C_DRX_P2 0.01U_0402_16V7K 1 15 RDSATA_PTX_DRX_P2 RDSATA_PRX_DTX_N2 CO6 1 2 0.01U_0402_16V7K RDSATA_PRX_C_DTX_N2 16 15
<17> SATA_PTX_DRX_P2 SATA_PTX_C_DRX_N2 A_INP A_OUTP RDSATA_PTX_DRX_N2 16
<17> SATA_PTX_DRX_N2 CO5 2 1 0.01U_0402_16V7K 2 14 17
3 A_INN A_OUTN 13 B_EQ2 RDSATA_PTX_DRX_N2 CO3 1 2 0.01U_0402_16V7K RDSATA_PTX_C_DRX_N2 18 17
CO8 2 1 SATA_PRX_C_DTX_N2 0.01U_0402_16V7K 4 GND1 B_EQ2 12 RDSATA_PRX_DTX_N2 RDSATA_PTX_DRX_P2 CO2 1 2 0.01U_0402_16V7K RDSATA_PTX_C_DRX_P2 19 18
<17> SATA_PRX_DTX_N2 SATA_PRX_C_DTX_P2 B_OUTN B_INN RDSATA_PRX_DTX_P2 19
CO9 2 1 0.01U_0402_16V7K 5 11 20
<17> SATA_PRX_DTX_P2 B_OUTP B_INP 20
21 21
GND2 G1
REXT
VDD1
22
B_DE
A_DE
23 G2
EN
24 G3
G4
6
7
8
9
10
+3VS ACES_50406-02071-001
+3VS CONN@
A_DE
0.1U_0201_10V6K
RO6 1 @ 2 4.7K_0402_5% RO7 2 1 1 SP010016L00
+3VS 4.99K_0402_1%
B_DE
A_DE
B_DE
CO10
RO8 1 @ 2 4.7K_0402_5%
1 RO9 @ 2
RO10 1 @ 2 4.7K_0402_5% B_EQ1 4.7K_0402_5% 2
RO11 1 @ 2 4.7K_0402_5% A_EQ1 +3VS +5VS_HDD
RO12 1 @ 2 4.7K_0402_5% A_EQ2

100mils
B_EQ2
USE 8527 re-driver
RO13 1 @ 2 4.7K_0402_5%
SA00007JU10
10U_0603_6.3V6M
CO12
2 1 1 2
1
RO14 1 @ 2 4.7K_0402_5% DEW CO11 @ CO13 @
0.1U_0201_10V6K 0.1U_0201_10V6K
2
2 2
RO15 1 @ 2 4.7K_0402_5% A_DE
RO16 1 @ 2 4.7K_0402_5% B_DE
RO17 1 2 4.7K_0402_5% B_EQ1
RO18 1 2 4.7K_0402_5% A_EQ1
RO19 1 2 4.7K_0402_5% A_EQ2
RO20 1 2 4.7K_0402_5% B_EQ2
1B Modify
3
G-Sensor reserved 3
+3VS
1
RZ1 +3VS
10K_0402_5%
GSEN@ UZ1 GSEN@
1 CZ1 1 2 10U_0603_6.3V6M
2
8 Vdd_IO
4 CS 14 1 2GSEN@
<14,15,18> D_CK_SCLK SCLSPC Vdd
6 CZ2 0.1U_0201_10V6K
<14,15,18> D_CK_SDATA SDA/SDI/SDO
7
RZ2 1 @ 2 10K_0402_5% SDO/SA0 11 G_INT
+3VS INT1 G_INT2 G_INT <20>
RZ3 1 GSEN@ 2 10K_0402_5% 16 9
15 ADC1 INT2
13 ADC2 10 INT1/2 all High Active
ADC3 RES
2
3 NC 5
NC GND 12
GND
LIS3DHTR_LGA16_3X3
GSEN@
LIS3DH
4 SA0 ->0, Address is 0011 000 (0x30h) 4
SA0 ->1, Address is 0011 001 (0x32h)

HDD/ Re-Driver/ G-sensor
A B C D E
A B C D E
+3VLP_EC +3VLP_ECA
+3VLP LB1
JP2 FBMA-L11-160808-800LMT_0603 Board ID
1 2 1 2 +3VLP_ECA +3VLP_EC
1 2 1.A Modify
JUMP_43X39
2
0.1U_0201_10V6K
0.1U_0201_10V6K
@ 1 1 1 RB3 RB3
CB1
CB2
CB3 V15@ V17@ RB1
Ra 100K_0402_1%
1
For Power consumption 0.1U_0201_10V6K
2 2 RB2 2 15K_0402_1% 33K_0402_1%
Measurement
1
@ SD034150280 SD034330280 AD_BID
0_0402_5%
ECAGND
ECAGND <45>
2
@ 1 CB4
2
1 +3VLP_LPC RB3 RB3 RB3 1
+3VLP_EC
VX15@ VX17@ Rb 0_0402_5%
0.1U_0201_10V6K
111
125
2@
22
33
96
67
1
9
UB1 200K_0402_1% 330K_0402_1%
1 @ 2 EC_PME# SD034200380 SD034330380
VCC0
VCC_LPC
VCC
VCC
VCC
VCC
AVCC
RB4 47K_0402_5%
ESPI Bus Pin : 1~5.7.8.10.12.14

Analog Board ID definition,
LPC Bus Pin : 3~5.7.8.10.12.13 SUSPWRDNACK 1 21 EC_VCCST_PG_R Please see page 3.
<18> SUSPWRDNACK USB_CEN 2 GATEA20/GPIO00 EC_VCCST_PG/GPIO0F 23 BEEP# EC_VCCST_PG_R <9,43>
<35> USB_CEN TPM_SERIRQ 3 KBRST#/GPIO01 BEEP#/GPIO10 26 FAN_PWM1 BEEP# <40>
<16,41> TPM_SERIRQ LPC_FRAME# 4 SERIRQ EC_FAN_PWM/GPIO12 27 FAN_PWM2 FAN_PWM1 <42>
<16,41> LPC_FRAME# LPC_AD3 LPC_FRAME# PWM Output AC_OFF/GPIO13 FAN_PWM2 <42>
5
<16,41> LPC_AD3 LPC_AD2 7 LPC_AD3
<16,41> LPC_AD2 LPC_AD1 8 LPC_AD2 63 BATT_TEMP
<16,41> LPC_AD1 LPC_AD0 10 LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38 64 USB_CB BATT_TEMP <45,46>
<16,41> LPC_AD0 LPC_AD0LPC & MISC VCIN1_BATT_DROP/AD1/GPIO39 ADP_I USB_CB <35>
65
CLK_LPC_R 12 ADP_I/AD2/GPIO3A 66 AD_BID ADP_I <45,46>
<16> CLK_LPC_R PLT_RST# CLK_PCI_EC AD Input AD_BID/AD3/GPIO3B WLAN_PME#
13 75
<17,23,41> PLT_RST# EC_RST# 37 PCIRST#/GPIO05 AD4/GPIO42 76 EC_PME# WLAN_PME# <37>
For turn off internal LPC module of KB9032
<42> EC_RST# EC_SCI# EC_RST# AD5/GPIO43 EC_PME# <17,32> 1.0 Modify
20
<20> EC_SCI# WLAN_ON 38 EC_SCI#/GPIO0E
1 2 PLT_RST# <37> WLAN_ON CLKRUN#/GPIO1D
LAN_PWR_EN
CB5 XEMC@ 100P_0402_50V8J
<41> KSI[0..7] DA0/GPIO3C
68
EC_TP_INT# LAN_PWR_EN <32> near SOC PCH_RTCRST# <18>
DA Output EN_DFAN1/DA1/GPIO3D 70
EC_TP_INT# <17,41> D
1
KSI0 55 71 VR_PWRGD QB6
KSI1 56 KSI0/GPIO30 DA2/GPIO3E 72 KBL_EN VR_PWRGD <52> EC_CLR_CMOS 2 L2N7002SWT1G 1N SC-70-3
1 2 AC_IN KSI2 57 KSI1/GPIO31 DA3/GPIO3F KBL_EN <41> G
KSI2/GPIO32
1
CB6 100P_0402_50V8J KSI3 58 83 EC_MUTE# S
EC_MUTE# <40>
3
KSI4 59 KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A 84 USB_EN RB26
KSI5 60 KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B 85 EC_TYPEC_EN USB_EN <33>
XEMC@ XEMC@ 10K_0402_5%
2 2 1 2 1 CLK_LPC_R KSI6 61 KSI5/GPIO35 PSCLK2/GPIO4C 86 USB_CHARGE_2A EC_TYPEC_EN <36> 2
KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D TP_CLK USB_CHARGE_2A <35>
CB7 RB6 KSI7 62 87
<41> KSO[0..17] TP_CLK <41>
2
22P_0402_50V8J 33_0402_5% KSO0 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA
KSO1 40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <41>
KSO2 41 KSO1/GPIO21
KSO3 42 KSO2/GPIO22 97 ENBKL
43 KSO3/GPIO23 ENKBL/GPXIOA00 98 TP_PWR_EN ENBKL <17>
KSO4
44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 ME_EN TP_PWR_EN <41>
KSO5
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 VCIN0_PH ME_EN <18>
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH1/GPXIOD00 VCIN0_PH <45> SYS_PWROK_R RB7 2 @ 1 0_0402_5%
KSO7/GPIO27 SYS_PWROK <18,43>
KSO8 47 SPI Device Interface
KSO9 48 KSO8/GPIO28 119 SPOK_5V
49 KSO9/GPIO29 MISO/GPIO5B 120 BT_ON SPOK_5V <47> +3VS
KSO10
+3VLP_EC 50 KSO10/GPIO2A MOSI/GPIO5C 126 EC_CLR_CMOS BT_ON <37>
KSO11 SPI Flash ROM SPICLK/GPIO58
KSO12 51 KSO11/GPIO2B 128 FP_PWR_EN
1 2 2.2K_0402_5% EC_SMB_CK1 KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A FP_PWR_EN <42>
RB10
RB11 1 2 2.2K_0402_5% EC_SMB_DA1 KSO14 53 KSO13/GPIO2D
KSO15 54 KSO14/GPIO2E 73 GPU_ALERT GPU_ALERT RB9 1 VGA@ 2 10K_0402_5%
KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 SYS_PWROK_R GPU_ALERT <23>
KSO16 81 74
KSO17 82 KSO16/GPIO48 SYS_PWROK/AD7/GPIO41 89 BATT_4S GPU_OVERT#RB12 1 VGA@ 2 10K_0402_5%
KSO17/GPIO49 GPIO50 90 BATT_BLUE_LED# BATT_4S <46>
BATT_CHG_LED#/GPIO52 91 CAPS_LED# BATT_BLUE_LED# <33>
EC_SMB_CK1 CAPS_LED#/GPIO53 PWR_LED# CAPS_LED# <41>
77 GPIO 92
<45,46> EC_SMB_CK1 EC_SMB_DA1 78 EC_SMB_CLK1/GPIO44 PWR_LED#/GPIO54 93 BATT_AMB_LED# PWR_LED# <33>
<45,46> EC_SMB_DA1 EC_SMB_CK2 79 EC_SMB_DAT1/GPIO45 BATT_LOW_LED#/GPIO55 95 SYSON BATT_AMB_LED# <33>
<18,23,33> EC_SMB_CK2 EC_SMB_DA2 EC_SMB_CLK2/GPIO46 SYSON/GPIO56 VR_ON SYSON <13,43,48,50> +3VLP_EC
PU at CPU side <18,23,33> EC_SMB_DA2
80 121
VR_ON <43,51,52>
EC_SMB_DAT2/GPIO47 VR_ON/GPIO57 USB_SELCDP
DPWROK_EC/GPIO59
127
USB_SELCDP <35> EC Internal PU
SM Bus LID_SW# RB13 1 2 100K_0402_1%
PM_SLP_S3# 6 100 EC_RSMRST#
<18,43> PM_SLP_S3# ESPI_RST# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 DGPU_AC_DETECT EC_RSMRST# <18>
<16> ESPI_RST# SPOK_3V 15 GPIO07 GPXIOA04 102 VCIN1_ADP_PROCHOT DGPU_AC_DETECT <20,23>
3 <47> SPOK_3V TP_EN 16 GPIO08 VCIN1_ADP_PROCHOT/GPXIOA05 103 VCOUT1_PROCHOT VCIN1_ADP_PROCHOT <45> 3
<41> TP_EN TS_EN GPIO0A VCOUT1_PROCHOT#/GPXIOA06
<30> TS_EN
17 104 MAINPWON
MAINPWON <42,45,47>
For Thermal Portect Shutdown
WL_OFF# 18 GPIO0B VCOUT0_MAIN_PWR_ON/GPXIOA07 105 BKOFF# DB1
<37> WL_OFF# AC_PRESENT 19 GPIO0C BKOFF#/GPXIOA08 106 THERMAL_ALERT# BKOFF# <30>
GPIO GPO RB751V-40_SOD323-2
<18> AC_PRESENT GPU_OVERT# 25 AC_PRESENT/GPIO0D GPXIOA09 107 3V_EN_R THERMAL_ALERT# <33> 1 2 3V_EN
<23> GPU_OVERT# MAINPWON
FAN_SPEED1 28 PWM2/GPIO11 PCH_PWR_EN/GPXIOA10 108 PM_SLP_S0# 3V_EN <47,49>
<42> FAN_SPEED1 FAN_SPEED2 FAN_SPEED1/GPIO14 PWR_VCCST_PG/GPXIOA11 PM_SLP_S0# <18> 1
29 RB14
<42> FAN_SPEED2 E51TXD_P80DATA 30 FANFB1/GPIO15 3V_EN_R 1 2 1 2
CB8 RB15
<37> E51TXD_P80DATA E51RXD_P80CLK 31 EC_TX/GPIO16 110 AC_IN
.1U_0402_16V7K 1M_0402_5%
<37> E51RXD_P80CLK PCH_PWROK 32 EC_RX/GPIO17 VCIN1_AC_IN/GPXIOD01 112 EC_ON AC_IN <46> 2
XEMC@ 1K_0402_5%
<18,43> PCH_PWROK PWR_SUSP_LED# 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 ON/OFFBTN# EC_ON <47>
<33> PWR_SUSP_LED# NUM_LED# 36 SUSP_LED#/GPIO19 ON/OFF#/GPXIOD03 115 LID_SW# ON/OFFBTN# <41>
<41> NUM_LED# NUM_LED#/GPIO1A GPI LID_SW#/GPXIOD04 LID_SW# <33>
116 SUSP#
SUSP#/GPXIOD05 117 SW_PROCHOT# SUSP# <13,43,46,48,50,51>
GPXIOD06 118 EC_PECI 1 2
PBTN_OUT# PECI/GPXIOD07 H_PECI <9,17>
1.0 Modify 122 RB16 33_0402_1%
<18> PBTN_OUT# PM_SLP_S4# 123 PBTN_OUT#/GPIO5D 124
SPOK_3V RB72 1 2 0_0402_5% <18,43> PM_SLP_S4# PM_SLP_S4#/GPIO5E V18R/VCC_IO2 +3VLP_EC
AGND
1.0 Modify
GND
GND
GND
GND
GND
SPOK_5V RB73 1 @ 2 0_0402_5% SPOK_3V5V

KB9022QD_LQFP128_14X14 RB17 2 @ 1 0_0402_5% VR_HOT#
VR_HOT# <52>
11
24
35
94
113
ECAGND 69
CO-LAY with KB9032QA (SA000080J00) 20mil

CB9 1 2 BATT_TEMP H_PROCHOT# RB18 2 @ 1 0_0402_5% SW_PROCHOT#
<9,46> H_PROCHOT#
100P_0402_50V8J
1.0 Modify 1 2 VCOUT1_PROCHOT LB2 2 1
RB19 0_0402_5% FBMA-L11-160808-800LMT_0603
DGPU_AC_DETECT SW_PROCHOT#
For abnormal shutdown QB1A @
6
4 SPOK_3V5V 1 2 EC_RSMRST# 4
DB2 RB751V-40_SOD323-2
VCOUT1_PROCHOT 2 5 VCOUT1_PROCHOT
1 2 PCH_PWROK DMN65D8LDW-7_SOT363-6
1
DB3 RB751V-40_SOD323-2 QB1B

@
2015/1/9 acer require:
1 2 EC_VCCST_PG_R reserved protact circuit when Security Classification Compal Secret Data Compal Electronics, Inc.
DB4 RB751V-40_SOD323-2 adaptor 107% happen Issued Date 2016/11/03 Deciphered Date 2017/01/10 Title
EC ENE-KB9012A4/KB9022
Custom 1A
A B C D E
A B C D E
HD Audio Codec
+VDDA
2000mA 600ohm@100MHz 40mil +5VS_PVDD
DCR 0.1 LA1
PBY201209T-601Y-N_2P
1 2
+VDDA +5VS 40mil +VDDA
0.1U_0201_10V6K
1 1 1
+5VS_AVDD
10U_0402_6.3V6M
CA1
0.1U_0201_10V6K
CA2
CA3
1 J4 1
RA1 @ 1 2 CONN@
20mil 0_0603_5%
2 2 2 1 2 JUMP_43X39 Int. Speaker Conn. SP02000RR00
@ ACES_50278-00401-001
0.1U_0201_10V6K
0.1U_0201_10V6K
1 1 1 (output = 300 mA) 40mil JSPK1
SPK_R+
CA4
CA5
10U_0402_6.3V6M
CA6
SPKR+ EMC@1 LA2 2 PBY160808T-121Y-N_2P 1
SPKR- EMC@1 LA3 2 PBY160808T-121Y-N_2P SPK_R- 2 1
near Pin41 near Pin46 SPKL+ EMC@1 LA4 2 PBY160808T-121Y-N_2P SPK_L+ 3 2
2 2 2 SPKL- EMC@1 LA5 2 PBY160808T-121Y-N_2P SPK_L- 4 3
5 4
6 G1
3
G2
CA7 1 2 0.1U_0201_10V6K GNDA
near Pin9 near Pin26 DA1 DA2 GND
CA8 1 2 10U_0402_6.3V6M MESC5V02BD03_SOT23-3 MESC5V02BD03_SOT23-3
XEMC@ XEMC@
1 @ 2 +3VS_DVDDIO
+3VS
RA2 0_0402_5%
1
+3VS_DVDD
20mil
1 @ 2 GND GND
+3VS +1.8VS_VDDA
RA4 0_0402_5%
1 1 1 @ 2
+1.8VS
10U_0402_6.3V6M
CA9
0.1U_0201_10V6K
CA10
1@ 1 RA3 0_0402_5%
HDA_BIT_CLK_R
0.1U_0201_10V6K
CA11
10U_0402_6.3V6M
CA12
2
2 2
2 2 RA5
near Pin1
GNDA 0_0402_5%
41
46
26
40
1
1
9
2 10P_0402_50V8J 2 1 CA27 DMIC_CLK UA1 XEMC@ 2
Place near Pin40
2
DVDD-IO
PVDD1
PVDD2
AVDD1
AVDD2
DVDD
XEMC@
Reserved for RF CA13
22P_0402_50V8J
LINE1_L 22 1
LINE1_R 21 LINE1-L(PORT-C-L) 43 SPKL- XEMC@
LINE1-R(PORT-C-R) SPK-OUT-L- 42 SPKL+
24 SPK-OUT-L+
23 LINE2-L(PORT-E-L)
LINE2-R(PORT-E-R) SPK-OUT-R+
45 SPKR+ Digital MIC
40mil 44 SPKR-
RING2 17 SPK-OUT-R-
SLEEVE 18 MIC2-L(PORT-F-L) /RING2 MIC BOM upload by Audio
MIC2-R(PORT-F-R) /SLEEVE 32 HP_LEFT Team
31 HPOUT-L(PORT-I-L) 33 HP_RIGHT
+MICBIAS
30 LINE1-VREFO-L HPOUT-R(PORT-I-R) DMIC_DATA 2 1
TO EDP Conn.
LINE1-VREFO-R 10 HDA_SYNC_R 0_0402_5% RA7 DMIC_DATA_R
DMIC_DATA 2 SYNC 6 HDA_BIT_CLK_R HDA_SYNC_R <18> PCH_DMIC_DATA0 2 @ 1 DMIC_DATA_R <30>
DMIC_CLK GPIO0/DMIC-DATA BCLK HDA_BIT_CLK_R <18> <18> PCH_DMIC_DATA0
3 33_0402_5% RA8
GPIO1/DMIC-CLK
PCH_DMIC_CLK0 2 @ 1 DMIC_CLK_R
HDA_SDOUT_R <18> PCH_DMIC_CLK0 DMIC_CLK_R <30>
47 5 33_0402_5% RA9
<39> EC_MUTE# HDA_RST_AUDIO# 11 PDB SDATA-OUT 8 HDA_SDIN0_AUDIO 1 2 HDA_SDOUT_R <18> DMIC_CLK 2 1
<18> HDA_RST_AUDIO# RESETB SDATA-IN HDA_SDIN0 <18>
RA10 33_0402_5% EMC@ LA6
48 BLM15PX221SN1D_2P
MONO_IN 12 SPDIF-OUT/GPIO2
PCBEEP 16
Close codec MONO-OUT +MIC2_VREFO
<33> HP_PLUG# RA12 2 1 200K_0402_1% SENSE_A 13 1.0 Modify
RA13 2 1 100K_0402_1% 14 SENSE A
+3VS SENSE B
1 29 CA14 1 210U_0402_6.3V6M GND
37 MIC2-VREFO
CA15 35 CBP 7 CA16 1 210U_0402_6.3V6M
3 CBN LDO3-CAP GNDA 3
1U_0402_6.3V6K 39
2 LDO2-CAP
LDO1-CAP
27 CA17 1 210U_0402_6.3V6M GNDA Headphone Out TO FUN/B
36 100K_0402_5% 1 2 RA14
+3VS_DVDD CPVDD
28 CODEC_VREF 10mil 2 10U_0402_6.3V6M
CA18 @1 +MIC2_VREFO RA15 1 2 SLEEVE SLEEVE <33>
RA16 1 @ 2 0_0402_5% 20 VREF 2.2K_0402_5%
+3VALW CPVREF 15 RA17 2 @ 1 20K_0402_1% GNDA CA20 1 2 2.2U_0402_6.3V6M GNDA RA18 1 2 RING2
JDREF RING2 <33>
CA19 1 2 19 34 CPVEE Close codec 2.2K_0402_5%
GNDA MIC-CAP CPVEE CA21 1 2 0.1U_0201_10V6K 1.0 Modify
1U_0402_6.3V6K
CA22
Pin20 10U_0402_6.3V6M @
ALC283 : NC 1
RA19 2 @ 1 0_0402_5% 4
ALC255/256 : Power for combo jack depop DVSS HP_LEFT RA20 1
circuit at system shutdown mode 49 25 @ 2 0_0603_5% HPOUT_L_1
Thermal PAD AVSS1 HPOUT_L_1 <33>
38
AVSS2 2 HP_RIGHT RA21 1 @ 2 0_0603_5% HPOUT_R_1
Pin4 Pin15 HPOUT_R_1 <33>
ALC283 : DVSS ALC283 : Ref. Resistor for Jack Detect
ALC255/256 : DC DET (For Japen customer only) ALC255-CG_MQFN48_6X6 ALC255/256 : Jack Detect for SPDIF-OUT and SPK-OUT port
SA000082700 LINE1_L 1 2
GND GNDA CA23 4.7U_0402_6.3V6M
LINE1_R 1 2
CA24 4.7U_0402_6.3V6M
RA22
22K_0402_5% CA25
1U_0402_6.3V6K +MICBIAS DA3
2 1 BEEP#_R 1 2 MONO_IN 2 2 RA23 1
<39> BEEP#
4.7K_0402_5%
1
2
RA27 1
22K_0402_5% XEMC@ RA25 1 @ 2 0_0402_5% RA26 1 @ 2 0_0402_5% 3 2 RA28 1
100P_0402_50V8J
CA26
4.7K_0402_5%
RA24
2 1 4.7K_0402_5%
<18> PCH_SPKR BAT54A-7-F_SOT23-3
2
1
4 RA29 1 @ 2 0_0402_5% RA30 1 @ 2 0_0402_5% 4
GND
RA31 1 @ 2 0_0402_5% RA32 1 @ 2 0_0402_5%

RA33 1 @ 2 0_0402_5% RA34 1 @ 2 0_0402_5% 2016/11/03 2017/01/10 Title
HD Audio Codec ALC255
GND GNDA GND GNDA AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1A
A B C D E
A B C D E
KSI[0..7]
KSI[0..7] <39>
KB Conn. KSO[0..17]
KSO[0..17] <39> KB BackLight
JKB1 JKB2 1.0 Modify
<39> CAPS_LED# RK1 1 2 1K_0402_5% 1 30
RK3 1 @ 2 0_0402_5% 2 1 29 GND2 +5VS JBL1
RK4 1 @ 2 0_0402_5% 3 2 28 GND1 U4 1
+5VS 3 28 +5VS_BL 1
<39> NUM_LED# RK2 1 2 1K_0402_5% 4 ON/OFFBTN# 27 1.0 Modify 5 1 2
5 4 KSO0 26 27 IN OUT 3 2
1
ON/OFF BTN ON/OFFBTN# 6
KSO0 7
5
6
7
KSO1
KSO2
25
24
26
25
24
C41
0.1U_0201_10V6K GND
2 4 3
4
KSO1 8 KSO3 23 4 3 5
R17 KSO2 9 8 KSO4 22 23 2 EN OC 6 GND
1 9 22 GND 1
100K_0402_5% KSO3 10 KSO5 21 SY6288C20AAC_SOT23-5
2 1 KSO4 11 10 KSO6 20 21 ACES_51524-0040N-001
+3VLP 11 20
KSO5 12 KSO7 19 CONN@
KSO6 13 12 KSO8 18 19 1 @ 2
<39> ON/OFFBTN# ON/OFFBTN# KSO7 14 13 KSO9 17 18 <39> KBL_EN
R18 0_0402_5%
1
C32 SP010022M00
KSO8 15 14 KSO10 16 17 0.1U_0201_10V6K
KSO9 16 15 KSO11 15 16 @
KSO10 17 16 KSO12 14 15 2
@ SW1 KSO11 18 17 KSO13 13 14
19 18 12 13
Test Only EVQPLDA15_4P 1B Modify KSO12
19
KSO14
12
1 3 KSO13 20 KSO15 11
KSO14 21 20 KSO16 10 11
BOT 2 4 22 21 9 10
KSO15 KSO17
KSO16 23 22 KSI0 8 9
KSO17 24 23 KSI1 7 8
6
5
PreMP modify KSI0 25 24 KSI2 6 7

KSI1 26 25 KSI3 5 6
KSI2 27 26 33 KSI4 4 5
KSI3 28 27 GND 34 KSI5 3 4
KSI4 29 28 GND KSI6 2 3
KSI5 30 29 KSI7 1 2
KSI6 31 30 1
KSI7 32 31
32 ACES_85201-2805
CONN@
ACES_50596-03201-P01
CONN@ SP01000GO00
2
Touch Pad 2
TPM +3V_PTP
+3V_PTP +3VALW +3VALW 2 @ 1

0_0402_5% RK5
+3VS 2 @ 1
0_0402_5% RK6
UK1
+3VALW R215 +3VALW_TPM +3VS R20 +3VS_TPM 1 5 +3V_PTP @ CK1
OUT IN
4.7U_0402_6.3V6M
0_0603_5% 0_0603_5% 1 0.1U_0201_10V6K JTP1
CK2
1 @ 2 1 @ 2 2 2 1 1
GND 1
2
TP_CLK 2
TP_DATA 2
10U_0603_6.3V6M
0.1U_0201_10V6K
10U_0603_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
1 1 1 1 1 1 3 4 EC 3
2 OC EN 3
C33
C34
C35
C36
C37
C38
2 RK7 4
SY6288C20AAC_SOT23-5 10K_0402_5% PS2 I2C_1_SDA_R 5 4
CK3 I2C_1_SCL_R 6 5
near PCH
1
2 TPM@ 2 TPM@ 2 TPM@ 2 2
TPM@ 2
TPM@ TPM@ 1U_0402_6.3V6K EC_TP_INT# EC_TP_INT# 7 6
pin1 1 <17,39> I2C
EC_TP_INT# TP_EN 8 7
<39> TP_PWR_EN <39> TP_EN 8
9
10 GND
GND
TP_PWR_EN follow SYSON behavior
near ACES_51524-00801-001
CONN@
pin8,14,22
SP01001A910
BADD SELECTION +3V_PTP +3V_PTP
* 1 AEh(write),
AFh(read)
1
+3V_PTP
1
3 RK8 RK9 3
QK1A 2.2K_0402_5% 2.2K_0402_5%
1
U5 TPM@ DMN65D8LDW-7_SOT363-6
2
1 +3VALW_TPM RK10 RK11
2
29 VSB 6 1 I2C_1_SCL_R 4.7K_0402_5% 4.7K_0402_5%
XOR_OUT/SDA/GPIO0 <20> I2C_1_SCL
30 8 +3VS_TPM
3 SCL/GPIO1 VDD1 14 1 @ 2
2
0_0402_5% 1 @ 2 R21 TPM_BADD 6 GPX/GPIO2 VDD2 22 RK12 0_0402_5%
GPIO3/BADD VDD3
5
LPC_AD0 24 2 QK1B TP_CLK
<16,39> LPC_AD0 LPC_AD1 LAD0/MISO NC1 TP_DATA TP_CLK <39>
21 7 DMN65D8LDW-7_SOT363-6
<16,39> LPC_AD1 LPC_AD2 LAD1/MOSI NC2 I2C_1_SDA_R TP_DATA <39>
18 10 <20> I2C_1_SDA 3 4
<16,39> LPC_AD2 LPC_AD3 LAD2/SPI_IRQ# NC3
15 11
<16,39> LPC_AD3 LAD3 NC4 25 1 2
CLK_LPC_TPM_R 19 NC5 26 RK13 @ 0_0402_5%
<16> CLK_LPC_TPM_R LPC_FRAME# LCLK/SCLK NC6
20 31
<16,39> LPC_FRAME# PLT_RST# LFRAME#/SCS# NC7
17
<17,23,39> PLT_RST# TPM_SERIRQ LRESET#/SPI_RST#/SRESET#
27 9
<16,39> TPM_SERIRQ PM_CLKRUN# 13 SERIRQ GND1 16
<18> PM_CLKRUN# CLKRUN#/GPIO4/SINT# GND2
28 23
LPCPD# GND3 32
4 GND4 33
5 PP PGND 12
SERIRQ PH 10K to +3VS at TEST Reserved
PCH side NPCT650ABBYX_QFN32_5X5
CLKRUN# PH 10K to +3VS at
PCH side
LPCPD# had
SA00008ELC0
internal PH
CLK_LPC_TPM_R R22 1 2 33_0402_5% C39 1 2 22P_0402_50V8J
4 XEMC@ XEMC@ 4

KB & TP & TPM Connector
Custom 1A
A B C D E
+5VS Screw Hole 1.A Modify 1.0 Modify
1 @ 2 +VCC_FAN1
RF4 0_0603_5% H1 H2 H3 H4 H5 H7 H8 H9 H6 H23 H24
1 @ 2 +VCC_FAN2 H_3P0 H_3P0 H_2P5 H_3P0 H_3P0 H_4P0 H_6P4 H_4P0 H_4P0 H_3P2 H_3P2
1 1 RF7 0_0603_5%
CF6 CF5
1
1000P_0402_50V7K 10U_0603_6.3V6M
2 2
@ @
@ @ @ @ @ @ @ @ @ @ @ FD1 FD2
1.0 Modify
@ @
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80
H14 H15 H21 H22 H12 H13 H25 H26 H27 H28 H29
H_6P0 H_3P7 H_3P7 H_3P7 H_3P7 H_3P7 H_3P7 H_3P7 H_2P7X2P0N H_2P7X2P0N H_2P0N FD3 FD4
1.0 Modify
FAN Conn @ @ @ @ @ @ @ @ @
1
+3VS
FIDUCIAL_C40M80 FIDUCIAL_C40M80
@ @ @ @
1
2
RF3
10K_0402_5% CF13
40mil 1
4.7U_0603_10V6K
JFAN1
2
+VCC_FAN1 1
2 1
<39> FAN_SPEED1 FAN_PWM1 2
3
<39> FAN_PWM1 4 3
1 4
CF7 5
1000P_0402_50V7K 6 G1
XEMC@ G2
2 ACES_50278-00401-001
CONN@
SP02000RR00
+3VS 1.0 Modify

Finger Print
1
1 1.0 Modify
RF5
10K_0402_5% CF12 RK14 0_0402_5%
40mil 4.7U_0603_10V6K 1 @ 2
2 +5VALW
JFAN2
2
+VCC_FAN2 1 RK15 0_0402_5%

2 1 1 FP@ 2
<39> FAN_SPEED2 FAN_PWM2 2 +3VALW
3
<39> FAN_PWM2 4 3 +FP_VCC
1 4 2
CF10 5 FP@
1000P_0402_50V7K 6 G1 CK4 UK2
XEMC@ G2 1U_0402_6.3V6K 5 1
2 ACES_50278-00401-001 1 IN OUT
1 FP@
CONN@ 2 CK5
GND 4.7U_0402_6.3V6M
SP02000RR00 <39> FP_PWR_EN
FP_PWR_EN 4 3
EN OC 2
SY6288C20AAC_SOT23-5
FP@
1.0 Modify
DK1 FPEMC@
6 3 USB20_P10_L
LK1 FPEMC@ I/O4 I/O2
+3VLP 1 2 2 1 USB20_N10_L
Reset Circuit R23
@
0_0402_5%
MAINPWON <39,45,47> <16> USB20_N10
5 2
USB20_P10_L +FP_VCC VDD GND
1 @ 2 3 4
EC_RST# <39> <16> USB20_P10
2
R24 0_0402_5%
R25 MCM1012B900F06BP_4P
SM070003Z00 4 1 USB20_N10_L
BI_GATE PH to +RTCVCC at 10K_0402_5% I/O3 I/O1
6
PWR side AZC099-04S.R7G_SOT23-6

1
Q1A
BI_GATE# 2 DMN65D8LDW-7_SOT363-6
3
+FP_VCC
1
C40
BI_GATE 5
<45> BI_GATE
0.1U_0201_10V6K
8
JFP1
PIN ETU801 FA577E-1200
2 USB20_P10_L 7 8 10
1 +FP_VCC(5V) +FP_VCC(3V)
4
Q1B USB20_N10_L 6 7 G2 9
5 6 G1
4 5 2 USBP D+
3 4
2 3 3 USBN D-
1 2
BI SW 1 4 GND GND
CONN@
ACES_51522-00801-001 5 NC NC
Reset But t on SP01001AE00 6 NC NC
7 NC
SW3 3 SW2 1
BI_GATE 1 2 BI_GATE 8 NC
BI_S <45>
3 4 4 2
ATE-2-V-TR_4P
SKRPABE010_4P Security Classification Compal Secret Data Compal Electronics, Inc.
H : 3.8mm Issued Date 2016/11/03 2017/01/10 Title
Deciphered Date
Release : Bat t er y Off THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FAN & FP & Screw Hole
Push : Bat t er y ON AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1A
A B C D E
System DC inferface For Power ON/Off Sequence PM_SLP_S3

+3VALW
2
+5VALW
G
1
Q10A
UQ1 @ J6 R37 2N7002KDW_SOT363-6
1 14 +5VS_OUT 1 2 100K_0402_5%
2 +5VALW VIN1 VOUT1 1 2 +5VS
RQ1 2 13 1 6
S
VIN1 VOUT1 EC_VCCST_PG_R <9,39>
D
CQ7 0_0402_5% JUMP_43X118
2
SUSP# 1 @ 2 5VS_ON 3 12 1 2 1 2 MOW14, For tCPU28 200us(max)
0.1U_0201_10V6K ON1 CT1
1 CQ1 1000P_0402_50V7K SLP_S3# to VCCST_PWRGD deassertion
5
CQ2 1 2 4 11 CQ5
G
1 +5VALW VBIAS GND 1
@ 0.1U_0201_10V6K 0.1U_0201_10V6K
1 @ 2 3VS_ON 5 10 1 2 Q10B
RQ2 ON2 CT2 CQ3 1000P_0402_50V7K Q11A 2N7002KDW_SOT363-6
+3VALW 0_0402_5% 6 9 @ J5 2N7002KDW_SOT363-6 4 3
S
+3VALW VIN2 VOUT2 VR_ON <39,51,52>
6
+3VS_OUT 1
D
CQ4 1 2 7 8 2 D
VIN2 VOUT2 1 2 +3VS
@ 0.1U_0201_10V6K 2 MOW14, For tPLT17 200us(max)
15 <18,39> PM_SLP_S3# G
2 GPAD
JUMP_43X118 SLP_S3# to IMVP VR_ON deassertion
5
1 2
G
CQ8 EM5209VF_DFN14_2X3 S
1
0.1U_0201_10V6K CQ6 Q11B
1 0.1U_0201_10V6K 2N7002KDW_SOT363-6
4 3 SUSP#
D
MOW14, For tPLT18 200us(max)
+5VALW +0.6VS_VTT +5VALW +1.2V_VDDQ SLP_S3# to VCCIO VR disable
2
G
Q12A@
2
2
2N7002KDW_SOT363-6
2
@ R27 @ R28 R30 R29
100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 1 6
S
SYS_PWROK <18,39>
D
@ @
1
1
1
5
SUSP +0.6VS_VTT_R SYSON# +1.2V_VDDQ_R
G
+3VALW Q12B@
6
6
2N7002KDW_SOT363-6
1
4 3
S
PCH_PWROK <18,39>
D
2 5 SUSP SYSON 5 2 SYSON# R38
<13,39,46,48,50,51> SUSP# <13,39,48,50> SYSON
Q7B Q8B Q8A 100K_0402_5%
1
Q7A @ DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6

1
1
R32 @ DMN66D0LDW-7_SOT363-6 @ @
2
2 10K_0402_5% Q13A PM_SLP_S4 2
@ 2N7002KDW_SOT363-6
5
DMN66D0LDW-7_SOT363-6 D
G
2
2 Q13B
<18,39> PM_SLP_S4# G 2N7002KDW_SOT363-6
S 4 3 SYSON
S
1
D
MOW14, For tPLT15 200us(max)
SLP_S4# to VDDQ ramp down
3 3
4 4

DC Interface
Custom 1A
A B C D E
A B C D E
+3VLP
1
1 1
@ PC205
1
0.1U_0603_25V7K
2
@ PR215
PR207 100_0402_1% 21.5K_0402_1% @ PR214
MB:Battery Con Put BOT Side
100K_0402_1%
1 2 26.7K_0402_1%
EC_SMB_DA1 <39,46>
PR213
PR205 100_0402_1%
2
1
1 2
EC_SMB_CK1 <39,46>
@ PU201
1 8
Battery Bot Side @ VCC TMSNS1
(Common Part)
2 7 2 1
PR202 <45,47> SL200002H00
2
200K_0402_1% GND RHYST1
PIN1 GND
1
1 2 MAINPWON 3 6 @ PR216
+3VLP <39,42,47> MAINPWON OT1 TMSNS2
PIN2 GND
100K_0402_1%_NCP15WF104F03RC
@ PJP201 14K_0402_1%
1 4 5 2 1 @
PIN3 SMD 1 2
2 3
1 2
BATT_TEMP <39,46>
OT2 RHYST2
1
EC_SMB_DA1-1
PH202
G718TM1U_SOT23-8 @ PR218
PIN4 SMC
2
3 4 EC_SMB_CK1-1 PR203 1K_0402_1% 10K_0402_1%
4 5
PIN5 TEMP BATT_TS
100K_0402_1%_NCP15WF104F03RC
@
5 6 BATT_B/I
PIN6 BI 6 7
PH203
(Common Part)
2
7 8
PIN7 Batt+ 8 9 +RTCVCC SL200002H00
PIN8 Batt+ GND 10
GND 2016/09/26 PH3 Near VGA.
PIN9 GND
PIN10 GND
CVILU_CI9908M2HR0-NH Change thePQ201 from
1
SP020017H00 PR212 SB00000QO00 to SB00001GD00,
100K_0402_5%
CVILU_CI9908M2HR0-NH
2
D
1
2 2
2 PQ201
<42> BI_GATE G LBSS139LT1G 1N SOT-23-3
S
3
+12.6V_BATT+
EMI@ PL201 2016/08/16 update
HCB2012KF-121T50_0805
1 2 For KB9022
+12.6V_BATT BI_S <42>
sense 20mΩ Active Recovery When PR204=16.9K
change PL201, PL202 from EMI@ PL202
1
SM01000C000 to comm part
HCB2012KF-121T50_0805
1 2 135W PR206 For KB9022
SM01000P200
PR217 @
0_0402_5% 19.1K ohm 175W,0.63V 175W,0.63V OTP Active Recovery
SD034191280
2
135W PR206 VCIN0_PH(V) 92'C, 1V 56'C, 2V
1
PC201 EMI@ PC202 EMI@
1000P_0402_50V7K 0.01U_0402_25V7K
19.1K ohm 175W,0.63V 175W,0.63V
2
SD034191280 PH202(ohm) 7.3092K 26.11K
+3VLP_ECA
PR206
19.1K_0402_1%
1 2
ADP_I <39,46>
1
3 3
PR204
16.9K_0402_1%
VCIN1_ADP_PROCHOT <39>
2
VCIN0_PH <39>
PC203 must close to EC pin
1
PR208 PH201
2
10K_0402_1% @ PC203
100K_0402_1%_NCP15WF104F03RC
0.1U_0402_25V6
1
T202@ PH201 is Common Part SL200002H00
T201@
ECAGND <39>
T202 T201 must close to PH201
ADP_I=20*I(adapter)*0.01
4
I(adapter)=adapter(W)*95%/19 4
2016/01/29
Compal Secret Data
2017/06/14 Title
BATTERY CONN/OTP
Custom

A B C D E
A B C D E
PR302
D 2016/02/16 BATFET AON6426 SB000017B00
1
1M_0402_1% PQ301 +19VB Rds(on):6~7.5m Ohm
2 1 2
G 2N7002KW _SOT323-3
PR304 20m ohm chang -->10m ohm Vgs=20V
PQ309
AON6366E 1N DFN5X6-8 +12.6V_BATT_CHG
PR303 S SD00000K820 1W Vds=30V 1
3
2 1 @ PJ301 JUMP_43X118 ID= 11A (Ta=70C) 2
+19V_P1 +19V_P2 1 2 5 3
PQ303 3M_0402_5% PQ304 1 2
AON6366E 1N DFN5X6-8
1
AON6366E 1N DFN5X6-8
1
PR304
0.01_1206_1% EMI@ PL302
+19V_CHG
4
2 2 HCB2012KF-121T50_0805
5 3 3 5 1 4 1 2
+19V_VIN
PC307 2200P_0402_50V7K
68P_0402_50V8J
0.1U_0402_25V6
0.1U_0402_25V6
2 3
@ PC308 10U_0805_25V6K
PC309 10U_0805_25V6K
0.047U_0603_25V7M
4
4
1 1
RBFET AON6426 SB000017B00 PC302
1000P_0603_50V7K
1 2
Rds(on):6~7.5m Ohm
1
1
PC301
PC303
ACP ACN
Vgs=20V
2
0.022U_0603_25V7K
4.7_0603_1%
Vds=30V
PR301
4.02K_0402_1%
2
10_0402_1%
PC327
PC328
PC306
ID= 11A (Ta=70C) PC311
PC310
1
0.1U_0402_25V6 PC312
10U_0805_25V6K
PR306
PR307
10U_0805_25V6K
2 1 1 2 1 2
1
@ PC304
PC305
ACFET AON6426 SB000017B00 0.01U_0402_25V7K~N
2
EMI@
EMI@
@EMI@
EMI@
0.1U_0603_25V7K
Rds(on):6~7.5m Ohm
2
Vgs=20V PR308
Vds=30V 4.02K_0402_1% BATDRV_CHGR
ID= 11A (Ta=70C) 1 2 ACDRV_CHGR
1
@ PR309 @ PR310
0_0402_5% 0_0402_5%
2 1CMSRC_CHGR BATSRC_CHGR
PR305
2
4.02K_0402_1%
ACN_CHGR
ACP_CHGR
+19V_VIN
PD301 PR312 @ PC313
S SCH DIO BAS40CW SOT-323 10_1206_5% 1000P_0402_50V7K 2016/03/13 SE158225K80 X1
+19V_VIN
3 1 2 down size SE00000WP00 S
1
1 2 1
PR311 +19VB 2 ACDRV_CHGR CER CAP 2.2U 25V K X5R 0603
422K_0402_1% PC314 1U_0603_25V6K +6V_CHG_REGN
2 1 PC316 PQ305
2.2U_0603_25V7M AON7506_DFN33-8-5
2
5
2 ACDET PU301 2
1 2 Choke 4.7uH SH00000YC00 (Common Part)
ACDRV
ACP
ACN
28
VCC PR314
(Size:6.6 x 7.3 x 3 mm)
66.5K_0402_1%
(DCR:28m~33m)
1
CMSRC_CHGR 3 24 0_0603_5%
CMSRC REGN
1
1 2DH_CHGR_R 4
PR313
@ PR316 PC317
PC315 6 0_0603_5% 0.047U_0603_25V7M
2200P_0402_25V7K ACDET 25 BST_CHGR1 2BST_CHGR_R 1 2
2
@ PR317 1 2 0_0402_5% EC_SMB_DA1_CHGR 11 BTST

<39,45> EC_SMB_DA1 +12.6V_BATT
2
SDA
3
2
1
@ PR315 1 2 0_0402_5% EC_SMB_CK1_CHGR 12 26 UG_CHGR PR318
<39,45> EC_SMB_CK1 SCL HIDRV PL301 0.01_1206_1%
ACPRN_CHGR 5 4.7UH_PCMB063T-4R7MS_8A_20%
<39,45> ADP_I PC318 ACOK 27 LX_CHGR 1 2 1 4
1 2 PR333 1 2 0_0402_5% 7 PHASE
IADP 2 3
1
100P_0603_50V8 8 23 LG_CHGR PQ306
4.7_1206_5%
Close to EC IDCHG LODRV
EMI@ PR319
@ PC319
1 2 9
10U_0805_25V6K
10U_0805_25V6K
AON7506_DFN33-8-5
PMON
@
PR331
0_0402_5% 100P_0603_50V8 10 22 PR332 316K_0402_1% SRP SRN
1SNUB_CHGR 2
/PROCHOT GND
1
1 2 1 2
PC320
PC321
<52> PSYS_MON +3VLP 4
@ PR321 PR322 78.7K_0402_1%
2
0_0402_5% 13 21 ILIM_CHGR 1 2
1 2 GND ILIM PR323
680P_0603_50V7K
<9,39> H_PROCHOT# 14 10_0402_1%
3
2
1
NC 20 SRP_CHGR 1 2
EMI@ PC323
SRP ILIM=charge current limit
@ PR334 0_0402_5%
1 2 15 19 SRN_CHGR 1 2 Rsr=input current sense
2
/BATPRES SRN I(CHG_LIM)=V(ILIM)/(20*Rsr)
3 20160601 colay BQ24781 PR324 =(3.3*78.7/394.7)/(20*0.01) 3
16 18 BATDRV_CHGR 10_0402_1% PC324
/TB_STAT BATDRV 0.1U_0402_25V6 =3.29A
29 17 BATSRC_CHGR 1 2
PWPD BATSRC
For 4S per cell 4.35V battery <39,45> BATT_TEMP
BQ24781RUYR_W QFN28_4X4
ACDET H/L Side AON7506 SB000010A00
0.1U_0402_25V6
0.1U_0402_25V6
Rds(on):13~15.8mohm
1
PC325
PC326
Vgs=20V
1
Vds=30V
2
4S_BATT@ PR328 ID= 10.5A (Ta=70C)
2M_0402_1%
+6V_CHG_REGN
2
1
@ PR330
0_0402_5% PR325
10K_0402_1%
PR326
1 2
10K_0402_1%
2
4S_BATT@ 1 2 ACPRN_CHGR
PQ307 <39> AC_IN
1
4S_BATT@ PR329 LTC015EUBFS8TL_UMT3F

100K_0402_1% PR327
1 2 2
<39> BATT_4S
12K_0402_1%
4 4
2
4S_BATT@
3
1
PQ308 D
2
<13,39,43,48,50,51> SUSP# G

2N7002KW _SOT323-3 S
Security Classification Compal Secret Data
3
charger
Custom

A B C D E
A B C D E
PR402
499K_0402_1%
ENLDO_3V5V 1 2
+19VB
1
150K_0402_1%
PR404
EN1 and EN2 dont't floating
2
@EMI@ PL401
HCB2012KF-121T50_0805
1 2 PU401
1 +19VB SY8286BRAC_QFN20_3X3 @ PR401 PC401 1
@ PJ403 0_0603_5% 0.1U_0603_25V7K
+19VB_3V BST_3V
2200P_0402_50V7K
1 2 1 2 1 2 Choke 1.5uH SH000016800 (Common Part)
1 2
(Size:4.9 x 5.2 x 3 mm)
10U_0805_25V6K
10U_0805_25V6K
EMI@ PC406
@EMI@ PC403
EMI@ PC404
0.1U_0402_25V6
0.1U_0402_25V6
JUMP_43X79
(DCR:20m~25m)
1
@ PC432
PC405
BS
IN
IN
IN
IN
PL402
2
LX_3V6 20 LX_3V 1 2
LX LX +3VALWP
7 19 1.5UH_PCMB053T-1R5MS_6A_20%
GND LX
@EMI@
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
PR405
1
1
680P_0603_50V7K 4.7_1206_5%
8 18
+3VALWP GND GND
@ PC407
PC408
PC409
@ PC410
PC429
PC430
9 17
+3VLP
2
PG LDO
1 3V_SN
10 16
2
NC NC
1
PC411
OUT
EN2
EN1
21 4.7U_0402_6.3V6M
NC
FF
2
PR406 GND
100K_0402_5%
11
12
13
14
15
@EMI@
PC412
2
2
3.3V LDO 150mA~300mA Vout is 3.234V~3.366V
SPOK_3V
<39> SPOK_3V
ENLDO_3V5V PC402 PR403
1000P_0402_25V8J1K_0402_5%
3V_FB 1 2 1 2
<39,49> 3V_EN
@EMI@ PL403
2 HCB2012KF-121T50_0805 2
+19VB 1 2 +19VB_5V
PU402 @ PR408 PC418
@ PJ404 SY8288CRAC_QFN20_3X3 0_0603_5% 0.1U_0603_25V7K
1 2 +19VB_5V BST_5V 1 2 1 2
1 2
Choke 1.5uH SH000016700 (Common Part)
1
JUMP_43X79 (Size:7.3 x 6.6 x 3 mm)
BS
IN
IN
IN
IN
(DCR:14m~15m)
LX_5V 6
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
EMI@ PC431
20
0.1U_0402_25V6
0.1U_0402_25V6
LX LX PL404
7 19 LX_5V 1 2
GND LX +5VALWP
1
1
PC414
PC415
EMI@ PC416
@EMI@ PC417
8 18 PC419 4.7U_0402_6.3V6M 1.5UH_9A_20%_7X7X3_M

GND GND
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1 SPOK_5V_R
2
+3VLP
1
9 17 1 2
PG VCC
1
PR409
PC420
PC421
@ PC422
PC423
PC424
@ PC425
4.7_1206_5%
@EMI@
10 16
2
NC NC
OUT
LDO
EN2
EN1
1
21
FF
GND
2
PR414 @ PR413
11
12
13
14
15
100K_0402_5% 0_0402_5% VL
1 5V_SN
2
5V LDO 150mA~300mA
2
SPOK_5V 1
680P_0603_50V7K
<39> SPOK_5V
ENLDO_3V5V
PC427
Vout is 4.998V~5.202V
PC426
4.7U_0402_6.3V6M
2
@EMI@
2
5V_EN
3 3
PC413 PR407
1000P_0402_25V8J 1K_0402_5%
5V_FB 1 2 1 2
PR410
2.2K_0402_5%
1 2
EC_ON @ PR411
0_0402_5% @ PJ401
1 2 +3VALWP 1 2 +3VALW
MAINPWON 1 2
JUMP_43X118
5V_EN
1M_0402_1%
4.7U_0402_6.3V6M
1
@ PJ402
1
PR412
PC428
+5VALWP 1 2 +5VALW
1 2
JUMP_43X118
2
2
4 4
2016/01/29
Compal Secret Data
2017/06/14 Title
3.3VALWP/5VALWP
Custom

A B C D E
A B C D E
1 1
@ PJ503
JUMP_43X79 Pin19 need pull separate from +1.35VP.
1 2
1 2 +19VB_1.2VP If you have +1.35V and +0.675V sequence question, 0.6Volt +/- 5%
you can change from +1.35VP to +1.35VS. TDC 0.7A
1 2 +19VB_1.2VP PR502 Peak Current 1A
+19VB @EMI@ PL501 2.2_0603_5%
HCB2012KF-121T50_0805 BST_1.2VP_R 1 2 BST_1.2VP
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
0.1U_0402_25V6
+1.2VP
1
1
EMI@ PC510
@EMI@ PC502
EMI@ PC503
PC504
PC505
change PL501 from UG_1.2VP +0.6VSP
2
2
SM01000C000 to comm
part SM01000P200 LX_1.2VP
10U_0603_6.3V6M
10U_0603_6.3V6M
5
1
PC506
1
PC507
PC508
0.1U_0603_25V7K
16
17
18
19
20
2
PU501
2
2 2
VLDOIN
PHASE
UGATE
BOOT
VTT
4 21
PAD
Choke 1uH SH00000YE00 (Common Part) LG_1.2VP 15 1
(Size:6.86 x 6.47 x 3 mm) LGATE VTTGND
(DCR:6.2m~7.2m Ohm) PQ503 IOCP
1
2
3
AON7408L 1N DFN 14 2
PL502 PR503 PGND VTTSNS
1UH_PCMC063T-1R0MN_11A_20% 16.5K_0402_1%
1 2 LX_1.2VP 1 2 CS_1.2VP 13 3
+1.2VP PC509 CS RT8207PGQW _W QFN20_3X3 GND
1
5 1U_0402_10V6K
1 2 12 4 VTTREF_1.2VP
@EMI@ PR504 PR505 VDDP VTTREF
4.7_1206_5% 5.1_0603_5%
1 2 VDD_1.2VP 11 5
PC523
PC522
PC521
PC524
PC525
PC520
+5VALW +1.2VP
1 2
VDD VDDQ
1
PGOOD
4 PC516
1 1 1 1 1 1
TON
1
1
@EMI@ PC518 PC517 0.033U_0402_16V7K
FB
S5
S3
2
680P_0402_50V7K
2
PQ502 1U_0402_10V6K PR511

22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
2
3
10
6
2 2 2 2 2 2 AON7506_DFN33-8-5 2.2_0402_1%
FB_1.2VP
TON_1.2VP
EN_1.2VP
+5VALW Frequency PR506
EN_0.6VSP
6.19K_0402_1%
PR507 1 2 +1.2VP
470K_0402_1%
+19VB_1.2VP 1 2
3 3
Vout=0.75V* (1+Rup/Rdown)
1
H/S AON7408 Rds(on) :typ:27m Ohm, max:34m Ohm
Idsm(TA=25)=7.5A, Idsm(TA=70)=5.5A =0.75*(1+(6.19/10))
@ PR501 PR508
0_0402_5% 10K_0402_1% =1.214V 1.2%
L/S SI7716 Rds(on) :typ:13.5m Ohm, max:16.5m Ohm 1 2
2
Idsm(TA=25)=16A, Idsm(TA=70)=9.5A <13,39,43,50> SYSON
1
Choke: 7x7x3
@ PC501
0.1U_0402_10V7K
=0.75*(1+(8.2/10))
Rdc=6.2mohm(Typ), 7.2mohm(Max) =1.365V 1.1%
2
Switching Frequency: 530kHz @ PR509
Ipeak=7A, Imax=4.9A 0_0402_5%
1 2
<13,39,43,46,50,51> SUSP#
VFB=0.607V, Vout=1.214V @ PJ501
@ PR510 JUMP_43X118
0_0402_5% +1.2VP 1 2 +1.2V_VDDQ
1 2 1 2
<9> SM_PG_CTRL
1
@ PC519 @ PJ502
JUMP_43X39
0.1U_0402_10V7K 1 2
+0.6VSP +0.6VS_VTT
2
1 2
4 Mode Level +0.675VSP VTTREF_1.35V 4

S5 L off off
S3 L off on
S0 H on on
Note: S3 - sleep ; S5 - power off Security Classification

2016/01/29
Compal Secret Data
2017/06/14 Title
DDR4
Custom

A B C D E
A B C D E
@EMI@ PL601 +19VB_1VALW

1 1
HCB2012KF-121T50_0805 EN pin don't floating @EMI@ PR605 @EMI@ PC602
1 2 4.7_1206_5% 680P_0603_50V7K @ PJ601
If have pull down resistor at HW side, pls delete PR702 1 2 SNUB_1VALW 1 2 JUMP_43X118
PU601 1 2
+19VB_1VALW +1.0VALWP 1 2 +1.0VALW
+19VB 1
1 2
2 2
IN PG
9 @ PR606
0_0603_5%
PC603
0.1U_0603_25V7K
10U_0805_25V6K
0.1U_0402_25V6
0.1U_0402_25V6
@ PJ602 3 1 BST_1VALW 1 2 BST_1VALW_R 1 2 PL602
2200P_0402_50V7K
IN BS
1
JUMP_43X79 1UH_11A_20%_7X7X3_M
EMI@ PC607
EMI@ PC604
@EMI@ PC605
PC606
LDO_3V LX_1VALW
4
IN LX
6 1 2
+1.0VALWP
220U_B2_4VM_R35M
2
2
5 19 Choke 1uH SH00000YE00 (Common Part) 1
14K_0402_1%
330P_0402_50V7K
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
IN LX
1
1
(Size:6.86 x 6.47 x 3 mm)
1
@ PR607 7 20 +
PR608
PC608
PC609
PC610
PC611
PC612
@ PC615
0_0402_5% GND LX (DCR:6.2m~7.2m Ohm) Rup
8 14 FB_1VALW
2
GND FB 2
2
2
ILMT_1VALW 18 17 LDO_3V
change PL601 GND VCC
SM01000C000 to comm
1
1
EN_1VALW 11 10
EN NC
part SM01000P200 PC613 FB = 0.6V
1
@ PR609 ILMT_1VALW 13 12 2.2U_0402_6.3V6M
2
ILMT NC PR610
0_0402_5%
+3VALW 15 16
Rdown
2
BYP NC 20K_0402_1%
21
2
PAD
SY8288RAC_QFN20_3X3 Pin 7 BYP is for CS.
1
The current limit is set to 6A, 8A or 12A when this pin Common NB can delete +3VALW and PC15
PC614
is pull low, floating or pull high 1U_0402_6.3V6K
2
=0.6*(1+(14/20))
Vout=1.02V
2 2
@ PR611
10K_0402_1%
1 2
3V_EN <39,47>
PR603
10K_0402_1%
EN_1VALW 1 2
+3VALW
1
@ PC601
PR601
0.22U_0402_10V6K
2
1M_0402_1%
2
3 3
4 4
2016/01/29
Compal Secret Data
2017/06/14 Title
1V
C

A B C D E
A B C D E
@ PR7123
0_0402_5%
EN_1.8VS 1 2 SUSP#
SUSP# <13,39,43,46,48,51>
1
1 1
Current limit = 4.7A(min) PR7124 @ PC7118
0.1U_0402_16V7K
2
1M_0402_1%
2
PR7126
100K_0402_5%
2 1
+3VS PU7105 Choke 1uH SH00000YG00 (Common Part)
9
1 PGND 8 (Size:3.8 x 3.8 x 1.9 mm)
FB SGND (DCR:20m~25m)
+3VALW VIN_1.8V 2 7
PG EN PL7103
3 6 LX_1.8V 1 2
@ PJ7108 IN LX 1UH_2.8A_30%_4X4X2_F +1.8VSP
1 2 4 5
20.5K_0402_1%
68P_0402_50V8J
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1 2 PGND NC
1
@EMI@ PR7125
4.7_0603_5%
1
PR7122
PC7123
JUMP_43X79
1
SY8003ADFC_DFN8_2X2
Rup
PC7119
PC7125
@ PC7126
1
PC7127
2
2
2
22U_0603_6.3V6M
2
FB_1.8V
680P_0402_50V7K
1
1
FB=0.6V PR7121
@EMI@ PC7124
Note:Iload(max)=3A
Rdown 10K_0402_1%
2
Vout=0.6V*(1+20.5/10)
2
=1.83V (x1.017)
2 2
@ PJ7107
JUMP_43X79
1 2
+1.8VSP 1 2 +1.8VS
+3VALW
@ PJ7103
+5VALW JUMP_43X79
1 2
+2.5VP 1 2 +2.5V
2
PJ7105
2
JUMP_43X79
@
1
1
PC7210
1U_0402_6.3V6K
VIN_2.5V
2
1
FB=0.8V
PC7108 PU7102 Note:Iload(max)=3A
4.7U_0402_6.3V6M G9661MF11U_SO8
2
4 5
@ PR7110 VIN_2.5V 3 VPP NC 6
0_0402_5% 2 VIN VO 7 +2.5VP
GND
3 <13,39,43,48> SYSON 1 2 EN_2.5V 1 VEN ADJ 8 3
22U_0603_6.3V6M
22U_0603_6.3V6M
0.01U_0402_25V7K
POK GND
1
PR7115
PC7109
0.1U_0402_16V7K
9
1
1
Rup
@ PC7110
PC7111
1
PR7113 21.5K_0402_1%
PC7107
2
2
2
1M_0402_5%
2
FB_2.5V
2
1
PR7116
10K_0402_1%
Rdown Vout=0.8V* (1+Rup/Rdown)
Vout=0.8V* (1+(21.5/10)) = 2.52V (x1.008)
4 4
2016/01/29
Compal Secret Data
2017/06/14 Title
1.5VS/2.5V
C

A B C D E
5 4 3 2 1
@EMI@ PR7203 @EMI@ PC7203 @ PJ7201

4.7_1206_5% 680P_0603_50V7K 1 2
1 2 SNB_+VCCIOP 1 2 +1.0VS_VCCIOP 1 2 +1.0VS_VCCIO
JUMP_43X118
@EMI@ PL7201
HCB2012KF-121T50_0805
D D
1 2 Choke 0.68uH SH00000Z300 (Common Part)
@ PJ7202 PU7201 (Size:4.85 x 4.7 x 2.8 mm)
1 2 +VCCIOP_B+ 2 9 PR7202 PC7202 (DCR:11m~12m)
+19VB 1 2 IN PG 0_0603_5% 0.1U_0603_25V7K Real Voltage=0.95V
JUMP_43X39 3 1 +VCCIOP_BST 1 2+VCCIOP_BST_R 1 2 PL7202
10U_0805_25V6K
0.1U_0402_25V6
2200P_0402_50V7K
IN BS
1
1
0.68UH_7.9A_20%_5X5X3_M
PC7207
@EMI@ PC7217
PC7208
+VCCIOP_LX
4
IN LX
6 1 2
+1.0VS_VCCIOP
2
2
1
5 19
PC7219
330P_0402_50V7K
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
IN LX
1
1
1
7 20
Note:Iload(max)=5.5A
EMI@
PC7204
@ PC7205
PC7206
PC7211
PC7212
PC7214
10_0402_1%
2
GND LX @
PR7212
8 14 +VCCIOP_FB
IOCP=7A~8A(typ)
2
2
2
GND FB
2
PR7214
1K_0402_1%
18 17 +VCCIOP_LDO_3V
2
GND VCC
1
+VCCIOP_EN 11 10 PC7218 @
EN NC 2.2U_0402_6.3V6M
1
+VCCIOP_ILMT 13 12 FB = 0.6V Rup +1.0VS_VCCIO
2
ILMT NC 1 2 =0.6*(1+(12k/20.5k))
15 16
+3VALW BYP NC PR7218 =0.951V --- (x1.001)
1
21 12K_0402_1%
1U_0402_6.3V6K
PAD
PC7209
20.5K_0402_1%
1
2
SY8288RAC_QFN20_3X3
Rdown
2
PR7216 @
PR7215
Pin 7 BYP is for CS. 100_0402_1%
Common NB can delete +3VALW and PC15
1
@ PR7209
0_0402_5%
VCCIO_SENSE_R 1 2 VCCIO_SENSE
+VCCIOP_LDO_3V VCCIO_SENSE
@ PR7210
0_0402_5%
1
@ PR7207 1 2 VSSIO_SENSE
VSSIO_SENSE
C 0_0402_5% C
@ PR7213 VR_ON 1 2
1
0_0402_5% <39,43,52> VR_ON
2
+VCCIOP_ILMT PR7208 PR7211 @

1K_0402_5% 100_0402_1%
1
SUSP# 1 2 +VCCIOP_EN
2
@ <13,39,43,46,48,50> SUSP#
PR7217
0.1U_0402_25V6
1M_0402_5%
1
1
check delay time with HW
PC7201
PR7201
0_0402_5%
2
2
2
B B
A A

C5MMH M/B LA-E911P
C 1A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1.0VS_VCCIO
5 4 3 2 1
5 4 3 2 1
@ PR874 PC836
100_0402_1% 1000P_0402_50V7K
1 2 1 2
PR873
619_0402_1%
VSN_1PH Place close to
<11> VSSSA_SENSE 1 2 SA choke PL809 +1.0V_VCCST
PH805 PR870 PR869
2
PC837 100K_0402_1%_NCP15W F104F03RC 14K_0402_1% 7.5K_0603_1%
1 2 1 2 1 2
<54> CSN_1PH SW_1PH <54>
1000P_0402_50V7K PR875
1
D 1.5K_0402_1% D
VSP_1PH
1
1 2
<11> VCCSA_SENSE PR822
0.1U_0402_25V6
@ PR876 10_0402_1%
100_0402_1%
100_0402_1%
45.3_0402_1%
1
1
100_0402_1% PC832
PC829
1 2 1 2 4700P_0402_25V7K
PR863
PR864
PR865
+VCC_SA
2
2 1 1 2
+3VS
2
PC838
1000P_0402_50V7K PC817 PC831
2
@
2200P_0402_50V7K 0.01U_0402_25V7K
1
1 2
81205_SCLK
PR800 PR862 1 2 49.9_0402_1%
CPU_SVID_CLK <9>
470P_0402_50V7K
1
PR871 10K_0402_5%
81205_ALERT
1
+VCC_CORE 12.4K_0402_1% PR868 @ PR861 1 2 0_0402_5%
PC830
CPU_SVID_ALERT#_R <9>
2
1 2
30.9K_0402_1%
81205_SDIO
2
@ PR802 PC833 PR860 1 2 10_0402_1%
CPU_SVID_DAT <9>
2
100_0402_1% 1000P_0402_50V7K
1 2 2 1
VR_PWRGD <39>
@ PR801
0_0402_5%
VSP_3PH_A PWM1_1PH/ICCMAX1 <54>
1 2 2 1 2 1
<10> VCCSENSE
PR867
PC801 PR872 PC834 37.4K_0402_1% +VCC_GT
2
1000P_0402_50V7K 1.5K_0402_1% 0.015U_0402_25V7K 1 2
@ PR857
@ PR804 PR803 1 2 1 2 100_0402_1%
VR_ON <39,43,51>
1
0_0402_5% 1K_0402_1% 2 1
1 2 1 2 VSN_3PH_A
PC835 @ PR866 @ PR856
<10> VSSSENSE
@ PR805 15P_0402_50V8J 0_0402_5% 0_0402_5%
PWM1_1PH/ICCMAX1
100_0402_1% 1 2
1 2 1 2
VCCGT_SENSE <10>
VSN_1PH
81205_ALERT
2
81205_SCLK
CSN_1PH_R
81205_SDIO
PC802 PC828
COMP_1PH
IMON_1PH
VSP_1PH
CSP_1PH
ILIM_1PH
2200P_0402_50V7K 2200P_0402_50V7K
PR853
1
1K_0402_1%
+1.0V_VCCST 1 2 1 2
VSSGT_SENSE <10>
H44e: @ PR855
PR806=22.6K H44e: PU801 1 2 @ PR854 100_0402_1%
H42: PR810=12.1K NCP81205MNTXG_QFN52_6X6 0_0402_5% 2 1
53
52
51
50
49
48
47
46
45
44
43
42
41
40
2
PC805 PR807 PC804 PR806=23.2K H42: PC827
15P_0402_50V8J 49.9_0402_1% 470P_0402_50V8J PR810=13.7K PR859 @ 2200P_0402_50V7K
ALRT#
SDIO
VSP_1PH
VSN_1PH
COMP_1PH
ILIM_1PH
CSN_1PH
CSP_1PH
IMON_1PH
PWM_1PH/ICCMAX_1PH
EN
TAB
VR_RDY
SCLK
1 2 1 2 1 2 H42@ PR806
23.2K_0402_1% 1K_0402_1% PR852 PR851 PC825 PC824
PR809 PC806 PR808 1 2 PR858 24.9K_0402_1% 49.9_0402_1% 470P_0402_50V8J 15P_0402_50V8J
1
3.3K_0402_1% 2200P_0402_50V7K 604_0402_1% 100_0402_1% 1 2 1 2 1 2 1 2
1 2 1 2 1 2 VSP_3PH_A 1 39 1 2
PC803 VR_HOT# <39>
VSN_3PH_A 2 VSP_3PH_A VRHOT# 38
470P_0402_50V8J PC826
C 1 2 3 VSN_3PH_A VSP_3PH_B 37 470P_0402_50V8J 1 2 1 2 1 2 C
DIFFOUT_3PH_A 4 IMON_3PH_A VSN_3PH_B 36 1 2
FB_3PH_A 5 DIFFOUT_3PH_A IMON_3PH_B 35 DIFFOUT_3PH_B
PR850 PR849 PC823
COMP_3PH_A 6 FB_3PH_A DIFFOUT_3PH_B 34 FB_3PH_B
604_0402_1% 3.3K_0402_1% 2200P_0402_50V7K
ILIM_3PH_A COMP_3PH_A FB_3PH_B COMP_3PH_B
H42@ PR810 1 2 13.7K_0402_1% 7 33
CSCOMP_3PH_A ILIM_3PH_A COMP_3PH_B ILIM_3PH_B
Place close to CSSUM_3PH_A
8
CSCOMP_3PH_A ILIM_3PH_B
32
CSCOMP_3PH_B
PR848 1 2 16.2K_0402_1%
IA choke PL803 9 31 Place close to
75K_0402_1%
PWM1_3PH_A/ICCMAX_3PH_A
PWM1_3PH_B/ICCMAX_3PH_B
CSSUM_3PH_A CSCOMP_3PH_B CSSUM_3PH_B
1
10 30 GT choke PL806
(phase 1) CSP1_3PH_A CSREF_3PH_A CSSUM_3PH_B CSREF_3PH_B
1
11 29
PR811
75K_0402_1%
CSP2_3PH_A CSP1_3PH_A CSREF_3PH_B CSP1_3PH_B (phase 1)
PWM3_3PH_B/ROSC_3PH
PWM2_3PH_B/ROSC_1PH
PH801 12 28 PH804
PR847
56P_0402_50V8
820P_0402_50V7K
CSP3_3PH_A 13 CSP2_3PH_A CSP1_3PH_B 27 CSP2_3PH_B

H44e: 220K_0402_5%_ERTJ0EV224J H44e:
PWM3_3PH_A/VBOOT
CSP3_3PH_A CSP2_3PH_B
1
TTSENSE_1PH/PSYS
PWM2_3PH_A/ADDR
PR160,PR162,PR165=127K 220K_0402_5%_ERTJ0EV224J PR843,PR844,PR845=147K
PC808
PC807
56P_0402_50V8
680P_0402_50V7K
2
1
H42: PC809 H42:
PC822
PC821
TTSENSE_3PH_A
TTSENSE_3PH_B
2
1
PR160,PR162,PR165=113K PR843,PR844,PR845=86.6K
165K_0402_1%
1
1
0.1U_0402_50V7K PC820
CSP3_3PH_B
2
1
H42@ PR813 1 2 124K_0402_1% 0.1U_0402_50V7K 2016/03/13 SL200000500->X1 ,Change to common part SL200002I00
PR812
165K_0402_1%
<53> SW1_3PH_A
2
VRMP
PR846
<53> SW2_3PH_A
H42@ PR814 1 2 124K_0402_1% connect +19VB_CPU
DRON
VRMP
86.6K_0402_1% 2 1 PR845
to 3A rail
VCC
SW1_3PH_B <53>
2
H42@ PR815 1 2 124K_0402_1%

<53> SW3_3PH_A
2
86.6K_0402_1% 2 1 PR844
SW2_3PH_B <53>
1
2016/03/13 SL200000500->X1 ,Change to common part SL200002I00
14
15
16
17
18
19
20
21
22
23
24
25
26
PR816 1 2 10_0402_1% PR825
<53> CSN1_3PH_A
PC813
PR817 1 2 10_0402_1% 1K_0402_1% 0.1U_0402_25V6
<53> CSN2_3PH_A TSENSE_3PH_A CSP3_3PH_B PSYS_MON <46>
PC814 1 2 10_0402_1% 2 1 PR842
CSREF_3PH_A CSN1_3PH_B <53>
2
PR818 1 2 10_0402_1% 0.01U_0402_50V7K PC816
<53> CSN3_3PH_A
1 2 0.1U_0402_25V6 PR833 10_0402_1% 2 1 PR841
TSENSE_3PH_B 1 2 CSN2_3PH_B <53>
20K_0402_1%
1 2 1 2
+5VALW
<53,54> DRON 1 2
PR819 PR826
1
1.65K_0402_1% 2.2_0402_1% PC815
SW1_3PH_A 1 2 CSP1_3PH_A
H42@ PR832
1U_0402_10V6K 43.2K_0402_1%
53.6K_0402_1%
2
1
PWM1_3PH_B/ICCMAX3B <53>
1
PC810
PR827
3.92K_0402_1%
24.9K_0402_1%
97.6K_0402_1%
97.6K_0402_1%
1
1
0.1U_0402_25V6 PR839
CSREF_3PH_A PWM2_3PH_B/DOSC1 <53>
2
1.65K_0402_1%
PR828
PR829
PR830
PR831
<53> PWM1_3PH_A/ICCMAX3A
2
CSP1_3PH_B 1 2 SW1_3PH_B
PR820
1.65K_0402_1%
SW2_3PH_A 1 2 CSP2_3PH_A
<53> PWM2_3PH_A/ADDR
1
@ PR878 PC819
1
PC811 1.65K_0402_1%
Prevention current imbalance 0.1U_0402_25V6
2
0.1U_0402_25V6
<53> PWM3_3PH_A/VBOOT
2
2
CSREF_3PH_A CSREF_3PH_B
B PR821 The PR829 will change to 169K ohm, B
1.65K_0402_1% PR838
SW3_3PH_A 1 2 CSP3_3PH_A then IA GT SA vboot=1.05V. 1.65K_0402_1%
CSP2_3PH_B 1 2 SW2_3PH_B
1
1
PC812
1
@ PR877 PC818
0.1U_0402_25V6 1.65K_0402_1%
2
0.1U_0402_25V6
CSREF_3PH_A
2
Prevention current imbalance
2
CSREF_3PH_B
TSENSE_3PH_A TSENSE_3PH_B
1
1
+5VALW
@ PR823 @ PR834
Place close to 0_0402_5% Place close to 0_0402_5%
IA MOS GT MOS
2
1
1
1
H42@ PR836
PH802 PR824 PH803 PR835
1K_0402_1%
100K_0402_1%_NCP15W F104F03RC 61.9K_0402_1% 100K_0402_1%_NCP15W F104F03RC 61.9K_0402_1% PHASE DETECTION
2
2
2
CSP3_3PH_B
(Common Part)
SL200002H00
A A
Title
CPU_IC

D C5MMH M/B LA-E911P 1A

5 4 3 2 1
5 4 3 2 1
EMI@ PL800
HCB2012KF-121T50_0805
+19VB_CPU 1 2 +19VB_CPU
+19VB PC856 PC855 PC854 PC853
PC873
PC872
PC844 PC843 PC842 PC841 @ EMI@ PL801
PC895
PC896
PC897
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
1
1
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
HCB2012KF-121T50_0805
1
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
1 1 1 2
PR890
2
+ +
100U_25V_M
100U_25V_M
PR881 2.2_0603_1%
EMI@
EMI@
EMI@
2
2
2.2_0603_1% PR898 @ PJ801 JUMP_43X118 BOOT1_VCCGT 1 2
BOOT1_VCORE 1 2 0_0603_5% 1 2 1 2 DRVH1_VCCGT-1
1 2DRVH1_VCORE-1 2 2 1 2 PQ807
PQ801 PC890 PR897 0_0603_5% AON6992_DFN5X6D-8-7
2
PC881 AON6992_DFN5X6D-8-7 (Common Part) SF000007100 0.22U_0603_25V7K
2
0.22U_0603_25V7K PU805
100U 25V M 6.3X6
G1
D1
1
PU802 PL803 NCP81151MNTBG_DFN8_2X2 PL806
G1
D1
1
D NCP81151MNTBG_DFN8_2X2 0.15UH_MMD06CZER15MG_37A_20% 1 9 0.15UH_MMD06CZER15MG_37A_20% D
1 9 1 4 BST FLAG 7 VSW1_VCCGT 1 4
BST FLAG +VCC_CORE DRVH1_VCCGT D2/S1 +VCC_GT
2
7 2 8
<52> PWM1_3PH_B/ICCMAX3B
2
2 8 DRVH1_VCORE D2/S1 2 3 PWM DRVH 2 3
<52> PWM1_3PH_A/ICCMAX3A PWM DRVH VSW1_VCCGT
Choke 0.15uH SH00000X700 DRON 3 7
G2
S2
S2
S2
VSW1_VCORE EN SW
3 7 Choke 0.15uH SH00000X700
G2
(Size:6.59 x 6.6 x 3.0 mm)
S2
S2
S2
<52,54> DRON EN SW 4 6
(DCR:0.9m +-7%) +5VALW VCC GND (Size:6.59 x 6.6 x 3.0 mm)
3
1
1
4 6 EMI@ @EMI@
+5VALW (DCR:0.9m +-7%)
3
VCC GND PR882 5 DRVL1_VCCGT PR891
5 DRVL1_VCORE DRVL
DRVL 4.7_1206_5% 4.7_1206_5%
CSN1_3PH_A <52> CSN1_3PH_B <52>
1
PC889
1
PC880
2
2.2U_0402_6.3V6M
2
2.2U_0402_6.3V6M SNB1_VCORE SNB1_GT
2
SW1_3PH_A <52> SW1_3PH_B_R SW1_3PH_B <52>
1
EMI@ @EMI@ 1 2
PC882 PC891
680P_0603_50V7K 680P_0603_50V7K @ PR886 near choke
2
0_0402_5%
+19VB_CPU +19VB_CPU
PC848 PC847 PC846 PC845 PC860 PC859 PC858 PC857
1
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
PR884 PR893
2
2.2_0603_1% PR896 2.2_0603_1%
BOOT2_VCORE 1 2 0_0603_5% BOOT2_VCCGT 1 2
1 2 DRVH2_VCORE-1 1 2 DRVH2_VCCGT-1
PQ803 PQ809
PC884 AON6992_DFN5X6D-8-7 PC893 PR899 0_0603_5% AON6992_DFN5X6D-8-7
C C
2
0.22U_0603_25V7K 0.22U_0603_25V7K
PU803 PL804 PU806
G1
D1
G1
D1
1
1
NCP81151MNTBG_DFN8_2X2 0.15UH_MMD06CZER15MG_37A_20% NCP81151MNTBG_DFN8_2X2 PL807
1 9 1 4 1 9 0.15UH_MMD06CZER15MG_37A_20%
BST FLAG 7 +VCC_CORE BST FLAG 7 1 4
DRVH2_VCORE D2/S1 DRVH2_VCCGT D2/S1 +VCC_GT
2
2
2 8 2 3 2 8
<52> PWM2_3PH_A/ADDR PWM DRVH <52> PWM2_3PH_B/DOSC1 PWM DRVH 2 3
VSW2_VCORE VSW2_VCCGT
DRON 3 7 Choke 0.15uH SH00000X700 DRON 3 7
G2
G2
S2
S2
S2
S2
S2
S2
EN SW EN SW
(Size:6.59 x 6.6 x 3.0 mm) Choke 0.15uH SH00000X700
4 6 4 6
+5VALW VCC GND (DCR:0.9m +-7%) +5VALW VCC GND (Size:6.59 x 6.6 x 3.0 mm)
3
1
1
EMI@ @EMI@
5 DRVL2_VCORE PR885 5 DRVL2_VCCGT PR894 (DCR:0.9m +-7%)
DRVL DRVL
4.7_1206_5% 4.7_1206_5%
CSN2_3PH_A <52> CSN2_3PH_B <52>
1
1
PC883 PC892
2
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M
SNB2_VCORE SNB2_GT
2
2
SW2_3PH_A <52> SW2_3PH_B_R SW2_3PH_B <52>
1
EMI@ @EMI@ 1 2
PC885 PC894
680P_0603_50V7K 680P_0603_50V7K @ PR892 near choke
2
0_0402_5%
+19VB_CPU
PC852 PC851 PC850 PC849
1
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
PR887
2
2.2_0603_1% PR895
BOOT3_VCORE 1 2 0_0603_5%
B B
1 2DRVH3_VCORE-1
PQ805 ：
For H-line 42： For H-line 42：：
PC887 AON6992_DFN5X6D-8-7 VCC_CORE (LL=1.8m) VCC_GT (LL=2.65m)
1
0.22U_0603_25V7K
PU804 PL805 FSW = 600kHz FSW = 600kHz
G1
D1
1
1
NCP81151MNTBG_DFN8_2X2
9
0.15UH_MMD06CZER15MG_37A_20%
1 4
DCR = 0.9m Ohm +/- 7% DCR = 0.9m Ohm +/- 7%
BST FLAG 7 +VCC_CORE
2
2 8 DRVH3_VCORE D2/S1 2 3
<52> PWM3_3PH_A/VBOOT PWM DRVH I(max)=50A I(max)=25A
VSW3_VCORE
DRON 3 7 Choke 0.15uH SH00000X700 I(peak)=68A I(peak)=55A
G2
S2
S2
S2
EN SW
4 6
(Size:6.59 x 6.6 x 3.0 mm) Vboot=0V Vboot=0V
+5VALW (DCR:0.9m +-7%)
6
VCC GND
1
EMI@
5 DRVL3_VCORE
PR888
DRVL
4.7_1206_5% TYP MAX DaulMOS AON6992 TYP MAX
1
PC886 CSN3_3PH_A <52>

H/S_AON6428 Rds(on) = 11.3m Ohm , 14.5m Ohm H/S Rds(on) = 6.8m Ohm , 8.6m Ohm
2
2.2U_0402_6.3V6M
SNB3_VCORE L/S_AON6794 Rds(on) = 2.8m Ohm , 3.5m Ohm L/S Rds(on) = 2.0m Ohm , 2.5m Ohm
2
EMI@ SW3_3PH_A <52>

PC888
680P_0603_50V7K
2
A Function Field : A
Drivers - 36.2
Rest of support elements - 36.3
Acoustic Noise B+ Bulk CAP - 37.2

C5MMH M/B LA-E911P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Re v
Custom 1A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. VCC/VCCGT
5 4 3 2 1
5 4 3 2 1
+19VB_CPU
PC870 PC867 PC866 PC865
@ @
1
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2
2
PR901 PC899
D 2.2_0603_1% 0.22U_0603_25V7K D
1 2 BST_R_+VCC_SA 1 2 HG_+VCC_SA
Choke 0.47uH SH00001ED00 (Commom Part)

PU808
(Size:5.7 x 5.4 x 3.0 mm)
(DCR:6.2m +-5%)
4
NCP81253MNTBG_DFN8_2X2
G1
D1
D1
D1
BST_+VCC_SA 1 8 PL809
BST DRVH 0.47UH_MMD05CZR47M_12A_20%
2 7 SW _+VCC_SA 9 10 SW _+VCC_SA 1 4
<52> PW M1_1PH/ICCMAX1 PWM SW D2/S1 D1 +VCC_SA
3 6 2 3
<52,53> DRON EN GND PQ811
G2
S2
S2
S2
4 5 AON7934_DFN3X3A8-10
+5VALW
PAD
VCC DRVL
1
@EMI@
5
PR900
4.7_1206_5%
9
1
PC898
CSN_1PH <52>
2
2.2U_0402_6.3V6M LG_+VCC_SA
2
SNB_SA
1
@EMI@
PC900 SW_1PH <52>
680P_0603_50V7K
2
C C
：
For H-line 42：
VCC_SA (LL=10m)
FSW = 600kHz
DCR = 6.2m Ohm +/- 5%
I(max)=10A
I(peak)=12A
Vboot=1.05V
DaulMOS AON7934 TYP MAX

H/S Rds(on) = 12.4m Ohm , 15.8m Ohm
L/S Rds(on) = 9.1m Ohm , 11.6m Ohm
B B
Function Field :
A Drivers - 36.2 A
Rest of support elements - 36.3

C5MMH M/B LA-E911P
Custom 1A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. VCCSA
5 4 3 2 1
A
B
C
D
2 1 2 1 2 1
+VCC_CORE
PC1055 PC1044 PC1033
2
1
+
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M

PC868
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 220U_D2_2V_Y
@
PC1086 PC1076 PC1066 PC1056 PC1045 PC1034 PC1021 PC1011 PC1001
+VCC_CORE
2
1
+
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

PC869
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
5
5
220U_D2_2V_Y

2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
@
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1

2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
220uF X 2
@
1uF_0201 X 63
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
+VCC_CORE (IA)
@
@

2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
22uF_0603 X 20(+10@)
@
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
@
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
@

4
4
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
@

2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
@
+VCC_GT
PC1173 PC1163 PC1153 PC1143 PC1133 PC1123 PC1111 @ PC1101

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
2
1
+

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 220U_D2_2V_Y
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
2
1
+
PC1183 PC1175 PC1165 PC1155 PC1145 PC1135 PC1125 @ PC1113 PC1103 @ PC877
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 560U_D2_2VM_R4.5M
+VCC_GT
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
@
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1

Common part
SGA00009S00
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
@
3
3
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
@ @
+VCC_GT
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1

1uF_0201 X 68
Issued Date
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
220uF X 1 (+1@)
@
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
22uF_0603 X 18(+20@)

2016/01/29
2 1 2 1
@
+VCC_GT
PC1649 PC1121
22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
@
@ PC1650 PC1122
22U_0603_6.3V6M 22U_0603_6.3V6M
2
2
2 1 2 1
Compal Secret Data
2 1 @
Deciphered Date
PC1651 PC1641
+VCC_SA
PC1203 22U_0603_6.3V6M 22U_0603_6.3V6M

1U_0201_6.3V6M
2 1 2 1
2 1 2 1 2 1
@ PC1652 PC1642
PC1204 PC1197 PC1191 22U_0603_6.3V6M 22U_0603_6.3V6M
1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2 1 2 1 2 1
@ PC1653 PC1643
+VCC_SA
PC1205 PC1198 PC1192 22U_0603_6.3V6M 22U_0603_6.3V6M

1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2017/06/14
2 1 2 1
2 1 2 1 2 1
@ PC1654 PC1644
1uF_0201 X 7
PC1206 @ PC1199 PC1193 22U_0603_6.3V6M 22U_0603_6.3V6M

1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2 1 2 1 2 1
@ PC1655 PC1645
PC1207 PC1200 PC1194 22U_0603_6.3V6M 22U_0603_6.3V6M
1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
Title
Date:
2 1 2 1
22uF_0603 X 10(+2@)
2 1 2 1 2 1
Custom
@
@ PC1656 PC1646
PC1208 PC1201 PC1195 22U_0603_6.3V6M 22U_0603_6.3V6M
1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1
2 1 2 1 2 1 @
PC1647
PC1209 PC1202 @ PC1196 22U_0603_6.3V6M
Size Document Number
1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1
CPU CAP
Tuesday, April 11, 2017
@ PC1648
22U_0603_6.3V6M
1
1
C5MMH M/B LA-E911P
Sheet
55
of
64
R ev
1A
A
B
C
D
A B C D E
+19VB
@VGA_EMI@ PL1301
HCB2012KF-121T50_0805
TYP MAX 1 2
H/S_AON6428 Rds(on) = 11.3m Ohm , 14.5m Ohm
L/S_AON6794 Rds(on) = 2.8m Ohm , 3.5m Ohm +19VB_1.35VSDGPUP 1
1 2
2
10U_0805_25V6K
10U_0805_25V6K
@ PJ1301
2200P_0402_50V7K
0.1U_0402_25V6
0.1U_0402_25V6
1
1
1 JUMP_43X79 1
VGA_EMI@ PC1302
@VGA_EMI@ PC1303
VGA@ PC1304
VGA@ PC1310
VGA_EMI@ PC1312
5
<23> 1.35VS_DGPU_PG VGA@ PQ1301
2
AON6380 1N DFN5X6-8
VGA@ PR1312 4
1 2
+3VS 10K_0402_5%
PU1301 VGA@
IOCP RT8237EZQW (2)_W DFN10_3X3 VGA@ PR1302 VGA@ PC1305 Choke 0.82uH SH00000FH00
3
2
1
0_0603_5% 0.1U_0603_25V7K
VGA@ PR1301 1 10 BST_1.35VSDGPUP 1 2 1 2
(Size:6.95 x 6.6 x 2.8 mm)
PR1303 VGA@ 69.8K_0402_1% PGOOD BOOT (DCR:6.7m~8m Ohm)
10K_0402_1% 1 2ILMT_1.35VSDGPUP 2 9 HGATE_1.35VSDGPUP VGA@ PL1302
CS UGATE 0.82UH PCMC063T-R82MN 13A_20%
1.35VS_DGPU_EN LX_1.35VSDGPUP
<23> 1.35VSDGPU_PW R_EN
2 1 3
EN PHASE
8 1 2
+1.35VSDGPUP
4 7
VGA@ PC1306
0.1U_0402_16V7K
FB VCC +5VALW
1
5
@VGA@
1
5 6 LGATE_1.35VSDGPUP
220U_D2 SX_2VY_R9M
220U_D2 SX_2VY_R9M
1M_0402_1% RF LGATE PR1305 1 1
2
PR1304 11
PC1301
PC1311
TP 4.7_1206_5%
+ +
VGA_EMI@
2
1
4
2
1
VGA@ VGA@
SNB_1.35VSDGPUP
1
PR1306 PC1307 2 2
Frequency 1U_0603_6.3V6M
VGA@
VGA@
200K_0402_1% VGA@ PR1314
2
2 VGA@ PQ1303 100_0402_1%
2
3
2
1
Rrf=470K ->290KHz AON6314 1N DFN5X6-8
2
Rrf=200K ->340KHz VGA@ PC1313 VGA@ PR1315
1
680P_0402_50V7K 49.9_0402_1%
Rrf=100K ->380KHz 1 2 1 2 PC1308
680P_0603_50V7K
2
VGA_EMI@
1
VGA@ PR1307
1.35VS_DGPU_FB 2 1 1 2
PR1310 VGA@ FB_VDDQ_SENSE <26>
90.9K_0402_1% 18.7K_0402_1% @VGA@ PR1313 0_0402_5%
1
2
VGA@
PR1308
D
1
VGA@ PQ1302 20K_0402_1%

1 2 2 VFB=0.704V
2
<23> VRAM_VDD_CTL 2N7002KW _SOT323-3

G
1
PR1309 S
3
VGA@ PR1311 0_0402_5%

@VGA@ PC1309
0.1U_0402_16V7K
1
10K_0402_1% @VGA@
Vout=0.704V* (1+(18.7/20))=1.36 0.97%
2
Vout=0.704V* (1+(18.7/(20//93.1)))=1.5 0.03% @ PJ1302

Vout=0.704V* (1+(18.7/(20//90.9)))=1.524 1.62% +1.35VSDGPUP 1
1 2
2 +1.35VSDGPU
Vout=0.704V* (1+(18.7/(20//88.7)))=1.548 3.23% JUMP_43X118
3 Rds on 2.8 / 3.5mohm 3

Change the output voltage from 1.35V to 1.5V @ PJ1303
Rlimt=69.8K 1
1 2
2
JUMP_43X118
4 4
2016/01/29
Compal Secret Data
2017/06/14 Title
VRAM
A3

A B C D E
@ PJ1401
JUMP_43X79
1 2
+1.0VSDGPUP 1 2 +1.0VSDGPU
1 1
VGA@ PC1402 Choke 1uH SH00000YG00 (Common Part)

22U_0603_6.3V6M
(Size:3.8 x 3.8 x 1.9 mm)
1 2 VGA@ PU1401 (DCR:20m~25m)
SY8032ABC_SOT23-6
@ PJ1402 VGA@ PL1401
JUMP_43X79 1UH_2.8A_30%_4X4X2_F
1 2 VIN_1.0VSDGPUP 4 3 LX_1.0VSDGPUP 1 2
+3VALW 1 2 IN LX +1.0VSDGPUP
5 2
<23> 1VS_DGPU_PG PG GND Rup
VGA@ PC1401
68P_0402_50V8J
VGA@ PR1401 6 1 VGA_EMI@
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
FB EN
1
1 2 PR1402
+3VS
1
4.7_0603_5% VGA@
VFB=0.6V
@VGA@ PC1406
VGA@ PC1403
VGA@ PC1407
VGA@ PR1406 10K_0402_5% PR1403
2
10K_0402_1% 13.7K_0402_1%
2
2 1 EN_1.0VSDGPUP
<23,59> VGA_CORE_S_EN =0.6V* (1+13.7/20)
2
SNUB_1.0VSDGPUP
Vout=1.011V
1
FB_1.0VSDGPUP
VGA@ PR1404 VGA@ PC1404
1M_0402_1% 0.1U_0402_16V7K
Rdown
1
2
VGA@
PR1405
1
VGA_EMI@ 20K_0402_1%
PC1405
2
680P_0402_50V7K
2
Note:
When design Vin=5V, please stuff snubber
2
to prevent Vin damage 2
3 3
4 4
2016/01/29
Compal Secret Data
2017/06/14 Title
1.05VSDGPU
C

A B C D E
VGA_EMI@
PL1504
+19VB_GPU_NVVDD HCB2012KF-121T50_0805
1 2
VGA_EMI@ +19VB
PL1501
HCB2012KF-121T50_0805
1 2
100U_25V_NC_6.3X6
1
VGA@ PC1504
VGA@ PC1505
VGA@ PC1506
@VGA@ PC1507
0.1U_0402_25V6
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
2200P_0402_50V7K
+ 2 1
@VGA_EMI@ PC1502
VGA_EMI@ PC1503
PC1508
2 1
1
@
2 PJ1501
2
JUMP_43X118
@VGA@
+5VS
VGA@ PC1509
4.7U_0402_6.3V6M
1
High: >1.5V
Low: <0.7V
2
(Common Part) SF000007100
100U 25V M 6.3X6
EN can't float
+VGA_CORE
@VGA@ NVVDD_LG1 NVVDD_LG2
PR1501 VGA@ PL1502
<23> VGA_CORE_EN NVVDD_SW1 NVVDD_SW2
0_0402_5% 0.22UH_MMD-10DZ-R22MES1L__35A_20%
2 1 NVVDD_SW1 1 4
1
VGA@
1
VGA@ PC1511 PC1510 2 3
1 @VGA@ 0.22U_0603_25V7K 0.22U_0603_25V7K
2
PC1501 NVVDD_HG1 NVVDD_HG1
2
+3VS
0.1U_0402_16V7K VGA@ Choke 0.22uH SH00000QZ00
2
PU1501
20
19
18
17
16
(Size:11.5 x 10 x 4.0 mm)
2
VGA@ NCP81278MNTXG_QFN20_3X3
PR1502 VGA@ (DCR:0.82m +-5%)
PH1
LG1
LG2
PH2
G1
D1
G1
D1
PVCC
1
+5VS +1.8VS 2.2_0603_1% PR1503
2.2_0603_1% VGA@
NVVDD_BST1 1 15 NVVDD_BST2 PR1504 7 7
10K_0402_1%
10K_0402_1%
2
BST1 BST2 D2/S1 D2/S1
1
1
100K_0402_5%
VGA@
@VGA@
PR1525
PR1505
@VGA_EMI@
2200P_0603_50V7K 2.2_1206_1%
NVVDD_HG1 2 14 NVVDD_HG2
PR1506
2
@VGA@ HG1 HG2
G2
G2
S2
S2
S2
S2
S2
S2
PR1507 NVVDD1_EN 3 13 VGA_CORE_PG <23>
0_0402_5% EN PGOOD VGA@ PQ1501 VGA@ PQ1502
2
2
1 2 NVVDD_PSI_R 4 12 NVVDD_COMP 1 2 AON6992_DFN5X6D-8-7 AON6992_DFN5X6D-8-7
> DGPU_PSI PSI COMP/OPT
1
2
2 1 NVVDD_VID_R 5 11 VGA@ @VGA@ PR1508
@VGA_EMI@
<23> DGPU_VID VID FB
1
@VGA@ PR1509 PR1511 75K_0402_1% NVVDD_LG1 NVVDD_LG1
VIDBUF
PC1512
FBRTN
REFIN
VREF
10K_0402_1% @VGA@ PR1510 51.1K_0402_1%
GND
Avoid high dV/dt 0_0402_5%
FS
2
1
VGA@
2
1 1
PC1513
21
9
NVVDD_FBRTN 10
VGA@ 22P_0402_50V8J
2
PC1514
220P_0402_50V8J
NVVDD_FS
2
+19VB_GPU_NVVDD
NVVDD_FB
NVVDD_VIDBUF
1
VGA@
1
PR1513 VGA@
NVVDD_REFIN 10K_0402_5% PR1514
R1 VGA@ 49.9_0402_1%
R4 C for ON PR1512
1 2
1
39.2K_0402_1%
VGA@ PR1516
VGA@ PR1517
@VGA_EMI@ PC1518
VGA_EMI@ PC1519
PC1520
VGA@ PC1521
VGA@ PC1522
VGA@ PC1523
6.19K_0402_1%
16.5K_0402_1%
0.1U_0402_25V6
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
2200P_0402_50V7K
2
2
R3 VGA@
VGA@ PR1515
4.32K_0402_1%
4700P_0402_50V7K
1
1
NVVDD_VREF PC1515
VGA@ PC1516
47P_0402_50V8J
2
VGA@ PC1517
2
2
1 2
@VGA@
1
VGA@
2
PC1524 1000P_0402_25V
0.01U_0402_16V
2
R5
VGA@ PR1518
1
309_0402_1%
PR1519 PR1520 +VGA_CORE

0_0402_5% 0_0402_5%
@VGA@ @VGA@ VGA@
PR1521 100_0402_5% NVVDD_HG2 NVVDD_HG2
2
2
1 2
+VGA_CORE
R2 VGA@ PL1503
2
0.22UH_MMD-10DZ-R22MES1L__35A_20%
1 2 VCCSENSE_VGA <25> 1 4
G1
D1
G1
D1
4700P_0402_50V7K
VGA@ PR1522 Avoid high dV/dt 2 3

@VGA@ PC1525
1
VSSSENSE_VGA <25>
C 20.5K_0402_1% 7
D2/S1
7
D2/S1
1
@VGA_EMI@
PR1523 Choke 0.22uH SH00000QZ00
1 2 2.2_1206_1%
G2
G2
S2
S2
S2
S2
S2
S2
(Size:11.5 x 10 x 4.0 mm)
2
NVVDD_SW2
2
PR1524 100_0402_5% VGA@ PQ1503 VGA@ PQ1504 (DCR:0.82m +-5%)
3
VGA@ AON6992_DFN5X6D-8-7 AON6992_DFN5X6D-8-7
1
@VGA_EMI@
Place close to GPU PC1526
2200P_0603_50V7K
R1, R2, R3, R4, R5, C are
2
based on VGA type to set.
NVVDD_LG2
NVVDD_LG2
For N17P-G1：：50 W [ N17P- G0

：4 0W]
VGA_CORE (NVVDD)
FSW = 450kHz
DCR = 0.82m Ohm +/- 5%
TDC=45A
I(max)=106A
Vboot=0.8V

H/S Rds(on) = 6.8m Ohm , 8.6m Ohm
L/S Rds(on) = 2.0m Ohm , 2.5m Ohm
Please base on GPU spec to calculate.

VGA_CORE
1A
1 2 3 4 5
A A
+5VS
VGA@ PC1602
4.7U_0402_6.3V6M
1
VGA_EMI@ PL1601
+19VB_GPU_NVVDDS HCB2012KF-121T50_0805 +19VB
2
1 2
High: >1.5V NVVDDS_LG1

1
1 2
2
Low: <0.7V
2200P_0402_50V7K
@ PJ1601
@VGA_EMI@ PC1616
VGA_EMI@ PC1617
VGA@ PC1603
VGA@ PC1604
@VGA@ PC1605
@VGA@ PC1606
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
NVVDDS_SW1
EN can't float JUMP_43X118
1
1
@VGA@ VGA@
2
PR1601 PC1607
<23,57> VGA_CORE_S_EN
0_0402_5% 0.22U_0603_25V7K
2
2 1 +3VS NVVDDS_HG1
VGA@ PU1601
20
19
18
17
16
1
1
@VGA@ VGA@ NCP81278MNTXG_QFN20_3X3
PC1601 PR1602
PH1
LG1
LG2
PH2
PVCC
1
+1.8VS 0.1U_0402_16V7K 2.2_0603_1%
2
VGA@
NVVDDS_BST1
1 15 PR1604
2
BST1 BST2
1
100K_0402_5%
VGA@ NVVDDS_HG1 2 14
2
HG1 HG2
2
PR1603
@VGA@ PR1605 NVVDD2_EN 3 13 VGA_CORE_S_PG <23>
10K_0402_1%
G1
D1
0_0402_5% EN PGOOD VGA@ PQ1602
2
1 2 4 12 NVVDDS_COMP 1 2 AON6992_DFN5X6D-8-7
<23,58> DGPU_PSI PSI COMP/OPT NVVDDS_SW1
@VGA@ PR1606 7
D2/S1
1
2
2 1 5 11 VGA@ 75K_0402_1%
<23> DGPU_S_VID VID FB
VGA@ PR1609 +VGA_CORE_S
VIDBUF
FBRTN
REFIN
VREF
PR1608 @VGA@ PR1607 51.1K_0402_1% Choke 0.22uH SH000011H00 (Common Part)
G2
S2
S2
S2
GND
10K_0402_1% 0_0402_5%
FS
(Size:7.6 x 6.6 x 3.8 mm)
1
Avoid high dV/dt VGA@
2
1 1
3
PC1608 (DCR:0.98m +-5%)
21
10
B VGA@ 22P_0402_50V8J VGA@ PL1602 B
2
PC1609 0.22UH_24A_20%_ 7X7X4_M
220P_0402_50V8J 1 4
2
1NVVDDS_FS
1
@VGA_EMI@ 2 3
1
NVVDDS_VIDBUF PR1610
VGA@ NVVDDS_LG1
2.2_1206_1%
PR1611
1
49.9_0402_1%
1 2
NVVDDS_REFIN
R1 VGA@ VGA@
1 2
PR1612 PR1613 @VGA_EMI@
R3 R4 C for ON 39.2K_0402_1% 10K_0402_5% VGA@ PC1610
1
PC1611 2200P_0603_50V7K
VGA@ PR1614
VGA@ PR1616
6.19K_0402_1%
16.5K_0402_1%
4700P_0402_50V7K
2
47P_0402_50V8J
VGA@ PR1615
VGA@ PC1612
4.32K_0402_1%
2
1
NVVDDS_VREF 1 2
VGA@ PC1613
2
1000P_0402_25V
VGA@ PC1614
0.01U_0402_16V
2
1
2
PR1617 PR1618
R5
VGA@ PR1619
0_0402_5% 0_0402_5%
1
309_0402_1%
@VGA@ @VGA@
2
VGA@ PR1620
100_0402_5%
2
1 2 +VGA_CORE_S
R2
1 2 VCCSENSE_VGA_S <27>
For N17P-G1：：50 W [ N17P- G0
：4 0W]
4700P_0402_50V7K
VGA@ PR1621 Avoid high dV/dt VGA_CORE_S (NVVDDS)

@VGA@ PC1615
VSSSENSE_VGA_S <27>
C 20.5K_0402_1%
FSW = 450kHz
1
1 2
DCR = 0.98m Ohm +/- 5%
2
C C
VGA@ PR1622
100_0402_5%
TDC=13A
I(max)=18A
Place close to GPU Vboot=0.8V

R1, R2, R3, R4, R5, C are H/S Rds(on) = 6.8m Ohm , 8.6m Ohm
based on VGA type to set. L/S Rds(on) = 2.0m Ohm , 2.5m Ohm
Please base on GPU spec to calculate.
D D

VGA_CORE_S
1A
1 2 3 4 5
D

Rev
64
of
60
Sheet
VGA DECOUPLING
1
1
X 4(+4@)
Tuesday, April 11, 2017

4.7uF_0603 X3(+2@)
Document Number
220uF X 1(+1@)
10uF_0402 X 7
1uF_0402 X 5
+VGA_CORE_S
560uF X 1
22uF_0805
Date:
Title
Size
VGA@
PC1714
@VGA@
PC1768
@VGA@
PC1743
VGA@
PC1756
VGA@
PC17992
2017/06/14
22U_0805_6.3V6M 22U_0805_6.3V6M 4.7U_0402_6.3V6M 1U_0402_6.3V6K 10U_0603_6.3V6M MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
2
1 2 1 2 1 2 1 2 1 2
VGA@
PC1713
@VGA@
PC1767
VGA@
PC1742
VGA@
PC1755
VGA@
PC17991
22U_0805_6.3V6M 22U_0805_6.3V6M 4.7U_0402_6.3V6M 1U_0402_6.3V6K 10U_0603_6.3V6M
1 2 1 2 1 2 1 2 1 2
@VGA@
PC1712
VGA@
PC1766
VGA@
PC1741
VGA@
PC1754
VGA@
PC1799
560U_2.5V_M
VGA@ PC1774
+
1
1 2 1 2 1 2 1 2 1 2
Deciphered Date
VGA@
PC1711
VGA@
PC1726
@VGA@
PC1740
VGA@
PC1753
VGA@
PC1728
220U_D2 SX_2VY_R9M
Compal Secret Data

@VGA@ PC1777
+
1
1 2 1 2 1 2 1 2 1 2
@VGA@
PC1710
VGA@
PC1725
VGA@
PC1739
VGA@
PC1752
VGA@
PC1727
220U_D2 SX_2VY_R9M
VGA@ PC1776
+
1
1 2 1 2 1 2 1 2 1 2
+VGA_CORE_S
2016/01/29
4.7uF_0402 X 17(+5@)
22uF_0603 X 16(+2@)
22uF_0805 X 7(+5@)
3
3
10uF_0603X 9
1uF_0402 X 9
Issued Date
+VGA_CORE
560uF X 1
220uF X 2
PC1751
VGA@
PC1779
VGA@ 560U_2.5V_M
PC1780
VGA@
4.7U_0402_6.3V6M 10U_0603_6.3V6M
VGA@ PC1772
10U_0603_6.3V6M
+
1
2
1 2 1 2 2 1
PC1724
@VGA@
PC1738
@VGA@
PC1750
VGA@
PC1778
VGA@ 220U_D2 SX_2VY_R9M 22U_0603_6.3V6M
4.7U_0402_6.3V6M 4.7U_0402_6.3V6M 4.7U_0402_6.3V6M 10U_0603_6.3V6M
VGA@ PC1773 VGA@ PC1796
+
1
2
1 2 1 2 1 2 1 2 2 1
4
4
PC1709
VGA@
PC1723
@VGA@
PC1737
@VGA@
PC1749
VGA@
PC1765
VGA@ 220U_D2 SX_2VY_R9M 22U_0603_6.3V6M
1U_0402_6.3V6K 4.7U_0402_6.3V6M 4.7U_0402_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
+
1
2
1 2 1 2 1 2 1 2 1 2 2 1
PC1708
VGA@
PC1722
VGA@
PC1736
VGA@
PC1748
@VGA@
PC1764
VGA@ 22U_0603_6.3V6M 22U_0603_6.3V6M
1 2 1 2 1 2 1 2 1 2 2 1 2 1
PC1707
VGA@
PC1721
VGA@
PC1735
VGA@
PC1747
VGA@
PC1763
VGA@ 22U_0603_6.3V6M 22U_0603_6.3V6M
VGA@ PC1797 @VGA@ PC1793
1 2 1 2 1 2 1 2 1 2 2 1 2 1
PC1706
VGA@
PC1720
VGA@
PC1734
VGA@
PC1775
VGA@
PC1762
@VGA@ 22U_0603_6.3V6M 22U_0603_6.3V6M
VGA@ PC1786 @VGA@ PC1792
1 2 1 2 1 2 1 2 1 2 2 1 2 1
PC1705
VGA@
PC1719
VGA@
PC1733
VGA@
PC1770
VGA@
PC1761
@VGA@ 22U_0603_6.3V6M 22U_0603_6.3V6M
1 2 1 2 1 2 1 2 1 2 2 1 2 1
PC1704
VGA@
PC1718
VGA@
PC1732
VGA@
PC1769
VGA@
PC1760
@VGA@ 22U_0603_6.3V6M 22U_0603_6.3V6M
1 2 1 2 1 2 1 2 1 2 2 1 2 1
PC1703
VGA@
PC1717
VGA@
PC1731
VGA@
PC1746
VGA@
PC1759
VGA@ 22U_0603_6.3V6M 22U_0603_6.3V6M
1 2 1 2 1 2 1 2 1 2 2 1 2 1
PC1702
VGA@
PC1716
VGA@
PC1730
VGA@
PC1745
VGA@
PC1758
VGA@ 22U_0603_6.3V6M 22U_0603_6.3V6M
1 2 1 2 1 2 1 2 1 2 2 1 2 1
5
5
PC1701
VGA@
PC1715
@VGA@
PC1729
VGA@
PC1744
VGA@
PC1757
@VGA@ 22U_0603_6.3V6M 22U_0603_6.3V6M
1 2 1 2 1 2 1 2 1 2 1 2 1 2
+VGA_CORE

Acer Aspire A715-71 Compal LA-E911P Rev 1A Схема

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A B C D E

C5MMH MB Schematic Document

HDMI Kabylake H PROCESSOR

X4 DMI USB 3.0 USB 3.0

48MHz page 35 page 36

Card Reader RJ45 conn. SATA HDD Conn. HDA Codec

page 32. ENE

4 DC/DC Interface CKT. 4

Security Classification Compal Secret Data Compal Electronics, Inc.

UC1 UC1 UH1

PCB C5MMH LA-E911P LS-E911P/E912P

C5MMH M/B LA-E911P

Date: Tuesday, April 11, 2017 Sheet 7 of 64

Date: Tuesday, April 11, 2017 Sheet 8 of 64

SVID Alert / Data

1 2 H_PROCHOT#_R H_PM_SYNC BM34 RESET# PROC_TDO BL32 CPU_XDP_TDI

SKL_CNL_N BN1 BP27

Date: Tuesday, April 11, 2017 Sheet 9 of 64

EDS:Rail is unconnected for Processors without GT3/4.

Date: Tuesday, April 11, 2017 Sheet 10 of 64

+1.2V_VDDQ_CPU +1.2V_VDDQ_CPU +VDDQ_CLK

RC40 BSC Side

Place at Back Side

Date: Tuesday, April 11, 2017 Sheet 11 of 64

BGA1440 BGA1440 BGA1440 BGA1440

Date: Tuesday, April 11, 2017 Sheet 12 of 64

BL34 RSVD RSVD_TP

Date: Tuesday, April 11, 2017 Sheet 13 of 64

<7> DDR_A_DQS#[0..7] Layout Note:

DDR_A_MA7 122 A6 DQ21 58 DDR_A_D22 VREFCA VPP1 259

D_CK_SCLK SDA DQ35 DDR_A_D36 VSS VSS

253 170 39 193

1 1 1 1 260 182 44 201

330U_D2_2V_Y 33 228 81 235

Compal Electronics, Inc.

Security Classification Compal Secret Data

Date: Tuesday, April 11, 2017 Sheet 14 of 64

D_CK_SDATA 254 DQ34 186 DDR_B_D32 43 VSS VSS 197

104 204 73 230

330U_D2_2V_Y 216 82 238

Layout Note: DDR_B_D61

Compal Electronics, Inc.

1 Security Classification Compal Secret Data

Date: Tuesday, April 11, 2017 Sheet 15 of 64

C11 AT22 LPC_AD0 +3VS

B16 PCIE1_TXN/USB3_7_TXN USB2P_12 V2

Date: Tuesday, April 11, 2017 Sheet 16 of 64

1 @ 2 EC_PME#_R BD17 BB27 PLT_RST#

@ SPT-H_PCH on-board device driving it to opposite direction during

AV3 CL_CLK CLINK PCIE9_RXP/SATA0A_RXP C31 PCIE_PTX_DRX_N9 PCIE_PRX_DTX_P9 <34>

1.A Modify +3VALW_SPI

Date: Tuesday, April 11, 2017 Sheet 17 of 64

RH64 1 2 4.7K_0402_5% PCH_SMBALERT#

+3VALW_PCH_PRIM DMN65D8LDW-7_SOT363-6 (DDR,G-Sensor)

RH66 499_0402_1% QH1B DDPC_CTRLDATA / GPP_I8

2.2K_0804_8P4R_5% QH2A HDA_SDO DDPD_CTRLDATA / GPP_I10

Date: Tuesday, April 11, 2017 Sheet 18 of 64

CLKREQ_PCIE#3 CLKREQ_PCIE#15 BD33 GPP_H8/SRCCLKREQ14# CLKOUT_PCIE_P7

Date: Tuesday, April 11, 2017 Sheet 19 of 64

Functional Strap Definitions

+3VALW _PCH_PRIM +3VALW _PCH_PRIM

+3VALW _PCH_PRIM VGA_ID1 1 G1@ 2 PROJECT_ID0 1 @ 2

RH83 2 VGA@ 1 10K_0402_5% DGPU_PW R_EN