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Model Name : Z5WE3/Z5WT3


File Name : LA-A621P
1 1

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o
.c
Compal Confidential

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2 2

fi
EA50_BM UMA M/B Schematics Document

a
in
Intel Bay Trail M
3 3

h
.c
2013-09-03
REV:0.3
w
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4 4

PCB@
Compal Electronics, Inc.
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ZZZ PCB 12R LA-A621P REV0 M/B Security Classification Compal Secret Data
2013/04/12 2014/04/12 Title
Part Number Description Issued Date Deciphered Date Cover Page
DA60012W000 PCB 12R LA-A621P REV0 M/B THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Bay Trail M LA-A621P
Date: Tuesday, September 03, 2013 Sheet 1 of 37
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A B C D E

204pin DDR3L-SO-DIMM X1
port 0 port 1 P.14
Memory BUS
XDP-SFF-26Pin Dual Channel
1
HDMI Conn. eDP Conn. Debug 1

m
1.35V DDR3L 1066/1333
Conn. P.13 204pin DDR3L-SO-DIMM X1
P.17 P.16 P.15
DDI x2

o
VGA x1
CRT Conn. USB2.0 x4 port 0 port 1 port 2 port 3

.c
P.18

PCIE x4 VALLEYVIEW-M USB3.0 x1


USB 3.0 USB HUB Touch Panel HD Camera
Conn P.22 FE1.1s(STT) Conn. Conn.
port 0 port 1

x
P.22 P.16 P.16
2 2

LAN(GbE) WLAN SOC

fi
RTL8411-CG MINI CARD
P.19 P.20
FCBGA 1170 Pin
SATA II x2 HD Audio USB 2.0 USB 2.0 BT

a
HDA Codec MINI CARD
port 1 port 0 ALC3225 Conn P.22 Conn P.22 P.20
Card Reader page 06~13 P.25

in
2 in 1
(SD/MMC) SATA ODD SATA HDD LPC BUS SPI Sub Board
P.19 Conn. Conn. Speaker Int. MIC
P.21 P.21
P.25 P.25
3
SPI ROM 3

TPM
EC
ENE KB9012
h 1.8V (8MB)
P.08 Combo Jack
.c
P.25
P.25 P.23

RTC CKT.
Touch Pad Int.KBD
w

P.08
P.24 P.24

DC/DC Interface CKT.


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P.26
4 4

Compal Electronics, Inc.


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Security Classification Compal Secret Data


Power Circuit DC/DC LED/Power On/Off Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title
Block Diagrams
P.28~P.36 P.24 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 2 of 37
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A B C D E

Voltage Rails Board ID / SKU ID Table for AD channel


Power Plane Description S0 S3 S4/S5 Vcc 3.3V +/- 5%
VIN 19V Adapter power supply ON ON ON Ra/Rc/Re 100K +/- 5%
BATT+ 12V Battery power supply ON ON ON Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
B+ AC or battery power rail for power circuit. (19V/12V) ON ON ON 0 0 0 V 0 V 0 V
1 1
1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V

m
+RTCVCC RTC Battery Power ON ON ON 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+1.0VALW +1.0v Always power rail ON ON ON 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
4 56K +/- 5% 1.036 V 1.185 V 1.264 V

o
+1.8VALW +1.8v Always power rail ON ON ON 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+3VALW +3.3v Always power rail ON ON ON 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+5VALW +5.0v Always power rail ON ON ON 7 NC 2.500 V 3.300 V 3.300 V

.c
+1.35V +1.35V power rail for DDR3L ON ON OFF
+SOC_VCC Core voltage for SOC ON OFF OFF BOARD ID Table
+SOC_VNN GFX voltage for SOC ON OFF OFF
Board ID PCB Revision BOM Option Table
+0.675VS +0.675V power rail for DDR3L Terminator ON OFF OFF
0 Item BOM Structure

x
+1.0VS +1.0v system power rail ON OFF OFF
2
OFF OFF
1 Unpop @ 2
+1.05VS +1.05v system power rail ON
OFF OFF
2 Connector CONN@
+1.35VS +1.35v system power rail ON

fi
OFF OFF
3 XDP (Debug Port) XDP@
+1.5VS +1.5v system power rail ON
+1.8VS +1.8v system power rail ON OFF OFF
4 EMC requirement EMC@
+3VS +3.3v system power rail ON OFF OFF
5 EMC requirement unpop @EMC@
6 TPM TPM@

a
+5VS +5.0v system power rail ON OFF OFF
Touch Screen TS@
R short RS@

in
Test Point TEST@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

3 3

EC SM Bus1 address EC SM Bus2 address h 43 level BOM table


43 Level Description BOM Structure
.c
Device Address Device Address
Smart Battery 0001 011X b
4319QPBOL01 SMT MB AA621 Z5WE3 BTM 1.67G HDMI DBG@/EMC@/TS@/XDP@/B0@
4319QPBOL02 SMT MB AA621 Z5WE3 N2910 1.67G HDMI DBG@/EMC@/TS@/XDP@/N2910@
SOC SM Bus address 4319QPBOL03 SMT MB AA621 Z5WE3 N3510 2.16G HDMI DBG@/EMC@/TS@/XDP@/N3510@
Device Address
4319QPBOL04 SMT MB AA621 Z5WE3 N2910 B2 1.67G HDMI DBG@/EMC@/TS@/XDP@/N2910B2@
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SO-DIMM A (JDIMM1) A0h


SO-DIMM B (JDIMM2) A2h
USOC1 USOC1 USOC1
N2910@ N3510@ N2910B2@
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S IC FH8065301546401 QF9D B1 1.67G ABO! S IC FH8065301546300 QF9E B1 2.16G ABO! S IC FH8065301546402 QFH0 B2 1.6G ABO!
4 Part Number = SA000072B20 Part Number = SA000075O10 Part Number = SA000072B60 4

Compal Electronics, Inc.


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Security Classification Compal Secret Data


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 3 of 37
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5 4 3 2 1

Z5WE3_DVT Power Sequence AC mode


2013-08-08
BIOS:v0.05
EC:v0.05 G3->S0 S0->S3 S3->S0 S0->S5
ACIN
ACIN
+3VLP
+3VLP
EC_ON
EC_ON 1.53ms
D D
+3VALW
+3VALW 1.58ms

+5VALW
+5VALW
SPOK

m
SPOK 7.28ms

+1.0VALW
+1.0VALW 8.23ms

+1.8VALW
+1.8VALW

o
ON/OFF
ON/OFF 95.38ms

101ms EC_RSMRST#
EC_RSMRST#

.c
101ms PBTN_OUT#
PBTN_OUT#
102ms
EC_SLP_S4#
EC_SLP_S4#
102ms
EC_SLP_S3#
EC_SLP_S3#
222ms 204ms
SYSON
SYSON 0.6ms
3.29ms

x
+1.35V
C
+1.35V 1.71ms
C

3.29ms
33.68ms DDR_PWROK
DDR_PWROK 21ms 22.32ms 36.20ms

VR_ON
VR_ON

fi
2.49ms 2.50ms
8.85ms 9.81ms
+SOC_VCC
+SOC_VCC 2.50ms 2.50ms
10.55ms 11.5ms
+SOC_VNN
+SOC_VNN 0.28ms 279us

VGATE
VGATE

a
42.56ms
263ms 11.71ms 5.57ms
SUSP#
SUSP# 31.28us 31.12us
2.56ms 2.18ms
+1.0VS
+1.0VS 1.30ms 1.29ms
1.56ms 1.52ms
+1.05VS

in
+1.05VS 1.84ms 1.83ms
8ms 8.12ms
+1.35VS
+1.35VS 2.79ms 2.8ms
10.71ms 10.71ms
+1.5VS
+1.5VS 2.11ms 2.08ms
16.59ms 16.63ms
+1.8VS
+1.8VS 3.77ms 3.77ms
15.31ms 15.34ms
+3VS
B
+3VS
+5VS
+0.675VS
4.41ms

12.83ms

49.83ms
h 20.48ms

19.61ms
4.41ms

12.77ms

49.87ms
20.27ms

19.60ms
+5VS
+0.675VS
B
.c
148.3ms
144ms KBRST#
KBRST# 110ms 110ms
11.71ms
PMC_CORE_PWROK
PMC_CORE_PWROK 110ms 110ms
11.71ms
DDR_CORE_PWROK
DDR_CORE_PWROK 116ms 116ms
584ms 8.8ms SUSP#
PMC_PLTRST#
PMC_PLTRST#
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2.38ms
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A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date Power Sequence
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

http://sualaptop365.edu.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 4 of 37
5 4 3 2 1
5 4 3 2 1

D D

USOC1A USOC1B
<14> DDR_A_MA[0..15] DDR_A_MA0 DDR_A_D0 DDR_A_D[0..63] <14> <15> DDR_B_MA[0..15] DDR_B_MA0 DDR_B_D0 DDR_B_D[0..63] <15>
K45 M36 AY45 BG38
DDR_A_MA1 H47 DRAM0_MA_0 DRAM0_DQ_0 J36 DDR_A_D1 DDR_B_MA1 BB47 DRAM1_MA_0 DRAM1_DQ_0 BC40 DDR_B_D1
DDR_A_MA2 L41 DRAM0_MA_1 DRAM0_DQ_1 P40 DDR_A_D2 DDR_B_MA2 AW41 DRAM1_MA_1 DRAM1_DQ_1 BA42 DDR_B_D2

m
DDR_A_MA3 H44 DRAM0_MA_2 DRAM0_DQ_2 M40 DDR_A_D3 DDR_B_MA3 BB44 DRAM1_MA_2 DRAM1_DQ_2 BD42 DDR_B_D3
DDR_A_MA4 H50 DRAM0_MA_3 DRAM0_DQ_3 P36 DDR_A_D4 DDR_B_MA4 BB50 DRAM1_MA_3 DRAM1_DQ_3 BC38 DDR_B_D4
DDR_A_MA5 G53 DRAM0_MA_4 DRAM0_DQ_4 N36 DDR_A_D5 DDR_B_MA5 BC53 DRAM1_MA_4 DRAM1_DQ_4 BD36 DDR_B_D5
DDR_A_MA6 H49 DRAM0_MA_5 DRAM0_DQ_5 K40 DDR_A_D6 DDR_B_MA6 BB49 DRAM1_MA_5 DRAM1_DQ_5 BF42 DDR_B_D6
DDR_A_MA7 D50 DRAM0_MA_6 DRAM0_DQ_6 K42 DDR_A_D7 DDR_B_MA7 BF50 DRAM1_MA_6 DRAM1_DQ_6 BC44 DDR_B_D7
DDR_A_MA8 G52 DRAM0_MA_7 DRAM0_DQ_7 B32 DDR_A_D8 DDR_B_MA8 BC52 DRAM1_MA_7 DRAM1_DQ_7 BH32 DDR_B_D8
DDR_A_MA9 E52 DRAM0_MA_8 DRAM0_DQ_8 C32 DDR_A_D9 DDR_B_MA9 BE52 DRAM1_MA_8 DRAM1_DQ_8 BG32 DDR_B_D9
DDR_A_MA10 K48 DRAM0_MA_9 DRAM0_DQ_9 C36 DDR_A_D10 DDR_B_MA10 AY48 DRAM1_MA_9 DRAM1_DQ_9 BG36 DDR_B_D10
DDR_A_MA11 E51 DRAM0_MA_10 DRAM0_DQ_10 A37 DDR_A_D11 DDR_B_MA11 BE51 DRAM1_MA_10 DRAM1_DQ_10 BJ37 DDR_B_D11
DDR_A_MA12 F47 DRAM0_MA_11 DRAM0_DQ_11 C33 DDR_A_D12 DDR_B_MA12 BD47 DRAM1_MA_11 DRAM1_DQ_11 BG33 DDR_B_D12

o
DDR_A_MA13 J51 DRAM0_MA_12 DRAM0_DQ_12 A33 DDR_A_D13 DDR_B_MA13 BA51 DRAM1_MA_12 DRAM1_DQ_12 BJ33 DDR_B_D13
DDR_A_MA14 B49 DRAM0_MA_13 DRAM0_DQ_13 C37 DDR_A_D14 DDR_B_MA14 BH49 DRAM1_MA_13 DRAM1_DQ_13 BG37 DDR_B_D14
DDR_A_MA15 B50 DRAM0_MA_14 DRAM0_DQ_14 B38 DDR_A_D15 DDR_B_MA15 BH50 DRAM1_MA_14 DRAM1_DQ_14 BH38 DDR_B_D15
DRAM0_MA_15 DRAM0_DQ_15 F36 DDR_A_D16 DRAM1_MA_15 DRAM1_DQ_15 AU36 DDR_B_D16
<14> DDR_A_DM[0..7] DDR_A_DM0 G36 DRAM0_DQ_16 G38 DDR_A_D17 <15> DDR_B_DM[0..7] DDR_B_DM0 BD38 DRAM1_DQ_16 AT36 DDR_B_D17
DDR_A_DM1 B36 DRAM0_DM_0 DRAM0_DQ_17 F42 DDR_A_D18 DDR_B_DM1 BH36 DRAM1_DM_0 DRAM1_DQ_17 AV40 DDR_B_D18
DDR_A_DM2 F38 DRAM0_DM_1 DRAM0_DQ_18 J42 DDR_A_D19 DDR_B_DM2 BC36 DRAM1_DM_1 DRAM1_DQ_18 AT40 DDR_B_D19
DDR_A_DM3 DRAM0_DM_2 DRAM0_DQ_19 DDR_A_D20 DDR_B_DM3 DRAM1_DM_2 DRAM1_DQ_19 DDR_B_D20

.c
B42 G40 BH42 BA36
DDR_A_DM4 P51 DRAM0_DM_3 DRAM0_DQ_20 C38 DDR_A_D21 DDR_B_DM4 AT51 DRAM1_DM_3 DRAM1_DQ_20 AV36 DDR_B_D21
DDR_A_DM5 V42 DRAM0_DM_4 DRAM0_DQ_21 G44 DDR_A_D22 DDR_B_DM5 AM42 DRAM1_DM_4 DRAM1_DQ_21 AY42 DDR_B_D22
DDR_A_DM6 Y50 DRAM0_DM_5 DRAM0_DQ_22 D42 DDR_A_D23 DDR_B_DM6 AK50 DRAM1_DM_5 DRAM1_DQ_22 AY40 DDR_B_D23
DDR_A_DM7 Y52 DRAM0_DM_6 DRAM0_DQ_23 A41 DDR_A_D24 DDR_B_DM7 AK52 DRAM1_DM_6 DRAM1_DQ_23 BJ41 DDR_B_D24
DRAM0_DM_7 DRAM0_DQ_24 C41 DDR_A_D25 DRAM1_DM_7 DRAM1_DQ_24 BG41 DDR_B_D25
M45 DRAM0_DQ_25 A45 DDR_A_D26 AV45 DRAM1_DQ_25 BJ45 DDR_B_D26
<14> DDR_A_RAS# M44 DRAM0_RAS# DRAM0_DQ_26 B46 DDR_A_D27 <15> DDR_B_RAS# AV44 DRAM1_RAS# DRAM1_DQ_26 BH46 DDR_B_D27
<14> DDR_A_CAS# DRAM0_CAS# DRAM0_DQ_27 DDR_A_D28 <15> DDR_B_CAS# DRAM1_CAS# DRAM1_DQ_27 DDR_B_D28
H51 C40 BB51 BG40
<14> DDR_A_WE# DRAM0_WE# DRAM0_DQ_28 B40 DDR_A_D29 <15> DDR_B_WE# DRAM1_WE# DRAM1_DQ_28 BH40 DDR_B_D29
K47 DRAM0_DQ_29 B48 DDR_A_D30 AY47 DRAM1_DQ_29 BH48 DDR_B_D30
<14> DDR_A_BS0 DRAM0_BS_0 DRAM0_DQ_30 DDR_A_D31 <15> DDR_B_BS0 DRAM1_BS_0 DRAM1_DQ_30 DDR_B_D31
K44 B47 AY44 BH47
<14> DDR_A_BS1 D52 DRAM0_BS_1 DRAM0_DQ_31 K52 DDR_A_D32 <15> DDR_B_BS1 BF52 DRAM1_BS_1 DRAM1_DQ_31 AY52 DDR_B_D32

x
<14> DDR_A_BS2 DRAM0_BS_2 DRAM0_DQ_32 DDR_A_D33 <15> DDR_B_BS2 DRAM1_BS_2 DRAM1_DQ_32 DDR_B_D33
C K51 AY51 C
P44 DRAM0_DQ_33 T52 DDR_A_D34 AT44 DRAM1_DQ_33 AP52 DDR_B_D34
<14> DDR_A_CS0# DRAM0_CS_0# DRAM0_DQ_34 DDR_A_D35 <15> DDR_B_CS0# DRAM1_CS_0# DRAM1_DQ_34 DDR_B_D35
T51 AP51
P45 DRAM0_DQ_35 L51 DDR_A_D36 AT45 DRAM1_DQ_35 AW51 DDR_B_D36
<14> DDR_A_CS2# DRAM0_CS_2# DRAM0_DQ_36 L53 DDR_A_D37 <15> DDR_B_CS2# DRAM1_CS_2# DRAM1_DQ_36 AW53 DDR_B_D37
DRAM0_DQ_37 R51 DDR_A_D38 DRAM1_DQ_37 AR51 DDR_B_D38
C47 DRAM0_DQ_38 R53 DDR_A_D39 BG47 DRAM1_DQ_38 AR53 DDR_B_D39

fi
<14> DDR_A_CKE0 DRAM0_CKE_0 DRAM0_DQ_39 DDR_A_D40 <15> DDR_B_CKE0 DRAM1_CKE_0 DRAM1_DQ_39 DDR_B_D40
D48 T47 BE46 AP47
F44 RESERVED_D48 DRAM0_DQ_40 T45 DDR_A_D41 BD44 RESERVED_BE46 DRAM1_DQ_40 AP45 DDR_B_D41
<14> DDR_A_CKE2 E46 DRAM0_CKE_2 DRAM0_DQ_41 Y40 DDR_A_D42 <15> DDR_B_CKE2 BF48 DRAM1_CKE_2 DRAM1_DQ_41 AK40 DDR_B_D42
RESERVED_E46 DRAM0_DQ_42 V41 DDR_A_D43 RESERVED_BF48 DRAM1_DQ_42 AM41 DDR_B_D43
T41 DRAM0_DQ_43 T48 DDR_A_D44 AP41 DRAM1_DQ_43 AP48 DDR_B_D44
<14> DDR_A_ODT0 DRAM0_ODT_0 DRAM0_DQ_44 DDR_A_D45 <15> DDR_B_ODT0 DRAM1_ODT_0 DRAM1_DQ_44 DDR_B_D45
T50 AP50
P42 DRAM0_DQ_45 Y42 DDR_A_D46 AT42 DRAM1_DQ_45 AK42 DDR_B_D46
<14> DDR_A_ODT2 DRAM0_ODT_2 DRAM0_DQ_46 AB40 DDR_A_D47 <15> DDR_B_ODT2 DRAM1_ODT_2 DRAM1_DQ_46 AH40 DDR_B_D47
DRAM0_DQ_47 V45 DDR_A_D48 DRAM1_DQ_47 AM45 DDR_B_D48
DRAM0_DQ_48 DDR_A_D49 DRAM1_DQ_48 DDR_B_D49

a
M50 V47 AV50 AM47
<14> DDR_A_CLK0 DRAM0_CKP_0 DRAM0_DQ_49 DDR_A_D50 <15> DDR_B_CLK0 DRAM1_CKP_0 DRAM1_DQ_49 DDR_B_D50
M48 AD48 AV48 AF48
<14> DDR_A_CLK0# DRAM0_CKN_0 DRAM0_DQ_50 DDR_A_D51 <15> DDR_B_CLK0# DRAM1_CKN_0 DRAM1_DQ_50 DDR_B_D51
AD50 AF50
DRAM0_DQ_51 V48 DDR_A_D52 DRAM1_DQ_51 AM48 DDR_B_D52
P50 DRAM0_DQ_52 V50 DDR_A_D53 DRAM1_DQ_52 AM50 DDR_B_D53
<14> DDR_A_CLK2 P48 DRAM0_CKP_2 DRAM0_DQ_53 AB44 DDR_A_D54 AT50 DRAM1_DQ_53 AH44 DDR_B_D54
<14> DDR_A_CLK2# DRAM0_CKN_2 DRAM0_DQ_54 DDR_A_D55 <15> DDR_B_CLK2 DRAM1_CKP_2 DRAM1_DQ_54 DDR_B_D55
Y45 AT48 AK45
DRAM0_DQ_55 DDR_A_D56 <15> DDR_B_CLK2# DRAM1_CKN_2 DRAM1_DQ_55 DDR_B_D56
V52 AM52

in
DRAM0_DQ_56 W51 DDR_A_D57 DRAM1_DQ_56 AL51 DDR_B_D57
P41 DRAM0_DQ_57 AC53 DDR_A_D58 DRAM1_DQ_57 AG53 DDR_B_D58
<14> DDR_A_RST# DRAM0_DRAMRST# DRAM0_DQ_58 AC51 DDR_A_D59 AT41 DRAM1_DQ_58 AG51 DDR_B_D59
DRAM0_DQ_59 DDR_A_D60 <15> DDR_B_RST# DRAM1_DRAMRST# DRAM1_DQ_59 DDR_B_D60
W53 AL53
DRAM0_DQ_60 Y51 DDR_A_D61 DRAM1_DQ_60 AK51 DDR_B_D61
AF44 DRAM0_DQ_61 AD52 DDR_A_D62 DRAM1_DQ_61 AF52 DDR_B_D62
+DDR_SOC_VREF DRAM_VREF 0.675V DRAM0_DQ_62 DDR_A_D63 DRAM1_DQ_62 DDR_B_D63
AD51 AF51
DRAM0_DQ_63 DRAM1_DQ_63
100K_0402_5% 1 2 R960 DDR_TERMN0 AF42 J38 DDR_A_DQS0 BF40 DDR_B_DQS0
100K_0402_5% 1 2 R961 DDR_TERMN1 AH42 ICLK_DRAM_TERMN_AF42 DRAM0_DQSP_0 K38 DDR_A_DQS#0 DRAM1_DQSP_0 BD40 DDR_B_DQS#0
ICLK_DRAM_TERMN_AH42 DRAM0_DQSN_0 C35 DDR_A_DQS1 DRAM1_DQSN_0 BG35 DDR_B_DQS1
DRAM0_DQSP_1 B34 DDR_A_DQS#1 DRAM1_DQSP_1 BH34 DDR_B_DQS#1

B <32>
<8>

23.2_0402_1%
29.4_0402_1%
162_0402_1%
DDR_PWROK
DDR_CORE_PWROK

1
1
1
2 R962
2 R963
2 R964
DDR_RCOMP0
DDR_RCOMP1
DDR_RCOMP2
AD42
AB42

AD44
AF45
AD45
DRAM_VDD_S4_PWROK
DRAM_CORE_PWROK

DRAM_RCOMP_0
DRAM_RCOMP_1
DRAM0_DQSN_1
DRAM0_DQSP_2
DRAM0_DQSN_2
DRAM0_DQSP_3
DRAM0_DQSN_3
DRAM0_DQSP_4
DRAM0_DQSN_4
DRAM0_DQSP_5
D40
F40
B44
C43
N53
M52
T42
T44
h
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS5
DDR_A_DQS#5
DRAM1_DQSN_1
DRAM1_DQSP_2
DRAM1_DQSN_2
DRAM1_DQSP_3
DRAM1_DQSN_3
DRAM1_DQSP_4
DRAM1_DQSN_4
DRAM1_DQSP_5
BA38
AY38
BH44
BG43
AU53
AV52
AP42
AP44
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS5
DDR_B_DQS#5
B
.c
DRAM_RCOMP_2 DRAM0_DQSN_5 Y47 DDR_A_DQS6 DRAM1_DQSN_5 AK47 DDR_B_DQS6
DRAM0_DQSP_6 Y48 DDR_A_DQS#6 DRAM1_DQSP_6 AK48 DDR_B_DQS#6
Follow CRB v1.15
AF40 DRAM0_DQSN_6 AB52 DDR_A_DQS7 DRAM1_DQSN_6 AH52 DDR_B_DQS7
AF41 RESERVED_AF40 DRAM0_DQSP_7 AA51 DDR_A_DQS#7 DRAM1_DQSP_7 AJ51 DDR_B_DQS#7
AD40 RESERVED_AF41 DRAM0_DQSN_7 DRAM1_DQSN_7
AD41 RESERVED_AD40
RESERVED_AD41 DDR_A_DQS[0..7] <14> DDR_B_DQS[0..7] <15>
1 OF 13 2 OF 13
DDR_A_DQS#[0..7] <14> DDR_B_DQS#[0..7] <15>
DDR_CORE_PWROK 1 2 FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170
C1159 EMC@
0.01U_0402_16V7K
w

Close To SOC Pin


w

+1.35V +DDR_SOC_VREF

1 2
R965 1
4.7K_0402_1%
C1132
1 2 .1U_0402_16V7K
R966 2
4.7K_0402_1%
w

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date VLV-M SOC Memory DDR3L
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

http://sualaptop365.edu.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 5 of 37
5 4 3 2 1
5 4 3 2 1

RP43
USOC1C 150_0804_8P4R_1%
CRT_R 8 1
AV3 AG3 CRT_G 7 2
<17> HDMI_TX2+ DDI0_TXP_0 DDI1_TXP_0 EDP_TXP0 <16> CRT_B
AV2 1.0V 1.0V AG1 6 3
<17> HDMI_TX2- DDI0_TXN_0 DDI1_TXN_0 EDP_TXN0 <16>
AT2 AF3 5 4
<17> HDMI_TX1+ DDI0_TXP_1 DDI1_TXP_1 EDP_TXP1 <16>
AT3 AF2
<17> HDMI_TX1- DDI0_TXN_1 DDI1_TXN_1 EDP_TXN1 <16>

m
AR3 AD3
<17> HDMI_TX0+ DDI0_TXP_2 DDI1_TXP_2
AR1 AD2
D <17> HDMI_TX0- DDI0_TXN_2 DDI1_TXN_2 D
AP3 AC3
<17> HDMI_CLK+
AP2 DDI0_TXP_3 DDI1_TXP_3 AC1 eDP Panel
HDMI <17> HDMI_CLK- DDI0_TXN_3 DDI1_TXN_3
AL3 1.0V AK3 EDP_AUXP <16>
AL1 DDI0_AUXP DDI1_AUXP AK2
DDI0_AUXN 1.0V DDI1_AUXN EDP_AUXN <16> +1.8VS

o
D27 1.8V 1.8V K30
<17> HDMI_HPD# DDI0_HPD DDI1_HPD EDP_HPD# <16>

5
C26 1.8V 1.8V P30 DDI1_ENABLE R967 1 2 2.2K_0402_5% +1.8VS U61
<17> HDMI_DDCDATA DDI0_DDCDATA DDI1_DDCDATA
C28 1.8V 1.8V G30 1

P
<17> HDMI_DDCCLK DDI0_DDCCLK DDI1_DDCCLK NC 4
Y ENBKL <23>
B28 N30 DDI1_ENVDD DDI1_ENBKL 2

.c
DDI0_VDDEN 1.8V DDI1_VDDEN A

G
C27 1.8V J30 DDI1_ENBKL
B26 DDI0_BKLTEN DDI1_BKLTEN M30 DDI1_PWM NL17SZ07DFT2G_SC70-5
1.8V

3
DDI0_BKLTCTL DDI1_BKLTCTL SA00004BV00
AH3
1 R968 2 DDI0_RCOMPP AK12 VSS_AH3 AH2
DDI0_RCOMP_P VSS_AH2
Follow CRB v1.15 0ohm till to GND
402_0402_1% DDI0_RCOMPN AK13
AM14 DDI0_RCOMP_N AH14 +1.8VS
AM13 RESERVED_AM14 RESERVED_AH14 AH13
AM3 RESERVED_AM13 RESERVED_AH13 AF14

x
VSS_AM3 RESERVED_AF14

5
Follow CRB v1.15 0ohm till to GND AM2 AF13 U62
VSS_AM2 RESERVED_AF13 1

P
BA3 CRT_R NC 4
C VGA_RED CRT_B CRT_R <18> DDI1_ENVDD Y ENVDD <16> C
AY2 2
VGA_BLUE CRT_B <18> A

G
BA1 CRT_G
CRT_G <18>

fi
VGA_GREEN AW1 CRT_IREF R969 1 2 357_0402_1% NL17SZ07DFT2G_SC70-5

3
VGA_IREF AY3 SA00004BV00
VGA_IRTN
3.3V BD2 CRT_HSYNC
CRT_HSYNC <18>
CRT
VGA_HSYNC BF2 CRT_VSYNC +1.8VS
3.3V VGA_VSYNC CRT_VSYNC <18>

3.3V BC1 CRT_DDC_CLK


VGA_DDCCLK CRT_DDC_CLK <18>

5
a
3.3V BC2 CRT_DDC_DATA U64
VGA_DDCDATA CRT_DDC_DATA <18>
1

P
T2 T7 NC 4
RESERVED_T2 RESERVED_T7 DDI1_PWM Y INVT_PWM_SOC <16>
T3 T9 2
RESERVED_T3 RESERVED_T9 A

G
AB3 AB13
AB2 RESERVED_AB3 RESERVED_AB13 AB12 NL17SZ07DFT2G_SC70-5

in

3
Y3 RESERVED_AB2 RESERVED_AB12 Y12 SA00004BV00
Y2 RESERVED_Y3 RESERVED_Y12 Y13
W3 RESERVED_Y2 RESERVED_Y13 V10
W1 RESERVED_W3 RESERVED_V10 V9
V2 RESERVED_W1 RESERVED_V9 T12
V3 RESERVED_V2 RESERVED_T12 T10
R3 RESERVED_V3 RESERVED_T10 V14 +3VS
R1 RESERVED_R3 RESERVED_V14 V13 RP44
+1.8VS AD6 RESERVED_R1 RESERVED_V13 T14 ENBKL 5 4
B B
AD4
AB9
RESERVED_AD6
RESERVED_AD4
RESERVED_AB9
h
RESERVED_T14
RESERVED_T13
RESERVED_T6
T13
T6
ENVDD
INVT_PWM_SOC
6
7
3
2
1

AB7 T4 8 1
@ Y4 RESERVED_AB7 RESERVED_T4 P14
R970 Y6 RESERVED_Y4 RESERVED_P14 4.7K_0804_8P4R_5%
10K_0402_5% V4 RESERVED_Y6 F34
.c
V6 RESERVED_V4 GPIO_S0_NC_15 M32 RP45
2

GPIO_NC13 A29 RESERVED_V6 GPIO_S0_NC_16 D28 DDI1_ENBKL 8 1


GPIO_NC14 C29 GPIO_S0_NC_13 GPIO_S0_NC_17 J28 DDI1_ENVDD 7 2
T186 GPIO_S0_NC14 GPIO_S0_NC_18
1

AB14 K34 DDI1_PWM 6 3


GPIO_NC12 B30 RESERVED_AB14 GPIO_S0_NC_19 D34 5 4
T187 GPIO_S0_NC_12 GPIO_S0_NC_20
R971 C30 F32
10K_0402_5% RESERVED_C30 GPIO_S0_NC_21 F28 100K_0804_8P4R_5%
GPIO_S0_NC_22 K28
2

GPIO_S0_NC_23 J34
w

GPIO_S0_NC_24 N32
GPIO_S0_NC_25 D32
Follow CRB v1.15 3 OF 10 GPIO_S0_NC_26

FH8065301546401_FCBGA131170

GPIO_S0_NC[13]:
w

Multiplexed with Hardware Straps Pin:MDSI_DDCDATA


A A

Security Classification Compal Secret Data Compal Electronics, Inc.


w

2013/04/12 2014/04/12 Title


Issued Date Deciphered Date VLV-M SOC Display
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 6 of 37
5 4 3 2 1

http://sualaptop365.edu.vn
5 4 3 2 1

USOC1D

BF6 AY7 PCIE_PTX_DRX_P0 .1U_0402_16V7K 1 2 C1133


<21> SATA_PTX_DRX_P0 BG7 SATA_TXP_0 PCIE_TXP_0 AY6 PCIE_PTX_DRX_N0 PCIE_PTX_C_DRX_P0 <19>
.1U_0402_16V7K 1 2 C1134
<21> SATA_PTX_DRX_N0 SATA_TXN_0 PCIE_TXN_0 PCIE_PTX_C_DRX_N0 <19>
HDD PCIE LAN
AU16 AT14 PCIE_PRX_DTX_P0
<21> SATA_PRX_DTX_P0 SATA_RXP_0 PCIE_RXP_0 PCIE_PRX_DTX_P0 <19>
D AV16 AT13 PCIE_PRX_DTX_N0 D

m
<21> SATA_PRX_DTX_N0 SATA_RXN_0 PCIE_RXN_0 PCIE_PRX_DTX_N0 <19>
BD10 AV6 PCIE_PTX_DRX_P1 .1U_0402_16V7K 1 2 C1135
<21> SATA_PTX_DRX_P1 SATA_TXP_1 PCIE_TXP_1 PCIE_PTX_C_DRX_P1 <20>
BF10 AV4 PCIE_PTX_DRX_N1 .1U_0402_16V7K 1 2 C1000
<21> SATA_PTX_DRX_N1 SATA_TXN_1 PCIE_TXN_1 PCIE_PTX_C_DRX_N1 <20>
ODD WLAN
AY16 AT10 PCIE_PRX_DTX_P1
<21> SATA_PRX_DTX_P1 BA16 SATA_RXP_1 PCIE_RXP_1 AT9 PCIE_PRX_DTX_N1 PCIE_PRX_DTX_P1 <20>
<21> SATA_PRX_DTX_N1 SATA_RXN_1 PCIE_RXN_1 PCIE_PRX_DTX_N1 <20>

o
BB10 AT7
BC10 VSS_BB10 PCIE_TXP_2 AT6
Follow CRB V1.15 0ohm till to GND VSS_BC10 PCIE_TXN_2
SOC_SCI# BA12 AP12 +1.8VS
<8> SOC_SCI# DEVSLP_SOC AY14 SATA_GP0 / GPIO_S0_SC_0 PCIE_RXP_2 AP10 RP51
T188 SATA_LED#_SOC AY12 SATA_GP1 / SATA_DEVSLP_0 / GPIO_S0_SC_1 PCIE_RXN_2 LAN_CLKREQ#

.c
Follow CRB v1.15 1 8
SATA_LED# / GPIO_S0_SC_2 AP6 WLAN_CLKREQ# 2 7
1 R972 2 SATA_RCOMPP AU18 PCIE_TXP_3 AP4 PCIE_CLKREQ_2# 3 6
402_0402_1% SATA_RCOMPN AT18 SATA_RCOMP_P PCIE_TXN_3 PCIE_CLKREQ_3# 4 5
SATA_RCOMP_N AP9
PCIE_RXP_3 AP7 10K_0804_8P4R_5%
AT22 PCIE_RXN_3
MMC1_CLK / GPIO_S0_SC_16 BB7
AV20 VSS_BB7 BB5 Follow CRB V1.15 0ohm till to GND

x
AU22 MMC1_D0 / GPIO_S0_SC_17 VSS_BB5 8411 Pin 36 O/D
AV22 MMC1_D1 / GPIO_S0_SC_18 BG3 LAN_CLKREQ#
C
AT20 MMC1_D2 / GPIO_S0_SC_19 PCIE_CLKREQ_0# / GPIO_S0_SC_3 BD7 WLAN_CLKREQ# LAN_CLKREQ# <19> HDA_BITCLK_AUDIO 1 2
C
MMC1_D3 / GPIO_S0_SC_20 PCIE_CLKREQ_1# / GPIO_S0_SC_4 PCIE_CLKREQ_2# WLAN_CLKREQ# <20>
AY24 BG5 C1001 @EMC@
AU26 MMC1_D4 / GPIO_S0_SC_21 PCIE_CLKREQ_2# / GPIO_S0_SC_5 BE3 PCIE_CLKREQ_3# 22P_0402_50V8J

fi
AT26 MMC1_D5 / GPIO_S0_SC_22 PCIE_CLKREQ_3# / GPIO_S0_SC_6 BD5
AU20 MMC1_D6 / GPIO_S0_SC_23 SD3_WP / GPIO_S0_SC_7
MMC1_D7 / GPIO_S0_SC_24 AP14 PCIE_RCOMPP 1 R975 2
AV26 PCIE_RCOMP_P AP13 PCIE_RCOMPN 402_0402_1%
BA24 MMC1_CMD / GPIO_S0_SC_25 PCIE_RCOMP_N
MMC1_RST# / SATA_DEVSLP_0 / GPIO_S0_SC_26 BB4
AY18 RESERVED_BB4 BB3

a
MMC1_RCOMP RESERVED_BB3 RP46
AV10 HDA_SYNC 8 1
RESERVED_AV10 HDA_SDOUT HDA_SYNC_AUDIO <25>
BA18 AV9 7 2
SD2_CLK / GPIO_S0_SC_27 RESERVED_AV9 HDA_BIT_CLK HDA_SDOUT_AUDIO <25>
AY20 6 3
SD2_D0 / GPIO_S0_SC_28 HDA_RCOMP HDA_RST# HDA_BITCLK_AUDIO <25>
BD20 BF20 49.9_0402_1% 1 2 R976 5 4 HDA_RST_AUDIO# <25>
SD2_D1 / GPIO_S0_SC_29 HDA_LPE_RCOMP

in
BA20 BG22 HDA_RST#
BD18 SD2_D2 / GPIO_S0_SC_30 HDA_RST# / LPE_I2S0_CLK / GPIO_S0_SC_8 BH20 HDA_SYNC 33_0804_8P4R_5%
BC18 SD2_D3_CD# / GPIO_S0_SC_31 HDA_SYNC / LPE_I2S0_FRM / GPIO_S0_SC_9 BJ21 HDA_BIT_CLK EMC@
SD2_CMD / GPIO_S0_SC_32 HDA_CLK / LPE_I2S0_DATAOUT / GPIO_S0_SC_10 BG20 HDA_SDOUT
HDA_SDO / LPE_I2S0_DATAIN / GPIO_S0_SC_11 BG19 HDA_SDIN0
HDA_SDI0 / LPE_I2S1_CLK / GPIO_S0_SC_12 BG21 HDA_SDIN0 <25>
HDA_SDI1 / LPE_I2S1_FRM / GPIO_S0_SC_13 T189
AY26 BH18
AT28 SD3_CLK / GPIO_S0_SC_33 HDA_DOCKRST# / LPE_I2S1_DATAOUT / GPIO_S0_SC_14 BG18 T190
BD26 SD3_D0 / GPIO_S0_SC_34 HDA_DOCKEN# / LPE_I2S1_DATAIN / GPIO_S0_SC_15 T191
B GPIO_S0_SC_63: GPIO_S0_SC_65: B
AU28
BA26
BC24
AV28
BF22
SD3_D1 / GPIO_S0_SC_35
SD3_D2 / GPIO_S0_SC_36
SD3_D3 / GPIO_S0_SC_37
SD3_CD# / GPIO_S0_SC_38
SD3_CMD / GPIO_S0_SC_39
SD3_1P8EN / GPIO_S0_SC_40
h
LPE_I2S2_CLK / SATA_DEVSLP_1 / GPIO_S0_SC_62
LPE_I2S2_FRM / GPIO_S0_SC_63
LPE_I2S2_DATAIN / GPIO_S0_SC_64
LPE_I2S2_DATAOUT / GPIO_S0_SC_65
BF28
BA30
BD28
BC30
GPIO_S0_SC_63

GPIO_S0_SC_65
BIOS/EFI Boot Strap (BBS) Security Flash Descriptors
BIOS Boot Selection
0 = LPC
1 = SPI
0 = Override
1 = Normal Operation
(Internal PU)
.c
BD22 P34 +1.8VS +1.8VS
SD3_PWREN# / GPIO_S0_SC_41 RESERVED_P34 N34 R979
BF26 RESERVED_N34 33.2_0402_1%
SD3_RCOMP

1
AK9 1 2
RESERVED_AK9 +1.0VS
AK7
RESERVED_AK7 R977 R978
C24 10K_0402_5% 10K_0402_5%
PROCHOT# H_PROCHOT# <23>
4 OF 10 Internal PD 2K EC programing :

2
GPIO_S0_SC_63 GPIO_S0_SC_65 "High"for Flash BIOS
2
w

FH8065301546401_FCBGA131170 @EMC@

1
D
C1002
10P_0402_50V8J 2
+1.8VS 1 TXE_DBG <23>
G
S Q62

3
R980 MESS138W-G_SOT323-3
w

10K_0402_5%
1 2
Pull High 10k at LED Page
A A
2
G

1 3 SATA_LED#_SOC
Compal Electronics, Inc.
w

<24> SOC_SATALED# Security Classification Compal Secret Data


D

Q63 2013/04/12 2014/04/12 Title


MESS138W-G_SOT323-3
Issued Date Deciphered Date VLV-M SOC SATA/PCI-E/HDA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 7 of 37
5 4 3 2 1

http://sualaptop365.edu.vn
5 4 3 2 1

XTAL_25M_IN +1.8VS +3VS


+1.8VALW

1
R981

1
Y7 1M_0402_5%
25MHZ_10PF_7V25000014 R982

5
U53 4.7K_0402_5% R983

2
1 3 XTAL_25M_OUT 1.8V 1 3.3V 2.2K_0402_5%

2
1 3 NC 4
1 1 PLT_RST_BUF# <19,20,23,24>

2
GND GND PMC_PLTRST# 2 Y D40

G
C1003 C1004 A PMC_ACIN 2 1
2 4 ACIN <23,30>
10P_0402_25V8K 10P_0402_25V8K NL17SZ07DFT2G_SC70-5

3
D 2 2 D
SA00004BV00 RB751V40_SC76-2

PLT_RST Buffer

m
USOC1E
XTAL_25M_IN AH12 AU34 PLT_RST_BUF# 1 2
XTAL_25M_OUT AH10 ICLK_OSCIN SIO_UART1_RXD / GPIO_S0_SC_70 AV34 C1174 @EMC@
ICLK_OSCOUT SIO_UART1_TXD / GPIO_S0_SC_71 BA34 +1.8VALW 0.01U_0402_16V7K
AD9 SIO_UART1_RTS# / GPIO_S0_SC_72 AY34 RP47
RESERVED_AD9 SIO_UART1_CTS# / GPIO_S0_SC_73 PMC_PCIE_WAKE# 1 8
R984 1 2 4.02K_0402_1% ICLK_ICOMP AD14 BF34 PMC_BATLOW# 2 7
R985 1 2 47.5_0402_1% ICLK_RCOMP AD13 ICLK_ICOMP SIO_UART2_RXD / GPIO_S0_SC_74 BD34 GPIO_S5_14 3 6
ICLK_RCOMP SIO_UART2_TXD / GPIO_S0_SC_75 BD32 LS_OE 4 5 +1.8VALW +3VALW_EC

o
AD10 SIO_UART2_RTS# / GPIO_S0_SC_76 BF32 U54
AD12 RESERVED_AD10 SIO_UART2_CTS# / GPIO_S0_SC_77 10K_0804_8P4R_5% 2 19
RESERVED_AD12 VCCA VCCB
AF6 PMC_SLP_S3# 1 20
<19> CLK_PCIE_LAN# AF4 PCIE_CLKN_0 D26 FOR EMI/ESD Require 01/15 PMC_SLP_S4# 3 A1 B1 18 EC_SLP_S3# <23>
LAN <19> CLK_PCIE_LAN PCIE_CLKP_0 PMC_SUSPWRDNACK / GPIO_S5_11 PMC_SUSCLK SOC_KBRST# A2 B2 EC_SLP_S4# <23>
G24 T192 32.768k output 4 17
AF9 PMC_SUSCLK_0 / GPIO_S5_12 F18 SOC_LID_OUT# 5 A3 B3 16 EC_KBRST# <23>
<20> CLK_PCIE_WLAN# PCIE_CLKN_1 PMC_SLP_S0IX# / GPIO_S5_13 PMC_SLP_S4# SOC_SERIRQ A4 B4 EC_LID_OUT# <23>

.c
WLAN AF7 F22 6 15
<20> CLK_PCIE_WLAN PCIE_CLKP_1 PMC_SLP_S4# PMC_SLP_S3# <9> SOC_SERIRQ SOC_SMI# A5 B5 EC_SERIRQ <23,24>
D22 7 14
PMC_SLP_S3# J20 GPIO_S5_14 SOC_SCI# 8 A6 B6 13 EC_SMI# <23>
GPIO_S5_14 PMC_ACIN <7> SOC_SCI# PMC_PWRBTN# A7 B7 EC_SCI# <23>
AK4 D20 9 12
AK6 PCIE_CLKN_2 PMC_ACPRESENT F26 PMC_PCIE_WAKE# A8 B8 PBTN_OUT# <23>
PCIE_CLKP_2 PMC_WAKE_PCIE_0# / GPIO_S5_15 K26 PMC_BATLOW# PMC_PLTRST# 1 2 LS_OE 10 11
AM4 PMC_BATLOW# J26 PMC_PWRBTN# C1006 EMC@ OE GND
Close To SOC <1000mil PCIE_CLKN_3 PMC_PWRBTN# / GPIO_S5_16
+1.8VALW AM6 BG9 PMC_RSTBTN# T209 .1U_0402_16V7K TXB0108PWR_TSSOP20
PCIE_CLKP_3 PMC_RSTBTN# F20 PMC_PLTRST#
R989 1 XDP@ 2 51_0402_5% XDP_H_PRDY# AM9 PMC_PLTRST# J24 GPIO_S5_17 T205
R1026 1 XDP@ 2 51_0402_5% XDP_H_TDO AM10 RESERVED_AM9 GPIO_S5_17 G18
R1024 1 XDP@ 2 200_0402_5% XDP_H_PREQ_BUF# RESERVED_AM10 PMC_SUS_STAT# / GPIO_S5_18

x
C RP52 C
4 5 XDP_H_TDI C11 RTC_TEST# EC_RSMRST# 1 2
3 6 XDP_H_TMS BH7 ILB_RTC_TEST# C12 RTC_RST# R990 100K_0402_5%
2 7 XDP_H_TCK BH5 PMC_PLT_CLK_0 / GPIO_S0_SC_96 ILB_RTC_RST#
1 8 XDP_H_TRST# BH4 PMC_PLT_CLK_1 / GPIO_S0_SC_97 1 2
BH8 PMC_PLT_CLK_2 / GPIO_S0_SC_98 B10 EC_RSMRST# C1155 EMC@
BH6 PMC_PLT_CLK_3 / GPIO_S0_SC_99 PMC_RSMRST# B7 PMC_CORE_PWROK EC_RSMRST# <23>
51_0804_8P4R_5% .1U_0402_16V7K

fi
XDP@ BJ9 PMC_PLT_CLK_4 / GPIO_S0_SC_100 PMC_CORE_PWROK
PMC_PLT_CLK_5 / GPIO_S0_SC_101 +1.0VS
RTC domain
C9 ILB_RTC_X1
XDP_H_TCK D14 ILB_RTC_X1 A9 ILB_RTC_X2 PMC_CORE_PWROK 1 2

1
XDP_H_TRST# G12 TAP_TCK ILB_RTC_X2 B8 ILB_RTC_EXTPAD 1 2 C1007 EMC@
XDP_H_TMS F14 TAP_TRST# ILB_RTC_EXTPAD P22 C1008 R1064 0.047U_0402_25V7K
XDP_H_TDI F12 TAP_TMS RTC_VCC_P22 .1U_0402_16V7K 73.2_0402_1%
XDP_H_TDO TAP_TDI +RTCVCC
G16
XDP_H_PRDY# D18 TAP_TDO

2
XDP_H_PREQ_BUF# TAP_PRDY# B24 VR_SVID_ALERT#_SOC

a
F16 R1065 1 2 20_0402_1%
TAP_PREQ# SVID_ALERT# VR_SVID_ALERT# <35>
AT34 A25 VR_SVID_DATA_SOC R1066 1 2 16.9_0402_1%
RESERVED_AT34 SVID_DATA VR_SVID_DATA <35>
C25
SOC_SPI_CS0# C23 SVID_CLK VR_SVID_CLK <35>
T193 C21 PCU_SPI_CS_0#
SOC_SPI_MISO B22 PCU_SPI_CS_1# / GPIO_S5_21 AU32 +3VALW +1.35VS
SOC_SPI_MOSI A21 PCU_SPI_MISO SIO_PWM_0 / GPIO_S0_SC_94 AT32
RP48 SOC_SPI_CLK C22 PCU_SPI_MOSI SIO_PWM_1 / GPIO_S0_SC_95

in

1
SPI_CS0# 1 8 SOC_SPI_CS0# PCU_SPI_CLK
SPI_MISO 2 7 SOC_SPI_MISO R993
SPI_MOSI 3 6 SOC_SPI_MOSI SOC_KBRST# B18
GPIO_S5_0 10K_0402_5%

5
SPI_CLK 4 5 SOC_SPI_CLK B16 K24 ILB_RTC_X1 U55
C18 GPIO_S5_1 / PMC_WAKE_PCIE_1 GPIO_S5_22 N24 ILB_RTC_X2 1
3.3V 1.35V

2
22_0804_8P4R_5% A17 GPIO_S5_2 / PMC_WAKE_PCIE_2 GPIO_S5_23 M20 1 2 NC 4
SOC_LID_OUT# GPIO_S5_3 / PMC_WAKE_PCIE_3 GPIO_S5_24 Y DDR_CORE_PWROK <5>
EMC@ C17 J18 R994 2
<23> PMC_CORE_PWROK

G
C16 GPIO_S5_4 GPIO_S5_25 M18 10M_0402_5% A
B14 GPIO_S5_5 / PMU_SUSCLK_1 GPIO_S5_26 K18 NL17SZ07DFT2G_SC70-5

3
SOC_SMI# C15 GPIO_S5_6 / PMU_SUSCLK_2 GPIO_S5_27 K20 32.768KHZ_12.5PF_Q13FC135000040 SA00004BV00
GPIO_S5_7 / PMU_SUSCLK_3 GPIO_S5_28 M22 Y8 1 2
GPIO_S5_29 M24

1 R995 2 GPIO_RCOMP
49.9_0402_1%
C13
A13
C19

N26
GPIO_S5_8
GPIO_S5_9
GPIO_S5_10

GPIO_RCOMP 5 OF 13
SIO_SPI_CS# / GPIO_S0_SC_66
SIO_SPI_MISO / GPIO_S0_SC_67
SIO_SPI_MOSI / GPIO_S0_SC_68
SIO_SPI_CLK / GPIO_S0_SC_69
h
GPIO_S5_30

AV32
BA28
AY28
AY30
1

2
C1009
15P_0402_50V8J
1

2
C1010
15P_0402_50V8J
DDR_CORE_PWROK 1
C1158
2
EMC@
0.01U_0402_16V7K

0705:for ESD request


B
.c
FH8065301546401_FCBGA131170

+RTCBATT1

W=20mils trace width 10mil W=20mils


+BIOS_SPI +1.8VALW +CHGRTC @ +RTCBATT1
1

1
+RTCVCC +RTCBATT +CHGRTC +RTCVCC R446
R998 1 RS@ 2 0_0402_5% C1011 D22 1K_0402_5%
w

SPI ROM ( 8MByte ) 1.8V

+
+BIOS_SPI R996 1U_0402_6.3V6K 2 1 2
C1013 1 2 .1U_0402_16V7K 20K_0402_1% 2
1 2 RTC_TEST# 1 +RTCBATT_R
U56 20mil

3
R999 1 2 3.3K_0402_5% SPI_CS0# 1 8 R1000 1 2 3.3K_0402_5% 1 2 RTC_RST# 3
SPI_MISO 2 CS# VCC 7 SPI_HOLD# R997
R1001 1 2 3.3K_0402_5% SPI_WP# 3 DO(IO1) HOLD#(IO3) 6 SPI_CLK 20K_0402_1%
1
BAS40-04_SOT23-3
20mil
WP#(IO2) CLK SPI_MOSI 1
4 5 C1012 +RTCVCC
GND DI(IO0) 1U_0402_6.3V6K C151
w

W25Q64DWSSIG_SO8 2 .1U_0402_16V7K D32 @


Reserve for EMI(Near SPI ROM)

1
2 BAV70W-7-F_SOT323-3

-
JBATT1 @
LOTES_AAA-BAT-054-K01

2
1 2 2 1 SPI_CLK SP07000H700
C1014 @EMC@ R1002 @EMC@ CLR_CMOS 1 2 RTC_TEST#
10P_0402_50V8J 33_0402_5% R1088 0_0402_5%
1 @ 2 RTC_RST#
1

SP@ R1089 0_0402_5%


w

CLRP1
A SHORT PADS A
2

Clear CMOS
Close to RAM door

Security Classification Compal Secret Data Compal Electronics, Inc.


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date VLV-M SOC CLK/PMU/SPI
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

http://sualaptop365.edu.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 8 of 37
5 4 3 2 1
5 4 3 2 1

USOC1F
D D
G2 M10
GPIO_S5_31 RESERVED_M10 M9
RESERVED_M9
M3 P6
L1 GPIO_S5_32 RESERVED_P6 P7
K2 GPIO_S5_33 RESERVED_P7

m
K3 GPIO_S5_34
M2 GPIO_S5_35 M7
N3 GPIO_S5_36 RESERVED_M7 M12 USB3_REXT0 1 2
P2 GPIO_S5_37 USB3_REXT0 R1003
L3 GPIO_S5_38 P10 1.24K_0402_1%
GPIO_S5_39 RESERVED_P10 P12
RESERVED_P12
M4
J3 RESERVED_M4 M6
P3 GPIO_S5_40 RESERVED_M6

o
H3 GPIO_S5_41 D4
GPIO_S5_42 USB3_RXP0 PCH_USB3_RX0_P <22>
B12 E3
GPIO_S5_43 USB3_RXN0 PCH_USB3_RX0_N <22>
K6
USB3 Port 0
M16 USB3_TXP0 K7 PCH_USB3_TX0_P <22>
<22> USB20_P0 USB_DP0 USB3_TXN0 PCH_USB3_TX0_N <22>
USB2 Port 0 (USB3.0 P0) K16
<22> USB20_N0 USB_DN0

.c
J14
<22> USB20_P1 USB_DP1
USB Hub G14
<22> USB20_N1 USB_DN1
K12
<16> USB20_P2 J12 USB_DP2
Touch Panel <16> USB20_N2 USB_DN2
K10
<16> USB20_P3 H10 USB_DP3 H8
Camera <16> USB20_N3 USB_DN3 RESERVED_H8 H7
RESERVED_H7
1K_0402_1% 1 2 R1004 ICLK_USB_TERMP D10
1K_0402_1% 1 2 R1005 ICLK_USB_TERMN F10 ICLK_USB_TERMP H4
ICLK_USB_TERMN RESERVED_H4 H5 +1.8VS

x
RESERVED_H5
C C
C20
<22> USB_OC0# USB_OC_0# / GPIO_S5_19

1
USB_OC1# B20 @
USB_OC_1# / GPIO_S5_20 R1006
+1.8VALW 10K_0402_5%

R1007 1 2 10K_0402_5% USB_OC0# R1008 1 2 USB_RCOMP D6 BD12 GPIO_S0_SC_56:

fi

2
R1009 1 2 10K_0402_5% USB_OC1# 45.3_0402_1% C7 USB_RCOMPO GPIO_S0_SC_55 BC12 GPIO_S0_SC_56
USB_RCOMPI GPIO_S0_SC_56 DBG_UART_TXD
A16 Swap Override
BD14 T203 0 = Enable

1
GPIO_S0_SC_57 / PCU_UART_TXD BC14 @
USB_PLL_MON GPIO_S0_SC_58 1 = Disable
R1010 1 @ 2 M13 BF14 R1011 Reference EDS Page 216
0_0402_5% USB_PLL_MON GPIO_S0_SC_59 BD16
GPIO_S0_SC_60 10K_0402_5%
BC16 DBG_UART_RXD T204
GPIO_S0_SC_61 / PCU_UART_RXD

2
B4
B5 USB_HSIC0_DATA BH12 SOC_SPKR
USB_HSIC0_STROBE ILB_8254_SPKR / GPIO_S0_SC_54 SOC_SPKR <25>

a
E2
D2 USB_HSIC1_DATA
NOTE: Ref checklist rev1.0 p.25 USB_HSIC1_STROBE
USB_HSIC_RCOMP must NOT float if they are not being used. BH22
SIO_I2C0_DATA / GPIO_S0_SC_78 BG23
1 2 HSIC_RCOMP A7 SIO_I2C0_CLK / GPIO_S0_SC_79
R1012 45.3_0402_1% USB_HSIC_RCOMP

in
BG24
SIO_I2C1_DATA / GPIO_S0_SC_80 BH24
49.9_0402_1% 1 2 R1013 LPC_RCOMP BF18 SIO_I2C1_CLK / GPIO_S0_SC_81
BH16 LPC_RCOMP / VGA_RCOMP
<23,24> LPC_AD0 ILB_LPC_AD_0 / GPIO_S0_SC_42
BJ17 BG25
<23,24> LPC_AD1 BJ13 ILB_LPC_AD_1 / GPIO_S0_SC_43 SIO_I2C2_DATA / GPIO_S0_SC_82 BJ25
ILB_LPC_CLK_0 : Output of 25MHz, <23,24> LPC_AD2 ILB_LPC_AD_2 / GPIO_S0_SC_44 SIO_I2C2_CLK / GPIO_S0_SC_83
Need Check with EC BG14
<23,24> LPC_AD3 BG17 ILB_LPC_AD_3 / GPIO_S0_SC_45
<23,24> LPC_FRAME# ILB_LPC_FRAME# / GPIO_S0_SC_46
22_0402_5% 1 EMC@ 2 R1014 LPC_CLK_0 BG15 BG26
<23> LPC_CLK_EC LPC_CLK_1 ILB_LPC_CLK_0 / GPIO_S0_SC_47 SIO_I2C3_DATA / GPIO_S0_SC_84
ILB_LPC_CLK_1 is for CLK_0 feedback.(Input) 22_0402_5% 1 EMC@ 2 R1015 BH14 BH26
<24> LPC_CLK_TPM LPC_CLKRUN# BG16 ILB_LPC_CLK_1 / GPIO_S0_SC_48 SIO_I2C3_CLK / GPIO_S0_SC_85
Set to Outpot for Normal Usage ILB_LPC_CLKRUN# / GPIO_S0_SC_49
BG13

B
+3VS
<8> SOC_SERIRQ

PCU_SMB_DATA
h
BG12
ILB_LPC_SERIRQ / GPIO_S0_SC_50

PCU_SMB_DATA / GPIO_S0_SC_51
SIO_I2C4_DATA / GPIO_S0_SC_86
SIO_I2C4_CLK / GPIO_S0_SC_87

SIO_I2C5_DATA / GPIO_S0_SC_88
SIO_I2C5_CLK / GPIO_S0_SC_89
BF27
BG27

BH28
BG28
SOC_I2C0_DATA
SOC_I2C0_CLK
T207
T208
B
2

TPM@ PCU_SMB_CLK BH10


R1016 PCU_SMB_ALERT# BG11 PCU_SMB_CLK / GPIO_S0_SC_52
.c
Check Intel for PU PCU_SMB_ALERT# / GPIO_S0_SC_53
2 1 LPC_CLK_0 BJ29
8.2K_0402_5% SIO_I2C6_DATA / GPIO_S0_SC_90
C1015 @EMC@ BG29 0705 : Reserved
10P_0402_50V8J SIO_I2C6_CLK / GPIO_S0_SC_91 / SD3_WP
1

LPC_CLKRUN#
<24> LPC_CLKRUN# LPC_CLK_1 GPIO_S0_SC_92
2 1 BH30 T201
C1016 @EMC@ GPIO_S0_SC_092 BG30 GPIO_S0_SC_93 T202
GPIO_S0_SC_093
PDA (Platform Debug Assistant) Test Points
10P_0402_50V8J 6 OF 13

FH8065301546401_FCBGA131170
w

+1.8VS +1.8VS
RP49
5 4 PCU_SMB_CLK
6 3 PCU_SMB_DATA
7 2 PCU_SMB_ALERT#
w

8 1
Pull High at EC side
4.7K_0804_8P4R_5%
2
G

1 3 PCU_SMB_CLK
<14,15,20,23> EC_SMB_CK2
DDR(15,16) Q64
D

S
2

MESS138W-G_SOT323-3
G

Minicard(21)
w

EC(24) 1 3 PCU_SMB_DATA
<14,15,20,23> EC_SMB_DA2
A Q65 A
D

MESS138W-G_SOT323-3

Security Classification Compal Secret Data Compal Electronics, Inc.


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date VLV-M SOC USB/LPC/SMBus
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

http://sualaptop365.edu.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 9 of 37
5 4 3 2 1
5 4 3 2 1

+1.35V
12A +SOC_VCC USOC1G 20mil JP3 JP@
AA27 AD38 DRAM_VDD_S4_CLK R1017 1 RS@ 2 0_0402_5%
AA29 CORE_VCC_S0iX_AA27 DRAM_VDD_S4_AD38 AF38
AA30 CORE_VCC_S0iX_AA29 DRAM_VDD_S4_AF38 JUMP_43X118
D AC27 CORE_VCC_S0iX_AA30 A48 C1017 1 2 1U_0402_6.3V6K JP4 JP@ D

m
AC29 CORE_VCC_S0iX_AC27 DRAM_VDD_S4_A48 AK38 C1018 1 2 .1U_0402_16V7K
AC30 CORE_VCC_S0iX_AC29 DRAM_VDD_S4_AK38 AM38
CORE_VCC_S0iX_AC30 DRAM_VDD_S4_AM38 AV41 JUMP_43X118
AD27 DRAM_VDD_S4_AV41 AV42
CORE_VCC_S0iX_AD27 DRAM_VDD_S4_AV42
1250mA
AD29 BB46
AD30 CORE_VCC_S0iX_AD29 DRAM_VDD_S4_BB46 BD49 +1.35V_SOC
AF27 CORE_VCC_S0iX_AD30 DRAM_VDD_S4_BD49 BD52

o
AF29 CORE_VCC_S0iX_AF27 DRAM_VDD_S4_BD52 BD53
AG27 CORE_VCC_S0iX_AF29 DRAM_VDD_S4_BD53 BF44 +1.35V_SOC
AG29 CORE_VCC_S0iX_AG27 DRAM_VDD_S4_BF44 BG51
AG30 CORE_VCC_S0iX_AG29 DRAM_VDD_S4_BG51 BJ48 C1019 2 1 2.2U_0402_6.3V6M
P26 CORE_VCC_S0iX_AG30 DRAM_VDD_S4_BJ48 C51 C1020 2 1 2.2U_0402_6.3V6M
CORE_VCC_S0iX_P26 DRAM_VDD_S4_C51

.c
P27 D44 C1021 2 1 2.2U_0402_6.3V6M
U27 CORE_VCC_S0iX_P27 DRAM_VDD_S4_D44 F49 C1022 2 1 2.2U_0402_6.3V6M
U29 CORE_VCC_S0iX_U27 DRAM_VDD_S4_F49 F52
V27 CORE_VCC_S0iX_U29 DRAM_VDD_S4_F52 F53
V29 CORE_VCC_S0iX_V27 DRAM_VDD_S4_F53 H46
V30 CORE_VCC_S0iX_V29 DRAM_VDD_S4_H46 M41
Y27 CORE_VCC_S0iX_V30 DRAM_VDD_S4_M41 M42 C1147 1 2 10U_0603_6.3V6M
Y29 CORE_VCC_S0iX_Y27 DRAM_VDD_S4_M42 V38 C1148 1 2 10U_0603_6.3V6M
Y30 CORE_VCC_S0iX_Y29 DRAM_VDD_S4_V38 Y38

x
CORE_VCC_S0iX_Y30 DRAM_VDD_S4_Y38

C TP2_CORE_VCC_S0iX C
T194 AA22
TP2_CORE_VCC_S0iX
14A +SOC_VNN +1.35VS

fi
420mA
AM22 AG18
AK32 UNCORE_VNN_S3_AM22 ICLK_V1P35_S3_F2_AG18 AJ19
AK30 UNCORE_VNN_S3_AK32 ICLK_V1P35_S3_F1_AJ19
AK29 UNCORE_VNN_S3_AK30
AK27 UNCORE_VNN_S3_AK29 BD1 VGA_V1P35_S3_F1 1 2
UNCORE_VNN_S3_AK27 VGA_V1P35_S3_F1_BD1
0708:Change Size
AK25 L49 @ BLM15AG601SN1D_2P

a
AK24 UNCORE_VNN_S3_AK25
AK22 UNCORE_VNN_S3_AK24 C1023 1 2 10U_0603_6.3V6M
UNCORE_VNN_S3_AK22
0705 : For CRT Flicker
AJ24 AD36 @ C1182 1 2 22U_0805_6.3V6M
AJ22 UNCORE_VNN_S3_AJ24 DRAM_V1P35_S0iX_F1_AD36
+SOC_VNN +SOC_VCC AG24 UNCORE_VNN_S3_AJ22 AG32
UNCORE_VNN_S3_AG24 UNCORE_V1P35_S0iX_F2_AG32

in
AG22 V36
AF24 UNCORE_VNN_S3_AG22 UNCORE_V1P35_S0iX_F3_V36 U36
UNCORE_VNN_S3_AF24 UNCORE_V1P35_S0iX_F4_U36
0715 Add for CRT fliker
AF22 +3VALW
UNCORE_VNN_S3_AF22
1

AD22 AA25 U65


AC24 UNCORE_VNN_S3_AD22 UNCORE_V1P35_S0iX_F5_AA25 VGA_V1P35_S3_F1 5 1
R1018 R1019 AC22 UNCORE_VNN_S3_AC24 OUT IN
UNCORE_VNN_S3_AC22

1
100_0402_1% 100_0402_1% AA24 2 1
AD24 UNCORE_VNN_S3_AA24 GND
2

UNCORE_VNN_S3_AD24 R1084 4 3 C1179


B B

<35> VGFX_VSNS
BB8 UNCORE_V1P35_S0iX_F6_AF19
h AF19
AG19
C1024 1
C1025 1
2
2
22U_0805_6.3V6M
1U_0402_6.3V6K
8.06K_0402_1% BYP SHDN
G916T1UF_SOT23-5 2
1U_0402_6.3V6K

2
P28 UNCORE_VNN_SENSE UNCORE_V1P35_S0iX_F1_AG19 C1026 1 2 1U_0402_6.3V6K
<35> VCORE_VSNS N28 CORE_VCC_SENSE_P28 7 OF 13 C1027 1 2 1U_0402_6.3V6K
<35> VCORE_GSNS CORE_VSS_SENSE_N28

1
C1028 1 2 1U_0402_6.3V6K
1

.c
C1029 1 2 1U_0402_6.3V6K
FH8065301546401_FCBGA131170 C1030 1 2 1U_0402_6.3V6K R1085
R1020 C1031 1 2 1U_0402_6.3V6K 100K_0402_1%
100_0402_1% C1032 1 2 1U_0402_6.3V6K

2
C1033 1 2 1U_0402_6.3V6K
2

2 1
<23,26,30,32,33,34> SUSP#
R1087 1
w

36K_0402_5%
C1181
.1U_0402_16V7K
VOUT = 1.25 (1 + R1/R2). 2
w

A A

Compal Electronics, Inc.


w

Security Classification Compal Secret Data


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date VLV-M SOC Power
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 10 of 37
5 4 3 2 1

http://sualaptop365.edu.vn
5 4 3 2 1

D D

m
Follow CRBv1.15
USOC1H R1021 RS@ +1.05VS
325mA 1000mA 0_0402_5%
U22 AC32 +1.05VS_SOC 1 2
+1.0VALW UNCORE_V1P0_G3_U22 CORE_V1P0_S3_AC32
V22 Y32

o
C1034 1 2 1U_0402_6.3V6K C5 UNCORE_V1P0_G3_V22 CORE_V1P0_S3_Y32
UNCORE_V1P0_G3 1uF*4 C1035 1 2 1U_0402_6.3V6K B6 UNCORE_V1P0_G3_C5 AA33
C1036 1 2 1U_0402_6.3V6K UNCORE_V1P0_G3_B6 CORE_V1P05_S3_AA33 AF33
C1037 1 2 1U_0402_6.3V6K Y19 CORE_V1P05_S3_AF33 AG33 C1038 1 2 0.47U_0402_6.3V6K
C3 USB3_V1P0_G3_Y19 CORE_V1P05_S3_AG33 AG35
USB3_V1P0_G3_C3 CORE_V1P05_S3_AG35

.c
USB3_V1P0_G3 0.01uF*1 C1039 1 2 0.01U_0402_16V7K U33 C1040 1 2 1U_0402_6.3V6K
CORE_V1P05_S3_U33 U35 C1041 1 2 1U_0402_6.3V6K CORE_V1P05_S3 1uF*3
CORE_V1P05_S3_U35 V33 C1042 1 2 1U_0402_6.3V6K
2750mA CORE_V1P05_S3_V33
V32
+1.0VS SVID_V1P0_S3_V32 +1.8VALW
BJ6
AD35 VGA_V1P0_S3_BJ6
AF35 DRAM_V1P0_S0iX_AD35 U24
C1043 1 2 1U_0402_6.3V6K AF36 DRAM_V1P0_S0iX_AF35 UNCORE_V1P8_G3_U24 V25
C1044 1 2 1U_0402_6.3V6K AA36 DRAM_V1P0_S0iX_AF36 PCU_V1P8_G3_V25 N20 C1045 1 2 1U_0402_6.3V6K PMC_V1P8_G3 1uF*1

x
DRAM_V1P0_S0iX 1uF*4 C1046 1 2 1U_0402_6.3V6K AJ36 DRAM_V1P0_S0iX_AA36 USB_V1P8_G3_N20 U25
DRAM_V1P0_S0iX_AJ36
65mA PMU_V1P8_G3_U25
C1047 1 2 1U_0402_6.3V6K AK35 AA18
C DRAM_V1P0_S0iX_AK35 UNCORE_V1P8_G3_AA18 C
AK36
Y35 DRAM_V1P0_S0iX_AK36 +1.8VS
C1048 1 2 1U_0402_6.3V6K Y36 DRAM_V1P0_S0iX_Y35
10mA

fi
C1049 1 2 1U_0402_6.3V6K AK19 DRAM_V1P0_S0iX_Y36 AM30
DDI_V1P0_S0iX 1uF*4 C1050 1 2 1U_0402_6.3V6K AK21 DDI_V1P0_S0iX_AK19 UNCORE_V1P8_S3_AM30 AN32 C1051 1 2 1U_0402_6.3V6K UNCORE_V1P8_S3 1uF*4
C1052 1 2 1U_0402_6.3V6K AJ18 DDI_V1P0_S0iX_AK21 UNCORE_V1P8_S3_AN32 U38 C1053 1 2 1U_0402_6.3V6K
AM16 DDI_V1P0_S0iX_AJ18 UNCORE_V1P8_S3_U38 C1054 1 2 1U_0402_6.3V6K
AN29 DDI_V1P0_S0iX_AM16 C1055 1 2 1U_0402_6.3V6K +1.5VS
AN30 VIS_V1P0_S0iX_AN29
VIS_V1P0_S0iX_AN30
58mA
C1056 1 2 22U_0805_6.3V6M V24 AM32

a
UNCORE_V1P0_S0iX 22uF*3 C1057 1 2 22U_0805_6.3V6M Y22 VIS_V1P0_S0iX_V24 HDA_V1P5_S3_AM32 C1058 1 2 1U_0402_6.3V6K HDA_LPE_V1P5V1P8_S3 1uF*1
1uF*2 C1059 1 2 22U_0805_6.3V6M Y24 VIS_V1P0_S0iX_Y22 +3VALW
C1060 1 2 1U_0402_6.3V6K AF16 VIS_V1P0_S0iX_Y24
C1061 1 2 1U_0402_6.3V6K AF18 UNCORE_V1P0_S3_AF16 N22 +3VALW_SOC 1 RS@ 2
UNCORE_V1P0_S3_AF18
Y18
UNCORE_V1P0_S3_Y18
50mA PCU_V3P3_G3_N22 R1022 0_0603_5%

in
PCIE_SATA_V1P0_S3 1uF*1 C1062 1 2 1U_0402_6.3V6K G1 N18 C1063 1 2 .1U_0402_16V7K USB_V3P3_G3 0.1uF*1
UNCORE_V1P0_S3 1uF*1 C1064 1 2 1U_0402_6.3V6K AK18 UNCORE_V1P0_S3_G1 USB_V3P3_G3_N18 P18 C1065 1 2 1U_0402_6.3V6K USB_ULPI_V1P8_S3 1uF*1
PCIE_V1P0_S3 1uF*1 C1066 1 2 1U_0402_6.3V6K AM18 PCIE_V1P0_S3_AK18 USB_V3P3_G3_P18 C1067 1 2 1U_0402_6.3V6K PCU_V3P3_G3 1uF*1
VGA_V1P0_S3 1uF*1 C1068 1 2 1U_0402_6.3V6K AM21 PCIE_V1P0_S3_AM18 +3VS
USB_V1P0_S3 0.1uF*1 C1069 1 2 .1U_0402_16V7K AN21 PCIE_V1P0_S3_AM21
PCIE_V1P0_S3_AN21
33mA
USB3DEV_V1P0_S3 0.01uF*1 C1070 1 2 0.01U_0402_16V7K AN18 AN24 +3VS_SOC 1 RS@ 2
GPIO_V1P0_S3 1uF*1 C1071 1 2 1U_0402_6.3V6K AN19 PCIE_SATA_V1P0_S3_AN18 VGA_V3P3_S3_AN24 R1023 0_0603_5%
SVID_V1P0_S3 1uF*1 C1072 1 2 1U_0402_6.3V6K AF21 SATA_V1P0_S3_AN19 AN27
AG21 UNCORE_V1P0_S0iX_AF21 SD3_V1P8V3P3_S3_AN27
B B
M14
U18
U19
AN25
h
UNCORE_V1P0_S0iX_AG21
USB_V1P0_S3_M14
USB_V1P0_S3_U18
USB_V1P0_S3_U19
GPIO_V1P0_S3_AN25
LPC_V1P8V3P3_S3_AM27

35mA
USB_HSIC_V1P2_G3_V18
AM27

V18
C1073
1 2
1U_0402_6.3V6K
VGA_V3P3_S3 1uF*1

+1.0VALW
USB_HSIC_V1P2_G3 1uF*1
.c
C1074 1 2 1U_0402_6.3V6K Disable HSIC
@ If the USB HSIC is not used, pin V18 can be connected
F1 AD16 Pop when use +1.2VALW to either +V1P2A or +V1P0A.
RESERVED_F1 VSS_AD16 AD18
T195 TP_CORE_V1P05_S4 AF30 VSS_AD18
TP_CORE_V1P05_S4_AF30
8 OF 13
FH8065301546401_FCBGA131170
w
w

A A

Compal Electronics, Inc.


w

Security Classification Compal Secret Data


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VLV-M SOC Power
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 11 of 37
5 4 3 2 1

http://sualaptop365.edu.vn
5 4 3 2 1

D D

m
o
USOC1I USOC1J USOC1K USOC1L USOC1M

.c
A11 AC36 AG38 AH47 AT24 AY36 BF30 E8 K9 U3
A15 VSS_A11 VSS_AC36 AC38 AH4 VSS_AG38 VSS_AH47 AH48 AT27 VSS_AT24 VSS_AY36 AY4 BF36 VSS_BF30 VSS_E8 F19 L13 VSS_K9 VSS_U3 U30
A19 VSS_A15 VSS_AC38 AD19 AH41 VSS_AH4 VSS_AH48 AH50 AT30 VSS_AT27 VSS_AY4 AY50 BF4 VSS_BF36 VSS_F19 F2 L19 VSS_L13 VSS_U30 U32
A23 VSS_A19 VSS_AD19 AD21 AH45 VSS_AH41 VSS_AH50 AH51 AT35 VSS_AT30 VSS_AY50 AY9 BG31 VSS_BF4 VSS_F2 F24 L27 VSS_L19 VSS_U32 U40
A27 VSS_A23 VSS_AD21 AD25 AH7 VSS_AH45 VSS_AH51 AH6 AT38 VSS_AT35 VSS_AY9 BA14 BG34 VSS_BG31 VSS_F24 F27 L35 VSS_L27 VSS_U40 U42
A31 VSS_A27 VSS_AD25 AD32 AH9 VSS_AH7 VSS_AH6 AM44 AT4 VSS_AT38 VSS_BA14 BA19 BG39 VSS_BG34 VSS_F27 F30 M19 VSS_L35 VSS_U42 U43
A35 VSS_A31 VSS_AD32 AD33 AJ1 VSS_AH9 VSS_AM44 AM51 AT47 VSS_AT4 VSS_BA19 BA22 BG42 VSS_BG39 VSS_F30 F35 M26 VSS_M19 VSS_U43 U45
A39 VSS_A35 VSS_AD33 AD47 AJ16 VSS_AJ1 VSS_AM51 AM7 AT52 VSS_AT47 VSS_BA22 BA27 BG45 VSS_BG42 VSS_F35 F5 M27 VSS_M26 VSS_U45 U46
A43 VSS_A39 VSS_AD47 AD7 AJ21 VSS_AJ16 VSS_AM7 AN1 AU1 VSS_AT52 VSS_BA27 BA32 BG49 VSS_BG45 VSS_F5 F7 M34 VSS_M27 VSS_U46 U48

x
A47 VSS_A43 VSS_AD7 AE1 AJ25 VSS_AJ21 VSS_AN1 AN11 AU24 VSS_AU1 VSS_BA32 BA35 BJ11 VSS_BG49 VSS_F7 G10 M35 VSS_M34 VSS_U48 U49
AA1 VSS_A47 VSS_AE1 AE11 AJ27 VSS_AJ25 VSS_AN11 AN12 AU3 VSS_AU24 VSS_BA35 BA40 BJ15 VSS_BJ11 VSS_G10 G20 M38 VSS_M35 VSS_U49 U5
C VSS_AA1 VSS_AE11 VSS_AJ27 VSS_AN12 VSS_AU3 VSS_BA40 VSS_BJ15 VSS_G20 VSS_M38 VSS_U5 C
AA16 AE12 AJ29 AN14 AU30 BA53 BJ19 G22 M47 U51
AA19 VSS_AA16 VSS_AE12 AE14 AJ3 VSS_AJ29 VSS_AN14 AN22 AU38 VSS_AU30 VSS_BA53 BB19 BJ23 VSS_BJ19 VSS_G22 G26 M51 VSS_M47 VSS_U51 U53
AA21 VSS_AA19 VSS_AE14 AE3 AJ30 VSS_AJ3 VSS_AN22 AN3 AU51 VSS_AU38 VSS_BB19 BB27 BJ27 VSS_BJ23 VSS_G26 G28 N1 VSS_M51 VSS_U53 U6

fi
AA3 VSS_AA21 VSS_AE3 AE4 AJ32 VSS_AJ30 VSS_AN3 AN33 AV12 VSS_AU51 VSS_BB27 BB35 BJ31 VSS_BJ27 VSS_G28 G32 N16 VSS_N1 VSS_U6 U8
AA32 VSS_AA3 VSS_AE4 AE40 AJ33 VSS_AJ32 VSS_AN33 AN35 AV13 VSS_AV12 VSS_BB35 BC20 BJ35 VSS_BJ31 VSS_G32 G34 N38 VSS_N16 VSS_U8 U9
AA35 VSS_AA32 VSS_AE40 AE42 AJ35 VSS_AJ33 VSS_AN35 AN36 AV14 VSS_AV13 VSS_BC20 BC22 BJ39 VSS_BJ35 VSS_G34 G42 N51 VSS_N38 VSS_U9 V12
AA38 VSS_AA35 VSS_AE42 AE43 AJ38 VSS_AJ35 VSS_AN36 AN38 AV18 VSS_AV14 VSS_BC22 BC26 BJ43 VSS_BJ39 VSS_G42 H19 P13 VSS_N51 VSS_V12 V16
AA53 VSS_AA38 VSS_AE43 AE45 AJ53 VSS_AJ38 VSS_AN38 AN40 AV19 VSS_AV18 VSS_BC26 BC28 BJ47 VSS_BJ43 VSS_H19 H27 P16 VSS_P13 VSS_V16 V19
AB10 VSS_AA53 VSS_AE45 AE46 AK10 VSS_AJ53 VSS_AN40 AN42 AV24 VSS_AV19 VSS_BC28 BC32 BJ7 VSS_BJ47 VSS_H27 H35 P19 VSS_P16 VSS_V19 V21
AB4 VSS_AB10 VSS_AE46 AE48 AK14 VSS_AK10 VSS_AN42 AN43 AV27 VSS_AV24 VSS_BC32 BC34 C14 VSS_BJ7 VSS_H35 J1 P20 VSS_P19 VSS_V21 V35

a
AB41 VSS_AB4 VSS_AE48 AE50 AK16 VSS_AK14 VSS_AN43 AN45 AV30 VSS_AV27 VSS_BC34 BC42 C31 VSS_C14 VSS_J1 J16 P24 VSS_P20 VSS_V35 V40
AB45 VSS_AB41 VSS_AE50 AE51 AK33 VSS_AK16 VSS_AN45 AN46 AV35 VSS_AV30 VSS_BC42 BD19 C34 VSS_C31 VSS_J16 J19 P32 VSS_P24 VSS_V40 V44
AB47 VSS_AB45 VSS_AE51 AE53 AK41 VSS_AK33 VSS_AN46 AN48 AV38 VSS_AV35 VSS_BD19 BD24 C39 VSS_C34 VSS_J19 J22 P35 VSS_P32 VSS_V44 V51
AB48 VSS_AB47 VSS_AE53 AE6 AK44 VSS_AK41 VSS_AN48 AN49 AV47 VSS_AV38 VSS_BD24 BD27 C42 VSS_C39 VSS_J22 J27 P38 VSS_P35 VSS_V51 V7
AB50 VSS_AB48 VSS_AE6 AE8 AM12 VSS_AK44 VSS_AN49 AN5 AV51 VSS_AV47 VSS_BD27 BD30 C45 VSS_C42 VSS_J27 J32 P4 VSS_P38 VSS_V7 Y10
VSS_AB50 VSS_AE8 VSS_AM12 VSS_AN5 VSS_AV51 VSS_BD30 VSS_C45 VSS_J32 VSS_P4 VSS_Y10

in
AB51 AE9 AM19 AN51 AV7 BD35 C49 J35 P47 Y14
AB6 VSS_AB51 VSS_AE9 AF10 AM24 VSS_AM19 VSS_AN51 AN53 AW13 VSS_AV7 VSS_BD35 BE19 D12 VSS_C49 VSS_J35 J40 P52 VSS_P47 VSS_Y14 Y16
AC16 VSS_AB6 VSS_AF10 AF12 AM25 VSS_AM24 VSS_AN53 AN6 AW19 VSS_AW13 VSS_BE19 BE2 D16 VSS_D12 VSS_J40 J53 P9 VSS_P52 VSS_Y16 Y21
AC18 VSS_AC16 VSS_AF12 AF25 AM29 VSS_AM25 VSS_AN6 AN8 AW27 VSS_AW19 VSS_BE2 BE35 D24 VSS_D16 VSS_J53 K14 T40 VSS_P9 VSS_Y21 Y25
AC19 VSS_AC18 VSS_AF25 AF32 AM33 VSS_AM29 VSS_AN8 AN9 AW3 VSS_AW27 VSS_BE35 BE8 D30 VSS_D24 VSS_K14 K22 U1 VSS_T40 VSS_Y25 Y33
AC21 VSS_AC19 VSS_AF32 AF47 AM35 VSS_AM33 VSS_AN9 AP40 AW35 VSS_AW3 VSS_BE8 BF12 D36 VSS_D30 VSS_K22 K32 U11 VSS_U1 VSS_Y33 Y41
AC25 VSS_AC21 VSS_AF47 AG16 AM36 VSS_AM35 VSS_AP40 AT12 AY10 VSS_AW35 VSS_BF12 BF16 D38 VSS_D36 VSS_K32 K36 U12 VSS_U11 VSS_Y41 Y44
AC33 VSS_AC25 VSS_AG16 AG25 AM40 VSS_AM36 VSS_AT12 AT16 AY22 VSS_AY10 VSS_BF16 BF24 E19 VSS_D38 VSS_K36 K4 U14 VSS_U12 VSS_Y44 Y7
AC35 VSS_AC33 VSS_AG25 AG36 M28 VSS_AM40 VSS_AT16 AT19 AY32 VSS_AY22 VSS_BF24 BF38 E35 VSS_E19 VSS_K4 K50 U21 VSS_U14 VSS_Y7 Y9
B B
B2
A6
A52
A51
A5
VSS_AC35
VSS_B2
VSS_A6
VSS_A52
VSS_A51
VSS_A5
9 OF 13VSS_AG36
VSS_B52
VSS_B53
VSS_BE1
VSS_BE53
VSS_BG1
B52
B53
BE1
BE53
BG1
VSS_M28 10 OF 13 VSS_AT19

FH8065301546401_FCBGA131170 h VSS_AY32 11 OF 13
VSS_BF38

FH8065301546401_FCBGA131170
VSS_E35 12 OF 13 VSS_K50

FH8065301546401_FCBGA131170
VSS_U21 13 OF 13 VSS_Y9

FH8065301546401_FCBGA131170
.c
A49 BJ2
A3 VSS_A49 VSS_BJ2 BJ3
BH53 VSS_A3 VSS_BJ3 BJ5
BH52 VSS_BH53 VSS_BJ5 BJ49
BH2 VSS_BH52 VSS_BJ49 BJ51
BH1 VSS_BH2 VSS_BJ51 BJ52
BG53 VSS_BH1 VSS_BJ52 C1
E53 VSS_BG53 VSS_C1 C53
VSS_E53 VSS_C53 E1
w

VSS_E1
U16
AN16 USB_VSSA_U16
VSSA_AN16

FH8065301546401_FCBGA131170
w

A A

Compal Electronics, Inc.


w

Security Classification Compal Secret Data


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date VLV-M SOC GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 12 of 37
5 4 3 2 1

http://sualaptop365.edu.vn
5 4 3 2 1

D D

m
o
.c
x
C C

fi
PVT 0827: Remove Debug Connector for ESD request.

a
in
B B

h
.c
w
w

A A

Compal Electronics, Inc.


w

Security Classification Compal Secret Data


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date VLV-M SOC Debug
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 13 of 37
5 4 3 2 1

http://sualaptop365.edu.vn
A B C D E

+DDR_A_VREF_DQ +1.35V CONN@ +1.35V Signal voltage level = 0.675 V


JDIMM1 PLACE TWO 4.7K RESISTORS CLOSE TO
1 2 DIMMS ON DIMM_VREF_CA / DIMM_VREF_DQ
3 VREF_DQ VSS 4 DDR_A_D4
DDR_A_D0 VSS DQ4 DDR_A_D5 DDR_A_DQS#[0..7] <5> Decoupling caps are needed; one 0.1 µ F placed close to VREF pins of each DDR3 SODIMM.
5 6
DDR_A_D1 7 DQ0 DQ5 8
DQ1 VSS DDR_A_DQS#0 DDR_A_DQS[0..7] <5>
9 10
DDR_A_DM0 11 VSS DQS0# 12 DDR_A_DQS0
13 DM0 DQS0 14 DDR_A_D[0..63] <5>
DDR_A_D2 15 VSS VSS 16 DDR_A_D6 +1.35V +DDR_A_VREF_DQ
DDR_A_D3 17 DQ2 DQ6 18 DDR_A_D7 DDR_A_MA[0..15] <5>
19 DQ3 DQ7 20 1 2
DDR_A_D8 VSS VSS DDR_A_D12 DDR_A_DM[0..7] <5>
21 22 R1027
DDR_A_D9 23 DQ8 DQ12 24 DDR_A_D13 4.7K_0402_1%
DQ9 DQ13 1
25 26 1 2
DDR_A_DQS#1 27 VSS VSS 28 DDR_A_DM1 R1028 C1076
DDR_A_DQS1 29 DQS1# DM1 30 4.7K_0402_1%
1 DQS1 RESET# DDR_A_RST# <5> .1U_0402_16V7K 1
31 32 2
DDR_A_D10 33 VSS VSS 34 DDR_A_D14
DDR_A_D11 35 DQ10 DQ14 36 DDR_A_D15 DDR_A_RST# 1 2
37 DQ11 DQ15 38 C1077
DDR_A_D16 39 VSS VSS 40 DDR_A_D20 .1U_0402_16V7K
DDR_A_D17 41 DQ16 DQ20 42 DDR_A_D21 +1.35V +DDR_A_VREF_CA
43 DQ17 DQ21 44 FOR EMI/ESD Require 01/15

m
DDR_A_DQS#2 45 VSS VSS 46 DDR_A_DM2 1 2
DDR_A_DQS2 47 DQS2# DM2 48 R1029
49 DQS2 VSS 50 DDR_A_D22 4.7K_0402_1%
DDR_A_D18 VSS DQ22 DDR_A_D23 1
51 52 1 2
DDR_A_D19 53 DQ18 DQ23 54 R1030 C1078
55 DQ19 VSS 56 DDR_A_D28 4.7K_0402_1%
All VREF traces should DDR_A_D24 57 VSS DQ28 58 DDR_A_D29 2
.1U_0402_16V7K
Layout Note: have 10 mil trace width DDR_A_D25 59 DQ24 DQ29 60
Place near JDIMM1 61 DQ25 VSS 62 DDR_A_DQS#3
DDR_A_DM3 63 VSS DQS3# 64 DDR_A_DQS3

o
65 DM3 DQS3 66
DDR_A_D26 67 VSS VSS 68 DDR_A_D30
+1.35V DDR_A_D27 69 DQ26 DQ30 70 DDR_A_D31
71 DQ27 DQ31 72
C111 1 2 10U_0603_6.3V6M VSS VSS
C112 1 2 10U_0603_6.3V6M
C113 1 2 10U_0603_6.3V6M 73 74
<5> DDR_A_CKE0 CKE0 CKE1 DDR_A_CKE2 <5>

.c
C114 1 2 10U_0603_6.3V6M 75 76
77 VDD VDD 78 DDR_A_MA15
79 NC A15 80 DDR_A_MA14
<5> DDR_A_BS2 BA2 A14
81 82
DDR_A_MA12 83 VDD VDD 84 DDR_A_MA11
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7
C110 1 2 .1U_0402_16V7K 87 A9 A7 88
C109 1 2 .1U_0402_16V7K DDR_A_MA8 89 VDD VDD 90 DDR_A_MA6
C108 1 2 .1U_0402_16V7K DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
C107 1 2 .1U_0402_16V7K 93 A5 A4 94
C115 1 2 .1U_0402_16V7K DDR_A_MA3 95 VDD VDD 96 DDR_A_MA2
C116 1 2 .1U_0402_16V7K DDR_A_MA1 97 A3 A2 98 DDR_A_MA0
C117 1 2 .1U_0402_16V7K 99 A1 A0 100

x
C164 1 2 .1U_0402_16V7K 101 VDD VDD 102
2 <5> DDR_A_CLK0 DDR_A_CLK2 <5> 2
103 CK0 CK1 104
<5> DDR_A_CLK0# CK0# CK1# DDR_A_CLK2# <5>
105 106
DDR_A_MA10 107 VDD VDD 108
A10/AP BA1 DDR_A_BS1 <5>
109 110
<5> DDR_A_BS0 BA0 RAS# DDR_A_RAS# <5>
111 112
113 VDD VDD 114
0604 remove for layout space limit

fi
<5> DDR_A_WE# WE# S0# DDR_A_CS0# <5>
<5> DDR_A_CAS# 115 116
CAS# ODT0 DDR_A_ODT0 <5>
117 118
DDR_A_MA13 119 VDD VDD 120
A13 ODT1 DDR_A_ODT2 <5>
<5> DDR_A_CS2# 121 122
123 S1# NC 124
125 VDD VDD 126
TEST VREF_CA +DDR_A_VREF_CA
127 128
DDR_A_D32 129 VSS VSS 130 DDR_A_D36
DDR_A_D33 131 DQ32 DQ36 132 DDR_A_D37
DQ33 DQ37

a
133 134
DDR_A_DQS#4 135 VSS VSS 136 DDR_A_DM4
DDR_A_DQS4 137 DQS4# DM4 138
139 DQS4 VSS 140 DDR_A_D38
DDR_A_D34 141 VSS DQ38 142 DDR_A_D39
DDR_A_D35 143 DQ34 DQ39 144
145 DQ35 VSS 146 DDR_A_D44
DDR_A_D40 147 VSS DQ44 148 DDR_A_D45

in
DDR_A_D41 149 DQ40 DQ45 150
151 DQ41 VSS 152 DDR_A_DQS#5
DDR_A_DM5 153 VSS DQS5# 154 DDR_A_DQS5
155 DM5 DQS5 156
DDR_A_D42 157 VSS VSS 158 DDR_A_D46
DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47
161 DQ43 DQ47 162
+0.675VS DDR_A_D48 163 VSS VSS 164 DDR_A_D52
DDR_A_D49 165 DQ48 DQ52 166 DDR_A_D53
C123 1 2 10U_0603_6.3V6M 167 DQ49 DQ53 168
DDR_A_DQS#6 169 VSS VSS 170 DDR_A_DM6
DDR_A_DQS6 171 DQS6# DM6 172

3
C124 1
C122 1
2 1U_0402_6.3V6K
2 1U_0402_6.3V6K DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_DM7
173
175
177
179
181
183
185
187
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
174
176
178
180
182
184
186
188
h
DDR_A_D54
DDR_A_D55

DDR_A_D60
DDR_A_D61

DDR_A_DQS#7
DDR_A_DQS7
3
.c
189 DM7 DQS7 190
DDR_A_D58 191 VSS VSS 192 DDR_A_D62
DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63
195 DQ59 DQ63 196
Layout Note: 197 VSS VSS 198
Place near JDIMM1.203,204 199 SA0 EVENT# 200
+3VS VDDSPD SDA EC_SMB_DA2 <9,15,20,23>
201 202
203 SA1 SCL 204 EC_SMB_CK2 <9,15,20,23>
+0.675VS VTT VTT +0.675VS
RS@ RS@ 205 206
2

R211 R212 207 GND1 GND2 208


1 BOSS1 BOSS2
Channel A
w
0_0402_5%

0_0402_5%

C125
.1U_0402_16V7K TYCO_2-2013022-1
2
Part Number = SP07000JN10
1

PCB Footprint = TYCO_2-2013022-1_204P

<Address: SA1:SA0=00 (A0H)>


w

DIMM_1 STD H:4mm


w

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date DDR3L DIMMA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

http://sualaptop365.edu.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 14 of 37
A B C D E
A B C D E

+DDR_B_VREF_DQ +1.35V CONN@ +1.35V


JDIMM2
1 2
3 VREF_DQ VSS1 4 DDR_B_D4
DDR_B_D0 VSS2 DQ4 DDR_B_D5 DDR_B_DQS#[0..7] <5>
5 6
DDR_B_D1 7 DQ0 DQ5 8
DQ1 VSS3 DDR_B_DQS#0 DDR_B_DQS[0..7] <5> +1.35V +DDR_B_VREF_DQ
9 10
DDR_B_DM0 11 VSS4 DQS#0 12 DDR_B_DQS0
13 DM0 DQS0 14 DDR_B_D[0..63] <5> 1 2
DDR_B_D2 15 VSS5 VSS6 16 DDR_B_D6 R1069
DDR_B_D3 17 DQ2 DQ6 18 DDR_B_D7 DDR_B_MA[0..15] <5>
4.7K_0402_1% 1
19 DQ3 DQ7 20 1 2
DDR_B_D8 VSS7 VSS8 DDR_B_D12 DDR_B_DM[0..7] <5>
21 22 R1067 C128
DDR_B_D9 23 DQ8 DQ12 24 DDR_B_D13 4.7K_0402_1%
DQ9 DQ13 .1U_0402_16V7K
25 26 2
DDR_B_DQS#1 27 VSS9 VSS10 28 DDR_B_DM1
DDR_B_DQS1 29 DQS#1 DM1 30
1 DQS1 RESET# DDR_B_RST# <5> 1
31 32
DDR_B_D10 33 VSS11 VSS12 34 DDR_B_D14
DDR_B_D11 35 DQ10 DQ14 36 DDR_B_D15 +1.35V +DDR_B_VREF_CA
37 DQ11 DQ15 38 DDR_B_RST# 1 2
DDR_B_D16 39 VSS13 VSS14 40 DDR_B_D20 C84 1 2
DDR_B_D17 41 DQ16 DQ20 42 DDR_B_D21 .1U_0402_16V7K R1070
43 DQ17 DQ21 44 4.7K_0402_1%

m
DDR_B_DQS#2 VSS15 VSS16 DDR_B_DM2 1
45 46 FOR EMI/ESD Require 01/15 1 2
DDR_B_DQS2 47 DQS#2 DM2 48 R1068 C142
49 DQS2 VSS17 50 DDR_B_D22 4.7K_0402_1%
VSS18 DQ22 .1U_0402_16V7K
DDR_B_D18 51 52 DDR_B_D23 2
DDR_B_D19 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDR_B_D28
All VREF traces should DDR_B_D24 57 VSS20 DQ28 58 DDR_B_D29
Layout Note: have 10 mil trace width DDR_B_D25 59 DQ24 DQ29 60
Place near JDIMM2 61 DQ25 VSS21 62 DDR_B_DQS#3
DDR_B_DM3 63 VSS22 DQS#3 64 DDR_B_DQS3

o
65 DM3 DQS3 66
DDR_B_D26 67 VSS23 VSS24 68 DDR_B_D30
+1.35V DDR_B_D27 69 DQ26 DQ30 70 DDR_B_D31
71 DQ27 DQ31 72
C133 1 2 10U_0603_6.3V6M VSS25 VSS26
C134 1 2 10U_0603_6.3V6M
C135 1 2 10U_0603_6.3V6M

.c
C136 1 2 10U_0603_6.3V6M <5> DDR_B_CKE0 73 74 DDR_B_CKE2 <5>
75 CKE0 CKE1 76
77 VDD1 VDD2 78 DDR_B_MA15
79 NC1 A15 80 DDR_B_MA14
<5> DDR_B_BS2 BA2 A14
81 82
DDR_B_MA12 83 VDD3 VDD4 84 DDR_B_MA11
C129 1 2 .1U_0402_16V7K DDR_B_MA9 85 A12/BC# A11 86 DDR_B_MA7
C130 1 2 .1U_0402_16V7K 87 A9 A7 88
C131 1 2 .1U_0402_16V7K DDR_B_MA8 89 VDD5 VDD6 90 DDR_B_MA6
C132 1 2 .1U_0402_16V7K DDR_B_MA5 91 A8 A6 92 DDR_B_MA4
C137 1 2 .1U_0402_16V7K 93 A5 A4 94
C138 1 2 .1U_0402_16V7K DDR_B_MA3 95 VDD7 VDD8 96 DDR_B_MA2
C139 1 2 .1U_0402_16V7K DDR_B_MA1 97 A3 A2 98 DDR_B_MA0

x
99 A1 A0 100
2 2
101 VDD9 VDD10 102
<5> DDR_B_CLK0 CK0 CK1 DDR_B_CLK2 <5>
<5> DDR_B_CLK0# 103 104 DDR_B_CLK2# <5>
105 CK0# CK1# 106
DDR_B_MA10 107 VDD11 VDD12 108
A10/AP BA1 DDR_B_BS1 <5>
<5> DDR_B_BS0 109 110 DDR_B_RAS# <5>
111 BA0 RAS# 112

fi
113 VDD13 VDD14 114
<5> DDR_B_WE# WE# S0# DDR_B_CS0# <5>
115 116
<5> DDR_B_CAS# CAS# ODT0 DDR_B_ODT0 <5>
117 118
DDR_B_MA13 119 VDD15 VDD16 120
A13 ODT1 DDR_B_ODT2 <5>
121 122
<5> DDR_B_CS2# S1# NC2
123 124
125 VDD17 VDD18 126
NCTEST VREF_CA +DDR_B_VREF_CA
127 128
DDR_B_D32 129 VSS27 VSS28 130 DDR_B_D36
DDR_B_D33 DQ32 DQ36 DDR_B_D37

a
131 132
133 DQ33 DQ37 134
DDR_B_DQS#4 135 VSS29 VSS30 136 DDR_B_DM4
DDR_B_DQS4 137 DQS#4 DM4 138
139 DQS4 VSS31 140 DDR_B_D38
DDR_B_D34 141 VSS32 DQ38 142 DDR_B_D39
DDR_B_D35 143 DQ34 DQ39 144
145 DQ35 VSS33 146 DDR_B_D44

in
DDR_B_D40 147 VSS34 DQ44 148 DDR_B_D45
DDR_B_D41 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDR_B_DQS#5
DDR_B_DM5 153 VSS36 DQS#5 154 DDR_B_DQS5
155 DM5 DQS5 156
DDR_B_D42 157 VSS37 VSS38 158 DDR_B_D46
DDR_B_D43 159 DQ42 DQ46 160 DDR_B_D47
+0.675VS 161 DQ43 DQ47 162
DDR_B_D48 163 VSS39 VSS40 164 DDR_B_D52
DDR_B_D49 165 DQ48 DQ52 166 DDR_B_D53
C143 1 2 10U_0603_6.3V6M 167 DQ49 DQ53 168
DDR_B_DQS#6 169 VSS41 VSS42 170 DDR_B_DM6

3
C145 1
C146 1
2 1U_0402_6.3V6K
2 1U_0402_6.3V6K
+3VS
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57
171
173
175
177
179
181
183
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
172
174
176
178
180
182
184
h
DDR_B_D54
DDR_B_D55

DDR_B_D60
DDR_B_D61
3
2

185 DQ57 VSS47 186 DDR_B_DQS#7


.c
R229 DDR_B_DM7 187 VSS48 DQS#7 188 DDR_B_DQS7
10K_0402_5% 189 DM7 DQS7 190
DDR_B_D58 191 VSS49 VSS50 192 DDR_B_D62
DDR_B_D59 193 DQ58 DQ62 194 DDR_B_D63
Layout Note:
1

195 DQ59 DQ63 196


Place near JDIMM2.203,204 197 VSS51 VSS52 198
199 SA0 EVENT# 200
+3VS VDDSPD SDA EC_SMB_DA2 <9,14,20,23>
201 202
SA1 SCL EC_SMB_CK2 <9,14,20,23>
+0.675VS 203 204 +0.675VS
VTT1 VTT2
205 206
G1 G2
2

1
C147
.1U_0402_16V7K
RS@
R231
0_0402_5%
TYCO_2-2013287-1
Part Number = SP07000KW00
Channel B
2 PCB Footprint = TYCO_2-2013287-1_204P
1

<Address: SA0:SA1=10 (A2H)>


w

SA0/SA1 Follow INTEL demo board

DIMM_2 REV H:4mm


w

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date DDR3L DIMMB
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

http://sualaptop365.edu.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 15 of 37
A B C D E
A B C D E

LCD POWER CIRCUIT


R959 @
+3VS +LCDVDD 100K_0402_5%
U8 W=60mils 1 2
1
5 VOUT
VIN JLVDS1
1 2
1 W=60mils 1 1

m
GND +INVPWR_B+ 1
4 C367 2 41
VIN 4.7U_0603_6.3V6K 3 2 G1 42
1 2 3 G2
3 W=60mils 4 43
C140 EN 5 4 G3 44
+LCDVDD 5 G4
1U_0402_6.3V6K G5243AT11U_SOT23-5 +3VS 6 45
2 7 6 G5 46
8 7 G6

o
<6> INVT_PWM_SOC 8
9
<6> ENVDD <23> EC_BKOFF# 10 9
11 10
12 11
1 2 13 12
13

.c
C549 @EMC@ 14
+INVPWR_B+ B+ 220P_0402_50V7K 15 14
1 2 16 15
C528 @EMC@ 17 16
220P_0402_50V7K 18 17
W=60mils L11 EMC@
W=60mils 19 18
2 1 20 19
HCB2012KF-221T30_2P 21 20
1 1 22 21
LCD/ LED PANEL Conn.

x
@EMC@ @EMC@ 23 22
SM010014520 3000ma 23
C364 C365 220ohm@100mhz 24
2 EDP_TXN0_C 24 2
1000P_0402_50V7K 68P_0402_50V8J DCR 0.04 C372 1 2 .1U_0402_16V7K 25
2 2 <6> EDP_TXN0 EDP_TXP0_C 25
C371 1 2 .1U_0402_16V7K 26
<6> EDP_TXP0 27 26

fi
C374 1 2 .1U_0402_16V7K EDP_TXN1_C 28 27
<6> EDP_TXN1 EDP_TXP1_C 28
C373 1 2 .1U_0402_16V7K 29
<6> EDP_TXP1 30 29
C377 1 2 .1U_0402_16V7K EDP_AUXN_C 31 30
<6> EDP_AUXN EDP_AUXP_C 31
<6> EDP_AUXP C376 1 2 .1U_0402_16V7K 32
33 32
EDP_HPD_CONN 34 33

a
35 34
36 35
37 36
+3VS 37
38
<9> USB20_P3 38
39
<9> USB20_N3 39

in
40
40
+1.8VS ACES_50203-04001-001
+LCDVDD
SP010014B00
CONN@
1

R383 @
3 10K_0402_5% R1063 +5VS CONN@ 3
100K_0402_5%

h JTS1
2

1
<6> EDP_HPD#
2

EDP_AUXN_C 2 1
<9> USB20_N2 2
Touch Module
1

EDP_AUXP_C 3
D <9> USB20_P2 4 3
4
1

.c
Q13 2 EDP_HPD_CONN TS_EN_1 5 7
G @ TS_EN_2 6 5 G1 8
2N7002K_SOT23-3 6 G2
1

S R1062
100K_0402_5% ACES_88460-00601-P01
3

R364 PCB Footprint = ACES_88460-00601-P01_6P


2

100K_0402_5%
2

Intel recommends having a pull-up R1033 1 TS@ 2 0_0402_5% TS_EN_1


<23> TS_EN
resistor of 100 kΩ for AUXN and a R1034 1 @ 2 0_0402_5%
pull-down resistor of 100 kΩ for AUXP
between the AC capacitor and the TS_EN_2
connector, to assist source detection R1035 1 @ 2 0_0402_5%
R1036 1 TS@ 2 0_0402_5%
by the sink device.
w

TS_INT_1 for TS one chip solution


TS_INT_2 for TS two chip solution
4 4

Compal Electronics, Inc.


w

Security Classification Compal Secret Data


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
eDP CONN.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 16 of 37
A B C D E

http://sualaptop365.edu.vn
A B C D E

+5VS +HDMI_5V_OUT
W=40mils C381 2 1 .1U_0402_16V7K HDMI_C_TX1- R1071 1 2 619_0402_1% HDMI_C_CLK- R368 RS@ 2 1 0_0402_5% HDMI_R_CK-
<6> HDMI_TX1-
<6> HDMI_TX1+ C382 2 1 .1U_0402_16V7K HDMI_C_TX1+ R1072 1 2 619_0402_1% HDMI_C_CLK+ R369 RS@ 2 1 0_0402_5% HDMI_R_CK+
<6> HDMI_TX2- C379 2 1 .1U_0402_16V7K HDMI_C_TX2- R1073 1 2 619_0402_1%
U52
<6> HDMI_TX2+ C380 2 1 .1U_0402_16V7K HDMI_C_TX2+ R1074 1 2 619_0402_1%
1 HDMI_C_TX0- R370 RS@ 2 1 0_0402_5% HDMI_R_D0- 1

HDMI_GND

m
3
<6> HDMI_TX0- C383 2 1 .1U_0402_16V7K HDMI_C_TX0- R1075 1 2 619_0402_1% HDMI_C_TX0+ R371 RS@ 2 1 0_0402_5% HDMI_R_D0+
OUT C384 2 1 .1U_0402_16V7K HDMI_C_TX0+ R1076 1 2 619_0402_1%
1 <6> HDMI_TX0+
1 <6> HDMI_CLK- C385 2 1 .1U_0402_16V7K HDMI_C_CLK- R1077 1 2 619_0402_1%
IN C378 C386 2 1 .1U_0402_16V7K HDMI_C_CLK+ R1078 1 2 619_0402_1% HDMI_C_TX1- R372 RS@ 2 1 0_0402_5% HDMI_R_D1-
<6> HDMI_CLK+ HDMI_C_TX1+ HDMI_R_D1+
2 .1U_0402_16V7K R373 RS@ 2 1 0_0402_5%
GND 2

o
3
AP2330W-7_SC59-3 HDMI_C_TX2- R374 RS@ 2 1 0_0402_5% HDMI_R_D2-
5 G
D
Q14A HDMI_C_TX2+ R375 RS@ 2 1 0_0402_5% HDMI_R_D2+
+3VS
S DMN66D0LDW-7_SOT363-6
+1.8VS

.c
1
R376
10K_0402_5%

2
<6> HDMI_HPD#

x
Q14B
D
G 2 HDMI_HPD
2
DMN66D0LDW-7_SOT363-6 S
2

1
1
R121
100K_0402_5%

fi
2

a
in
+1.8VS
RP15
HDMI_DDCDATA 5 4 +HDMI_5V_OUT
HDMI_DDCCLK 6 3 HDMI connector
HDMI_SDATA 7 2 JHDMI1
HDMI_SCLK 8 1 HDMI_HPD 19
18 HP_DET
+HDMI_5V_OUT +5V
3 2.2K_0804_8P4R_5% 17 3

h HDMI_SDATA
HDMI_SCLK
16
15
14
DDC/CEC_GND
SDA
SCL
Reserved

2
+1.8VS 13
HDMI_R_CK- 12 CEC
CK-
.c
11
HDMI_R_CK+ 10 CK_shield
CK+
2

HDMI_R_D0-
G

9
8 D0-
3 1 HDMI_SCLK D2 HDMI_R_D0+ 7 D0_shield
<6> HDMI_DDCCLK HDMI_R_D1- D0+
Q57 @EMC@ 6
S

D1-
2
G

MESS138W-G_SOT323-3 YSLC05CH_SOT23-3 5

1
HDMI_R_D1+ 4 D1_shield 20
3 1 HDMI_SDATA HDMI_R_D2- 3 D1+ GND 21
w

<6> HDMI_DDCDATA 2 D2- GND 22


Q58
S

MESS138W-G_SOT323-3 Reserved for ESD HDMI_R_D2+ 1 D2_shield GND 23


D2+ GND
ACON_HMR2U-AK120C
CONN@
DC232002700
w

4 4

Compal Electronics, Inc.


w

Security Classification Compal Secret Data


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI CONN.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 17 of 37
A B C D E

http://sualaptop365.edu.vn
A B C D E

+HDMI_5V_OUT

W=40mils
07/05 : ripple reduce 1
C450
.1U_0402_16V7K T196
2
Video Filter
1 JCRT1 1

m
L42 EMC@ 6
77MHz@1920x1200x60Hz BLM15BB470SN1D_2P 11
1 2 CRT_R_2 1
<6> CRT_R 7
L45 EMC@
BLM15BB470SN1D_2P CRT_DATA 12
1 2 CRT_G_2 2
<6> CRT_G 8
L46 EMC@

o
BLM15BB470SN1D_2P 13
1 2 CRT_B_2 3
<6> CRT_B
9
14

10P_0402_50V8J
C648 EMC@

10P_0402_50V8J
C615 EMC@

10P_0402_50V8J
C611 EMC@

10P_0402_50V8J
C647 EMC@

10P_0402_50V8J
C618 EMC@

10P_0402_50V8J
C616 EMC@
RP50 1 1 1 1 1 1 T206 4
CRT_R

.c
8 1 10 G 16
CRT_G 7 2 CRT_CLK 15 17
G
CRT_B 6 3 5
5 4 2 2 2 2 2 2
C-H_13-12201560CP
150_0804_8P4R_1% CONN@
T197 DC060006E00

x
2 2
+3VS

CRT Connector

fi
+HDMI_5V_OUT
1

CRT_HSYNC_B
@ U24 1
R1037 1 5 @EMC@
1K_0402_5% OE Vcc C448
74kHz@1920x1200x60Hz 10P_0402_50V8J
2

2 2

a
<6> CRT_HSYNC IN A
1

3 4 CRT_VSYNC_B
@ GND OUT Y
R1038 1

in
1K_0402_5% M74VHC1GT125DF2G_SC70-5 @EMC@
U23 C449
2

1 5 10P_0402_50V8J
OE Vcc 2
60Hz@1920x1200x60Hz
2 1 2
<6> CRT_VSYNC IN A +3VS
@ C1152 4.7U_0603_6.3V6K
1 2
3 3 4 @ C1154 1U_0402_6.3V6K 3
GND OUT Y

M74VHC1GT125DF2G_SC70-5 h 1
C1151
1
@ C1149
1
2

2
.1U_0402_16V7K

.1U_0402_16V7K
.c
@ C1153 .1U_0402_16V7K

0705 : For ripple reduce


+3VS
2

+3VS
G
w

CRT_DDC_DATA 1 6 CRT_DATA RP42 +HDMI_5V_OUT


<6> CRT_DDC_DATA CRT_DDC_DATA
S

5 4
Q27B CRT_DDC_CLK 6 3
5

DMN66D0LDW-7_SOT363-6 CRT_DATA 7 2
CRT_CLK 8 1
G

CRT_DDC_CLK 4 3 CRT_CLK
<6> CRT_DDC_CLK
w
S

2.2K_0804_8P4R_5%
Q27A
DMN66D0LDW-7_SOT363-6
4 4

Compal Electronics, Inc.


w

Security Classification Compal Secret Data


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT CONN.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 18 of 37
A B C D E

http://sualaptop365.edu.vn
5 4 3 2 1

+3VALW +3V_LAN
JP40 JP@

+LAN_VDD +3V_LAN
60mil JUMP_43X79 60mil 1200mA W=60mil 300mA W=60mil 1.4A W=60mil
U57
1 REGOUT 1 2
5 VOUT L50
VIN

4.7U_0603_6.3V6K
C1097

.1U_0402_16V7K
C1098

.1U_0402_16V7K
C1099

.1U_0402_16V7K
C1100

.1U_0402_16V7K
C1101

.1U_0402_16V7K
C1102

.1U_0402_16V7K
C1103

.1U_0402_16V7K
C1104

1U_0402_6.3V6K
C1105

.1U_0402_16V7K
C1106

4.7U_0603_6.3V6K
C1107

.1U_0402_16V7K
C1108

.1U_0402_16V7K
C1109

.1U_0402_16V7K
C1110

.1U_0402_16V7K
C1111
2.2UH_NLC252018T-2R2J-N_5%
2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
4 GND
VIN
2
3 1 2
C1096 EN C1183 .1U_0402_16V7K 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
1U_0402_6.3V6K G5243AT11U_SOT23-5 @EMC@
1

D D
Using for Switch mode
Place near Pin 3,8,41,52,61 Place near Pin 29 Using for Switch mode Place near Pin 11,12,39,58,63,64
<23> LAN_PWR_EN The trace length from Lx to
PIN48 (REGOUT) and from C to Lx The trace length
From EC must < 200mils. from C to
High active.
EN threshold voltage min:1.2V typ:1.6V max:2.0V PIN46,47(VDDREG)

m
Current limit threshold 1.5~2.8A must < 200mils. Close to Card Reader CONN
+3V_LAN Rising time must >0.5ms and <100ms U48 +CARD_3V3 JREAD1
Power Manahement/Isolation
ISOLATEB 38 SD_CMD_R 3
40 ISOLATEB 4 CMD
EC_PME# pull high 100K to +3VALW <23> EC_PME# LANWAKEB SD_D0 SD_D0_R VSS
1 2 Card Reader 19 RS@ 1 2 R768 0_0402_5% 5
C1184 .1U_0402_16V7K SD_D0/MS_D7/xD_D5 18 SD_D1 RS@ 1 2 R769 0_0402_5% SD_D1_R SD_CLK_R 6 VDD
SD_D1/MS_CLK/xD_D6 SD_D2 SD_D2_R CLK

4.7U_0603_6.3V6K
C817

.1U_0402_16V7K
C818
@EMC@ PCI-Express 23 RS@ 1 2 R770 0_0402_5% 7
CLK_PCIE_LAN 27 SD_D2/xD_D7 22 SD_D3 RS@ 1 2 R771 0_0402_5% SD_D3_R VSS
1 1

o
<8> CLK_PCIE_LAN CLK_PCIE_LAN# REFCLK_P SD_D3/MS_D2/xD_D2 SD_D0_R
<8> CLK_PCIE_LAN# 28 17 8
REFCLK_N SD_D4/xD_WE# 16 SD_D1_R 9 DAT0
SD_D5/xD_CE#
Reserve for EMI please close to IC DAT1
PLT_RST_BUF# 37 15 SD_D2_R 1
LAN_CLKREQ# pull high 10K to +1.8VS at SOC <8,20,23,24> PLT_RST_BUF# LAN_CLKREQ# PERSTB SD_D6/MS_INS#/xD_RE# SD_D3_R DAT2
36 14 2 2 2
<7> LAN_CLKREQ# CLKREQB SD_D7/xD_RDY 20 SD_CLK 1 2 R774 SD_CLK_R 1 2 CD/DAT3
10_0402_5%
C788 1 2 .1U_0402_16V7K PCIE_PRX_C_DTX_P0 30 SD_CLK/MS_D3/xD_D4 21 SD_CMD RS@ 1 2 R775 0_0402_5% SD_CMD_R C26 @EMC@
PLT_RST_BUF# 1 2 <7> PCIE_PRX_DTX_P0 PCIE_PRX_C_DTX_N0 HSOP SD_CMD/MS_D6/xD_D3 SD_WP SD_WP#
C791 1 2 .1U_0402_16V7K 31 35 5P_0402_50V8C 10
<7> PCIE_PRX_DTX_N0 HSON SD_WP/MS_D1/xD_WP# SD_CD# SD_CD WP SW

.c
C1150 0.01U_0402_16V7K <7> PCIE_PTX_C_DRX_P0 25 54 11
@EMC@ 26 HSIP SD_CD#/MS_D5/xD_ALE 34 12 CD SW
<7> PCIE_PTX_C_DRX_N0 HSIN MS_BS/xD_CLE GND SW
0705: EMC Reserved 55 13
EEPROM(TWSI) MS_D4/xD_D0 56 GND SW
T198 44 MS_D0/xD_D1 57 +3VS
42 SDA XD_CD# R1039 @ T-SOL_156-1000302601_NR
<24> 5IN1_LED# SCL/LED_CR 10K_0402_5% CONN@
GPO Pin 50 GPO 2 1 SP07000TF00
Transceiver Interface GPO
LAN_MIDI0+ 1 12
Y6 LAN_MIDI0- 2 MDIP0 DVDD33 39
25MHZ_10PF_7V25000014 LAN_MIDI1+ 4 MDIN0 DVDD33
LAN_MIDI1- 5 MDIP1 11 +3V_LAN

x
XTLI 1 3 XTLO LAN_MIDI2+ 6 MDIN1 AVDD33 58
C C
1 3 LAN_MIDI2- 7 MDIP2 AVDD33 63 +3VS
MDIN2 AVDD33
1500mA
GND GND LAN_MIDI3+ 9 64
1 1 LAN_MIDI3- MDIP3 AVDD33
10

1
C799 2 4 C800 MDIN3 41 +LAN_VDD
12P_0402_50V8J DVDD10 52 R1081
12P_0402_50V8J DVDD10
2 2 XTLI 59 300mA SD_CD#

fi
CKXTAL1 100K_0402_5%
XTLO 60 Clock 3
CKXTAL2 AVDD10 8

2
3
+3V_LAN AVDD10 61
Change To 12pF for Vendor Suggest. AVDD10
Regulator and Reference +CARD_3V3 D
5 SD_CD
0701 G

+3V_LAN REGOUT 48 29
SWR mode REGOUT EVDD10
S

45 1000mA DMN66D0LDW-7_SOT363-6

4
ENSWREG_H 13
Card_3V3 Q73A
46
+3VS 47 VDDREG 33 VDD33_18
VDDREG VDD33/18

a
53
VDD33/18
1

LAN_RST

.1U_0402_16V7K
C1112

.1U_0402_16V7K
C1113

4.7U_0603_6.3V6K
C1114

.1U_0402_16V7K
C1115

4.7U_0603_6.3V6K
C1116
2 1 62
R1042 RSET 24 +CARD_3V3
GND 1 1 1 1 1
1K_0402_5% R1041 32
2.49K_0402_1% LAN_LED0 51 GND 65

1
LAN_LED1 49 LED0 LEDs GND9(Exposed Pad) @ @
2

ISOLATEB 43 LED1 2 2 2 2 2 R1082


LED3 SD_WP
100K_0402_5%

in
2

R1044 RTL8411-CG_QFN64_9X9 Place near Pin 33 Place near Pin 53

2
6
15K_0402_5% D
G 2 SD_WP#
S
1

DMN66D0LDW-7_SOT363-6
LAN Connector

1
Q73B
change T38 01/14 +3V_LAN
T1 JRJ45
RJ45_MIDI0+ 1
LAN_TERMAL 1 24 PR1+ 9 LINK_100_1000#

B
LAN_MIDI3-
LAN_MIDI3+

LAN_MIDI2-
LAN_MIDI2+
2
3

4
5
6

7
TCT1
TD1+
TD1-

TCT2
TD2+
TD2-
MCT1
MX1+
MX1-

MCT2
MX2+
MX2-
23
22

21
20
19

18
RJ45_MIDI3-
RJ45_MIDI3+

RJ45_MIDI2-
RJ45_MIDI2+
RJ45_MIDI0-

RJ45_MIDI1+

RJ45_MIDI2+

RJ45_MIDI2-
2

5
PR1-

PR2+

PR3+

PR3-
h
LED_YELLOW_A1

LED_YELLOW_A2

LED_GREEN_B1
10

11

12
LAN_ACTIVITY#
40mil
JP1 @EMC@
B88069X9231T203_4P5X3P2-2
2 1
B
.c
LAN_MIDI1- 8 TCT3 MCT3 17 RJ45_MIDI1- RJ45_MIDI1- 6 LED_GREEN_B2 RJ45_GND 1 2 LANGND
LAN_MIDI1+ 9 TD3+ MX3+ 16 RJ45_MIDI1+ PR2- C814
TD3- MX3- RJ45_MIDI3+ 7 13 10P_0402_50V8J
10 15 PR4+ GND 14
40mil
LAN_MIDI0- 11 TCT4 MCT4 14 RJ45_MIDI0- RJ45_MIDI3- 8 GND LANGND

1
LAN_MIDI0+ TD4+ MX4+ RJ45_MIDI0+ PR4-

L30ESDL5V0C3-2_SOT23-3
D39 EMC@
12 13 JP@
TD4- MX4- SANTA_130451-F JUMP_43X118
CONN@ JP15 JP2
DC234005300 @EMC@
75_0402_1%

75_0402_1%

75_0402_1%

75_0402_1%
1

GST5009-E B88069X9231T203_4P5X3P2-2
SP050006B10

2
R788

R789

R790

R791

1
C810
2

1
.1U_0402_16V7K
2

RJ45_GND LAN_LED0 2 @ 1 LAN_ACTIVITY# 1 2


w

Place close to TCT pin R786 510_0402_5% C808 @EMC@


470P_0402_50V7K

LAN_LED1 2 @ 1 LINK_100_1000# 1 2
R787 510_0402_5% C809 @EMC@
470P_0402_50V7K
0705 : Unpop for cost down LED
w

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN RTL8411-CG
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

http://sualaptop365.edu.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 19 of 37
5 4 3 2 1
A B C D E

1 1

m
+1.5VS +1.5VS_WLAN
For Wireless LAN JP13JP@

o
+3VS 60mil +3VS_WLAN
1
@ JUMP_43X39
1
@
JP8 JP@ C1168 C463
.1U_0402_16V7K .1U_0402_16V7K
2 2

.c
2 1 1 1
JUMP_43X118 @
C441 C458 C459 C460
470P_0402_50V7K 4.7U_0603_6.3V6K .1U_0402_16V7K .1U_0402_16V7K
1 2 2 2 +3VS_WLAN
EMC@
+3VS_WLAN
+1.5VS_WLAN
R429 1 2 4.7K_0402_5% CONN@

x
JMINI1
1 2
2 <23> WLAN_PME# 3 1 2 4
2

5 3 4 6
7 5 6 8
<7> WLAN_CLKREQ#

fi
9 7 8 10
11 9 10 12
<8> CLK_PCIE_WLAN# 13 11 12 14
<8> CLK_PCIE_WLAN 13 14
15 16
17 15 16 18
19 17 18 20
19 20 WL_OFF# <23>
21 22

a
23 21 22 24 PLT_RST_BUF# <8,19,23,24>
+3VS_WLAN <7> PCIE_PRX_DTX_N1 23 24
<7> PCIE_PRX_DTX_P1 25 26
+3VALW 27 25 26 28
U9 @ 29 27 28 30 MINI1_SMBCLK R432 1 @ 2 0_0402_5%
29 30 MINI1_SMBDATA R434 1 EC_SMB_CK2 <9,14,15,23>
1 W=60mils 31 32 @ 2 0_0402_5% EC_SMB_DA2 <9,14,15,23>
VOUT <7> PCIE_PTX_C_DRX_N1 31 32

in
5 33 34
VIN <7> PCIE_PTX_C_DRX_P1 33 34
35 36
2 37 35 36 38 USB20_Hub_N0 <22>
4 GND 39 37 38 40 USB20_Hub_P0 <22>
VIN +3VS_WLAN 39 40
1 41 42 R443 1 2 100K_0402_5% +3VS_WLAN
@ 3 43 41 42 44
EN WLAN_ON <23> 43 44 MINI1_LED# <23>
C165 45 46
47 45 46 48
1U_0402_6.3V6K AP2821KTR-G1_SOT23-5 47 48
2 R1079 0_0402_5% 1 RS@ 2 49 50
3 3
<23> E51TXD_P80DATA
<23> E51RXD_P80CLK

<23> h
BT_OFF#
R1080 0_0402_5%

2 1
1 RS@ 2 51

53
49
51

GNDGND
50
52
52

54

1
R438
1K_0402_5% BELLW_80053-1021
.c
R437
100K_0402_5% DC040009P00

2
w
w

4 4

Compal Electronics, Inc.


w

Security Classification Compal Secret Data


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Mini PCIE(WLAN)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 20 of 37
A B C D E

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A B C D E

SATA HDD1 Conn.


JHDD1

1
C392 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 2 GND
<7> SATA_PTX_DRX_P0 SATA_PTX_C_DRX_N0 A+
C393 1 2 0.01U_0402_16V7K 3
1
<7> SATA_PTX_DRX_N0
C391 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0
4
5
A-
GND
SATA ODD Conn. 1

m
<7> SATA_PRX_DTX_N0 C394 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6 B- JODD1
<7> SATA_PRX_DTX_P0 7 B+
GND 1
C401 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P1 2 GND
<7> SATA_PTX_DRX_P1 SATA_PTX_C_DRX_N1 A+
8 <7> SATA_PTX_DRX_N1 C402 1 2 0.01U_0402_16V7K 3
9 V33 4 A-
10 V33 C403 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N1 5 GND

o
V33 <7> SATA_PRX_DTX_N1 SATA_PRX_C_DTX_P1 B-
11 C405 1 2 0.01U_0402_16V7K 6
12 GND <7> SATA_PRX_DTX_P1 7 B+
13 GND GND
14 GND +5VS
+5VS V5
15 80mils 8
V5 DP

.c
16 9
17 V5 10 +5V
GND 1 1 +5V
18 ODD_MD 11
19 Reserved 23 C404 C407 T185 12 MD 14
+5VS 20 GND GND 24 10U_0603_6.3V6M .1U_0402_16V7K 13 GND GND 15
21 V12 GND 25 2 2 GND GND
22 V12 GND 26
100mils V12 GND SANTA_201902-1_13P-T
CONN@

x
10U_0603_6.3V6M
C420

1U_0402_6.3V6K
C161

.1U_0402_16V7K
C397

CCM_C127043HR022M27FZR_22P-T
1 1 1
CONN@ LTCX004HZ00
2 2

@ DC231211190
2 2 2

fi
a
FAN1 Conn

in
+5VS C632
4.7U_0603_6.3V6K H3 H4 H5 H6 H9 H10 H11 H12 H17 FD1 FD2
1 2 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0

@ @

1
3 U31 3

h
1

1
1 8 FIDUCIAL_C40M80 FIDUCIAL_C40M80
2 EN GND 7
+VCC_FAN1 3 VIN GND 6 FD3 FD4
4 VOUT GND 5 @ @ @ @ @ @ @ @ @
<23> EN_DFAN1 VSET GND
.c
APE8875M_SO8 H13 H14 H15 H20 H16 @ @

1
H_4P0 H_4P0 H_4P0 H_3P2 H_3P2
0708:Change to SA000050J00 for EOL FIDUCIAL_C40M80 FIDUCIAL_C40M80
1

1
+3VS

C629 @ @ @ @ @
w
1

4.7U_0603_6.3V6K
R516 1 2 H21 H22 H23
10K_0402_5% H_3P0 H_2P5N H_2P5X3P5N
40mil JFAN1
2

+VCC_FAN1 1 @ @ @
1

1
w

2 4
<23> FAN_SPEED1 3 2 GND 5
3 GND
1
4 EMC@ 4
C630 ACES_88231-03041
.1U_0402_16V7K CONN@
2
SP020020710 Compal Electronics, Inc.
w

Security Classification Compal Secret Data


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD/ODD/FAN/Screw Hole
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 21 of 37
A B C D E

http://sualaptop365.edu.vn
A B C D E

+5VALW +USB3_VCCA

For ESD request U25 W=60mils


SM070000S80 WCM2012F2SF-670T04 67ohm 1 2 1 8
EMC@ L24 D15 C483 @EMC@ 2 GND OUT 7 R454
2 1 PCH_USB3_TX0_P_C 2 1 1 1 IN OUT
<9> PCH_USB3_TX0_P U3TXDP0 U3RXDN0 10 9 U3RXDN0 .1U_0402_16V7K 3 6 0_0402_5%
C484 .1U_0402_16V7K 2 1 USB_PWR_EN# 4 IN OUT 5 1 @ 2
1 EN/ENB OCB USB_OC0# <9> 1
U3RXDP0 2 2 9 8 U3RXDP0

m
2 1 PCH_USB3_TX0_N_C 3 4 U3TXDN0 SY6288D10CAC_MSOP8
<9> PCH_USB3_TX0_N 3 4
C482 .1U_0402_16V7K U3TXDN0 4 4 7 7 U3TXDN0
DLW21SN900HQ2L-0805_4P
U3TXDP0 5 5 6 6 U3TXDP0

3 3 +USB3_VCCA
EMC@ L25

o
PCH_USB3_RX0_P 2 1 U3RXDP0 8
<9> PCH_USB3_RX0_P 2 1 W=100mils SF000002Y00
@EMC@
L05ESDL5V0NA-4 SLP2510P8 220U 6.3V OSCON
PCH_USB3_RX0_N ESR 17mohm@100Khz

220U_6.3V_M
C486

1000P_0402_50V7K
C487

.1U_0402_16V7K
C994
3 4 U3RXDN0
<9> PCH_USB3_RX0_N 3 4
1 2 2

.c
DLW21SN900HQ2L-0805_4P
+
USB3.0 Conn.

@EMC@

@EMC@
R458 1 RS@ 2 0_0402_5% 1 1
2
CONN@
L26 @EMC@ JUSB1
3 4 USB20_P0_L 1
<9> USB20_P0 3 4 USB20_N0_L 2 VBUS

x
USB20_P0_L 3 D-
2 1 USB20_N0_L 4 D+
2 <9> USB20_N0 2 1 5 GND 2
U3RXDN0
WCM2012F2SF-670T04-0805_4P PCB Footprint = SW_WCM2012F2S_4P U3RXDP0 6 StdA-SSRX- 10
7 StdA-SSRX+ GND 11

fi
R461 1 RS@ 2 0_0402_5% U3TXDN0 8 GND-DRAIN GND 12
U3TXDP0 9 StdA-SSTX- GND 13
StdA-SSTX+ GND
OCTEK_USB-09EAAB
DC233008O20

a
in
+5VALW +5V_HUB +3V_HUB

1 2 +5V_HUB C1119
1
R1045
0_0603_5%
1 1 1 Vonder suggest Voltage up 10V USB/B
C1117 C1118 C1119
3 C1120 .1U_0402_16V7K .1U_0402_16V7K 10U_0603_10V6M +5V_HUB
(USB Port 1, Port2) 3

2
10U_0603_6.3V6M
2 2

h
2
+5VALW

1
JUSB2
19
20
25

U58 R1046 1
2 1
10K_0402_5%
VSS
VD33F
VDD5

2
.c
3
USB20_Hub_P0 12 4 3
<20> USB20_Hub_P0

2
USB20_Hub_N0 11 DP1 1 HUB_OVCJ USB_PWR_EN# 5 4
To BT <20> USB20_Hub_N0 DM1 OVCJ <23> USB_PWR_EN# 5
USB20_Hub_P1 10 2 6
DP2 TESTJ 1 6
USB20_Hub_N1 9 3 HUB_XOUT USB20_Hub_N2 7
USB20_Hub_P2 8 DM2 XOUT 4 HUB_XIN C1121 USB20_Hub_P2 8 7
USB20_Hub_N2 7 DP3 XIN 5 9 8
DM3 DM4 0.01U_0402_16V7K 9
HUB_BUSJ 18 6 2 USB20_Hub_N1 10
HUB_VBUSM 17 BUSJ DP4 21 USB20_Hub_P1 11 10
w

HUB_XRSTJ 16 VBUSM DRV 22 Y9 12 11


15 XRSTJ LED1 23 4 1 HUB_XIN 13 12
<9> USB20_P1 14 DPU LED2 24 14 13
<9> USB20_N1 DMU PWRJ 14
13
REXT ACES_88514-01201-071
1

+3V_HUB FE1.1S-BQFN24B_WQFN24_4X4 HUB_XOUT3 2 CONN@


w

SP01001BF00
R1047 1 2 100K_0402_5% HUB_XRSTJ 2.7K_0402_1% 12MHZ_18PF_7V12000001
R1048
Part Number = SJ10000C210
4 R1049 1 2 100K_0402_5% HUB_BUSJ need apply footprint 4
2

PCB Footprint = Y_CRG3201212_4P


R1050 1 2 10K_0402_5% HUB_VBUSM

Compal Electronics, Inc.


w

C1122 1 2 0.01U_0402_16V7K Security Classification Compal Secret Data


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB Conn & Hub FE1.1S
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 22 of 37
A B C D E

http://sualaptop365.edu.vn
A B C D E

+3VLP +3VALW_EC L31


BLM15AG121SN1D_L0402_2P
2 RS@ 1 1 2 +EC_VCCA
+EC_VCCA +3VALW_EC
1

.1U_0402_16V7K
C502

.1U_0402_16V7K
C503

.1U_0402_16V7K
C504

.1U_0402_16V7K
C505

1000P_0402_50V7K
C506 @EMC@

1000P_0402_50V7K
C507 @EMC@
R236 1 1 1 1 2 2
0_0805_5% C508 LID_SW# R476 1 2 47K_0402_5%
.1U_0402_16V7K
2
2 2 2 2 1 1

@
ECAGND <29>

+3VALW_EC

111
125
R480 2 1 47K_0402_5% EC_RST#

22
33
96

67
9
U28 TP_CLK R478 1 2 4.7K_0402_5%
TP_DATA +5VS
C509 2 1 .1U_0402_16V7K R479 1 2 4.7K_0402_5%

EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC

EC_VDD/VCC

EC_VDD/AVCC
1 EC_MUTE# 1
R481 1 @ 2 10K_0402_5%

1 21 BT_OFF#
+3VALW_EC <24> KBL_EN# 2 GATEA20/GPIO00 GPIO0F 23 BT_OFF# <20>
BEEP#
<8> EC_KBRST# 3 KBRST#/GPIO01 BEEP#/GPIO10 26 USB_PWR_EN# BEEP# <25>
<8,24> EC_SERIRQ SERIRQ GPIO12 USB_PWR_EN# <22>

m
4 27 R482
2 100K_0402_5% EC_PME# <9,24> LPC_FRAME# LPC_FRAME# ACOFF/GPIO13
R484 1 5 0_0402_5%
<9,24> LPC_AD3 LPC_AD3
7 PWM Output C510 2 1 100P_0402_50V8J ECAGND 2 RS@ 1 H_PROCHOT# <7>
<9,24> LPC_AD2 8 LPC_AD2 63 BATT_TEMP <35> VR_HOT#
<9,24> LPC_AD1 LPC_AD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP <29>

1
10 LPC & MISC 64
<9,24> LPC_AD0 LPC_AD0 AD1/GPIO39 ADP_I
65 D
+3VALW_EC 12 ADP_I/AD2/GPIO3A 66 AD_BID0 ADP_I <29,30> H_PROCHOT#_EC 2
AD Input Q50
<9> LPC_CLK_EC 13 CLK_PCI_EC AD3/GPIO3B 75
RP12 G 2N7002K_SOT23-3
1 8 EC_SMB_CK1 <8,19,20,24> PLT_RST_BUF# EC_RST# 37 PCIRST#/GPIO05 AD4/GPIO42 76 EC_PME# S

o
2 7 EC_SMB_DA1 20 EC_RST# IMON/AD5/GPIO43 EC_PME# <19>
<8> EC_SCI#

3
3 6 EC_SMB_CK2 38 EC_SCII#/GPIO0E
4 5 EC_SMB_DA2 <20> WLAN_ON GPIO1D Latest design guide suggest change to
+3VS
68 74LVC1G06.
2.2K_0804_8P4R_5% DAC_BRIG/GPIO3C 70 EN_DFAN1
+3VALW_EC
DA Output EN_DFAN1/GPIO3D EN_DFAN1 <21>
KSI0 55 71
KSI0/GPIO30 IREF/GPIO3E

.c
KSI1 56 72
KSI2 57 KSI1/GPIO31 CHGVADJ/GPIO3F
R488 1 @ 2 10K_0402_5% EC_SMI# KSI3 58 KSI2/GPIO32 83 EC_MUTE#
R492 1 @ 2 10K_0402_5% EC_SCI# KSI4 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84 LAN_PWR_EN EC_MUTE# <25>
KSI5 60 KSI4/GPIO34 USB_EN#/GPIO4B 85 WLAN_PME# LAN_PWR_EN <19>
KSI5/GPIO35 CAP_INT#/GPIO4C WLAN_PME# <20>
KSI6 61 PS2 Interface 86
1 2 PLT_RST_BUF# KSI7 62 KSI6/GPIO36 EAPD/GPIO4D 87 TP_CLK
39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA TP_CLK <24>
C511 @EMC@ KSO0 R509 2 RS@ 1 0_0402_5%
ACIN <8,30>
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <24>
0.01U_0402_16V7K KSO1 40
KSO2 41 KSO1/GPIO21
ESD request KSO2/GPIO22 EC_ACIN
KSI[0..7] 42 97 2 1 100P_0402_50V8J

x
KSO3 VGATE C512
<24> KSI[0..7] KSO4 43 KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 98 VGATE <35>
2 EMC@ 2
KSO[0..17] KSO5 44 KSO4/GPIO24 W OL_EN/GPXIOA01 99 TXE_DBG
<24> KSO[0..17]
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 VCIN0_PH TXE_DBG <7>
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 VCIN0_PH <29>
KSO7/GPIO27 SPI Device Interface
KSO8 47
48 KSO8/GPIO28 119

fi
KSO9
KSO10 49 KSO9/GPIO29 SPIDI/GPIO5B 120
KSO11 50 KSO10/GPIO2A SPIDO/GPIO5C 126 +3VALW_EC
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58
KSO12 51 128
KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A
KSO14 53 KSO13/GPIO2D
KSO15 54 KSO14/GPIO2E 73 ENBKL
KSO15/GPIO2F ENBKL/AD6/GPIO40 ENBKL <6>

2
KSO16 81 74
KSO17 82 KSO16/GPIO48 PECI_KB930/AD7/GPIO41 89 FSTCHG @ @

a
KSO17/GPIO49 FSTCHG/GPIO50 BATT_BLUE_LED# FSTCHG <30>
90 R696 R697
BATT_CHG_LED#/GPIO52 91 BATT_BLUE_LED# <24>
10K_0402_5% 10K_0402_5%
77 CAPS_LED#/GPIO53 92 PWR_LED
<29,30> EC_SMB_CK1 GPIO PWR_LED <24>

1
78 EC_SMB_CK1/GPIO44 PW R_LED#/GPIO54 93 BATT_AMB_LED# VCIN0_PH
Charger and BATT <29,30> EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW _LED#/GPIO55 BATT_AMB_LED# <24>
79 95 SYSON VCIN1_PROCHOT
<9,14,15,20> EC_SMB_CK2 EC_SMB_CK2/GPIO46SM Bus SYSON/GPIO56 VR_ON SYSON <32>
To SOC 80 121

in
<9,14,15,20> EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 127 VR_ON <35>
PM_SLP_S4#/GPIO59

6 100 EC_RSMRST#
<8> EC_SLP_S3# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 EC_LID_OUT# EC_RSMRST# <8>
<8> EC_SLP_S4# 15 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 102 VCIN1_PROCHOT EC_LID_OUT# <8> EC_RSMRST# 1 2
<8> EC_SMI# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 H_PROCHOT#_EC VCIN1_PROCHOT <29>
16 103 C1156 EMC@
GPIO0A H_PROCHOT#_EC/GPXIOA06 H_PROCHOT#_EC <29>
17 104 .1U_0402_16V7K
<24> EC_WLAN_LED# 18 GPIO0B VCOUT0_PH/GPXIOA07 105 MAINPWON <29,31>
GPIO0C GPO BKOFF#/GPXIOA08 PBTN_OUT# EC_BKOFF# <16>
19 GPIO 106 0705:for ESD request
<20> WL_OFF# GPIO0D PBTN_OUT#/GPXIOA09 PBTN_OUT# <8>

3
+3VALW_EC

Board ID
<31,33,34> SPOK
<21> FAN_SPEED1

<20> E51TXD_P80DATA
25
28
29
30
EC_INVT_PW M/GPIO11
FAN_SPEED1/GPIO14
EC_PME#/GPIO15
EC_TX/GPIO16 h PCH_APW ROK/GPXIOA10
SA_PGOOD/GPXIOA11
107
108
3
2

31 110 EC_ACIN
Analog Board ID definition, <20> E51RXD_P80CLK EC_RX/GPIO17 AC_IN/GPXIOD01 EC_ON
@ Please see page 3. 32 112
<8> PMC_CORE_PWROK PCH_PW ROK/GPIO18 EC_ON/GPXIOD02 EC_ON <31>
Ra R503 34 114 ON/OFF
.c
<24> PWR_SUSP_LED# SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 LID_SW# ON/OFF <24>
100K_0402_5% 36 GPI 115
<16> TS_EN NUM_LED#/GPIO1A LID_SW #/GPXIOD04 LID_SW# <24>
116 SUSP#
SUSP# <10,26,30,32,33,34>
1

AD_BID0 SUSP#/GPXIOD05 117


GPXIOD06 118
PECI_KB9012/GPXIOD07 MINI1_LED# <20>
2

EC_XCLKI 122
AGND/AGND

1 T199 EC_XCLK0 XCLKI/GPIO5D


@ 123 124 +V18R
GND/GND
GND/GND
GND/GND
GND/GND

R506 T200 XCLKO/GPIO5E V18R


Rb C517 1
GND0

8.2K_0402_5% .1U_0402_16V7K
2 C515
1

4.7U_0603_6.3V6K
w

KB9012QF-A4_LQFP128_14X14 2
11
24
35
94
113

69

Part Number = SA00004OB30 20mil


PMC_CORE_PWROK 1 2 ECAGND 1 2
C1157 EMC@ L32
0.047U_0402_25V7K BLM15AG121SN1D_L0402_2P
w
w

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE KB9012
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Intel BayTrail-M Platform
http://sualaptop365.edu.vn
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, September 03, 2013 Sheet 23 of 37
A B C D E
A B C D E

KB Conn.
To TP/B Conn.
JKB1 JKB2

KSO0 1 KSO0 1 CONN@ +5VS


KSO1
KSO2
2
3
1
2
KSO1
KSO2
2
3
1
2
KB BackLight Conn. JTP2
1
.1U_0402_16V7K
C663 1 2
KSO3 4 3 KSO3 4 3 1 2 TP_DATA
4 4 2 TP_CLK TP_DATA <23>
KSO4 5 KSO4 5 3
5 5 3 TP_CLK <23>
KSO5 6 KSO5 6 4
KSO6 7 6 KSO6 7 6 BL@ 4 5 RIGHT_BTN#
KSO7 8 7 KSO7 8 7 Q44 5 6 LEFT_BTN#
1 1
KSO8 9 8 KSO8 9 8 +5VS DMG2301U-7_SOT23-3 CONN@ 6
KSO9 10 9 KSO9 10 9 JBL1 7 TP_CLK
10 10 +5VS_BL GND TP_DATA

D
KSO10 11 KSO10 11 3 1 4 6 8
KSO11 12 11 KSO11 12 11 3 4 G2 5 GND
12 12 3 G1

m
KSO12 13 KSO12 13 +5VALW 2 ACES_88514-00601-071
13 13 2 1 1
KSO13 14 KSO13 14 1 SP010014M00 @EMC@ @EMC@

G
2
KSO14 15 14 KSO14 15 14 1 2 KBL_EN_R 1 C551 C553
KSO15 16 15 KSO15 16 15 R451 BL@ ACES_50504-0040N-001 100P_0402_50V8J
16 16 100P_0402_50V8J
KSO16 17 KSO16 17 100K_0402_5% SP01000Z300 2 2
KSO17 18 17 KSO17 18 17
18 18

.1U_0402_16V7K
C525

.1U_0402_16V7K
C524
KSI0 19 KSI0 19 1 RS@ 2
KSI1 20 19 KSI1 20 19 R592 SW 4 SW 5
1 1

o
20 20

1
KSI2 21 KSI2 21 0_0402_5% TJE-532QR5_6P TJE-532QR5_6P
KSI3 22 21 KSI3 22 21 D LEFT_BTN# 3 1 RIGHT_BTN# 3 1
KSI4 23 22 KSI4 23 22 2 @ @
23 23 <23> KBL_EN# 2 2
KSI5 24 KSI5 24 @ Q26 G 4 2 4 2
KSI6 25 24 27 KSI6 25 24 27 2N7002K_SOT23-3 S
KSI7 26 25 G1 28 KSI7 26 25 G1 28

.c
3

6
5

6
5
26 G2 26 G2

E-T_6905-E26N-01R E-T_6905-E26N-01R
CONN@ CONN@
SP01000IJ00 SP01000IJ00 100g for Press 100g for Press

KSI[0..7]
KSI[0..7] <23>

x
KSO[0..17]
2
KSO[0..17] <23> 2

fi
PW R_LED# LED LED6 +3VALW

1
D BATT_BLUE_LED# 1 2 1 2
<23> BATT_BLUE_LED#

a
2 B
<23> PW R_LED Q17 R699 51_0402_5%
G 2N7002K_SOT23-3

2
S BATT_AMB_LED# 3 4 1 2
<23> BATT_AMB_LED# A
R452 R698 680_0402_5%

3
100K_0402_5%
PWR/B LTST-C295TBKF-CA_AMBER-BLUE

in
LED7

1
JPW R1
1 PW R_LED# 1 2 1 2
1 +3VALW B
2 +3VLP R700 51_0402_5%
2 3 LID_SW# +3VS +3VS
3 PWR_LED# LID_SW # <23> PWR_SUSP_LED#
4 <23> PW R_SUSP_LED# 3 4 1 2
4 5 ON/OFF A
R701 680_0402_5%
5

2
6
6 R632 R10 LTST-C295TBKF-CA_AMBER-BLUE

3
GND
GND
7
8
+3VS
MEDIA LED
h +3VS 10K_0402_5% 10K_0402_5%
Need check CIS Symbol
3

1
5
ACES_88514-00601-071 +3VS
CONN@ R740 LED4 LED8

VCC
SP010014M00 51_0402_5% 1
IN1 SOC_SATALED# <7>
.c
1 2 2 1 MEDIA_LED# 4 EC_W LAN_LED# 1 2 1 2
OUT <23> EC_W LAN_LED#
A 2 A R702 499_0402_1%

GND
IN2 5IN1_LED# <19>
LTST-C191TBKT-CA_BLUE LTST-C191KFKT-2CA_ORANGE
U39
3
MC74VHC1G08DFT2G_SC70-5
w

TPM Board
CONN@
w

JTPM1

ON/OFF BTN +3VLP


<9> LPC_CLKRUN#
1
3 1 2
2
4
LPC_AD3
LPC_AD2
LPC_AD3
LPC_AD2
<9,23>
<9,23>
<8,19,20,23> PLT_RST_BUF# 3 4 LPC_CLK_TPM
5 6
5 6 LPC_CLK_TPM <9>
2

7 8 LPC_FRAME#
7 8 LPC_AD1 LPC_FRAME# <9,23> +3VS
R534 +3VALW 9 10
9 10 LPC_AD0 LPC_AD1 <9,23>
SW 1 DBG@ 11 12
w

100K_0402_5% +3VS 11 12 LPC_AD0 <9,23>


4
TJE-532QR5_6P 13 14 LPCPD# 2 1 4
1 3 15 13 14 16 EC_SERIRQ R392
EC_SERIRQ <8,23>
1

15 16 10K_0402_5%
2 4 ON/OFF 12/9 modify pin define TPM@
ON/OFF <23>
FOX_NQT510166-LOAO-7F
5
6

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB/TP/LED/TPM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.3
Intel BayTrail-M Platform
http://sualaptop365.edu.vn
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, September 03, 2013 Sheet 24 of 37
A B C D E
A B C D E

Int. Speaker Conn.


+5VS +VDDA JSPK1
40mil
40mil JP9 JP@
40mil HD Audio Codec SPKR+
SPKR-
1
2 1
SPKL+ 3 2 5
1 3 G1 6
EMC@ JUMP_43X79 SPKL- 4
C554 4 G2
.1U_0402_16V7K ACES_88266-04001

3
2 CONN@
+VDDA D27 D37
1 SP02000K200 1
AZ5125-02S.R7G_SOT23-3 AZ5125-02S.R7G_SOT23-3
@EMC@ @EMC@

1
HP_PLUG#_1 R523

m
100K_0402_5%

1
2
1
+PVDD_HDA
220ohm/0.04/3000mA 40mil D
2 1 Q31 2 HP_PLUG#
+VDDA
L33 1 1 2N7002K_SOT23-3 G GNDA
HCB2012KF-221T30_2P S
C608 C558 2 2 Headphone Out

3
10U_0603_6.3V6M .1U_0402_16V7K C444 C445

o
2 2 @EMC@ @EMC@ JHP1
GNDA 330P_0402_50V7K 330P_0402_50V7K COM_MIC 4
Place near Pin41 1 1
Place near Pin46 3
HP_LEFT R238 1 2 60.4_0603_1% HPOUT_L 1

.c
+1.5VS 20mil HP_RIGHT R237 1 2 60.4_0603_1% HPOUT_R 2
1 1
GNDA 5
C605 C604 +3VS
10U_0603_6.3V6M .1U_0402_16V7K
2 2 HP_PLUG# 6 7
1 1

Place near Pin40 C636 C564 SINGA_2SJ3053-100111F


GNDA .1U_0402_16V7K 10U_0603_6.3V6M CONN@
2 2 +MIC2_VREFO COM_MIC
DC230009K00

x
HP_PLUG# GNDA
20mil Place near Pin1, 9

1
2 2
+VDDA

2
1 1 R539
2.2K_0402_5%
C567 C561 +1.5VS R542 D1
10U_0603_6.3V6M .1U_0402_16V7K 1 1 22K_0402_5% AZ5125-02S.R7G_SOT23-3

2
2 2 COM_MIC

fi
MIC2JD 1 2 PCB Footprint = AZ5125-02SPR7G_SOT23-3
Place near Pin25, 38 C1136 C1137 EMC@
.1U_0402_16V7K 10U_0603_6.3V6M 1

2
GNDA 2 2
C571 R543
26

40

41

46

36

1
1

9
U34 10U_0603_6.3V6M 22K_0402_5%
2

DVDD_IO
AVDD1

AVDD2

PVDD1

PVDD2

CPVDD

DVDD
INT_MIC_R 2 1 INT_MIC 1 2 LINE2_C_L 24
Internal MIC

1
R726 1K_0402_5% C770 1U_0603_6.3V6M LINE2_L

a
1 2 1 2 LINE2_C_R 23
GNDA
C62 EMC@ 1000P_0402_50V7K C769 1U_0603_6.3V6M LINE2_R 35mA 42 SPKL+
1 2 MIC2_C_L 17
68mA 600mA SPK_OUT_L+ GNDA GNDA
COM_MIC 2 1 COM_MIC_R C568 2.2U_0603_6.3V6K MIC2_L
Combo MIC MIC2_C_R
R540 1K_0402_5% 1 2 18 43 SPKL-
C569 2.2U_0603_6.3V6K MIC2_R SPK_OUT_L-
22 45 SPKR+

in
LINE1_L SPK_OUT_R+
21
LINE1_R 44 SPKR-
19 SPK_OUT_R-
MIC1_L 32 HP_LEFT
20 HPOUT_L +INTMIC_VREFO
MIC1_R 33 HP_RIGHT
HDA_CBN 35 HPOUT_R
1
Int. MIC

1
CBN 8 HDA_SDIN0_AUDIO 1 R547 2
SDATA_IN HDA_SDIN0 <7>
C570 33_0402_5% R417
HDA_CBP HDA_SDOUT_AUDIO

3
2.2U_0402_6.3V6M
2
+MIC2_VREFO
37

29
CBP SDATA_OUT
5

10
h
HDA_SYNC_AUDIO
HDA_SDOUT_AUDIO

HDA_SYNC_AUDIO
<7>

<7>
10K_0402_5%

15mil JMIC1 3

2
MIC2_VREFO SYNC INT_MIC_R 1
10mil 11 HDA_RST_AUDIO# 2 1
RESETB HDA_RST_AUDIO# <7> 2
30 1
MIC1_VREFO_R 6 C550
10mil31 HDA_BITCLK_AUDIO <7>
.c
+INTMIC_VREFO BCLK @EMC@ 3
MIC1_VREFO_L 220P_0402_50V7K 4 G1
1 2
10mil27 1 @EMC@2 1 2
For EMI 2 G2
GNDA LDO1_CAP
C584 10U_0603_6.3V6M R548 C573 @EMC@ ACES_88266-02001_2P
GNDA 1 2 39 0_0402_5% 22P_0402_50V8J CONN@
C574 10U_0603_6.3V6M LDO2_CAP 2
GPIO0/DMIC_DATA SP020008Y00
1 2 7
C583 10U_0603_6.3V6M LDO3_CAP 3 ACES_88266-02001
2 1 15 GPIO1/DMIC_CLK GNDA
GNDA JDREF EC_MUTE#
R546 20K_0402_1% 47
PD# EC_MUTE# <23>
w

Place near
codec
1 2 CPVEE
10mil34 12 MONO_IN 2 1 BEEP#_R 1 @ 2
GNDA CPVEE PCBEEP BEEP# <23>
C575 10mil13 C555 R529
HP_PLUG#_1 R545 2 1 39.2K_0402_1% 2.2U_0402_6.3V6M SENSE_A 16 1U_0402_6.3V6K 47K_0402_5%
SENSE A MONO_OUT
100P_0402_50V8J
C556

14 38
2

SENSE B AVSS2
CODEC_VREF
1
28 1 2
w

MIC2JD 48 VREF R531 R530 SOC_SPKR <9>


SPDIFO 10mil
2.2U_0402_6.3V6M
C577

10U_0603_6.3V6M
C578

@EMC@

1 1 4.7K_0402_5% 47K_0402_5%
4 25 2
1

DVSS AVSS1
49
GND 2 2
ALC3225-CG_MQFN48_6X6
JP41JP@ JP42 JP@ GNDA
w

4 4
JUMP_43X39 JUMP_43X39 Place next pin27
GNDA
JP10JP@ JP14 JP@

JUMP_43X39 JUMP_43X39
JP11JP@ JP12 JP@
Security Classification Compal Secret Data Compal Electronics, Inc.
JUMP_43X39 JUMP_43X39 2013/04/12 2014/04/12 Title
GNDA GNDA
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HD Audio Codec_ALC3225
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3

http://sualaptop365.edu.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 25 of 37
A B C D E
A B C D E

+3VALW
VIH=1.2~5.5V Rise Time:
3.3V@100k/0.1uF=3.538ms 1 2 3.3V@330pF = 889.68us
3.3V@120k/0.1uF=4.272ms C1143 @ U11 JP36JP@ 5.0V@330pF = 1348us
1U_0402_6.3V6K 1 14 +3VS_OUT
VIN1 VOUT1 +3VS
R927 2 13
1 100K_0402_5% VIN1 VOUT1 C976 JUMP_43X118 1

m
SUSP# 2 1 3VS_ON 3 12 2 1 330P_0402_50V7K
ON1 CT1 C1138 2 1@ .1U_0402_16V7K
C980 2 1 +5VALW 4 11
.1U_0402_16V7K VBIAS GND C1139 2 1@ .1U_0402_16V7K
1 2 5VS_ON 5 10 2 1
R926 ON2 CT2 330P_0402_50V7K
0701 update 120K_0402_5% 6 9 C967 JP37JP@
+5VALW

o
1 2 7 VIN2 VOUT2 8 +5VS_OUT
VIN2 VOUT2 +5VS
C979
.1U_0402_16V7K 1 2 15 JUMP_43X118
C1144 @ GPAD
1U_0402_6.3V6K TPS22966DPUR_SON14_2X3

.c
+1.8VALW
VIH=1.2~5.5V Rise Time:
3.3V@82k/0.1uF=3.042ms 1 2 1.8V@330pF = 485.28us
3.3V@47k/0.1uF=1.893ms C1145 @ U59 JP38JP@ 1.35V@330pF = 363.96us

x
1U_0402_6.3V6K 1 14 +1.8VS_OUT
VIN1 VOUT1 +1.8VS
R1055 2 13
2 VIN1 VOUT1 2
82K_0402_5% C1123 JUMP_43X79
SUSP# 2 1 1.8VS_ON 3 12 2 1 330P_0402_50V7K
ON1 CT1 C1124 2 1@ .1U_0402_16V7K

fi
C1125 1 2 4 11
+5VALW VBIAS GND
0701 update .1U_0402_16V7K C1126 2 1@ .1U_0402_16V7K
2 1 1.35VS_ON 5 10 2 1
R1056 ON2 CT2 330P_0402_50V7K
47K_0402_5% 6 9 C1127 JP39JP@
+1.35V VIN2 VOUT2 +1.35VS_OUT
1 2 7 8
VIN2 VOUT2 +1.35VS
C1128

a
.1U_0402_16V7K 1 2 15 JUMP_43X79
C1146 @ GPAD
1U_0402_6.3V6K TPS22966DPUR_SON14_2X3

in
+1.0VALW TO +1.0VS +5VALW
+0.675VS
3 0708:Change to SB00000PZ00 / need apply footprint 3

1
+1.0VALW U60 +1.0VS R1057
ME4856_SO8 100K_0402_5% @
8 1 R1053
2 7 2 2 22_0603_5%

1
.c
C1129 6 3 C1130 SUSP
<32> SUSP

2
4.7U_0603_6.3V6K 5 4.7U_0603_6.3V6K
+0.675VS_R

1
1 1
4

1
D
@ 2 D
<10,23,30,32,33,34> SUSP# 2
R1052 G Q69 SUSP

1
470_0603_5% S 2N7002K_SOT23-3 G
+5VALW R1059 @ Q72 S
w
1

3
10K_0402_5% 2N7002K_SOT23-3

3
2 1 1.0VS_GATE +1.0VS_R
1

R1061

2
10K_0402_5% D
1@
1

C1131 2 SUSP
D .1U_0402_16V7K G
w

SUSP 2 S Q71 @
G 2 2N7002K_SOT23-3
3

Q70 S
4 2N7002K_SOT23-3 4
3

Compal Electronics, Inc.


w

Security Classification Compal Secret Data


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC INTERFACE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 26 of 37
A B C D E

http://sualaptop365.edu.vn
5 4 3 2 1

1. Change U8,U57 (SA000028Y10) to SA00006EE00 (S IC AP2821KTR-G1 SOT-23 5P PWR SW)


2. Change U28 to SA00004OB30(S IC KB9012QF A4 LQFP 128P KB CONTROLLER)
3. Change U31 to SA000050J00 (S IC APE8875M SO 8P FAN CONTROL)
4. Change Q57,Q58,Q62,Q63,Q64,Q65 to SB00000S700(S TR MESS138W-G 1N SOT323-3)
D 5. Change D40 to SCS00003500 (S SCH DIO RB751V-40 SOD-323 YEASHIN) D

m
6. Unpop R1025 for +1.8VS leakage
7. Pop R1061 for +1.0VS leakage
8. Change RP53 to R1081,R1082 and change SD_CD PU to +3VS for Card Reader un-plug issue
9. Change R927 to 100k for +3VS power sequence

o
10. Change R926 to 120k for +5VS power sequence
11. Change R1055 to 82k for +1.8VS power sequence

.c
12. Change R1056 to 47k for +1.35VS power sequence
13. Unpop R786,R787 for cost down RJ45 Conn.
14. Pop C449,C450 for CRT_VSYNC_B reduce noise
15. Change C1003,C1004 to 10P for System 25MHz Crystal fine tune
16. Change C799,C800 to 12P for LAN 25MHz Crystal fine tune

x
C 17. Change C1009,C1010 to 15P for System 32.768kHz Crystal fine tune C

18. Change C1006 from 0.01U to 0.1U for ESD request

fi
19. ADD C1151,C1152 for CRT flicker
20. Change L31,L32,L49 to 0402 Size
21. Add C1169 0.1uF for ESD request
22. Pop C1007 0.047uF for ESD request

a
23. 0708:Changg U60 to ME4856_SO8(SB00000PZ00)
24. Unpop L49 and Add U65,R1084,R1085,R1087,C1179,C1181 for +1.35VS LDO for CRT

in
25. Unpop Q71,Q72,R1052,R1053 for power discharge
26. Add C1155,C1156,C1157,C1158,C1159 for ESD request
26. Add C1160~C1167,C1167~C1173 for Debug Port for ESD

B B

h
.c
w
w

A A

Compal Electronics, Inc.


w

Security Classification Compal Secret Data


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW RIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 27 of 37
5 4 3 2 1

http://sualaptop365.edu.vn
A B C D

1 1

m
CONN@ PJP101 EMI@ PL101
VIN
ACES_50305-00441-001_4P HCB2012KF-121T50_0805
DC_IN_S1 1 2
1
2

o
3
4
GND

1
GND EMI@ PC102 EMI@ PC104
100P_0603_50V8 1000P_0603_50V7K

.c
2

x
2 2

fi
a
RS@ PR105
0_0402_5%
1 2
+3VLP +CHGRTC

in
- +
3

2
PBJ101 @

1 1
PR113
560_0603_5%
2
PR112
560_0603_5%
1 2 +RTCBATT
h 3
.c
ML1220T13RE
w
w

4 4
w

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DCIN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B Bay Trail M LA-A621P 0.3

Date: Tuesday, September 03, 2013 Sheet 28 of 37


A B C D

http://sualaptop365.edu.vn
A B C D

+3VLP

1
@ PC209

1
0.1U_0603_25V7K

2
1
CONN@ PJP201 1

WAFER SUYIN 200109MS020G209ZR 20P P2 EMI@ PL201 @ PR229 @ PR230


HCB2012KF-121T50_0805 10K_0402_1% 10K_0402_1%
1 2 BATT_S1 1 2 BATT+ <45,47>

2
1 2

1
3 4 @ PU204
3 4 @ PR231 1 8

m
VCC TMSNS1

1
5 6 100K_0402_1%
5 6 EMI@ PC202 2 7 2 1
7 8 1000P_0402_50V7K GND RHYST1

2
7 8

1
MAINPWON 3 6 @ PR232
9 10 <23,31> MAINPWON OT1 TMSNS2 47K_0402_1%
9 10 4 5 @ PH202
11 12 OT2 RHYST2 100K_0402_1%_TSM0B104F4251RZ
PR202 100_0402_1% 11 12 G718TM1U_SOT23-8

2
o
2 1 EC_SMCK 13 14 BI
<23,30> EC_SMB_CK1 13 14
PR201 100_0402_1%
2 1 EC_SMDA 15 16 TH 2 1
<23,30> EC_SMB_DA1 15 16 +3VLP
PR206
17 18 6.49K_0402_1%
17 18 1 2
BATT_TEMP <23>

1
19 20 PR208

.c
19 20 1K_0402_1%
PR203
1K_0402_1%

x
2 2

fi
For KB9012
For KB9012 OTP sense 20mΩ Active Recovery

a
92℃ 1.2V, Active 40W 50W,0.7V 40W,0.7V

in
56℃ 2.255V, Recovery 65W 84W,1.2V 56W,1.2V

PH201 under CPU botten side : 90W 117W,1.2V 77W,1.2V


CPU thermal protection at 92 degree C ( shutdown )
Recovery at 56 degree C
3

h +EC_VCCA
ADP_I <23,30>
65W@ PR218 40W@ PR218
3

1
23.2K_0402_1% 8.87K_0402_1%
.c

1
PR228 90W@ PR218
12.4K_0402_1% 33.2K_0402_1%

2
2
VCIN0_PH <23>
w

VCIN1_PROCHOT <23>
PR204
127K_0402_1%

1
1 2 H_PROCHOT#_EC <23>
PH201
100K_0402_1%_TSM0B104F4251RZ
B value:4250K± 1%
w

2
65W@ PR225 40W@ PR225

1
78.7K_0402_1% 19.6K_0402_1%

90W@ PR225
41.2K_0402_1%
w

4 4

For 65W adapter==>action 70W , Recovery 54W

2
For 90W adapter==>action 97W , Recovery 75W
<23> ECAGND
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BATTERY CONN / OTP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Bay Trail M LA-A621P
http://sualaptop365.edu.vn
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, September 03, 2013 Sheet 29 of 37
A B C D
A B C D

for reverse input protection

1
D
2 PQ301
G 2N7002KW_SOT323-3
S

3
PQ304
SIS412DN-T1-GE3_POWERPAK8-5
1 2 1 2 1
2
1
PR302 PR301 5 3 1
1M_0402_5% 3M_0402_5%
100ppm

0.01U_0402_50V7K
VIN PQ302 P1 PQ303 P2 B+ CHG_B+

4
AON6414AL_DFN8-5 SIS412DN-T1-GE3_POWERPAK8-5 PR303

1_0402_1%
1 1 0.02_1206_1% EMI@ PL301

PC308

PR305
1
m
2 2 1.2UH_PNS40201R2YAF_3A_30%
5 3 3 5 1 4 1 2

2200P_0402_50V7K
4x4x2

2
0.1U_0402_25V6
2 3
2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K

2
0.1U_0402_25V6
4

4
1

1
BQ24735_BATDRV 1
1_0402_1%

PC303

PC304

@EMI@ PC305

EMI@ PC307
PR304 2
1

1
VIN
PC301

PC302
PC306 PR306

o
0.1U_0402_25V6 4.12K_0603_1%
2

2
@ 1 2
2

2
0.1U_0603_25V7K

0.1U_0402_25V6
PD302
BAS40CW_SOT323-3

1
PC311

PC309

.c
2

1
4.12K_0603_1%

4.12K_0603_1%
PC310
0.047U_0402_25V7K
1

1 2
PR307

PR308

5
10_1206_1%

2.2_0603_5%
1

PR310
PR309
2

PR311 PQ305

x
0_0603_5% SIS412DN-T1-GE3_POWERPAK8-5

BQ24735_ACN
2 2

BQ24735_BST 2
BQ24735_ACP

1
DH_CHG 1 2 DH_CHG-1 4

BQ24735_LX
1 2 PD303

DH_CHG
RB751V-40_SOD323-2
PC312 PL302 PR312

fi
2

3
2
1
1U_0603_25V6K 1 2 10UH_FDSD0630-H-100M-P3_3.8A_20% 0.01_1206_1%
BQ24735_LX 1 2 CHG 1 4 BATT+
PC313

5
2 3

680P_0402_50V7K 4.7_1206_5%
1U_0603_25V6K

20

19

18

17

16

SIS412DN-T1-GE3_POWERPAK8-5

@EMI@ PC316 @EMI@ PR313


PU301

1 CSOP1

1 CSON1
VCC

PHASE

HIDRV

BTST

REGN

10U_0805_25V6K

10U_0805_25V6K
21

0.1U_0402_25V6

0.1U_0402_25V6
PAD

PC314

PC317

PC315

PC318
1

1
DL_CHG

PQ306
1 15 4

2
ACN LODRV

2
1
2 14
ACP GND PR314

3
2
1
in
BQ24725ARGRR_QFN20_3P5X3P5 10_0603_5%

2
BQ24735_CMSRC 3 13 SRP 1 2 CSOP1
CMSRC SRP

0.1U_0603_25V7K
BQ24735_ACDRV

PC321
4 12 SRN 1 2 CSON1

2
ACDRV SRN PR315
6.8_0603_5%
1 2 ACOK 5 11 BQ24735_BATDRV
+3VLP ACOK BATDRV
PR316
ACDET

100K_0402_1%
IOUT

h SDA

SCL

ILIM
3 <8,23> ACIN 3
6

10
ACDET PR317
316K_0402_1%
2 1 +3VALW
.c
1

100K_0402_1%
1
PR318 VIN

0.01U_0402_25V7K
PC322
PR320

1
2M_0402_1%

Vin Detector
2

2
2
1
1

PR322
PR321 422K_0402_1% Min. Typ Max.
w

2M_0402_1% L-->H 17.520V 18.006V 18.504V


H-->L 16.967V 17.593V 18.237V
2
1 2

ACDET
2200P_0402_50V7K

PQ307
ILIM and external DPM
1

PR323 PDTC115EU_SOT323-3 EC_SMB_CK1 <23,29>


w
1
PC326

100K_0402_1% PR324
1 2 2 64.9K_0402_1%
<23> FSTCHG EC_SMB_DA1 <23,29> Min. Typ Max.
2

RS@PR325 Close EC 3.906A 4.006A 4.108A


2

PQ308 0_0402_5%
1

D 2 1 1 2
2N7002KW_SOT323-3
ADP_I <23,29>
3

2
w

3,26,32,33,34> SUSP#
1

G PC324 @ PC325
4 4
100P_0402_50V8J 0.1U_0402_16V7K
S
3

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CHARGER
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Bay Trail M LA-A621P
http://sualaptop365.edu.vn
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, September 03, 2013 Sheet 30 of 37
A B C D
5 4 3 2 1

D D

m
RS@ PR415 PR401
0_0402_5% 499K_0402_1%
1 2 ENLDO_3V5V 1 2
B+

4.7U_0603_6.3V6K

1
EN1 and EN2 dont't floating PR410

150K_0402_1%
1

PC425

PR405
PU401 1K_0402_1%
B+ EMI@ PL401 7 1 3V_EN_R 1 2 3V5V_EN
HCB2012KF-121T50_0805 IN EN1 PC428 0.022U_0402_16V7K PR414 1K_0402_1%

2
1 2 3V_VIN 8 3 FB_3V 1 2 FB-1_3V 1 2 @

o
2
IN EN2 PR404 0_0603_5% PC401 0.1U_0603_25V7K

2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6

1
6 BST_3V
1 2 BST-1_3V 1 2 @ PC426
@EMI@ PC403 BS

EMI@ PC410

PC408

PC405
4.7U_0603_6.3V6K

2
PL402
@ 10 LX_3V 1 2
+3VALWP

.c
2

2
LX
9 4 1UH_FDSD0630-H-1R0M-P3_11A_20%
GND OUT

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
1

1
2 5
+3VALWP PG LDO +3VLP

PC411

PC416

PC414

PC413
1
SY8208BQNC_QFN10_3X3 @EMI@ PR409

2
PC422 4.7_1206_5%

13V_SN
4.7U_0603_6.3V6K

2
1

PR416

x
100K_0402_1%
C @EMI@ PC423 C
3.3V LDO 150mA~300mA 680P_0603_50V7K
2

2
Vout is 3.234V~3.366V
<23,33,34> SPOK

fi
TDC=8A
@ PJ401
+3VALWP 1 2 +3VALW
1 2
JUMP_43X118

a
in
B+ EMI@ PL404
HCB2012KF-121T50_0805 PU402
1 2 5V_VIN 8 1 3V5V_EN PC427 PR412
IN EN1 6800P_0402_25V7K 1K_0402_1%
2200P_0402_50V7K
10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6

FB_5V FB-1_5V
EN2
3
PR403

h
0_0603_5% PC404
1
0.1U_0603_25V7K
2 1 2
1

BST_5V 1 2BST-1_5V 1
PC406

PC407

EMI@ PC409

@EMI@ PC402

B 6 2 B
BS
2

@ PL403
9 10 LX_5V 1 2
.c
GND LX +5VALWP
VCC_3.3V 5 4 1UH_FDSD0630-H-1R0M-P3_11A_20%
VCC OUT
1

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
1

1
SPOK 2 7
PG LDO VL
1

PC420

PC417

PC418

PC415

PC412
@EMI@ PR408
4.7U_0603_6.3V6K

SY8208CQNC_QFN10_3X3 4.7_1206_5%

2
15V_SN
2

2
1

PC421
4.7U_0603_6.3V6K
w 2

@EMI@ PC424 @ PJ402


680P_0603_50V7K +5VALWP 1 2 +5VALW
2

1 2
JUMP_43X118
Vout is 4.998V~5.202V
w

5V LDO 150mA~300mA TDC=8A


PR407
2.2K_0402_5%
1 2
<23> EC_ON
RS@PR402
0_0402_5%
1 2
<23,29> MAINPW ON
w

A A

3V5V_EN
1M_0402_1%

4.7U_0603_6.3V6K
1

1
PR406

PC419

Security Classification Compal Secret Data Compal Electronics, Inc.


2

@ 2013/04/12 2014/04/12 Title


Issued Date Deciphered Date
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
3VALW/5VALW
EN1 and EN2 dont't floating AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev

http://sualaptop365.edu.vn
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Bay Trail M LA-A621P
Date: Tuesday, September 03, 2013 Sheet 31 of 37
5 4 3 2 1
A

+1.35VP EMI@ PL507


HCB2012KF-121T50_0805
Ipeak = max{ 0.7*Ibudget, 1st +2nd max loading} 1.35V_B+ 2 1 B+
Ipeak = max{ 12.34*0.7 , 4.2+8.14 }
Ipeak=12.34A ; 1.2Ipeak=14.808A ;Imax=8.638A

2200P_0402_50V7K
10U_0805_25V6K

0.1U_0402_25V6
1/2Delta I=0.7353A (F=300K Hz)
PR504=(1.2Ipeak-1/2Delta I) *Rds(on)(max)*1.2/9uA=8.45Kohm

1
PC502

EMI@ PC503

@EMI@ PC521
choose PR504=8.45Kohm (for safety >1.2Ipeak)

5
Rds(on)=5.0m ohm(max) ; Rds(on)=4.2m ohm(typical)

MDV1525URH_PDFN33-8-5

2
Ilimit_min=(8.366K*9uA)/(5.0m*1.2)=15.058A +1.35VP
Ilimit_max=(8.535K*11uA)/(4.2m*1.2)=22.352A
Iocp=Ilimit+1/2Delta I=15.79A~23.09A

PQ502
UG_1.35V 4
Iocp(min)>1.2Ipeak

JUMP_43X79
PJ503
1

m
2011/9/19

3
2
1
2
@

2
PR502 PC504 PL501
OVP=110% 115% 120% 2.2_0603_5%
BST_1.35V 2 1
0.1U_0603_25V7K
BST_1.35V-1 2 1
1.5UH_TMPB0604M-1R5MN-Z01_11A_20%
1 2
+0.675VSP 6.6x7.3x3.8 TAI-TECH +1.35VP

S TR MDU1512RH 1N POWERDFN56-8
靠Outpu LX_1.35V

10U_0805_25V6K

10U_0805_25V6K
t Ca p PA D

o
DCR:8.5mΩ

5
20

19

18

17

16
1

1
PC501

PC505
PU501 @EMI@ PR503
4.7_1206_5% 1

VTT

BOOT

UGATE

PHASE
VLDOIN
21
2

2
PAD

PQ503
+ PC506
1 15 LG_1.35V 4 330U_2.5V_M

.c
VTTGND LGATE

1
@EMI@ PC507
680P_0402_50V7K 2
2 14

2
VTTSNS PGND PR504

3
2
1
8.45K_0402_1%
3 13 2 1
GND RT8207MZQW_WQFN20_3X3 CS

4 12 Rds=4.2mΩ (Typ)
+VTT_REFP VTTREF VDDP

x
5.0mΩ (Max)
5 11 2 1
+1.35VP VDDQ VDD PR505 +5VALW

PGOOD
+1.35VP
1

5.1_0603_5% @ PJ504

TON
PC508 +1.35VP 1 2 +1.35V

FB

S3

S5
0.033U_0402_16V7K 1 2

fi
2

1
PC509 JUMP_43X118

S3_1.35V 7

S5_1.35V 8

10
1U_0603_10V6K PC510 PR506
1U_0603_10V6K 10K_0402_1% @ PJ505

2
PR501 1 2
200K_0402_1% 1 2

2
1 2 DDR_PWROK
3,26,30,33,34> SUSP# DDR_PWROK <5>
JUMP_43X118

PR507 PR508

a
680K_0402_1% 887K_0402_1%
1 2 2 1 1.35V_B+
1 <23> SYSON 1
@ PJ506
2
1

PR509 +0.675VSP 1 2 +0.675VS


8.06K_0402_1% JUMP_43X79
1

@ PC512 2 1

in
0.1U_0402_16V7K
@ PQ501 FB=0.75V
1

D
2
1

2N7002KW_SOT323-3 To GND = 1.5V


2
<26> SUSP SUSP
G
PC511
0.1U_0402_16V7K PR510 To VDD = 1.8V
2

10K_0402_1%
S
3

h
.c
w
w

STATE S3 S5 1.35VP VTT_REFP 0.675VSP


S0 Hi Hi On On On
w

Off
S3 Lo Hi On On (Hi-Z)

S4/S5 Lo Lo Off Off Off


(Discharge) (Discharge) (Discharge) Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

Note: S3 - sleep ; S5 - power off THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.35VP/0.675VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Bay Trail M LA-A621P
http://sualaptop365.edu.vn
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, September 03, 2013 Sheet 32 of 37
A
5 4 3 2 1

PR601
10K_0402_1%
1 2
SPOK <23,31,34>

1
@ PC601 JP@ PJ601
D PR602 0.1U_0402_16V7K +1.0VALWP 1 2 +1.0VALW D
1M_0402_1% 1 2

2
JUMP_43X118

m
@EMC@ PR603 @EMC@ PC602
4.7_1206_5% 680P_0603_50V7K
EMC@ PL601 1 2SNB_1.0V 1 2
HCB2012KF-121T50_0805 PU601
1 2 B+_1.0V 8 1 PR604 PC603
B+ IN EN 0_0603_5% 0.1U_0603_25V7K

10U_0805_25V6K

10U_0805_25V6K
6 BST_1.0V 1 2 1 2 PL602

EMC@ PC604

@EMC@ PC605
2200P_0402_50V7K

0.1U_0402_25V6
BS

o
1UH_PCMB063T-1R0MS_12A_20%

PC606

PC607
9 10 LX_1.0V 1 2
GND LX +1.0VALWP

13.7K_0402_1%

47U_0805_6.3V6M

47U_0805_6.3V6M

22U_0805_6.3VAM

22U_0805_6.3VAM
1

330P_0402_50V7K
1

1
4

PR606
FB

.c
PC608

PC609

PC610

PC611

PC612
ILMT_1.0V 3 7 FB = 0.6V
Rup
+3VALW

2
ILMT BYP

4.7U_0603_6.3V6K

2
1 2 +1.0V_PGOOD 2 5 LDO_3V
+3VALW

4.7U_0603_6.3V6K
PG LDO

1
PR607

PC614
1
10K_0402_1% SY8206DQNC_QFN10_3X3

PC613

1
2
PR609
Pin3 I-LIMIT state Current Limit 20K_0402_1%
Rdown

x
C LDO_3V C

2
Pin 7 BYP is for CS.

1
Low 6A Common NB can delete +3VALW and PC15

fi
@ PR605
0_0402_5%
Floating 8A VFB=0.6V

2
ILMT_1.0V
Vout=0.6V* (1+Rup/Rdown)

1
RS@ PR608
High 12A

a
0_0402_5% Vout=1.05V
+3VALW

1
in
@ PC615
1U_0402_6.3V6K

2
Note:Iload(max)=3A
PU602
APL5930KAI-TRG_SO8
6

h 5 VCNTL 3

0.022U_0402_16V7K
B 9 VIN VOUT 4 +1.5VSP B
VIN VOUT

1
1
PC616 8
EN

1
4.7U_0603_6.3V6K 7 2 PR610

PC617

22U_0805_6.3V6M

22U_0805_6.3V6M
GND
POK FB 20K_0402_1%
.c

1
PC618

PC619
FB=0.8V

1
PR611 FB_1.5VSP
51K_0402_1%

2
1 2 +1.5VSP_ON @
<10,23,26,30,32,34> SUSP#

1
1
PR612
1

@ PR613 22.6K_0402_1%
w

PC620 22K_0402_5%

2
0.15U_0402_10V6K
2

2
w

Ien=10uA, Vth=0.3V, notice


the res. and pull high
w

A
@ PJ602 voltage from HW A
1 2
+1.5VSP 1 2 +1.5VS
JUMP_43X39

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.5VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. V5WE2 M/B LA-9531P Schematic
Date: Tuesday, September 03, 2013 Sheet 33 of 37

5 http://sualaptop365.edu.vn 4 3 2 1
5 4 3 2 1

+3VS PR702
D 2.55K_0402_1% D
+1.05VSP_ON 1 2
SUSP# <10,23,26,30,32,33>

0.1U_0402_16V7K

1
PC701
@ PR701

1
100K_0402_5% @ PR703

m
1M_0402_5%
Note:Iload(max)=2.5A

2
PU701
9
1 PGND 8
FB SGND
2 7 PL701
@ PJ701 PG EN 1UH_PH041H-1R0MS_3.8A_20%

o
+3VALW 1 2 3 6 LX_1.05V 1 2
1 2 IN LX +1.05VSP

1
4 5

68P_0402_50V8J
JUMP_43X79
PGND NC

1
@EMI@ PR704
4.7_0603_5%
PC702

1
PC703

22U_0805_6.3VAM

22U_0805_6.3VAM
22U_0805_6.3VAM
2

1
SY8003DFC_DFN8_2X2 PR705
Rup

.c
PC704

PC705
15K_0402_1%

2
2

2
FB_1.05V

1
1

@EMI@ PC706
680P_0402_50V7K
FB=0.6V
Note:Iload(max)=3A PR706
Rdown
20K_0402_1%

x
C C

fi
@ PJ702
1 2
+1.05VSP 1 2 +1.05VS
JUMP_43X79

a
@ PJ703
1 2
+3VALW +1.8VALWP 1 2 +1.8VALW
JUMP_43X79

in
1

@ PC707
1U_0402_6.3V6K
2

Note:Iload(max)=3A
PU702
APL5930KAI-TRG_SO8
B
6
5 VCNTL 3

h B
0.022U_0402_16V7K

9 VIN VOUT 4 +1.8VALWP


VIN VOUT
1
1

PC708 8
EN
1
PC709

7 2 22U_0805_6.3V6M

22U_0805_6.3V6M
4.7U_0603_6.3V6K PR707
GND

POK FB
.c
20K_0402_1%
2

1
PC710

FB=0.8V PC711
1

PR708 FB_1.8VSP
20K_0402_1%
2

1 2 +1.8VSP_ON
<23,31,33> SPOK @
1
1

PR709
1

@ PR710 15.8K_0402_1%
PC712 22K_0402_5%
w 2

0.1U_0402_16V7K
2

Ien=10uA, Vth=0.3V, notice


the res. and pull high
voltage from HW
Note:
w

A A

When design Vin=5V, please stuff snubber


to prevent Vin damage

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.05VSP/1.8VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Bay Trail M LA-A621P
Date: Tuesday, September 03, 2013 Sheet 34 of 37
5
http://sualaptop365.edu.vn 4 3 2 1
5 4 3 2 1

1
@ PC802
1000P_0402_50V7K

2
<10> VGFX_VSNS

1
LGATEG
PC803
0.01UF_0402_25V7K

2
VCORE_GSNS PHASEG

PR813 PC816 PQ801


D PC804 PC805 2.2_0603_5% 0.1U_0603_25V7K 6 D
68P_0402_50V8J
470P_0402_50V7K BOOTG 1 2 1 2 7 G2
PC806 1 2 1 2 1 2 RS@ PR809 0_0603_5% S1/D2 5
6800P_0402_25V7K PR802 CPU_B+ UGATEG1 1 2 UGATEG1-1 1 S2
PC807 499_0402_1% G1 4
1 2 150P_0402_50V8J 2 S2

m
D1

1
649 +-1% 0402
1 2 1 2 1 2 3

10U_0805_25V6K

10U_0805_25V6K
S2

2200P_0402_50V7K
PR804 PR805

PR803

1
137K_0402_1% 2.21K_0402_1%
Close GFX choke

1
@EMC@ PC808

PC809

PC810
AON6932A_DFN5X6-8-7

20.5K_0402_1%
PH801 PR807 PR806

1
PR808
10K_0402_1%_TSM0A103F34D1RZ 240_0402_1% 2K_0402_1% 0.22uH DCR= 0.97+-5% m ohm, Idc~Isat= 25~34A

2
VSUMG- 1 2

1 2
1
PL803
0.22UH_FDUE0640J-H-R22M-P3_25A_20% +SOC_VNN

o
PC812
+3VALWP

2
1 4
.1U_0402_16V7K
1000P_0402_50V7K

2
1

11K_0402_1%
PC813

0.047U_0402_25V7K
0.1U_0402_16V7K
1 2

1
2.61K_0402_1%

1.91K_0402_1%
2 3

1
PC815
PR811

PC814
2

1
PR810

.c
BOOTG

1
PR814 @EMC@

2
UGATEG1 4.7_1206_5%
2

2
PR815 1_0402_5%

1 2
VSUMG+ PHASEG 3.65K_0603_1% PR816

PR812

2
PC817 @EMC@
LGATEG +5VALW 680P_0402_50V7K

VSUMG+
PR817 PU801

VSUMG-
33

32

31

30

29

28

27

26

25
27.4K_0402_1%

x
1 2

ISUMPG

ISUMNG

RTNG

FBG

COMPG

PGOODG

BOOTG

UGATEG
PAD
C C

1U_0603_10V6K
PH802 PR818
Close GFX L/S MOS

1
470K_0402_5%_TSM0B474J4702RE 3.83K_0402_1%

1
1 2 NTCG_1 1 2 NTCG 1 24

PC818
NTCG PHASEG RS@ PR819 PR820 LGATE1

fi
1 2 2 23 0_0603_5% 1_0603_5%
<23> VR_ON

2
RS@ PR821 0_0402_5% VR_ON LGATEG

2
2
1 PR843 2 VR_SVID_CLK_R 3 22 PHASE1
<8> VR_SVID_CLK SCLK VCCP
20_0402_1% PR830 PC827 PQ803
PR844 VR_SVID_ALERT# 4 ISL95833HRTZ-T_TQFN32_4X4 21 2.2_0603_5% 0.1U_0603_25V7K 6
<8> VR_SVID_ALERT# ALERT# VDD G2
BOOT1 1 2 1 2 7

1U_0603_10V6K
16.9_0402_1% @ PR801 1.91K_0402_1%
VR_SVID_DATA_R S1/D2

PC801
1 2 5 20 1 2 RS@ PR827 0_0603_5% 5
<8> VR_SVID_DATA SDA PW M2 S2

1
UGATE1 1 2 UGATE1-1 1
G1

a
6 19 LGATE1 4
<23> VR_HOT# VR_HOT# LGATE1 2 S2

2
NTC 7 18 PHASE1 D1 3
NTC PHASE1 S2
For VR_HOT#, already
1 2 8 17

PGOOD
pull high at power side.

BOOT1
ISUMN
ISUMP
ISEN2 UGATE1

COMP
ISEN1

AON6932A_DFN5X6-8-7
27.4K_0402_1% 3.83K_0402_1%

RS@PR822

RTN
1

1
69.8_0402_1%

@ PC825 0_0402_5%
499_0402_1%

69.8_0402_1%

FB

in
1

PR829

47P_0402_50V8J
B+ CPU_B+
PR823

PR824

PR825

UGATE1
+5VALW
2

10

11

12

13

14

15

16
EMC@ PL802
BOOT1 HCB2012KF-121T50_0805
2

1 2
470K_0402_5%_TSM0B474J4702RE
2

@ NTC_1
VGATE <23>

0.1U_0402_25V6
10U_0805_25V6K

10U_0805_25V6K
1 1
1

+1.0VS +3VALWP

33U_25V_M

33U_25V_M
+ +
PH803

PR826

1 2

1
PC822

PC823

PC819

PC820
0.22uH DCR= 0.97+-5% m ohm, Idc~Isat= 25~34A

PC824
h
1

B PR828 1.91K_0402_1% B
@ PC826 2 2 PL805
2

2
0.1U_0402_16V7K 0.22UH_FDUE0640J-H-R22M-P3_25A_20% +SOC_VCC
Close CPU L/S MOS
2

@
1 4

1
.c

680P_0402_50V7K 4.7_1206_5%
2 3

@EMC@
PR831
PC828 PR832 @ PR833
680P_0402_50V7K 2K_0402_1% 42.2K_0402_1% VSUM+

2
1 2 1 2 1 2

2.61K_0402_1%
1

1
PR834

@EMC@
11K_0402_1%
PR835 PR836

PC829
6800P_0402_25V7K 649 +-1% 0402

0.047U_0402_25V7K

PC830 PC831 3.65K_0603_1% 1_0402_5%


1
PR838

470P_0402_50V7K 68P_0402_50V8J
w

0.1U_0402_16V7K

2
1

1 2 1 2 1 2
1

1
232_0402_1%

PC832

PR837
PC833
PR839

499_0402_1%
1
2

PR840

PH804
Close CPU choke
2

PR841 PC834 VSUM+


2
1
PC835

2.21K_0402_1% 150P_0402_50V8J 10K_0402_1%_TSM0A103F34D1RZ


w

1 2 1 2 1 2
2

PR842
2

137K_0402_1% VSUM-
VSUM-
0.1U_0402_16V7K

@ PC836
330P_0402_50V7K
1

PC837

1 2
w

A A
2

<10> VCORE_VSNS 1 2

PC838
0.01UF_0402_25V7K
<10> VCORE_GSNS Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU_CORE/VGFX_CORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom Bay Trail M LA-A621P 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Sheet 35 of 37
5
http://sualaptop365.edu.vn 4 3 2 1
5 4 3 2 1

D D

m
o
+SOC_VNN

.c
PC913 1 2 22U_0805_6.3V6M
+SOC_VCC PC914 1 2 22U_0805_6.3V6M
PC915 1 2 22U_0805_6.3V6M
PC901 1 2 22U_0805_6.3V6M PC916 1 2 22U_0805_6.3V6M
PC903 1 2 22U_0805_6.3V6M
PC905 1 2 22U_0805_6.3V6M
PC907 1 2 22U_0805_6.3V6M PC917 2 1 330U_D2_2.5VY_R9M
Output Cap

x
PC918 2 1 330U_D2_2.5VY_R9M
Output Cap PC909 2 1 330U_D2_2.5VY_R9M

+
C C
PC919 2 1 330U_D2_2.5VY_R9M

+
PC911 2 1 330U_D2_2.5VY_R9M

+
+

fi
+SOC_VCC +SOC_VNN

Package Edge Cap PC929 1 2 22U_0805_6.3V6M

PC920 1 2 10U_0603_6.3V6M

a
PC921 1 2 10U_0603_6.3V6M
PC922 1 2 10U_0603_6.3V6M Package Edge Cap
PC930 1 2 10U_0603_6.3V6M

PC931 1 2 10U_0603_6.3V6M
Back Side Cap

in
PC932 1 2 10U_0603_6.3V6M
PC923 1 2 1U_0402_6.3V6K
PC933 1 2 2.2U_0402_6.3V6M PC924 1 2 1U_0402_6.3V6K
PC934 1 2 2.2U_0402_6.3V6M PC925 1 2 1U_0402_6.3V6K Back Side Cap

B @ PC926 1 2 0.1U_0402_16V7K B

h @ PC927 1
@ PC928 1
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
.c
w
w

A A

Compal Electronics, Inc.


w

Security Classification Compal Secret Data


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU_CORE_CAP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B Bay Trail M LA-A621P 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Sheet 36 of 37
5 4 3 2 1

http://sualaptop365.edu.vn
5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 2


for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
Tune Power sequence by HW request 1.05VS & 1.5VS sequence meet SPEC Change PR702 to 2.5K, PR611 to 51K, PC620 to 150nF 07/05 DVT
1
Change PR509 to 7.68K Delete
2 Change 1.35V voltage close to 1.35 32 07/05 DVT 08/14
D D
30 Change PR310 to 2.2 07/05 DVT
3 EMI request Cut-in EMI solution
Change PC931, PC932 from 4.7uF to 10uF
Change PR839 from 240 to 232
4 Add PR808 to 20.5K 07/24 DVT

m
Approve CPU transient CPU Change PC812 from 330pF to 1000pF
Change PC828 from 470pF to 680pF
5
7 Add PR411, PR413 12/22 DVT2
6 +1.05V ripple close Add PC609 into 4700P

o
8 upper and mean too low Adjust output voltage and add Cff Change PR608 from 133K to 127K 12/22 DVT2
9 Improve CPU transient character 40 Unpop PC926 01/09 DVT2
10 Tune sequence 35 Change PC428 from 4700p to 10n, 02/04 PVT

.c
PC427 from 0.047u to 6.8n
11 0 ohm reduce Change PR507,PR513,PR523 to R-pad 02/22 PVT
12 Provide 3/5V PG signal to EC 35 Add PR416 02/22 PVT
13 ESD request 32 Add PC101 into 0.1uF 02/26 PVT
14 ESD request 36 Add PC521, PR503, PC507 02/26 PVT
15 Use HW to control VCIN1 function 33 Add PR204 03/05 PVT

x
C C

fi
a
in
B
12 h B
.c
13

14
w

15
w

16
w

A 17 A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR (PWR)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
V5WE2 M/B LA-9532P Schematic
5
http://sualaptop365.edu.vn 4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3 2
Date: Tuesday, September 03, 2013
1
Sheet 37 of 37
m
o
.c
x
fi
www.s-manuals.com

a
in
h
.c
w
w
w

http://sualaptop365.edu.vn

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