Professional Documents
Culture Documents
Digitally signed by
nhat tin
DN: cn=nhat tin, o, ou,
1
email=support@kythu 1
atvitinh.com, c=VN
Date: 2010.07.13
15:56:29 +07'00'
2
IAYAA 2
4 4
4
Mobile Yonah 4
CRT Conn.
FSB
533/667 MHz DC/DC Interface
page 14 PAGE 34
Power Buttom
LCD Conn
page 13 ATI-RC410MD/ME 533/667MHz
PAGE 31
A-Link Express x 4
PAGE 36
Bandwidth 500MB
2.5GHz(1.2V)
Mini Card
480MHz(5V) CHARGER PAGE 37
FOR WLAN USB 2.0 Port *5
PAGE 24 0,1,2,4,6 PAGE 28
3V/5V/ PAGE 38
Primary SATA
3.3V,5V 1.5GHz(150MB/s) SATA HDD0
PAGE 17
DDR_1.8V/0.9VEP PAGE 39
PCI BUS
33MHz (3.3V) ATI-SB450 Primary SATA
3.3V,5V 1.5GHz(150MB/s) SATA HDD1 1.8VCORE PAGE 39
PAGE 17
564 pin BGA
2 2
Secondary 1.5V/PROCHOT
ATA-100 (5V) PAGE 40
PAGE 15,16,17,18,19
CARDBUS VIA6311S LAN IDE ODD
CB1410
RTL8100CL PAGE 27
PAGE 23 PAGE 20
CPU_CORE PAGE 41
PAGE 21
LPC BUS 33MHz (3.3V)
Embedded AZALIA
24MHz(3.3V) HD CODEC Audio Amplifier
CARD BUS 1394-Port RJ-45 Controller ALC 861
PAGE 23 PAGE 20 PAGE 25 APA2056 PAGE 26
SOCKET ENE KB910
PAGE 22 PAGE 29
MDC
PAGE 27
BIOS(1M) Scan KB
& I/O PORT PAGE 32
1 1
PAGE 30
SIGNAL
Voltage Rails STATE SLP_S3# SLP_S5# +VALW +V +VS Clock
7 H_A#[3..31] H_D#[0..63] 7
JCPU1A
+3VS
H_A#3 J4 E22 H_D#0
H_A#4
H_A#5
L4
A3#
A4#
YONAH D0#
D1# F24 H_D#1
H_D#2 +CPU_CORE
M3 A5# D2# E26
H_A#6 K5 H22 H_D#3
H_A#7 A6# D3# H_D#4
M1 A7# D4# F23 1
1
H_A#8 N2 G25 H_D#5
H_A#9 A8# D5# H_D#6 R464 C663
D J1 A9# D6# E25 D
H_A#10 N3 E23 H_D#7 PU to 1.05V, 0.1U_0402_16V4Z
H_A#11 A10# D7# H_D#8 No reserve 47K_0402_5% 2
P5 A11# D8# K24
H_A#12 P2 G24 H_D#9 longer
MAINPWON 16,35,36,38 1
2
H_A#13 A12# D9# H_D#10 C664 U26
L1 A13# D10# J24
1
H_A#14 P4 J23 H_D#11 C H_THERMDA 2 1
H_A#15 A14# D11# H_D#12 2200P_0402_50V7K D+ VDD1
P1 A15# D12# H26 2
H_A#16 H_D#13 B Q53 2 H_THERMDC 3
R1 A16# D13# F26 D- ALERT# 6
H_A#17 Y2 K22 H_D#14 E 2SC2411K_SC59
3
H_A#18 A17# D14# H_D#15
U5 A18# D15# H25 29 EC_SMB_CK2 8 SCLK THERM# 4
H_A#19 R3 N22 H_D#16
H_A#20 A19# D16# H_D#17
W6 A20# D17# K25 29 EC_SMB_DA2 7 SDATA GND 5
H_A#21 U4 P26 H_D#18 +1.05VS 1 2
H_A#22 A21# D18# H_D#19 R466
Y5 R23
H_A#23
H_A#24
H_A#25
U2
R4
A22#
A23#
A24#
D19#
D20#
D21#
L25
L22
H_D#20
H_D#21
H_D#22
A H_THERMTRIP#
56_0402_5% ADM1032ARM_RM8
T5 A25# ADDR GROUP DATA GROUP D22# L23
H_A#26 T3 M23 H_D#23
H_A#27 A26# D23# H_D#24 THERM# PU to +3VS
W3 A27# D24# P25
H_A#28 W5 P22 H_D#25 No reserve longer
H_A#29 A28# D25# H_D#26
Y4 A29# D26# P23
H_A#30 W2 T24 H_D#27
H_A#31 A30# D27# H_D#28
7 H_REQ#[0..4] Y1 A31# D28# R24
L26 H_D#29
H_REQ#0 D29# H_D#30
K3 REQ0# D30# T25
H_REQ#1 H2 N24 H_D#31
H_REQ#2 REQ1# D31# H_D#32 +3VALW
K2 REQ2# D32# AA23
H_REQ#3 J3 AB24 H_D#33 +1.05VS
H_REQ#4 REQ3# D33# H_D#34
L5 REQ4# D34# V24
1
V26 H_D#35 +1.05VS
H_ADSTB#0 D35# H_D#36
7 H_ADSTB#0 L2 ADSTB0# D36# W25
H_ADSTB#1 V4 U23 H_D#37 R467
7 H_ADSTB#1 ADSTB1# D37#
2
C H_D#38 330_0402_5% C
D38# U25
1
U22 H_D#39
2
D39# H_D#40 R468 R469 R470
D40# AB25
W22 H_D#41 470_0402_5% 75_0402_5% @ 56_0402_5%
D41# H_PROCHOT# 16
Y23 H_D#42
1
CLK_BCLK D42# H_D#43 H_DPRSTP# 2
12 CLK_BCLK A22 AA26 1
2
BCLK0 D43#
1
CLK_BCLK# A21 HOST CLK Y26 H_D#44 R471 0_0402_5%
12 CLK_BCLK# BCLK1 D44#
B
1
Y22 H_D#45 2 Q54
D45# H_D#46 Q55 MMBT3904_SOT23
D46# AC26 2 1 2 DPRSLPVR 15,41
AA24 H_D#47 MMBT3904_SOT23 R472 470_0402_5% @
3
H_ADS# D47# H_D#48
H1 AC22
7 H_ADS#
C
3
H_BNR# ADS# D48# H_D#49 PROCHOT#
7 H_BNR# E2 BNR# D49# AC23
H_BPRI# G5 AB22 H_D#50
7 H_BPRI# H_BR0# BPRI# D50# H_D#51
7 H_BR0# F1 BR0# D51# AA21
H_DEFER# H5 AB21 H_D#52
7 H_DEFER# H _DRDY# DEFER# D52# H_D#53
7 H_DRDY# F21 DRDY# D53# AC25
H_HIT# G6 AD20 H_D#54
7 H_HIT# HIT# D54#
H_HITM# E4 CONTROL AE22 H_D#55
7 H_HITM# HITM# D55#
H_IERR# D20 AF23 H_D#56
H_LOCK# IERR# D56# H_D#57 +1.05VS
7 H_LOCK# H4 LOCK# D57# AD24
H_RESET# B1 AE21 H_D#58
7,15 H_RESET# RESET# D58# H_D#59
D59# AD21
AE25 H_D#60
7 H_RS#[0..2] D60#
H_RS#0 F3 AF25 H_D#61
H_RS#1 RS0# D61# H_D#62
F4 RS1# D62# AF22
H_RS#2 G3 AF26 H_D#63
H_TRDY# RS2# D63# H_DPRSTP# R473 2
7 H_TRDY# G2 TRDY# 1 @ 56_0402_5%
H_PWRGOOD
D21
PREQ#
PROCHOT#
DSTBP3#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Yonah(1/2)-GTLITP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS CustomIAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 4 of 48
5 4 3 2 1
5 4 3 2 1
0.01U_0402_16V7K
M6 VCCP VSS AA22 AA13 VCC VSS D26
N6 AD22 AD14 C25
C676
1 1
T6
VCCP
VCCP
YONAH VSS
VSS AC21 AC13
VCC
VCC
VSS
VSS F25
C677
+1.05VS R6 AF21 AF14 B24
10U_0805_10V4Z VCCP VSS VCC VSS
K21 VCCP VSS AB19 AE13 VCC VSS A23
2 2
R_A J21 VCCP VSS AA19 AB12 VCC VSS D23
1
R498
N21
VCCP
VCCP
VSS
VSS AC19 AD12
VCC
VCC
YONAH VSS
VSS B21
T21 VCCP VSS AF19 AC12 VCC VSS C22
+GTL_REF0 1K_0402_1% R21 AE19 AF12 F22
VCCP VSS VCC VSS
V21 AB16 AE12 E21
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Yonah(2/2)-PWR/GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS CustomIAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 5 of 48
5 4 3 2 1
5 4 3 2 1
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+1.05VS
Near VCORE regulator.
330U_D2E_2.5VM_R9
1
B South Side Secondary 1 1 1 1 1 1 B
C716
330U_D_2VM
330U_D_2VM
330U_D_2VM
330U_D_2VM
330U_D_2VM
Secondary)
2 2 2 2 2 2
@ @
ESR <= 1.5m ohm Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/05/18 Deciphered Date 2007/05/18 Title
Capacitor > 1980uF THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Yonah Bypass
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 6 of 48
5 4 3 2 1
A B C D E
4 H_A#[3..31] H_D#[0..63] 4
4 H_REQ#[0..4] H_DINV#[0..3] 4
4 H_RS#[0..2] H_DSTBN#[0..3] 4
H_DSTBP#[0..3] 4
U21A U21C
H_A#3 G28 E28 H_D#0
H_A#4 CPU_A3# CPU_D0# H_D#1
H26 CPU_A4# CPU_D1# D28 J4 GFX_RX0N GFX_TX0N N2
H_A#5 G27 D29 H_D#2 J5 N1
H_A#6 CPU_A5# CPU_D2# H_D#3 GFX_RX0P GFX_TX0P
G30 CPU_A6# CPU_D3# C29
H_A#7 H_D#4
PART 3 OF 6
ADDR. GROUP
G29 D30 L4 R2
PART 1 OF 6
H_A#8 CPU_A7# CPU_D4# H_D#5 GFX_RX1N GFX_TX1N
G26 C30 K4 P2
DATA GROUP 0
H_A#9 CPU_A8# CPU_D5# H_D#6 GFX_RX1P GFX_TX1P
H28 CPU_A9# CPU_D6# B29
1 H_A#10 J28 C28 H_D#7 L5 T1 1
H_A#11 CPU_A10# CPU_D7# H_D#8 GFX_RX2N GFX_TX2N
H25 CPU_A11# CPU_D8# C26 L6 GFX_RX2P GFX_TX2P R1
H_A#12 K28 B25 H_D#9
H_A#13 CPU_A12# CPU_D9#
H29 CPU_A13# CPU_D10# B27 H_D#10 M4 GFX_RX3N GFX_TX3N U2
H_A#14 J29 C25 H_D#11 M5 T2
H_A#15 CPU_A14# CPU_D11# GFX_RX3P GFX_TX3P
K24 A27 H_D#12
0
H_A#16 CPU_A15# CPU_D12#
K25 CPU_A16# CPU_D13# C24 H_D#13 P4 GFX_RX4N GFX_TX4N V1
H_REQ#0 F29 A24 H_D#14 N4 V2
H_REQ#1 CPU_REQ0# CPU_D14# GFX_RX4P GFX_TX4P
G25 CPU_REQ1# CPU_D15# B26 H_D#15
H_REQ#2 F26 C27 H_DINV#0 P5 W2
H_REQ#3 CPU_REQ2# CPU_DBI0# GFX_RX5N GFX_TX5N
F28 CPU_REQ3# CPU_DSTBN0# A28 H_DSTBN#0 P6 GFX_RX5P GFX_TX5P W1
DATA GROUP 1
H_A#20 CPU_A19# CPU_D20# H_D#21 GFX_RX8P GFX_TX8P
J26 CPU_A20# CPU_D21# B23
H_A#21 L28 C21 H_D#22 V4 AD1
H_A#22 CPU_A21# CPU_D22# H_D#23 GFX_RX9N GFX_TX9N
L29 CPU_A22# CPU_D23# B24 V5 GFX_RX9P GFX_TX9P AD2
H_A#23 M30 E21 H_D#24
H_A#24 CPU_A23# CPU_D24# H_D#25
K27 CPU_A24# CPU_D25# B21 W3 GFX_RX10N GFX_TX10N AE2
H_A#25 M29 B20 H_D#26 W4 AE1
H_A#26 CPU_A25# CPU_D26# H_D#27 GFX_RX10P GFX_TX10P
K26 G19
1
+CPU_VREF CPU_D56#
H22 B13 H_D#57
MISC.
CPU_VREF CPU_D57#
1 CPU_D58# A12 H_D#58
C12 H_D#59 SB_A_RXN[0..1]
CPU_D59# SB_A_RXP[0..1] SB_A_RXN[0..1] 15
C123 E12 H_D#60
CPU_D60# SB_A_RXP[0..1] 15
220P_0402_50V7K D25 D13 H_D#61
2 RESERVED0 CPU_D61# NB_A_RXN[0..1]
E11 RESERVED1 CPU_D62# D12 H_D#62 NB_A_RXN[0..1] 15
PCIE_WLAN_TX_N1 C723 1 2 0.1U_0402_10V7K PCIE_WLAN_C_TX_N1
PCIE_WLAN_C_TX_N1 24
G22 B12 H_D#63 NB_A_RXP[0..1]
CPU_DPWR# CPU_D63# NB_A_RXP[0..1] 15
3
216DCP4ALA12FG-RC410MD
+1.05VS
1
H_BR0# CPU_VREF
4 H_BR0#
R38
4
H_DPWR# Trace=12Mil 49.9_0402_1%
4
4 H_DPWR#
Space=15Mil
2
+CPU_VREF
***
1
1U_0402_6.3V4Z
C121
1
R37
100_0402_1%
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/05/18 Deciphered Date 2007/05/18 Title
2 RC410MD-FSB, PCIE,A-PCIE
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 7 of 48
A B C D E
A B C D E
U21B
DDR_DQ[0..63]
DDR_DQ[0..63] 10,11 DDR_SMA0 AK27 MEM_A0
DDR_DQS[0..7] DDR_SMA1 AJ27 U21D
DDR_DQS[0..7] 10,11 DDR_SMA2 MEM_A1
AH26 MEM_A2
DDR_DQS#[0..7] DDR_SMA3 AJ26 AJ16 DDR_DQ0 F9 B4
DDR_DQS#[0..7] 10,11 MEM_A3 MEM_DQ0 13 NB_LUMA Y TXOUT_U0N
DDR_SMA4 AH25 AH16 DDR_DQ1 A4
PART 2 OF
DDR_DM[0..7] DDR_SMA5 MEM_A4 MEM_DQ1 DDR_DQ2 TXOUT_U0P
DDR_DM[0..7] 10,11 AJ25 MEM_A5 MEM_DQ2 AJ19 13 NB_CRMA D9 C TXOUT_U1N B5
DDR_SMA6 DDR_DQ3
PART 4 OF 6
AH24 MEM_A6 MEM_DQ3 AH19 TXOUT_U1P C6
DDR_SMA[0..17] DDR_SMA7 AH23 AH15 DDR_DQ4 1 2 NB_COMPS E9 B6
DDR_SMA[0..17] 10,11 DDR_SMA8 MEM_A7 MEM_DQ4 DDR_DQ5 R27 75_0402_1% COMP TXOUT_U2N
AJ24 MEM_A8 MEM_DQ5 AK16 TXOUT_U2P A6
DDR_SMA9 AJ23 AH18 DDR_DQ6 B7
DDR_SMA10 MEM_A9 MEM_DQ6 DDR_DQ7 TXOUT_U3N
AH27 AK19 F10 A7
6
MEM_A10 MEM_DQ7 14 NB_CRT_R RED TXOUT_U3P
DDR_SMA11 DDR_DQ8
ADDRESS
AH22 AF13
CRT & TV
MEM_A11 MEM_DQ8 TXCLK_UN F7
DDR_SMA12 AJ22 AF14 DDR_DQ9 E10 F8
1 MEM_A12 MEM_DQ9 14 NB_CRT_G GREEN TXCLK_UP 1
DDR_SMA13 AF28 AE19 DDR_DQ10
DDR_SMA14 MEM_A13 MEM_DQ10 DDR_DQ11
AJ21 MEM_A14 MEM_DQ11 AF19 14 NB_CRT_B D10 BLUE
DDR_SMA15 AG27 AE13 DDR_DQ12
I/F
DDR_SMA16 MEM_A15 MEM_DQ12 DDR_DQ13 NB_TXOUT0-
AJ28 MEM_A16 MEM_DQ13 AG13 TXOUT_L0N E5 NB_TXOUT0- 13
DDR_SMA17 AH21 AF18 DDR_DQ14 C3 F5 NB_TXOUT0+
LVDS
MEM_A17 MEM_DQ14 14 NB_CRT_HSYNC DACHSYNC TXOUT_L0P NB_TXOUT0+ 13
AE17 DDR_DQ15 B3 D5 NB_TXOUT1-
MEM_DQ15 14 NB_CRT_VSYNC DACVSYNC TXOUT_L1N NB_TXOUT1- 13
RC410MD
AJ29 AF20 DDR_DQ16 C5 NB_TXOUT1+
10,11 DDR_SRAS# MEM_RAS# MEM_DQ16 TXOUT_L1P NB_TXOUT1+ 13
AG28 AF21 DDR_DQ17 E6 NB_TXOUT2-
10,11 DDR_SCAS# MEM_CAS# MEM_DQ17 TXOUT_L2N NB_TXOUT2- 13
AH30 AG23 DDR_DQ18 1 2 RSET B10 D6 NB_TXOUT2+
10,11 DDR_SWE# MEM_WE# MEM_DQ18 RSET TXOUT_L2P NB_TXOUT2+ 13
AF24 DDR_DQ19 R232 715_0402_1% 15mil E7
MEM_DQ19 DDR_DQ20 NB_DDC_CLK TXOUT_L3N
MEM_DQ20 AG19 14 NB_DDC_CLK B2 DACSCL TXOUT_L3P E8
CLK. GEN.
MEM_DQ27 AD27 LVDS_BLEN F2
1
1K_0402_1%
CLK
AC23 AA25 DDR_DQ32 R217 A3 NB_RST#
11 DDR_CLK3
2
0.1U_0402_10V6K
DATA
2 10,11 DDR_SCKE1 MEM_CKE1 MEM_DQ40 STRP_DATA 2
AE24 AC29 DDR_DQ41 TESTMODE C4 J2
10 DDR_SCKE2 MEM_CKE2 MEM_DQ41 TESTMODE TMDS_HPD
AE21 AA29 DDR_DQ42 AH13
10,11 DDR_SCKE3 MEM_CKE3 MEM_DQ42 THERMALDIODE_P
1.8K_0402_5%
Y29 DDR_DQ43 AJ13
MEM_DQ43 THERMALDIODE_N
1
DDR_SCS#0 AH29 AD30 DDR_DQ44 R230
10 DDR_SCS#0 MEM_CS#0 MEM_DQ44
DDR_SCS#1 AG29 AD29 DDR_DQ45
10 DDR_SCS#1 MEM_CS#1 MEM_DQ45
DDR_SCS#2 AH28 AA30 DDR_DQ46 216DCP4ALA12FG-RC410MD R216
10,11 DDR_SCS#2 MEM_CS#2 MEM_DQ46
DDR_SCS#3 AF29 Y28 DDR_DQ47 10K_0402_5%
10,11 DDR_SCS#3
1
MEM_CS#3 MEM_DQ47 DDR_DQ48
AG30 U27
2
MEM_ODT0 MEM_DQ48 DDR_DQ49
AE28 MEM_ODT1 MISC MEM_DQ49 T27
AC30 N26 DDR_DQ50
MEM_ODT2/RSV2 MEM_DQ50 DDR_DQ51
Y30 MEM_ODT3/RSV3 MEM_DQ51 M27
1 R43 2 AD28 U26 DDR_DQ52 Low: Normal Mode(Fixed) +1.8V
+1.8V MEM_VMODE MEM_DQ52
MEM_VMODE: 1.8V: DDR2 1K_0402_5% AJ14 T26 DDR_DQ53 High: Test Mode
MEM_CAP1 MEM_DQ53 DDR_DQ54
N30 MEM_CAP2 MEM_DQ54 P27
2
10mil MEM_COMPP AJ15 P26 DDR_DQ55
MEM_COMPN MEM_COMPP MEM_DQ55 DDR_DQ56 NB_EDID_CLK
10mil AE29 MEM_COMPN MEM_DQ56 U29 1 R219 2 R236
20mil +DDR_VREF AB27 T29 DDR_DQ57 4.7K_0402_5% 220K_0402_5%
MEM_VREF MEM_DQ57 DDR_DQ58
MEM_DQ58 P29 D21
+1.8V DDR_DQS#0 AH17 N29 DDR_DQ59 1 R226 2 NB_EDID_DATA
+3VS
1
DDR_DQS0 MEM_DQS0N MEM_DQ59 DDR_DQ60 4.7K_0402_5% SUS_STAT#
AJ18 MEM_DQS0P MEM_DQ60 U28 2 1 NB_SUS_STAT# 16
61.9_0603_1%
MEM_COMPN MEM_DQS2P
MEM_COMPP DDR_DQS#3 CH751H-40_SC76
AF26 MEM_DQS3N
DDR_DQS3 AE25
DATA
MEM_DQS3P DDR_DM0
MEM_DM0 AJ17
61.9_0603_1%
14
close to relative Ball. U5A
216DCP4ALA12FG-RC410MD LVDS_ENBKL 1
P
A
O 3 ENBKL 29
2 B
G
NB STRAPING PINS SN74LVC08APW_TSSOP14
7
FSB SPEED BM_REQ# NB_CRT_HSYNC NB_CRT_VSYNC
STRP_DATA 1 R225 2 +3VS STRP_DATA: DEBUG STRAP
4.7K_0402_5%
166MHZ 0 1 1 DEFAULT: 1 ***
0: MEMORY CHANNEL STRAPING NB_PWRGD
133MHZ
0 0 1 1: E2PROM STRAPING
+3VALW
14
U5B
DEFAULT: 0 1: DESKTOP CPU 0: MOBILE CPU
1
Q5 4
P
+3VS R11 2 A
2 1 SB_PWRGD# 17 O 6 NB_ENVDD 13
MMBT3904_SOT23 2K_0402_5% LVDS_ENVDD 5 B
G
4 NB_CRT_VSYNC 1 R228 2 4
3
4.7K_0402_5% SN74LVC08APW_TSSOP14
7
1
R227
R20 4.7K_0402_5%
Q35
2 2 R229 1
4.7K_0402_5%
+1.05VS
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/05/18 Deciphered Date 2007/05/18 Title
RC410MD-DDR/DISP/MISC
3
MMBT3904_SOT23
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU_BSEL1 CPU_BSEL1 5,12 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 8 of 48
A B C D E
A B C D E
+1.2VS
1 2 +1.8V
C65 10U_0805_10V4Z
1 2 1 2 1 2
C64 10U_0805_10V4Z C87 0.1U_0402_16V4Z C115 10U_0805_10V4Z U21F
1 2 1 2 1 2
C75 1U_0402_6.3V4Z C103 0.1U_0402_16V4Z C72 10U_0805_10V4Z R13
VSS
1 2 1 2 1 2 A13 VSS VSS R15
C107 1U_0402_6.3V4Z C149 0.1U_0402_16V4Z C119 10U_0805_10V4Z A16 R17
VSS VSS
1 2 1 2 A19 VSS VSS R19
C88 1U_0402_6.3V4Z +1.8V C93 10U_0805_10V4Z A2 R23
+1.2VS U21E VSS VSS
PART 6 OF 6
1 2 1 2 A22 VSS VSS R24
C90 1U_0402_6.3V4Z 5A AB23 2A C166 1U_0402_6.3V4Z A25 R27
VDDR_MEM VSS VSS
1 2 M13 VDD_CORE VDDR_MEM AB24 1 2 A29 VSS VSS T12
1
C104 1U_0402_6.3V4Z M15 AC13 C76 1U_0402_6.3V4Z A9 T14 1
VDD_CORE VDDR_MEM VSS VSS
1 2 M17 VDD_CORE VDDR_MEM AC16 1 2 AA23 VSS VSS T16
C73 1U_0402_6.3V4Z M19 AC19 C124 1U_0402_6.3V4Z AA24 T18
VDD_CORE VDDR_MEM VSS VSS
1 2 N12 VDD_CORE VDDR_MEM AC21 1 2 AA28 VSS VSS T30
C74 1U_0402_6.3V4Z N14 AC22 C152 1U_0402_6.3V4Z AC11 U13
VDD_CORE VDDR_MEM VSS VSS
PART 5 OF
1 2 N16 VDD_CORE VDDR_MEM AD13 1 2 AC12 VSS VSS U15
C105 1U_0402_6.3V4Z N18 AD16 C132 1U_0402_6.3V4Z AC14 U17
VDD_CORE VDDR_MEM VSS VSS
1 2 P13 AD19 1 2 AC15 U19
CORE PWR
VDD_CORE VDDR_MEM VSS VSS
6
1 2 R12 VDD_CORE VDDR_MEM AK21 1 2 AC27 VSS VSS V14
C89 1U_0402_6.3V4Z R14 AK24 C139 1U_0402_6.3V4Z AD11 V16
VDD_CORE VDDR_MEM VSS VSS
1 2 R16 VDD_CORE VDDR_MEM AK28 1 2 AD12 VSS VSS V18
C71 1U_0402_6.3V4Z R18 T23 C110 1U_0402_6.3V4Z AD14 V27
VDD_CORE VDDR_MEM VSS VSS
1 2 T13 VDD_CORE VDDR_MEM T24 1 2 AD15 VSS VSS V28
C106 1U_0402_6.3V4Z T15 V23 C86 1U_0402_6.3V4Z AD17 W13
VDD_CORE VDDR_MEM VSS VSS
1 2 T17 VDD_CORE VDDR_MEM V24 1 2 AD18 VSS VSS W15
C49 1U_0402_6.3V4Z T19 Y23 C77 1U_0402_6.3V4Z AD20 W17
VDD_CORE VDDR_MEM VSS VSS
1 2 U12 VDD_CORE VDDR_MEM Y24 1 2 AE30 VSS VSS W19
C50 1U_0402_6.3V4Z U14 C130 1U_0402_6.3V4Z AF12 W23
VDD_CORE VSS VSS
U16 1 2 AF27 W30
RC410MD GOUND
VDD_CORE 0.1A L4 C129 1U_0402_6.3V4Z VSS VSS
U18 VDD_CORE AG14 VSS
V13 VDD_CORE VDD_18 AB22 1 2 +1.8VS 1 2 AG16 VSS
+1.05VS V15 AB9 CHB1608U301_0603 C141 1U_0402_6.3V4Z AG18 AA3
VDD_CORE VDD_18 VSS VSSA
RC410MD POWER
V17 VDD_CORE VDD_18 J22 1 2 1 2 AG21 VSS VSSA AA7
1 2 V19 J9 +1.2VS C134 0.1U_0402_16V4Z C140 1U_0402_6.3V4Z AG24 AA8
C79 10U_0805_10V4Z VDD_CORE VDD_18 VSS VSSA
W12 1 2 AG26 AB5
1 2 W14
VDD_CORE
AB7
2.25A C135 0.1U_0402_16V4Z AH11
VSS VSSA
AB6
C118 10U_0805_10V4Z VDD_CORE VDDA_12 VSS VSSA
W16 VDD_CORE VDDA_12 AC7 1 2 AJ1 VSS VSSA AC3
1 2 W18 AC8 C58 0.1U_0402_16V4Z +1.2VS AJ30 AD3
C80 1U_0402_6.3V4Z VDD_CORE VDDA_12 VSS VSSA
VDDA_12 AD9 1 2 AK12 VSS VSSA AD7
2 C67 0.1U_0402_16V4Z 2
1 2 VDDA_12 H4 AK15 VSS VSSA AD8
C100 1U_0402_6.3V4Z +1.05VS H5 1 2 1 2 AK18 AE8
VDDA_12 C31 10U_0805_10V4Z C61 10U_0805_10V4Z VSS VSSA
1 2 5A VDDA_12 J6 AK2 VSS VSSA AF3
C131 1U_0402_6.3V4Z A10 K6 1 2 1 2 AK22 AF5
VDD_CPU VDDA_12 C28 10U_0805_10V4Z C418 10U_0805_10V4Z VSS VSSA
1 2 F11 VDD_CPU VDDA_12 L7 AK25 VSS VSSA AF7
C91 1U_0402_6.3V4Z F12 L8 1 2 AK29 AF9
VDD_CPU VDDA_12 C66 10U_0805_10V4Z VSS VSSA
1 2 F17 VDD_CPU VDDA_12 M7 B1 VSS VSSA AG5
C69 1U_0402_6.3V4Z G11 M8 1 2 B30 AH10
VDD_CPU VDDA_12 C23 10U_0805_10V4Z VSS VSSA
1 2 G12 VDD_CPU VDDA_12 P7 D14 VSS VSSA AH3
C133 1U_0402_6.3V4Z G13 P8 1 2 D17 AH5
VDD_CPU VDDA_12 L7 C417 10U_0805_10V4Z VSS VSSA
1 2 G14 VDD_CPU VDDA_12 T7 D20 VSS VSSA AH6
C150 1U_0402_6.3V4Z G16 T8 1 2 +1.8VS 1 2 D24 AH7
VDD_CPU VDDA_12 CHB1608U301_0603 C22 1U_0402_6.3V4Z VSS VSSA
1 2 G17 VDD_CPU VDDA_12 W7 D27 VSS VSSA AH8
C151 1U_0402_6.3V4Z G20 W8 1 2 D3 AH9
VDD_CPU VDDA_12 C25 1U_0402_6.3V4Z VSS VSSA
CPU I/F
+
3 C7 1 2 M16 W5 3
LVDDR18D C414 470U_D2_2.5VM VSS VSSA
1 2 B8 AVDDQ LVDDR18A H7 M18 VSS VSSA W6
CHB1608U301_0603 1
+
1 +AVDDI D8 AVDDDI LVDDR18A H8 1 2 M23 VSS VSSA Y3
C53 C57 H10 +PLLVDD
20mils C15 @470U_D2_2.5VM M24
PLLVDD VSS
+CPVDD H21 CPVDD M26 VSS
10U_0805_10V4Z
0.1U_0402_16V4Z
L5
1 1 22U_0805_6.3V6M 0.1U_0402_16V4Z +MPVDD +1.8VS +1.8VS
1 2
CHB2012U170_0805 +CPVDD +1.8VS +PLLVDD
1 1 1 1 1
C32 L12 L10
C44
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0402_6.3V4Z
2 2 2 2 2 2 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/05/18 Deciphered Date 2007/05/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RC410MD PWR/GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS CustomIAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 9 of 48
A B C D E
A B C D E F G H
+1.8V
+1.8V
Trace=20mil +1.8V
+DDR_VREF1 Layout Note:
Place near JDIM1
202
201
1
JP16 2
1 2 R13
GND2
GND1
VREF VSS DDR_DQ15 1K_0402_1% C19
3 VSS DQ4 4
DDR_DQ10 5 6 DDR_DQ12 DDR_DQ[0..63] 0.1U_0402_16V4Z
DDR_DQ14 DQ0 DQ5 DDR_DQ[0..63] 8,11 1
7 8
2
DQ1 VSS DDR_DM1 DDR_DQS[0..7] +DDR_VREF1
9 VSS DM0 10 DDR_DQS[0..7] 8,11
DDR_DQS#1 11 12 +1.8V
DDR_DQS1 DQS0# VSS DDR_DQ8 DDR_DQS#[0..7]
13 DQS0 DQ6 14 DDR_DQS#[0..7] 8,11
1
1 15 16 DDR_DQ11 1 1
DDR_DQ9 VSS DQ7 DDR_DM[0..7] R14 C18
17 DQ2 VSS 18 DDR_DM[0..7] 8,11
DDR_DQ13 19 20 DDR_DQ4 1K_0402_1%
DQ3 DQ12
C143
C111
C154
C101
C162
C163
C96
C113
C145
C642
C643
C644
21 22 DDR_DQ5 DDR_SMA[0..17] 1 0.1U_0402_16V4Z
DDR_DQ1 VSS DQ13 DDR_SMA[0..17] 8,11 2
23 24 1 1 1 1 1 1 1 1 1 1 1 1
2
DDR_DQ0 DQ8 VSS DDR_DM0 +
25 DQ9 DM1 26
27 28 C148
VSS VSS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_DQS#0 29 30 DDR_CLK1 220U_Y_4VM
DQS1# CK0 DDR_CLK1 8 2 2 2 2 2 2 2 2 2 2 2 2 2
DDR_DQS0 31 32 DDR_CLK1#
DQS1 CK0# DDR_CLK1# 8
33 VSS VSS 34
DDR_DQ3 35 36 DDR_DQ6
DDR_DQ2 DQ10 DQ14 DDR_DQ7
37 DQ11 DQ15 38
39 VSS VSS 40
41 VSS VSS 42
DDR_DQ16 43 44 DDR_DQ17
DDR_DQ20 DQ16 DQ20 DDR_DQ21
45 DQ17 DQ21 46
47 VSS VSS 48
DDR_DQS#2 49 50 Layout Note:
DDR_DQS2 DQS2# NC DDR_DM2
51 DQS2 DM2 52
53 54 Place one cap close to every 2 pullup
DDR_DQ23 VSS VSS DDR_DQ22
DDR_DQ19
55 DQ18 DQ22 56
DDR_DQ18
resistors terminated to V_DDR_MCH_REF
57 DQ19 DQ23 58
59 VSS VSS 60
DDR_DQ28 61 62 DDR_DQ29
DDR_DQ25 DQ24 DQ28 DDR_DQ24
63 DQ25 DQ29 64
65 VSS VSS 66
DDR_DM3 67 68 DDR_DQS#3 +0.9VS
DM3 DQS3# DDR_DQS3
69 NC DQS3 70
71 VSS VSS 72
2 DDR_DQ26 73 74 DDR_DQ30 2
DDR_DQ27 DQ26 DQ30 DDR_DQ31
75 DQ27 DQ31 76
77 VSS VSS 78
C447
C445
C444
C443
C439
C438
C437
C436
C161
C156
C94
C83
C136
C120
C108
C147
C176
C177
DDR_SCKE0 79 80 DDR_SCKE0
8 DDR_SCKE0 CKE0 NC/CKE1
81 VDD VDD 82 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
83 NC NC/A15 84
DDR_SMA17 85 86 DDR_SMA14
BA2 NC/A14
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
22U_0805_6.3V6M
22U_0805_6.3V6M
87 VDD VDD 88
DDR_SMA12 DDR_SMA11 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
89 A12 A11 90
DDR_SMA9 91 92 DDR_SMA7
DDR_SMA8 A9 A7 DDR_SMA6
93 A8 A6 94
95 VDD VDD 96
DDR_SMA5 97 98 DDR_SMA4
DDR_SMA3 A5 A4 DDR_SMA2
99 A3 A2 100
DDR_SMA1 101 102 DDR_SMA0
A1 A0
103 VDD VDD 104
DDR_SMA10 105 106 DDR_SMA16
DDR_SMA15 A10/AP BA1 DDR_SRAS# +0.9VS
107 BA0 RAS# 108 DDR_SRAS# 8,11
DDR_SWE# 109 110 DDR_SCS#0 DDR_SCS#0 8
8,11 DDR_SWE# WE# S0#
111 VDD VDD 112
8,11 DDR_SCAS# DDR_SCAS# 113 114 DDR_SCKE2
CAS# ODT0 DDR_SCKE2 8 RP11
8 DDR_SCS#1 DDR_SCS#1 115 116 DDR_SMA13 RP1
NC/S1# NC/A13 DDR_SCKE1 DDR_SCKE0
117 VDD VDD 118 8,11 DDR_SCKE1 1 8 5 4
119 NC/ODT1 NC 120 2 7 6 3
121 122 DDR_SMA14 3 6 7 2 DDR_SMA11
DDR_DQ32 VSS VSS DDR_DQ37 DDR_SMA17 DDR_SMA12
123 DQ32 DQ36 124 4 5 8 1
DDR_DQ36 125 126 DDR_DQ33
DQ33 DQ37 56_1206_8P4R_5%
127 VSS VSS 128 56_1206_8P4R_5% Layout Note:
DDR_DQS#4 129 130 DDR_DM4
DDR_DQS4 DQS4# DM4 RP2
RP12 Place these resistor
131 DQS4 VSS 132
133 134 DDR_DQ39 DDR_SMA7 1 8 5 4 DDR_SMA6 closely JDIM2,all
3 VSS DQ38 3
DDR_DQ38 135 DQ34 DQ39 136 DDR_DQ34 DDR_SMA9 2 7 6 3 DDR_SMA8 trace length<750 mil
DDR_DQ35 137 138 DDR_SMA2 3 6 7 2 DDR_SMA4
DQ35 VSS DDR_DQ44 DDR_SMA5 DDR_SMA3
139 VSS DQ44 140 4 5 8 1
DDR_DQ45 141 142 DDR_DQ41
DDR_DQ40 DQ40 DQ45 56_1206_8P4R_5%
143 DQ41 VSS 144 56_1206_8P4R_5%
145 146 DDR_DQS#5
VSS DQS5# RP13
DDR_DM5 147 148 DDR_DQS5 RP3
DM5 DQS5 DDR_SMA15 DDR_SMA10
149 VSS VSS 150 1 8 5 4
DDR_DQ46 151 152 DDR_DQ42 DDR_SMA0 2 7 6 3 DDR_SMA1
DDR_DQ43 DQ42 DQ46 DDR_DQ47 DDR_SRAS# DDR_SMA16
153 DQ43 DQ47 154 3 6 7 2
155 156 DDR_SCAS# 4 5 8 1 DDR_SWE# Layout Note:
DDR_DQ52 VSS VSS DDR_DQ53
157 DQ48 DQ52 158 Place these resistor
DDR_DQ48 159 160 DDR_DQ49 56_1206_8P4R_5%
DQ49 DQ53 56_1206_8P4R_5% closely JDIM2,all
161 VSS VSS 162 RP14
163 NC,TEST CK1 164 DDR_CLK0
DDR_CLK0 8
RP4 trace length Max=1.3"
165 166 DDR_CLK0# DDR_SCS#2 1 8 5 4 DDR_SCS#0
VSS CK1# DDR_CLK0# 8 8,11 DDR_SCS#2
DDR_DQS#6 167 168 DDR_SMA13 2 7 6 3 DDR_SCKE2
DDR_DQS6 DQS6# VSS DDR_DM6 DDR_SCS#1 DDR_SCKE3
169 DQS6 DM6 170 3 6 7 2 DDR_SCKE3 8,11
171 172 4 5 8 1 DDR_SCS#3
VSS VSS DDR_SCS#3 8,11
DDR_DQ50 173 174 DDR_DQ55
DDR_DQ54 DQ50 DQ54 DDR_DQ51 56_1206_8P4R_5%
175 DQ51 DQ55 176 56_1206_8P4R_5%
177 VSS VSS 178 Layout Note:
DDR_DQ56 179 180 DDR_DQ60
DDR_DQ61 DQ56 DQ60 DDR_DQ57 DDR_SCKE3 1 DDR_SCKE2
Place R12, R17 betweem
181 DQ57 DQ61 182 2 1 2
183 184 R12 R17 JP15 and RP14
DDR_DM7 VSS VSS DDR_DQS#7 180_0402_5% 180_0402_5%
185 DM7 DQS7# 186
187 188 DDR_DQS7
DDR_DQ62 VSS DQS7
189 DQ58 VSS 190
DDR_DQ58 191 192 DDR_DQ63
DQ59 DQ62 DDR_DQ59
193 VSS DQ63 194
4 11,12,16,24 SB_SMDATA 195 SDA VSS 196 4
11,12,16,24 SB_SMCLK 197 SCL SAO 198
+3VS 199 VDDSPD SA1 200 +3VS
2.2U_0805_10V6K
C187
0.1U_0402_16V4Z
1 1 P-TWO_A5692B-A0G16-P
C185
Reverse THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRII-SODIMM0
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS CustomIAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 10 of 48
A B C D E F G H
A B C D E
+1.8V +1.8V
+DDR_VREF2
Trace=20mil
JP15
1 VREF VSS 2
DDR_DQ15
Layout Note:
3 VSS DQ4 4
DDR_DQ10 5 6 DDR_DQ12 Place near JDIM1
DDR_DQ14 DQ0 DQ5
7 DQ1 VSS 8
9 10 DDR_DM1
DDR_DQS#1 VSS DM0
11 DQS0# VSS 12
DDR_DQ[0..63] DDR_DQS1 13 14 DDR_DQ8 +1.8V
8,10 DDR_DQ[0..63] DQS0 DQ6 DDR_DQ11
15 VSS DQ7 16
DDR_DQS[0..7] DDR_DQ9 17 18
8,10 DDR_DQS[0..7] DDR_DQ13 DQ2 VSS DDR_DQ4
1 19 DQ3 DQ12 20 1
C97
C98
C112
C165
C157
C125
C155
C142
C109
C164
C645
C646
C647
DDR_DQS#[0..7] 21 22 DDR_DQ5 1
8,10 DDR_DQS#[0..7] DDR_DQ1 VSS DQ13
23 DQ8 VSS 24 1 1 1 1 1 1 1 1 1 1 1 1 1
DDR_DM[0..7] DDR_DQ0 25 26 DDR_DM0 +
8,10 DDR_DM[0..7] DQ9 DM1 C52
27 VSS VSS 28
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_SMA[0..17] DDR_DQS#0 29 30 DDR_CLK4 220U_Y_4VM
8,10 DDR_SMA[0..17] DQS1# CK0 DDR_CLK4 8 2 2 2 2 2 2 2 2 2 2 2 2 2 2
DDR_DQS0 31 32 DDR_CLK4#
DQS1 CK0# DDR_CLK4# 8
33 VSS VSS 34
DDR_DQ3 35 36 DDR_DQ6
DDR_DQ2 DQ10 DQ14 DDR_DQ7
37 DQ11 DQ15 38
39 VSS VSS 40
41 VSS VSS 42
DDR_DQ16 43 44 DDR_DQ17
DDR_DQ20 DQ16 DQ20 DDR_DQ21
45 DQ17 DQ21 46
47 VSS VSS 48
DDR_DQS#2 49 50
DDR_DQS2 DQS2# NC DDR_DM2
51 DQS2 DM2 52
53 VSS VSS 54
DDR_DQ23 55 56 DDR_DQ22 +1.8V
DDR_DQ19 DQ18 DQ22 DDR_DQ18
57 DQ19 DQ23 58
59 VSS VSS 60
DDR_DQ28 61 62 DDR_DQ29
DDR_DQ25 DQ24 DQ28 DDR_DQ24
63 DQ25 DQ29 64
65 VSS VSS 66
1
DDR_DM3 67 68 DDR_DQS#3 1
DM3 DQS3# DDR_DQS3 R15
69 NC DQS3 70
71 72 1K_0402_1% C21
DDR_DQ26 VSS VSS DDR_DQ30 +DDR_VREF2
73 DQ26 DQ30 74 0.1U_0402_16V4Z
DDR_DQ27 DDR_DQ31 2
75 76
2
2 DQ27 DQ31 2
77 VSS VSS 78
DDR_SCKE1 79 80 DDR_SCKE1
8,10 DDR_SCKE1 CKE0 NC/CKE1
81 VDD VDD 82
1
83 NC NC/A15 84 1
DDR_SMA17 85 86 DDR_SMA14 R16
BA2 NC/A14 1K_0402_1% C20
87 VDD VDD 88
DDR_SMA12 89 90 DDR_SMA11 0.1U_0402_16V4Z
DDR_SMA9 A12 A11 DDR_SMA7 2
91 92
2
DDR_SMA8 A9 A7 DDR_SMA6
93 A8 A6 94
95 VDD VDD 96
DDR_SMA5 97 98 DDR_SMA4
DDR_SMA3 A5 A4 DDR_SMA2
99 A3 A2 100
DDR_SMA1 101 102 DDR_SMA0
A1 A0
103 VDD VDD 104
DDR_SMA10 105 106 DDR_SMA16
DDR_SMA15 A10/AP BA1 DDR_SRAS#
107 BA0 RAS# 108 DDR_SRAS# 8,10
DDR_SWE# 109 110 DDR_SCS#2 DDR_SCS#2 8,10
8,10 DDR_SWE# WE# S0#
111 VDD VDD 112
8,10 DDR_SCAS# DDR_SCAS# 113 114 DDR_SCKE3
CAS# ODT0 DDR_SCKE3 8,10
8,10 DDR_SCS#3 DDR_SCS#3 115 116 DDR_SMA13
NC/S1# NC/A13
117 VDD VDD 118
119 NC/ODT1 NC 120
121 VSS VSS 122
DDR_DQ32 123 124 DDR_DQ37
DDR_DQ36 DQ32 DQ36 DDR_DQ33
125 DQ33 DQ37 126
127 VSS VSS 128
DDR_DQS#4 129 130 DDR_DM4
DDR_DQS4 DQS4# DM4
131 DQS4 VSS 132
133 134 DDR_DQ39
DDR_DQ38 VSS DQ38 DDR_DQ34
135 DQ34 DQ39 136
DDR_DQ35 137 138
3 DQ35 VSS DDR_DQ44 3
139 VSS DQ44 140
DDR_DQ45 141 142 DDR_DQ41
DDR_DQ40 DQ40 DQ45
143 DQ41 VSS 144
145 146 DDR_DQS#5
DDR_DM5 VSS DQS5# DDR_DQS5
147 DM5 DQS5 148
149 VSS VSS 150
DDR_DQ46 151 152 DDR_DQ42
DDR_DQ43 DQ42 DQ46 DDR_DQ47
153 DQ43 DQ47 154
155 VSS VSS 156
DDR_DQ52 157 158 DDR_DQ53
DDR_DQ48 DQ48 DQ52 DDR_DQ49
159 DQ49 DQ53 160
161 VSS VSS 162
163 164 DDR_CLK3
NC,TEST CK1 DDR_CLK3 8
165 166 DDR_CLK3#
VSS CK1# DDR_CLK3# 8
DDR_DQS#6 167 168
DDR_DQS6 DQS6# VSS DDR_DM6
169 DQS6 DM6 170
171 VSS VSS 172
DDR_DQ50 173 174 DDR_DQ55
DDR_DQ54 DQ50 DQ54 DDR_DQ51
175 DQ51 DQ55 176
177 VSS VSS 178
DDR_DQ56 179 180 DDR_DQ60
DDR_DQ61 DQ56 DQ60 DDR_DQ57
181 DQ57 DQ61 182
183 VSS VSS 184
DDR_DM7 185 186 DDR_DQS#7
DM7 DQS7# DDR_DQS7
187 VSS DQS7 188
DDR_DQ62 189 190
DDR_DQ58 DQ58 VSS DDR_DQ63
191 DQ59 DQ62 192
193 194 DDR_DQ59
VSS DQ63
10,12,16,24 SB_SMDATA 195 SDA VSS 196
10,12,16,24 SB_SMCLK 197 SCL SAO 198 +3VS
4 +3VS 199 VDDSPD SA1 200 4
0.1U_0402_16V4Z
2.2U_0805_10V6K
1 1 PTI_A5652D-A0G16-P
C186
C184
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR-II SODIMM1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS CustomIAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 11 of 48
A B C D E
A B C D E
2
49.9_0402_1%
49.9_0402_1%
49.9_0402_1%
49.9_0402_1%
R256
R257
R258
R259
1 1
+CLK_VDD1 U23
1
L16
+3VS 1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 45 47 CPUCLKT0 R270 1 2 33_0402_5% CLK_NB_BCLK 8
KC FBM-L11-201209-221LMAT_0805 1 VDDCPU CPUCLKT0 CPUCLKC0 R271 33_0402_5%
1 1 1 1 1 51 VDDPCI CPUCLKC0 46 1 2 CLK_NB_BCLK# 8
C221 C188 C486 C458 C485 32 43 CPUCLKT1 R272 1 2 33_0402_5% CLK_BCLK 4
VDDATI CPUCLKT1 CPUCLKC1 R273 33_0402_5%
35 VDDSRC CPUCLKC1 42 1 2 CLK_BCLK# 4
10U_0805_10V4Z C456 14 41
2 2 2 2 2 2 VDDSRC CPUCLKT2_ITP
21 VDDSRC CPUCLKC2_ITP 40
L14 0.1U_0402_16V4Z 0.1U_0402_16V4Z 3
+VDDPCI VDD48 R261 33_0402_5%
+3VS 1 2 56 VDDREF 1 2 CLK_SB_ALINK 15
CHB1608U301_0603 1 1 1 +3VS 1 2 +CLKVDDA 39 R263 1 2 33_0402_5% CLK_SB_ALINK# 15
C203 0.1U_0402_16V4Z C190 L13 CHB1608U301_0603 VDDA SRCCLKT0 R285 33_0402_5%
SRCCLKT0 34 1 2 CLK_NB_ALINK 7
33 SRCCLKC0 R278 1 2 33_0402_5% CLK_NB_ALINK# 7
10U_0805_10V4Z C189 0.1U_0402_16V4Z SRCCLKC0
ATIGCLKT0 30
2 2 2
44 GNDCPU ATIGCLKC0 29
L33 49 27 R708 1 2 33_0402_5% CLK_PCIE_MCARD 24
GNDPCI ATIGCLKT1
0.1U_0402_16V4Z
+3VS 1 2 +VDD48 31 28 R709 1 2 33_0402_5% CLK_PCIE_MCARD# 24
GNDATI ATIGCLKC1
10U_0805_10V4Z
CHB1608U301_0603 1 1 36 24 SRCCLKT3
C484 GNDSRC SRCCLKT3 SRCCLKC3
26 GNDSRC SRCCLKC3 25
C497
49.9_0402_1%
49.9_0402_1%
49.9_0402_1%
49.9_0402_1%
49.9_0402_1%
49.9_0402_1%
0.1U_0402_16V4Z 2 2 20 22
GNDSRC SRCCLKT4
1
4.7U_0805_10V4Z 15 23
2 2 C457 C182 GNDSRC SRCCLKC4 SRCCLKT5
5 GND SRCCLKT5 18
55 19 SRCCLKC5
1 1 GND SRCCLKC5
R710
R711
R279
R286
R264
R262
38 GNDA SRCCLKT6 16
17
2
22P_0402_50V8J XTALIN_CLK SRCCLKC6
1 2 1 XIN SRCCLKT7 12
1
C501 13
SRCCLKC7
1
Y3 R277
2 2
CLK_ENABLE# @ 1M_0402_5% 10 R283 2 1 10K_0402_5% +CLK_VDD1
41 CLK_ENABLE# CLKREQA# R284 2
2 11 1 10K_0402_5%
2
22P_0402_50V8J XTALOUT_CLK XOUT CLKREQB#
1 2 MINI_CLKREQ# 24
C500 14.31818MHZ_20P_6X1430004201 50 R254 1 2 4.7K_0402_5%
CK410#/PCICLK0
+CLK_VDD1 1 R281 2 6 VTT_PWRGD#/PD
@ 10K_0402_5% +CLK_VDD1 2 1 48 4
CPU_STOP# USB_48MHZ
1
D R269 @ 4.7K_0402_5%
2 Q40 2 R255 1 0_0402_5%
16,17 CLK_OK 15 CPU_STP# FS_C R282 1
G
FS_C 9 2 4.7K_0402_5% CPU_BSEL2 5
S 2 7 53 FS_B/REF1 R253 1 2 4.7K_0402_5%
10,11,16,24 SB_SMCLK
3
475_0402_1%
PA_RS4X0F5 R260 ICS951413CGLFT_TSSOP56
For C4 support
R255=4.7K, C83=33P ICS951413
2
R266 1 2 33_0402_5% CLK_SB_14M 16
R252 1 2 @ 33_0402_5% CLK_14M_SIO 30
R267 1 2 33_0402_5% CLK_NB_14M 8
3 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ClockGen ICS 951411
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 12 of 48
A B C D E
A B C D E
TV-OUT CONNECTOR
Reduce LUMA_1 and CRMA_1 length
As short as possible 1.
2.
Y
C
ground
ground PANEL +LCDVDD CTRL CKT
1
1 D8 D7 3. Y (luminance+sync) 1
4. C (crominance)
@ 22P_0402_50V8J
C204 1 2 +3VALW
NB_ENVDD
3
L15 8 NB_ENVDD
+3VS
3
S
NB_LUMA 1 2 Q2 +3VS
8 NB_LUMA G
FBMA-L11-160808-121LMT @ DAN217_SC59 @ DAN217_SC59 2
+LCDVDD
NB_CRMA
8 NB_CRMA
1
SI2301BDS_SOT23 80mil
JP18
1
1
@ 22P_0402_50V8J
D
1
R59 C224 1 2 1 R10 R9 1
1
1
2 5 C411
2 5
1
R57 L17 LUMA_2 3 6 470_0805_5% 100K_0402_5%
2
75_0402_1% 75_0402_1% CRMA_2 3 6 R7 4.7U_0805_10V4Z
1 2 4
2
2
FBMA-L11-160808-121LMT 4 100_0402_5% 2
1
2
3
C200 D Q34
S
1 1
2
G
1 C202 C223 ALLTO_C10877-104A1-L_4P Q32 2
C213 2N7002_SOT23
G
82P_0402_50V8J 2 S
3
82P_0402_50V8J 2 2 82P_0402_50V8J SI2301BDS_SOT23
1
2 D +LCDVDD
1
82P_0402_50V8J 1 R8
C13 100K_0402_5%
80mil
2
2 2 2
1 1
+3VS 1 2 +LCDVDD Width: 40mils C404 C405
R209 4.7K_0402_5%
C410
4.7U_0805_10V4Z 0.1U_0402_16V4Z
DISPOFF# 2 2
29 BKOFF# 1 2 1 2
D19 CH751H-40_SC76 220P_0402_50V7K 0.047U_0402_16V7K
2
C939
47P_0402_50V8J
1
NB_EDID_CLK 1 2
C408 47P_0402_50V8J
NB_EDID_DATA 1 2
C409 47P_0402_50V8J
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
TV-OUT, LVDS CONNECTOR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 13 of 48
A B C D E
5 4 3 2 1
CRT CONNECTOR
D @ DAN217_SC59 @ DAN217_SC59 D
@ DAN217_SC59 +5VS +R_CRT_VCC +CRT_VCC
D4 F1
1
D2 D1 D3 2 1 1 2
+3VS
CH491D_SC59 1
1A_6VDC_MINISMDC110 C400
CRT Conn.
0.1U_0402_16V4Z
3
2
JP14
6
11
CRT_OUT_R 1
7
L1 12
1 2 CRT_OUT_G 2 +CRT_VCC +CRT_VCC +3VS +3VS +3VS
8 NB_CRT_R
FBMA-L11-160808-700LMT 0603 8
13
2
L2 CRT_OUT_B 3
4.7K_0402_5%
4.7K_0402_5%
2.2K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
1 2 9 16 R204 R207 R205 R206 R208
8 NB_CRT_G
FBMA-L11-160808-700LMT 0603 14
4 17
L3 1 10
1
8 NB_CRT_B 1 2 15
FBMA-L11-160808-700LMT 0603 C402 5
2
G
2 SUYIN _070546FR015S233CR
1 1 1 1 1 1
1
C10
C8 C5 C4 C6 C7 Q32 1 3 NB_DDC_DATA 8
C R1 R2 R3 2N7002_SOT23 C
2
75_0402_1% 75_0402_1% 6P_0402_50V8D 6P_0402_50V8D 220P_0402_50V7K
G
2 2 2 2 2 2
75_0402_1% 6P_0402_50V8D 6P_0402_50V8D 6P_0402_50V8D 6P_0402_50V8D Q33 1 3 NB_DDC_CLK 8
2
2N7002_SOT23
S
1 1
C398 C9
2 2
68P_0402_50V8J 68P_0402_50V8J
+CRT_VCC R843
C12
1 2 CRT_OUT_HSYNC
1 2 10_0402_5%
R844
5
1
1 2 CRT_OUT_VSYNC
0.1U_0402_16V4Z R4 10_0402_5%
P
OE#
2 4 +CRT_VCC 1K_0402_5%
8 NB_CRT_HSYNC A Y
G
U3 1 2 1 1
1
5
1
C401
0.1U_0402_16V4Z @ 68P_0402_50V8K @ 68P_0402_50V8K
P
OE#
2 2
8 NB_CRT_VSYNC 2 A Y U24
G
SN74AHCT1G125GW_SOT353-5
3
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT CONNECTOR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 14 of 48
5 4 3 2 1
5 4 3 2 1
PA_IXP400AC16 PCI_AD[0..31]
19,20,21,23 PCI_AD[0..31]
C300, C305, C295, C298=10nF
+3VS
A_RST#, PCIRST# 8.2K Pull down
BMREQ# add diode and RC
R163 1 2 8.2K_0402_5%
R8831 2 8.2K_0402_5% PCI_PIRQD# U9A
R8841 8.2K_0402_5% PCI_PIRQC#
R8851
2
2 8.2K_0402_5% PCI_PIRQB# NB_RST# AH8
SB450 SB PCICLK0 L4
L3
8 NB_RST# A_RST# PCICLK1
R8861 2 8.2K_0402_5% PCI_PIRQA# Part 1 of 4 L2 PCI_CLK2_R CLK_PCI_CB
PCICLK2 PCI_CLK2_R 19 CLK_PCI_CB 21
12 CLK_SB_ALINK L27 L1 PCI_CLK3_R CLK_PCI_SIO
PCIE_RCLKP PCICLK3 PCI_CLK3_R 19 CLK_PCI_SIO 30,33
12 CLK_SB_ALINK# M27 M4 PCI_CLK4_R R354 1 2 CLK_PCI_LAN CLK_PCI_1394
PCIE_RCLKN PCICLK4 CLK_PCI_1394 23
R8871 2 8.2K_0402_5%PCI_PIRQG# M3 PCI_CLK5_R 39_0402_5% CLK_PCI_LPC
D PCICLK5 PCI_CLK5_R 19 CLK_PCI_LPC 29 D
R8881 2 8.2K_0402_5%PCI_PIRQH# 1 2 SB_A_TXP0 M30 M2 PCI_CLK6_R CLK_PCI_LAN
7 NB_A_RXP0 PCIE_TX0P PCICLK6 PCI_CLK6_R 19 CLK_PCI_LAN 20
R8891 2 8.2K_0402_5%PCI_PIRQE# C300 1 2 0.01U_0402_16V7KSB_A_TXN0 N30 M1 PCI_CLK7_R R742 1 2 PCI_CLK7 PCI_CLK4_R
7 NB_A_RXN0 PCI_CLK4_R 19
PCI CLKS
8.2K_0402_5%PCI_PIRQF# PCIE_TX0N PCICLK7
R8901 2 7 NB_A_RXP1
C305 1 2 0.01U_0402_16V7KSB_A_TXP1 K30 PCIE_TX1P PCICLK8 N4 PCI_CLK8_R 39_0402_5%
PCI_CLK8_R 19
PCI_CLK7_R
PCI_CLK7_R 19
R8911 2 8.2K_0402_5%PCI_REQ#3 C295 1 2 0.01U_0402_16V7KSB_A_TXN1 L30 N3 PCICLK9_R R363 1 2
7 NB_A_RXN1 PCIE_TX1N PCICLK9
R8921 2 8.2K_0402_5%PCI_REQ#0 C298 0.01U_0402_16V7K H30 N2 PCICLKFB 39_0402_5% 1 2 C563
R8931 8.2K_0402_5%PCI_REQ#2 PCIE_TX2P PCICLK_FB @ 100P_0402_50V8J
2 J30 PCIE_TX2N
R8941 2 8.2K_0402_5%PCI_REQ#1 F30 AJ7 PCIRST#
PCIE_TX3P PCIRST# PCIRST# 20,21,23,24,27,29,30,33
G30 W3 PCI_AD0
PCIE_TX3N AD0/ROMA18
1
Y2 PCI_AD1
8.2K_1206_8P4R_5% AD1/ROMA17 PCI_AD2 R165
7 SB_A_RXP0 M29 PCIE_RX0P AD2/ROMA16 W4
5 4 PCI_REQ#4 +1.8VS N29 Y3 PCI_AD3 8.2K_0402_5%
7 SB_A_RXN0 PCIE_RX0N AD3/ROMA15
6 3 PCI_REQ#5 7 SB_A_RXP1 M28 PCIE_RX1P AD4/ROMA14 V1 PCI_AD4
7 2 PCI_GNT#0 7 SB_A_RXN1 N28 Y4 PCI_AD5
2
PCIE_RX1N AD5/ROMA13
CHB2012U170_0805
8 1 PCI_GNT#1 J29 PCIE_RX2P AD6/ROMA12 V2 PCI_AD6
K29 W2 PCI_AD7
PCIE_RX2N AD7/ROMA11
2
RP10 J28 AA4 PCI_AD8
K28
PCIE_RX3P AD8/ROMA9
V4 PCI_AD9 Spread Spectrum
R8461 8.2K_0402_5%PCI_STOP# L24 PCIE_RX3N AD9/ROMA8 PCI_AD10 L41
2 AD10/ROMA7 AA3 1
R8471 2 8.2K_0402_5%PCI_TRDY# 2 1 G27 U1 PCI_AD11 +3VS 1 2 +SS_VDD
R8481 8.2K_0402_5%PCI_FRAME# R1082 150_0402_1% PCIE_CALRP AD11/ROMA6 PCI_AD12 FBM-L11-160808-800LMT_0603 C807
22P_0402_50V8J
2 +PCIE_VDDR 1 H27 PCIE_CALRN AD12/ROMA5 AA2
R8491 8.2K_0402_5%PCI _IRDY# R110 150_0402_1% PCI_AD13 U32
1
4 5 PCI_DEVSEL# P26 AD3 PCI_AD21 12 GND 1 R744 CLK_PCI_SIO
10U_0805_10V4Z PCIE_VDDR_4 AD21/ROMD5 PCI_AD22 C777
1 2 2
C815 C816 R759 R750 CLKOUT8 16 2
22_0402_5%
K26 PCIE_VDDR_5 AD22/ROMD6 R4
8.2K_1206_8P4R_5% C312 1 2 L26 AD2 PCI_AD23 ASM3P623S00EF-16-TR_TSSOP16
PCIE_VDDR_6 AD23/ROMD7 PCI_AD24 1U_0402_6.3V4Z 100P_0402_25V8K @ 10K_0402_5% 10K_0402_5%
P28 PCIE_VDDR_7 AD24 P2
C 0.1U_0402_10V6K PCI_AD25 2 1 1 C
N26 AE3
2
PCIE_VDDR_8 AD25 PCI_AD26 100P_0402_25V8K
P27 PCIE_VDDR_9 AD26 P3
R8951 2 8.2K_0402_5%PCI_GNT#5 AE2 PCI_AD27
R8961 8.2K_0402_5%PCI_GNT#4 AD27 PCI_AD28
2 H28 PCIE_VSS_1 AD28 P4
R8971 8.2K_0402_5%PCI_GNT#3 PCI_AD29
R8981
2
2 8.2K_0402_5%PCI_GNT#2
F29
H29
PCIE_VSS_2 AD29 AF2
N1 PCI_AD30 S S% Deviation
PCIE_VSS_3 AD30 PCI_AD31
H26
F27
PCIE_VSS_4 AD31 AF1
V3
1 0.5%
PCIE_VSS_5 CBE0#/ROMA10 PCI_C/BE#0 20,21,23
R3821 2 8.2K_0402_5%PCI_REQ#6 G29 PCIE_VSS_6 CBE1#/ROMA1 AB4 PCI_C/BE#1 20,21,23 0 0.25%
R1621 2 8.2K_0402_5%PCI_GNT#6 L29 AC2 PCI_C/BE#2 20,21,23
PCIE_VSS_7 CBE2#/ROMWE# +3VS
J26 PCIE_VSS_8 CBE3# AE4 PCI_C/BE#3 20,21,23
PCI_FRAME#
PCI INTERFACE
L28 PCIE_VSS_9 FRAME# T3 PCI_FRAME# 20,21,23
J27 AC4 PCI_DEVSEL# PCI_DEVSEL# 20,21,23
+1.8VS PCIE_VSS_10 DEVSEL#/ROMA0 PCI _IRDY#
C288 N27 PCIE_VSS_11 IRDY# AC3 PCI_IRDY# 20,21,23
M26 T2 PCI_TRDY# PCI_TRDY# 20,21,23
PCIE_VSS_12 TRDY#/ROMOE# PCI_PAR
2 1 K27 PCIE_VSS_13 PAR/ROMA19 U4 PCI_PAR 20,21,23
PCI_STOP# PCI_PAR R136 1 2 8.2K_0402_5%
+
SB_32KH0 B1 X2
1 R103 2 Pull-high on CPU side AG25 LPC_AD0 RTC Battery
LAD0 LPC_AD0 29,30,33
20M_0603_5% AH25 LPC_AD1
LAD1 LPC_AD1 29,30,33
C29 AJ25 LPC_AD2
SB_32KH0 SB_32KHI
4
4
H_PWRGOOD
H_INTR A28
CPU_PG
INTR/LINT0
LAD2
LAD3 AH24 LPC_AD3
LPC_AD2 29,30,33
LPC_AD3 29,30,33 - BATT1 + +RTCBATT
12P_0402_50V8J
12P_0402_50V8J
4 H_CPUSLP# E4 SLP#/LDT_STP#
Y1 B30 AK27 SERIRQ
IN
OUT
CPU
1
R102 E28
4 H_FERR# FERR#
1 1 20M_0603_5% 1 R902 2 0_0402_5% SB_STPCLK# E29 Place JOPEN1 close D12
4 H_STPCLK# STPCLK#/ALLOW_LDTSTP
C286 C287 R336 2 RTC_CLK
NC
NC
2 2 BMREQ# +SB_VBAT
D28 A2 +SB_VBAT
2
LDT_RST# VBAT
A1
Consider
RTC
RTC_GND
32.768KHZ_12.5P_1TJS125DJ2A073 1 R87 2 1 R88 2
SB450 --connect C278 470_0805_5% 470_0805_5%
+CHGRTC
1U_0402_6.3V4Z
+3VALW 1 1
RTC_CLK to EC
1
H_STPCLK# W=20mils No short C274
+3VS +3VS +3VS 1 2 10K_0402_5% JOPEN1
1
C832
R899 @ JUMP_43X39 0.1U_0402_16V4Z
H_DPSLP# 2 2
1 2
2
2
8 BM_REQ# 1 2 SB_BMREQ#
5
2
1
D S
@
G 150K_0402_5% 2 15P_0402_50V8D
1
1
G
74LVC1G14GW_SOT353-5 2 1 330P_0402_50V7K S D
3
1
5
@ C833 CH751H-40_SC76 1 @
Security Classification Compal Secret Data Compal Electronics, Inc.
1
@ @ Q6
P
1 330P_0402_50V7K R_STPCLK# 2
1 2 2 A Y 4 Issued Date 2006/05/18 Deciphered Date 2007/05/18 Title
PCI_EXP/LPC/RTC
R901 10K_0402_5% @
G
PA_RS4X0F5 @ MMBT3904_SOT23
3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SB_STPCLK# 1 2 @ @ U49 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
3
For C4 support D29 CH751H-40_SC76 74LVC1G14GW_SOT353-5 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 15 of 48
5 4 3 2 1
5 4 3 2 1
+3VALW
U9B
Part 4 of 4 OSCLIN
R850 1 2 10K_0402_5% MASTER_RST# SB450 SB 48M_X1/USBCLK A15
B15 48M_OUT
R851 1 48M_X2
2 10K_0402_5% EC_THRM# 29 EC_THRM# EC_THRM# C6 TALERT#/TEMP_ALERT#/GPIO10 USB_RCOMP C15 USB_RCOMPR318 1 2 11.3K_0603_1%
R853 1 2 10K_0402_5% AC_RST# 29 EC_SWI# EC_SWI# C4 D16
EXTEVENT0# PCI_PME#/GEVENT4# USB_VREFOUT
D3 RI#/EXTEVNT0# USB_ATEST1 C16
R918 1 2 10K_0402_5% LPC_PME# 29 PM_SLP_S3# PM_SLP_S3# B4 D15
PM_SLP_S5# SLP_S3# USB_ATEST0 EC_SCI#
29 PM_SLP_S5# E3 SLP_S5# USB_OC0#/GPM0# B8 EC_SCI# 29
D PBTN_OUT# B3 C8 EC_FLASH# D
USB INTERFACE
EC_RSMRST# D1 A14
RSMRST# USB_HSDP5+
USB_HSDM5- B14
+3VS R97 1 +3VALW
CLK / RST
12 CLK_SB_14M 2 1 A23 14M_X1/OSC
0_0402_5% A13 USBP4+ USBP4+ 28
R90 USB_HSDP4+
1 2 10K_0402_5% SIO_SMI# C279 B23 14M_X2 USB_HSDM4- B13 USBP4-
USBP4- 28
@ 15P_0402_50V8D 10K_1206_8P4R_5%
2 USB_OC4# EC_SMI#
AK24 SIO_CLK USB_HSDP3+ A18 5 4
R98 1 2 1.5K_0402_5% SB_SMCLK B18 USB_OC2# 6 3
R325 1 USB_HSDM3-
2 1.5K_0402_5% SB_SMDATA
30 SB_INT_FLASH_SEL
SB_INT_FLASH_SEL B25 ROM_CS#/GPIO1
USB_OC6# EC_LID_OUT# 7 2
C25 A17 USBP2+ EC_SCI# 8 1
27 SIDERST# GHI#/GPIO6 USB_HSDP2+ USBP2+ 28
1 R326 2 GPIO5
12,17 CLK_OK C23 VGATE/GPIO7 USB_HSDM2- B17 USBP2-
USBP2- 28
10K_0402_5% AGP_STP# D24 RP5
GPIO5 GPIO4 USBP1+
D23 GPIO5 USB_HSDP1+ A21 USBP1+ 28
GPIO_M A27 B21 USBP1- USBP1- 28
SPKR FANOUT0/GPIO3 USB_HSDM1-
26 SPKR C24 SPKR/GPIO2
C SB_SMCLK A26 A20 USBP0+ C
10,11,12,24 SB_SMCLK SCL0/GPOC0# USB_HSDP0+ USBP0+ 24
SB_SMDATA B26 B20 USBP0-
10,11,12,24 SB_SMDATA SDA0/GPOC1# USB_HSDM0- USBP0- 24
R751 1 2 10K_0402_5% GPIO_M B27
GPIO
GPIO8 DDC1_SCL/GPIO9
C26 DDC1_SDA/GPIO8
GPIO11 C27 C21 +AVDD_USB
R758 2 GPIO8 GPIO12 DDC2_SCL/GPIO11 AVDDTX_0
1 D26 DDC2_SDA/GPIO12 AVDDTX_1 C18
10K_0402_5% D13
AVDDTX_2
AVDDTX_3 D10
1 R337 2 AGP_STP#
AVDDRX_0 D20
10K_0402_5% D17
10P_0402_50V8K AVDDRX_1
AVDDRX_2 C14
C981 1 2 C11
R858 10K_0402_5% AC_BITCLK @ AVDDRX_3 40mil
1 2
R859 1 2 10K_0402_5% AC_SDIN1 25 AZ_BITCLK_HD R714 1 2 33_0402_5% A16 +AVDDC L18 FBM-10-201209-260-T_0805
R860 10K_0402_5% AC_SDIN2 AVDDC +AVDD_USB
1 2 1 2 +3VALW
R861 1 2 10K_0402_5% AZ_SDIN1_MD 25 AZ_SDOUT_HD R715 1 2 33_0402_5% B16
R716 1 AVSSC
27 AZ_SYNC_MD 2 33_0402_5% MDC@ C268 1 2 10U_0805_10V4Z
AVSS_USB_1 A9
R7931 2 10K_0402_5% GPIO12 27 AZ_BITCLK_MD R717 1 2 33_0402_5% MDC@ AZ_BITCLK J2 A12 C281 1 2 1U_0402_6.3V4Z
R7941 10K_0402_5% GPIO46 R718 1 AZ_BITCLK AVSS_USB_2
2 27 AZ_SDOUT_MD 2 33_0402_5% MDC@ AZ_SDOUT J3 AZ_SDOUT AVSS_USB_3 A19
R7951 10K_0402_5% GPIO11 AZ_SDIN3_HD C512 1 2 0.1U_0402_16V4Z
AZALIA
2 25 AZ_SDIN3_HD D5 BLINK/AZ_SDIN3/GPM6# AVSS_USB_4 A22
R7961 2 10K_0402_5% GPIO40 25 AZ_SYNC_HD R719 1 2 33_0402_5% A Z_SYNC K2 B9 C513 1 2 0.1U_0402_16V4Z
R720 1 AZ_SYNC AVSS_USB_5
25 AZ_RST_HD# 2 33_0402_5% AZ_RST A6 USB_OC5#/AZ_RST#/GPM5# AVSS_USB_6 B12 C514 1 2 0.1U_0402_16V4Z
27 AZ_RST_MD# R871 1 2 33_0402_5% MDC@ GPIO46 K3 B19
48M_AZ/GPIO46 AVSS_USB_7
USB PWR
B22 C270 1 2 10U_0805_10V4Z
AVSS_USB_8
AVSS_USB_9 C9
C10 C283 1 2 1U_0402_6.3V4Z
AVSS_USB_10
AVSS_USB_11 C12
C13 C521 1 2 0.1U_0402_16V4Z
B AC_BITCLK AVSS_USB_12 C510 1 B
G1 AC_BITCLK/GPIO38 AVSS_USB_13 C17 2 0.1U_0402_16V4Z
AC_SDOUT G2 C19 C511 1 2 0.1U_0402_16V4Z
19 AC_SDOUT AC_SDOUT/GPIO39 AVSS_USB_14
AZ_SDIN1_MD H4 C20
27 AZ_SDIN1_MD AC_SDIN1 ACZ_SDIN0/GPIO42 AVSS_USB_15
G3 ACZ_SDIN1/GPIO43 AVSS_USB_16 C22
A C97
+3VALW AC_SDIN2 G4 D9
GPIO40 ACZ_SDIN2/GPIO44 AVSS_USB_17
H1 AC_SYNC/GPIO40 AVSS_USB_18 D11
AC_RST# H3 D12
SPDIF_OUT AC_RST#/GPIO45 AVSS_USB_19 L21 KC FBM-L11-201209-221LMAT_0805
19 SPDIF_OUT H2 SPDIF_OUT/GPIO41 AVSS_USB_20 D14
D18 +AVDDC 1 2 +3VALW
R760 2 MAINPWON_R AVSS_USB_21
1 2 1 MAINPWON 4,35,36,38 AVSS_USB_22 D19
10K_0402_5% D11 CH751H-40_SC76 D21 C277 1 2 10U_0805_10V4Z
AVSS_USB_23
AVSS_USB_24 D22
C276 1 2 1U_0402_6.3V4Z
EC_RSMRST#
29 EC_RSMRST#
1
+3VALW
R137
Control by EC 47K_0402_5%
2
1
A A
1
L46
R74
FBMA-L11-160808-121LMT 10K_0402_5%
X1 48MHZ_4P_FN4800002
2
SB450 USB/ACPI/AC97/GPIO
C267
0.1U_0402_10V6K C975
2 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
12P_0402_50V8J AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
1 CustomIAYAA (LA-3391P) 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 16 of 48
5 4 3 2 1
5 4 3 2 1
JP32
Place closely JP32 SATA CONN. U9C
+5VS 1
GND SATA_TX0+_C C726 1
A+ 2 2 0.01U_0402_25V4Z SATA_TX0+ AK22 SATA_TX0+ SB450 SB
0.1U_0402_16V4Z 3 SATA_TX0-_C C727 1 2 0.01U_0402_25V4Z SATA_TX0- AJ22 AD30
A- SATA_TX0- PIDE_IORDY
GND 4 Part 2 of 4 PIDE_IRQ AE28
1 1 1 1 1 5 SATA_RX0-_C C728 1 2 0.01U_0402_25V4Z SATA_RX0- AK21 AD27
C812 C729 C730 C731 C732 B- SATA_RX0+_C C733 1 SATA_RX0- PIDE_A0
B+ 6 2 0.01U_0402_25V4Z SATA_RX0+ AJ21 SATA_RX0+ PIDE_A1 AC27
GND 7 PIDE_A2 AD28
10U_0805_10V4Z 10U_0805_10V4Z SATA_TX1+_C C884 1 22H@ 0.01U_0402_25V4Z SATA_TX1+ AK19 AD29 IDE_PDDACK#
2 2 2 2 2 SATA_TX1+ PIDE_DACK# IDE_PDDACK# 19
SATA_TX1-_C C885 1 22H@ 0.01U_0402_25V4Z SATA_TX1- AJ19 AE27
SATA_TX1- PIDE_DRQ
V33 8 +3VS PIDE_IOR# AE30
0.1U_0402_16V4Z 0.1U_0402_16V4Z 9 SATA_RX1-_C C886 1 22H@ 0.01U_0402_25V4Z SATA_RX1- AK18 AE29
V33 SATA_RX1+_C C887 1 SATA_RX1- PIDE_IOW#
V33 10 22H@ 0.01U_0402_25V4Z SATA_RX1+ AJ18 SATA_RX1+ PIDE_CS1# AC28
GND 11 PIDE_CS3# AC29
+3VS 12 AK14
GND SATA_TX2+
D
GND 13 AJ14 SATA_TX2- PIDE_D0 AF29 D
@ 10U_0805_10V4Z @ 0.1U_0402_16V4Z 14
Place SATA CAP & RES very close to SB AF27
SERIAL ATA
GND PIDE_D4
Reserved 18 AK11 SATA_TX3+ PIDE_D5 AK29
19 C734 2 1 @ 0.01U_0402_16V7K AJ11 AK28
2 2 2 2 GND SATA_TX3- PIDE_D6
V12 20 PIDE_D7 AH27
21 R721 2 1 1K_0402_1% AK10 AG27
@ 0.1U_0402_16V4Z @ 0.1U_0402_16V4Z V12 SATA_RX3- PIDE_D8
V12 22 AJ10 SATA_RX3+ PIDE_D9 AJ28
PIDE_D10 AJ29
AJ15 SATA_CAL PIDE_D11 AH29
SUYIN_127072FR022G210ZR_RV AG28
SATA_X1 PIDE_D12
AJ16 SATA_X1 PIDE_D13 AG30
+5VS
Place closely JP38 SATA CONN. SATA_X2 PIDE_D14 AF30
+3VS 1 R722 2 AK16 SATA_X2 PIDE_D15 AF28
10K_0402_5%
0.1U_0402_16V4Z PHDD_LED# AK8 V29 IDE_ SDIORDY
SATA HDD CONNECTOR 29 PHDD_LED# SATA_ACT# SIDE_IORDY
SIDE_IRQ T27 INT_IRQ15
IDE_SDA0
IDE_SDIORDY 27
INT_IRQ15 27
1 1 1 1 1 +PLLVDD_SATA AH15 PLLVDD_SATA SIDE_A0 T28 IDE_SDA0 27
C879 C880 C881 C882 C883 U29 IDE_SDA1
SIDE_A1 IDE_SDA1 27
+XTLVDD_SATA AH16 T29 IDE_SDA2
XTLVDD_SATA SIDE_A2 IDE_SDA2 27
10U_0805_10V4Z 10U_0805_10V4Z JP38 SATA Accessed Port V30 IDE_SDDACK#
2 2 2 2 2 SIDE_DACK# IDE_SDDACK# 27
AG10 U28 IDE_SDDREQ
AVDD_SATA_1 SIDE_DRQ IDE_SDDREQ 27
1 Primary Master Port 0 AG14 W29 IDE_SDIOR#
GND AVDD_SATA_2 SIDE_IOR# IDE_SDIOR# 27
0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 SATA_TX1+_C AH12 W30 IDE_SDIOW#
A+ AVDD_SATA_3 SIDE_IOW# IDE_SDIOW# 27
3 SATA_TX1-_C Primary Slave Port 2 AG12 R27 IDE_SDCS1#
A- AVDD_SATA_4 SIDE_CS1# IDE_SDCS1# 27
4 +1.8_SATA AG18 R28 IDE_SDCS3#
GND AVDD_SATA_5 SIDE_CS3# IDE_SDCS3# 27
5 SATA_RX1-_C Secondary Master Port 1 AG21
+3VS B- SATA_RX1+_C AVDD_SATA_6 IDE_SDD0
B+ 6 AH18 AVDD_SATA_7 SIDE_D0/GPIO15 V28 IDE_SDD[0..15] 27
7 Secondary Slave Port 3 AG20 W28 IDE_SDD1
GND AVDD_SATA_8 SIDE_D1/GPIO16 IDE_SDD2
SIDE_D2/GPIO17 Y30
1 1 AG9 AA30 IDE_SDD3
C969 C970 AVSS_SATA_1 SIDE_D3/GPIO18 IDE_SDD4
AF10 AVSS_SATA_2 SIDE_D4/GPIO19 Y28
IDE_SDD5
SATA_X1
SATA_X2
VCC5 16 +5VS AF19 AVSS_SATA_11 SIDE_D13/GPIO28 Y29
17 AF20 V27 IDE_SDD14
L38 1U_0402_6.3V4Z GND AVSS_SATA_12 SIDE_D14/GPIO29 IDE_SDD15
RESERVED 18 AF21 AVSS_SATA_13 SIDE_D15/GPIO30 U27
2 1 19 R723 AF22
CHB1608U301_0603 GND AVSS_SATA_14
1 1 1 VCC12 20 2 1 AH9 AVSS_SATA_15
C740 C741 21 10M_0402_5% AG11 AG13
C739 VCC12 AVSS_SATA_16 AVSS_SATA_33
VCC12 22 AG15 AVSS_SATA_17 AVSS_SATA_34 AH22
0.1U_0402_16V4Z 10U_0805_10V4Z Y4 AG17 AK12
2 2 2 AVSS_SATA_18 AVSS_SATA_35
1 2 AG19 AVSS_SATA_19 AVSS_SATA_36 AH11
SUYIN_127043FB022G208ZR_22P_RV 2 1 AG22 AJ17
2H@ AVSS_SATA_20 AVSS_SATA_37
AG23 AVSS_SATA_21 AVSS_SATA_38 AH14
C745 25MHZ_20P C746 AF9 AH19
27P_0402_50V8J AVSS_SATA_22 AVSS_SATA_39
27P_0402_50V8J AH17 AVSS_SATA_23 AVSS_SATA_40 AJ20
+1.8VS +XTLVDD_SATA 1 2 AH23 AH21
L39 1U_0402_6.3V4Z
SATA HDD CONNECTOR AH13
AVSS_SATA_24
AVSS_SATA_25
AVSS_SATA_41
AVSS_SATA_42 AJ9
AH20 AVSS_SATA_26 AVSS_SATA_43 AG16
2 1 AK9 AVSS_SATA_27 AVSS_SATA_44 AK15
CHB1608U301_0603 1 1 1 AJ12 AK20
C743 C744 AVSS_SATA_28 AVSS_SATA_45
AK17 AVSS_SATA_29
C742 AK23
0.1U_0402_16V4Z 10U_0805_10V4Z AVSS_SATA_30
AH10 AVSS_SATA_31
2 2 2
AJ23 AVSS_SATA_32
SB450
+1.8VS
B +1.8_SATA B
L40 0.1U_0402_16V4Z 1U_0402_6.3V4Z
2 1
CHB1608U301_0603 1 1 1 1 1 1 1
C747 C748 C749 C750 C751 C752 C753
0.1U_0402_16V4Z 22U_0805_6.3V6M
2 2 2 2 2 2 2
D38
1
14
14
14
14
14
2
R130 R111
P
P
1 I O 2 3 I O 4 1 2 5 I O 6 9 I O 8 1 2 11 I O 10 13 I O 12 SB_PWRGD 16
41 VGATE 330K_0402_5% 330K_0402_5%
G
G
U7A U7B 1 U7C U7D 1 U7E U7F
D39
1
C308 C293
7
7
R128 1 2
0.1U_0402_10V6K 0.47U_0603_10V7K
1M_0402_5% 2 2
SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14 1N4148_SOT23 SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14
2
NB_PWRGD 8 SB_PWRGD# 8
A CLK_OK 12,16 A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SB450 IDE/SATA
Size Document Number Re v
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
CustomIAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 17 of 48
5 4 3 2 1
+3VS
U9D
C660 1 2 10U_0805_10V4Z
C585 1 2 10U_0805_10V4Z
A30
D30
VDDQ_1 SB450 SB VSS_12 E19
E22
C652 1 VDDQ_2 VSS_13
2 10U_0805_10V4Z E24 VDDQ_3 Part 3 of 4 VSS_14 E23
E25 VDDQ_4 VSS_15 E26
C520 1 2 0.1U_0402_16V4Z J5 E30
C543 0.1U_0402_16V4Z VDDQ_5 VSS_16
1 2 K1 VDDQ_6 VSS_17 F1
C522 1 2 0.1U_0402_16V4Z K5 F4
C542 0.1U_0402_16V4Z VDDQ_7 VSS_18
1 2 N5 VDDQ_8 VSS_19 G5
C564 1 2 0.1U_0402_16V4Z P5 H5
C579 0.1U_0402_16V4Z VDDQ_9 VSS_20
1 2 R1 VDDQ_10 VSS_21 J1
C584 1 2 0.1U_0402_16V4Z U5 J4
C568 0.1U_0402_16V4Z VDDQ_11 VSS_22
1 2 U26 VDDQ_12 VSS_23 K4
C576 1 2 0.1U_0402_16V4Z U30 L5
C565 0.1U_0402_16V4Z VDDQ_13 VSS_24
1 2 V5 VDDQ_14 VSS_25 M5
C586 1 2 0.1U_0402_16V4Z V26 P1
C581 0.1U_0402_16V4Z VDDQ_15 VSS_26
1 2 Y1 VDDQ_16 VSS_27 R5
C594 1 2 0.1U_0402_16V4Z Y26 R26
C519 0.1U_0402_16V4Z VDDQ_17 VSS_28
1 2 AA5 VDDQ_18 VSS_29 T5
C598 1 2 0.1U_0402_16V4Z AA26 T26
C596 0.1U_0402_16V4Z VDDQ_19 VSS_30
1 2 AB5 VDDQ_20 VSS_31 T30
C597 1 2 0.1U_0402_16V4Z AC30 W1
VDDQ_21 VSS_32
AD5 VDDQ_22 VSS_33 W5
AD26 VDDQ_23 VSS_34 W26
AE1 VDDQ_24 VSS_35 Y5
+1.8VS AE5 AB26
VDDQ_25 VSS_36
AE26 VDDQ_26 VSS_37 AB30
AF6 VDDQ_27 VSS_38 AC5
AF7 VDDQ_28 VSS_39 AC26
AF24 VDDQ_29 VSS_40 AD1
AF25 VDDQ_30 VSS_41 AF5
C566 1 2 10U_0805_10V4Z AK1 AF8
C553 1 VDDQ_31 VSS_42
2 10U_0805_10V4Z AK4 VDDQ_32 VSS_43 AF23
AK26 VDDQ_33 VSS_44 AF26
AK30 VDDQ_34 VSS_45 AG8
C656 1 2 1U_0402_6.3V4Z 220mA AJ1
C570 0.1U_0402_16V4Z VSS_46
1 2 M12 AJ24
POWER
C569 0.1U_0402_16V4Z VDD_1 VSS_47
1 2 M13 VDD_2 VSS_48 AJ30
C547 1 2 0.1U_0402_16V4Z M18 AK5
C571 0.1U_0402_16V4Z VDD_3 VSS_49
1 2 M19 VDD_4 VSS_50 AK25
C556 1 2 0.1U_0402_16V4Z N12 M14
C554 0.1U_0402_16V4Z VDD_5 VSS_51
1 2 N13 VDD_6 VSS_52 M15
C572 1 2 0.1U_0402_16V4Z N18 M16
C578 0.1U_0402_16V4Z VDD_7 VSS_53
1 2 N19 VDD_8 VSS_54 M17
C557 1 2 0.1U_0402_16V4Z V12 N14
C577 0.1U_0402_16V4Z VDD_9 VSS_55
1 2 V13 VDD_10 VSS_56 N15
C555 1 2 0.1U_0402_16V4Z V18 N16
C546 0.1U_0402_16V4Z VDD_11 VSS_57
1 2 V19 VDD_12 VSS_58 N17
W12 VDD_13 VSS_59 P12
+3VALW W13 P13
VDD_14 VSS_60
W18 VDD_15 VSS_61 P14
C266 1 2 10U_0805_10V4Z W19 P15
C275 10U_0805_10V4Z VDD_16 VSS_62
1 2 VSS_63 P16
C508 1 2 0.1U_0402_16V4Z A3 P17
C507 0.1U_0402_16V4Z S5_3.3V_1 VSS_64
1 2 A7 S5_3.3V_2 VSS_65 P18
C523 1 2 0.1U_0402_16V4Z E6 P19
C525 0.1U_0402_16V4Z S5_3.3V_3 VSS_66
1 2 E7 S5_3.3V_4 VSS_67 R12
C535 1 2 0.1U_0402_16V4Z E1 R13
S5_3.3V_5 VSS_68
F5 S5_3.3V_6 VSS_69 R14
+1.8VALW R15
C651 10U_0805_10V4Z VSS_70
1 2 E9 S5_1.8V_1 VSS_71 R16
C657 1 2 10U_0805_10V4Z E10 R17
C526 0.1U_0402_16V4Z S5_1.8V_2 VSS_72
1 2 E20 S5_1.8V_3 VSS_73 R18
C530 1 2 0.1U_0402_16V4Z E21 R19
C524 0.1U_0402_16V4Z S5_1.8V_4 VSS_74
1 2 VSS_75 T12
E13 USB_PHY_1.8V_1 VSS_76 T13
C534 1 2 0.1U_0402_16V4Z E14 T14
C532 0.1U_0402_16V4Z 0.1U_0402_16V4Z USB_PHY_1.8V_2 VSS_77
1 2 E16 USB_PHY_1.8V_3 VSS_78 T15
C540 1 2 0.1U_0402_16V4Z C516 1 2 E17 T16
C533 0.1U_0402_16V4Z USB_PHY_1.8V_4 VSS_79
1 2 VSS_80 T17
+1.05VS C30 CPU_PWR VSS_81 T18
VSS_82 T19
AG6 V5_VREF VSS_83 U12
VSS_84 U13
D14 +AVDD_CK A24 U14
+V5_VREF AVDDCK VSS_85
+3VS 2 1 B24 AVSSCK VSS_86 U15
VSS_87 U16
CH751H-40_SC76 A4 U17
VSS_1 VSS_88
A8 VSS_2 VSS_89 U18
+1.8VS A29 U19
R154 2 VSS_3 VSS_90
+5VS 1 B28 VSS_4 VSS_91 V14
1K_0402_5% C1 V15
VSS_5 VSS_92
2 2 E5 VSS_6 VSS_93 V16
1
C280 1 2 0.1U_0402_16V4Z
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SB450/POWER/GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 18 of 48
5 4 3 2 1
+3VALW +3VS +3VALW +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS
1
R315 R355 R345 R351 R122 R367
10K_0402_5% R329 R309 R321 R341 R724 R335
@ 10K_0402_5% 10K_0402_5% @ 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% @ 10K_0402_5% 10K_0402_5% @ 10K_0402_5% 10K_0402_5%
@ @ 10K_0402_5%
2
15 AUTO_ON#
16 AC_SDOUT
15 RTC_CLK
D 16 SPDIF_OUT D
15 PCI_CLK3_R
PCI_CLK2_R
15 PCI_CLK4_R 15 PCI_CLK2_R
15 PCI_CLK5_R
15 PCI_CLK6_R
15
15
PCI_CLK7_R
PCI_CLK8_R
Selects type of 48MHz
15,29,30,33 LPC_FRAME#
clock pad
1
R334
R328 R320 R342 R356 R346 R350 R123 R366 R725
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% @ 10K_0402_5% 10K_0402_5% 10K_0402_5%
@ @ @ 10K_0402_5%
2
ACPWRON
AUTO_ON# AC97_SDOUT RTC_CLK SPDIF_OUT CLK_PCI3 CLK_PCI_LAN CLK_PCI_LPC PCI_CLK6 PCI_CLK7 PCI_CLK8 PCI_CLK2_R LFRAME#
PULL MANUAL USE INTERNAL USB PHY PCIE CM_SET ROM TYPE THERMTIP#
HIGH PWR ON DEBUG RTC SIO 24MHz PWRDOWN low Crytsal Pad ENABLE
Internal PLL CPU I/F = K8 H,H = PCI ROM
STRAPS DISABLE
C
REQUIRED STRAPS DE FAULT DE FAULT DE FAULT
H,L = LPC ROM I
C
PULL AUTO IGNORE EXTERNAL USB PHY External CPU I/F = P4 Clock input buffer THERMTIP#
LOW PWR DEBUG RTC (NOT SIO 48MHZ PWRDOWN Clock PCIE CM_SET L,H = LPC ROM II DISENABLE
ON STRAPS SUPPORTED ENABLE DE FAULT
HIGH DE FAULT DE FAULT
DE FAULT W/ IT8712 ) DE FAULT DE FAULT L,L = FWH ROM
1
R132
R142 R149 R127 R146 R373 R141 R369 R381
10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5%
2
2
17 IDE_PDDACK#
15,20,21,23 PCI_AD31
15,20,21,23 PCI_AD30
15,20,21,23 PCI_AD29
15,20,21,23 PCI_AD28
15,20,21,23 PCI_AD27
15,20,21,23 PCI_AD26
B 15,20,21,23 PCI_AD25 B
15,20,21,23 PCI_AD24
1
1
Pop R634 when debug . R143 R148 R126 R147 R374 R140
@ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% 10K_0402_5%
R370
10K_0402_5%
R380
10K_0402_5%
R131
10K_0402_5%
2
2
DEBUG STRAPS
IDE_PDDACK# PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HARDWARE TRAP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS CustomIAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 19 of 48
5 4 3 2 1
A B C D E F G H
PCI_AD[0..31] JP12
15,19,21,23 PCI_AD[0..31]
R215 2 1 3.6K_0402_5% +3VALW 12
+3VALW Amber LED+
10mil
ACTIVITY# 1 2 11
U20 U4 R200 300_0402_5% Amber LED- 16
PCI_AD0 EEDO SHLD2
104 AD0 EEDO 108 4 DO GND 5 2 8 PR4-
PCI_AD1 103 109 EEDI 3 6 15
PCI_AD2 AD1 AUX/EEDI EESK DI NC SHLD1
102 AD2 EESK 111 2 SK NC 7 7 PR4+
PCI_AD3 98 106 EECS 1 8
AD3 EECS CS VCC +3VALW
PCI_AD4 97 C17 1 RJ45_RX- 6
PCI_AD5 AD4 ACTIVITY# AT93C46-10SI-2.7_SO8 0.1U_0402_16V4Z PR2-
96 AD5 LED0 117
PCI_AD6 95 115 LINK_10_100# 5
PCI_AD7 AD6 LED1 PR3-
1 93 AD7 LED2 114 1
PCI_AD8 90 113 4
PCI_AD9 AD8 NC/LED3 PR3+
89 AD9
PCI_AD10 87 1 LAN_TD+ RJ45_RX+ 3
PCI_AD11 AD10 TXD+/MDI0+ LAN_TD- PR2+
86 AD11 TXD-/MDI0- 2
PCI_AD12 85 5 LAN_RD+ RJ45_TX- 2
PCI_AD13 AD12 RXIN+/MDI1+ LAN_RD- PR1-
83 AD13 RXIN-/MDI1- 6 SHLD2 14
PCI_AD14 82 RJ45_TX+ 1
PCI_AD15 AD14 PR1+
79 AD15 NC/MDI2+ 14 SHLD1 13
PCI_AD16 59 15 LINK_10_100# 1 R203 2 10
PCI_AD17 AD16 NC/MDI2- 300_0402_5% Green LED-
58 AD17 NC/MDI3+ 18
PCI_AD18 57 19 9
AD18 NC/MDI3- +3VALW Green LED+
PCI_AD19 55
PCI_AD20 AD19 LAN_X1 TYCO_3-440470-4
53 AD20 X1 121 10mil
PCI_AD21 50 122 LAN_X2
AD21 X2
1
PCI_AD22 49 2 1 +3VS
AD22
PCI I/F
PCI_AD23 47 105 R233 1K_0402_5% R231 R201 R202
PCI_AD24 AD23 LWAKE
43 AD24 ISOLATE# 23 10mil 2 1 15K_0402_5%
PCI_AD25 42 127 2 1 5.6K_0603_1% 75_0402_5% 75_0402_5%
PCI_AD26 AD25 RTSET
40 72 10mil
2
PCI_AD27 AD26 NC/SMBCLK R221 C391
39 AD27 NC/SMBDATA 74
PCI_AD28 37 RJ45_PR 1 2 0.1U_0402_16V4Z LANGND
PCI_AD29 AD28
36 AD29 NC/M66EN 88 1 1
PCI_AD30 34 1000P_1206_2KV7K
PCI_AD31 AD30 C1 C2
33 AD31 NC/AVDDH 10
120 +3VALW Termination plane should be coupled to chassis ground 4.7U_0805_10V4Z
PCI_C/BE#0 NC/HV 2 2
15,21,23 PCI_C/BE#0 92 C/BE#0
15,21,23 PCI_C/BE#1 PCI_C/BE#1 77 11
PCI_C/BE#2 C/BE#1 NC/HSDAC+
15,21,23 PCI_C/BE#2 60 C/BE#2 GND 123
3
2 PCI_C/BE#3 44 124 E 2
15,21,23 PCI_C/BE#3 C/BE#3 GND
126 +LAN_DVDD CTRL25 2 Q8
PCI_AD22 NC/LV2 B 2SB1197K_SOT23
1 2 46 IDSEL
R238 100_0402_5% C 40mil
1
LAN I/F
15,21,23 PCI_PAR 76 PAR +2.5V_LAN
15,21,23 PCI_FRAME# 61 FRAME# NC/VSS 9 1 1 2
15,21,23 PCI_IRDY# 63 13 C976
IRDY# NC/VSS C34 C35 0.1U_0402_16V4Z
15,21,23 PCI_TRDY# 67 TRDY#
68 10U_0805_10V4Z 0.1U_0402_16V4Z @
15,21,23 PCI_DEVSEL# DEVSEL# 2 2 1
15,21,23 PCI_STOP# 69 STOP# NC/GND 22
NC/GND 48
2
70 62 R913 R914 Layout Note
15,21,23 PCI_PERR# PERR# NC/GND 49.9_0402_1%
75 73 49.9_0402_1% TS6121 pls close to
15,21 PCI_SERR# SERR# NC/GND
112 @ @
NC/GND conn.
15 PCI_REQ#1 30 REQ# NC/GND 118
15 PCI_GNT#1 29
1
GNT# U18
PCI_PIRQG# 25
15 PCI_PIRQG# INTA#
8 CTRL25 Y2 LAN_TD+ 1 16 RJ45_TX+
CTRL25 LAN_TD- TD+ TX+ RJ45_TX-
29 EC_PME# 31 PME# 3 TD- TX- 14
125 2 1 LAN_X2 2 15
RTT3/CRTL18 CT CT
15,21,23,24,27,29,30,33 PCIRST# 27 RST# LAN_X1 4 NC NC 13
VDD33 26 +3VALW 1 2 5 NC NC 12
28 41 25MHZ_20P 7 10
15 CLK_PCI_LAN CLK VDD33 CT CT
65 56 C416 C415 LAN_RD+ 6 11 RJ45_RX+
15,21,29 PM_CLKRUN# CLKRUN# VDD33 RD+ RX+
1
71 27P_0402_50V8J 27P_0402_50V8J LAN_RD- 8 9 RJ45_RX-
VDD33 2 1 R210 R211 RD- RX-
VDD33 84
1
94 49.9_0402_1% 49.9_0402_1%
VDD33
1
107 R212 R213 0.5u_TS6121C
VDD33
1
3 49.9_0402_1% 3
4
2
GND/VSS 49.9_0402_1% R5
17 GND/VSS
1 128 L32 1 75_0402_5% R6
2
GND/VSS +LAN_AVDDL C14 75_0402_5%
3 1 2 +3VALW
2
C433 AVDD33/AVDDL KC FBM-L11-201209-221LMAT_0805
7 40mil 1 1 1 1 1
2
18P_0402_50V8J AVDD33/AVDDL C428 C425 C423 C412 C413 0.1U_0402_16V4Z
21 GND/VSSPST AVDD33/AVDDL 20
2 0.1U_0402_16V4Z 2
38 GND/VSSPST NC/AVDDL 16
51 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z RJ45_PR
GND/VSSPST 2 2 2 2 2
66 GND/VSSPST
81 GND/VSSPST VDD25/VDD18 32
91 GND/VSSPST VDD25/VDD18 54
101 78 L31 Closed to RTL8100CL Closed to Transformer
GND/VSSPST VDD25/VDD18 +LAN_DVDD
119 GND/VSSPST VDD25/VDD18 99 1 2 +2.5V_LAN
40mil 2 2 2 KC FBM-L11-201209-221LMAT_0805
C421 C431 C440
Power
35 GND NC/VDD18 24
52 45 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z +3VALW
GND NC/VDD18 1 1 1
80 GND NC/VDD18 64
100 110 0.1U_0402_16V4Z 0.1U_0402_16V4Z
GND NC/VDD18
NC/VDD18 116 1 1 1 1 1 1
L9 C419 C426 C442 C424 C441 C434
12 +2.5V_LAN_VDD 2 1 0.1U_0402_16V4Z
AVDD25/HSDAC- +2.5V_LAN 2 2 2 2 2 2
20mil 1 1 CHB2012U170_0805
RTL8100CL_LQFP128 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
C39 C38
0.1U_0402_16V4Z 2 2 0.1U_0402_16V4Z
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RTL8100CL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 20 of 48
A B C D E F G H
5 4 3 2 1
M13
M12
G13
N13
N12
D12
H11
G1
C8
N4
A7
B4
K2
F3
L9
L6
U29 C345 C355 C348 C354
S1_A[0..25] 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
VCCD1#
VCCD0#
VPPD1
VPPD0
VCCA2
VCCA1
VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1
S1_A[0..25] 22 2 2 2 1
S1_D[0..15]
PCI_AD[0..31] S1_D[0..15] 22
15,19,20,23 PCI_AD[0..31]
PCI_AD31 C2 B2 S1_D10 +3VS
PCI_AD30 AD31 CAD31/D10 S1_D9
D C1 AD30 CAD30/D9 C3 D
PCI_AD29 D4 B3 S1_D1
PCI_AD28 AD29 CAD29/D1 S1_D8
D2 AD28 CAD28/D8 A3 1 1 1 1
PCI_AD27 D1 C4 S1_D0
PCI_AD26 AD27 CAD27/D0 S1_A0 C343 C347 C359 C358
E4 AD26 CAD26/A0 A6
PCI_AD25 E3 D7 S1_A1 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
PCI_AD24 AD25 CAD25/A1 S1_A2 2 2 2 2
E2 AD24 CAD24/A2 C7
PCI_AD23 F2 A8 S1_A3
PCI_AD22 AD23 CAD23/A3 S1_A4
F1 AD22 CAD22/A4 D8
PCI_AD21 G2 A9 S1_A5
PCI_AD20 AD21 CAD21/A5 S1_A6
G3 AD20 CAD20/A6 C9
PCI_AD19 H3 A10 S1_A25
PCI_AD18 AD19 CAD19/A25 S1_A7 +S1_VCC
H4 AD18 CAD18/A7 B10
PCI_AD17 J1 D10 S1_A24
PCI_AD16 AD17 CAD17/A24 S1_A17
J2 AD16 CAD16/A17 E12
PCI_AD15 N2 F10 S1_IOWR# 1 1 1 1
AD15 CAD15/IOWR# S1_IOWR# 22
PCI_AD14 M3 E13 S1_A9
PCI_AD13 AD14 CAD14/A9 S1_IORD# C351 C334 C340 C349
N3 AD13 CAD13/IORD# F13 S1_IORD# 22
CLK_PCI_CB PCI_AD12 K4 F11 S1_A11 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
PCI_AD11 AD12 CAD12/A11 S1_OE# 2 2 2 2
M4 AD11 CAD11/OE# G10 S1_OE# 22
1
PCI Interface
18P_0402_50V8J PCI_AD2 L7 K10 S1_D11
C 2 PCI_AD1 AD2 CAD2/D11 S1_D4 C
K7 K12
CARDBUS
AD1 CAD1/D4 1 1
PCI_AD0 N8 L13 S1_D3 C336 C357
AD0 CAD0/D3
E1 B7 S1_REG# 10P_0402_50V8J 10P_0402_50V8J
15,20,23 PCI_C/BE#3 CBE3# CCBE3#/REG# S1_REG# 22 2 2
J3 A11 S1_A12
15,20,23 PCI_C/BE#2 CBE2# CCBE2#/A12
N1 E11 S1_A8
15,20,23 PCI_C/BE#1 CBE1# CCBE1#/A8
N5 H13 S1_CE1#
15,20,23 PCI_C/BE#0 CBE0# CCBE0#/CE1# S1_CE1# 22
Closed to Pin L12 Closed to Pin A4
PCIRST# G4 B9 S1_RST
15,20,23,24,27,29,30,33 PCIRST# PCIRST# CRST#/RESET S1_RST 22
J4 B11 S1_A23
15,20,23 PCI_FRAME# FRAME# CFRAME#/A23
K1 A12 S1_A15
15,20,23 PCI_IRDY# IRDY# CIRDY#/A15
K3 A13 S1_A22 Close chip termenal
15,20,23 PCI_TRDY# TRDY# CTRDY#/A22
L1 B13 S1_A21
15,20,23 PCI_DEVSEL# DEVSEL# CDEVSEL#/A21
L2 C12 S1_A20
15,20,23 PCI_STOP# STOP# CSTOP#/A20
L3 C13 S1_A14
15,20,23 PCI_PERR# PERR# CPERR#/A14
M1 A5 S1_WAIT#
15,20 PCI_SERR# SERR# CSERR#/WAIT# S1_WAIT# 22
M2 D13 S1_A13
15,20,23 PCI_PAR PAR CPAR/A13 +S1_VCC
A1 B8 S1_INPACK#
15 PCI_REQ#2 PCIREQ# CREQ#/INPACK# S1_INPACK# 22
B1 C11 S1_WE#
15 PCI_GNT#2 PCIGNT# CGNT#/WE# S1_WE# 22
CLK_PCI_CB H1 B12 A16_CLK 1 2 S1_A16
15 CLK_PCI_CB PCICLK CCLK/A16 R160 33_0402_5%
1
L8 C5 S1_BVD1
RIOUT#_PME# CSTSCHG/BVD1_STSCHG# S1_BVD1 22
+3VS 1 23V_PCM_SUSP L11 SUSPEND# CCLKRUN#/WP_IOIS16# D5 S1_WP
S1_WP 22
R180
IDSEL: R159 10K_0402_5% @ 43K_0402_5%
PCI_AD20
1 2 PCM_ID F4 D11 S1_A19
PCI_AD20 R406 100_0402_5% IDSEL CBLOCK#/A19
2
PCI_PIRQB# K8 D6 S1_RDY#
15 PCI_PIRQB# MFUNC0 CINT#/READY_IREQ# S1_RDY# 22
N9 S1_WP
@ 10K_0402_5% MFUNC1
1 2 R174 K9 MFUNC2 SPKROUT M9 PCM_SPK#
PCM_SPK# 26
B S1_BVD2 B
15,29,30,33 SERIRQ N10 MFUNC3 CAUDIO/BVD2_SPKR# B5 S1_BVD2 22
@ 10K_0402_5% 1 2 R171 L10
@ 10K_0402_5% MFUNC4
1 2 R168 N11 MFUNC5 CCD2#/CD2# A4 S1_CD2#
S1_CD2# 22
1 2 M11 L12 S1_CD1#
15,20,29 PM_CLKRUN# MFUNC6 CCD1#/CD1# S1_CD1# 22
R161 0_0402_5% J9 D9 S1_VS2
MFUNC7 CVS2/VS2# S1_VS2 22
C6 S1_VS1
CVS1/VS1 S1_VS1 22
A2 S1_D2
PCIRST# CRSV3/D2 S1_A18
M10 GRST# CRSV2/A18 E10
J13 S1_D14
CRSV1/D14
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
PCI1410AGGU_PBGA144
D3
H2
L4
M8
K11
F12
C10
B6
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ENE-CB1410
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 21 of 48
5 4 3 2 1
5 4 3 2 1
W=40mil 1 1
VPP 10
1 1 1 C304 C321
C335 5 0.1U_0402_16V4Z 4.7U_0805_10V4Z
5V 2 2 CardBus Socket
0.1U_0402_16V4Z
C325 C331 6
10U_0805_10V4Z 0.1U_0402_16V4Z 5V
2 2 2 VCCD0#
VCCD0 1 VCCD0# 21
2 VCCD1# JP7
+3VS VCCD1 VCCD1# 21
15 VPPD0 1
VPPD0 VPPD0 21 GND
14 VPPD1 35
VPPD1 VPPD1 21 GND
W=40mil 2 S1_D3
DATA3 S1_CD1#
3 3.3V CD1# 36 S1_CD1# 21
1 1 4 8 3 S1_D4
3.3V OC DATA4
SHDN
0.1U_0402_16V4Z
37 S1_D11
GND
C329 C326 DATA11 S1_D5
DATA5 4
10U_0805_10V4Z 38 S1_D12
DATA12
1
2 2 TPS2211AIDBR_SSOP16 S1_D6
5
7
16
R135 DATA6 S1_D13
DATA13 39
10K_0402_5% 6 S1_D7
DATA7 S1_D14
DATA14 40
7 S1_CE1#
S1_CE1# 21
2
CE1# S1_D15
DATA15 41
8 S1_A10
ADD10 S1_CE2#
CE2# 42 S1_CE2# 21
9 S1_OE#
OE# S1_OE# 21
43 S1_VS1
VS1# S1_VS1 21
C 10 S1_A11 C
ADD11 S1_IORD#
44
CardBus Socket IORD#
11 S1_A9
S1_IORD# 21
ADD9 S1_IOWR#
IOWR# 45 S1_IOWR# 21
12 S1_A8
ADD8 S1_A17
ADD17 46
13 S1_A13
S1_A[0..25] ADD13 S1_A18
21 S1_A[0..25] ADD18 47
14 S1_A14
S1_D[0..15] ADD14 S1_A19
21 S1_D[0..15] ADD19 48
15 S1_WE#
WE# S1_WE# 21
49 S1_A20
ADD20 S1_RDY#
READY 16 S1_RDY# 21
50 S1_A21
ADD21
Close to +S1_VCC VCC 17 +S1_VCC
51
CardBus Conn. +S1_VCC +S1_VPP VCC
18 +S1_VPP
VPP
VPP 52
1 1 19 S1_A16
ADD16 S1_A22
ADD22 53
C316 C319 C318 C322 20 S1_A15
10U_0805_10V4Z 0.1U_0402_16V4Z ADD15 S1_A23
ADD23 54
2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z S1_A12
ADD12 21
55 S1_A24
ADD24 S1_A7
ADD7 22
56 S1_A25
ADD25 S1_A6
ADD6 23
57 S1_VS2
+S1_VPP VS2# S1_VS2 21
24 S1_A5
B ADD5 S1_RST B
RESET 58 S1_RST 21
25 S1_A4
ADD4 S1_WAIT#
1 1 WAIT# 59 S1_WAIT# 21
26 S1_A3
C320 C323 ADD3 S1_INPACK#
INPACK# 60 S1_INPACK# 21
4.7U_0805_10V4Z 0.01U_0402_25V4Z 27 S1_A2
2 2 ADD2 S1_REG#
REG# 61 S1_REG# 21
28 S1_A1
ADD1 S1_BVD2
BVD2 62 S1_BVD2 21
29 S1_A0
ADD0 S1_BVD1
BVD1 63 S1_BVD1 21
30 S1_D0
DATA0 S1_D8
DATA8 64
31 S1_D1
+S1_VCC DATA1 S1_D9
Reserve for Debug. 69 GND DATA9 65
70 32 S1_D2
S1_WP GND DATA2 S1_D10
2 1 DATA10 66
43K_0402_5% R173 33 S1_WP
WP S1_WP 21
S1_OE# 2 1 67 S1_CD2#
CD2# S1_CD2# 21
47K_0402_5% R332 34
S1_RST GND
2 1 GND 68
47K_0402_5% R153
S1_CE1# 2 1 SANTA_130606-1_LT
47K_0402_5% R316
S1_CE2# 2 1
47K_0402_5% R324
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CARD BUS SOCKET
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 22 of 48
5 4 3 2 1
5 4 3 2 1
+3VS +2.5VS_1394
1 1 1 1 1 1 1 1 1 1 +3VS
C785 C786 C787 C788 C805 C789 C790 C791 C792 C806
U33
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1394@ 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z 1 8
2 2 2 2 2 10U_0805_10V4Z 2 2 2 2 2 1394@ A0 VCC
1394@ 1394@ 1394@ 1394@ 1394@ 1394@ 1394@ 1394@ 2 A1 WP 7
3 6 1394_EECK
A2 SCL
1
4 5 1394_EEDI
GND SDA R763
D @ AT24C02N-10SU-2.7_SO8 D
@ 510_0402_5%
+2.5VS_1394 +3VS
2
30mils EECK and EEDI is pull high internal
1394@ MBK1608301YZF_0603 External pull high circuit is unnecessary
+1394_PLLVDD 1394@ 0.1U_0402_16V4Z 1394@ 0.1U_0402_16V4Z 1 2 +3VS
1 1 1 1 L44 When use external EEPROM
C793 C794 C795 C796
Populate U33, R763, R766
1394@ 10U_0805_10V4Z Un-populate R764
111
122
110
U34 2 2 2 2
46
30
21
99
36
17
87
86
73
72
62
59
5
1394@ 0.1U_0402_16V4Z
VDD4
VDD3
VDD2
VDD1
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1
PVA5
PVA4
PVA3
PVA2
PVA1
PVA0
+3VS
PCI_AD31 94
VT6311S EECS 26
27
1394_EECS 1 R764 2
1394@ 4.7K_0402_5%
PCI_AD30 AD31 EEDO 1394_EEDI
PCI_AD29
95
96
AD30
AD29
EEPROM SDA/EEDI
SCL/EECK
28
29 1394_EECK
PCI_AD[0..31] PCI_AD28 97
15,19,20,21 PCI_AD[0..31] PCI_AD27 AD28 C797
98 AD27 PHYRST# 55 1 2 1394@ 1U_0402_6.3V4Z
PCI_AD26 101 81 R765 1 2 @ 4.7K_0402_5% +3VS
PCI_AD25 AD26 BJT_CTL I2CEEN R766 1
102 AD25 I2CEN 43 2 @ 4.7K_0402_5% +3VS
PCI_AD24 103 32 R767 1 2 1394@ 4.7K_0402_5%
PCI_AD23 AD24 PWRDET C798 1 2 1394@ 0.1U_0402_16V4Z
PCI_AD22
106
107
AD23
AD22
others REG_FB 84 REG_FB
3
C PCI_AD21 109 E Q58 C
PCI_AD20 AD21 REG_OUT REG_OUT
113 AD20 REG_OUT 85 2
PCI_AD19 114 C799 B @ 2SB1197K_SOT23
PCI_AD18 AD19 R768 1 C
115 60 2 1394@ 1K_0402_5% 1394@ 10P_0402_50V8K
1
PCI_AD17 AD18 XCPS XREXT R769 1
116 AD17 XREXT 63 2 1394@ 6.19K_0603_1% 1 2
PCI_AD16 117 10mils C800 1 2 1394@ 47P_0402_50V8J
AD16
2
PCI_AD15 2 57 1394_XI Y6 REG_FB +2.5VS_1394
PCI_AD14 AD15 XI 1394@ 40mil
PCI_AD13
3
4
AD14
AD13
OSCILLATOR XO 58 1394_XO 24.576MHZ_16P_X8A024576FG1H
PCI_AD12 7 When use external BJT
1
PCI_AD11 AD12 TPB0-
8 AD11 XTPB0M 67 1 2 Populate Q58, R765
PCI_AD10 9 68 TPB0+
PCI_AD9 AD10 XTPB0P TPA0- C801
PCI_AD8
10
11
AD9
AD8
PHY PORT0 XTPA0M
XTPA0P
69
70 TPA0+ 1394@ 10P_0402_50V8K
IDSEL:PCI_AD16 PCI_AD7 14 71 TPBIAS0
PCI_AD6 15
AD7
AD6
PCI I/F XTPBIAS0
PCI_AD16 1 2 1394_IDSEL PCI_AD5 16 74
R770 1394@ 100_0402_5% PCI_AD4 AD5 XTPB1M
18 AD4 XTPB1P 75
PCI_AD3 15mils
PCI_AD2
19
20
AD3
AD2
PHY PORT1 XTPA1M
XTPA1P
76
77
PCI_AD1 24 78
PCI_AD0 AD1 XTPBIAS1
25 AD0 1
1
104 83 C802
15,20,21 PCI_C/BE#3 CBE3# NC17
119 82 R771 R772 L48
15,20,21 PCI_C/BE#2 CBE2# NC16
1 64 54.9_0402_1% 54.9_0402_1% 1394@ 0.33U_0603_10V7K
15,20,21 PCI_C/BE#1 CBE1# NC15 2
12 54 1394@ 1394@ 4 4 3TPA0+_R
15,20,21 PCI_C/BE#0 CBE0# NC14 3
PCI_STOP# 125 53
15,20,21 PCI_STOP#
2
PCI_PERR# STOP# NC13 TPBIAS0 JP22
15,20,21 PCI_PERR# 127 PERR# NC12 52
PCI_PAR 128 51 TPA0+ 1 2TPA0-_R 4 7
B 15,20,21 PCI_PAR PAR NC11 1 2 4 G B
PCI_PIRQA# 88 50 TPA0- 3 6
15 PCI_PIRQA# INTA# NC10 3 G
89 49 TPB0+ L49
1394@ WCM2012F2S-900T04_0805 2 5
15,20,21,24,27,29,30,33 PCIRST# PCIRST# NC9 2 G
CLK_PCI_1394 90 48 TPB0- 1 1 TPB0+_R
15 CLK_PCI_1394
PCI_GNT#0 PCICLK NC8 2 2 1 1 G 8
15 PCI_GNT#0 92 GNT# NC7 45
1
PCI_REQ#0 93 44 1394@ TYCO_1470383-2
15 PCI_REQ#0 REQ# NC6
1394_IDSEL 105 42 R773 R774 4 3TPB0-_R
IDSEL NC5 54.9_0402_1% 1394@ 54.9_0402_1% 4 3
34 PME# NC4 41
3
P CI_IRDY# 121 40 1394@ 1394@ WCM2012F2S-900T04_0805
15,20,21 PCI_IRDY# IRDY# NC3
PCI_TRDY# 123 39 D40
15,20,21 PCI_TRDY#
2
PCI_DEVSEL# TRDY# NC2 D41
15,20,21 PCI_DEVSEL# 124 DEVSEL# NC1 37
PCI_FRAME# 120 35 @ PSOT24C_SOT23 @ PSOT24C_SOT23
15,20,21 PCI_FRAME# FRAME# NC0
1
GNDARX1
GNDARX2
GNDATX1
GNDATX2
1
C803 R775
GND19
GND18
GND17
GND16
GND15
GND10
1
GND9
GND8
GND7
GND6
GND5
GND4
GND3
GND2
GND1
GND0
2
1
1394@ VT6311S_LQFP128
66
65
80
79
118
112
108
100
91
61
56
47
38
33
31
23
22
6
13
126
R776
@ 10_0402_5%
2
1
C804
@ 10P_0402_50V8K
2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
IEEE1394 VIA VT6311S
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 23 of 48
5 4 3 2 1
+3VS
1 1 1
C754 C755 C756
WLAN@ WLAN@ WLAN@
0.01U_0402_16V7K 0.1U_0402_16V4Z 4.7U_0805_10V4Z
2 2 2
+1.5VS +3VALW
1 1 1 1
C757 C758 C759 C760
WLAN@ WLAN@ WLAN@ WLAN@
0.01U_0402_16V7K 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z
2 2 2 2
+3VALW
C126
2 1
WLAN@ 0.1U_0402_16V4Z
5
U30
1 D30
P
29 WL_OFF# B XMIT_OFF#
Y 4 1 2
29,31 KILL_SW# 2 A
G
WLAN@ CH751H-40_SC76
3
WLAN@ TC7SH08FU_SSOP5
+3VALW 2 R757 1
WLAN@ 10K_0402_5% +1.5VS +3VS
JP33
MINI_WAKE# 1 2
29 MINI_WAKE# 1 2
3 3 4 4
5 5 6 6
12 MINI_CLKREQ# MINI_CLKREQ# 7 8
7 8
9 9 10 10
CLK_PCIE_MCARD# 11 12
12 CLK_PCIE_MCARD# 11 12
CLK_PCIE_MCARD 13 14
12 CLK_PCIE_MCARD 13 14
15 15 16 16
17 17 18 18
19 20 XMIT_OFF#
19 20
21 21 22 22 PCIRST# 15,20,21,23,27,29,30,33
7 PCIE_WLAN_C_RX_N1 PCIE_WLAN_C_RX_N1 23 24 +3VALW
PCIE_WLAN_C_RX_P1 23 24
7 PCIE_WLAN_C_RX_P1 25 25 26 26
27 27 28 28
29 29 30 30 SB_SMCLK 10,11,12,16
PCIE_WLAN_C_TX_N1 31 32
7 PCIE_WLAN_C_TX_N1 31 32 SB_SMDATA 10,11,12,16
PCIE_WLAN_C_TX_P1 33 34
7 PCIE_WLAN_C_TX_P1 33 34 USBP0-
35 35 36 36 USBP0- 16
37 38 USBP0+
37 38 USBP0+ 16
39 39 40 40
41 41 42 42
43 43 44 44
45 45 46 46
47 47 48 48
49 49 50 50
51 51 52 52
53 GND1 GND2 54
WLAN@ FOX_AS0B226-S40N-7F~D
Mini-Express Card
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MINI PCI SLOT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 24 of 48
5 4 3 2 1
Adjustable Output
HD Audio Codec +5VALW
U14
+VDDA
+VDDA
4 VIN VOUT 5 4.75v
4.7U_0805_10V4Z
0.1U_0402_16V4Z
4.7U_0805_10V4Z
2 DELAY SENSE or ADJ 6
R405
0.1U_0402_16V4Z
7 1 69.8K_0603_1%
C369 C362 ERROR CNOISE
8 3
1
SD GND
SI9182DH-AD_MSOP8
1
D D
R404
C367
24K _0402_1%
R7281 2@ 0_0402_5%
29,30,34,39,40 SUSP#
C606
2
29,31,34 SYSON 1
R729
2
0_0402_5% Sense Pin Impedance Codec Signals
39.2K PORT-A (PIN 39, 41)
+AVDD_HD +3V_DVDD
20mil L45 1
20K PORT-B (PIN 21, 22)
L28 1 40mil 2 +3VS SENSE A
+VDDA 2 1 1 1 FBM-L11-160808-800LMT_0603
FBM-L11-160808-800LMT_0603 1 1 1 10K PORT-C (PIN 23, 24)
C762 C848 C383 C761
C389 C849 C632 10U_1206_16V4Z
10U_1206_16V4Z C388 2 100P_0402_50V8J 2 2
680P_0402_50V7K 2 2 2
100P_0402_50V8J
0.1U_0402_16V4Z
5.1K PORT-D (PIN 35, 36)
25
38
9
0.1U_0402_16V4Z U38
680P_0402_50V7K
1 1 39.2K PORT-E (PIN 14, 15)
AVDD1
AVDD2
DVDD1
DVDD2
LIN_L C635 C634
SENSE B
26 LIN_L
@ 1000P_0402_50V7K @1000P_0402_50V7K 5.1K PORT-H (PIN 45, 46)
LIN_R AMP_LEFT 2 2
26 LIN_R 14 LINE2_L FRONT_OUT_L 35 AMP_LEFT 26
AMP_RIGHT
SPK output to AMP
1
C961
2
100P_0402_50V8J
15 LINE2_R FRONT_OUT_R 36 AMP_RIGHT 26 20K PORT-F (PIN 16, 17)
+MIC2_VREFO 1 R837 2 INT_MIC 1 2 MIC2_L 16 MIC2_L SURR_OUT_L 39 AMP_LEFT_HP 26
C MIC@ 4.7K_0402_5% C962 1U_0402_6.3V4Z HP output to AMP C
MIC1 1 2 MIC2_R 17 41
MIC2_R SURR_OUT_R AMP_RIGHT_HP 26
1 C963 MIC@ 1U_0402_6.3V4Z
2 2 1 1 2 23 LINE1_L SIDESURR_OUT_L 45
C964 C965 100P_0402_50V8J
45 MIC@ WM-64PCY_2P MIC@ 220P_0402_50V7K 24 46
1U_0402_6.3V4Z LINE1_R SIDESURR_OUT_R
C851 1 2 18 43
CD_L CEN_OUT
C850 12 20 44
100P_0402_50V8J CD_R LFE_OUT
C852 100P_0402_50V8J 19 C630 1 2 27P_0402_50V8J
CD_GND
1 2 BIT_CLK 6 AZ_BITCLK_HD 16
MIC1_L 1 2 MIC1_C_L 21 +MIC1_VREFO_R +MIC1_VREFO_L
26 MIC1_L MIC1_L
C616 1U_0402_6.3V4Z
MIC1_R 1 2 MIC1_C_R 22 8 R426 1 2 33_0402_5% AZ_SDIN3_HD 16
26 MIC1_R MIC1_R SDATA_IN
C619 1 2 1U_0402_6.3V4Z
C853 100P_0402_50V8J 12 37
PCBEEP NC
MONO_IN 29 C363 C763
26 MONO_IN NC
16 AZ_RST_HD# 11 RESET#
31 0.1U_0402_16V4Z 0.1U_0402_16V4Z
LINE2_VREFO
16 AZ_SYNC_HD 10 SYNC
28
10mil
MIC1_VREFO_L +MIC1_VREFO_L
16 AZ_SDOUT_HD 5 SDATA_OUT
32
10mil
MIC1_VREFO_R +MIC1_VREFO_R
29 SPK_SEL 2 GPIO0
3 GPIO1 MIC2_VREFO 30 +MIC2_VREFO
R740 SENSE_A C765 10U_0805_10V4Z
B 26,29 NBA_PLUG 2 1
@ 39.2K_0603_1% SENSE_B
13
34
SENSE A
27
10mil 1 2
B
R785 SENSE B VREF
26 MIC_SENSE 1 2
20K_0402_1% 47 40 1 2
EAPD JDREF C855 100P_0402_50V8J
26,29 NBA_PLUG R925 2 1 48 SPDIFO NC 33 1
39.2K_0603_1%
R926 1 2 4 26 R707
DGND To AGND Bypass
@ 20K_0402_1% DVSS1 AVSS1 20K_0402_1%
7 DVSS2 AVSS2 42
2
1 R441 2
0_0603_5%
DGND AGND
A A
H9
@ H_S315D118
HD CODEC ALC861D
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 25 of 48
5 4 3 2 1
A B C D E
1
D C984 +3VS
2 Q67 @
1
R834 G 2N7002_SOT23 0.01U_0402_16V7K +3VS
1
S 2
100K_0402_5%
3
R827
100K_0402_5%
1
2 C945
EC_EAPD# R835 2 1 0_0402_5% @ EC_EAPD# R828 R829 +3VS 1 2
29 EC_EAPD_R#
2
4
SW10 10K_0402_5% 10K_0402_5% +3VS
1
C980 0.1U_0402_16V4Z 1
GND1
5
4 @ 0.1U_0402_16V4Z 4
2
0.01U_0402_16V7K C946
P
2
A 2 1 2 2 A Y 4
R831 10K_0402_5% 2
G
U46 U48
1 74LVC1G14GW_SOT353-5 1 14
3
COM CD1# VCC
2 D1 CD2# 13
3 CP1 D2 12
+5VS 3 1 2 4 11 C953
B SD1# CP2
0.1U_0402_16V4Z
W=40mil R833 10K_0402_5% 1 1 5 10
Q1 SD2#
GND2
0.01U_0402_16V7K
0.01U_0402_16V7K
C951 C952 6 09 1
Q1# Q2
7 GND Q2# 08
0.1U_0402_16V4Z
1U_0402_6.3V4Z
10U_0805_10V4Z
1 2 1 2 2
C942 C943 C944 SW_XRE094_3P 74LCX74MTC_TSSOP14
5
2
2 1 2
ENCODER_DIR 29
ENCODER_PULSE 29
11
19
20
10
1
U47
CVDD
HVDD
PVDD
PVDD
VDD
SHI00002T00
1 2
25 AMP_RIGHT
C948
1
0.22U_0402_6.3V6K
2
AMPR
AMPL
3
5
INR_A ROUT+ 22
21
SPKR+
SPKR-
Speaker Conn.
25 AMP_LEFT INL_A ROUT-
C950 0.22U_0402_6.3V6K
R589 1 2 100K_0402_5% AMP_EN# 27 8 SPKL+
30mil JP40
/AMP EN LOUT+ SPKL- SPKL+ R35
3
LOUT- 9 1 2 0_0603_5% SPK_L+
1
3
3
1 2 1 2 AMP_BEEP 28 ACES_85204-0200
25 LIN_L BEEP
C977 2.2U_0603_6.3V6K 1U_0402_6.3V4Z 16 D6
AMP_CP+ VSS
25 LIN_R 1 2 12 CP+ 1
3
C978 2.2U_0603_6.3V6K 2 1 AMP_CP- 14 2 @ PSOT24C_SOT23
C957 2.2U_0603_6.3V6K CP- GND C958 D5
PGND 23
2 1 AMP_BIAS 25 7 2.2U_0603_6.3V6K
1
C959 2.2U_0603_6.3V6K BIAS PGND 2 @ PSOT24C_SOT23
CGND 13
C971
1 2
Gain HP 0dB
1
APA2056_TSSOP28
0.1U_0402_16V4Z
SPK 10dB
+MIC1_VREFO_L +MIC1_VREFO_R
MICROPHONE
IN JACK
2
JP35
EC Beep +VDDA R812 R813 5
4.7K_0402_5%
4.7K_0402_5% 4
25 MIC_SENSE
1
2 2
29 BEEP# 1 2 1 2 8
1
R197 L50 1 2 MIC1_R1 3
25 MIC1_R
C385 560_0402_5% R431 FBMA-L11-160808-121LMT 6
1U_0402_6.3V4Z 10K_0402_5% L51 1 2 MIC1_L1 2 7
25 MIC1_L
FBMA-L11-160808-121LMT 1
CardBus Beep 1 1
2
1
2 2
21 PCM_SPK# 21 2NSE_DPR11 2 C386 @
560_0402_5% R430 1U_0402_6.3V4Z PJ15 PJ16
1
1U_0402_6.3V4Z 10K_0402_5% JUMP_43X39 JUMP_43X39
C390 2
@ @
2
1 0.01U_0402_16V7K
2
C381
1 2 MONO_IN
MONO_IN 25
2
PCI Beep
1
C384 1U_0402_6.3V4Z
16 SPKR 1 2 1 2 BEEP1# 2 Q30
R196 MMBT3904_SOT23 R189 JP34
1
D34 NBA_PLUG 4
25,29 NBA_PLUG
R440 CH751H-40_SC76 8
10K_0402_5% HP_R L52 1 2 R928 1 2 20_0402_5% 3
2
FBMA-L11-160808-121LMT 6
2
2
HP_L L53 1 2 R929 1 2 20_0402_5% 2 7
NSE_DPR1 FBMA-L11-160808-121LMT 1
D 39K_0402_5% 39K_0402_5%
1
1 1
2 Q64 C843 C844 AGND
29 NSE_DPR
G 2N7002_SOT23 10P_0402_25V8K 10P_0402_25V8K
1
S
3
C
2 R811 1 2 Q65 2006/05/18 2007/05/18 Title
+S1_VCC Issued Date Deciphered Date
AMP&Audio Jack/MDC
2.2K_0402_5% B MMBT3904_SOT23
E
3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 26 of 48
A B C D E
+3VALW
14
U5C
SIDERST# 9
P
16 SIDERST# A
8 SIDE_RST#
PCIRST# O
15,20,21,23,24,29,30,33 PCIRST# 10 B
G
SN74LVC08APW_TSSOP14
7
17 IDE_SDD[0..15]
JP21
1 2
3 4 1 2
SIDE_RST# 5 6 IDE_SDD8 R733 @ 0_0603_5%
IDE_SDD7 7 8 IDE_SDD9
IDE_SDD6 9 10 IDE_SDD10
+3VS IDE_SDD5 11 12 IDE_SDD11
IDE_SDD4 13 14 IDE_SDD12
IDE_SDD3 15 16 IDE_SDD13
2
IDE_SDD2 17 18 IDE_SDD14
R302 IDE_SDD1 19 20 IDE_SDD15
4.7K_0402_5% IDE_SDD0 21 22 IDE_SDDREQ
IDE_SDDREQ 17
23 24 IDE_SDIOR#
IDE_SDIOR# 17
IDE_SDIOW# 25 26
17 IDE_SDIOW#
1
IDE_SDIORDY 27 28 IDE_SDDACK#
17 IDE_SDIORDY IDE_SDDACK# 17
INT_IRQ15 29 30
17 INT_IRQ15
IDE_SDA1 31 32 R2961 2100K_0402_5%
17 IDE_SDA1 +5VS
MDC 1.5 Conn. 17 IDE_SDA0
17 IDE_SDCS1#
IDE_SDA0
IDE_SDCS1#
33
35
34
36
IDE_SDA2
IDE_SDCS3#
IDE_SDA2 17
IDE_SDCS3# 17
1
1 2 SHDD_LED# 37 38 W=80mils
+5VS +5VS
R300 R293 100K_0402_5% +5VS 39 40
JP36 29 SHDD_LED# 41 42
TYCO_1-1775149-2~D +3VALW 8.2K_0402_5% 43 44 1 2
45 46 C476
2
1 GND1 RES0 2 1 R276 2 SEC_CSEL 47 48 0.1U_0402_10V6K
16 AZ_SDOUT_MD 3 4 470_0805_5% 49 50
IAC_SDATA_OUT RES1
5 GND2 3.3V 6 53 54
16 AZ_SYNC_MD 7 IAC_SYNC GND3 8
2 R866 1 9 10 IDE_SSD7, IDE_SDDREQ Pull down OCTEK_CDR-50JD1
16 AZ_SDIN1_MD MDC@33_0402_5% IAC_SDATA_IN GND4 No reserve longer
16 AZ_RST_MD# 11 IAC_RESET# IAC_BITCLK 12 AZ_BITCLK_MD 16
R826 C867
2 1 C982
22P_0402_50V8J 2 1 1 2
GND
GND
GND
GND
GND
GND
@
2 1 C983 @ 10_0402_5% @ 10P_0402_50V8K
22P_0402_50V8J +5VS Placea caps. near ODD CONN.
13
14
15
16
17
18
@
MDC@
Connector for MDC Rev1.5
1 1 1
C373 C374
+3VALW C372 C366 C368
1000P_0402_50V7K 10U_0805_10V4Z 10U_0805_10V4Z 1U_0402_6.3V4Z 0.1U_0402_16V4Z
2 2 2
1 1 1
C864 MDC@ C865 MDC@ C866 @
1000P_0402_50V7K 0.1U_0402_16V4Z 4.7U_0805_10V4Z
2 2 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
TPM/ ODD CONNECTORS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 27 of 48
Keep 20 mils minimum spacing between
USB signals and others signals
USBP6+ 12
16 USBP6+ 11
USBP6-
16 USBP6- 10
USBP4+ 9
16 USBP4+ 8
USBP4-
16 USBP4- 7
6
5
4
+USB_CS 3
2
1
ACES_85201-1205
H1 H2 H3 H4 H5 H6 H7 H8
@ H_S315D118 @ H_S315D118 @ H_C118D118N @ H_S315D118 @ H_S315D118 @ H_S315D118 @ H_S315D118 @ H_S315D118
CF14 CF9 CF12 CF8 CF6 CF4 CF7
@ SMD40M80 @ SMD40M80 @ SMD40M80 @ SMD40M80 @ SMD40M80 @ SMD40M80 @ SMD40M80
1
1
1
1
1
FD2 FD5 FD4 FD1 FD6 FD3 FD7 H20 H21 H22 H23 H24 H25 H26 H28 H27 M11
@ FIDUCAL @ FIDUCAL @ FIDUCAL @ FIDUCAL @ FIDUCAL @ FIDUCAL @ FIDUCAL @ H_C236D118 @ H_C256D126 @ H_C256D126 @ H_C256D126 @ H_C118D118N @ H_C244D158 @ H_C256D158 @ H_S228D158 @ H_S228D158 @ H_C71D71N
1
1
M1 M2 M3 M4 M5 M6 M7 M8 M10
@ H_O268X169D268X169N @ H_O142X118D142X118N @ H_C122D122N @ H_C165D165N @ H_C165D165N@ H_C165D165N@ H_C165D165N @ H_C169D169N @ H_C315D315N
FD8
@ FIDUCAL
1
1
Security Classification Compal Secret Data Compal Electronics, Inc.
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB Conn.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 28 of 48
5 4 3 2 1
+3VALW
KBA[0..19]
KBA[0..19] 30 +3VALW
ADB[0..7] 0.1U_0402_16V4Z 0.1U_0402_16V4Z
ADB[0..7] 30
1 1 C292 1 1 2 2
C309 1
C328 C273 C315 C330
1000P_0402_50V7K 1000P_0402_50V7K C290 1 1
L20 2 2 2 2 1 1
1 2 0_0603_5% ECAGND C327 C339
ECAGND
0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z
0.1U_0402_16V4Z 1U_0402_6.3V4Z
2 2
D D
KSI[0..7]
KSI[0..7] 31,32
123
136
157
166
161
159
16
34
45
95
96
U8 KSO[0..15]
KSO[0..15] 32
LPC_AD0 15 +3VALW
VCCA
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AGND
BATGND
VCCBAT
15,30,33 LPC_AD0 LAD0
LPC_AD1 14 49 KSO0
15,30,33 LPC_AD1 LAD1 GPOK0/KSO0 KSO0 32
LPC_AD2 13 50 KSO1
15,30,33 LPC_AD2 LAD2 GPOK1/KSO1 KSO1 32
2
LPC_AD3 10 51 KSO2
15,30,33 LPC_AD3 LAD3 GPOK2/KSO2 KSO2 32
KSO3 R459 +3VALW
15,19,30,33 LPC_FRAME# 9 LFRAME# LPC Interface GPOK3/KSO3 52
KSO4
KSO3 32
15,20,21,23,24,27,30,33 PCIRST# 165 LRST#/GPIO2C GPOK4/KSO4 53 KSO4 32
ENE-KB910-B4
18 56 KSO5 @10K_0402_5%
15 CLK_PCI_LPC LCLK GPOK5/KSO5 KSO5 32
2
7 57 KSO6
15,21,30,33 SERIRQ KSO6 32
1
SERIRQ GPOK6/KSO6 KSO7 SKU_ID R91
2 1 2 1 15,20,21 PM_CLKRUN# 25 CLKRUN#/GPIO0C * GPOK7/KSO7 58 KSO7 32
R125 @10_0402_5% 24 59 KSO8
LPCPD#/GPIO0B * GPOK8/KSO8 KSO8 32
C306 60 KSO9 100K_0402_5%
GPOK9/KSO9 KSO9 32
2
@22P_0402_50V8J FR D# 150 61 KSO10
30 FRD# KSO10 32
1
FWR# RD# GPOK10/KSO10 KSO11 R460
Internal Keyboard
30 FWR# 151 WR# GPOK11/KSO11 64 KSO11 32
FSEL# 173 65 KSO12 10K_0402_5% BTN_ID
30 FSEL# MEMCS# GPOK12/KSO12 KSO12 32
SELIO# 152 66 KSO13
IOCS# GPOK13/KSO13 KSO13 32
ADB0 138 67 KSO14
KSO14 32
1
ADB1 D0 GPOK14/KSO14 KSO15 +5VS
139 D1 GPOK15/KSO15 68 KSO15 32
ADB2 140 153
ADB3 D2 GPOK16/KSO16 KSO17 TP_CLK
141 D3 GPOK17/KSO17 154 KSO17 31 1 2
ADB4 144 R357 4.7K_0402_5%
ADB5 D4 KSI0 TP_DATA 1
145 D5 GPIK0/KSI0 71 EC_PLAYBTN# 31,32 2
X-BUS Interface
ADB6 146 72 KSI1 R358 4.7K_0402_5%
D6 GPIK1/KSI1 EC_STOPBTN# 31,32
ADB7 147 73 KSI2
D7 GPIK2/KSI2 EC_REVBTN# 31,32
KBA0 124 74 KSI3
A0 GPIK3/KSI3 EC_FRDBTN# 31,32 +3VALW
KBA1 125 77 KSI4
A1/XIOP_TP GPIK4/KSI4 KSI4 32
KBA2 126 78 KSI5
A2 GPIK5/KSI5 KSI5 32
KBA3 127 79 KSI6 KBA1 1 2
A3 GPIK6/KSI6 KSI6 32
+3VALW KBA4 128 80 KSI7 R372 10K_0402_5%
C A4/DMRP_TP GPIK7/KSI7 KSI7 32 C
KBA5 131 KBA4 1 2
KBA6 A5/EMWB_TP INVT_PWM +3VALW R376 10K_0402_5%
132 A6 GPOW0/PWM0 32 INVT_PWM 13
KBA7 133 33 BEEP# KBA5 1 2
A7 GPOW1/PWM1 BEEP# 26
2
1
R152 KBA9 142 37 ACOFF
10K_0402_5% A9 GPOW3/PWM3 ACOFF 37
KBA10 135 Pulse Width GPOW4/PWM4 38 USB_EN# R116
A10 USB_EN# 28
KBA11 134 39 EC_ON 100K_0402_5%
A11 GPOW5/PWM5 EC_ON 31
KBA12 130 40 EC_LID_OUT#
EC_LID_OUT# 16
1
2
EC_PME# KBA14 A13 FAN1PWM/GPOW7/PWM7 D13
20 EC_PME# 121 A14 1 R150 2 C RY2
KBA15 120 2 C RY1 @ 20M_0402_5%
A15 GPWU0 ON/OFF 31
KBA16 113 26 2 1
A16 GPWU1 ACIN 31,35
KBA17 112 29 KILL_SW#
A17 GPWU2 KILL_SW# 24,31
KBA18 104 30
A18 GPWU3 PM_SLP_S3# 16
KBA19 103 Wake Up Pin 44 CH751H-40_SC76
A19 GPWU4 PM_SLP_S5# 16
IE_BTN# 108 76 1 1
31 IE_BTN# A20/GPIO23 GPWU5
+3VALW 2 1 105 172 EC_PME# C338 C342
E51CS#/GPIO20/ISPEN TIN1/GPWU6
1
+5VS R114 @ 100K_0402_5% 176
TIN2/FANFB2/GPWU7 ENCODER_PULSE 26
10P_0402_50V8J
10P_0402_50V8J
RP18 PSCLK1 110 2 1 ECAGND X2
IN
OUT
PSCLK1 2 2
1 8 PSCLK1 PSDATA1 111 PSDAT1 GPIAD0/AD0 81 BATT_TEMPA C272 0.01U_0402_16V7K
BATT_TEMPA 36
2 7 PSDATA1 PSCLK2 114 PSCLK2 GPIAD1/AD1 82 BTN_ID
BTN_ID 31
3 6 PSCLK2 PSDATA2 115 PSDAT2PS2 Interface GPIAD2/AD2 83 BATT_OVP
BATT_OVP 37
5 PSDATA2 TP_CLK
NC
NC
4 32 TP_CLK 116 PSCLK3 GPIAD3/AD3 84
4.7K_1206_8P4R_5% TP_DATA ALI/MH# POUT 41 +3VALW
32 TP_DATA 117 PSDAT3 Analog To Digital GPIAD4/AD4 87 ALI/MH# 36,37
+3VALW 88 SKU_ID
2
EC_SMB_CK1 GPIAD5/AD5 AD_BID0
30,36 EC_SMB_CK1 163 SCL1 GPIAD6/AD6 89
1 2 MODE# EC_SMB_DA1 164 90 1 2
30,36 EC_SMB_DA1 SDA1 GPIAD7/AD7 100K_0402_5%
R838
1 100K_0402_5%
2 FR D# EC_SMB_CK2 169 SMBus R93
4 EC_SMB_CK2 SCL2
R839
1 100K_0402_5%
2 SELIO# EC_SMB_DA2 170 99 DAC_BRIG 1 2 32.768KHZ_12.5P_1TJS125DJ2A073
4 EC_SMB_DA2 SDA2 GPODA0/DA0 DAC_BRIG 13
R840
1 100K_0402_5%
2 FSEL# 100 C271 0.22U_0603_16V4Z
R841 100K_0402_5% GPODA1/DA1 IR EF
8 GPIO04 GPODA2/DA2 101 IREF 37
EC_SCI# 20 102 EN_DFAN1#
B +5VALW 16 EC_SCI# GPIO07 GPODA3/DA3 EN_DFAN1 33 B
21 GPIO08 Digital To Analog GPODA4/DA4 1
MINI_WAKE# 22 42
24 MINI_WAKE# GPIO09 GPODA5/DA5
1 2 EC_SMB_CK1 ENBKL 27 47
8 ENBKL GPIO0D GPODA6/DA6
R375 4.7K_0402_5% BKOFF# 28 174 Analog Board ID definition,
13 BKOFF# GPIO0E GPODA7/DA7
1 2 EC_SMB_DA1 FSTCHG 48
37 FSTCHG GPIO10 Please see page 3.
R371 4.7K_0402_5% EC_SMI# 62 85 PWR_LED#
16 EC_SMI# GPIO13 * GPIO18/XIO8CS# PWR_LED# 31
26 ENCODER_DIR 63 GPIO14 86 WL_BT_LED# 31
69 * GPIO19/XIO9CS# 91 HDD_LED#
** 24
16
WL_OFF#
EC_SWI# 70
GPIO15
GPIO16 GPIO *GPIO1A/XIOACS#
* GPIO1B/XIOBCS# 92 BATT_LOW_LED#
HDD_LED# 31
BATT_LOW_LED# 31
+3VALW
1 2 EC_SMB_CK2 NBA_PLUG 75 Expanded I/O * GPIO1C/XIOCCS# 93 BATT_CHGI_LED#
25,26 NBA_PLUG GPIO17 BATT_CHGI_LED# 31
R156 4.7K_0402_5% EAPD 109 94
25,26 EAPD GPIO24 * GPIO1D/XIODCS#
1 2 EC_SMB_DA2 LID_SW# 118 97
31 LID_SW# GPIO25 * GPIO1E/XIOECS# NSE_DPR 26
2
R157 4.7K_0402_5% 1 1 MODE# 119 98 CB_PWR_OK 2 R310 1 +S1_VCC
31 MODE# GPIO26 * GPIO1F/XIOFCS#
C333 C332 148 10K_0402_5% R92
25,31,34 SYSON GPIO27
149 171 FAN_SPEED1 Ra 100K_0402_5%
25,30,34,39,40 SUSP# GPIO28 GPIO2E/TOUT1/FANFB1 FAN_SPEED1 33
@ 100P_0402_50V8J @ 100P_0402_50V8J VR_ON 155 12 1 2
2 2 41 VR_ON GPIO29 DPLL_TP/GPIO06/FANFB3
156 FANTEST_TP/GPIO05/FAN3PWM 11 R133 4.7K_0402_5%
SPK_SEL 25
1
GPIO2A AD_BID0
162 GPIO2B
PBTN_OUT# 168 175 EC_THRM# 1
16 PBTN_OUT# GPIO2D EC_THRM# 16
Timer PinTOUT2/GPIO2F
2
C284
PADS_LED# 55 3 R761 R101
32 PADS_LED# FnLock#/GPIO12 * E51IT0/GPIO00 EC_RSMRST# 16
0.1U_0402_16V4Z
C301 0.1U_0402_16V4Z CAPS_LED# 54 4 4.7K_0402_5% Rb
32 CAPS_LED# CapLock#/GPIO011 * E51IT1/GPIO01 SHDD_LED# 27 2
18K_0402_5%
1 2 ENBKL 2 1 32 NUM_LED#
NUM_LED# 23 NumLock#/GPIO0A * E51RXD/GPIO21/ISPCLK 106 E51_RXD
E51_RXD 33
R112 100K_0402_5% 41 107 E51_TXD
17 PHDD_LED# ScrollLock#/GPIO0F * E51_TXD 33
1
E51TXD/GPIO22/ISPDAT
+3VALW 2 1 19 ECRST# MISC
R119 47K_0402_5% 5 158 C RY2
16 GATEA20 GA20/GPIO02 XCLKI C RY1
16 KBRST# 6 KBRST#/GPIO03 XCLKO 160
31
GND
GND
GND
GND
GND
GND
ECSCI#
KB910Q B4_LQFP176
17
35
46
122
137
167
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ENE-KB910
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS CustomIAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 29 of 48
5 4 3 2 1
+3VALW
+5VALW
C341
+5VALW 1 2
1
C324
2 0.1U_0402_16V4Z R145 0.1U_0402_16V4Z R176
14
1
100K_0402_5%
R178
100K_0402_5% 1 INT_FLASH_EN# 1 2
P
U11 INT_FSEL# 1 A
2 3
2
O FSEL#
8 VCC A0 1 B 2 FSEL# 29
G
7 WP A1 2 22_0402_5%
29,36 EC_SMB_CK1 6 3
7
SCL A2 U12A
29,36 EC_SMB_DA1 5 SDA GND 4
SN74LVC32APWLE_TSSOP14
AT24C16AN-10SI-2.7_SO8
1
R158
100K_0402_5% +3VS
2
JP30
1 1
2 2
3 3
4 4
5 5
6 CLK_14M_SIO
6 CLK_14M_SIO 12
7 LPC_AD0
7 LPC_AD0 15,29,33
8 LPC_AD1
8 LPC_AD1 15,29,33
9 LPC_AD2
9 LPC_AD2 15,29,33
10 LPC_AD3
10 LPC_AD3 15,29,33
11 LPC_FRAME#
+3VALW 11 LPC_FRAME# 15,19,29,33
+3VALW 12 LPC_DRQ1#
12 PCIRST# LPC_DRQ1# 15,33
13 13 PCIRST# 15,20,21,23,24,27,29,33
14 14 1 R458 2 @ 0_0402_5%
1
R170 15
15 CLK_PCI_SIO 15,33
100K_0402_5% 16 SERIRQ
SUSP# 25,29,34,39,40 16 SERIRQ 15,21,29,33
17 17
2
G
14
18 18
19
2
19
4 1 3 20
P
A EC_FLASH# 16 20
FWE# 6
D
S
O @ ACES_85201-2005
B 5
G
Q28
U12B 2N7002_SOT23
7
SN74LVC32APWLE_TSSOP14
FWR# 29
KBA[0..19]
29 KBA[0..19]
ADB[0..7]
1MB Flash ROM
29 ADB[0..7]
+3VALW
U13 1MB ROM Socket
KBA0 21 31
KBA1 A0 VCC0
20 A1 VCC1 30 1
KBA2 19 C352 JP8
KBA3 A2 KBA16 KBA17
18 A3 1 2
KBA4 17 25 ADB0 0.1U_0402_16V4Z KBA15
KBA5 A4 D0 ADB1 2 KBA14 3 4
16 A5 D1 26 5 6
KBA6 15 27 ADB2 KBA13 KBA19
KBA7 A6 D2 ADB3 KBA12 7 8 KBA10
14 A7 D3 28 9 10
KBA8 8 32 ADB4 SB_INT_FLASH_SEL tie to ATI SB KBA11 ADB7
KBA9 A8 D4 ADB5 KBA9 11 12 ADB6
7 A9 D5 33 GPIO1 and pull down 13 14
KBA10 36 34 ADB6 KBA8 ADB5
KBA11 A10 D6 ADB7 FWE# 15 16 ADB4
6 A11 D7 35 17 18
KBA12 5 RESET# +3VALW
KBA13 A12 INT_FLASH_EN# 19 20
4 A13 21 22
KBA14 3 10 RESET# 1 2 +3VALW SB_INT_FLASH_SEL
A14 RP# 16 SB_INT_FLASH_SEL 23 24
KBA15 2 11 R179 KBA18 ADB3
KBA16 A15 NC 100K_0402_5% KBA7 25 26 ADB2
1 A16 READY/BUSY# 12 27 28
KBA17 40 29 KBA6 ADB1
KBA18 A17 NC0 KBA5 29 30 ADB0
13 A18 NC1 38 31 32
KBA19 37 KBA4 FR D#
A19 KBA3 33 34
INT_FSEL# KBA2 35 36 FSEL#
22 CE# 37 38
FR D# 24 23 KBA1 KBA0
29 FRD# OE# GND0 39 40
FWE# 9 39
WE# GND1 @ SUYIN_80065AR-040G2T
SST39VF080-70_TSOP40
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BIOS& I/O PORT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 30 of 48
5 4 3 2 1
1
EC_REVBTN# EC_PLAYBTN# C167 1 2 220P_0402_50V7K
29,32 EC_REVBTN# 10
BTN_ID EC_STOPBTN# C160 1 2 220P_0402_50V7K R814
29 BTN_ID 11 U39 47K_0402_5%
12 A3212EEH_MLP6
ACES_85201-1205
2
5 1 LID_SW#
VDD OUTPUT LID_SW# 29
1 1
4 NC NC 2
C845 C846
GND
0.1U_0402_16V4Z 10P_0402_25V8K
2 2
3
+3VALW
+3VALW
SYSON SYSON
SYSON 25,29,34
3
3
Q13
2
2
47K 2N7002_SOT23 47K Q14
G
G
2N7002_SOT23
2 1 3 PWR_SUSP_LED 2 1 3 PWR_LED#
10K PWR_SUSP_LED 29 10K PWR_LED# 29
D
S
+3VALW
Q12 Q11
Power Button
DTA114YKA_SC59 DTA114YKA_SC59
1
2
PWR_LEDS
C R244 C
SUSPLEDS#
100K_0402_5%
1
Change from 120 to 300
Change from 300 to 120 R49 1 2 PWR_LED_0# SW6
R48 1 2 PWR_SUSPLED# 120_0402_5% D26
120_0402_5% 1 3 3 ON/OFF 29
R47 1 2 PWR_LED_1# ON/OFFBTN# 1
R50 1 2 PWR_SUSPLED1# 120_0402_5% 2 4 2 51_ON#
51_ON# 35
120_0402_5%
CHN202U_SC70
6
5
1000P_0402_50V7K
SMT1-05_4P
1
1
D C455 D24
EC_ON 2 RLZ20A_LL34
29 EC_ON Q38
G
2
S
2
R247
2 4.7K_0402_5% 2N7002_SOT23
MODE# 29
MODEBTN# 1
+3VALW 3 51_ON#
51_ON# 35
1
D25
2
DAN202U_SC70
R246
100K_0402_5%
WL&BT LED
1
B 2 B
IE_BTN# 29
IEBTN# 1
3 51_ON# POWER/ON LED
D27
DAN202U_SC70 +3VALW
D16
PWR_SUSPLED1# 2 1
D43
2 R446 1 2 1 WL_BT_LED# HT-191UD_AMBER_0603
WL_BT_LED# 29
WLAN@ 120_0402_5% D35
WLAN@ HT-191UD_AMBER_0603 PWR_LED_0# 2 1
+3VALW AC IN LED
HT-191UYG-DT_GRN_0603
D15
1 R194 2 2 1
+3VALW
120_0402_5% HT-191UYG-DT_GRN_0603
Kill SWITCH
1
D
2 Q50
29,35 ACIN
2
G
S 2N7002_SOT23 R447
3
SW7 100K_0402_5%
3
3 +3VS HDD LED
1
2 KILL_SW# D18
2 KILL_SW# 24,29
1 R195 2 2 1 HDD_LED# 29
120_0402_5%
1 HT-191UYG-DT_GRN_0603
BATTERY CHG 1
A WLAN@ 1BS003-1211L_3P A
D36
1 R193 2 2 1 BATT_CHGI_LED#
120_0402_5%
HT-191UYG-DT_GRN_0603
BATT_CHGI_LED# 29 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/05/18 Deciphered Date 2007/05/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Kill SW/ Sub Conn./LEDS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS CustomIAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 31 of 48
5 4 3 2 1
5 4 3 2 1
KSI[0..7]
KSI[0..7] 29,31
KSO[0..15]
KSO[0..15] 29
D
INT_KBD CONN. D
JP5
1 NUM_LED# 29
2 PADS_LED# 29
3 CAPS_LED# 29
4 1 2 +3VS
KSO15 300_0402_5% R297
5 KSO14
6 KSO10
TP Conn. 7
8
9
KSO11
KSO8
KSO9
10 KSO13
11 KSI7
12 KSO3
13 KSO7
14 KSO12
1 15
C938 0.1U_0402_16V4Z KSI4
16 KSI6
17 KSI5
2 18 KSO6
ACES_85201-0605 19 KSO5
SW_R 20 KSI3
+5VS 1 21
C934 100P_0402_25V8K KSI0
SW_R 2 SW_L 22 KSO0
SW_L 3 C935 100P_0402_25V8K 23 KSO1
TP_DATA 4 TP_DATA 24 KSI1
29 TP_DATA TP_CLK 5 C936 100P_0402_25V8K 25 KSI2
C
29 TP_CLK 6 26 C
TP_CLK KSO2
JP41 C937 100P_0402_25V8K 27 KSO4
28
29 1 2 +3VS
300_0402_5% R298
30
31
32
33
34 1 2 +3VS
300_0402_5% R299
ACES_88170-3400
T/P Button
SW9 SW8
SW_L 1 3 SW_R 1 3
2 4 2 4
SMT1-05_4P SMT1-05_4P
6
5
6
5
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB/Touch Pad& hibernation
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS CustomIAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 32 of 48
5 4 3 2 1
A B C D E
FAN Conn
+3VALW
+5VS +3VALW
VS
14
14
U5D
PU5B 12 9
P
A A
1
1 R836 11 8 1
O O
1
EN_DFAN1 2 1 5 C Q36 D22 13 10
P
29 EN_DFAN1 + B B
G
0_0402_5% 7 2 R874 1 FAN1_ON 2 FMMT619_SOT23 1SS355_SOD323 SN74LVC08APW_TSSOP14
0 B
2 R239 1 6 100_0402_5%
7
-
G
10K_0402_5% E U12C
2
2
SN74LVC32APWLE_TSSOP14
4
LM358DT_SO8 R875
FAN1 JP17
1
10K_0402_5%
@ D23 3
1
1
1N4148_SOT23 2
+ 1 +3VALW
ACES_85205-0300
2
C449
14
2 22U_B_10VM 2
C171 12
P
A
1 2 +3VS 1 R41 2 @ 1000P_0402_50V7K 11 O
R240 10K_0402_5% 1
B 13
G
8.2K_0402_5%
29 FAN_SPEED1
7
2 U12D
SN74LVC32APWLE_TSSOP14
C170
@ 1000P_0402_50V7K
1
2 2
R779
@ 0_0402_5%
H36 1 2 E51_TXD
+3VALW E51_TXD 29
R780
@ 0_0402_5%
E51_RXD 1 2 6 5 1 2 LPC_DRQ1#
29 E51_RXD LPC_DRQ1# 15,30
R781
0_0402_5%
SERIRQ 1 2 7 4 PCIRST#
15,21,29,30 SERIRQ PCIRST# 15,20,21,23,24,27,29,30
R782
0_0402_5%
LPC_AD3 8 3 LPC_AD2
15,29,30 LPC_AD3 LPC_AD2 15,29,30
LPC_AD1 9 2 LPC_AD0
15,29,30 LPC_AD1 LPC_AD0 15,29,30
LPC_FRAME# 10 1 CLK_PCI_SIO
15,19,29,30 LPC_FRAME# CLK_PCI_SIO 15,30
2
@ DEBUG_PAD R823
22_0402_5%
1
3 3
2
C857
22P_0402_50V8J
1
BOM
ZZZ1 PJP1 45@ U21 ME@
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FAN & MDC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 33 of 48
A B C D E
A B C D E
+1.8V TO +1.8VS
+1.8V +1.8VS +5VALW TO +5VS
+5VALW +5VS
1 2 4.7U_0805_10V4Z
Q19 C226
470_0805_5%
8 1 C225 1 1
D S
2
1 7 2 10U_0805_10V4Z Q46 C625 C624 1
D S 2 1
470_0805_5%
6 3 R52 8 1
D S D S
2
5 D G 4 7 D S 2
1U_0402_6.3V4Z R58 2 2 R418
6 D S 3
4.7U_0805_10V4Z
SI4800BDY_SO8
1 1 2 +VSB 5 4
1
D G
0.1U_0402_16V7K
1 1U_0402_6.3V4Z
2N7002_SOT23
C208 100K_0402_5% SI4800BDY_SO8 1 R417 2 +VSB
1
1
1
D D
0.1U_0402_16V7K
4.7U_0805_10V4Z
1 1 22K_0402_5%
2
2N7002_SOT23
C222 2 SUSP 2
1
2 G G C607 D D
S Q18 Q17 S C618 2 SUSP 2
3
3
2N7002_SOT23 2 2 G G
S Q45 Q47 S
3
2N7002_SOT23
+1.8VALW TO +1.8V
2 +5VALW 2
+5VALW
+1.8VALW +1.8V
2
R55
1 1 10K_0402_5% R56
Q4 C27 C24 4.7U_0805_10V4Z 10K_0402_5%
470_0805_5%
8 1
1
D S
2
7 2 SUSP
40 SUSP
1
D S 2 2 R24 SYSON#
6 D S 3
1
D
5 D G 4
1
1U_0402_6.3V4Z Q16 D
25,29,30,39,40 SUSP# 2
SI4800BDY_SO8 1 R18 2 +VSB G 2N7002_SOT23 2 Q15
25,29,31 SYSON
1
2
4.7U_0805_10V4Z
0.1U_0402_16V7K
1 1 100K_0402_5% S G 2N7002_SOT23
2
2N7002_SOT23
3
1
C16 D D R53
C26 2 SYSON# 2 R54
2 2 G G 10K_0402_5%
1
S Q7 Q9 S 10K_0402_5%
3
1
2N7002_SOT23
3 3
+3VALW TO +3VS
+1.2VS +0.9VS
+3VALW +3VS
470_0805_5%
@ 470_0805_5%
2
2
1 1 R39 R109
Q48 C608 C610 4.7U_0805_10V4Z
470_0805_5%
8 D S 1
2
7 2
1
D S 2 2 R415
6 D S 3
2N7002_SOT23
2N7002_SOT23
5 D G 4
1
1U_0402_6.3V4Z D D
SI4800BDY_SO8 1 R416 2 +VSB 2 SUSP 2 SUSP
1
4.7U_0805_10V4Z
0.1U_0402_16V7K
1 1 68K_0402_1% G G
2N7002_SOT23
S Q10 S Q25
3
3
1
C622 D D
C611 2 SUSP 2
2 2 G G @
S Q51 Q49 S
3
2N7002_SOT23
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC-DC INTERFACE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B IAYAA (LA-3391P) 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 34 of 48
A B C D E
A B C D
VS
PR1
VIN VIN 1M_0402_1%
PL1 1 2
PF1 FBMA-L18-453215-900LMA90T_1812
DC301000F00
1
DC_IN_S1 1 2 DC_IN_S2 1 2
1
VS PR2
PJP1 7A_24VDC_429007.WRML PR3 5.6K_0402_5% PR4
1 84.5K_0402_1% 10K_0402_1%
+
1 2
2
ACIN 29,31
1
2 PR5
2
+
8
PC1 PC2 PC3 PC4 22K_0402_1% PU1A
3 1000P_0402_50V7K 100P_0402_50V8J 1000P_0402_50V7K 100P_0402_50V8J 1 2 3
P
2
2
- + PACIN
1
O 1 PACIN 37,38 1
- 4 2 -
G
1
1
@ SINGA_2DW-0005-B03 PR6 LM393DG_SO8
4
PC5 20K_0402_1% PC6 PR7
0.1U_0402_16V7K PD1 10K_0402_1%
2
RLZ4.3B_LL34
2
0.068U_0402_10V6K 2
PR8
1 RTCVREF Vin Detector
10K_0402_1%
VIN 3.3V
High 18.384 17.901 17.430
2
PD2
RLS4148_LLDS2
Low 17.728 17.257 16.976
1
PD3
BATT+ 2 1
1
RLS4148_LLDS2 PR9 PR10
68_1206_5% 68_1206_5%
PQ1 1 2
PR12 TP0610K-T1-E3_SOT23 PR11
2
200_0603_5% 1K_1206_5%
CHGRTCP 1 2 N1 3 1 VS
PD4
1
2 1 N3 1 2
VIN B+
1
1
2
PC8 PR13 2
2
2
31 51_ON# 1 2 1 2
PR15 PR16
22K_0402_1% 1K_1206_5%
RTCVREF
1
PR18 PR19
PR17 100K_0402_1% 2.2M_0402_5%
1
PU2 200_0603_5% 1 2 2 1
PR21 PR22 G920AT24U_SOT89 VL PR20
560_0603_5% 560_0603_5% 3.3V 499K_0402_1%
2
1 2 1 2 3 2 N2
+CHGRTC OUT IN
2
1
8
PD6 PU1B
1
GND PD5 2 5
P
PC9 PC10 RLZ16B_LL34 4,16,36,38 MAINPWON 1 7
+
10U_0805_10V4Z 1 1U_0805_25V4Z O
3 6 2 1 VL
37 ACON
2
1
G
2
1
RB715F_SOT323 LM393DG_SO8 PR23 PR24
4
1
1
34K_0402_1% 499K_0402_1% PC11
1
PC12 PR26 1000P_0402_50V7K
2
1000P_0402_50V7K PC13 PR25 191K_0402_1%
2
1000P_0402_50V7K 66.5K_0402_1%
2
3 3
PJ1
PJ2 +1.8VALWP 2 1 +1.8VALW PR27
2 1
1
+3VALWP 2 1 +3VALW PQ2 D 47K_0402_1%
2 1 @ JUMP_43X118 PACIN
2 2 1
@ JUMP_43X118 (8A,320mils ,Via NO.= 16) RHU002N06_SOT323
G
(5A,200mils ,Via NO.= 10) Precharge detector S
3
PJ3 PJ4
15.97V/14.84V FOR
1
+5VALWP 2 2 1 1 +5VALW +1.2VSP 2 2 1 1 +1.2VS
@ JUMP_43X118 @ JUMP_43X118
ADAPTOR PQ3
DTC115EUA_SC70
(5A,200mils ,Via NO.= 10) (6A,240mils ,Via NO.= 12)
PJ5 2 +5VALWP
3
@ JUMP_43X79
(120mA,40mils ,Via NO.= 2) (2A,80mils ,Via NO.= 4)
PJ7
PJ8 +1.5VSP 2 1 +1.5VS
2 1
+1.05VSP 2 2 1 1 +1.05VS
@ JUMP_43X39
@ JUMP_43X79
(5A,200mils ,Via NO.= 10) (0.35A,40mils ,Via NO.=2)
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DCIN & DETECTOR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 35 of 48
A B C D
A B C D
VL VS VL
PC128 560P_0402_50V7K
2
1 2 VMB
PF2 PL2 PR28
1
1 1
1
1K_0402_1% 47K_0402_1%
1
2 ALI/NIMH# 1 2 1 2 1 2
+3VALW
2
ID AB/I PR30 PR32
B/I 3
8
4 TS_A 47K_0402_1% 13.7K_0402_1% PU3A
TS EC_SMDA PC15 PC16
5 1 2 3
P
SMD +
1
6 EC_SMCA 1000P_0402_50V7K 0.01U_0402_25V7K 1 2 1 2 PQ4
2
SMC PR33 TM_REF1 O DTC115EUA_SC70
GND 7 2 -
G
1K_0402_1% PD7
@ SUYIN_250005MR007G132ZR LM393DG_SO8 1SS355_SOD323
4
2
3
2
0.22U_0805_16V7K
PR35
22K_0402_1%
PR34 100_0402_5%
1
PC17
100_0402_5%
1000P_0402_50V7K
PR36
ALI/MH# 29,37
1
2 1 VL
PC18
PR38 PR37
2
6.49K_0402_1% 100K_0402_1%
2
2 1 +3VALW
1
PR39
100K_0402_1%
1
2
PR40
1K_0402_1%
2 2
2
VL VL
2
PR41
PH2 47K_0402_1%
100K_0603_1%_TH11-4H104FT PR42
47K_0402_1%
1
1 2
PR43
8
10.7K_0402_1% PU3B
PQ5 1 2 5
P
TP0610K-T1-E3_SOT23 +
O 7 2 1
TM_REF1 6 -
G
3 3
B+ 3 1 +VSBP PD8
1
LM393DG_SO8 1SS355_SOD323
4
0.22U_1206_25V7K
0.1U_0603_25V7K
PC19 PR44
1
100K_0402_1%
0.22U_0805_16V7K 22K_0402_1%
2
1
1
PR45
PC20
PC21
2
2
PR46
2
22K_0402_1%
VL 1 2
@
100K_0402_1%
2
PR47
PR48
1
0_0402_5% D
1 2 2
38,39 POK G
0.1U_0402_16V7K
S PQ6
3
1
PC22
RHU002N06_SOT323
2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BATTERY CONN / OTP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 36 of 48
A B C D
A B C D
Fosc=14100/Rt=14100/47=300KHz
Iadp=0~3.125A
Charger
PR49
B+ PQ7
P2 PQ9 P3
PQ8 0.02_2512_1% AO4407_SO8
AO4407_SO8 AO4407_SO8 1 8
8 1 1 8 1 4 2 7
VIN 7
6
2
3
2
3
7
6 2 3 PJ9 CHG_B+ 3 6
5
5 5 2 2 1 1
4.7U_1206_25V6K
4
1
1 1
2200P_0402_50V7K
200K_0402_1%
0.1U_0603_25V7K
4.7U_1206_25V6K
0.1U_0603_25V7K
PC129 @ JUMP_43X118
4
1
1
1
PC23
PR50
PC24
PC25
560P_0402_50V7K
1
47K_0402_5%
PC26
PC27
P2
1
PR52
2
PR51
47K_0402_1%
2
1 2
VIN
0_0603_5%
10K_0402_1%
2
2
PR53
PQ10 PU4
PR54
DTA144EUA_SC70 MB39A126PFV-ER_SSOP24
47K
1 -INC2 +INC2 24
3
2
1
2 PR55 PC28 PR56
2
47K
10K_0402_1% 4700P_0402_25V7K 100K_0402_1%
1
MB39A126 1 2 1 2 2 1 2 23 ACOFF#
OUTC2 GND PC29 PQ11
4
0.22U_0603_16V7K AO4407_SO8
1
3 22 CS 1 2
1
+INE2 CS
1
PC30
0.1U_0603_25V7K
10K_0402_1%
30K_0402_1%
0.01U_0402_25V7K
4 -INE2 VCC 21 1 2
1
2 ACOFF ACOFF 29
5
6
7
8
1
PC31
PR57
PR58
2
5 ACOK OUT 20
PC32
2
0.1U_0603_25V7K PQ12
2
3
PQ13 DTC115EUA_SC70
LXCHRG
6 19 1 2
3
VREF VH
1
150K_0402_1%
0.22U_0603_16V7K
DTC115EUA_SC70
PR59
1
1
D
PC33
PL3 PR60
2 PR61 PC34
7 ACIN XACOK 18
PR62 VIN 16UH_LF919AS-160M=P3_3.7A_20% 0.02_2512_1% BATT+
2
G 1K_0402_1% 2200P_0402_50V7K 47K_0402_1% 1 2 1 4 BATT+ 2
2
S MB39A1261 2 1 2 8 17 1 2
3
-INE1 RT
1
47K_0402_5%
EC31QS04
EC31QS04
PQ14 2 3
PD9
PD14
RHU002N06_SOT323
PR63
4.7U_1206_25V6K
4.7U_1206_25V6K
4.7U_1206_25V6K
9 +INE1 -INE3 16
560P_0402_50V7K
PR64 PR65 PR66 PC35
1
PC36
PC37
PC38
IREF 162K_0402_1%
29 10K_0402_1% 33K_0402_1% 1500P_0603_50V7K
PC130
1 2 2 1 10 15 MB39A126 1 21 2 @
2
OUTC1 FB123
1
2
100K_0402_1%
0.01U_0402_25V7K
2 PR67
1
PC39
G VL 1 2 11 14
SEL CTL
47K_0402_5%
PR68
S PQ15 PC40
3
1
RHU002N06_SOT323 100K_0402_1% 10P_0402_50V8J
2
PR69
12 -INC1 +INC1 13 1 2
2
2
PD10
RLS4148_LLDS2
ACOFF# 1 2
2
29,36 ALI/MH#
IREF=0.932*Icharge
PR70
22K_0402_1%
IREF=0.466~3.1V PQ16
3
35 ACON +3VALW
3 CC=3A , IREF=3.144V 3
Charge voltage
47K_0402_5%
CS (100K/(100K+162K))*3.144V=1.2V
1
1.2/(20*0.02)=3A
1
499K_0402_1% 340K_0402_1%
1
VS
2
PR72
2
0.01U_0402_25V7K
1
2
1
PC42
PQ17 CP Point=3.125A
3
1
DTC115EUA_SC70
PR73
2 5V*(10K/(30k+10k))=1.25V
2
29 FSTCHG
1.25V/(20*0.02)=3.125A
2
8
PQ18 PU5A
3
DTC115EUA_SC70
+ 3
P
29 BATT_OVP 1 0
- 2
105K_0402_1%
1
0.01U_0402_25V7K
LM358DT_SO8
1
PR74
PC43
LI-3S :13.5V----BATT-OVP=1.5V
2
LI-4S :18V----BATT-OVP=2V
2
BATT-OVP=0.111*BATT+
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CHARGER
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 37 of 48
A B C D
5 4 3 2 1
+3.3VALWP/+5VALWP
BST_5V BST_3V
3
D D
PD11
DAP202U_SOT323
B+++ B+++
PJ10 VL
1
B+ 1 1 2 2
B+++
5
6
7
8
4.7U_1206_25V6K
4.7U_1206_25V6K
4.7U_1206_25V6K
4.7U_1206_25V6K
2200P_0402_50V7K
@ JUMP_43X118
D
D
D
D
1
8
7
6
5
PC47
PC48
PC44
PC45
2
PC46
10_1206_5%
10_1206_5%
47_0402_5%
PQ20 PQ19
D
D
D
D
2
1
1
SI4800BDY-T1-E3_SO8 SI4800BDY-T1-E3_SO8
2
G
S
S
S
PR76
PR77
PR75
PC49
0.1U_0402_16V7K
4
3
2
1
G
S
S
S
DH_3V
0.1U_0603_25V7K 1
1
2
3
4
2
PR78
2.2U_0805_25V6K
2.2U_0805_25V6K
0_0603_5%
5
6
7
8
DH_5V 1 2 VL
2VREF_8734
D
D
D
D
1
PC52
4.7U_0805_6.3V6K
PC50
PC51
200K_0402_1%
200K_0402_1%
PQ21
8
7
6
5
2
SI4810BDY-T1-E3_SO8
G
S
S
S
1U_0603_6.3V6M
PR79
PR80
PQ22
D
D
D
D
SI4810BDY-T1-E3_SO8
4
3
2
1
1
PC53
DH_5V-1
PC54
C C
1
G
S
S
S
2
1
2
3
4
1
1
PC55
18
20
13
17
2
340K_0402_1%
340K_0402_1%
PL4 0.1U_0603_25V7K PU6
2
PR82
4.7U_LF919AS-4R7M-P3_5.2A_20% 2 1 2 PR81 1 BST_5V-1
14
V+
LD05
TON
VCC
BST5
PR83
0_0603_5% 5 ILIM3 PR84
ILIM3 0_0603_5%
16
+5VALWP DH5
1
2
1
LX_5V 15 PL5
1
DL_5V LX5 ILIM5 PC56 4.7U_LF919AS-4R7M-P3_5.2A_20%
19 DL5 ILIM5 11
21 0.1U_0603_25V7K
FB5 OUT5 BST_3V-1 2 PR85
9 FB5 BST3 28 1 2 1
1 26 DH_3V-1 0_0603_5%
PD12
2
N.C. DH3
10.5K_0402_1%
PR86 24 DL_3V
DL3 LX_3V
VS 1 2 1 2 6 SHDN# LX3 27 +3VALWP
2
4 ON5 OUT3 22
2.2U_0805_25V6K
PR87
6.81K_0402_1%
47K_0402_1% 3
RLZ5.1B_LL34 ON3
2
PR88 7 FB3
FB3
150U_V_6.3VM_R18
PR89
1 1 2 12 2
35,37 PACIN SKIP# PGOOD
1
2
PC58
@ 10K_0402_1%
1
PRO#
PC57
LDO3
8
GND
REF POK 36,39
PR90
2
1
100K_0402_1% PR173
2 0_0402_5% 2VREF_8734 1
2
23
25
2 10
@ MAX8734AEEI+_QSOP28
2
2
0.22U_0603_10V7K
4.7U_0805_6.3V6K
6.81K_0402_1%
+ PC59
1
PR91
150U_V_6.3VM_R18
1
PC60
PC61
PR92
10K_0402_1%
PR93
B VL 0_0402_5%
2 B
2
1
1
1
806K_0603_1%
1
PR94
2
PR95
0_0402_5%
2 1
4,16,35,36 MAINPWON
1
PC62
0.047U_0603_16V7K
2
A A
PJ11
2 1 B+
2 1
1
@ JUMP_43X118
1
PC63 PC64 PR96
1
4.7U_1206_25V6K 4.7U_1206_25V6K 0_1206_5%
PC65 PC66
2
4.7U_1206_25V6K 4.7U_1206_25V6K
2
1
+5VALWP 1
2
PC67
1
4.7U_0805_6.3V6K PC68 PR97 PC69
0.1U_0603_25V7K 2.2_0603_5% 2.2U_0805_10V6K
2
PD13
1
DAP202U_SOT323
3
8
7
6
5
BST_1.8V-1
D
D
D
D
+1.2V PQ23
BST_1.2V-1
SI4800BDY-T1-E3_SO8
PC70 PC71
14
28
G
S
S
S
+1.2VSP 0.01U_0402_25V7K PU7 0.01U_0402_25V7K
5
6
7
8
PL6 2 1 12 SOFT1 17 2 1
VIN
VCC
1
2
3
4
1.8U_D104C-919AS-1R8N_9.5A_30% DH_1.2V-2 SOFT2
D
D
D
D
1 2 LX_1.2V PC72 PC73 PQ24
0.1U_0402_16V7K 0.1U_0402_16V7K SI4800BDY-T1-E3_SO8
1 2 1 1 2BST_1.2V-2 6 23 BST_1.8V-2
1 2 2 1
BOOT1 BOOT2
+1.8VALWP
2
G
S
S
S
PR98 PR99
+ PC74 PR100 0_0603_5% 0_0603_5%
4
3
2
1
8
7
6
5
220U_6.3V_M_R13 @ 4.7_1206_5%
1 2 DH_1.2V-1 5 24 DH_1.8V-1 1 2 DH_1.8V-2 PL7 +1.8VALWP
D
D
D
D
2
1
PR101 UGATE1 UGATE2 PR102 1.8U_D104C-919AS-1R8N_9.5A_30%
1
5
6
7
8
2
G
S
S
S
2.21K_0402_1% 0.01U_0402_25V7K PR105 PR106
2
PC76 2K_0402_1% 2K_0402_1% PR104 2
D
D
D
D
2
1
2
3
4
2
ISEN1 ISEN2
1
PQ26
PR107 DL_1.2V 2 27 SI4810BDY-T1-E3_SO8 PR108 + PC77
2 1
LGATE1 LGATE2
1
G
S
S
S
0_0402_5% 0_0402_5% PC78 PR109 220U_6.3V_M_R13
PC79 0.01U_0402_25V7K
1
4
3
2
1
@ 680P_0603_50V8J 2
2
3 26 10.2K_0402_1%
1
PGND1 PGND2 DL_1.8V
9 VOUT1 VOUT2 20
VSE_1.2V 10 19 VSE_1.8V
SUSP# VSEN1 VSEN2
1 2 8 EN1 EN2 21 1 2 +3VALW
25,29,30,34,40 15 16 PR110 @ 0_0402_5%
PR111 0_0402_5% PG1 PG2/REF
GND
DDR
11 18 PR112 0_0402_5%
OCSET1 OCSET2
1
1
2 1
2
1
PR113 ISL6227CAZ-T_SSOP28 POK 36,38 PR114 PR115
13
1
1
6.49K_0402_1% PR116 PC80 @ 0_0402_5% 10K_0402_1%
1
@ 0_0402_5% @ 0.1U_0402_16V7K PR118 PR117
100K_0402_1% PC81
2
2
@ 0.1U_0402_16V7K
1
2
2 100K_0402_1%
3 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.8V / 1.2V
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 39 of 48
A B C D
5 4 3 2 1
+1.2VS
+5VS
1
PJ12
1
@ JUMP_43X79
2
D
PC82 D
2
1U_0603_6.3V6M
2
6
1
PU8
5 PC83
VCNTL
VIN 22U_1206_6.3V6M
7
2
POK
VOUT 4
PR119
VOUT 3 +1.05VSP
0_0402_5% 1
1
SUSP# 1 2 8 2
EN FB
22U_1206_6.3V6M
PR120 + PC85
GND
PC84
9 PC86 @ 150U_D_6.3VM
2
VIN
1
316_0402_1%
2
PC87 2
2
@ 0.01U_0402_25V7K APL5912-KAC-TRL_SO8
2
1
0.01U_0402_25V7K
PR122 PR121
1
@ 0_0402_5% D 1K_0402_1%
1 2 2 PQ27
2
34 SUSP G
S @ RHU002N06_SOT323
3
1
PC88
@ 0.01U_0402_25V7K
2
+1.8V
C C
1
PJ13
1
@ JUMP_43X79
2
PU9
2
1 VIN VCNTL 6 +3VALW
2 GND NC 5
1
1
PC89 3 7 PC90
10U_1206_6.3V7K PR123 VREF NC 1U_0603_6.3V6M
2
1K_0402_1% 4 8
VOUT NC
9
2
TP
APL5331KAC-TRL_SO8
1
PR125 +0.9VSP
1
0_0402_5% D PR124
1 2 2 1K_0402_1% PC91
1
34 SUSP G
2
1
S PQ28 PC92
2
PC93 10U_1206_6.3V7K
2
@ 0.1U_0402_16V7K
2
RHU002N06_SOT323 0.1U_0402_16V7K
B B
PJ14 PU10
@ JUMP_43X118 PC94 2
1U_0603_6.3V6M GND
1
3 4
2
25,29,30,34,39 SUSP# 2 1
PR126 PC96
0_0402_5% 0.33U_0603_10V7K
2
2
PC97
@ 0.1U_0402_16V7K
1
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.05V / 0.9V / 1.5V
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 40 of 48
5 4 3 2 1
5 4 3 2 1
+5VS
CPU_B+ B+
PR127 PL8
5VS12 1 FBMA-L18-453215-900LMA90T_1812
1 2
0.01U_0402_25V7K
0_1206_5%
2200P_0402_50V7K
0.1U_0603_25V7K
PR128
3300P_0402_50V7K
PC98
10_0402_5% 1
680P_0603_50V7K
10U_1206_25VAK
10U_1206_25VAK
10U_1206_25VAK
220U_25V_M~N
1
200K_0402_5%
PC99
PC100
PC101
PC102
PC103
PC104
PC123
PC131
+
2
2 PR129 1
2
2
PC105
2
D D
2
2.2U_0603_6.3V6K 2
2
PR130 PC106
1
13K_0402_5% 1U_0603_6.3V6M
5
PQ29
PU11
1
NTC 1_0603_5% SI7840DP-T1-E3_SO8
100K_0402_5% V CC 19 25 PR131
Vcc VDD
PR132 1 2DH1_CPU-2
4
1 2 6 8 0_0603_5% 0.22U_0603_16V7K
THRM TON PR134 PC107
PR133 0_0402_5% 2 1 31 30 BST1_CPU 1 2 BSTM1_CPU 1 2
5 CPU_VID0 D0 BST1 +CPU_CORE
3
2
1
PR135 0_0402_5% 2 1 32 29 DH1__CPU-1 PL9
5 CPU_VID1 D1 DH1 P_0.36H_ETQP4LR36WFC_24A_20%
PR136 0_0402_5% 2 1 33 28 LX1__CPU 2 1 +CPU_CORE
5 CPU_VID2 D2 LX1
1
6.8_1206_5%
680P_0603_50V7K 2.1K_0402_1%
PR137 0_0402_5% 2 1 34 26 DL1__CPU
5 CPU_VID3 D3 DL1
5
6
7
8
5
6
7
8
10_0402_5%
PR138
PR140
PR139 0_0402_5% 2 1 35 27 PQ30
5 CPU_VID4 D4 PGND1 IRF8113PBF_SO8
PR141 0_0402_5% 2 1 36 18
5 CPU_VID5
2
D5 GND
5
VCCSENSE
3.48K_0402_1%
1
PR142 0_0402_5% 1 2 37 17 CSP1__CPU 4 4 PR144 PH3 NTC
5 CPU_VID6 D6 CSP1
1
PQ31 1 2 1 2
DL1__CPU
PR1452 71.5K_0402_1%
1 7 16 CSN1_CPU IRF8113PBF_SO8
TIME CSN1
1
PC124
PC108
PR143
10KB_0603_5%_ERTJ1VR103J
2
2 1 9 12 FB_CPU 1 2
3
2
1
3
2
1
CCV FB
1
PC125
47P_0402_50V8J PC109
2
1 2 11 10 C CI_CPU PC110 0.22U_0603_16V7K
REF CCI
2
C PC111 0.22U_0603_16V7K 39 DH2_CPU-1 C
4,15 DPRSLPVR 1 2 DPRSLPVR DH2 21
PR146 499_0402_1%
2
1 2 40 20 BST2_CPU
4 H_DPRSTP# DPRSTP BST2
PR147 0_0402_5% @ 180P_0402_50V8J PR148
1 2 3 22 LX2_CPU PR150 0_0402_5% 0_0402_5%
5 PSI# PSI LX2
PR149 0_0402_5% 1 2
+3VS 2 24 DL2__CPU
1
PWRGD DL2 @ 180P_0402_50V8J PR151 @ 3K_0603_1% PC112 @ 0.022U_0402_16V7K
0_0603_5%
1 23 1 2 1 2 CPU_VCC_SENSE
CLKEN PGND2
PR152
2
1
0_0402_5% VRHOT CSN2 PR156 100_0402_5%
2
4 13
1
POUT GNDS
1
PC127
PC126
1 2 1 2 1 2 PC113
BSTM2_CPU
17 VGATE 0_0402_5% 4700P_0402_25V7K
1
PR160 NTC PR158 PR159
TP
2
1 2 @ 3K_0603_1% @ 3K_0603_1%
12 CLK_ENABLE# MAX8770GTL+_TQFN40
41
2
1 2 1 2
1 2 PC115
29 VR_ON
@ 180P_0402_50V8J PC114
1
2
CPU_B+
0.22U_0603_16V7K
PR162 PR161 470P_0402_50V8J
1
0_0402_5% PR163 +3VS @ 180P_0402_50V8J 20K_0402_1%
PC116
@ 10K_0402_1% 4700P_0402_25V7K
1
10U_1206_25VAK
10U_1206_25VAK
10U_1206_25VAK
PR165 PR164
1
56_0402_5%
1
PC117
PC118
100_0402_5%
1
PC119
PQ32
2
B VSSSENSE SI7840DP-T1-E3_SO8 B
29.6
2
5 VSSSENSE 1_0603_5%
PR166
1
1 2 DH2_CPU-2 4
1 2 PR168
29 POUT 10_0402_5%
2
PR167 10K_0402_1%
PC120
2
3
2
1
0.1U_0402_16V7K 2 1
1
6.8_1206_5%
PL10
1
P_0.36H_ETQP4LR36WFC_24A_20%
5
6
7
8
PR169
5
6
7
8
2.1K_0402_1%
PQ33
1
PQ34
PR170
4
680P_0603_50V7K
DL2__CPU
4
2
1
PC121
PR171
3
2
1
3.48K_0402_1% NTC PH4
3
2
1
2
IRF8113PBF_SO8 IRF8113PBF_SO8 1 2 1 2
10KB_0603_5%_ERTJ1VR103J
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+CPU_CORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 41 of 48
5 4 3 2 1
5 4 3 2 1
15 Change part C295, C298, C300, 0.1U_0402_6.3V4Z 0.01U_0402_16V7K ALINK coupling cap for differential signal, 0.2
C305 ATI recommend
16 Net connection U9.A21(USB_HSDP1+) USBP1- USBP1+ Fix USB function fail 0.2
U9.B21(USB_HSDM1-) USBP1+ USBP1-
B B
16 Net connection R760.1 (MAINPWONR PU) +3VS +3VALW For SB mainpwron (Gevent) is S5 power pin 0.2
25 Net connection R740.2 (PH sensor) N17081292 NBA_PLUG For audio jack change to normal open 0.2
R785 (Mic sensor) N16810569 MIC_SENSE
Del part R872, R873 0_0402_5%(@)
R786, R842 100K_0402_5%
Q59, Q67 2N7002_SOT23
Change part JP34, JP35 FOX_JA6033L-B5S3-7F FOX_JA6333L-B3T0-7F
26 Net connection U47.16 (VSS) GND CVSS Fix audio left channel no function 0.2
0.2
29 Change part R116 10K_0402_5% 100K_0402_5% Fix BATT charge LED always light, for power
workaround
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 42 of 48
5 4 3 2 1
5 4 3 2 1
15 Add part D28 CH751H-40_SC76 For C3 pop-up and C1e HW rework. ATI recommend 0.2
R899 10K_0402_5% (PA_IXP400AC16)
C972 15P_0402_50V8D
Net connection U9.D27 (SB BMREQ#) BM_REQ# SB_BM_REQ#
15 Change part U36 TC7SH00FU_SSOP5 74LVC1G14GW_SOT353-5 C4 timing on Yonah-M platforms workaround, 0.2
R802 200K_0402_5%(@) 150K_0402_5% ATI recommend (PA_IXP400BR4)
Add part R900, R901 10K_0402_5%
C973 330P_0402_50V7J
D29 CH751H-40_SC76
Q6 MMBT3904_SOT23
Q1 2N7002_SOT23
R902 0_0402_5%
C U9.E29 (SB STPCLK#) C
Net connection H_STPCLK# SB_STPCLK#
BOM Structure Q62, U36, C832, @
C833, D42
12 Change part R255 0_0402_5% 4.7K_0402_5%
BOM Structure C831 @
7,8,9 Change part U21 216CPP4AKA21HK 216DCP4ALA12FG For Product spec 0.2
RC410ME RC410MD
0.2
9 Change part C650 220U_D_6.3VM(@) 220U_Y_4VM(@) For height limit, change to 2mm
10 C148 220U_D2_4VM 220U_Y_4VM
11 C52 220U_D2_4VM 220U_Y_4VM
0.2
17 BOM Structure C884, C885, 2H@ For 2 HDD configuration
C886, C887
0.2
B 26 Change part SW10 EVQWA4001_6P XRE094 2 For new digital VR B
26 Add part C977, C978 1U_0402_6.3V4Z Reserve for ALC861D/ ALC268 HP out, for Vista 0.2
BOM Structure C954, C955 @ integrate driver
25 Net connection U38.14 (LINE2_L) NC LIN_L
U38.15 (LINE2_R) NC LIN_R
4 0.2
DEL PART R463 47K_0402_5%(@) Remove useless parts
R465 10K_0402_5%(@)
8
DEL PART R762 4.7K_0402_5%
R23 4.7K_0402_5%(@)
19
DEL PART R138, R139 10K_0402_5%(@)
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 43 of 48
5 4 3 2 1
5 4 3 2 1
14 Change Part L1, L2, L3 FCM2012C-800_0805 BK1608LL121-T 0603 EMI solution for CRT 0.2
B B
BOM structure C1, C2, C3 @
14 Change Part JP23 SUYIN SUYIN ME change 0.2
020133MR004S529ZL~N 020167MR004S511ZR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 44 of 48
5 4 3 2 1
5 4 3 2 1
29 Del part R867, R868 0_0402_5% Azalia signal, no need two serial reisistor 0.2
Net connection R714.2 (BITCLK to HD) N52707434 AZ_BITCLK_HD
R715.2 (BITCLK to MDC) N52707448 AZ_BITCLK_MD
B B
28 Add part R920, R921, 0_0402_5%(@) Reserve resistor for USB signal 0.2
R922, R923
26 Add part R924 0_0402_5% (@) Reserve function for EC control HP_EN 0.2
C984 0.01U_0402_16V7K(@)
26 BOM Structure C406, C407, @ For LVDS EMI solution 0.2
C810, C811
29 Change part R101 0_0402_5% 8.2K_0402_5% Board ID change to 1 for Rev0.2 0.2
25 Add part R925 39.2K_0603_5% For ALC861 +Vista driver 0.3
26 BOM Sturcture C977, C978 @ For Vista intergated driver 0.3
C954, C955 @
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 45 of 48
5 4 3 2 1
5 4 3 2 1
26 Del part R919 1K_0402_5%(@) Remove POST BEEP no sound issue 0.3
R916 20K_0402_5%(@)
R917 2.4K_0402_5%(@)
Q67 2N7002_SOT23(@)
29 Change part R101 8.2_0402_5% 18_0402_5% PCB revision ID 0.3
4 BOM Sturcture R491 @ For C4 timing 0.3
15 R167 @
R713 @
19 BOM Sturcture R334 @ 48M oscillator select 0.3
R335 @
C
20 Del part R235 10_0402_5%(@) LAN PCI clock for EMI 0.3 C
26 Add part R928, R929 20_0402_5% HP serial resistor for AP2056 noise when use mono HP 0.3
Change part R862, R863 39K_0402_5% 24K_0402_5% gain adjust
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 46 of 48
5 4 3 2 1
5 4 3 2 1
16 Del part C974 20P_0402_50V8J For USB logo and EMI 0.3
Y7 48MHZ_20PF_
R910 1M_0402_5%
R911 0_0402_5%
Change part C975 20P_0402_50V8J 12P_0402_50V8J
R912 0_0402_5% 30_0402_5%
Net connect R912.1 (48MHz source) 48M_XTAL1 OSC_48MHZ
X1.3 (48MHz source) 48M_XTAL1 OSC_48MHZ
C975.2 (48MHz source) 48M_XTAL1 OSC_48MHZ
BOM Structure L46, R74, C267, @
X1
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, October 11, 2006 Sheet 47 of 48
5 4 3 2 1
5 4 3 2 1
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 05, 2006 Sheet 48 of 48
5 4 3 2 1