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2. Common Collector
Amplifier
8. Astable
Multivibrator
9. Monostable Multivibrator
1
Circuit Diagram:
Function Generator
(0-3MHz)
Model Graph:
Base diagram:
2
Experiment no.1
Common Emitter Amplifier
Aim:
To design and construct a common emitter amplifier and to draw the frequency
response characteristics and to obtain the bandwidth.
Given Data:
VCC = AV = hie =
VCQ = S = fL =
Formulae:
AV ∗hie
1. Collector Resistance, Rc =
h fe
where,
AV = Voltage Gain
V CC −V CE −I C RC
2. Emitter Resistance, R E=
IE
; ¿ ¿)
where,
VCC = Supply voltage
IE = Emitter current
IC = Collector current
VCE = Collector to Emitter Voltage
3. Stability factor, S=
(
( 1+h fe ) 1+ R
b
E
)
Rb
( 1+ hfe +
RE )
3
4
where,
Rb = Base Resistance
hfe = forward current gain
hie = input impedance
4. Base voltage, V B =V BE + I E R E
where,
RE = Emitter Resistance
VBE = Base to emitter voltage
V CC Rb
5. R 1=
VB
V CC Rb
6. R 2=
V CC −V B
RE 10
7. XC ≪ RE , XC = ; Emitter bypass Capacitance, C E = 2 π f R
E E
10 L E
Ri 10
8. X C ≪ Ri , X C = ; Coupling Capacitance, C c = 2 π f R ;
C C
10 L I
( Ri=hie∨|R 1|∨R2 ¿
V0
9. Voltage Gain, AV =
Vi
where,
Vo = output voltage
Vi = input voltage
A V ∗√ 2
11. 3db line calculation ¿ 20 log 10 ( max
2 )
5
Observation:
Table: Vi = ____mV
6
Procedure:
1. The circuit is designed and connections are made as per the circuit diagram.
2. Using the function Generator the input voltage and frequency are set to a suitable
value.
3. The frequency of the signal is increased and the output waveform is obtained.
4. The output voltage is measured for various frequencies.
5. Gain in dB is calculated and Band Width is obtained from the frequency response
characteristics.
7
8
Result:
Lists Marks
Calculations (15)
Experimentation (15)
Viva (10)
Graph (05)
Result (05)
Total (50)
Staff signature
9
Circuit Diagram:
Function Generator
(0-3MHz)
10
Experiment no.2
To design and construct a common collector amplifier and to draw the frequency
response characteristics and to measure the input and output impedances.
Given Data:
VCC = fL =
VCQ = hfe =
ICQ = hie =
Ri =
Formulae:
( V CC −V CE )
1. Emitter Resistance, R E= ;(IE IC)
IC
where,
VCC = Supply voltage
IE = Emitter current
IC = Collector current
VCE = Collector to Emitter Voltage
where,
RB = Base Resistance
RE = Emitter Resistance
3. Base voltage, V B =V BE + I E R E
where,
VB= Base voltage
RE= Emitter Resistance
VBE= Base to emitter voltage
11
Model Graph:
Base diagram:
12
V CC R B
4. R 1=
VB
V CC R B
5. R 2=
V CC −V B
Ri 10
6. XC ≪ Ri, XC = ; Coupling CapacitanceC c = 2 π f R ,
c c
10 L i
V0
7. Voltage Gain, AV =
Vi
where,
Vo = output voltage
Vi = input voltage
8. Gain ¿ 20 log10 ( A V )
A V ∗√2
9. 3db line calculation ¿ 20 log 10 ( max
2 )
Procedure:
1. The circuit is designed and connections are made as per the circuit
diagram.
2. Using the function Generator the input voltage and frequency are
set to a suitable value.
3. The frequency of the signal is increased and the output waveform is
obtained.
4. The output voltage is measured for various frequencies.
5. Gain in dB is calculated
13
1. The connections are made as per the circuit diagram.
2. By varying the resistance output voltage is set half of the input voltage.
3. Now the output resistance is measured using the multi meter.
Observation:
Table :
Vi = ____ V
14
15
16
Result:
Lists Marks
Calculations (15)
Experimentation (15)
Viva (10)
Graph (05)
Result (05)
Total (50)
Staff signature
17
Circuit Diagram:
Function Generator
(0-3MHz)
Model Graph:
Base diagram:
18
Experiment no.3
To design and construct a Common Source JFET Amplifier and to draw the
frequency response characteristics.
Given Data:
VDD = fL = AV = rd =
R1 = R2 = gm =
Formulae:
1. Voltage Gain, AV =[−gm ( r d∨¿ R d ) ]
where,
rd= dynamic resistance between drain and source terminal
Rd = drain resistance
gm-trans conductance
2. Ri=( R 1∨¿ R2 )
3. R0 =( r d ∨¿ Rd )
10
4. Coupling Capacitance, C c = 2 π f R
L i
10
5. Source Capacitance,C s= 2 π f R
L s
V0
6. Voltage Gain, AV =
Vi
where,
Vo = output voltage
Vi = input voltage
7. Gain ¿ 20 log10 ( A V )
A V ∗√2
8. 3db line calculation ¿ 20 log 10 ( max
2 )
19
Observation:
Table : Vi = ______ V
20
Procedure:
1. The circuit is designed using design data and connections are made as per the
circuit diagram.
2. Using the function Generator the input voltage and frequency are set to a
suitable value.
3. The frequency of the signal is increased and the output waveform is obtained.
4. The output voltage is measured for various frequencies.
5. Gain in dB is calculated and the frequency response characteristic is plotted.
21
Result:
Lists Marks
Calculations (15)
Experimentation (15)
Viva (10)
Graph (05)
Result (05)
Total (50)
Staff signature
22
Circuit Diagram:
Model Graph:
Base diagram:
23
Experiment no.4
Given Data:
f= RBB = ᶯ= VV =
VBB = IP = IV =
Formulae:
VP
1. Intrinsic stand of ratio, ɳ=
V BB
where,
Vp = peak voltage
V BB−V P
2. Rmax =
IP
where,
Ip = peak current
V −V V
3. Rmin = BB
IV
where,
Rmin = minimum resistance
Vv = valley voltage
Iv = valley current
4. Optimum Resistance, Ropt =√ R max∗R min
where,
Rmax = maximum resistance
1
5.
C=
[
f ∗Ropt ∗ln
1
1−ɳ ( ) ]
0.7 R BB
6. R 2=
ɳ V BB
where,
24
RBB = inter base resistance
Observation:
Table :
Observed
Sl.No. Parameters
values
1. VP
2. VV
3. VO
4. f
5. R
25
Procedure:
1. The circuit is designed using design data and connections are made as
per the circuit diagram.
2. The value of the variable POT is varied until the designed value of the
frequency is reached.
3. The waveform of the voltage across capacitor V c and the output
waveform Vo is obtained.
4. The value of resistance R is measured which is used to obtain the
required frequency.
26
Result:
Lists Marks
Calculations (15)
Experimentation (15)
Viva (10)
Graph (05)
Result (05)
Total (50)
Staff signature
27
Circuit Diagram:
Model Graph:
28
Experiment no.5
To design and construct a RC Phase Shift Oscillator using op-amp and to study
its output voltage variation with feedback voltage.
Given Data:
fo = c=
Formulae:
1
1. Frequency, f o=
2 π √ 6 RC
1
2. Resistance,R1 = R=
2 π √6 f 0 C
where,
C-Capacitance
R2 R2
3. Feedback voltage gain, AV = ; ≥ 29 ; R2 ≥ 29 R1
f
R1 R1
Procedure:
1. The circuit is designed using given data and connections are made as per
the circuit diagram.
2. The power supply is switched ON.
3. The variable Resistance is adjusted to get an undistorted output signal.
4. The value of the resistance at that point is noted.
5. The output voltage and feedback voltage waveforms are obtained from
CRO.
6. Graphs are plotted.
29
Observation:
Table
Observed
S.no Parameters
values
1. Frequency, f
2. Feedback Voltage,Vf (pp)
3. Output Voltage Vo (pp)
4. Gain, (Vo/Vf)
5. Resistance (R2)
30
Result:
Lists Marks
Calculations (15)
Experimentation (15)
Viva (10)
Graph (05)
Result (05)
Total (50)
Staff signature
31
Circuit Diagram:
Vf
Model Graph:
32
Experiment no.6
To design and construct a Wien Bridge Oscillator and to study its output voltage
variation with feedback voltage.
Given Data:
f0 = C= R1 =
Formulae:
1
1. Frequency, f 0= 2 πRC
1
2. Resistance, R= 2 π f C
0
where,
C = capacitance
2 R R
2
3. Voltage gain, AV =1+ R ; A V ≥3 ; 1+ R ≥ 3
1 1
4. R2 ≥2 R1
Procedure:
1. The circuit is designed using given data and connections are made as per
the circuit diagram.
2. The power supply is switched ON.
33
3. The variable Resistance is adjusted to get an undistorted output signal.
4. The value of the resistance at that point is noted.
5. The output voltage and feedback voltage waveforms are obtained from
CRO.
6. Graphs are plotted.
Observation:
Table:
4 Frequency, f0
5 Resistance, R2
34
35
Result:
Lists Marks
Calculations (15)
Experimentation (15)
Viva (10)
Graph (05)
Result (05)
Total (50)
Staff signature
36
Circuit Diagram:
Model Graph:
37
Experiment no.7
Given Data:
Formulae:
R
5
1. β= R + R
5 6
1 5 R +R
6 6 R
2. Feedback Gain, AVf = β = R ≈ R ; R6 ≫ R 5
5 5
R6
3. Resistance, R5= A
Vf
10 R6
4. Feedback Capacitance, C f = 2 π f X ; X Cf = 100
L Cf
10
5. Emitter Capacitance, C E = 2 π f R
L E
10
6. Coupling Capacitance, C c = 2 π f R ; Ri ≈ hie
L i
V
0
7. Voltage Gain, AV = V
i
where,
Vo = output voltage
Vi = input voltage
8. Gain ¿ 20 log 10 ( A V )
38
A V ∗√2
9. 3db line calculation ¿ 20 log 10 ( max
2 )
Observation:
TABLE:
Vi = ____ mV
39
40
Procedure:
1. The circuit is designed using given data and connections are made
as per the circuit diagram.
2. Using the function generator the input voltage and frequency are
set to a suitable value.
3. The frequency of the signal is increased and the output waveform is
obtained.
4. The output voltage is measured for various frequencies.
5. Gain in dB is calculated and Band Width is obtained from the
frequency response characteristics.
6. The effect of negative feedback is studied.
41
Result:
Lists Marks
Calculations (15)
Experimentation (15)
Viva (10)
Graph (05)
Result (05)
Total (50)
Staff signature
42
Circuit Diagram:
43
Experiment no. 8
Astable Multivibrator
Aim:
Given Data:
f= Vcc = hfe = Ic =
Formulae:
CC V
1. Collector Resistance, RC =R C = I 1 2
C
where,
RC1 = Collector Resistance of transistor1
RC2 = Collector Resistance of transistor2
VCC = Supply voltage
IC = Collector current
C I
2. Minimum base current of transistor, I B = h ( min )
fe
3. I B=1.5 I B( min )
where,
IB = base current of transistor
V CC
4. Base Resistance, R B =R B = I
1 2
B
where,
RB1 = base Resistance of transistor1
RB2 = base Resistance of transistor2
VCC = supply voltage
IB = base current
5. Time Period of the clock pulse, T =1.38 RC
1 1
6. Frequency, f = T = 1.38 RC
1
7. Capacitance, C 1=C2 = 1.38∗R ∗f
B
44
45
Model Graph:
46
Procedure:
1. The circuit is designed using given data and connections are made as per the
circuit diagram.
2. The power supply is switched ON.
3. The Waveforms of VCE1, VCE2, VBE1, VBE2 are obtained from CRO.
4. Graphs are plotted.
47
Observation:
Table
1. VCE1 (max)
2. VCE2 (max)
3. VCE (sat)
4. VBE1(max)
3. VBE2(max)
4. VBE(sat)
5. TON
6. TOFF
7. T
8. f
48
Result:
49
Circuit Diagram:
Lists Marks
Calculations (15)
Experimentation (15)
Viva (10)
Graph (05)
Result (05)
Total (50)
Staff signature
50
51
Experiment no.9
Monostable Multivibrator
Aim:
Given Data:
ftrig = 100Hz
Formulae:
Q2 ON:
V CC −V CE ( sat )
1. Collector Resistance of Q2, RC = 2
IC
where,
VCC - Supply voltage
IC - Collector current
VCE(sat) - Collector to Emitter saturation Voltage
IC
2. Minimum Base current of Q2, I B = h 2 (min )
fe
V CC−V BE (sat)
4. Base resistance, R B= IB 2
Q1 ON:
where,
RC2–Collector Resistance of Q2
I
6. Current through R2, I 2= C
10
7. Voltage across R2, V R =V BE −V BB
2 2
where,
VBE2 –Base to Emitter Voltage of Q2
VR
8. Resistance, R2= I 2
52
9. On time of transistor, T ON =0.693∗R B C B
Model Graph:
53
where,
RB –Base Resistance
CB – Base Capacitance
V CC −V BE
10. Resistance, R1= {[ IB +I2
1
] }
−R C
2
Differentiator Circuit:
1
11. T trig= f
trig
T trig
12. Resistance, R=
10∗C
where,
C-Capacitance
Procedure:
1. The circuit is designed using design data and connections are made as per the
circuit diagram.
2. The power supply is switched ON.
3. Using the Function Generator Square wave signal is supplied.
4. The Waveforms of triggering pulse V t, the collector voltages VC1, VC2 are
obtained from CRO.
5. Graphs are plotted.
54
Observation:
Table:
1. VC1 (max)
2. VC2 (max)
3. VCE (sat)
4. VB1
5. VB2
6. VBE (sat)
7. TON
8. TOFF
9. T
10. f
55
56
Result:
Lists Marks
Calculations (15)
Experimentation (15)
Viva (10)
Graph (05)
Result (05)
Total (50)
Staff signature
57