EX.NO.

1 CURRENT SERIES FEEDBACK AMPLIFIER

Aim:
To design and obtain the frequency response of current series feedback amplifier and to
calculate the following parameters with and without feedback
1. Mid band gain
2. Bandwidth and cut off frequencies.

Apparatus required:

Transistor, Resistor, Capacitor, CRO, RPS, Function Generator

Design: (Without Feedback )

Given data :

SET - 1

Vcc = 15V , β = 0.9, fL = 1kHz, Ic=1mA, Stability factor = 7,

Rs = 680Ω, Av = 50dB , IE = 1.2mA .

SET - 2

Vcc = 15V , β = 0.7, fL = 1kHz, Ic=1.5mA, Stability factor =8,

Rs = 1KΩ, Av = 50dB , IE = 2mA .

SET - 3

Vcc = 15V , β = 0.6, fL = 2kHz, Ic=2mA, Stability factor = 5,

Rs = 680Ω, Av = 50dB , IE = 1.2mA .

Gain formula is given by Av = -hfe RLeff / Zi

Assume,
VCE = Vcc / 2, RLeff = Rc || RL,
re = 26mV / IE,
hie = β re
where re is internal resistance of the transistor.
hie = hfe re , VE = Vcc / 10
On applying KVL to output loop,
Vcc = IcRc + VCE + IERE
VE = IERE
Rc = ?
Since IB is very small when compared with IC,Ic approximately equal to IE
RE = VE / IE = ?

1
 VB = VBE + VE
VB = VCC . RB2 / RB1 + RB2
S = 1+ (RB /RE )
RB = ?
RB = RB1 || RB2
Find
Input Impedance , Zi = ( RB || hie )
Coupling and bypass capacitors can be thus found out.
Input coupling capacitor is given by , Xci = Z i / 10
Xci = 1/ 2πfCi
Ci = ?
output coupling capacitor is given by ,
Xco=(Rc || RL) / 10
Xc0 = 1/ 2πfCo
Co = ?
By-pass capacitor is given by ,XCE = 1/ 2πfCE
CE = ?
Design ( With feedback ) :
Remove the emitter capacitance ( CE )
β = -1 / RE
Gm = - hfe/ [(hie + RE ) || RB]
D = 1+ β Gm
Gmf = Gm / D
Zif = Z iD
Zof = ZoD

2
Circuit Diagram: Without Feedback:

With Feedback:

3
Model Graph:

Tabulation:

Vin = ……………..mV

S.No Frequency(Hz) Output Gain(dB) = Output Gain(dB) =

voltage(V) 20 log (V0/Vi) voltage(V) 20 log
(V0/Vi)

Theory:
When any increase in the output signal results into the input in such a way as to cause the
decrease in the output signal, the amplifier is said to have negative feedback. The advantages of
providing negative feedback are that the transfer gain of the amplifier with feedback can be
stabilized against variations in the hybrid parameters of the transistor or the parameters of the other
active devices used in the circuit. The most advantage of the negative feedback is that by proper
use of this, there is significant improvement in the frequency response and in the linearity of the
operation of the amplifier. This disadvantage of the negative feedback is that the voltage gain is
decreased.
In Current-Series Feedback, the input impedance and the output impedance are
increased. Noise and distortions are reduced considerably.

Procedure:
4
 1. The connections are made as shown in the circuit diagram.
2. Set the input voltage to a fixed value.
3. Keeping the input voltage as constant and measure the output voltage by varying
the input frequency ranges from 10 Hz to 3MHz. (With feedback)
4. Connect CE across RE in the circuit.
5. Measure the output voltage by varying the input frequency ranges from 10 Hz to
3MHz. (Without feedback)
6. The gain of the amplifier with and without feedback is calculated by using the
formulae 20 log(Vo/Vi)
7. The graph is drawn between gain and frequency.
8. From the graph, the mid band gain , cutoff frequencies and bandwidths are
calculated.

Result:
Thus the current series feedback amplifier was designed and constructed and the effect
of current-series feedback on the amplifier is observed. The voltage gain and frequency response
of the amplifier are obtained. The mid band gain, cut off frequencies and bandwidths were
calculated and compared with and without feedback amplifiers.

Parameters Current Series Amplifier Current Series Amplifier

Without feedback With feedback
Mid band gain
Cut off frequencies
Bandwidth

EX.NO. 2 VOLTAGE SHUNT FEEDBACK AMPLIFIER

5
Aim:
To design and obtain the frequency response of voltage shunt feedback amplifier and to
calculate the following parameters with and without feedback.
1. Mid band gain
2. Bandwidth and cut off frequencies.

Apparatus required:

Transistor, Resistor, Capacitor, CRO, RPS, Function Generator.

Circuit Diagram:

Without Feedback:

With

Feedback:
Model Graph:

6
Design:

Given data :

SET - 1

Vcc = 15V , fL = 1kHz, Ic=1mA.Stability factor = 10, Rs = 680Ω,

Av =40 dB

SET - 2

Vcc = 15V , fL = 1kHz, Ic=1.5mA.Stability factor = 5, Rs = 1kΩ,

Av =40 dB

SET - 3

Vcc = 15V , fL = 2kHz, Ic=2mA.Stability factor = 8, Rs = 680Ω,

Av =40 dB

Gain formula is given by

Av = -hfe RLeff / Z i

Assume, VCE = Vcc / 2

RLeff = R c | | RL

re = 26mV / IE
hie = β re where re is internal resistance of the transistor.

hie = hfe re

VE = Vcc / 10

On applying KVL to output loop,

Vcc = IcRc + VCE + IERE

VE = IERE

Rc = ?

Since IB is very small when compared with Ic

Ic approximately equal to IE

RE = VE / IE = ?

7
 VB = VBE + VE

VB = VCC . RB2 / RB1 + RB2

S = 1+ RB / RE

RB =?

RB = RB1|| RB2

Find ,Input Impedance, Zi = (RB || hie )

Coupling and bypass capacitors can be thus found out.

Input coupling capacitor is given by , Xci = Z i / 10

Xci = 1/ 2πf Ci

Ci = ?

output coupling capacitor is given by ,

X co=(Rc | | RL) /
10 Xc0 = 1/ 2πf Co

Co =?

By-pass capacitor is given by, XCE = 1/ 2πf CE

CE =?

Design ( With feedback ) :Connect the feedback resistance (Rf) and feedback capacitor (Cf) as

shown in the figure. Xcf = Rf / 10

Cf = Rf / 2πf x 10

Assume, Rf = 68 KΩ

β = -1 / Rf

Trans – resistance Rm = - hfe (RB| | Rf ) (Rc | | Rf ) / (RB| | Rf ) + hie

D = 1+ β Rm

Avf = Rmf / Rs

Rmf = Rm / D

8
 Zif = Zi / D, Zof = Zo / D

Tabulation:

Vin = ……………..mv

S.No Frequency(Hz) Output Gain(dB) = Output Gain(dB) =

voltage(V) 20 log (V0/Vi) voltage(V) 20 log
(V0/Vi)

Theory:

The Voltage shunt feedback amplifier is employed when precise gain and low values of
input and output impedances are required. The feedback network consists of a single resistance
Rf. Voltage developed across RL is sampled and feedback to input through Rf. The shunt
connections at input and output terminals reduce input and Output impedance. The amplifier works
as trans-resistance type voltage amplifier with β = If /Vo

Procedure:

1. The connections are made as shown in the circuit diagram.

2. Set the input voltage to a fixed value.
3. Keeping the input voltage as constant and measure the output voltage by varying
the input frequency ranges from 10 Hz to 3MHz. (Without feedback)
4. Connect the feedback resistor between the base of the transistor and Vcc.
5. Measure the output voltage by varying the input frequency ranges from 10 Hz to
3MHz. (With feedback)
6. The gain of the amplifier with and without feedback is calculated by using the
formulae 20 log(Vo/Vi)
7. The graph is drawn between gain and frequency.
8. From the graph, the mid band gain , cutoff frequencies and bandwidths are
calculated.

Result:

Thus the voltage shunt feedback amplifier was designed and the effect of voltage shunt
feedback on the amplifier was observed. The voltage gain and frequency response of the amplifier
were obtained. The mid band gain, cut off frequencies and bandwidths were calculated and
compared with and without feedback amplifiers.

Parameters Voltage Shunt Amplifier Voltage Shunt Amplifier

9
 Without feedback With feedback
Mid band gain
Cut off frequencies
Bandwidth

EX.NO.3 DESIGN OF HARTLEY OSCILLATOR

Aim :
To design and construct Hartley oscillator and find the frequency of oscillations

Apparatus required:
Write in Table format

Transistor, Resistors, Capacitors, CRO, RPS

Circuit Diagram :

Model Graph:

Design of Feedback Network ( Hartely Oscillator ) :

10
Given :

SET-1
L1 = 1mH ; f = 800kHz; Vcc = 12V ; Av =50 ; fL = 1Khz

SET-2
L1 = 2mH ; f = 500kHz; Vcc = 12V ; Av =50 ; fL = 2Khz

SET-3
L1 = 1.5mH ; f = 1000kHz; Vcc = 12V ; Av =40 ; fL = 1Khz

Av = 1 / β = -L1 / L2

F = 1/2π√(L1 + L2)C; C=?

Amplifier Design :Gain formula is given by

Av = -hfe RLeff / hie ( Av = 29, design given )

Assume, VCE = Vcc / 2

RLeff = R c | | RL

re = 26mV / IE
hie = β re where re is internal resistance of the transistor.

hie = hfe re

VE = Vcc / 10

On applying KVL to output loop,

Vcc = IcRc + VCE + IERE

VE = IERE

Rc = ?;RL = ?

Since IB is very small when compared with Ic

Ic approximately equal to IE

RE = VE / IE = ?

VB = VBE + VE

VB = VCC . RB2 / RB1 + RB2

11
 S = 1+ RB / RE

RB =?

RB = RB1|| RB2

Find RB1 & RB2

Input Impedance, Zi = (RB || hie )

Coupling and bypass capacitors can be thus found out.

Input coupling capacitor is given by , Xci = Z i / 10

Xci = 1/ 2πf Ci

Ci = ?

output coupling capacitor is given by ,

Xc0 = (Rc ‫׀׀‬RL) / 10

Xc0 = 1/ 2πf Co, Co =?

By-pass capacitor is given by, XCE = RE /

10 XCE = 1/ 2πf CE ,CE =?

Theory:

The Hartley oscillator is an electronic oscillator circuit in which the oscillation frequency
is determined by a tuned circuit consisting of capacitors and inductors. In the circuit diagram
resistors R1 and R2 give a potential divider bias for the transistor Q1. Re provides thermal stability
for the transistor. Ce is the emitter by pass capacitors, which by-passes the amplified AC signals.
If the emitter by-pass capacitor not there, the amplified ac voltages will drop across Re and it will
get added on to the base-emitter voltage of Q1 and will disrupt the biasing conditions. Cin is the
input DC decoupling capacitor while Cout is the output DC decoupling capacitor. The task of a DC
decoupling capacitor is to prevent DC voltages from reaching the succeeding stage. Inductor L 1,
L2 and capacitor C1 forms the tank circuit.
When the power supply is switched ON the transistor starts conducting and the collector
current increases. As a result the capacitor C1 starts charging and when the capacitor C1 is fully
charged it starts discharging through coil L1. This charging and discharging creates a series of
damped oscillations in the tank circuit and it is the key.
The oscillations produced in the tank circuit is coupled (fed back) to the base of Q1 and it
appears in the amplified form across the collector and emitter of the transistor. The output voltage
of the transistor (voltage across collector and emitter) will be in phase with the voltage across
inductor L1. Since the junction of two inductors is grounded, the voltage across L2 will be 180°
out of phase to that of the voltage across L1. The voltage across L2 is actually fed back to the base
of Q1. From this we can see that, the feed back voltage is 180° out of phase with the transistor and
also the transistor itself will create another 180° phase difference. So the total phase difference
12
between input and output is 360° and it is very important condition for creating sustained
oscillations.

Procedure:

1. The circuit is constructed as per the given circuit diagram.

2. Switch on the power supply and observe the output on the CRO( sine wave)
3. Note down the practical frequency and compare it with the theoretical frequency

Result :

Thus the Hartley oscillator was designed and constructed and the frequency of
oscillation is calculated.
Theoretical frequency:
Practical frequency :

EX.NO.4 DESIGN OF COLPITTS OSCILLATOR

Aim :
To design and construct colpitts oscillator and find the frequency of oscillations

Apparatus required:

Transistor, Resistors, Capacitors, CRO, RPS

Circuit Diagram :

13
Model Graph:

Design of Feedback Network ( Colpitt Oscillator ) :

Given :

SET-1
C1 = 0.1μF;f =800kHz; Vcc = 12V ; Av = 50 ; S = 10

IE = 5mA; fi = 1kHz

SET-2
C1 = 0.01μF;f =500kHz; Vcc = 12V ; Av = 50 ; S = 8
14
 IE = 4mA; fi = 1.5kHz

SET-3
C1 = 0.1μF;f =1000kHz; Vcc = 12V ; Av = 50 ; S = 7

IE = 4.5mA; fi = 2kHz

Av = Av = 1 / β = C2 / C1

f = 1/2π√(C1 + C2) / LC1C2

L=?

Amplifier Design :Gain formula is given by

Av = -hfe RLeff / hie ( Av = 29, design given )

Assume, VCE = Vcc / 2

RLeff = R c | | RL

re = 26mV / IE
hie = β re where re is internal resistance of the transistor.

hie = hfe re

VE = Vcc / 10

On applying KVL to output loop,

Vcc = IcRc + VCE + IERE

VE = IERE

Rc = ?;RL = ?

Since IB is very small when compared with Ic

Ic approximately equal to IE

RE = VE / IE = ?

VB = VBE + VE

VB = VCC . RB2 / RB1 + RB2

15
 S = 1+ RB / RE

RB =?

RB = RB1|| RB2

Find RB1 & RB2

Input Impedance, Zi = (RB || hie )

Coupling and bypass capacitors can be thus found out.

Input coupling capacitor is given by , Xci = Z i / 10

Xci = 1/ 2πf Ci

Ci = ?

output coupling capacitor is given by ,

Xc0 = (Rc ‫׀׀‬RL) / 10

Xc0 = 1/ 2πf Co, Co =?

By-pass capacitor is given by, XCE = RE /

10 XCE = 1/ 2πf CE ,CE =?

Theory:

Colpitts oscillator the tank circuit consists of two capacitors in series and an inductor
connected in parallel to the serial combination. The frequency of the oscillations is determined by
the value of the capacitors and inductor in the tank circuit. In Colpitts oscillator, the capacitive
voltage divider setup in the tank circuit works as the feed back source and this arrangement gives
better frequency stability when compared to the Hartley oscillator.
When power supply is switched ON, capacitors C1 and C2 starts charging. When they are
fully charged ,they starts discharging through the inductor L1. When the capacitors are fully
discharged, the electrostatic energy stored in the capacitors gets transferred to the inductor as
magnetic flux. The inductor starts discharging and capacitors gets charged again. This transfer of
energy back and forth between capacitors and inductor is the basis of oscillation.
Voltage across C2 is phase opposite to that of the voltage across the C1 and it is fed back
to the transistor. The feedback signal at the base of transistor appears in the amplified form across
the collector and emitter of the transistor.
The energy lost in the tank circuit is compensated by the transistor and the oscillations are
sustained. The tank circuit produces 180° phase shift and the transistor itself produces another
180° phase shift. That means the input and output are in phase and it is a necessary condition of
positive feedback for maintaining sustained oscillations. The frequency of oscillations of the
Colpitts oscillator can be determined using the equation below.

16
Where L is the inductance of the inductor in the tank circuit and C is the effective capacitance of
the capacitors in the tank circuit. If C1 and C2 are the individual capacitance, then the effective
capacitance of the serial combination C= (C1C2) /(C1+C2).

Procedure:

1. The circuit is constructed as per the given circuit diagram.

2. Switch on the power supply and observe the output on the CRO( sine wave)
3. Note down the practical frequency and compare it with the theoretical frequency

Result :

Thus the colpitts oscillator was designed and constructed and the frequency of
oscillation is calculated.
Theoretical frequency:
Practical frequency :

17
EX.NO.5 CLIPPER & CLAMPER

Aim:
To construct wave shaping circuits like Clipper and Clamping circuits and to observe the
waveforms.

Apparatus required:

Diodes, Resistor, Capacitor, CRO, RPS, Function Generator.

Circuit Diagram:

18
Model Graph:

Theory:
CLIPPER:
A clipper is a circuit in which the output of an input sinusoidal (or any time-dependent
signal) waveform can be clipped at different levels. A clipping circuit requires at least two
fundamental components, a diode and a resistor. A DC battery, however, is also frequently used.
The output waveform can be clipped at different levels simply by interchanging the position of the
various elements and changing the magnitude of the DC battery. Generally, ideal diodes are
19
considered and the complete analysis can be based on non-ideal diodes with specific V-I
characteristic.

CLAMPER:
A clamper is a circuit which will add or subtract a DC component from any input voltage.
The clamping circuit has a minimum requirement of three elements: a diode, a capacitor, and a
resistor. The clamping circuit may also include a DC battery. The magnitude of R and C must be
chosen such that the time constant = R·C is large enough to ensure that the voltage across the
capacitor does not change significantly during the interval of time, determined by the input, that
both R and C affect the output waveform.
Tabulation
Types Input Output
Vam Freq Shift Vamp Freq Shift
p
Positive Clipper

Negative Clipper

Positive Clamper

Negative Clamper

Procedure:

1. Connections are made as per the circuit diagram.

2. Apply the square or sine input signal at high frequency using AFO.
3. Note the corresponding output waveforms and plot the graph.

Result :
Thus the Clipper and Clamper circuits were constructed and the waveforms were
obtained.

20
EX.NO. 6 DESIGN OF ASTABLE MULTIVIBRATOR

Aim :
To design a astable multivibrator and draw their performance characteristics.

Apparatus required:
Transistor, Resistor, Capacitor, CRO, RPS & Function generator

Circuit Diagram

Waveforms

21
Design :

Given
SET-1
Vcc = 10V ; Ic = 2 mA; h FE = 200 ; f = 1 kHz

SET-2
Vcc = 10V ; Ic = 1.5mA; h FE = 200 ; f = 2 kHz

SET-3
Vcc = 10V ; Ic = 1 mA; h FE = 200 ; f = 1.5 kHz
R ≤ h FE Rc

RC = VCC – VC2(sat) / IC = 10 – 0.2 / 2x 10 –3 =4. 9 KΩ

R ≤ 200 x 4.9 x 103 = 980 KΩ
T = 1.38 RC

1 x 10-3 = 1.38 x 980 x 103 x C

C =0.74 nF

Theory :

The Astable circuit has two quasi-stable states. Without external triggering signal the Astable
configuration will make successive transitions from one quasi-stable state to the other.It is also
called as free running multivibrator and is used to generate “Square Wave”. Since it does not
require triggering signal, fast switching is possible.
When the power is applied, due to some imbalance in the circuit, the transistor
Q2 conducts more than Q1 i.e. current flowing through transistor Q2 is more than the current
flowing in transistor Q1. The voltage VC2 drops. This drop is coupled by the capacitor C1 to the
base by Q1 there by reducing its forward base-emitter voltage and causing Q1 to conduct less. As
the current through Q1 decreases, VC1 rises. This rise is coupled by the capacitor C2 to the base
of Q2. There by increasing its base- emitter forward bias. This Q2 conducts more and more and
Q1 conducts less and less, each action reinforcing the other. Ultimately Q 2 gets saturated and
becomes fully ON and Q1 becomes OFF. During this time C1 has been charging towards
VCC exponentially with a time constant T1 = R1C1. The polarity of C1 should be such that it should
supply voltage to the base of Q1. When C1 gains sufficient voltage, it drives Q1 ON. Then
VC1 decreases and makes Q2 OFF. VC2 increases and makes Q1 fully saturated. During this time
C2 has been charging through VCC, R2, C2 and Q2 with a time constant T2 = R2C2. The polarity of
C2 should be such that it should supply voltage to the base of Q2. When C2 gains sufficient voltage,
it drives Q2 On, and the process repeats.

22
Procedure :
1. Make then connections as per the circuit diagram.
2. Observe the Base Voltage and Collector Voltages of Q 1 & Q2 on CRO in DC mode
and measure the frequency (f = 1/T).
3. Trace the waveforms at collector and base as each transistor with the help of dual trace
CRO and plot the waveforms.
4. Verify the practical output frequency with theoretical values f = 1/T, where T = 1.38 RC
Observation

C (uf) Theoritical Practical T(ms)

Tabulation:

Vc1(Q1 Vc2 (Q2

,Collector) ,Collector)
Vam Ton Toff Shift Vamp Ton Toff Shift
p

Vb1(Q1, Base) Vb2(Q2, Base)

Vamp Ton Toff Shift Vamp Ton Toff Shift

Result :

Thus the square wave forms are generated using astable multivibrator.

23
EX.NO. 7 DESIGN OF MONOSTABLE MULTIVIBRATOR

Aim :
To design a monostable multivibrator and draw their performance characteristics.

Apparatus required:
Transistor, Resistor, Capacitor, CRO, RPS & Function generator

Circuit Diagram

WAVEFORMS:

24
Design :

Given
SET-1
Vcc = 12V ; VBB = - 2 V; Ic = 2 mA; VCE(sat) = 0.2 V ; h FE = 200 ; f = 1kHz.

SET-2
Vcc = 12V ; VBB = - 2 V; Ic = 1.5 mA; VCE(sat) = 0.2 V ; h FE = 200 ; f =2kHz.

SET-3
Vcc = 12V ; VBB = - 2 V; Ic = 2.5 mA; VCE(sat) = 0.2 V ; h FE = 200 ; f = 1.5kHz.

–3
RC = VCC – VCE(sat) / IC = 12 – 0.2 / 2x 10 = 5. 9 KΩ

IB 2(min) = Ic2 / hfe = 2mA / 200 = 10 μA

Select IB 2 > IB 1(min) (say 25 μA )

Then R = VCC – VBE(sat) / I B 2 = 12 – 0.7 / 25 x 10 -6 = 452 KΩ

T = 0.69 RC

1x10-3 = 0.69 x 452 x 10 3 C

C = 3.2 nF

VB1 = VBB R1 / R1 + R2 + VCE(sat) R2 / R1+R2

Since Q1 is off state, VB1 less than equal to 0.

Then VBB R1 / R1 + R2 = VCE(sat) R2 / R1+R2

VBB R1 = VCE(sat) R2

2R1 = 0.2R2

Assume R1 = 10 KΩ. Then R2 = 100 KΩ

C1 = 25pF( Commutative capacitor )

25
Observation

C (uf) Theoritical Practical T(ms)

Tabulation:

Vc1(Q1 Vc2 (Q2

,Collector) ,Collector)
Vam Ton Toff Shift Vamp Ton Toff Shift
p

Vb1(Q1, Base) Vb2(Q2, Base)

Vamp Ton Toff Shift Vamp Ton Toff Shift

Theory :

A monostable multivibrator has one stable state and a quasistable state. When it is triggered
by an external agency it switches from the stable state to quasistable state and returns back to stable
state. The time during which it states in quasistable state is determined from the time constant
RC. When it is triggered by a continuous pulse it generates a square wave. The frequency of the
output signal generated by them can be varied by varying the values of the capacitors and the
resistors present in the circuit.
Initially, the system will be in its stable state wherein the transistor Q1 will be cutoff while
Q2 will be in saturation. As a result, the collector of Q2 will be shorted to ground due to which the
output will be low. Further at this state, the right-plate of the capacitor C will be 0.7 V as it is
connected to the base of Q2, while the charge on its left plate will be increasing gradually towards
VCC. On applying the trigger to the base of Q1, it will turn ON, causing the flow of current through
RC1. As a result, the collector terminal of Q 1 as well as the left-plate of the capacitor C will be
shorted to ground. This causes the capacitor to discharge, while turning OFF Q 2 for the entire
period of discharging cycle. This OFF state of Q2 is nothing but the astable or quasi-stable state,
wherein the output of the circuit goes high. However during this time, Q 1 remains in its ON state
only, as it has its base connected to the high-voltage point, the collector of Q2. Next, the cycle
repeats by turning ON Q2 and by switching OFF Q1, once the capacitor fully discharges.

Procedure :

26
 1.Connect the circuit as per circuit diagram.
2.Switch on the regulated power supply and observe the output waveform at the collector of Q 1
and Q2 and plot it.
3.Trigger the monostable multivibrator with a pulse and observe the change in waveform.
4.Plot the waveform and observe the changes before and after triggering the input to the circuit.

Result:

Thus the monostable multivibrator was designed and the output waveform was traced.

EX.NO. 8 SINGLE TUNED CLASS C AMPLIFIER

Aim:
To deign and construct a single tuned class C amplifier.

Apparatus required:

Transistor, Resistor, Capacitor, CRO, RPS, Function Generator.

Circuit Diagram:

Model Graph:

Ideal graph:-

27
 Design:-

Specification:
Frequencyf=50KHz,t=6.66usec ,R1C1 >> t, i.e, R1C1 = 100 t
Choose C1 = 0.01 f, the R1 = 66.6 K . Select R1 = 68 K(std value)

Tank ckt:
If C = 0.001 f, then L = 1.125 mH. Then Factual = 159 KHz. R1 = 68K , C1 = 0.01 f, C=
0.001 f, L = 1mH

Tabulation:

F V0 in VDC i
n
RL in Pac=Vo2/8R PDC=VDCIC Η=Pac/Pdc
in Volts Ω

HZ Volt mW mW
s

Theory:
Class C power amplifier is a type of amplifier where the active element (transistor)
conduct for less than one half cycle of the input signal. The reduced conduction angle improves
the efficiency to a great extend but causes a lot of distortion. Theoretical maximum efficiency of
a Class C amplifier is around 90%.
Biasing resistor Rb pulls the base of Q1 further downwards and the Q-point will be set
some way below the cut-off point in the DC load line. As a result the transistor will start conducting
only after the input signal amplitude has risen above the base emitter voltage (Vbe~0.7V) plus the
downward bias voltage caused by Rb. That is the reason why the major portion of the input signal
is absent in the output signal.
Inductor L1 and capacitor C1 forms a tank circuit which aids in the extraction of the required signal
from the pulsed output of the transistor. Actual job of the active element (transistor) here is to
produce a series of current pulses according to the input and make it flow through the resonant
circuit. Values of L1 and C1 are so selected that the resonant circuit oscillates in the frequency of
the input signal. Since the resonant circuit oscillates in one frequency (generally the carrier
frequency) all other frequencies are attenuated and the required frequency can be squeezed out
using a suitably tuned load. Harmonics or noise present in the output signal can be eliminated
using additional filters. A coupling transformer can be used for transferring the power to the load.
The amplifier is said to be class C amplifier if the Q Point and the input signal are
selected such that the output signal is obtained for less than a half cycle, for a full input cycle Due

28
to such a selection of the Q point, transistor remains active for less than a half cycle .Hence only
that much part is reproduced at the output for remaining cycle of the input cycle the transistor
remains cut off and no signal is produced at the output .The total angle during which current flows
is less than 180..This angle is called the conduction angle, Qc

Procedure:
1. Connections are made as shown in the diagram.
2. Adjust the input frequency of the signal to get maximum output at the load.
3. Tabulate the output voltage for different frequencies and calculate the voltage gain.

Result:

Thus a class C single tuned amplifier was designed and its bandwidth is calculated.

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