Professional Documents
Culture Documents
Submitted by:
Afaq Gul Waseem 180616
Muhammad Aun Abbas 180620
Ahmad Hassan Saeed 180622
Emaan Fatima 180626
BEET-7B
BACHELOR OF ELECTRICAL ENGINEERING
(Fall-2021)
Submitted To:
Mam Ayesha Tehreem
1. Introduction
(i) Introduction
(ii) Problem statement
(iii) Proposed Solution
(iv) Theoretical Background
2. Design & Implementation
(i) Circuit Daigram
(ii) Circuit Explanation and working
(iii) Derivations and Calculations
(iv) Hardware plus software pictures
3. Conclusions
Final Semester Project
Bipolar non return to zero Mark line Encoder
1. Introduction
line Coding:
In order to transport digital bits of data across carrier waves, encoding techniques
(commonly known as called line coding) have been developed each with their own
pros and cons. This report describes the importance of the encoding scheme, how
to generate for transmission and how to receive correctly.
BNRZ:
The data stream of bipolar nonr eturn-to-zero is shown in Figure below When the
data bit of BNRZ is “1” or “0”, the signal amplitude will be a positive or a
negative voltage level. As for bit time, no matter the data bit is “1” or “0”, the
voltage level remains same. By comparing the data streams of UNI-NRZ and BLP-
NRZ, the only difference is the signal amplitude is a negative voltage level when
the data bit is “0”, therefore, we may utilize a comparator to encode the data bit in
the circuit.
2. Problem Statement:
As we have to design the Bipolar non return to zero-mark line encoder. When the
data bit of BNRZ is “1” or “0”, the signal amplitude will be a positive or a
negative voltage level. As for bit time, no matter the data bit is “1” or “0”, the
voltage level remains same
3. Proposed Solution:
Our proposal for solution is that we will do theoretical and mathematical work
such as state table and state diagrams. Will examine the waveforms of different
flip flops and use those whose wave form is according to our required results.
A comparator circuit patched with a d flip flop. If the input is 0 the output state
doesn't change. If the input is 1 the output state changes
4. Theoretical Background:
We used 1-bit magnitude comparator since our output relies on one input
Equality Comparators are used to check if the two binary inputs (A and B) are equal or
not.
Magnitude Comparators are used to fully compare two binary inputs A and B and produce
three possible outpus if A>B, A==B or A.
NRZ-M theory my daalna hai ye:-
Equipment’s Required:
D Flip Flop
Not Gate
AND gate
OR Gate
Subtractor
D-Flip Flop:
A D flip-flop is widely used as the basic building block of random access memory
(RAM) and registers. The D flip-flop captures the D-input value at the specified
edge (i.e., rising or falling) of the clock. After the rising/falling clock edge, the
captured value is available at Q output.
The D flip flop is the most important flip flop from other clocked types. It ensures
that at the same time, both the inputs, i.e., S and R, are never equal to 1. The
Delay flip-flop is designed using a gated SR flip-flop with an inverter connected
between the inputs allowing for a single input D(Data).
Truth Table of D-Flip Flop:
I Pre Pre N N
n vio vio e e
p us us x x
u Sta Sta t t
t te te S S
A B C t t
a a
t t
e e
0 1 0 1 0
0 0 1 0 1
1 1 0 0 1
1 0 1 1 0
Not Gate:
A NOT gate (also often called Inverter) is a logic gate. Each NOT gate has only
one input signal. Logically with NOT gates, the input and the output swap, so if
you input 1 it outputs as 0; likewise if you input 0 it outputs as 1. The NOT gate
negates the values of data or signal in its input.
Or Gate:
An OR gate is a digital logic gate that gives an output of 1 when any of its inputs
are 1, otherwise 0. An OR gate performs like two switches in parallel supplying a
light, so that when either of the switches is closed the light is on.
Subtractor:
An electronic logic circuit for calculating the difference between two binary
numbers, the minuend and the number to be subtracted, the subtrahend (see table).
A full subtractor performs this calculation with three inputs: minuend bit,
subtrahend bit, and borrow bit
Experimental work:
Proteus simulations:
Results:
Hardware simulations:
BNRZ – M circuit:
Conclusion
This project is about BNRZ-M Encoder. The hardware as well as software
results are obtained. In this Coding scheme, A comaprator circuit patched
with a d flip flop.If the input is 0 the output state doesn't change.
If the input is 1 the output state changes. We have successfully obtained the
desired results.
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