BJT-FET-MOSFET

ECE131
Basic Electrical & Electronics Engg.
Transistor Construction

Figure 22-1. NPN transistor.

Figure 22-2. PNP transistor.
 Transistor Types and Packaging

• Transistor classifications
– According to type
• NPN or PNP
– According to material used
• Germanium or silicon
– According to major use
• High or low power, switching, or high frequency
 Transistor Types and Packaging
(cont’d.)

• Transistor identification
– Prefix of 2N followed by up to four digits
• Transistor package
– Protects transistor
– Provides means of electrical connection
– Serves as a heat sink
– Identified with letter TO (transistor outline)
Transistor Types and Packaging
(cont’d.)

Figure 22-3. Various transistor packages.

Transistor Types and Packaging
(cont’d.)

Figure 22-4. Typical transistor packages.

Basic Transistor Operation

Figure 22-5. Properly biased NPN transistor.

Figure 22-6. Properly biased PNP transistor.
Figure 22-8. Transistor tester.
 Transistor Substitution

Figure 22-9. How to remember the polarity of the collector voltage.

Introduction to MOSFET
Current Controlled vs Voltage Controlled Devices
 FET ( Field Effect Transistor)
Few important advantages of FET over conventional Transistors
1. Unipolar device i. e. operation depends on only one type of
charge carriers (h or e)
2. Voltage controlled Device (gate voltage controls drain
current)
3. Very high input impedance (109-1012 )
4. Source and drain are interchangeable in most Low-frequency
applications
5. Low Voltage Low Current Operation is possible (Low-power
consumption)
6. Less Noisy as Compared to BJT
7. No minority carrier storage (Turn off is faster)
8. Self limiting device
9. Very small in size, occupies very small space in ICs
10. Low voltage low current operation is possible in MOSFETS
11. Zero temperature drift of out put is possible
 Types of Field Effect Transistors
(The Classification)

» JFET n-Channel JFET

FET
p-Channel JFET
MOSFET (IGFET)

Enhancement Depletion
MOSFET MOSFET

n-Channel p-Channel n-Channel p-Channel

EMOSFET EMOSFET DMOSFET DMOSFET
The Junction Field Effect Transistor (JFET)

Figure: n-Channel JFET.

 SYMBOLS

Drain Drain Drain

Gate Gate
Gate

Source Source
Source

n-channel JFET n-channel JFET p-channel JFET

Offset-gate symbol
 Biasing the JFET

Figure: n-Channel JFET and Biasing Circuit.

 Operation of JFET at Various Gate Bias Potentials

Figure: The nonconductive depletion region becomes broader with increased reverse bias.
(Note: The two gate regions of each FET are connected to each other.)
Simple Operation and Break down of n-Channel JFET

Figure: n-Channel FET for vGS = 0.

The MOSFET (Metal Oxide Semiconductor Field Effect
Transistor) transistor is a semiconductor device which is
widely used for switching and amplifying electronic signals in
the electronic devices. The MOSFET is a core of integrated
circuit and it can be designed and fabricated in a single chip
because of these very small sizes.

https://www.youtube.
com/watch?v=stM8dg
cY1CA
 Types of MOSFETs
JFET: Junction Field Effect Transistor
MOSFET: Metal Oxide Semiconductor Field Effect Transistor

There are 2 types of MOSFET’s:

• Depletion mode MOSFET (D-MOSFET)

• Operates in Depletion mode the same way as a JFET when
VGS  0
• Operates in Enhancement mode like E-MOSFET when
VGS > 0

• Enhancement Mode MOSFET (E-MOSFET)

• Operates in Enhancement mode
• IDSS = 0 until VGS > VT (threshold voltage)
 Depletion Insulated Gate FETs
(MOSFETs)

Schematic symbol for an N-

channel depletion MOSFET.

Schematic symbol for

a P-channel depletion
MOSFET.
 Enhancement Insulated Gate FETs
(MOSFETs)

Schematic symbol for a P-channel

enhancement MOSFET.

Schematic symbol for an N-channel

enhancement MOSFET.
Figure p-Channel FET circuit symbols. These are the same as the circuit symbols for n-channel devices,
except for the directions of the arrowheads.
Figure Drain current versus vGS in the saturation region for n-channel devices.
 BJT vs FET vs MOSFET
Terms BJT FET MOSFET
Current controlled Voltage controlled Voltage Controlled
Device type

Current flow Bipolar Unipolar Unipolar

Not
Terminals Interchangeable Interchangeable
interchangeable
Operational modes No modes Depletion mode Both Enhancement
only and Depletion
modes
Input impedance Low High Very high
Output resistance Moderate Moderate Low
Operational speed Low Moderate High
Noise High Low Low
Thermal stability Low Better High
The MOSFET Device
 A
MOSFET
Inverter
SR (Switch-Resistor Model)
 MOSFET Handling

MOSFETs are very static sensitive. Because of the very thin SiO2 layer between
the external terminals and the layers of the device, any small electrical discharge
can stablish an unwanted conduction.

Protection:
• Always transport in a static sensitive bag
• Always wear a static strap when handling MOSFETS
• Apply voltage limiting devices between the Gate and Source, such as back-to-
back Zeners to limit any transient voltage

49
But first, why digital?
But first, why digital?
Noise Problem

Problem…
noise
hampers our
ability to
distinguish
between
small
differences
in value
—e.g.
between
3.1V and
3.2V.
Noise Problem

Problem…
noise
hampers our
ability to
distinguish
between
small
differences
in value
—e.g.
between
3.1V and
3.2V.
 Noise Problem

Problem…
noise
hampers our
ability to
distinguish
between
small
differences
in value
—e.g.
between
https://www.youtube.com 3.1V and
/watch?v=sIgtZ4HUJ00
3.2V.
 Value Discretization

Logic Gates:

What is the meaning of?

Logic 0

Logic 1
 Value Discretization

Logic Gates:

What is the meaning of?

Logic 0

Logic 1
Digital Systems
Voltage Thresholds and Logic Values
Handling the Noise
Digital systems follow • if inputs to
the digital
static discipline: system
meet valid
input
thresholds,
then the
system
guarantees
its outputs
will meet
valid
output
thresholds
• MIL
Standards
Max NM
 Example: Observing a static discipline
• The device company Yehaa (A) Microelectronics, Inc. has
developed a new process technology that is able to produce
large quantities of a certain type of digital device known as an
adder at a very low cost.
• For a logical 0, their adders produce a voltage level of 0.5 V at
their outputs. Similarly, when outputting a logical 1, their
adders produce the voltage level of 4.5 V.
• Furthermore, the Yehaa adders are able to interpret all signals
between 0V and 2V at their inputs as a logical 0, and all signals
between 3V and 5V as a logical 1.
• Yehaa’s sales team discovers that networking equipment
company Disco Systems Inc. buys huge quantities of adder
devices from a competitor Yikes Devices, Inc. Upon further
research, the Yehaa sales team finds that the hardware
systems in one of Disco’s product lines operate under a static
discipline with the following voltage thresholds:
In other words, the mapping between voltage ranges
and logical values in Disco’s static discipline is as
summarized in Figure.
• Yehaa’s sales team wishes to sell their adders to Disco at a lower
cost than those from Yikes, but first, Yehaa must determine
whether their adders can safely replace the adders from Yikes.
• The sales team asks their development engineers to determine
whether Yehaa’s adders satisfy the static discipline under which
Disco’s system operates.
• The development team first looks at the output level for a logical
1 required by Disco’s static discipline. The static discipline used by
Disco requires devices to produce voltages between 4V (VOH) and
5V for a logical 1. As illustrated in Figure next, Yehaa’s devices
produce a voltage level of 4.5 V for a logical 1, which falls within
the required range, and so they satisfy the VOH requirement.
• Next, they look at the output voltage level for a logical 0. As
depicted in Figure next, Yehaa’s devices produce a voltage level of
0.5V for a logical 0, which falls within the 0V to 1.5V (VOL) range
required for logical 0’s by Disco’s static discipline.
• Thus, Yehaa’s devices satisfy the VOL requirement.
 Comparing the voltages produced by Yehaa against the
voltage levels required by the static discipline used by
Disco Systems.
Yehaa (A) Yehaa (A)
• The engineers now turn their attention to the input voltage
levels required by Disco’s static discipline.
• Yehaa’s devices are able to interpret voltages as high as 2V as
a logical 0, so they can interpret any voltage between 0V and
2V (VIL) as a logical 0, just as required by Disco’s static
discipline. Thus, the Yehaa devices satisfy the VIL
requirement.
• Similarly, Yehaa’s devices are able to interpret voltages
between 3.5V (VIH) and 5V as a logical 1, which again satisfies
the VIH requirement of Disco’s static discipline.
• The fact that the Yehaa devices interpret certain voltages in
Disco’s forbidden region (specifically, those between 3 V and
3.5 V) as a logical 1 is irrelevant since devices are allowed
arbitrary behavior for values in the forbidden region.
• Thus, the development engineers are able to tell their sales
team that Yehaa’s adders satisfy Disco’s static discipline and
so they can be used as replacements for Disco’s existing
adders.
Example: Does our inverter satisfy the
static discipline for these thresholds:
Example: Does our inverter satisfy the
static discipline for these thresholds:
Processing digital signals
46.0 L4
Examples Gates
Digital Circuits
How to build a digital gate
Electrical Analogy
Electrical
Analogy

if C = 0 short circuit between in and out

else open circuit between in and out
For mechanical switch, control mechanical pressure
Consider it
What about it?
What about?
Fan-In & Fan-out of Digital Gates
INTEGRATED CIRCUITS
 Integrated Circuits
• Advantages of the integrated circuit
– Reliable with complex circuits
– Low power consumption
– Small size and weight
– Economical to produce
– New and better solutions to system problems
• Disadvantages of the integrated circuit
– Cannot handle large amounts of current or voltage
– Cannot be repaired
 Integrated Circuits

• Components of integrated circuits

– Diodes
– Transistors
– Resistors
– Capacitors
 Integrated Circuits
• Monolithic integrated circuits
– Formed on a circular silicon wafer substrate
• Thin-film integrated circuits
– Formed on surface of an insulating substrate
• Glass
• Ceramic
• Thick-film construction
– Components are formed using a screen printing process
• Hybrid integrated circuits
– Formed using monolithic, thin-film, thick-film, and
discrete components
Integrated Circuits

Integrated circuits on wafer.

Integrated Circuit Packaging

Figure 25-2. Integrated circuit dual-inline packages.

 Integration levels
• Small Scale Integration (SSI): up to 100 Nos.(1960)
• Medium Scale Integration (MSI): 100-3k Nos. (1960)
• Large Scale Integration (LSI): 3k-100k Nos. (1970)
• Very Large Scale Integration (VLSI): 100k-1000k (1980)
• Ultra Large Scale Integration (ULSI): Reserved for future
• Wafer Scale Integration (WSI): Entire computer system on un-
cut wafer (failed due to mfg. defects)
• System-on-chip (SoC): This involves components that were
manufactured on separate chips and wired together on PCB and
designed to put into a chip
 IC Families

Figure 25-3. Families of integrated circuits.

 IC packages
• An IC Package is either ceramic or plastic.
• Plastic is less expensive & suitable for 0-70 degree
temp
• Ceramic is expensive & suitable for -55 to +125 deg.
C
• Ceramic devices are recommended for military,
aerospace and severe industrial applications
Handling of Integrated Circuits

Figure 25-4. Warning labels printed on packaging

for devices that can be easily damaged by ESD.
 Handling of ICs
• Inside an IC, a static discharge could destroy oxide layers or
junctions and also lead to ESD Latent Defect
• ESD Latent Defect makes the device to appear operate properly,
but it is weakened, & failure will result at a later time
• ESD is more in winter months when environment is dry.
• Always check manuals and the IC package materials for ESD
warnings and instructions
• Wear a grounded wrist strap to discharge any static charge built
up on the body
• Do not permit the IC to come in contact with clothing or any
other material that might have a static charge.
 Handling of ICs
• When handling an IC, minimize physical movement such as
scuffing feet.
• Always discharge the package of the IC prior to removing it
• Prior to touching an IC, always touch the surface on which it
lies so as to provide a discharge path.
• Handle the IC only when it is ready to place in the circuit
• When removing and replacing an IC, avoid touching the leads
• When working on a circuit containing ICs, do not touch any
material that will create a static charge
 REFERENCES
• https://www.youtube.com/watch?v=IZS_jqYONXc
• https://www.youtube.com/watch?v=jOUmMkONtaE
• https://www.youtube.com/watch?v=bWXNOemu2j4
• https://www.youtube.com/watch?v=y5FswkQ4bi0