5 4 3 2 1

D D

Berry AMD IO Board Schematics Document

C
2010-02-24 C

REV : A00

B
DY : Nopop Component B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number

Cover Page Rev
A3
Berry IO Board X02
Date: W ednesday, February 24, 2010 Sheet 1 of 12
5 4 3 2 1
 5 4 3 2 1

Berry IO Board
Project code:91.4HH01.001
D
PCB P/N :09697-SC D

REVISION :SC
IOBD2
82
81 83
NP1
9 SATA_TXN1 1 2 USB_PP9 9
ESATA 9 SATA_TXP1 3 4 USB_PN9 9
USB 0
5 6
9 SATA_RXN1_C 7 8
ESATA 9 SATA_RXP1_C 9 10
USB_PP11 5,10
USB_PN11 5,10
WWAN USB
11 12
4 PCIE_TXP2 13 14
WLAN PCIE 4 PCIE_TXN2 15 16
USB_PN0 8
USB_PP0 8
USB 1
17 18
4 PCIE_RXP2 19 20
WLAN PCIE 4 PCIE_RXN2 21 22
USB_PP13 4
USB_PN13 4
WLAN USB
23 24
25 26
WLAN CLK 4 CLK_PCIE_W LAN
4 CLK_PCIE_W LAN# 27 28
E51_RXD 4
E51_TXD 4
29 30
C 31 32 C
6 CLK_PCIE_LAN
LAN CLK 6 CLK_PCIE_LAN# 33 34
PCIE_RXP4 5
PCIE_RXN4 5
WWAN PCIE
35 36
5 CLK_PCIE_W W AN 37 38
WWAN CLK 5 CLK_PCIE_W W AN# 39 40
PCIE_TXP4 5
41 42
PCIE_TXN4 5 WWAN PCIE
at least 80 mil +5V_USB1 43 44 PCH_SMBDATA 4,5 +DC_IN_SS
45 46
47 48
PCH_SMBCLK 4,5
WWAN SMBUS
+5V_ALW 49 50
51 52
53 54
55 56
57 58
+3.3V_RUN 59 60
+3.3V_ALW 61 62 W IFI_RF_EN 4
+1.5V_RUN 63 64 W W AN_CLKREQ# 5
A00-0208 65
67
66
68
W W AN_RADIO_DIS# 5
6 PM_LAN_ENABLE PSID_DISABLE# 3,10
4,5,6 PLT_RST# 69
71
70
72
8103_GPO 6 X02-1229
4 W LAN_CLKREQ# PCIE_RXP3 6
4,5,6 PCIE_W AKE# 73 74
4 BT_ACT 75 76
PCIE_RXN3 6 LAN PCIE
4 W LAN_ACT 77 78 PCIE_TXP3 6
3 PSID_EC 79 80
NP2
PCIE_TXN3 6 LAN PCIE
84 86
85
B ACES-CONN80A-GP B

20.F1671.080

PCIE_RX Decoupling Capacitor near LAN Chip

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size
IO Board CONN
Document Number Rev
A3 Berry IO Board X02
Date: Monday, February 08, 2010 Sheet 2 of 12
5 4 3 2 1
 5 4 3 2 1

SSID = PWR.Support

DCin CONN
D D

+5V_ALW

1
PR302

1
15KR2J-1-GP
PR303 DY

2
10KR2J-3-GP PD302

1
1 PQ302 BAV99-4-GP +3.3V_ALW +3.3V_ALW

3
PMBS3904-1-GP

2
2
PR306

1
PR304 PSID_DISABLE#_R
100KR2J-1-GP
1
DY 2 PSID_DISABLE# 2,10
PR307
0R2J-2-GP 2K2R2J-2-GP

G
1
PQ301 PD303

2
FDV301N-NL-GP BAV99-4-GP

3
PR308
D S PS_ID 1 2

D
PSID_EC 2
33R2J-2-GP
C C

PR309
1
DY 2 This cap should be used
only as last resort for
33R2J-2-GP
EMI suppression.
+DC_IN +DC_IN_SS
X02-1216 1 S
PU301
D 8
2 S D 7

SC1U25V5KX-1GP

SC10U25V6KX-1GP
SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP
1

1
DCIN1 S D

PC301

240KR3-GP
3 6

1
PS_ID_R 1 PR301 2 PS_ID_R2 PC302 G D

PC305

PC303

PC304

PC306
PR310
4
5
DC_IN-#4 DATA 1
0R0603-PAD DY SCD1U50V3KX-GP
4 5

2
DC_IN-#5 AFTP302 AO4407A-GP
1

2
9

2
K

GND
GND 8 Id=-9.6A

1
2 7 PD301
3
DC_IN+#2 GND
6 1SMB22AT3G-GP-U PD304 Qg=-25nC
DC_IN+#3 GND
AFTP301 1
DY B240A-13-GP Rdson=18~30mohm
SKT-JACK-204-GP-U
A

2 A00-0208
22.10037.D61

2
AFTP303 1 PR311
47KR3J-L-GP

1
B B

Remove PQ303, PQ304 and net AD_OFF.

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number

DCIN Rev
A3 Berry IO Board X02
Date: Monday, February 22, 2010 Sheet 3 of 12
5 4 3 2 1
 5 4 3 2 1

SSID = Wireless
Mini Card Connector(802.11a/b/g)
+3.3V_RUN
R401 +1.5V_RUN
W LAN1
D 2,5,6 PCIE_W AKE# 1
DY 2
53
D

0R2J-2-GP
NP1
1 MINI_2_W AKE# 1
AFTP402
2
2 W LAN_ACT 3
4
2 BT_ACT 5
6
2 W LAN_CLKREQ# 7
8
9
10
2 CLK_PCIE_W LAN# 11
12
2 CLK_PCIE_W LAN 13
14
15
16

+5V_ALW +3.3V_RUN 17
2 E51_RXD
18
2 E51_TXD 19
1

1
20 W IFI_RF_EN 2
C401 C402
SCD1U10V2KX-4GP DY SCD1U10V2KX-4GP
21
22
2

2 PLT_RST# 2,5,6
C 23 C
2 PCIE_RXN2
24
2 PCIE_RXP2 25
26
+3.3V_RUN +1.5V_RUN 27
28
29
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP

30 PCH_SMBCLK
PCH_SMBCLK 2,5
1

1
C403

C404

C405

2 PCIE_TXN2 31
C406 PCH_SMBDATA
DY SCD1U10V2KX-4GP 2 PCIE_TXP2 33
32 PCH_SMBDATA 2,5
2

34
35
36 USB_PN13 2
37
38 USB_PP13 2
+3.3V_RUN 39
W LAN_ACT 40
41
1

42 AFTP5715_1 1
DY EC401 43 AFTP408
SC220P50V2KX-3GP 44
2

45
46 AFTP5717_1 1
47 AFTP409
48
49
R404 50
+5V_MINICARD
B +5V_ALW 1
DY 2 51
52
B
0R3J-0-U-GP NP2

54

SKT-MINI52P-21-GP

62.10043.581

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
BATT CONN
Size Document Number Rev
A3 Berry IO Board X02
Date: W ednesday, December 30, 2009 Sheet 4 of 12
5 4 3 2 1
 5 4 3 2 1

R502
USBP11-_R
2,10 USB_PN11 1
DY2
0R3J-0-U-GP

Close WWAN1
D R505 D

USBP11+_R
Layout note: Place caps C401~C407 2,10 USB_PP11 1
DY2
close WWAN1 connector. 0R3J-0-U-GP

A00-0222

C901 Please near WWAN1

MiniCard WWAN connector

+1.5V_RUN

SC33P50V2JN-3GP
C501

SCD047U10V2KX-2GP
C502
1

1
DY DY

2
+3.3V_RUN
W W AN1
C 53 C
ST220U6D3VDM-20GP
TC501

SC33P50V2JN-3GP
C503

SC33P50V2JN-3GP
C504

SCD047U10V2KX-2GP
C506

SCD047U10V2KX-2GP
C505
NP1
2 1 PCIE_W AKE# 2,4,6
1

1
4 3
DY DY DY DY DY UIM_PW R
6
8
5
7
2

2
UIM_DATA W W AN_CLKREQ# 2
10 9
UIM_CLK 12 11 CLK_PCIE_W W AN# 2
UIM_RESET 14 13 CLK_PCIE_W W AN 2
UIM_VPP
X02-1216 16 15

18 17
2 W W AN_RADIO_DIS# W W AN_RADIO_DIS# 20 19
2,4,6 PLT_RST# 1 2 W W AN_PCIE_RST# 22 21
+3.3V_RUN R501 0R0402-PAD 24 23 PCIE_RXN4 2
26 25 PCIE_RXP4 2
28 27
2,4 PCH_SMBCLK 30 29
1

2,4 PCH_SMBDATA 32 31 PCIE_TXN4 2

C507
SCD1U10V2KX-4GP DY USBP11-_R
34
36
33
35
PCIE_TXP4 2 +3.3V_RUN
2

USBP11+_R 38 37
40 39
42 41
44 43
46 45
48 47
50 49
B B
52 51
NP2
DY 54

SKT-MINI52P-9-GP-U

62.10043.411
AFTP521 1 UIM_PW R
AFTP522 1 UIM_VPP
AFTP523 1 UIM_RESET
AFTP524 UIM_CLK_L
AFTP525
1
1 UIM_DATA Close to SIM1

ESD501
SIM1 EC505 1 2 SC1U10V2KX-1GP
UIM_RESET UIM_VPP
1
DY UIM_PW R
1 6
VCC UIM_RESET UIM_PW R
RST 2 2 5
3 UIM_CLK_L R506 1 2 33R2J-2-GP UIM_CLK
CLK UIM_CLK_L UIM_DATA
GND 5
DY UIM_VPP
3 4
VPP 6
7 UIM_DATA DY
I/O IP4220CZ6-T-R-GP
A GND 8 <Core Design> A

SC10P50V2JN-4GP

SC33P50V2JN-3GP
GND 9
1

EC503

EC504
10 EC506 EC507 EC501 EC502
CD
1

1
SC33P50V2JN-3GP

SC100P50V2JN-3GP DY DY
NP1 NP1
DY DY Wistron Corporation
SC33P50V2JN-3GP

NP2 SC100P50V2JN-3GP DY DY
2

NP2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

DY
2

2
Taipei Hsien 221, Taiwan, R.O.C.
CARD-PUSH-7P-GP-U3
Title

20.I0046.001
Size Document Number
WWAN/SIM Card Rev
Place caps EC806 , EC807 closest to SIM1 A3 Berry IO Board X02
DATA and CLK need keep away about 12mil
Date: Monday, February 22, 2010 Sheet 5 of 12
5 4 3 2 1
 A B C D E

+3.3V_RUN +3.3V_LAN
R602
1
DY 2
0R3J-0-U-GP
R603
+3.3V_LAN
4 1
DY 2 4

40 mils 0R3J-0-U-GP
+3.3V_ALW
Q602 main: 84.00102.031

1
C601 C602 C603
2nd: 84.03403.031
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP S D
2

1
1
R601
C604 10KR2J-3-GP PA102FMG-GP C605 C606 C607 C608 C609

1
SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

SC10U6D3V3MX-GP
SCD1U10V2KX-4GP

1
DY DY

2
1 R604 2PM_LAN_ENABLE_R

2
LAN_ENABLE_R_C
1KR2J-1-GP
+1.2V_LOM
40 mils

1
C610
Q601
1

1
C611 C612 C613 C614 SC1U10V2KX-1GP

2
G

. .
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP 2 PM_LAN_ENABLE
2

2
D

.
.
.
S

3 2N7002E-1-GP 3

U601

+1.2V_LOM 9 19 PCIE_W AKE#

VDD1 LANWAKE# PCIE_W AKE# 2,4,5
+1.2V_LOM 23 21 ISOLATE# 1 2 +3.3V_RUN
+1.2V_LOM VDD1 ISOLATE# R605 1KR2J-1-GP
28 VDD1
1 2
+3.3V_LAN 22 12 CLK_PCIE_LAN CLK_PCIE_LAN 2 R606 15KR2J-1-GP
+3.3V_LAN VDD3 REFCLK_P CLK_PCIE_LAN#
30 VDD3 REFCLK_M 13 CLK_PCIE_LAN# 2
CTRL12
+1.2V_LOM 1 10 PCIE_TXP3 PCIE_TXP3 2
CTRL12 LV_D HSIP PCIE_TXN3
3 LV_A HSIN 11 PCIE_TXN3 2
1

C616 +3.3V_LAN 4 15 PCIE_HSOP C615 1 2 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP 1D2V VDDTX 14
HV33
VDDTX
HSOP
HSON 16 PCIE_HSON C617 1 2 SCD1U10V2KX-4GP
PCIE_RXP3
PCIE_RXN3
2
2
2

C619 CLKREQB 18
C618 R607 1 2LAN_EECS 24 20 PLT_RST_LAN# 1 2 PLT_RST# PLT_RST# 2,4,5
SC1U10V2KX-1GP EECS PERST#
1KR2J-1-GP R608 0R0402-PAD
2

TP1 1 AMBER_LED#
SC1U10V2KX-1GP
1 2 GREEN_LED#
27
26
LENPIN1/EESK
5 MDI0+
X02-1216
2 +3.3V_LAN LEDPIN2/EEDI MDIP0 MDI0+ 7 2
R609 3K6R2F-GP 25 6 MDI0- MDI0- 7
LEDPIN3/EEDO MDIN0 MDI1+
MDIP1 7 MDI1+ 7
8 MDI1- MDI1- 7
LAN_X1 MDIN1
31 CKXTAL1
LAN_X2 32 CKXTAL2
GNDTX 17
GND 33
8103_GPO
X02-1216 2 8103_GPO 29
2
GPO
IBREF
2

R610 RTL8103T-VB-GRT-GP
2K49R2F-GP
C620
1

1 2 SC18P50V2JN-1-GP LAN_X1
2

X601
C621 XTAL-25MHZ-102-GP
1

1 2 LAN_X2
SC15P50V2JN-2-GP

Main: 82.30020.851
1
2nd : 82.30020.791 <Core Design> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN RTL8103T
Size Document Number Rev
Berry IO Board X02
Date: W ednesday, February 24, 2010 Sheet 6 of 12
A B C D E
 5 4 3 2 1

10/100M Lan Transformer 1.route on bottom as differential pairs.

D
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
RJ45 Connector D
XF701
4.pairs must be equal lengths.
1CT:1CT
RJ45-3
5.6mil trace width,12mil separation.
6 MDI0+ 16 1
6.36mil between pairs and any other trace.
XFR_RXC RJ45-7
7.Must not cross ground moat,except
14 3
RJ-45 moat.
RJ45-4
15 2 RJ45-6 RJ45
6 MDI0-
Tx Side 9
RJ45-3 1
1CT:1CT
10 7 RJ45-1 RJ45-6 2
6 MDI1+
RJ45-1 3
RJ45-4 4
11 6 XFR_CMT 5
RJ45-2 6
RJ45-7 7
9 8 RJ45-2 8
6 MDI1-

4
3
2
1
Rx Side 10
1

RN701
C701 C702 SRN75J-1-GP RJ45-8P-7-GP-U
SCD01U16V2KX-3GP SCD01U16V2KX-3GP XFORM-12P-36-GP
2

A00-0223
Change PCB footprint
22.10277.591

5
6
7
8
C LAN_TERMINAL 1 2 C
SC1KP3KV8KX-GP-U C703

RJ45-1 1 AFTP701
RJ45-2 1 AFTP702
RJ45-3 1 AFTP703
RJ45-4 1 AFTP704
RJ45-6 1 AFTP705
RJ45-7 1 AFTP706

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number

XFORM Rev
A3 Berry IO Board X02
Date: Tuesday, February 23, 2010 Sheet 7 of 12
5 4 3 2 1
 5 4 3 2 1

SSID = USB

D D

+5V_USB1

USB1
R801
X01 1119 5
USB_PN0 1 2 USB_P0- 1
2 USB_PN0
0R0603-PAD
NP1

SC10U10V5KX-2GP
1

C822
USB_P0- 2
USB_P0+ 3
DY AFTP802 NP2

2
A00-0222 1
4
6

SKT-USB-333-GP-U
R802
C USB_PP0 1 2 USB_P0+ C
2 USB_PP0
0R0603-PAD 22.10321.451
close to USB1

AFTP801 1 +5V_USB1
+5V_USB1 AFTP803 1 USB_P0-
AFTP804 1 USB_P0+
+5V_USB1 D801

4 1

20091118 DY
1

DY R803
100KR2J-1-GP
C801
TC801
ST100U6D3VBM-5GP
SC1U10V2KX-1GP
2

USB_P0- 3 2 USB_P0+
2

PRTR5V0U2X-GP

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number

USB Port Rev
A3 X02
Berry IO Board
Date: W ednesday, February 24, 2010 Sheet 8 of 12
5 4 3 2 1
 5 4 3 2 1

SSID = ESATA
Block A
+3.3V_RUN

2
DY 1 +3.3V_RUN
R912 4K7R2J-2-GP
D 2
DY 1 D
R913 4K7R2J-2-GP

1
SCD01U16V2KX-3GP
C902
2
DY 1
C901

AUTOPW_SAV_EN
R914 4K7R2J-2-GP SCD1U10V2KX-4GP
2
DY 1

2
R922 4K7R2J-2-GP

A_EQ
B_EQ
A_BST#
ESATA_TXP1_
ESATA_TXN1_
ESATA_TXP1_ ESATA_TXN1_

4
3
4
3
RN903

21
20
19
18
17
16
RN902
U901
DY SRN0J-6-GP DY SRN0J-6-GP

A_BST#
A_EQ
B_EQ
GND

AUTOPW_EN
VDD
C904
SCD01U50V2KX-1GP

1
2
1
2
2 SATA_TXP1 1 15 ESATA_TXP1_CC 1 2 ESATA_TXP1_C
A_INP A_OUTP ESATA_TXN1_CC ESATA_TXN1_C
2 SATA_TXN1 2 A_INN A_OUTN 14 1 2
3 GND GND 13
SCD01U50V2KX-1GP 2 1 C907 SATA_RXN1 4 12 ESATA_RXN1_CC C905
2 SATA_RXN1_C SCD01U50V2KX-1GP B_OUTN B_INN
2 SATA_RXP1_C 2 1 C906 SATA_RXP1 5 B_OUTP B_INP 11 ESATA_RXP1_CC SCD01U50V2KX-1GP

B_BST#
B_PRE
A_PRE
4
3

VDD
RN901

EN
C DY SRN0J-6-GP
C
PS8511BTQFN20GTR-GP

6
7
8
9
10
+3.3V_RUN
1
2

ESATA_RXN1_ B_BST# 2
DY 1
ESATA_RXP1_ R921
4K7R2J-2-GP
R923
+3.3V_RUN 4K7R2J-2-GP
RN904 B_PRE
2
DY 1
A_PRE
ESATA_RXP1_ 3 2 ESATA_RXP1_CC 2
DY 1
ESATA_RXN1_ 4 DY 1 ESATA_RXN1_CC R924
4K7R2J-2-GP
SRN0J-6-GP

R906
ESATA_RXP1_CC 1 2 ESATA_RXP1_C 1 2 ESATA_RXP1
C908 SCD01U50V2KX-1GP 0R0603-PAD R907
1 2
2 USB_PP9
0R0603-PAD
ESATA CONN
ESATA1
B USB_P9+ B
U3 D+ GND 15
USB_P9-
A00-0222 U2 D- GND 14
13
ESATA_RXP1 GND
S6 B+ GND 12
ESATA_RXN1 S5 U4
B- GND
GND S7
R908 ESATA_TXP1 S2 S4
ESATA_RXN1_CC A+ GND
1 2 ESATA_RXN1_C 1 2 ESATA_RXN1 ESATA_TXN1 S3 A- GND S1
C909 SCD01U50V2KX-1GP 0R0603-PAD R910
2 USB_PN9 1 2 NP2 NP2
0R0603-PAD +5V_USB1 U1 NP1
VBUS NP1

1
SKT-USB17-GP
C923
SC10U10V5KX-2GP
DY
C910
DY

2
R909 SCD1U10V2KX-4GP
ESATA_TXP1_C ESATA_TXP1
1 2
0R0603-PAD
X01 1119
A00-0222 close to ESATA1
AFTP901 1 USB_P9-
AFTP902 1 USB_P9+
AFTP903 1 ESATA_RXN1
AFTP904 1 ESATA_RXP1
AFTP905 1 ESATA_TXN1
A AFTP906 1 ESATA_TXP1 <Core Design> A
AFTP907 1 +5V_USB1
AFTP908 1 GND
R911
ESATA_TXN1_C 1 2 ESATA_TXN1 Wistron Corporation
0R0603-PAD 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
ESATA
Size Document Number Rev
A3
Berry IO Board X02
Date: W ednesday, February 24, 2010 Sheet 9 of 12
5 4 3 2 1
 5 4 3 2 1

+3.3V_RUN
D D

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP
1

1
R1004

R1005
X02-1230 DY DY

2
TPNL1
9

AFTP1001 1 1

R1001 2
TPNL_GPIO
2,3 PSID_DISABLE# 1
DY 2 3
4
0R2J-2-GP USB_PN11_TPNL
USB_PP11_TPNL
5
6
DY
7
8
C C
AFTP1005 1 10

ACES-CON8-4-GP-U
A00-0222
R1002
USB_PN11 USB_PN11_TPNL AFTP1002 PSID_DISABLE#
2,5 USB_PN11 1
DY 2
AFTP1003
1
1 USB_PN11_TPNL
0R3J-0-U-GP AFTP1004 1 USB_PP11_TPNL

Close TPNL1
R1003
USB_PP11 USB_PP11_TPNL
B 2,5 USB_PP11 1
DY 2 B

0R3J-0-U-GP

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Touch Panel Conn
Size Document Number Rev
A4
Berry IO Board X02
Date: Monday, February 22, 2010 Sheet 10 of 12
5 4 3 2 1
 5 4 3 2 1

D D

H1
HOLE335R115-GP H2
HOLE335R115-GP H3 H4
HOLE335R115-GP HOLE335R115-GP

1
C C

1
20091116
20100203

HIO1
HIO2 STF237R48H172-1-GP HWW1 HWL1
STF237R48H172-1-GP STF237R148H67-GP STF237R117H83-1-GP SPR1
SPRING-67-GP SPR2
SPRING-68-GP
DY
1

1
DY
1
1

1
B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RESERVED
Size Document Number Rev
A4 Berry IO Board X02
Date: Wednesday, February 03, 2010 Sheet 11 of 12
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Change List
Size Document Number Rev
A3 Berry IO Board X02
Date: Friday, December 25, 2009 Sheet 12 of 12
5 4 3 2 1