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Compal Confidential
2 B5W18/19 Schematics Document 2

AMD "Carrizo/Carrizo-L/Bristol Ridge/Stoney Ridge" Platform

AMD 12~25W APU With Excavator/Puma+ Core


3 3

LA-D661P REV:0.3
2016-03-14

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
COVER PAGE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR030.3
Date: Monday, March 14, 2016 Sheet 1 of 35
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Compal Confidential
Model Name : Tricera_BS
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Display Port
204pin DDRIII-SO-DIMM X2
Memory BUS(DDR3) CHB Only

eDP Conn.
Port 1
HDMI Conn.
Port 0
AMD 1.5V DDRIII 1600MHz
( CZL and SR Channel B only)

USB2.0
USB2.0

Port 1 Port 0 Port 1 Port 2 Port 3 Port 4 Port 5


Port 4 PCIE
CARRIZO M/B S/B Touch S/B WLAN/BT
Camera
CARRIZO-L 2.0 Conn. 2.0 Conn. Screen Card Reader Combo
GPP2 GPP1
2
BRISTOL RIDGE USB3.0 2

NGFF LAN STONEY RIDGE


(WLAN/BT) RTL8111GUS Port 2
Co-lay
MB
USB2.0 3.0 Conn.
Port 6
Port 3 HD Audio(AZ)
Transformer AMD FP4 APU
RJ45 BGA 968-balls
SATA III

BIOS (8M) SPI Port 0 Port 1


Audio
ALC233-VB2-CG
3
I2C HDD ODD 3

Discrete TPM LPC Conn. Conn.


Port 1 Port 3

ENE Touch PTP


KBC9022 Screen (CZ/BR/SR)
(Reserve)
Int. AMIC Int. Speaker UAJ
Conn. on Sub/B
PS2 EC for I2C bridge on CZL

Int.KBD PTP
4
www.schematic-x.blogspot.com 4

Sub-borad Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title
Card Reader_AUDIO_USB/B THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BLOCK DIAGRAMS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 2 of 35
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RAM DDRIII SODIMMX2


+1.5V VDD_MEM 8A AMD APU FP4 Carrizo (15W)
+0.75VS VTT_MEM 2A

D D
VIN +19VB +APU_CORE
PU301 +0.775~+1.4V VDDCR_CPU @ 40A
AC ADAPTOR CHARGER PU701
19V 65W BQ24725ARGRR RT8880CGQW +APU_CORE_NB
+0.775~1.2V VDDCR_NB @ 12A

+0.95VALW VDDP_S5 @ 0.8A


BATT+
+0.95VALW U4 +0.95VS VDDP @ 7A
PU601 AO4304L +0.95VS
SYX198DQNC VDDP_GFX @ 1.5A
BATTERY
+1.5V
+1.5V VDDIO_MEM @ 3A

PU501 +1.5VS
RT8207PGQW +0.75VS +1.5VS VDDIO_AUDIO @ 0,2A
HDMI +5VS U3
TPS22966DPUR +1.8VS
C +5VS_DISP +1.8VS VDD_18 @ 1.5A C

PU602
+1.8VALW
SY8003DFC_
HDD x1 +1.8VALW VDD_18_S5 @ 0.5A
ODD x1

+5VS_HDD @ 1.1A
+5VS +3VALW
PU401 +3VALW VDD_33_S5@ 0.2A
+5VS_ODD @ 2A +5VALW SYX198BQNC
+3VS
U2 +3VS VDD_33 @ 0.2A
Audio TPS22966DPUR +5VS
ALC233-CG PU402
+5VDDA_CODEC
+5VS SYX198CQNC
+0.775~1.2V VDDCR_FCH_S5 @ 0.2A
+5VS_PVDD +3VS U5/U6
+0.775VALW U7/U8
+3VDD_CODEC
+IOVDD_CODEC +1.5VS AO4304L AO4304L
+0.775~1.2V VDDCR_GFX @ 30A
+APU_CORE_GFX +APU_CORE_FCH
B EC PU801 B
FAN RT8880CGQW
+1.5V_RTC VDDBT_RTC_G @ 4.5uA
+VCC_FAN
+3VLP
+5VS +EC_VCC +3VALW

USB2.0 x2 LCD panel +RTCBATT


USB3.0 x1 14"
+RTC_APU PU101
+19VB RTC
+USB3_VCCA +5VALW +INVPWR_B+ AP2138N-1.5TRG1 Battery
+LCDVDD @ 1.4A +3VS

LAN/CR Combo
RTL8111 HD Camera

+3V_LAN @ 1A +3VALW +3VS_CMOS +3VS


A A

NGFF (WL+BT) Touch Screen


Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

+3VS_WLAN @ 2A
+3VS POWER MAP
+5VS_TS
+5VS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 3 of 35
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Voltage Rails Board ID / SKU ID Table for AD channel


Power Plane Description S0 S3 S5
BOARD ID Table
VIN Adapter power supply (19V) ON ON ON
AC or battery power rail for power circuit. ON ON ON
Board ID PCB Revision
+19VB
+APU_CORE Core voltage for APU ON OFF OFF
0 EVT
+APU_CORE_NB Voltage for On-die VGA of APU ON OFF OFF
1 DVT
+APU_CORE_GFX Voltage for GFX ON OFF OFF
2 PVT
1 1

+APU_CORE_FCH Fusion Controller Hub Power Supply ON ON ON


3
ON ON ON
4
+0.95VALW 0.95V always on power rail
ON OFF OFF
5
+0.95VS 0.95V switched power rail
ON ON ON
6
+1.8VALW 1.8V always on power rail
ON OFF OFF
7
+1.8VS 1.8V switched power rail
+1.5V 1.5V power rail for APU and DDR ON ON OFF
+1.5VS 1.5V switched power rail ON OFF OFF

+0.75VS 0.75V switched power rail for DDR terminator ON OFF OFF
+0.775VALW 0.775V always on power rail ON ON ON
+3VALW 3.3V always on power rail ON ON ON
+3VS 3.3V switched power rail ON OFF OFF

+5VALW 5V always on power rail ON ON ON


+5VS 5V switched power rail ON OFF OFF
+RTC_APU RTC power ON ON ON
+3VSDGPU VGA power ON OFF OFF
+1.8VSDGPU VGA power ON OFF OFF
2 2

+1.5VSDGPU VGA power ON OFF OFF


+0.95VSDGPU VGA power ON OFF OFF
+VGA_CORE VGA power ON OFF OFF

BOM Structure Table POWER SEQUENCE


SMBus/I2C Address Table BOM Structure BTO Item G-A +RTC

@ Unpop EC_ON
Address(8bit)
Master Address(7 bit) EMI/ESD Unpop +5VALW
Device Write Read
@EMC@
EMC@ EMI/ESD pop 3V_EN

JDIMM1 Carrizo/Bristol/Stoney EMI/ESD pop +3VALW


0101 0000b 1010 0000b 1010 0001b T13EMC@
APU SMBus 50H A0H A1H T2EMC@ Carrizo-L EMI/ESD pop 0.95_1.8VALW_PWREN
Port 0 (+3VS) 255@ ALC255 Pop G-B +1.8VALW/+0.95VALW
JDIMM2 0101 0001b 1010 0010b 1010 0011b ALC233 Pop 0.95V_SPOK
233@
51H A2H A3H +0.775VALW
9012@ KBC9012 Pop
APU SMBus Use As 9022@ KBC9022 Pop SYSON
G-C
3
Port 1 (+3VALW) I2C T13@ Carrizo/Bristol/Stoney Pop +1.5V
3

T1@ Carrizo/Bristol Pop SUSP#


APU I2C N.A Carrizo-L Pop +5VS/+3VS/+1.8VS
Port 0 (+1.8VS) T2@
T3@ Stoney Pop G-D +1.5VS/0.75VS

APU I2C N.A 8111H@ 8111H Pop 0.95VS_PWR_EN#


Port 1 (+1.8VS) 8111GUS@ 8111GUS Pop +0.95VS

TPM@ TPM Pop VR_ON


APU I2C Use As HDMI Royalty +APU_CORE
Port 2 (+3VS) 45@
SMBus G-E
CONN@ ME Connector +APU_CORE_NB

APU I2C PTP Jump +APU_GFX


0010 1100b 0101 1000b 0101 1001b JP@
Port 3 (+3VALW) (Synaptics) 2CH 58H 59H RS@ R-Short
TP@ Test Point ZZZ
Smart Battery 0000 1011b 0001 0110b 0001 0111b BIOS Board ID for CZ
CZ@
EC SMBus 0BH 16H 17H
BR@ BIOS Board ID for BR
Port 1 (+3VALW)
Charger IC 0000 1001b 0001 0010b 0001 0011b PCB
Part Number = DA80016V000
(BQ24725) 09H 12H 13H PCB 1NW LA-D661P REV0 MB 1

4 4
APU Temp. 0100 1100b 1001 1000b 1001 1001b
EC SMBus (TSI) 4CH 98H 99H
Port 2 (+3VS)

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NOTES LIST
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03 0.3
Date: Monday, March 14, 2016 Sheet 4 of 35
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UAPU1B @
PCIE

U10 P_GPP_RXP[0] P_GPP_TXP[0] R1 PCIE_ATX_DRX_P0 C19 1 2 .1U_0402_16V7K


<18> PCIE_ARX_DTX_P0 PCIE_ATX_DRX_N0 C20 1 PCIE_ATX_C_DRX_P0 <18>
U9 P_GPP_RXN[0] LAN P_GPP_TXN[0] R2 2 .1U_0402_16V7K
<18> PCIE_ARX_DTX_N0 PCIE_ATX_C_DRX_N0 <18>
T6 P_GPP_RXP[1] P_GPP_TXP[1] R4 PCIE_ATX_DRX_P1 C17 1 2 .1U_0402_16V7K
<19> PCIE_ARX_DTX_P1 PCIE_ATX_DRX_N1 C18 1 PCIE_ATX_C_DRX_P1 <19>
T5 P_GPP_RXN[1] WLAN P_GPP_TXN[1] R3 2 .1U_0402_16V7K
<19> PCIE_ARX_DTX_N1 PCIE_ATX_C_DRX_N1 <19>
D D
T9 P_GPP_RXP[2] P_GPP_TXP[2] N1
T8 P_GPP_RXN[2] P_GPP_TXN[2] N2

P7 P_GPP_RXP[3] P_GPP_TXP[3] N4
P6 P_GPP_RXN[3] P_GPP_TXN[3] N3

R542 1 T13@ 2 196_0402_1% P_ZVDDP U7 P_ZVDDP P_ZVSS/P_RX_ZVDDP U6


P_ZVSS R73 1 T2@ 2 1K_0402_1%
+0.95VS +0.95VS
R541 1 T13@ 2 196_0402_1%

R542 T2@
P10 P_GFX_RXP[0] P_GFX_TXP[0] M2
P9 P_GFX_RXN[0] P_GFX_TXN[0] M1

N6 P_GFX_RXP[1] P_GFX_TXP[1] L1
N5 P_GFX_RXN[1] P_GFX_TXN[1] L2
Part Number = SD00000JB80
S RES 1/16W 1.69K +-1% 0402 N9 P_GFX_RXP[2] P_GFX_TXP[2] L4
N8 P_GFX_RXN[2] P_GFX_TXN[2] L3

L7 P_GFX_RXP[3] P_GFX_TXP[3] J1
C L6 P_GFX_RXN[3] P_GFX_TXN[3] J2 C

L10 P_GFX_RXP[4] P_GFX_TXP[4] J4


L9 P_GFX_RXN[4] P_GFX_TXN[4] J3

K6 P_GFX_RXP[5] P_GFX_TXP[5] H2
K5 P_GFX_RXN[5] P_GFX_TXN[5] H1

K9 P_GFX_RXP[6] P_GFX_TXP[6] G1
K8 P_GFX_RXN[6] P_GFX_TXN[6] G2

J7 P_GFX_RXP[7] P_GFX_TXP[7] G4
J6 P_GFX_RXN[7] P_GFX_TXN[7] G3
UAPU1 UAPU1

FP4 REV 0.93

FP4_BGA968

APU SRA9@ APU CZLA8@


Part Number = SA00009VY00 Part Number = SA00008PS40
B S IC A9-9410 AM9410AFY23AC 2.9G BGA APU S IC A8 SERIES AM7410JBY44JB 2.2G ABO! B

UAPU1 UAPU1 UAPU1 UAPU1

APU BRFX@ APU CZFX@ APU SRA6@ APU CZLA6@


Part Number = SA00009LB00 Part Number = SA00008T310 Part Number = SA00009VZ00 Part Number = SA00008KX40
S IC FX-9800P FM980PADY44AB 2.7G BGA968P S IC FX-8800P FM880PAAY43KA 2.1G ABO ! S IC A6-9210 AM9210AVY23AC 2.4G BGA APU S IC CARRIZO-L AM7310JBY44JB 2G BGA ABO!

UAPU1 UAPU1 UAPU1 UAPU1

APU BRA10@ APU CZA10@ APU SRE2@ APU CZLA4@


Part Number = SA00009LD00 Part Number = SA00008T410 Part Number = SA00009X000 Part Number = SA00008J540
S IC A10-9600P AM960PADY44AB 2.4G BGA968 S IC A10-8700P AM870PAAY43KA 1.8G ABO! S IC E2-9010 EM9010AVY23AC 2G BGA968 APU S IC CARRIZO-L AM7210JBY44JB 1.8G ABO!
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP4 PCIE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 5 of 35
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5 4 3 2 1

UAPU1A @ UAPU1I @
<12,13> DDRB_SMA[15..0] DDRB_SDQ[63..0] <12,13>
MEMORY A MEMORY B
AE28 MA_ADD[0] MA_DATA[0] H17 DDRB_SMA0 AG31 MB_ADD[0] MB_DATA[0] A25 DDRB_SDQ0
Y27 MA_ADD[1] MA_DATA[1] J17 DDRB_SMA1 AC30 MB_ADD[1] MB_DATA[1] C25 DDRB_SDQ1
Y29 MA_ADD[2] MA_DATA[2] F20 DDRB_SMA2 AC31 MB_ADD[2] MB_DATA[2] C27 DDRB_SDQ2
Y26 MA_ADD[3] MA_DATA[3] H20 DDRB_SMA3 AB32 MB_ADD[3] MB_DATA[3] D27 DDRB_SDQ3
W 28 MA_ADD[4] MA_DATA[4] E17 DDRB_SMA4 AA32 MB_ADD[4] MB_DATA[4] B24 DDRB_SDQ4
W 29 MA_ADD[5] MA_DATA[5] F17 DDRB_SMA5 AA33 MB_ADD[5] MB_DATA[5] B25 DDRB_SDQ5
W 26 MA_ADD[6] MA_DATA[6] K18 DDRB_SMA6 AA31 MB_ADD[6] MB_DATA[6] B27 DDRB_SDQ6
U29 MA_ADD[7] MA_DATA[7] E20 DDRB_SMA7 Y33 MB_ADD[7] MB_DATA[7] A27 DDRB_SDQ7
W 25 MA_ADD[8]
DDRB_SMA8 AA30 MB_ADD[8]
U26 MA_ADD[9] MA_DATA[8] A21 DDRB_SMA9 W 32 MB_ADD[9] MB_DATA[8] A29 DDRB_SDQ8
AG29 MA_ADD[10] MA_DATA[9] C21 DDRB_SMA10 AG32 MB_ADD[10] MB_DATA[9] C29 DDRB_SDQ9
U27 MA_ADD[11] MA_DATA[10] C23 DDRB_SMA11 Y32 MB_ADD[11] MB_DATA[10] B32 DDRB_SDQ10
D DDRB_SMA12 DDRB_SDQ11 D
T28 MA_ADD[12] MA_DATA[11] D23 W 33 MB_ADD[12] MB_DATA[11] D32
AK26 MA_ADD[13] MA_DATA[12] B20 DDRB_SMA13 AL31 MB_ADD[13] MB_DATA[12] B28 DDRB_SDQ12
T26 MA_ADD[14]/MA_BG[1] MA_DATA[13] B21 DDRB_SMA14 W 30 MB_ADD[14]/MB_BG[1] MB_DATA[13] B29 DDRB_SDQ13
T25 MA_ADD[15]/MA_ACT_L MA_DATA[14] B23 DDRB_SMA15 V32 MB_ADD[15]/MB_ACT_L MB_DATA[14] A31 DDRB_SDQ14
MA_DATA[15] A23 MB_DATA[15] C31 DDRB_SDQ15

MA_DATA[16] G22 MB_DATA[16] E30 DDRB_SDQ16


AG26 MA_BANK[0] MA_DATA[17] H22 AH32 MB_BANK[0] MB_DATA[17] E31 DDRB_SDQ17
<12,13> DDRB_SBS0# DDRB_SDQ18
AG27 MA_BANK[1] MA_DATA[18] E25 AG33 MB_BANK[1] MB_DATA[18] G33
<12,13> DDRB_SBS1# DDRB_SDQ19
T29 MA_BANK[2]/MA_BG[0] MA_DATA[19] G25 W 31 MB_BANK[2]/MB_BG[0] MB_DATA[19] G32
<12,13> DDRB_SBS2# DDRB_SDQ20
MA_DATA[20] J20 MB_DATA[20] C33
<12,13> DDRB_SDM[7..0] DDRB_SDM0 DDRB_SDQ21
E19 MA_DM[0] MA_DATA[21] E22 D25 MB_DM[0] MB_DATA[21] D33
D21 MA_DM[1] MA_DATA[22] H23 DDRB_SDM1 D29 MB_DM[1] MB_DATA[22] G30 DDRB_SDQ22
K21 MA_DM[2] MA_DATA[23] J23 DDRB_SDM2 E33 MB_DM[2] MB_DATA[23] G31 DDRB_SDQ23
F29 MA_DM[3]
DDRB_SDM3 J33 MB_DM[3]
AP28 MA_DM[4] MA_DATA[24] F26 DDRB_SDM4 AR30 MB_DM[4] MB_DATA[24] J30 DDRB_SDQ24
AV26 MA_DM[5] MA_DATA[25] E27 DDRB_SDM5 AW 30 MB_DM[5] MB_DATA[25] J31 DDRB_SDQ25
AR22 MA_DM[6] MA_DATA[26] J26 DDRB_SDM6 BC30 MB_DM[6] MB_DATA[26] L33 DDRB_SDQ26
BC22 MA_DM[7] MA_DATA[27] J27 DDRB_SDM7 BC26 MB_DM[7] MB_DATA[27] L32 DDRB_SDQ27
K29 MA_DM[8] MA_DATA[28] H25 N33 MB_DM[8] MB_DATA[28] H32 DDRB_SDQ28
MA_DATA[29] E26 MB_DATA[29] H33 DDRB_SDQ29
H19 MA_DQS_H[0] MA_DATA[30] G28 B26 MB_DQS_H[0] MB_DATA[30] L30 DDRB_SDQ30
<12,13> DDRB_SDQS0 DDRB_SDQ31
G19 MA_DQS_L[0] MA_DATA[31] G29 A26 MB_DQS_L[0] MB_DATA[31] L31
<12,13> DDRB_SDQS0#
B22 MA_DQS_H[1] B30 MB_DQS_H[1]
<12,13> DDRB_SDQS1
A22 MA_DQS_L[1] MA_DATA[32] AN26 A30 MB_DQS_L[1] MB_DATA[32] AN31 DDRB_SDQ32
<12,13> DDRB_SDQS1#
F23 MA_DQS_H[2] MA_DATA[33] AP29 F32 MB_DQS_H[2] MB_DATA[33] AP32 DDRB_SDQ33
<12,13> DDRB_SDQS2
E23 MA_DQS_L[2] MA_DATA[34] AR26 E32 MB_DQS_L[2] MB_DATA[34] AT32 DDRB_SDQ34
<12,13> DDRB_SDQS2#
G27 MA_DQS_H[3] MA_DATA[35] AP24 K32 MB_DQS_H[3] MB_DATA[35] AU32 DDRB_SDQ35
<12,13> DDRB_SDQS3
F27 MA_DQS_L[3] MA_DATA[36] AN29 J32 MB_DQS_L[3] MB_DATA[36] AN33 DDRB_SDQ36
<12,13> DDRB_SDQS3#
C AP25 MA_DQS_H[4] MA_DATA[37] AN27 AR32 MB_DQS_H[4] MB_DATA[37] AN32 DDRB_SDQ37 C
<12,13> DDRB_SDQS4
AP26 MA_DQS_L[4] MA_DATA[38] AR29 AR33 MB_DQS_L[4] MB_DATA[38] AR31 DDRB_SDQ38
<12,13> DDRB_SDQS4#
AW 27 MA_DQS_H[5] MA_DATA[39] AR27 AW 32 MB_DQS_H[5] MB_DATA[39] AT33 DDRB_SDQ39
<12,13> DDRB_SDQS5
AV27 MA_DQS_L[5] AW 33 MB_DQS_L[5]
<12,13> DDRB_SDQS5#
AV22 MA_DQS_H[6] MA_DATA[40] AU26 BA29 MB_DQS_H[6] MB_DATA[40] AU30 DDRB_SDQ40
<12,13> DDRB_SDQS6
AU22 MA_DQS_L[6] MA_DATA[41] AV29 AY29 MB_DQS_L[6] MB_DATA[41] AV32 DDRB_SDQ41
<12,13> DDRB_SDQS6#
BA21 MA_DQS_H[7] MA_DATA[42] AU25 BA25 MB_DQS_H[7] MB_DATA[42] BA33 DDRB_SDQ42
<12,13> DDRB_SDQS7
AY21 MA_DQS_L[7] MA_DATA[43] AW 25 AY25 MB_DQS_L[7] MB_DATA[43] AY32 DDRB_SDQ43
<12,13> DDRB_SDQS7#
L27 MA_DQS_H[8] MA_DATA[44] AU29 P32 MB_DQS_H[8] MB_DATA[44] AU33 DDRB_SDQ44
L26 MA_DQS_L[8] MA_DATA[45] AU28 N32 MB_DQS_L[8] MB_DATA[45] AU31 DDRB_SDQ45
MA_DATA[46] AW 26 MB_DATA[46] AW 31DDRB_SDQ46
AE25 MA_CLK_H[0] MA_DATA[47] AT25 AE33 MB_CLK_H[0] MB_DATA[47] AY33 DDRB_SDQ47
<12> DDRB_CLK0
AE26 MA_CLK_L[0] AE32 MB_CLK_L[0]
<12> DDRB_CLK0#
AD26 MA_CLK_H[1] MA_DATA[48] AV23 AE30 MB_CLK_H[1] MB_DATA[48] BC31 DDRB_SDQ48
<12> DDRB_CLK1
AD27 MA_CLK_L[1] MA_DATA[49] AW 23 AE31 MB_CLK_L[1] MB_DATA[49] BB30 DDRB_SDQ49
<12> DDRB_CLK1#
AB28 MA_CLK_H[2] MA_DATA[50] AV20 AD32 MB_CLK_H[2] MB_DATA[50] BB28 DDRB_SDQ50
<13> DDRB_CLK2
AB29 MA_CLK_L[2] MA_DATA[51] AW 20 AD33 MB_CLK_L[2] MB_DATA[51] AY27 DDRB_SDQ51
<13> DDRB_CLK2#
AB25 MA_CLK_H[3] MA_DATA[52] AR23 AC33 MB_CLK_H[3] MB_DATA[52] BB32 DDRB_SDQ52
<13> DDRB_CLK3
AB26 MA_CLK_L[3] MA_DATA[53] AT23 AC32 MB_CLK_L[3] MB_DATA[53] BA31 DDRB_SDQ53
<13> DDRB_CLK3#
MA_DATA[54] AR20 MB_DATA[54] BC29 DDRB_SDQ54
N29 MA_RESET_L MA_DATA[55] AT20 T33 MB_RESET_L MB_DATA[55] BB29 DDRB_SDQ55
<12,13> DDRB_RST#
AE29 MA_EVENT_L AG30 MB_EVENT_L
<12,13> DDRB_EVENT#
MA_DATA[56] BB23 MB_DATA[56] BB27 DDRB_SDQ56
P27 MA_CKE0 MA_DATA[57] BB22 U32 MB_CKE0 MB_DATA[57] BB26 DDRB_SDQ57
<12,13> DDRB_CKE0
P29 MA_CKE1 MA_DATA[58] BB20 U33 MB_CKE1 MB_DATA[58] BB24 DDRB_SDQ58
<12,13> DDRB_CKE1
MA_DATA[59] AY19 MB_DATA[59] AY23 DDRB_SDQ59
MA_DATA[60] BA23 MB_DATA[60] BA27 DDRB_SDQ60
MA_DATA[61] BC23 MB_DATA[61] BC27 DDRB_SDQ61
AK27 MA0_ODT[0] MA_DATA[62] BC21 AL30 MB0_ODT[0] MB_DATA[62] BC25 DDRB_SDQ62
<12> DDRB_ODT0
AL26 MA0_ODT[1] MA_DATA[63] BB21 AM32 MB0_ODT[1] MB_DATA[63] BB25 DDRB_SDQ63
B <12> DDRB_ODT1 B
AH25 MA1_ODT[0] AJ32 MB1_ODT[0]
<13> DDRB_ODT2
AL25 MA1_ODT[1] MA_CHECK[0] K26 AM33 MB1_ODT[1] MB_CHECK[0] N30
<13> DDRB_ODT3
MA_CHECK[1] K28 MB_CHECK[1] N31
AH26 MA0_CS_L[0] MA_CHECK[2] N26 AJ33 MB0_CS_L[0] MB_CHECK[2] R33
<12> DDRB_SCS0#
AL29 MA0_CS_L[1] MA_CHECK[3] N28 AL32 MB0_CS_L[1] MB_CHECK[3] R32
<12> DDRB_SCS1#
AH29 MA1_CS_L[0] MA_CHECK[4] J29 AJ30 MB1_CS_L[0] MB_CHECK[4] M32
<13> DDRB_SCS2#
AL28 MA1_CS_L[1] MA_CHECK[5] K25 AL33 MB1_CS_L[1] MB_CHECK[5] M33
<13> DDRB_SCS3#
MA_CHECK[6] L29 MB_CHECK[6] R30
MA_CHECK[7] N25 MB_CHECK[7] R31
AG24 MA_RAS_L/MA_RAS_L_ADD[16] AH33 MB_RAS_L/MB_RAS_L_ADD[16]
<12,13> DDRB_SRAS#
AK29 MA_CAS_L/MA_CAS_L_ADD[15] AK32 MB_CAS_L/MB_CAS_L_ADD[15]
<12,13> DDRB_SCAS#
AH28 MA_WE_L/MA_WE_L_ADD[14] AJ31 MB_WE_L/MB_WE_L_ADD[14]
<12,13> DDRB_SWE#

B19 MA_VREFDQ MA_ZVDDIO_MEM_S AD29


MEM_MA_ZVDDIO 1 T1@ 2 TP@ T4946 A19 MB_VREFDQ MB_ZVDDIO_MEM_S AF32
MEM_MB_ZVDDIO 1 2
+1.5V +1.5V
T32 M_VREF R74 R75
+MEM_VREF
39.2_0402_1% 39.2_0402_1%
FP4 REV 0.93 FP4 REV 0.93

FP4_BGA968 FP4_BGA968

+MEM_VREF
+1.5V RP2
1 8
2 7
CLOSE TO APU
3 6 1 1
4 5 DDRB_EVENT#
C163 C144
1K_0804_8P4R_1% .1U_0402_16V7K 1000P_0402_50V7K
A 2 2 A

MEMORY VREF
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP4 MEMORY INTERFACE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 6 of 35
5 4 3 2 1
A B C D E

+1.8VS UAPU1C @
@ RP14 DISPLAY/SVI2/JTAG/TEST
8 1 APU_SVT_R
7 2 APU_SVC
6 3 APU_SVD B6 DP2_TXP[0] DP_ZVSS A9 DP_ZVSS R400 1 2 2K_0402_1%
5 4 A6 DP2_TXN[0] DP_AUX_ZVSS B9 DP_AUX_ZVSS R401 1 2 150_0402_1% +1.8VALW +1.8VALW
DP_BLON G5 ENBKL_R
1K_0804_8P4R_5% D7 DP2_TXP[1] DP_DIGON G6 ENVDD_R

5
@ RP17 C7 DP2_TXN[1] DP_VARY_BL F11 INVTPWM_R U64 U2611
8 1 GFX_SVC 1 1

P
7 2 GFX_SVD A7 NC 4 NC 4
DP2_TXP[2]
Y ENVDD <17> Y INVTPWM <17>
1 6 3 GFX_SVT_R B7 DP2_TXN[2] DP2_AUXP H9 ENVDD_R 2 INVTPWM_R 2 1
A A

G
5 4 DP2_AUXN G9 @ T13@
D9 DP2_TXP[3] DP2_HPD E9 NL17SZ07DFT2G_SC70-5 NL17SZ07DFT2G_SC70-5

3
1K_0804_8P4R_5% C9 DP2_TXN[3] SA00004BV00 SA00004BV00
DP1_AUXP F7
A2 DP1_TXP[0] DP1_AUXN E7 EDP_AUXP <17>
APU_PROCHOT# <17> EDP_TXP0 A3 F5 EDP_AUXN <17> +1.8VALW
DP1_TXN[0] DP1_HPD
APU_RST# <17> EDP_TXN0 EDP_HPD <17> ENVDD_R
Close to APU R683 1 2 0_0402_5% ENVDD
APU_PWROK B4 DP1_TXP[1] DP0_AUXP F8
<17> EDP_TXP1 HDMI_SCLK <16>

5
A4 E8 U2610 INVTPWM_R R703 1 T2@ 2 0_0402_5% INVTPWM
1 <17> EDP_TXN1 DP1_TXN[1] DP0_AUXN
HDMI_SDATA <16>
1

EMC@ EMC@ @EMC@ G8 1

P
DP0_HPD
D5 HDMI_HPD <16> NC 4 ENBKL_R
C2647 C2648 C2649 DP1_TXP[2] R3904 1 T2@ 2 0_0402_5% ENBKL
<17> EDP_TXP2 C5 K24 ENBKL_R 2 Y ENBKL <14>
33P_0402_50V8J 33P_0402_50V8J .1U_0402_16V7K DP1_TXN[2] RSVD_1
<17> EDP_TXN2
2

G
2 TEMPIN0 E15 T13@
A5 DP1_TXP[3] TEMPIN1 E14 NL17SZ07DFT2G_SC70-5 +3VS
<17> EDP_TXP3

3
B5 DP1_TXN[3] TEMPIN2 E12 SA00004BV00
<17> EDP_TXN3 F14 1 2 ENVDD_R 1
2
TEMPINRETURN ENVDD @
E2 DP0_TXP[0] TEST410 AK24 APU_TEST410 TP@ R1160 R3847
<16> APU_DP0_P0 APU_TEST411 T32
E1 DP0_TXN[0] TEST411 AL24 T33 TP@ 4.7K_0402_5% 100K_0402_5%
<16> APU_DP0_N0 P24 APU_TEST4 INVTPWM_R 1
TEST4
T34 TP@ INVTPWM 1 T13@ 2 @ 2
E3 DP0_TXP[1] TEST5 N24 APU_TEST5 TP@ R1161 R3835
<16> APU_DP0_P1 T35
E4 DP0_TXN[1] TEST6 AN24 4.7K_0402_5% 100K_0402_5%
<16> APU_DP0_N1 AB8 1 T13@ 2 ENBKL_R 1 2
TEST9 ENBKL
D1 DP0_TXP[2] TEST10 Y9 R3905 R3906
2 <16> APU_DP0_P2 D2 B10 APU_TEST14 2
DP0_TXN[2] TEST14 @ RP30 4.7K_0402_5% 100K_0402_5%
<16> APU_DP0_N2 APU_TEST15 APU_TEST11
TEST15 D11 T40 TP@ 8 1
C1 DP0_TXP[3] TEST16 A10 APU_TEST16 APU_TEST17 7 2
<16> APU_DP0_P3 B1 C11 APU_TEST17 APU_TEST16 6 3
DP0_TXN[3] TEST17
<16> APU_DP0_N3 APU_TEST11 APU_TEST14
TEST11 B11 5 4
APU_SVT_R C15 SVT0 TEST18 A14 APU_TEST18
<32> APU_SVT_R APU_SVC_R APU_TEST19
R2612 1 2 0_0402_5% D17 SVC0 TEST19 B14 1K_0804_8P4R_5%
<32> APU_SVC 1 2 0_0402_5% APU_SVD_R D19
R2613 SVD0
<32> APU_SVD
GFX_SVT_R B15 A13 APU_TEST28_H
<33> GFX_SVT_R GFX_SVC_R
SVT1 TEST28_H
APU_TEST28_L T43 TP@ +1.8VS
R2614 1 T1@ 2 0_0402_5% B16 B13
<33> GFX_SVC GFX_SVD_R
SVC1 TEST28_L
APU_TEST31 T42 TP@
R2615 1 T1@ 2 0_0402_5% A18 SVD1 TEST31 P26 T41 TP@
<33> GFX_SVD E11 APU_TEST36 APU_TEST37 1 2 APU_TEST36 1
DP_STEREOSYNC/TEST36 @ T13@ 2 +1.8VS
APU_SIC B18 SIC TEST37 A17 APU_TEST37 R117 R155
APU_SID C17 SID 1K_0402_5% 1K_0402_5%
1 @ 2 1 T2@ 2 +3VS
+1.8VS R80 1 2 300_0402_5% APU_RST# D15 RESET_L R118 R120
R82 1 2 300_0402_5% APU_PWROK C19 PWROK 1K_0402_5% 1K_0402_5%
+1.8VS
1 @ 2
<32,33> APU_PWROK
A15 PROCHOT_L R154
<14,32,33> APU_PROCHOT# APU_ALERT# B17 ALERT_L 1K_0402_5%
VDDCR_GFX_SENSE H11
APU_TDI H15 J12 APU_COREGFX_SEN_H <33>
TDI VDDCR_NB_SENSE
APU_TDO H14 APU_CORENB_SEN_H <32>
VDDCR_CPU_SENSE G12
3
+1.8VS
RP25
APU_TCK
APU_TMS
D13
G15
TDO
TCK
TMS
VDDP_SENSE AY18
APU_CORE_SEN_H <32>
+1.8VS
HDT+ 3

8 1 APU_PROCHOT# APU_TRST# J14 TRST_L VSS_SENSE H12 JHDT1 @


7 2 APU_SID APU_DBRDY C13 APU_VSS_SEN_L <32,33> 1 2 APU_TCK_R 1 2 APU_TCK
DBRDY @
6 3 APU_ALERT# APU_DBREQ# A11 1 2 R706 0_0402_5% +1.8VS
DBREQ_L
5 4 APU_SIC 3 4 APU_TMS_R 1 @ 2 APU_TMS RP28
3 4 R694 0_0402_5% APU_DBREQ# 1 8
1K_0804_8P4R_5% 5 6 APU_TDI_R 1 @ 2 APU_TDI APU_TDI 2 7
T13@ FP4 REV 0.93 5 6 R705 0_0402_5% APU_TMS 3 6
FP4_BGA968 7 8 APU_TDO_R 1 @ 2 APU_TDO APU_TCK 4 5
7 8
R3969 T13@ R3970 T13@ R704 0_0402_5%
APU_TRST# 1 2 APU_TRST#_R 9 10 APU_PWROK_R 1 @ 2 APU_PWROK 1K_0804_8P4R_5%
R671 33_0402_5% 9 10 R682 0_0402_5%
RP29 HDT_P11 11 12 APU_RST#_R 1 @ 2 APU_RST# +1.8VS
+1.8VS 1 8 11 12 R707 0_0402_5% RP27
2 7 HDT_P13 13 14 APU_DBRDY_R 1 @ 2 APU_DBRDY 1 8
Part Number = SD028220180 Part Number = SD028220180 3 6 13 14 R708 0_0402_5% APU_TRST# 2 7
S RES 1/16W 2.2K +-5% 0402 S RES 1/16W 2.2K +-5% 0402 4 5 HDT_P15 15 16 APU_DBREQ#_R 1 2 APU_DBREQ# APU_TEST19 3 6
15 16
5

R672 33_0402_5% APU_TEST18 4 5


+3VS 10K_0804_8P4R_5% 17 18 APU_TEST19
G

EC_SMB_CK2 34 APU_SIC 17 18 1K_0804_8P4R_5%


APU_TEST18 APU_TRST#
D

Q79A T13@ 19 20 1 2
19 20
2

1 T2@ 2 EC_SMB_CK2 DMN63D8LDW_SOT363-6


R3969 1K_0402_5% C141
G

4 4
1 T2@ 2 EC_SMB_DA2 EC_SMB_DA2 6 1 APU_SID 0.01U_0402_16V7K
D

R3970 1K_0402_5% Q79B T13@ SAMTE_ASP-136446-07-B


1 T2@ 2 APU_ALERT# DMN63D8LDW_SOT363-6
R134 1K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
1 T2@ 2 APU_PROCHOT# 1 T2@ 2 APU_SIC 2016/03/14 2018/03/14 Title
<14> EC_SMB_CK2 Issued Date Deciphered Date
R158 1K_0402_5% R679
0_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP4 DISP/MISC/HDT
1 T2@ 2 APU_SID AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
<14> EC_SMB_DA2
R680 B 0.3
0_0402_5%
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 7 of 35
A B C D E
A B C D E

+3VALW R3953 T2@ +3VALW R3892 T2@


C912 1 2 150P_0402_50V8J
C615 1 2 150P_0402_50V8J UAPU1D @

2
ACPI/SD/AZ/GPIO/RTC/I2C/UART/MISC
R602 1 2 33_0402_5%LPC_RST_A# BB12 LPC_RST_L SD0_WP/EGPIO101 BB2 R3953 CZ@ R3892 BR@
<14,22> LPC_RST#
R907 1 2 33_0402_5%APU_PCIE_RST#_R AN7 PCIE_RST_L/EGPIO26 SD0_PWR_CTRL/AGPIO102 BB5 10K_0402_5% 10K_0402_5%
<18,19> APU_PCIE_RST#
SD0_CD/AGPIO25 BC2 Part Number = SD028100280 Part Number = SD028100280
AE4 RSMRST_L SD0_CLK/EGPIO95 BB4 S RES 1/16W 10K +-5% 0402 S RES 1/16W 10K +-5% 0402
<14> EC_RSMRST#

1
SD0_CMD/EGPIO96 AY5 AGPIO12 AGPIO10
AE1 PWR_BTN_L/AGPIO0 R3952 BR@ R2624 CZ@
<14> PBTN_OUT#
BC9 PWR_GOOD
<14> SYS_PW RGD_EC

2
SYS_RST# AF2 SYS_RESET_L/AGPIO1

1 AG2 WAKE_L/AGPIO2 SD0_DATA0/EGPIO97 BC3 R3952 T3@ R2624 T3@ 1


<18> APU_PCIE_W AKE#
SD0_DATA1/EGPIO98 BA3 10K_0402_5% 10K_0402_5%
AK7 SLP_S3_L SD0_DATA2/EGPIO99 BC5
<14> SLP_S3#
AH5 SLP_S5_L SD0_DATA3/EGPIO100 BA5 Part Number = SD028100280 Part Number = SD028100280
<14> SLP_S5#

1
SD0_LED/EGPIO93 BB6 EGPIO93 S RES 1/16W 10K +-5% 0402 S RES 1/16W 10K +-5% 0402
AGPIO10 AE8 S0A3_GPIO/AGPIO10
AH8 S5_MUX_CTRL/EGPIO42 SCL0/I2C2_SCL/EGPIO113 BA15
<15,33> S5_MUX_CTRL APU_SCLK0 <12,13>
SDA0/I2C2_SDA/EGPIO114 AY17
APU_TEST0 APU_SDATA0 <12,13>
AH6 TEST0
APU_TEST1 AK8 TEST1/TMS SCL1/I2C3_SCL/AGPIO19 AG5
APU_TEST2 APU_I2C3_SCL <22>
AE3 TEST2 SDA1/I2C3_SDA/AGPIO20 AG4 AGPIO12 AGPIO10
APU_I2C3_SDA <22>
AY15 ESPI_RESET_L/KBRST_L/AGPIO129
<14> KBRST#
BC19 SR
<14> GATEA20
AD7
GA20IN/AGPIO126
LPC_PME_L/AGPIO22 AGPIO3 AL5 AGPIO3
0 0
<14> EC_SCI#
BB13 LPC_SMI_L/AGPIO86 AGPIO4 AL6 AGPIO4
<14> EC_SMI#
AJ1 AGPIO5 BR
AG3 AC_PRES/USB_OC4_L/IR_RX0/AGPIO23
AGPIO5
AGPIO6/LDT_RST AJ3
0 1
<20> ODD_DA#
AD5 IR_TX0/USB_OC5_L/AGPIO13 AGPIO7/LDT_PWROK AH1
AL8 AJ4 CZ
AN8
IR_TX1/USB_OC6_L/AGPIO14
IR_RX1/AGPIO15
AGPIO8
AGPIO9 AK5
TS_I2C_INT#_APU <17> 1 0
AGPIO12 AE2 IR_LED_L/LLB_L/AGPIO12 VDDGFX_PD/AGPIO39 AD8
BC15 AG8 CZL
<18> LAN_CLKREQ#
BB17
CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92

CLK_REQ1_L/AGPIO115
AGPIO40
AGPIO64 AW15AGPIO64
VDDGFX_PW RGD <33> 1 1
<19> W LAN_CLKREQ#
BC17 CLK_REQ2_L/AGPIO116 AGPIO65 AU15
BB18 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131
<20> ODD_PW R
EGPIO132 BB16 CLK_REQG_L/OSCIN/EGPIO132 AGPIO66/SHUTDOWN_L AT15 AGPIO66
AH9 USB_OC0_L/TRST_L/AGPIO16 AGPIO68/SGPIO_CLK AU12
<21> USB_OC0#
AG1 AT14 AGPIO69
2 AH2
AL9
USB_OC1_L/TDI/AGPIO17
USB_OC2_L/TCK/AGPIO18
USB_OC3_L/TDO/AGPIO24
AGPIO69/SGPIO_LOAD
AGPIO71/SGPIO_DATAOUT
AGPIO72/SGPIO_DATAIN
AR14
BC13
32.768KMHz CRYSTAL 2
32K_X1
HDA_BITCLK AU6 AZ_BITCLK/I2S_BCLK_MIC SPKR/AGPIO91 BA17
APU_SPKR <23>

1
AR8 AZ_SDIN0/I2S_DATA_MIC[0]
<23> HDA_SDIN0 HDA_SDIN1 AP6 AZ_SDIN1/I2S_LR_PLAYBACK BLINK/USB_OC7_L/AGPIO11 AN5 AGPIO11 SJ100001K00 Y3
HDA_SDIN2 AR5 AZ_SDIN2/I2S_DATA_MIC[1] 32.768KHZ_12.5PF_CM31532768DZFT
HDA_RST# AU9 AZ_RST_L/I2S_LR_MIC GENINT1_L/AGPIO89 BB14 HVB

2
HDA_SYNC AT9 AZ_SYNC/I2S_BCLK_PLAYBACK GENINT2_L/AGPIO90 BA19 2 1 32K_X2
HDA_SDOUT TP_I2C_INT#_APU <22>
AR7 AZ_SDOUT/I2S_DATA_PLAYBACK R914
FANIN0/AGPIO84 BC18 20M_0402_5%
APU_I2C0_SCL BB10 BB19
I2C0_SCL/EGPIO145 FANOUT0/AGPIO85 1 1
APU_I2C0_SDA BB9 I2C0_SDA/EGPIO146
BB7 I2C1_SCL/EGPIO147 UART0_CTS_L/EGPIO135 AY9 C686 C682
<17> APU_I2C1_SCL
BC7 I2C1_SDA/EGPIO148 UART0_RXD/EGPIO136 AW8 18P_0402_50V8J 22P_0402_50V8J
<17> APU_I2C1_SDA 2 2
UART0_RTS_L/EGPIO137 AV5
RTC_CLK AG7 RTCCLK UART0_TXD/EGPIO138 AV8
UART0_INTR/AGPIO139 AW9
32K_X1 AT1 X32K_X1 UART1_CTS_L/BT_I2S_BCLK/EGPIO140AV11
UART1_RXD/BT_I2S_SDI/EGPIO141AU7
UART1_RTS_L/EGPIO142 AT11
+3VALW UART1_TXD/BT_I2S_SDO/EGPIO143AR11
32K_X2 AT2 X32K_X2 UART1_INTR/BT_I2S_LRCLK/AGPIO144AP9
R930 1 @ 2 10K_0402_5% APU_PCIE_W AKE#
R905 1 @ 2 100K_0402_5% USB_OC0# FP4 REV 0.93

R3900 1 @ 2 10K_0402_5% EC_SMI# FP4_BGA968


R3927 1 2 10K_0402_5% EC_SCI#
APU_I2C3_SCL
MEM_VOLT_SEL/AGPIO3 RTC_CLK BLINK/AGPIO11 SYS_RST#
R685 1 T2@ 2 10K_0402_5% LPC_CLK0_EC LPC_CLK1 LPC_FRAME#
R686 1 T2@ 2 10K_0402_5% APU_I2C3_SDA <INT PU> <INT PU> <INT PU> <INT PU>
3 3
R3948 1 T13@ 2 10K_0402_5% TS_I2C_INT#_APU EMC@ LDT_RST#/PG
R2616 1 @ 2 2.2K_0402_5% APU_TEST0 RP13 BOOT FAIL CLKGEN SPI ROM
CZL CZ COIN BATT NORMAL
OUTPUT TO
R2618 1
R2617 1
@
@
2
2
1K_0402_5%
2.2K_0402_5%
APU_TEST1
APU_TEST2 <23> HDA_RST#_AUDIO
<23> HDA_SYNC_AUDIO
1
2
3
8
7
6
HDA_RST#
HDA_SYNC
HDA_BITCLK
H TIMER
ENABLED
ENABLE
(DEFAULT)
(DEFAULT) 1.8V SPI ROM ENHANCED
RESET
ON BOARD
(DEFAULT)
APU
(DEFAULT)
RESET MODE
(DEFAULT)
+3VS <23> HDA_BITCLK_AUDIO
4 5 HDA_SDOUT (DEFAULT)
<23> HDA_SDOUT_AUDIO
BOOT FAIL
R676 1 2 2.2K_0402_5% APU_SCLK0 33_0804_8P4R_5% CLKGEN TRADITION COIN BATT OUTPUT SHORT RST
TIMER
R677 1
R3863 1
R3864 1
@
@
2
2
2
2.2K_0402_5%
10K_0402_5%
10K_0402_5%
APU_SDATA0
LAN_CLKREQ#
W LAN_CLKREQ#
L DISABLED
(DEFAULT)
DISABLED LPC ROM 3.3V SPI ROM
(Default)
RESET NOT ON
BOARD
TO PADS MODE

R3901 1 @ 2 10K_0402_5% EC_SMI#

+1.8VS +1.8VALW +1.8VS +3VS +3VS +3VALW

1
R3946 1 T13@ 2 10K_0402_5% APU_I2C1_SCL @ T13@
1

R3947 1 T13@ 2 10K_0402_5% APU_I2C1_SDA T2@ T13@ R902 R904 R925 R928 R949 R951 R954
4.7K_0402_5%
R347

4.7K_0402_5%
R348

10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%


R346

2
R3945 1 @ 2 10K_0402_5% HDA_SDIN0 22K_0402_1%
HDA_SDIN1 <9,14> LPC_FRAME#
R3929 1 T13@ 2 10K_0402_5%
<9,14> LPC_CLK0_EC
2

R3928 1 T13@ 2 10K_0402_5% HDA_SDIN2 EC_RSMRST#


HDA_BITCLK <9,22> LPC_CLK1
R3954 1 @ 2 10K_0402_5% AGPIO3
R2607 1 T13@ 2 10K_0402_5% ODD_PW R SYS_PW RGD_EC RTC_CLK
R3850 1 T13@ 2 10K_0402_5% EGPIO132 SYS_RST#
2 2
R3879 1 @ 2 0_0402_5% HVB AGPIO11
R40 1 2 15K_0402_5% APU_TEST0 C999 C1000
1

1
R41 1 2 15K_0402_5% APU_TEST1 1U_0402_6.3V6K 0.22U_0402_10V6K
R42 1 2 15K_0402_5% APU_TEST2 1 1 @ @ T2@ @ @ @
4 4
R935 1 T2@ 2 10K_0402_5% AGPIO66 R903 R926 R927 R929 R2619 R2620 R2621
R3944 1 T2@ 2 10K_0402_5% EGPIO93 2K_0402_5% 2K_0402_5% 2K_0402_5% 2K_0402_5% 2K_0402_5% 2K_0402_5% 2K_0402_5%
R934 1 T2@ 2 10K_0402_5% AGPIO64
2

2
R936 1 T13@ 2 10K_0402_5% AGPIO69
R3949 1 T13@ 2 10K_0402_5% APU_I2C0_SCL
R3950 1 T13@ 2 10K_0402_5% APU_I2C0_SDA
R3961 1 T3@ 2 10K_0402_5% VDDGFX_PW RGD Security Classification Compal Secret Data Compal Electronics, Inc.
R3971 1 T2@ 2 10K_0402_5% AGPIO4 2016/03/14 2018/03/14 Title
Issued Date Deciphered Date
R3972 2 1 10K_0402_5% AGPIO5
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP4 GPIO/AZ/MISC/STRAPS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 8 of 35
A B C D E
A B C D E

UAPU1E @
CLK/SATA/USB/SPI/LPC
AU3 SATA_TX0P USBCLK/25M_48M_OSC AP8
<20> SATA_ATX_DRX_P0
AU4 SATA_TX0N
<20> SATA_ATX_DRX_N0 AP5 USB_ZVSS
USB_ZVSS R641 1 2 11.8K_0402_1%
HDD AV1 SATA_RX0N
<20> SATA_ARX_DTX_N0 AV2 AR2
SATA_RX0P USB_HSD0P
<20> SATA_ARX_DTX_P0 AR1 USB20_P0 <21>
USB_HSD0N
USB20_N0 <21> M/B USB2.0 port 0
AY2 SATA_TX1P
<20> SATA_ATX_DRX_P1 AY1 AR3
SATA_TX1N USB_HSD1P
1 <20> SATA_ATX_DRX_N1 USB20_P1 <21> 1
ODD USB_HSD1N AR4 S/B USB2.0 port 1
AW4 USB20_N1 <21>
SATA_RX1N
<20> SATA_ARX_DTX_N1 AW3 AN2
SATA_RX1P USB_HSD2P
<20> SATA_ARX_DTX_P1 USB20_P2 <17>
USB_HSD2N AN1 Touch Screen
2 1 1K_0402_1% SATA_ZVSS AW1 USB20_N2 <17>
R90 SATA_ZVSS
2 T13@ 1 DEVSLP0 +0.95VS R96 2 1 1K_0402_1% SATA_ZVDD AW2 SATA_ZVDDP USB_HSD3P AN3
AT17 AN4 USB20_P3 <21>
R3852 10K_0402_5% DEVSLP0 DEVSLP[0]/EGPIO67 USB_HSD3N S/B Card Reader
2 T13@ 1 <20> DEVSLP0 AT12 USB20_N3 <21>
EGPIO70 EGPIO70 DEVSLP[1]/EGPIO70
R3853 10K_0402_5% AGPIO130 BB15 SATA_ACT_L/AGPIO130 USB_HSD4P AM1
2 1 AM2 USB20_P4 <17>
AGPIO130 USB_HSD4N Camera
USB20_N4 <17>
R3882 10K_0402_5% AU2 SATA_X1
USB_HSD5P AL2
AL1 USB20_P5 <19>
USB_HSD5N
USB20_N5 <19> WLAN/BT combo
AU1 SATA_X2 USB_HSD6P AL3
+3VS USB20_P6 <21>
USB_HSD6N AL4 M/B USB3.0 port2 (2.0)
USB20_N6 <21>
2 @ 1 CLKRUN# U4 GFX_CLKP USB_HSD7P AK2
R3872 10K_0402_5% U3 GFX_CLKN USB_HSD7N AJ2

+3VALW U1

2 1 LPCPD#
LAN
<18> CLK_PCIE_LAN
<18> CLK_PCIE_LAN#
U2
GPP_CLK0P
GPP_CLK0N 48MHz CRYSTAL
R3873 10K_0402_5% W4 GPP_CLK1P
48M_X2
2
+1.8VS <19> CLK_PCIE_WLAN W3
2
WLAN <19> CLK_PCIE_WLAN# GPP_CLK1N
1 R938 2 48M_X1
2 T13@ 1 APU_SPI_HOLD# W1 GPP_CLK2P 1M_0402_5%
R634 10K_0402_5% W2 GPP_CLK2N
2 T13@ 1 APU_SPI_WP#
R635 10K_0402_5% Y2 GPP_CLK3P
2 T13@ 1 APU_SPI_CS1# Y1 GPP_CLK3N 2 1
R636 10K_0402_5% 2 1
BC10 X25M_48M_OSC
+3VALW R107 T2EMC@ USB_SS_ZVSS AD2 USBSS_ZVSS R644 1 2 1K_0402_1%
USB_SS_ZVDDP AD1 USBSS_ZVDD R645 1 2 1K_0402_1%
APU_SPI_HOLD# 48M_X1 +0.95VALW
2 T2@ 1 T2 X48M_X1 Y1
R3854 10K_0402_5% USB_SS_0TXP AA3 48MHZ_8PF_X3S048000D81H-W
2 T2@ 1 APU_SPI_WP# USB_SS_0TXN AA4 Part Number = SJ10000AF00
R3855 10K_0402_5%
2 T2@ 1 APU_SPI_CS1# Part Number = SD028220A80 48M_X2 T1 X48M_X2 USB_SS_0RXP W9
R3856 10K_0402_5% S RES 1/16W 22 +-5% 0402 USB_SS_0RXN W8 3 4
3 4

1
R107 1 T13EMC@
2 0_0402_5%AW14 LPCCLK0/EGPIO74 USB_SS_1TXP AA2
APU_SPI_CS2# <8,14> LPC_CLK0_EC
2 T13@ 1 R108 1 RS@ 2 0_0402_5% AY13 LPCCLK1/EGPIO75 USB_SS_1TXN AA1 C794 C795
<8,22> LPC_CLK1
R637 10K_0402_5% 5.6P_0402_50V8D 5.6P_0402_50V8D

2
2 T13@ 1 APU_SPI_TPMCS# BB11 LAD0 USB_SS_1RXP W5
<14> LPC_AD0 BA11 W6
R638 10K_0402_5% LAD1 USB_SS_1RXN
<14> LPC_AD1 AY11
3 <14> LPC_AD2 LAD2 3
BA13 LAD3 USB_SS_2TXP AC1
<14> LPC_AD3 AV14 AC2 USB3_ATX_DRX_P2 <21>
LFRAME_L USB_SS_2TXN
<8,14> LPC_FRAME# USB3_ATX_DRX_N2 <21>
BA1 ESPI_ALERT_L/LDRQ0_L M/B USB3.0 port2 (3.0)
BC14 SERIRQ/AGPIO87 USB_SS_2RXP Y6
<14> SERIRQ BC11 Y7 USB3_ARX_DTX_P2 <21>
LPC_CLKRUN_L/AGPIO88 USB_SS_2RXN
<22> CLKRUN# USB3_ARX_DTX_N2 <21>
AE9 LPC_PD_L/AGPIO21
<22> LPCPD# AC4
USB_SS_3TXP
USB_SS_3TXN AC3
APU_SPI_CLK 1 RS@ 2 APU_SPI_CLK_R BC6 SPI_CLK/ESPI_CLK/EGPIO117
R106 APU_SPI_CS1# BB8 SPI_CS1_L/EGPIO118 USB_SS_3RXP AB5
0_0402_5% APU_SPI_CS2# AW7 SPI_CS2_L/ESPI_CS_L/EGPIO119 USB_SS_3RXN AB6
APU_SPI_MISO BA9 SPI_DI/ESPI_DATA/EGPIO120
APU_SPI_MOSI AY7 SPI_DO/EGPIO121
APU_SPI_WP# AW11 SPI_WP_L/EGPIO122
APU_SPI_HOLD# BA7 SPI_HOLD_L/EGPIO133
APU_SPI_TPMCS# AW12 SPI_TPM_CS_L/AGPIO76
+1.8VS +3VALW
FP4 REV 0.93
U56 T2@
8MB SPI ROM R1673 1 T2@
R1672 1 T13@
2 0_0603_5%
2 0_0603_5%
FP4_BGA968

2 1
C635 @
4 U56 T13@ .1U_0402_16V7K SPI ROM 4
APU_SPI_CS1# 1 8 Part Number = SA000039A30
APU_SPI_MISO 2 CS# VCC 7 APU_SPI_HOLD# S IC FL 64M W25Q64FVSSIQ SOIC 8P SPI ROM
APU_SPI_WP# 3 DO(IO1) HOLD#(IO3) 6 APU_SPI_CLK
4 WP#(IO2)
GND
CLK
DI(IO0)
5 APU_SPI_MOSI Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title
W25Q64FWSSIQ_SOIC_8P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP4 SATA/CLK/USB/SPI
APU_SPI_CLK 1 2 1 2 Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
R617 @EMC@ C636 @EMC@ B 0.3
10_0402_1% 10P_0402_50V8J
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 9 of 35
A B C D E
A B C D E

+1.5V
C1008 UAPU1F @
C1057

C1058

C1059

C1060

C1061

C1062

C1063

C1064

C1065

C1066

C1087

C1088

C1089

C1090

C1091

C1092

C1093
POWER
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +1.5V P25 VDDIO_MEM_S3_1 VDDCR_CPU_1 U8 +APU_CORE
@ @ @ P28 W7
3A T24
VDDIO_MEM_S3_2
VDDIO_MEM_S3_3
VDDCR_CPU_2
VDDCR_CPU_3 W12 35A
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

0.22U_0402_10V6K

0.22U_0402_10V6K

0.22U_0402_10V6K

0.22U_0402_10V6K

0.22U_0402_10V6K

0.22U_0402_10V6K

180P_0402_50V8J
T27 VDDIO_MEM_S3_4 VDDCR_CPU_4 W15
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 U25 VDDIO_MEM_S3_5 VDDCR_CPU_5 W18
U28 VDDIO_MEM_S3_6 VDDCR_CPU_6 W21
V30 VDDIO_MEM_S3_7 VDDCR_CPU_7 Y8
V33 VDDIO_MEM_S3_8 VDDCR_CPU_8 Y10
W24 VDDIO_MEM_S3_9 VDDCR_CPU_9 Y13
1 W27 VDDIO_MEM_S3_10 VDDCR_CPU_10 Y16 1
Y25 VDDIO_MEM_S3_11 VDDCR_CPU_11 Y19
Y28 VDDIO_MEM_S3_12 VDDCR_CPU_12 Y22
Y30 AB7
Under APU AB24
VDDIO_MEM_S3_13
VDDIO_MEM_S3_14
VDDCR_CPU_13
VDDCR_CPU_14 AB9
AB27 VDDIO_MEM_S3_15 VDDCR_CPU_15 AB12
+1.5V AB30 VDDIO_MEM_S3_16 VDDCR_CPU_16 AB15
AB33 VDDIO_MEM_S3_17 VDDCR_CPU_17 AB18

C1111

C1112

C1113

C1114

C1115

C1116
AD25 VDDIO_MEM_S3_18 VDDCR_CPU_18 AB21
1 1 1 1 1 1 AD28 VDDIO_MEM_S3_19 VDDCR_CPU_19 AD6
AD30 VDDIO_MEM_S3_20 VDDCR_CPU_20 AD10
AE24 VDDIO_MEM_S3_21 VDDCR_CPU_21 AD13

0.22U_0402_10V6K

0.22U_0402_10V6K

0.22U_0402_10V6K

0.22U_0402_10V6K

180P_0402_50V8J

180P_0402_50V8J
AE27 VDDIO_MEM_S3_22 VDDCR_CPU_22 AD16
2 2 2 2 2 2 AF30 VDDIO_MEM_S3_23 VDDCR_CPU_23 AD19
AF33 VDDIO_MEM_S3_24 VDDCR_CPU_24 AD22
AG25 VDDIO_MEM_S3_25 VDDCR_CPU_25 AE7
AG28 VDDIO_MEM_S3_26 VDDCR_CPU_26 AE12
AH24 VDDIO_MEM_S3_27 VDDCR_CPU_42 AK9
AH27 VDDIO_MEM_S3_28 VDDCR_CPU_31 AG10
AH30 VDDIO_MEM_S3_29 VDDCR_CPU_43 AK10
AK25 AG13
DIMMS/GND AK28
VDDIO_MEM_S3_30
VDDIO_MEM_S3_31
VDDCR_CPU_32
VDDCR_CPU_44 AK13
AK30 VDDIO_MEM_S3_32 VDDCR_CPU_33 AG16
AK33 VDDIO_MEM_S3_33 VDDCR_CPU_45 AK16
AL27 VDDIO_MEM_S3_34 VDDCR_CPU_34 AG19
AM30 VDDIO_MEM_S3_35 VDDCR_CPU_46 AK19
VDDCR_CPU_35 AG22
+1.5VS AR19 VDDIO_AUDIO VDDCR_CPU_47 AK22
1 RS@ 2 AH7
+3VALW +3VS +3VS_APU 0.2A AE6 VDDP_GFX_2
VDDCR_CPU_36
VDDCR_CPU_28 AE18
+0.95VS_GFX
C1124

C1126

C1137

R119 AE5 AE21


2 1 1 0_0402_5% 1
1.5A VDDP_GFX_1 VDDCR_CPU_29
VDDCR_CPU_40 AH21 2

+3VS_APU AP19 VDD_33_1 VDDCR_CPU_30 AG6


AP21 AH12
0.2A VDD_33_2 VDDCR_CPU_37
10U_0603_6.3V6M

0.22U_0402_10V6K

10U_0603_6.3V6M

VDDCR_CPU_49 AN6
2 2 2 AP16 VDD_18_1 VDDCR_CPU_38 AH15
+1.8VS
AP18 AH18
1.5A VDD_18_2 VDDCR_CPU_39
VDDCR_CPU_48 AL7
+1.8VALW
AP10 VDD_18_S5_1 VDDCR_CPU_41 AK6
AR9 AE15
0.5A VDD_18_S5_2 VDDCR_CPU_27

+3VALW AP15 VDD_33_S5_1


AR15 L8
0.2A VDD_33_S5_2 VDDCR_GFX_14
L13
+APU_GFX
AN12 VDDP_S5_1
VDDCR_GFX_15
VDDCR_GFX_16 L16 35A
+0.95VALW
AP12 L19
T13@ T13@ T13@
0.8A VDDP_S5_2 VDDCR_GFX_17
VDDCR_GFX_18 L22
+APU_CORE_FCH +1.8VALW +1.8VS +1.5VS
+APU_CORE_FCH AP13 VDDCR_FCH_S5_1 VDDCR_GFX_19 N7
C1108

C1109

C1110

C1085

C1086

C1101

C1102

AR12 N12
0.2A/0.9A VDDCR_FCH_S5_2 VDDCR_GFX_20
C1005

C1006

C1007

1 1 1 1 1 1 1 VDDCR_GFX_21 N15
1 1 1 +0.95VS AW19 VDDP_6 VDDCR_GFX_22 N18
AU17 N21
7A VDDP_1 VDDCR_GFX_23
10U_0603_6.3V6M

10U_0603_6.3V6M

0.22U_0402_10V6K

10U_0603_6.3V6M

0.22U_0402_10V6K

10U_0603_6.3V6M

0.22U_0402_10V6K

AU19 VDDP_2 VDDCR_GFX_24 P8


2 2 2 2 2 2 2
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

AV17 VDDP_3 VDDCR_GFX_25 P13


2 2 2 AV19 VDDP_4 VDDCR_GFX_26 P16
AW17 VDDP_5 VDDCR_GFX_27 P19
VDDCR_GFX_28 P22
+APU_CORE_NB AL12 VDDCR_NB_1 VDDCR_GFX_29 T7
AL13 F12
17A AL15
VDDCR_NB_2
VDDCR_NB_3
VDDCR_GFX_1
VDDCR_GFX_2 F15
AL18 VDDCR_NB_4 VDDCR_GFX_3 G11
AL21 VDDCR_NB_5 VDDCR_GFX_4 G14
3 AN13 J8 3
VDDCR_NB_6 VDDCR_GFX_5
AN16 VDDCR_NB_7 VDDCR_GFX_6 J9
+0.95VALW +0.95VS AN19 VDDCR_NB_8 VDDCR_GFX_7 J11
AN22 VDDCR_NB_9 VDDCR_GFX_8 K7
C1118

C1119

C949

C950

C1080

C1083

C1099

C2690

C2691

C2692

C2693

C2694

C245

VDDCR_GFX_9 K12
1 1 1 1 1 1 1 1 1 1 1 1 1 VDDCR_GFX_10 K13
+RTC_APU_R AR17 VDDBT_RTC_G VDDCR_GFX_11 K15
+RTC_APU_R
VDDCR_GFX_12 K16
10U_0603_6.3V6M

0.22U_0402_10V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

0.22U_0402_10V6K

0.22U_0402_10V6K

0.22U_0402_10V6K

0.22U_0402_10V6K

0.22U_0402_10V6K

0.22U_0402_10V6K

180P_0402_50V8J

VDDCR_GFX_30 T12
2 2 2 2 2 2 2 2 2 2 2 2 2 VDDCR_GFX_31 T15
VDDCR_GFX_32 T18
VDDCR_GFX_33 T21
VDDCR_GFX_34 U13
VDDCR_GFX_35 U16
VDDCR_GFX_36 U19
VDDCR_GFX_37 U22
VDDCR_GFX_13 K19
For VDDP_S5 For VDDP FP4 REV 0.93

FP4_BGA968

+0.95VS 1 T1@ 2 +0.95VS_GFX


R3880 +RTC_APU
C2699

C2700

0_0603_5%
2

1 1 W=20mils
@ @ R3881 +RTC_APU_R R93 1 2 1K_0402_5%
0_0402_5%
RTC OF APU
10U_0603_6.3V6M

0.22U_0402_10V6K

T2@ 1 1
2 2
1

1
C166 C923
4 4
0.22U_0402_10V6K 1U_0402_6.3V6K CLRP1 JP@
2 2 2 SHORT PADS
Need OPEN
for Clear CMOS

For VDDP_GFX
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title
FP4 PWR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 10 of 35
A B C D E
A B C D E

UAPU1G @ UAPU1H @ UAPU1J @


GND GND
A8 VSS_1 VSS_63 L28 AE10 VSS_125 VSS_187 AV30 U30 RSVD_2
1 RS@ 2 ORIENT_APU# A12 VSS_2 VSS_64 M4 AE13 VSS_126 VSS_188 AV33 U31 RSVD_3
A16 VSS_3 VSS_65 M30 AE16 VSS_127 VSS_189 AW22 AN30 RSVD_4
R157 A20 VSS_4 VSS_66 N10 AE19 VSS_128 VSS_190 AY4
0_0402_5% A24 VSS_5 VSS_67 N13 AE22 VSS_129 VSS_191 AY6
A28 VSS_6 VSS_68 N16 AF1 VSS_130 VSS_192 AY8
1 A32 VSS_7 VSS_69 N19 AF4 VSS_131 VSS_193 AY10 1
B2 VSS_8 VSS_70 N22 AG9 VSS_132 VSS_194 AY12
B8 VSS_9 VSS_71 N27 AG12 VSS_133 VSS_195 AY14
B12 VSS_10 VSS_72 P1 AG15 VSS_134 VSS_196 AY16
B33 VSS_11 VSS_73 P2 AG18 VSS_135 VSS_197 AY20 FP4 REV 0.93
C3 VSS_12 VSS_74 P4 AG21 VSS_136 VSS_198 AY22
D4 VSS_13 VSS_75 P5 AH4 VSS_137 VSS_199 AY24 FP4_BGA968
D6 VSS_14 VSS_76 P12 AH10 VSS_138 VSS_200 AY26
D8 VSS_15 VSS_77 P15 AH13 VSS_139 VSS_201 AY28
D10 VSS_16 VSS_78 P18 AH16 VSS_140 VSS_202 AY30
D12 VSS_17 VSS_79 P21 AH19 VSS_141 VSS_203 BB1
D14 VSS_18 VSS_80 P30 AH22 VSS_142 VSS_204 BB33
D16 VSS_19 VSS_81 P33 AK1 VSS_143 VSS_205 BC4
D18 VSS_20 VSS_82 T4 AK4 VSS_144 VSS_206 BC8
D20 VSS_21 VSS_83 T10 AK12 VSS_145 VSS_207 BC12
D22 VSS_22 VSS_84 T13 AK15 VSS_146 VSS_208 BC16
D24 VSS_23 VSS_85 T16 AK18 VSS_147 VSS_209 BC20
D26 VSS_24 VSS_86 T19 AL16 VSS_148 VSS_210 BC24
D28 VSS_25 VSS_87 T22 AL19 VSS_149 VSS_211 BC28
D30 VSS_26 VSS_88 T30 AL22 VSS_150 VSS_212 BC32
F1 VSS_27 VSS_89 U5 AM4 VSS_151
F2 VSS_28 VSS_90 U12 AN9 VSS_152
2 F4 VSS_29 VSS_91 U15 AN10 VSS_153
2
F9 VSS_30 VSS_92 U18 AN15 VSS_154
F19 VSS_31 VSS_93 U21 AN18 VSS_155
F22 VSS_32 VSS_94 U24 AN21 VSS_156
F25 VSS_33 VSS_95 V1 AN25 VSS_157
F30 VSS_34 VSS_96 V2 AN28 VSS_158
F33 VSS_35 VSS_97 V4 AP1 VSS_159
G7 VSS_36 VSS_98 W10 AP2 VSS_160
G17 VSS_37 VSS_99 W13 AP4 VSS_161
G20 VSS_38 VSS_100 W16 AP7 VSS_162
G23 VSS_39 VSS_101 W19 AP22 VSS_163
G26 VSS_40 VSS_102 W22 AP27 VSS_164
H4 VSS_41 VSS_103 Y4 AP30 VSS_165
H30 VSS_42 VSS_104 Y5 AP33 VSS_166
J5 VSS_43 VSS_105 Y12 AR6 VSS_167
J15 VSS_44 VSS_106 Y15 AR25 VSS_168
J19 VSS_45 VSS_107 Y18 AR28 VSS_169
J22 VSS_46 VSS_108 Y21 AT4 VSS_170
J25 VSS_47 VSS_109 Y24 AT19 VSS_171
J28 VSS_48 VSS_110 AB1 AT22 VSS_172
K1 VSS_49 VSS_111 AB2 AT30 VSS_173
K2 VSS_50 VSS_112 AB4 AU5 VSS_174
3 K4 VSS_51 VSS_113 AB10 AU8 VSS_175
3
K10 VSS_52 VSS_114 AB13 AU11 VSS_176
K22 VSS_53 VSS_115 AB16 AU14 VSS_177
K27 VSS_54 VSS_116 AB19 AU20 VSS_178
K30 VSS_55 VSS_117 AB22 AU23 VSS_179
K33 VSS_56 VSS_118 AD4 AU27 VSS_180
L5 VSS_57 VSS_119 AD9 AV4 VSS_181
L12 VSS_58 VSS_120 AD12 AV7 VSS_182
L15 VSS_59 VSS_121 AD15 AV9 VSS_183
L18 VSS_60 VSS_122 AD18 AV12 VSS_184 VSS_213 L24
L21 VSS_61 VSS_123 AD21 AV15 VSS_185 VSS_215 AL10
L25 VSS_62 VSS_124 AD24 AV25 VSS_186 VSS_214 AK21

FP4 REV 0.93 FP4 REV 0.93

FP4_BGA968 FP4_BGA968

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title
FP4 GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 11 of 35
A B C D E
A B C D E

+VREF_DQ +1.5V +1.5V

15mil JDIMM1
1 2
3 VREF_DQ VSS1 4 DDRB_SDQ4 DDRB_SDQ[0..63]
DDRB_SDQ0 5 VSS2 DQ4 6 DDRB_SDQ5 DDRB_SDQ[0..63] <6,13>

1000P_0402_50V7K
.1U_0402_16V7K
DDRB_SDQ1 7 DQ0 DQ5 8 DDRB_SDM[0..7]
2 1 DQ1 VSS3 DDRB_SDQS0# DDRB_SDM[0..7] <6,13>

C2713

C2717
9 10
DDRB_SDM0 VSS4 DQS#0 DDRB_SDQS0 DDRB_SDQS0# <6,13> DDRB_SMA[0..15]
11 12 DDRB_SMA[0..15] <6,13>
DM0 DQS0 DDRB_SDQS0 <6,13>
13 14
1 2 DDRB_SDQ2 15 VSS5 VSS6 16 DDRB_SDQ6
DDRB_SDQ3 17 DQ2 DQ6 18 DDRB_SDQ7
19 DQ3 DQ7 20
DDRB_SDQ8 21 VSS7 VSS8 22 DDRB_SDQ12
DDRB_SDQ9 23 DQ8 DQ12 24 DDRB_SDQ13
1 DQ9 DQ13 1
25 26
DDRB_SDQS1# 27 VSS9 VSS10 28 DDRB_SDM1
<6,13> DDRB_SDQS1# DDRB_SDQS1 DQS#1 DM1 DDRB_RST#
29 30
<6,13> DDRB_SDQS1 DQS1 RESET# DDRB_RST# <6,13>
31 32
DDRB_SDQ10
DDRB_SDQ11
33 VSS11
DQ10
VSS12
DQ14
34 DDRB_SDQ14
DDRB_SDQ15
+1.5V/+0.75VS OF DIMM1
35 36
37 DQ11 DQ15 38
DDRB_SDQ16 39 VSS13 VSS14 40 DDRB_SDQ20 +1.5V +0.75VS
DDRB_SDQ17 41 DQ16 DQ20 42 DDRB_SDQ21
43 DQ17 DQ21 44
DDRB_SDQS2# 45 VSS15 VSS16 46 DDRB_SDM2
<6,13> DDRB_SDQS2# DDRB_SDQS2 DQS#2 DM2

C2718

C2704

C2708

C2703

C2709

C2710

C2711

C2714

C2719

C2707

C2705

C2706
47 48
<6,13> DDRB_SDQS2 DQS2 VSS17 DDRB_SDQ22
49 50 1 1 1 1 1 1 1 1 1 1 1 1
DDRB_SDQ18 51 VSS18 DQ22 52 DDRB_SDQ23
DDRB_SDQ19 53 DQ18 DQ23 54
DQ19 VSS19 DDRB_SDQ28

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

4.7U_0603_10V6K
55 56
DDRB_SDQ24 57 VSS20 DQ28 58 DDRB_SDQ29 2 2 2 2 2 2 2 2 2 2 2 2
DDRB_SDQ25 59 DQ24 DQ29 60
61 DQ25 VSS21 62 DDRB_SDQS3#
DDRB_SDM3 VSS22 DQS#3 DDRB_SDQS3 DDRB_SDQS3# <6,13>
63 64
DM3 DQS3 DDRB_SDQS3 <6,13>
65 66
DDRB_SDQ26 67 VSS23 VSS24 68 DDRB_SDQ30
DDRB_SDQ27 69 DQ26 DQ30 70 DDRB_SDQ31
71 DQ27 DQ31 72 @ @ @ @
VSS25 VSS26

DDRB_CKE0 73 74 DDRB_CKE1
<6,13> DDRB_CKE0 CKE0 CKE1 DDRB_CKE1 <6,13> DDRB_RST#
75 76 1 2
77 VDD1 VDD2 78 DDRB_SMA15 C2702 @EMC@
DDRB_SBS2# 79 NC1 A15 80 DDRB_SMA14 100P_0402_50V8J
<6,13> DDRB_SBS2# BA2 A14
81 82
DDRB_SMA12 83 VDD3 VDD4 84 DDRB_SMA11
2 DDRB_SMA9 85 A12/BC# A11 86 DDRB_SMA7 2
87 A9 A7 88
DDRB_SMA8 89 VDD5 VDD6 90 DDRB_SMA6
DDRB_SMA5 91 A8 A6 92 DDRB_SMA4
93 A5 A4 94
DDRB_SMA3
DDRB_SMA1
95
97
VDD7
A3
VDD8
A2
96
98
DDRB_SMA2
DDRB_SMA0
VREFCA for DIMM1,2
99 A1 A0 100
DDRB_CLK0 101 VDD9 VDD10 102 DDRB_CLK1
<6> DDRB_CLK0 DDRB_CLK0# CK0 CK1 DDRB_CLK1# DDRB_CLK1 <6> +VREF_CA +1.5V +VREF_DQ +1.5V
103 104
<6> DDRB_CLK0# CK0# CK1# DDRB_CLK1# <6>
105 106
DDRB_SMA10 107 VDD11 VDD12 108 DDRB_SBS1# 1 2 1 2
DDRB_SBS0# A10/AP BA1 DDRB_SRAS# DDRB_SBS1# <6,13>
109 110 R2608 R2610
<6,13> DDRB_SBS0# BA0 RAS# DDRB_SRAS# <6,13>
111 112 1K_0402_1% 1K_0402_1%
DDRB_SWE# 113 VDD13 VDD14 114 DDRB_SCS0# 1 2 1 2
<6,13> DDRB_SWE# DDRB_SCAS# WE# S0# DDRB_ODT0 DDRB_SCS0# <6>
115 116 R2609 R2611
<6,13> DDRB_SCAS# CAS# ODT0 DDRB_ODT0 <6>
117 118 1K_0402_1% 1K_0402_1%
DDRB_SMA13 119 VDD15 VDD16 120 DDRB_ODT1
DDRB_SCS1# A13 ODT1 DDRB_ODT1 <6>
121 122 15mil
<6> DDRB_SCS1# 123 S1# NC2 124
125 VDD17 VDD18 126
NCTEST VREF_CA +VREF_CA
127 128
1000P_0402_50V7K

.1U_0402_16V7K
DDRB_SDQ32 129 VSS27 VSS28 130 DDRB_SDQ36
DDRB_SDQ33 DQ32 DQ36 DDRB_SDQ37
1 2
131 132

C2715

C2712
133 DQ33 DQ37 134
DDRB_SDQS4# 135 VSS29 VSS30 136 DDRB_SDM4
<6,13> DDRB_SDQS4# DDRB_SDQS4 DQS#4 DM4 2 1
137 138
<6,13> DDRB_SDQS4 DQS4 VSS31 DDRB_SDQ38
139 140
DDRB_SDQ34 141 VSS32 DQ38 142 DDRB_SDQ39
DDRB_SDQ35 143 DQ34 DQ39 144
145 DQ35 VSS33 146 DDRB_SDQ44
DDRB_SDQ40 147 VSS34 DQ44 148 DDRB_SDQ45
DDRB_SDQ41 149 DQ40 DQ45 150
3 151 DQ41 VSS35 152 DDRB_SDQS5# 3
DDRB_SDM5 VSS36 DQS#5 DDRB_SDQS5 DDRB_SDQS5# <6,13>
153 154
DM5 DQS5 DDRB_SDQS5 <6,13>
155 156
DDRB_SDQ42 157 VSS37 VSS38 158 DDRB_SDQ46
DDRB_SDQ43 159 DQ42 DQ46 160 DDRB_SDQ47
161 DQ43 DQ47 162
DDRB_SDQ48 163 VSS39 VSS40 164 DDRB_SDQ52
DDRB_SDQ49 165 DQ48 DQ52 166 DDRB_SDQ53
167 DQ49 DQ53 168
DDRB_SDQS6# 169 VSS41 VSS42 170 DDRB_SDM6
<6,13> DDRB_SDQS6# DDRB_SDQS6 DQS#6 DM6
171 172
<6,13> DDRB_SDQS6 DQS6 VSS43 DDRB_SDQ54
173 174
DDRB_SDQ50 175 VSS44 DQ54 176 DDRB_SDQ55
DDRB_SDQ51 177 DQ50 DQ55 178
179 DQ51 VSS45 180 DDRB_SDQ60
DDRB_SDQ56 181 VSS46 DQ60 182 DDRB_SDQ61
DDRB_SDQ57 183 DQ56 DQ61 184
185 DQ57 VSS47 186 DDRB_SDQS7#
DDRB_SDM7 VSS48 DQS#7 DDRB_SDQS7 DDRB_SDQS7# <6,13>
187 188
DM7 DQS7 DDRB_SDQS7 <6,13>
189 190
DDRB_SDQ58 191 VSS49 VSS50 192 DDRB_SDQ62
DDRB_SDQ59 193 DQ58 DQ62 194 DDRB_SDQ63
195 DQ59 DQ63 196
R3974 1 RS@ 2 0_0402_5% 197 VSS51 VSS52 198 DDRB_EVENT#
SA0 EVENT# DDRB_EVENT# <6,13>
199 200
+3VS VDDSPD SDA APU_SDATA0 <8,13>
1 201 202
SA1 SCL APU_SCLK0 <8,13>
203 204
C2716 <Address: 00> VTT1 VTT2 +0.75VS
.1U_0402_16V7K 205 206
2 G1 G2
FOX_AS0A621-H2R6-7H
CONN@

4 4

DIMM1 H:5.2mm RVS


Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR3 SODIMM-I Socket
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 12 of 35
A B C D E
A B C D E

+VREF_DQ +1.5V +1.5V

15mil JDIMM2
1 2
3 VREF_DQ VSS1 4 DDRB_SDQ4 DDRB_SDQ[0..63]
DDRB_SDQ0 5 VSS2 DQ4 6 DDRB_SDQ5 DDRB_SDQ[0..63] <6,12>

1000P_0402_50V7K
.1U_0402_16V7K 2 1
DDRB_SDQ1 7 DQ0 DQ5 8 DDRB_SDM[0..7]
DDRB_SDM[0..7] <6,12>
DQ1 VSS3 DDRB_SDQS0#

C177

C143
9 10
DDRB_SDM0 VSS4 DQS#0 DDRB_SDQS0 DDRB_SDQS0# <6,12> DDRB_SMA[0..15]
11 12 DDRB_SMA[0..15] <6,12>
DM0 DQS0 DDRB_SDQS0 <6,12>
13 14
1 2 DDRB_SDQ2 15 VSS5 VSS6 16 DDRB_SDQ6
DDRB_SDQ3 17 DQ2 DQ6 18 DDRB_SDQ7
19 DQ3 DQ7 20
DDRB_SDQ8 21 VSS7 VSS8 22 DDRB_SDQ12
1 DDRB_SDQ9 DQ8 DQ12 DDRB_SDQ13 1
23 24
25 DQ9 DQ13 26
DDRB_SDQS1# 27 VSS9 VSS10 28 DDRB_SDM1
<6,12> DDRB_SDQS1# DDRB_SDQS1 DQS#1 DM1 DDRB_RST#
29 30
<6,12> DDRB_SDQS1 DQS1 RESET# DDRB_RST# <6,12>
31 32
DDRB_SDQ10
DDRB_SDQ11
33 VSS11
DQ10
VSS12
DQ14
34 DDRB_SDQ14
DDRB_SDQ15
+1.5V/+0.75VS OF DIMM2
35 36
37 DQ11 DQ15 38
DDRB_SDQ16 39 VSS13 VSS14 40 DDRB_SDQ20 +1.5V +0.75VS
DDRB_SDQ17 41 DQ16 DQ20 42 DDRB_SDQ21
43 DQ17 DQ21 44
DDRB_SDQS2# 45 VSS15 VSS16 46 DDRB_SDM2
<6,12> DDRB_SDQS2# DDRB_SDQS2 DQS#2 DM2

C133

C155

C132

C162

C165

C168

C169

C170

C171

C172

330U_D2_2V_Y

C175

C158
47 48 1
<6,12> DDRB_SDQS2 DQS2 VSS17 DDRB_SDQ22
49 50 1 1 1 1 1 1 1 1 1 1 1 1
DDRB_SDQ18 VSS18 DQ22 DDRB_SDQ23

CD2798
51 52 +
DDRB_SDQ19 53 DQ18 DQ23 54
DQ19 VSS19 DDRB_SDQ28

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

4.7U_0603_10V6K
55 56 @
DDRB_SDQ24 57 VSS20 DQ28 58 DDRB_SDQ29 2 2 2 2 2 2 2 2 2 2 2 2 2
DDRB_SDQ25 59 DQ24 DQ29 60
61 DQ25 VSS21 62 DDRB_SDQS3#
DDRB_SDM3 VSS22 DQS#3 DDRB_SDQS3 DDRB_SDQS3# <6,12>
63 64
DM3 DQS3 DDRB_SDQS3 <6,12>
65 66
DDRB_SDQ26 67 VSS23 VSS24 68 DDRB_SDQ30
DDRB_SDQ27 69 DQ26 DQ30 70 DDRB_SDQ31
71 DQ27 DQ31 72 @ @ @ @
VSS25 VSS26

DDRB_CKE0 73 74 DDRB_CKE1
<6,12> DDRB_CKE0 CKE0 CKE1 DDRB_CKE1 <6,12> DDRB_RST#
75 76 1 2
77 VDD1 VDD2 78 DDRB_SMA15 C1275 @EMC@
DDRB_SBS2# 79 NC1 A15 80 DDRB_SMA14 100P_0402_50V8J
<6,12> DDRB_SBS2# BA2 A14
81 82
2 DDRB_SMA12 83 VDD3 VDD4 84 DDRB_SMA11 2
DDRB_SMA9 85 A12/BC# A11 86 DDRB_SMA7
87 A9 A7 88
DDRB_SMA8 89 VDD5 VDD6 90 DDRB_SMA6
DDRB_SMA5 91 A8 A6 92 DDRB_SMA4
93 A5 A4 94
DDRB_SMA3 95 VDD7 VDD8 96 DDRB_SMA2
DDRB_SMA1 97 A3 A2 98 DDRB_SMA0
99 A1 A0 100
DDRB_CLK2 101 VDD9 VDD10 102 DDRB_CLK3
<6> DDRB_CLK2 DDRB_CLK2# CK0 CK1 DDRB_CLK3# DDRB_CLK3 <6>
103 104
<6> DDRB_CLK2# CK0# CK1# DDRB_CLK3# <6>
105 106
DDRB_SMA10 107 VDD11 VDD12 108 DDRB_SBS1#
DDRB_SBS0# A10/AP BA1 DDRB_SRAS# DDRB_SBS1# <6,12>
109 110
<6,12> DDRB_SBS0# BA0 RAS# DDRB_SRAS# <6,12>
111 112
DDRB_SWE# 113 VDD13 VDD14 114 DDRB_SCS2#
<6,12> DDRB_SWE# DDRB_SCAS# WE# S0# DDRB_ODT2 DDRB_SCS2# <6>
115 116
<6,12> DDRB_SCAS# CAS# ODT0 DDRB_ODT2 <6>
117 118
DDRB_SMA13 119 VDD15 VDD16 120 DDRB_ODT3
DDRB_SCS3# A13 ODT1 DDRB_ODT3 <6>
121 122 15mil
<6> DDRB_SCS3# 123 S1# NC2 124
125 VDD17 VDD18 126
NCTEST VREF_CA +VREF_CA
127 128 1000P_0402_50V7K

.1U_0402_16V7K
DDRB_SDQ32 129 VSS27 VSS28 130 DDRB_SDQ36
DDRB_SDQ33 DQ32 DQ36 DDRB_SDQ37 1 2
C139

C174
131 132
133 DQ33 DQ37 134
DDRB_SDQS4# 135 VSS29 VSS30 136 DDRB_SDM4
<6,12> DDRB_SDQS4# DDRB_SDQS4 DQS#4 DM4 2 1
137 138
<6,12> DDRB_SDQS4 DQS4 VSS31 DDRB_SDQ38
139 140
DDRB_SDQ34 141 VSS32 DQ38 142 DDRB_SDQ39
DDRB_SDQ35 143 DQ34 DQ39 144
145 DQ35 VSS33 146 DDRB_SDQ44
DDRB_SDQ40 147 VSS34 DQ44 148 DDRB_SDQ45
3 DDRB_SDQ41 149 DQ40 DQ45 150 3
151 DQ41 VSS35 152 DDRB_SDQS5#
DDRB_SDM5 VSS36 DQS#5 DDRB_SDQS5 DDRB_SDQS5# <6,12>
153 154
DM5 DQS5 DDRB_SDQS5 <6,12>
155 156
DDRB_SDQ42 157 VSS37 VSS38 158 DDRB_SDQ46
DDRB_SDQ43 159 DQ42 DQ46 160 DDRB_SDQ47
161 DQ43 DQ47 162
DDRB_SDQ48 163 VSS39 VSS40 164 DDRB_SDQ52
DDRB_SDQ49 165 DQ48 DQ52 166 DDRB_SDQ53
167 DQ49 DQ53 168
DDRB_SDQS6# 169 VSS41 VSS42 170 DDRB_SDM6
<6,12> DDRB_SDQS6# DDRB_SDQS6 DQS#6 DM6
171 172
<6,12> DDRB_SDQS6 DQS6 VSS43 DDRB_SDQ54
173 174
DDRB_SDQ50 175 VSS44 DQ54 176 DDRB_SDQ55
DDRB_SDQ51 177 DQ50 DQ55 178
179 DQ51 VSS45 180 DDRB_SDQ60
DDRB_SDQ56 181 VSS46 DQ60 182 DDRB_SDQ61
DDRB_SDQ57 183 DQ56 DQ61 184
185 DQ57 VSS47 186 DDRB_SDQS7#
DDRB_SDM7 VSS48 DQS#7 DDRB_SDQS7 DDRB_SDQS7# <6,12>
187 188
DM7 DQS7 DDRB_SDQS7 <6,12>
189 190
DDRB_SDQ58 191 VSS49 VSS50 192 DDRB_SDQ62
DDRB_SDQ59 193 DQ58 DQ62 194 DDRB_SDQ63
195 DQ59 DQ63 196
1 2 DDRB_SA0 197 VSS51 VSS52 198 DDRB_EVENT#
SA0 EVENT# DDRB_EVENT# <6,12>
R690 10K_0402_5% 199 200
+3VS VDDSPD SDA APU_SDATA0 <8,12>
1 201 202
SA1 SCL APU_SCLK0 <8,12>
203 204
C140 <Address: 01> VTT1 VTT2 +0.75VS
.1U_0402_16V7K 205 206
2 G1 G2
FOX_AS0A621-H2S6-7H

4
CONN@
SP07000OF10 4

DIMM2 H:5.2mm STD


Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR3 SODIMM-II Socket
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 13 of 35
A B C D E
5 4 3 2 1

+EC_VCC

1
+3VLP +EC_VCC L44 +EC_VCCA
FBM-11-160808-601-T_0603 +RTC_APU_R
1 RS@ 2 1 2 R1562
Ra 100K_0402_5%

1
.1U_0402_16V7K
C1255

.1U_0402_16V7K
C1256

.1U_0402_16V7K
C1257

.1U_0402_16V7K
C1258

1000P_0402_50V7K
C1261

1000P_0402_50V7K
C1259
R1665 1

2
0_0603_5% 1 1 1 1 1 1 D Q91 @
C1262 AD_BID EC_RTCRST 2 2N7002K_SOT23-3
.1U_0402_16V7K G

1
@ @ 2 S
2 2 2 2 2 2 1
R1564 @
Rb

3
ECAGND 43K_0402_5% C1269 @ R1563 @

111
125
.1U_0402_16V7K 100K_0402_5%

22
33
96

67
9
U44 2

2
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC

EC_VDD/VCC

EC_VDD/AVCC
D D

GATEA20 1 21 LAN_PWR_EN R1564


<8> GATEA20 KBRST#_R GATEA20/GPIO00 GPIO0F EC_BEEP# LAN_PWR_EN <18>
1 RS@ 2 2 23
<8> KBRST# KBRST#/GPIO01 BEEP#/GPIO10 FAN_PWM EC_BEEP# <23>
SERIRQ 3 26
<9> SERIRQ LPC_FRAME# 4 SERIRQ GPIO12 27 EC_RTCRST FAN_PWM <24>
R3973
<8,9> LPC_FRAME# LPC_AD3 LPC_FRAME# ACOFF/GPIO13
0_0402_5% 5
<9> LPC_AD3 LPC_AD2 7 LPC_AD3
<9> LPC_AD2 LPC_AD1 LPC_AD2 PWM Output BATT_TEMP
8 63 15K_0402_5%
LPC_CLK0_EC <9> LPC_AD1 LPC_AD0 LPC_AD1 BATT_TEMP/AD0/GPIO38 VCIN1_BATT_DROP BATT_TEMP <27>
1 2 1 2 10 64 SD028150280
C1263 @EMC@ R1560 @EMC@
<9> LPC_AD0 LPC_AD0LPC & MISC AD1/GPIO39 65 ADP_I VCIN1_BATT_DROP <27>
LPC_CLK0_EC ADP_I/AD2/GPIO3A AD_BID ADP_I <27,28>
22P_0402_50V8J 10_0402_1% 12 AD Input 66
<8,9> LPC_CLK0_EC LPC_RST# 13 CLK_PCI_EC AD3/GPIO3B 75
1 9012@ 2 EC_RST# <8,22> LPC_RST# EC_RST# 37 PCIRST#/GPIO05 AD4/GPIO42 76
+EC_VCC <24> EC_RST# EC_SCI# EC_RST# IMON/AD5/GPIO43
R818 47K_0402_5% 20
1 2 <8> EC_SCI# 38 EC_SCII#/GPIO0E +3VS
C819 1000P_0402_50V7K <19> WLAN_ON GPIO1D
EMC@ 68 EC_MUTE# R1565 1 @ 2 10K_0402_5%
DAC_BRIG/GPIO3C 70 EC_I2C_ALERT# R116 1 @ 2 1K_0402_5%
LPC_RST# <22> KSI[0..7] DA Output EN_DFAN1/GPIO3D TP_SENOFF#
1 @ 2 KSI0 55 71
56 KSI0/GPIO30 IREF/GPIO3E 72 TP_SENOFF# <22>
R207 100K_0402_5% KSI1
1 2 @EMC@ KSI2 57 KSI1/GPIO31 CHGVADJ/GPIO3F +EC_VCC
C1279 100P_0402_50V8J KSI3 58 KSI2/GPIO32 83 EC_I2C_TPCLK R124 1 T2@ 2 0_0402_5%
KSI3/GPIO33 EC_MUTE#/GPIO4A EC_I2C_TPDAT I2C_CLK <22> EC_SMB_DA1
KSI4 59 84 R125 1 T2@ 2 0_0402_5% R1577 1 2 2.2K_0402_5%
KSI4/GPIO34 USB_EN#/GPIO4B EC_MUTE# I2C_DAT <22> EC_SMB_CK1
KSI5 60 85 R1574 1 2 2.2K_0402_5%
61 KSI5/GPIO35 CAP_INT#/GPIO4C 86 USB_EN EC_MUTE# <23> LID_SW#
KSI6 PS2 Interface R344 1 2 47K_0402_5%
KSI6/GPIO36 EAPD/GPIO4D TP_CLK USB_EN <21>
KSI7 62 87
<22> KSO[0..17] 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA TP_CLK <22>
KSO0 PS2
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <22>
KSO1 40
KSO2 41 KSO1/GPIO21
KSO3 42 KSO2/GPIO22 97
KSO4 43 KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 98
KSO5 44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 0.95VS_PWR_EN# BATT_TEMP 1 2
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 9022_PH1 0.95VS_PWR_EN# <15>
C1265 100P_0402_50V8J
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 9022_PH1 <27>
ACIN 1 2
KSO7/GPIO27 SPI Device Interface
KSO8 47 C1266 100P_0402_50V8J
KSO9 48 KSO8/GPIO28 119
C C
KSO10 49 KSO9/GPIO29 SPIDI/GPIO5B 120 BT_ON EC_RSMRST# R3907 1 @ 2 47K_0402_5%
KSO10/GPIO2A SPIDO/GPIO5C BT_ON <19>
KSO11 50 SPI Flash ROM SPICLK/GPIO58 126 SYSON R1675 1 2 100K_0402_5%
KSO12 51 KSO11/GPIO2B 128 3V_EN R940 1 2 1M_0402_5%
KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A I2C_TS_RST# R3921 1 @ 2 100K_0402_5%
KSO14 53 KSO13/GPIO2D
KSO15 54 KSO14/GPIO2E 73
KSO16 81 KSO15/GPIO2F ENBKL/AD6/GPIO40 74 VGATE
KSO16/GPIO48 PECI_KB930/AD7/GPIO41 BATT_4S VGATE <32>
KSO17 82 89
KSO17/GPIO49 FSTCHG/GPIO50 90 BATT_BLUE_LED# BATT_4S <28>
BATT_CHG_LED#/GPIO52 ODD_EN BATT_BLUE_LED# <22>
91 close to EC
EC_SMB_CK1 77 CAPS_LED#/GPIO53 92 PWR_LED ODD_EN <20>
<27,28> EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK1/GPIO44 GPIO PWR_LED#/GPIO54 BATT_AMB_LED# PWR_LED <22>
78 93
<27,28> EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_AMB_LED# <22> LPC_AD3_R LPC_AD3
79 SM Bus 95 SYSON R1684 1 TPM@ 2 0_0402_5%
<7> EC_SMB_CK2 EC_SMB_DA2 80 EC_SMB_CK2/GPIO46 SYSON/GPIO56 121 VR_ON SYSON <30> <22> LPC_AD3_R LPC_AD2_R 1 2 LPC_AD2
R1685 TPM@ 0_0402_5%
<7> EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 0.95_1.8VALW_PWREN VR_ON <32,33> <22> LPC_AD2_R LPC_FRAME#_R LPC_FRAME#
127 R1686 1 TPM@ 2 0_0402_5%
PM_SLP_S4#/GPIO59 0.95_1.8VALW_PWREN <31> <22> LPC_FRAME#_R LPC_AD1_R 1 2 LPC_AD1
R1687 TPM@ 0_0402_5%
<22> LPC_AD1_R LPC_AD0_R LPC_AD0
R1688 1 TPM@ 2 0_0402_5%
SLP_S3# EC_RSMRST# <22> LPC_AD0_R SERIRQ_R
6 100 R1689 1 TPM@ 2 0_0402_5% SERIRQ
<8> SLP_S3# EC_I2C_ALERT# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 EC_RSMRST# <8> <22> SERIRQ_R
1 RS@ 2 14 101
<22> TP_I2C_INT# EC_SMI# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 9022_VCIN
15 102 9022_VCIN <27>
<8> EC_SMI# TP_3V_EN 16 EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 103 EC_THERM
R1683
<22> TP_3V_EN WL_OFF# GPIO0A H_PROCHOT#_EC/GPXIOA06
0_0402_5% 17 104 MAINPWON
<19> WL_OFF# WLAN_WAKE# GPIO0B VCOUT0_PH/GPXIOA07 MAINPWON <24,27,29>
18 GPO 105 BKOFF#
<19> WLAN_WAKE# TS_EN 19 GPIO0C BKOFF#/GPXIOA08 106 LAN_GPO BKOFF# <17>
<17> TS_EN EC_SPOK GPIO0D GPIO PBTN_OUT#/GPXIOA09 3V_EN_R_EC LAN_GPO <18>
1 RS@ 2 25 107
<29> SPOK FAN_SPEED 28 EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 108 I2C_TS_RST#
R1682 <24> FAN_SPEED LAN_WAKE# 29 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 I2C_TS_RST# <17>
<18> LAN_WAKE# EC_TX EC_PME#/GPIO15
0_0402_5% 30
<19> EC_TX EC_RX 31 EC_TX/GPIO16 110
SYS_PWRGD_EC@1.8VALW ACIN
<19> EC_RX SYS_PWRGD_EC EC_RX/GPIO17 AC_IN/GPXIOD01 EC_ON ACIN <28>
EC can be OD pin 32 112 1 RS@ 2 APU_PROCHOT# <7,32,33>
<8> SYS_PWRGD_EC PWR_SUSP_LED# 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 EC_ON <29>
for reduce Level shifter <22> PWR_SUSP_LED# ON/OFFBTN#
SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 LID_SW# ON/OFFBTN# <22>
36 GPI 115 R1690
LID_SW# <22>

1
NUM_LED#/GPIO1A LID_SW#/GPXIOD04 116 SUSP# 0_0402_5%
SUSP#/GPXIOD05 117 SUSP# <15,28,30>
ENBKL D Q89 9012@
GPXIOD06 ENBKL <7> +EC_VCC EC_THERM
118 2 2N7002K_SOT23-3
PBTN_OUT# PECI_KB9012/GPXIOD07
AGND/AGND

122 G
<8> PBTN_OUT# 123 XCLKI/GPIO5D 124
GND/GND
GND/GND
GND/GND
GND/GND

<8> SLP_S5# S
B XCLKO/GPIO5E V18R B
1

3
GND0

C823 9012@
4.7U_0603_10V6K
KB9012QF-A4_LQFP128_14X14 2
11
24
35
94
113

69

Part Number = SA00004OB30


9012@ L43
U44 9022@ FBM-11-160808-601-T_0603
2 1

ECAGND
20mil MAINPWON 1 2 3V_EN
3V_EN <29>
EC D2012 @
Part Number = SA000075S30 RB751V-40_SOD323-2
S IC KB9022QD LQFP 128P EC CONTROLLER
3V_EN_R_EC R3926 1 2 1K_0402_5%

SPOK 1 2 EC_RSMRST#

D2013 @
RB751V-40_SOD323-2

1 2 SYS_PWRGD_EC

D2014 @
RB751V-40_SOD323-2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE-KB9012
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 14 of 35
5 4 3 2 1
A B C D E

Q135 T3@ Q2513 T3@


VIN 5V and 3.3V (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm +APU_CORE_NB AO3416L_SOT23-3 AO3416L_SOT23-3 +APU_CORE_FCH
+3VS

D
U2 J7 JP@ 1 3 3 1

S
1 14 +3VS_LS
+3VALW 1 1 1

22U_0603_6.3V6M

22U_0603_6.3V6M

4.7U_0603_10V6K

4.7U_0603_10V6K
1

1
1 2 2 VIN1 VOUT1 13 C2618

T3@ C2621

T3@ C2620
VIN1 VOUT1 2
C12 @ JUMP_43X118 @ 4.7U_0603_10V6K

T3@ C2668

T3@ C2667
G
G
2

2
1 RS@ 2 3VS_ON 1U_0402_6.3V6K 3 12 1 2 C13 T3@ CORE_NB_GATE

2
<14,28,30> SUSP# ON1 CT1 2 2 2
C10 .1U_0402_16V7K
R1667 4 11 560P_0402_50V7K 1
+5VALW VBIAS GND
0_0402_5% Q2515 T3@ Q2514 T3@
1 RS@ 2 5VS_ON 5 10 1 2 +0.775VALW AO3416L_SOT23-3 AO3416L_SOT23-3
ON2 CT2 C9 +5VS

D
R1668 6 9 330P_0402_50V7K J8 JP@ 1 3 3 1

S
+5VALW VIN2 VOUT2 +5VS_LS
0_0402_5% 1 1 1 2 7 8 1 1
1
@ @ C11 @ VIN2 VOUT2 C2619 C2622 T3@
1
2
C37 C38 1U_0402_6.3V6K 15 JUMP_43X118 @ 4.7U_0603_10V6K 4.7U_0603_10V6K

G
G
2

2
.1U_0402_16V7K .1U_0402_16V7K GPAD C14 T3@ 0.775VALW_GATE
2 2 TPS22966DPUR_SON14_2X3 .1U_0402_16V7K 2 2
1

+5VALW
<33> CORE_NB_GATE
+APU_CORE_NB +5VALW

8
U2608A T3@
VIN 1.8V and 1.5V (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm 3 LM393DR_SO8

P
+ 1 1 T3@ 2 CORE_NB_GATE 1 T3@ 2
+1.8VS +0.775MOS 2 O R3903 R3890
-

G
U3 J9 JP@ +5VALW 0_0402_5% 1K_0402_5%
1 14 +1.8VS_LS
+1.8VALW

4
1 2 2 VIN1 VOUT1 13 +5VALW
VIN1 VOUT1 2

8
C24 @ JUMP_43X79 @ U2608B T3@
SUSP# 1 RS@ 2 1.8VS_ON 1U_0402_6.3V6K 3 12 1 2 C26 5 LM393DR_SO8

P
ON1 CT1 C21 .1U_0402_16V7K + 7 1 T3@ 2 0.775VALW_GATE 1 T3@ 2
R1669 4 11 330P_0402_50V7K 1 6 O R3902 R3891
+5VALW

G
0_0402_5% VBIAS GND - 0_0402_5% 1K_0402_5%

2
1 RS@ 2 1.5VS_ON 5 10 1 2

4
ON2 CT2 C15 +1.5VS
R1670 +1.5V 6 9 330P_0402_50V7K J10 JP@ R3936 @
0_0402_5% 1 1 2 7 VIN2 VOUT2 8 +1.5VS_LS 1 2 10K_0402_5%
1 VIN2 VOUT2 1 2
@ @ C22 @ 2

1
C42 C41 1U_0402_6.3V6K 15 JUMP_43X39 @
.1U_0402_16V7K .1U_0402_16V7K GPAD C25
2 2 TPS22966DPUR_SON14_2X3 .1U_0402_16V7K
1

+5VALW

2
+3VALW R2635 +0.775VALW
2 +0.95VALW U4 +0.95VS 100K_0402_5% T3@ 2
AO4304L_SO8

6
8 1

1
7 2 2
D
1 R2634 G T3@
4.7U_0603_10V6K
C939

1U_0402_6.3V6K
C940 6 3 C46 +0.95VS 100K_0402_5% T13@ Q2516B
1 1 S

4.7U_0603_10V6K 5 DMN66D0LDW-7_SOT363-6

1
3
+0.775MOS

1
2 S5_MUX_CTRL 5 G
D

<8,33> S5_MUX_CTRL
4

2
2 @2 Q2516A S T3@
R1671 @ DMN66D0LDW-7_SOT363-6 R2636

4
470_0603_5% T3@ 100K_0402_5%
+5VALW

1 2

1
1 2 0.95VS_GATE
R1674 1
4.7K_0402_5% C16 D Q83 @
1

.1U_0402_16V7K 0.95VS_PWR_EN# 2 2N7002K_SOT23-3


D G
2 2 S
<14> 0.95VS_PWR_EN#
G
3

S Q84
2N7002K_SOT23-3
3

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P22-DC INTERFACE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 15 of 35
A B C D E
5 4 3 2 1

RP15 +5VS_DISP
C506 1 2 .1U_0402_16V7K HDMI_TX2- 1 8 HDMI_GND U73 ZZZ
<7> APU_DP0_N0
C505 1 2 .1U_0402_16V7K HDMI_TX2+ 2 7
W=40mils
<7> APU_DP0_P0 HDMI_TX1+ +5VS
C507 1 2 .1U_0402_16V7K 3 6 3
<7> APU_DP0_P1 OUT

1
C508 1 2 .1U_0402_16V7K HDMI_TX1- 4 5
<7> APU_DP0_N1 D 1 1
IN
499_0804_8P4R_1% +3VS 2
G 2 C543 HDMI_ROYALTY
RP16 S Q2511
GND .1U_0402_16V7K ROYALTY HDMI W/LOGO+HDCP
C509 1 2 .1U_0402_16V7K HDMI_TX0+ 1 8 2N7002K_SOT23-3 2
D <7> APU_DP0_P2 RO0000003HM D

3
C510 1 2 .1U_0402_16V7K HDMI_TX0- 2 7 AP2330W-7_SC59-3 45@
<7> APU_DP0_N2 HDMI_CLK+
C511 1 2 .1U_0402_16V7K 3 6
<7> APU_DP0_P3 HDMI_CLK-
C512 1 2 .1U_0402_16V7K 4 5
<7> APU_DP0_N3
499_0804_8P4R_1%

+3VS

1
C
2 1 2HDMI_HPD_CONN
B R281 150K_0402_5%
E Q18

1
HDMI_HPD MMBT3904_NL_SOT23-3
<7> HDMI_HPD
R283

1
C @ 365K_0402_1% C

R915

2
100K_0402_5%

2
HDMI_CLK- R756 1 EMC@ 2 10_0402_1% HDMI_R_CLK-
HDMI_CLK+ R765 1 EMC@ 2 10_0402_1% HDMI_R_CLK+
HDMI_TX0- R769 1 EMC@ 2 0_0402_5% HDMI_R_TX0- +3VS
HDMI_TX0+ R779 1 EMC@ 2 0_0402_5% HDMI_R_TX0+ RP1
HDMI_TX1- R781 1 EMC@ 2 10_0402_1% HDMI_R_TX1- HDMI_SCLK 1 8 +5VS_DISP
HDMI_TX1+ R782 1 EMC@ 2 10_0402_1% HDMI_R_TX1+ HDMI_SDATA 2 7
HDMI_TX2- R783 1 EMC@ 2 10_0402_1% HDMI_R_TX2- HDMI_SCLK_R 3 6
HDMI_TX2+ R794 1 EMC@ 2 10_0402_1% HDMI_R_TX2+ HDMI_SDATA_R 4 5
JHDMI1
4.7K_0804_8P4R_5% HDMI_HPD_CONN 19
18 HP_DET
B +5VS_DISP +5V B
17
+3VS HDMI_SDATA_R 16 DDC/CEC_GND
HDMI_SCLK_R 15 SDA
14 SCL
Utility

3
13
2 HDMI_R_CLK- 12 CEC
G
11 CK-
1 6 HDMI_SCLK_R HDMI_R_CLK+ 10 CK_shield
<7> HDMI_SCLK HDMI_R_TX0- CK+
S

D42 @EMC@ 9
Q75A Q75B YSLC05CH_SOT23-3 8 D0-
D0_shield
5

DMN66D0LDW-7_SOT363-6 SCA00000U10 HDMI_R_TX0+ 7


DMN66D0LDW-7_SOT363-6 HDMI_R_TX1- 6 D0+
G

4 3 HDMI_SDATA_R 5 D1-
<7> HDMI_SDATA

1
HDMI_R_TX1+ D1_shield
S

4 20
HDMI_R_TX2- 3 D1+ GND 21
2 D2- GND 22
HDMI_R_TX2+ 1 D2_shield GND 23
D2+ GND
YUQIU_H050FD019M190BA
CONN@
A DC232004800 A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI CONN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 16 of 35
5 4 3 2 1
5 4 3 2 1

+3VS
LCD POWER CIRCUIT +LCDVDD
Place closed to JEDP1 +5VS +3VS +TS_PWR LED PANEL Conn.
U8 +3VS +LCDVDD R3859 1 @ 2 0_0603_5% JEDP1
1U_0402_6.3V6K W=60mils W=60mils
C2656
5 1 +INVPWR_B+ 1
IN OUT R3858 1 2 0_0603_5% 2 1 41
1 2 G1
2 1 1 3 42
GND 4 3 G2 43
D
4 3 C368
1 1 W=60mils 5 4 G3 44 D
2 EN OC .1U_0402_16V7K C375 C419 EDP_HPD R364 1 2 100K_0402_5% INVTPWM 6 5 G4 45
<7> INVTPWM 6 G5
SY6288C20AAC_SOT23-5 C367 2 2
@ .1U_0402_16V7K .1U_0402_16V7K BKOFF# 7 46
2 2 <14> BKOFF# EDP_HPD 7 G6
4.7U_0603_10V6K @ INVTPWM R393 1 @ 2 100K_0402_5% 8
<7> EDP_HPD 8
+LCDVDD 9
<7> ENVDD 9
@EMC@ 10
C549 1 2 220P_0402_50V7K 11 10
@EMC@ 12 11
BKOFF# C528 1 2 220P_0402_50V7K EDP_AUXN_C 13 12
EDP_AUXP_C 14 13
R280 1 @ 2 10K_0402_5% 15 14
EDP_TXP0_C 16 15
EDP_TXN0_C 17 16
18 17
+19VB +INVPWR_B+ EDP_TXP1_C 19 18
L11 EDP_TXN1_C 20 19
21 20
W=60mils HCB2012KF-221T30_0805
1 2
W=60mils EDP_TXP2_C 22 21
EMC@ @EMC@ EDP_TXN2_C 23 22
C364 23
C SM01000EJ00 3000ma @EMC@ 1 1 1000P_0402_50V7K EDP_TXP3_C
24
24
C
220ohm@100mhz C365 25
68P_0402_50V8J EDP_TXN3_C 26 25
DCR 0.04 26
+TS_PWR 27
2 2 28 27
29 28
<14> TS_EN 29
Touch Screen 30
<9> USB20_P2 30
31
<9> USB20_N2 I2C_TS_SCL 31
32
I2C_TS_SDA 33 32
34 33
EDP_TXP0_C <14> I2C_TS_RST# I2C_TS_INT# 34
C371 1 2 .1U_0402_16V7K 35
<7> EDP_TXP0 EDP_TXN0_C 35
C372 1 2 .1U_0402_16V7K 36
<7> EDP_TXN0 EDP_TXP1_C +3VS 36
C373 1 2 .1U_0402_16V7K +3VS 37
<7> EDP_TXP1 EDP_TXN1_C USB20_P4_CAMERA 37
C374 1 2 .1U_0402_16V7K For Camera 38
<7> EDP_TXN1 EDP_TXP2_C I2C_TS_SCL USB20_N4_CAMERA 38
C2695 1 2 .1U_0402_16V7K 1 8 39
<7> EDP_TXP2 EDP_TXN2_C I2C_TS_SDA 39
C2696 1 2 .1U_0402_16V7K 2 7 40
<7> EDP_TXN2 EDP_TXP3_C I2C_TS_INT# 40
C2698 1 2 .1U_0402_16V7K 3 6
<7> EDP_TXP3 EDP_TXN3_C
C2697 1 2 .1U_0402_16V7K 4 5 STARC_107K40-000001-G2
<7> EDP_TXN3
CONN@
B B
RP63 @
2.2K_0804_8P4R_5% SP01000XE00
+1.8VS

C370 1 2 .1U_0402_16V7K EDP_AUXP_C


<7> EDP_AUXP
C369 1 2 .1U_0402_16V7K EDP_AUXN_C +3VS
<7> EDP_AUXN

5
PU at APU side.

2
G
I2C_TS_SCL

G
3 4 PU at APU side.
USB20_N4_CAMERA APU_I2C1_SCL <8>

S
R3963 1 RS@ 2 0_0402_5% Q2520A @
<9> USB20_N4
<9> USB20_P4 R3964 1 RS@ 2 0_0402_5% USB20_P4_CAMERA 2 G DMN63D8LDW_SOT363-6
To APU
I2C_TS_INT# 3 1
TS_I2C_INT#_APU <8>
To APU

D
I2C_TS_SDA 6 1
APU_I2C1_SDA <8>
D

Q2520B @ Q2522 @
DMN63D8LDW_SOT363-6 2N7002K_SOT23-3

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
eDP/Camera/Touch Screen
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 17 of 35
5 4 3 2 1
5 4 3 2 1

+3VALW +3V_LAN ( Should be place within 200 mils ) Close to Pin 3,8,22,30
Close to Pin 24 1uF reserved for Pin 22
RL1
Close to Pin23 Close to Pin 11,32
0_0805_5% 8111H@
1 2 RL13 1 2 0_0805_5% +3V_LAN +3V_LAN
W=60mils close to pin 22 W=60mils +LAN_VDD W=60mils
60mil 60mil LL1
UL1 @ +REGOUT 1 2

4.7U_0603_6.3V6K
CL2

0.1U_0402_16V7K
CL3

CL11
4.7U_0603_6.3V6K

CL12
4.7U_0603_6.3V6K

CL13
0.1U_0402_16V7K

0.1U_0402_16V7K
CL14
5 1 2.2UH +-5% NLC252018T-2R2J-N
IN OUT

4.7U_0603_6.3V6K
CL4

0.1U_0402_16V7K
CL5

CL22

0.1U_0402_16V7K
CL6

1U_0402_6.3V6K

CL7

0.1U_0402_16V7K

CL8

0.1U_0402_16V7K

CL9

0.1U_0402_16V7K

CL10

0.1U_0402_16V7K
IDC=1200mA 2 1

1
0.1U_0402_16V7K
2 8111GUS@ 1 1 1 1 1 1

2
GND

CL21 8111H@

8111GUS@

8111GUS@
1

8111GUS@

8111GUS@
4 3 @ @

2
EN OC @ 1 2
2

1
D 2 2 2 2 2 2 D
SY6288C20AAC_SOT23-5
CL1 2
1U_0402_6.3V6K LAN_PWR_EN
1 LAN_PWR_EN <14>

+3V_LAN Rising t i me r equest: 0. 5~100 mS

SA000028Y10 UL2 8111GUS@


High act i ve.
EN threshold voltage :1.2~2.0V
Current limit threshold :1.5~2.8A
Output turn-on rising t i me: 1. 3~2. 7 ms
close to Pin 17, 18
LAN_MIDI0+ 1 17 PCIE_ARX_C_DTX_P0 .1U_0402_16V7K 2 1 CL15
LAN_MIDI0- MDIP0 HSOP PCIE_ARX_C_DTX_N0 PCIE_ARX_DTX_P0 <5>
2 18 .1U_0402_16V7K 2 1 CL16
+LAN_VDD MDIN0 HSON APU_PCIE_RST# PCIE_ARX_DTX_N0 <5>
3 19
LAN_MIDI1+ 4 AVDD10 PERSTB 20 ISOLATEB APU_PCIE_RST# <8,19>
+3V_LAN LAN_MIDI1- 5 MDIP1 ISOLATEB 21 LAN_PME# RL2 1 RS@ 2 0_0402_5%
LAN_MIDI2+ 6 MDIN1 LANWAKEB 22 +LAN_VDD RL14 1 @ 2 0_0402_5% LAN_WAKE# <14>
LAN_MIDI2- 7 MDIP2 DVDD10 23 +3V_LAN APU_PCIE_WAKE# <8>
+LAN_VDD 8 MDIN2 VDDREG 24 +REGOUT
1

LAN_MIDI3+ 9 AVDD10 REGOUT 25 TP@


LAN_MIDI3- MDIP3 LED2 T4948
RL12 10 26 GPO
10K_0402_5%
PU to +3VS at PCH side +3V_LAN 11 MDIN3 LED1/GPIO 27
C AVDD33 LED0 T4949 TP@ C
12 28 XTLO
<8> LAN_CLKREQ# CLKREQB CKXTAL1
<5> PCIE_ATX_C_DRX_P0 13 29 XTLI
2

LAN_PME# 14 HSIP CKXTAL2 30 +LAN_VDD RL3 +3V_LAN


<5> PCIE_ATX_C_DRX_N0 HSIN AVDD10 LAN_RST
15 31 1 2
<9> CLK_PCIE_LAN REFCLK_P RSET +3V_LAN
16 32 2.49K_0402_1%
<9> CLK_PCIE_LAN#

1
REFCLK_N AVDD33 33
GND RL4
10K_0402_5%
@

2
GPO RL5 1 RS@ 2 0_0402_5%
UL2 LAN_GPO <14>
RTL8111GS-CG_QFN32_4X4
SJ10000E800
SA00006ML00 YL1
Use 8111GS symbol , pop 8111GUS part 25MHZ_10PF_7V25000014

S IC RTL8111H-CG QFN 32P E-LAN CTRL XTLI 1 3 XTLO


8111H@ 1 3
SA000080P00 GND GND
1 1
CL17 2 4 CL18
10P_0402_50V8J 10P_0402_50V8J
LAN Connector 2 2

JRJ45
RJ45_MIDI0+ 1
PR1+
RJ45_MIDI0- 2
PR1-
RJ45_MIDI1+
Consider VCC33 may be connected to Main
3 Power or chipset/bios's GPO, the pull-low
B PR2+ B
RJ45_MIDI2+ 4
resistor R14 can be NC only when Main Power
PR3+ or chipset/bios's GPO can ensure to drive the
RJ45_MIDI2- 5 ISOLATEB pin to a voltage level < 0.8V at the
PR3- system state S3~S5.
RJ45_MIDI1- 6
TL1 PR2-
RJ45_MIDI3+ 7 9
LAN_TERMAL 1 24 PR4+ GND 10 +3VS
LAN_MIDI0+ 2 TCT1 MCT1 23 RJ45_MIDI0+ RJ45_MIDI3- 8 GND
LAN_MIDI0- 3 TD1+ MX1+ 22 RJ45_MIDI0- PR4-
TD1- MX1- SANTA_130452-W

2
4 21 CONN@
LAN_MIDI1+ 5 TCT2 MCT2 20 RJ45_MIDI1+ RL6
LAN_MIDI1- 6 TD2+ MX2+ 19 RJ45_MIDI1- DC23400AX00 40mil 1K_0402_5%
TD2- MX2-
7 18 RJ45_GND 1 2 LANGND

1
LAN_MIDI2+ 8 TCT3 MCT3 17 RJ45_MIDI2+ CL19
LAN_MIDI2- 9 TD3+ MX3+ 16 RJ45_MIDI2- 10P_0402_50V8J ISOLATEB
TD3- MX3- 40mil

1
10 15 LANGND

1
LAN_MIDI3+ 11 TCT4 MCT4 14 RJ45_MIDI3+ JP@ RL7
LAN_MIDI3- 12 TD4+ MX4+ 13 RJ45_MIDI3- JUMP_43X118 15K_0402_5%
TD4- MX4- JPL1 JPL2
@EMC@

2
DL1 B88069X9231T203_4P5X3P2-2
GST5009-E MESC5V02BD03_SOT23-3

2
EMC@
1
SP050006B10
4
3
2
1

Place close to TCT pin H : 4mm

1
CL20 75_0804_8P4R_1%
0.1U_0402_16V7K RPL8
2
A A
5
6
7
8

RJ45_GND

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN_RTL8111GUS-CG
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 18 of 35
5 4 3 2 1
A B C D E

Wireless LAN
+3VS 60mil +3VS_WLAN
KEY E +3VS_WLAN

JNGFF1
1 @ 2 1 2
R212 3 GND_1 3.3VAUX_2 4
1 1 1 1 <9> USB20_P5 USB_D+ 3.3VAUX_4 1
0_0805_5% C458 @ 5 6
<9> USB20_N5 USB_D- LED1#
C459 C460 7 8
4.7U_0603_10V6K 9 GND_7 PCM_CLK 10
.1U_0402_16V7K SDIO_CLK PCM_SYNC
2 2 2 11 12
.1U_0402_16V7K 13 SDIO_CMD PCM_OUT 14
15 SDIO_DAT0 PCM_IN 16
17 SDIO_DAT1 LED2# 18
19 SDIO_DAT2 GND_18 20
21 SDIO_DAT3 UART_W AKE 22
23 SDIO_W AKE UART_TX
+3VS_WLAN SDIO_RST
+3VALW 24
U2606 25 UART_RX 26
W=60mils GND_33 UART_RTS
1U_0402_6.3V6K
C2664

5 1 27 28
IN OUT <5> PCIE_ATX_C_DRX_P1 PET_RX_P0 UART_CTS E51TXD_P80DATA_R
1 29 30 R873 2 RS@ 1 0_0402_5%
<5> PCIE_ATX_C_DRX_N1 PET_RX_N0 CLink_RST E51RXD_P80CLK_R EC_TX <14>
2 31 32 R3955 2 RS@ 1 0_0402_5%
GND GND_39 CLink_DATA EC_RX <14>
@ 33 34
<5> PCIE_ARX_DTX_P1 PER_TX_P0 CLink_CLK
4 3 35 36 2 1
2 EN OC <5> PCIE_ARX_DTX_N1 PER_TX_N0 COEX3
37 38 R874 100K_0402_5%
SY6288C20AAC_SOT23-5 39 GND_45 COEX2 40
<9> CLK_PCIE_WLAN REFCLK_P0 COEX1
41 42 T4947 TP@
<9> CLK_PCIE_WLAN# REFCLK_N0 SUSCLK(32KHz) WL_RST#_R
43 44 R440 1 RS@ 2 0_0402_5%
GND_51 PERST0# BT_ON APU_PCIE_RST# <8,18>
45 46
<14> WLAN_ON <8> WLAN_CLKREQ# CLKREQ0# W _DISABLE2# WL_OFF# BT_ON <14>
47 48
<14> WLAN_WAKE# PEW AKE0# W _DISABLE1# WL_OFF# <14>
49 50
51 GND_57 I2C_DAT 52
R3807 53 RSVD/PCIE_RX_P1 I2C_CLK 54
2 1 10K_0402_5% 55 RSVD/PCIE_RX_N1 I2C_IRQ 56

2
NGFF WL+BT (KEY E) +3VS_WLAN
57
59
GND_63
RSVD/PCIE_TX_P1
RSVD_64
RSVD_66
58
60 2
61 RSVD/PCIE_TX_N1 RSVD_68 62
63 GND_69 RSVD_70 64
65 RSVD_71 3.3VAUX_72 66
67 RSVD_73 3.3VAUX_74
GND_75 68
69 GND1
GND2
BELLW_80152-3221
CONN@
SP070013E00

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
M.2 Key E (WLAN)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 19 of 35
A B C D E
A B C D E F G H

SATA HDD Conn. SATA ODD Conn.


JHDD1 JODD1

1 1
SATA_ATX_DRX_P0 C392 1 2 0.01U_0402_16V7K SATA_ATX_C_DRX_P0 2 GND C401 1 2 0.01U_0402_16V7K SATA_ATX_C_DRX_P1 2 GND
1 <9> SATA_ATX_DRX_P0 <9> SATA_ATX_DRX_P1 1
SATA_ATX_DRX_N0 C393 1 2 0.01U_0402_16V7K SATA_ATX_C_DRX_N0 3 A+ C2665 1 2 0.01U_0402_16V7K SATA_ATX_C_DRX_N1 3 A+
<9> SATA_ATX_DRX_N0 A- <9> SATA_ATX_DRX_N1 A-
4 4
SATA_ARX_DTX_N0 C391 1 2 0.01U_0402_16V7K SATA_ARX_C_DTX_N0 5 GND C403 1 2 0.01U_0402_16V7K SATA_ARX_C_DTX_N1 5 GND
<9> SATA_ARX_DTX_N0 SATA_ARX_DTX_P0 C394 1 2 0.01U_0402_16V7K SATA_ARX_C_DTX_P0 6 B- <9> SATA_ARX_DTX_N1 C2666 1 2 0.01U_0402_16V7K SATA_ARX_C_DTX_P1 6 B-
<9> SATA_ARX_DTX_P0 7 B+ <9> SATA_ARX_DTX_P1 7 B+
GND GND
+5VS R211 +5VS_ODD
8 0_0805_5%
80mils 8
+3VS V33 +5VS_ODD DP
9 1 2 9
R3942 1 2 0_0402_5% +3VS_HDD 10 V33 10 +5V
V33 ODD_DA#_D +5V

10U_0603_6.3V6M

.1U_0402_16V7K
R3918 1 @ 2 0_0402_5% 11 1 1 11
<9> DEVSLP0 GND MD

C404

C407
12 12 14
13 GND 13 GND GND 15
1 RS@ 2 +5VS_HDD 14 GND GND GND
+5VS V5 2 2
15
R555 16 V5 SANTA_201501-2
0_0805_5% 17 V5 CONN@
18 GND
19 Reserved 23 SP01001MV00
20 GND GND 24
+3VS +5VS_HDD 21 V12 GND 25
22 V12 GND 26
V12 GND
100mils
2 2
SANTA_194403-1
+5VS +5VS_ODD
10U_0603_6.3V6M
C420

1 1 CONN@
1

C2701 C397 U66 @


.1U_0402_16V7K .1U_0402_16V7K 5 1
2

2 @ 2 @ IN OUT
2
GND
R3957 1 @ 2 0_0402_5% 4 3 ODD_OC# @ T187
<14> ODD_EN EN OC
R3958 1 @ 2 0_0402_5%
<8> ODD_PWR
SY6288C20AAC_SOT23-5

+3VS +3VALW

ODD_DA#_D R3960 1 @ 2 10K_0402_5%


ODD_DA# R3962 1 @ 2 10K_0402_5%

+3VS

3 3

2
G
ODD_DA#_D 3 1
ODD_DA# <8>

D
Q2523 @
2N7002K_SOT23-3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD/ODD
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 20 of 35
A B C D E F G H
5 4 3 2 1

USB3.0 (Port 2) For ESD request C483 EMC@


.1U_0402_16V7K
+5VALW

U25
+USB3_VCCA

D15 EMC@ 1 2 5 1 W=60mils


USB3_ATX_L_DRX_P2 1 1 USB3_ATX_L_DRX_P2 IN OUT
10 9
2
C482 1 2 USB3_ATX_C_DRX_N2 R3968 1 RS@ 2 0_0402_5% USB3_ATX_L_DRX_N2 USB3_ATX_L_DRX_N2 2 2 USB3_ATX_L_DRX_N2 GND
<9> USB3_ATX_DRX_N2 9 8
.1U_0402_16V7K USB_EN 4 3 R454 1 @ 2 0_0402_5%
USB3_ARX_L_DTX_P2 USB3_ARX_L_DTX_P2 <14> USB_EN EN OC USB_OC0# <8>
4 4 7 7
C484 1 2 USB3_ATX_C_DRX_P2 R3967 1 RS@ 2 0_0402_5% USB3_ATX_L_DRX_P2 SY6288C20AAC_SOT23-5
<9> USB3_ATX_DRX_P2 USB3_ARX_L_DTX_N2 USB3_ARX_L_DTX_N2 1
.1U_0402_16V7K 5 5 6 6
C612
D 3 3 .1U_0402_16V7K D
USB3_ARX_DTX_N2 R3966 1 RS@ 2 0_0402_5% USB3_ARX_L_DTX_N2 2
<9> USB3_ARX_DTX_N2 @
8
USB3_ARX_DTX_P2 R3965 1 RS@ 2 0_0402_5% USB3_ARX_L_DTX_P2
<9> USB3_ARX_DTX_P2
L05ESDL5V0NA-4 SLP2510P8
+USB3_VCCA
Max H:4.5mm
SF000006R00
1 1

220U_6.3V_M
D2010 EMC@ + C487
6 3 U2DP6_L .1U_0402_16V7K
I/O4 I/O2 CS25 2
2 EMC@
+USB3_VCCA
USB20_P6 2 1 U2DP6_L 5 2
USB3.0 Conn.
<9> USB20_P6 VDD GND JUSB1
1
USB20_N6 3 4 U2DN6_L U2DN6_L 2 VBUS
<9> USB20_N6 4 1 U2DN6_L U2DP6_L 3 D-
MCM1012B900F06BP_4P I/O3 I/O1 4 D+
L2508 AZC099-04S.R7G_SOT23-6 USB3_ARX_L_DTX_N2 5 GND
EMC@ StdA-SSRX-
USB3_ARX_L_DTX_P2 6 10
7 StdA-SSRX+ GND 11
USB3_ATX_L_DRX_N2 8 GND-DRAIN GND 12
USB3_ATX_L_DRX_P2 9 StdA-SSTX- GND 13
StdA-SSTX+ GND
LOTES_AUSB0015-P001A
CONN@
C
DC23300AI00 C

USB2.0 (Port 0) +USB3_VCCA

W=100mils
1
D5 EMC@ CS27
USB20_P0 2 1 USB20_P0_L 6 3 USB20_P0_L
<9> USB20_P0 I/O4 I/O2 .1U_0402_16V7K
2
EMC@

<9> USB20_N0
USB20_N0 3 4 USB20_N0_L
+USB3_VCCA 5 2
USB2.0 Conn
MCM1012B900F06BP_4P VDD GND JUSB2
L29 EMC@ 1 5
USB20_N0_L 2 VBUS G1 6
4 1 USB20_N0_L USB20_P0_L 3 D- G2 7
I/O3 I/O1 4 D+ G3 8
AZC099-04S.R7G_SOT23-6 GND G4
ACON_UARC9-4K1986
CONN@
DC23300AH00
B B

USB/B (USB, AUDIO, CR) JUSB3


HPOUT_L_1 1
<23> HPOUT_L_1 HPOUT_R_1 1
<23> HPOUT_R_1 2
SLEEVE 3 2
<23> SLEEVE 3
<23> RING2 RING2 4
HP_PLUG# 5 4
<23> HP_PLUG# 5
6
GNDA 6
7
+3VS 7
8
9 8
10 9
11 10
<9> USB20_N3 12 11
<9> USB20_P3 12
13
USB20_P1_L 14 13
USB20_N1_L 15 14
16 15
USB_EN 17 16
R3916 1 RS@ 2 0_0402_5% USB20_P1_L 18 17
<9> USB20_P1 USB20_N1_L +5VALW 18
R3917 1 RS@ 2 0_0402_5% 19
<9> USB20_N1 19
20
21 20
22 G1
A G2 A

ACES_85201-2005N
CONN@

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB2.0/USB3.0
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 21 of 35
5 4 3 2 1
ON/OFF BTN KB Conn. 30
JKB1
TP/B Conn.
R534 29 GND2
100K_0402_5% 28 GND1
2 1 ON/OFFBTN# 27 28
+3VLP 27 +TP_VCC +TP_VCC +3VS
KSO0 26 +TP_VCC +3VALW
KSO1 25 26 RP20
ON/OFFBTN# KSO2 24 25 1 @ 2 U13 I2C_CLK 1 8
<14> ON/OFFBTN# 24 +3VALW I2C_DAT

4.7U_0603_10V6K
KSO3 23 R462 0_0402_5% 1 5 2 7
KSO4 22 23 1 @ 2 OUT IN TP_I2C_INT#_APU 3 6
22 +3VS 1

C2563

1U_0402_6.3V6K
KSO5 21 R463 0_0402_5% 2 4 5
21 GND

C2562
SW3 KSO6 20 2
EVQPLDA15_4P KSO7 19 20 C663 @ 3 4 2.2K_0804_8P4R_5%
Test Only 1 3 KSO8 18 19 JTP1 .1U_0402_16V7K 2 OC EN
KSO9 17 18 1 1 2 SY6288C20AAC_SOT23-5 +TP_VCC
BOT 2 4 KSO10 16 17 1 2 TP_CLK 1
KSO11 15 16 2 3 TP_DATA TP_I2C_INT# 2 1
KSO12 14 15 3 4 R633
<14> TP_3V_EN
6
5

KSO13 13 14 4 5 I2C_DAT 10K_0402_5%


KSO14 12 13 5 6 I2C_CLK
KSO15 11 12 6 7 TP_I2C_INT#
KSO16 10 11 7 8 TP_SENOFF#
10 8 TP_SENOFF# <14>
KSI[0..7] KSO17 9 9
KSI[0..7] <14> 9 GND
KSI0 8 10
KSO[0..17] KSI1 7 8 GND
KSO[0..17] <14> 7
KSI2 6 ACES_51524-00801-001
KSI3 5 6 CONN@
KSI4 4 5
KSI5 3 4 SP01001A910
KSI6 2 3
2
TP_I2C_INT# <14> To EC
KSI7 1
1
ACES_85201-2805 TP_I2C_INT# 1 2
CONN@
TP_I2C_INT#_APU <8> To APU
D22
SP01000GO00 +TP_VCC RB751V-40_SOD323-2

1
R2507 R2509
I2C_DAT <14>
4.7K_0402_5% 4.7K_0402_5%
I2C_CLK <14>
To EC

2
+TP_VCC

TP_CLK
TP_CLK <14>

5
TP_DATA
TP_DATA <14>

G
I2C_CLK 4 3
APU_I2C3_SCL <8>

D
Q2509A @

2
DMN66D0LDW-7_SOT363-6
To APU

G
I2C_DAT 1 6
APU_I2C3_SDA <8>

D
Q2509B @
DMN66D0LDW-7_SOT363-6 PU at APU side.
R2622 1 T13@ 2 0_0402_5% Use 0ohm for CZ/BR/SR.
R2623 1 T13@ 2 0_0402_5% APU side PU for CZL only.

TPM
+3VALW RW1 +3VALW_TPM +3VS RW2 +3VS_TPM
0_0603_5%
1 RS@ 2
0_0603_5%
1 RS@ 2
Lid Switch
(Hall Effect Switch)
10U_0603_6.3V6M

.1U_0402_16V7K
CW2

10U_0603_6.3V6M

.1U_0402_16V7K
CW4

.1U_0402_16V7K
CW5

.1U_0402_16V7K
CW6

1 1 1 1 1 1
CW1

CW3

+3VLP

2 TPM@ 2 TPM@
near pin5 2 TPM@ 2 2
TPM@ 2
TPM@ TPM@

UG1
LID_SW# 3
<14> LID_SW# OUT 2
1 VDD
near pin10, 19, 24 GND
1
APX8132AI_TSOT-23-3
CG8
.1U_0402_16V7K
2
BADD SELECTION
* 1 AEh(write), AFh(read)
UW1 TPM@
1 +3VALW_TPM
29 VSB
XOR_OUT/SDA/GPIO0 Battery LED
10K_0402_5%1 @ 2 RW3 TPM_BADD
30
3
6
SCL/GPIO1
GPX/GPIO2
GPIO3/BADD
VDD1
VDD2
VDD3
8
14
22
+3VS_TPM
LED BATT_AMB_LED#
RG4
1.24K_0402_1%
1 2 3 A 4 1 2
<14> BATT_AMB_LED# +5VALW
24 2 RG24
<14> LPC_AD0_R LAD0/MISO NC1
21 7 0_0402_5%
<14> LPC_AD1_R LAD1/MOSI NC2 BATT_BLUE_LED#
18 10 <14> BATT_BLUE_LED# 1 2 1 B 2 1 @ 2 +3VLP
<14> LPC_AD2_R LAD2/SPI_IRQ# NC3
15 11 RG25
<14> LPC_AD3_R LAD3 NC4 25 RG6 0_0402_5%
19 NC5 26 RG22 1K_0402_1% LED1
<8,9> LPC_CLK1 LCLK/SCLK NC6
20 31 0_0402_5% LTST-C295TBKF-CA_AMBER-BLUE
<14> LPC_FRAME#_R LFRAME#/SCS# NC7 PWR_LED#
17 1 2
<8,14> LPC_RST# LRESET#/SPI_RST#/SRESET#
27 9
<14> SERIRQ_R Power LED

1
13 SERIRQ GND1 16 D QG17
<9> CLKRUN# CLKRUN#/GPIO4/SINT# GND2
<9> LPCPD# 1 2 28 23 <14> PWR_LED 2 L2N7002LT1G_SOT23-3
LPCPD# GND3 LED2
@ RW447 0_0402_5% 32 G @ RG8

1
4 GND4 33 S 1K_0402_1%

3
5 PP PGND 12 RG23 PWR_SUSP_LED# 1 2 3 A 4
TEST Reserved <14> PWR_SUSP_LED# +5VALW
100K_0402_5% @
NPCT650LA0YX_QFN32_5X5
CLKRUN PH 10K to +3VS at APU side avoid flash issue when PWR_LED# 1 2 1 B 2
2

abnormall shutdown
LPCPD# had internal PH SA00008EL40, S IC NPCT650AB1YX QFN 32P TPM RG7
1K_0402_1%
LTST-C295TBKF-CA_AMBER-BLUE
LPC_CLK1 RW4 1 2 33_0402_5% CW7 1 2 22P_0402_50V8J

@EMC@ @EMC@ Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB/TP/TPM Connector/LED
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 22 of 35
A B C D E

HD Audio Codec +PVDD_HDA

SM01000EJ00 3000ma 220ohm@100mhz DCR 0.04 +5VS +VDDA


40mil JPA1 Int. Speaker Conn.
LA1 2 1 40mil 1 2 40mil 40mil JSPK1
+VDDA SPK_R+
HCB2012KF-221T30_0805 1 1 1 SPKR+ EMC@1 LA2 2 PBY160808T-121Y-N_2P 1
1

1
SPK_R-

10U_0603_6.3V6M
CA1

.1U_0402_16V7K
CA2

.1U_0402_16V7K
CA3

.1U_0402_16V7K
CA4
JUMP_43X118 4.75V SPKR- EMC@1 LA3 2 PBY160808T-121Y-N_2P 2
JP@ SPKL+ EMC@1 LA4 2 PBY160808T-121Y-N_2P SPK_L+ 3 2
SPKL- EMC@1 LA5 2 PBY160808T-121Y-N_2P SPK_L- 4 3
(output = 300 mA)

2
2 2 @ +AVDD1_HDA 2 5 4
G1

3
@EMC@ 6
G2
GND
GND GND ACES_50278-00401-001
Place near Pin46 DA1 DA2 GND CONN@
Place near Pin41 GND & GNDA moat MESC5V02BD03_SOT23-3 MESC5V02BD03_SOT23-3
1 @EMC@ @EMC@ SP02000RR00 1

Place near Pin26


20mil
CA5 1 2 10U_0603_6.3V6M RA1 1 RS@ 2
GND +VDDA

1
10U_0603_6.3V6M
CA9
1

1
.1U_0402_16V7K
CA8
Pin9 need to matching with SOC HDA CA6 1 2 .1U_0402_16V7K 0_0603_5%
interface. GND GND
RA2 2 RS@ 1 0_0402_5% +1.5VS_DVDDIO
+1.5VS Place near Pin9

2
2 @ +MICBIAS2
+3VS_DVDD GND & GNDA moat Analog MIC(SMD)

2
RA5 2 RS@ 1 0_0402_5%
20mil RA7
+3VS GNDA
2.2K_0402_5%
1 1 +1.5VS_VDDA 15mil 15mil

.1U_0402_16V7K
CA11
CA10 RA6 2 RS@ 1 AMIC1
+1.5VS

1
INT_MIC_R RA8 1 RS@ 2 INT_MIC_R_1 1
1 +

1
.1U_0402_16V7K
CA12

CA13
10U_0603_6.3V6M
10U_0603_6.3V6M 0_0402_5%
2 2 0_0603_5% 2
1 -
CA14

2
2 @ @EMC@ GETTOP SOM4013SL-G423-RC-HS
UA1 GND GNDA 220P_0402_50V7K @
2
Place near Pin1 CY000002V00

41

46

26

40
1

9
UA1 Place near Pin40 Omnidirect i onal
Place near Codec

PVDD1

PVDD2

AVDD1

AVDD2
DVDD

DVDD-IO
GNDA Follow EA52_BM(LA-B511P) footprint
ALC233-VB2-CG_MQFN48_6X6
233@
SA00007BF10 LINE1-L 22
LINE1-R 21 LINE1-L(PORT-C-L) 43 SPKL-
INT_MIC_R 2 1 INT_MIC CA32 1 2 LINE2_L LINE1-R(PORT-C-R) SPK-OUT-L- 42 SPKL+
RA9 1K_0402_5% 4.7U_0603_6.3V6K 24 SPK-OUT-L+
CA33 1 2 LINE2_R 23 LINE2-L(PORT-E-L) 45 SPKR+
4.7U_0603_6.3V6K LINE2-R(PORT-E-R) SPK-OUT-R+ 44 SPKR-
RING2 17 SPK-OUT-R-
2 40mil SLEEVE 18 MIC2-L(PORT-F-L) /RING2 2
Combo MIC MIC2-R(PORT-F-R) /SLEEVE HP_LEFT
32
+MICBIAS 31 HPOUT-L(PORT-I-L) 33 HP_RIGHT
+MICBIAS LINE1-VREFO-L HPOUT-R(PORT-I-R)
+MICBIAS2 30
+MICBIAS2 LINE1-VREFO-R HDA_SYNC_AUDIO
10
SYNC HDA_BITCLK_AUDIO HDA_SYNC_AUDIO <8>
2 6
GPIO0/DMIC-DATA BCLK HDA_BITCLK_AUDIO <8>
3
GPIO1/DMIC-CLK 1 @EMC@2 1 2 CA15 @EMC@ GND
RA10 0_0402_5% 22P_0402_50V8J
EC_MUTE# 47 5 HDA_SDOUT_AUDIO
<14> EC_MUTE# HDA_RST#_AUDIO PDB SDATA-OUT HDA_SDIN0_AUDIO HDA_SDOUT_AUDIO <8>
11 8 1 RA33 2
<8> HDA_RST#_AUDIO RESETB SDATA-IN HDA_SDIN0 <8>
33_0402_5%
48
MONO_IN 12 SPDIF-OUT/GPIO2
10mil PCBEEP 16
HP_PLUG#
Close codec SENSE_A MONO-OUT
RA13 2 1 200K_0402_1% 13
<21> HP_PLUG# SENSE A +MIC2_VREFO
RA14 2 1 100K_0402_1% 14
+3VS SENSE B
1 29 10U_0603_6.3V6M2 1 CA18 GND
37 MIC2-VREFO
CA19 35 CBP 7 10U_0603_6.3V6M2 1 CA20
CBN LDO3-CAP GNDA
2.2U_0402_6.3V6M 39
2 LDO2-CAP 27 10U_0603_6.3V6M2 1 CA21
LDO1-CAP GNDA
36
+3VS_DVDD CPVDD 1 RA15 2 10mil
Pin20
ALC283 : NC VREF
28 CODEC_VREF 100K_0402_5% Headphone Out
RA16 1 RS@ 2 0_0402_5% 20 1 1
ALC255/256/233 : Power for combo jack depop +3VALW CPVREF

.1U_0402_16V7K
CA23

2.2U_0402_6.3V6M
CA24
circuit at system shutdown mode 15
10U_0603_6.3V6M2 1 CA22 19 JDREF 34 CPVEE
GNDA MIC-CAP CPVEE
Pin4 @ 2 2
ALC283 : DVSS
1
4
ALC255/256/233 : DC DET (For Japen customer only)
49 DVSS 25 CA26
Thermal PAD AVSS1 38 2.2U_0402_6.3V6M
AVSS2 2
Place near pin28
3 ALC255-CG_MQFN48_6X6 3
SA000082700 GND
255@ +MIC2_VREFO
GND GNDA
GNDA
Pin15
ALC283 : Ref. Resistor for Jack Detect
ALC255/256/233 : Jack Detect for SPDIF-OUT and SPK-OUT port

1
RA19 RA20
RA21 CA27 2.2K_0402_5% 2.2K_0402_5%
22K_0402_5% .1U_0402_16V7K
2 1 BEEP#_R 1 2 MONO_IN
<14> EC_BEEP#

2
HDA_BITCLK_AUDIO 1 T1@ 2
R3941 SLEEVE
SLEEVE <21>
2

RA22 1 1K_0402_5% RING2


HDA_RST#_AUDIO RING2 <21>
22K_0402_5% @EMC@ 1 T1@ 2
100P_0402_50V8J
CA28

4.7K_0402_5%
RA23

2 1 R3940
<8> APU_SPKR 1K_0402_5%
2 HDA_SYNC_AUDIO 1 T1@ 2
1

R3938
Confrim R value 1K_0402_5%
HDA_SDOUT_AUDIO 1 T1@ 2
R3939
1K_0402_5% HP_LEFT RA24 1 RS@ 2 0_0603_5% HPOUT_L_1
GND HPOUT_L_1 <21>
GND HP_RIGHT RA27 1 RS@ 2 0_0603_5% HPOUT_R_1 HPOUT_R_1 <21>

LINE1-L 1 2
CA29 4.7U_0603_6.3V6K
LINE1-R 1 2
JPA2 JPA5 CA30 4.7U_0603_6.3V6K
JUMP_43X39 JUMP_43X39 CA31 @ +MICBIAS DA5
1 2 1 2 .1U_0402_16V7K 2 2 RA29 1
JP@ 1 2 JP@ 1 2 1 2 4.7K_0402_5%
4 1 4
JPA4 JPA7
JUMP_43X39 JUMP_43X39 1 @ 2 3 2 RA32 1
1 2 1 2 RA25 4.7K_0402_5%
JP@ 1 2 JP@ 1 2 0_0402_5% BAT54A-7-F_SOT23-3

JPA6 GND GNDA


JUMP_43X39 GND GNDA
1 2
JP@ 1 2
JPA8
Security Classification Compal Secret Data Compal Electronics, Inc.
JUMP_43X39 Issued Date 2016/03/14 2018/03/14 Title
1 2 Deciphered Date
JP@ 1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HD Audio Codec ALC255/ALC233 Colay
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
GND GNDA Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 23 of 35
A B C D E
5 4 3 2 1

FAN Conn Screw Hole


H3 H4 H5 H6 H9 H10 H11
+5VS H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0
40mil
RF1 1 RS@ 2 0_0603_5% +VCC_FAN1
1 2

1
D D

@EMC@ CF2 CF1 FD1 FD2


1000P_0402_50V7K 4.7U_0603_6.3V6K
2 1 @ @ @ @ @ @ @
@ @

1
H13 H14 H15
H_3P6 H_3P6 H_3P6 FIDUCIAL_C40M80 FIDUCIAL_C40M80

FD3 FD4

1
@ @

1
+3VS
@ @ @ FIDUCIAL_C40M80 FIDUCIAL_C40M80
1

RF2
10K_0402_5%
40mil
JFAN1 H23 H25 H12
2

+VCC_FAN1 1 H_3P3X3P0N H_3P0N H_2P8X2P5N


FAN_SPEED 2 1
<14> FAN_SPEED FAN_PWM 3 2
<14> FAN_PWM 4 3
1 @ @ @

1
CF3 5 4
1000P_0402_50V7K 6 G1
@EMC@ G2
2 ACES_50278-00401-001
CONN@
SP02000RR00
C C

+3VLP
Reset Circuit
R3925 1 @ 2 0_0402_5%
MAINPWON <14,27,29>

2
R349 R3924 1 2 0_0402_5%
EC_RST# <14>
100K_0402_5%

6
BI_GATE# 2 G
D

BI_GATE PH to +RTCVCC at PWR side S Q2519B


DMN66D0LDW-7_SOT363-6

1
3
BI_GATE D 1
5 G

<27> BI_GATE S C347


Q2519A .1U_0402_16V7K

4
DMN66D0LDW-7_SOT363-6 2

B B

Reset But t on BI SW
Reset But t on 3 SW1 1

SW2

1 2 BI_GATE BI_S <27>


4 2

SKPMAME010_2P ATE-2-V-TR_4P

H : 3.8mm
Release : Bat t er y Off
Push : Bat t er y ON
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FAN/BATT RESET_DEGUB SW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 24 of 35
5 4 3 2 1
5 4 3 2 1

0.2
1. Change EC BID to 1 for DVT,R1564 change to 12Kohm.
2. Change R756,R765,R781,R782,R783,R794 to 10 ohm for HDMI EA result.
3. Combine power.
4. Change R555,RL2,RL5 to R-short;Unpop R682,R694,R704,R705,R706,R707,R708.
5. Change H13,H14,H15 to H_3P6.
6. Combine power.
7. Combine power.
D 8. Combine power. D

9. Change C2647,C2648 to 33P for ESD request.


10. Pop R1562 for EC BID to 1.
11. Change RG4 to 1.24kohm; RG6,RG7,RG8 to 1kohm.
0.3
1. Change R108,R3916,R3917,R3963,R3964,R3965,R3966,R3967,R3968,R873,R3955 to R-short.
2. Change EC BID to 2 for PVT,R1564 change to 15Kohm.
3. Combine power.

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW-PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 25 of 35
5 4 3 2 1
A B C D

1 +19V_ADPIN +19V_VIN 1

@ PJP101 EMI@ PL101


ACES_50305-00441-001_4P 5A_Z120_25M_0805_2P
+19V_ADPIN 1 2
1
2
3
4
GND

1
GND EMI@ PC101 EMI@ PC102
100P_0603_50V8 1000P_0603_50V7K

2
2 2

+RTC_APU +RTCVCC
Vo=1.5V
PD101
PU101 BAS40-04_SOT23-3
3
Vout 1 3
2 Vin
GND 1
1 1 +RTCBATT
PC103 PC104 2
0.1U_0603_25V7K AP2138N-1.5TRG1_SOT23-3 680P_0603_50V8J
2 2
+CHGRTC

3 3

@ PR101
0_0603_5%
1 2
+3VLP +CHGRTC

- PBJ101 @ + PR102
560_0603_5%
PR103
560_0603_5%
2 1 1 2 1 2
+RTCBATT

ML1220T13RE

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DCIN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 26 of 35
A B C D
A B C D

PR201 100_0402_1%
1 2
EC_SMB_DA1 <14,28>
PR202 100_0402_1%
1 2
EC_SMB_CK1 <14,28>
+3VLP
PR203
6.49K_0402_1%
@ 1 2
PJP201 +3VLP
1
1

1
2 1 2
1
2 3 EC_SMB_DA1-1 BATT_TEMP <14> @ PC202
1

1
4 EC_SMB_CK1-1 PR204 1K_0402_1% 0.1U_0603_25V7K

2
4 5 BATT_TS
5

1
6 BATT_B/I @ PR205 @ PR206
6 7 @ PR207 10K_0402_1% 10K_0402_1%
7 8
<45,47> 100K_0402_1%

2
8 9 +RTCVCC
GND 10 @ PU201

2
GND 1 8
VCC TMSNS1

1
CVILU_CI9908M2HR0-NH 2 7 2 1
PR208 GND RHYST1

1
100K_0402_5% MAINPWON 3 6 @ PR209
<14,24,29> MAINPWON OT1 TMSNS2

1
D
47K_0402_1%

2
2 PQ201 4 5 @ PH201
<24> BI_GATE G BSS138LT1G_SOT23-3 OT2 RHYST2 100K_0402_1%_NCP15WF104F03RC
S G718TM1U_SOT23-8

2
+17.4V_BATT+ EMI@ PL201
5A_Z120_25M_0805_2P BI_S <24>
1 2

1
1 2
+17.4V_BATT @ PR212
EMI@ PL202 0_0402_5%
5A_Z120_25M_0805_2P

2
1

1
EMI@ PC201 @EMI@ PC203
1000P_0603_50V7K 1000P_0603_50V7K
2

For KB9022 For KB9012


2

OTP Active Recovery sense 20mΩ Active Recovery 2

VCIN0_PH(V) 92C, 1V 56C, 2.V SR 45W 58.5W, 0.61V 58.5W, 0.61V

PH202(ohm) 7.3092K 26.11K BR 65W 84.5W, 0.61V 84.5W, 0.61V

PH202 under CPU botten side :


CPU thermal protection at 96 degree C ( shutdown )
Recovery at 56 degree C +EC_VCCA
2013/10/02
Add for ENE9022 Battery Voltage drop detection. ADP_I <14,28>
3
Connect to ENE9022 pin64 AD1. 3

1
PR210 65W@ PR211
19.1K_0402_1%
Reserve for 2-cell design 16.9K_0402_1%
45W@ PR211
10K_0402_1%

2
<14> 9022_PH1

+19VB_5V
9022_VCIN <14>

1
@9022@ PH202
1

PR213 100K_0402_1%_B25/50 4250K


80.6K_0402_1%
B value:4250K± 1%

2
@9022@ PR214
2

0_0402_5%
1 2 VCIN1_BATT_DROP <14> @
T1

1
@
T2 PR215
1

10K_0402_1%
2

1
@9022@ PC204 @9022@ PR216

0_0402_5%
PR217
0.1U_0402_25V6 10K_0402_1%

2
1

2
4 4

ECAGND

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BATTERY CONN / OTP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 27 of 35
A B C D
A B C D

Protection for reverse input


max Power loss 0.22W for 90W,
PQ301 Vgs = 20V (PR303 need change 10m ohm);

1
2N7002KW _SOT323-3 D
2
Vds = 60V 0.12W for 65W system
G Id = 250mA CSR rating: 1W +19VB
S
VACP-VACN spec < 80.64mV

3
PR302 PR303
1M_0402_5% 3M_0402_5% Rds(on) typ=15.8mohm max
1 2 1 2 Rds(on) typ=15.8mohm max
Vgs=20V
Vds=30V @ PJ301
Vgs=20V
1

Need check the SOA for inrush ID= 10.5A (Ta=70C) 1 2 Vds=30V 1

1 2 ID= 10.5A (Ta=70C)


+19V_VIN PQ302 JUMP_43X79
MDU1512RH_POW ERDFN56-8-5 +19V_P1 +19V_P2
1 1 PR304 @EMI@ PL301 +19VB_CHG
2 2 0.02_1206_1% 1UH_2.8A_30%_4X4X2_F 1
5 3 3 5 1 4 1 2 2
Isat: 4A 5 3

2200P_0402_25V7K
10U_0805_25V6K

10U_0805_25V6K
2 3
2200P_0402_50V7K

0.1U_0402_25V6
DCR: 27mohm

0.1U_0402_25V6
PQ304
4

@EMI@ PC306
1

1
PC303

PC304

EMI@ PC305
0_0402_5% PQ303 AON7506_DFN33-8-5

0.01U_0402_50V7K
PC301

@ PR301

4
1

1
AON7506_DFN33-8-5 +19V_VIN

PC302

PC307
2

2
2

VF = 0.5V
2

2
3

2
PD301 PR305
ACDRV_CHG_R 4.12K_0603_1%
BAS40CW _SOT323-3

0.1U_0402_25V6
BATDRV_CHG 1 2BATDRV_CHG_R

0.1U_0402_25V6
Rds(on) = 30mohm max

1
1
PC308

PC310
Vgs = 20V

1 1
1 2

10_1206_1%
PC311
0.047U_0402_25V7K Vds = 30V

PR306
2
PC309 1 2 BST_CHG_R ID = 7A (Ta=70C)
0.1U_0402_25V6 VF = 0.37V

5
2.2_0603_5%
PR307
PD302 PQ305

2
RB751V-40_SOD323-2 AON7506_DFN33-8-5
7X7X3 Power loss: 0.32W for 3.5A

VCC_CHG
@ PR308
Isat: 3.8A CSR rating: 1W

2
UG_CHG 1 2UG_CHG_R 4
VSRP-VSRN spec < 81.28mV
4.12K_0603_1%

4.12K_0603_1%

2 2

0_0402_5%
1

REGN_CHG
PC312 +17.4V_BATT

BST_CHG
PR309

PR310

UG_CHG
1 2

LX_CHG
PL302 PR311

3
2
1
1U_0603_25V6K 1 2 4.7UH_5.5A _20%_7X7X3_M 0.01_1206_1%

ACN_CHG
LX_CHG 1 2 LX_CHG_R1 4
2

PC313
1U_0603_25V6K 2 3

20

19

18

17

16

SRP_CHG_R
PU301 PQ306

1SRN_CHG_R
5

1
AON7506_DFN33-8-5

680P_0402_50V7K 4.7_1206_5%
VCC

PHASE

HIDRV

BTST

REGN

10U_0805_25V6K

10U_0805_25V6K
@EMI@ PC318 @EMI@ PR312
21
PAD

0.1U_0402_25V6

0.1U_0402_25V6

PC314

PC315
1

1
1 15 LG_CHG
ACN LODRV

PC316

PC317
2

1
4

2
ACP_CHG 2 14
ACP GND PR313

2
1
10_0603_1%
CMSRC_CHG 3 13 SRP_CHG
1 2 SRP_CHG_R

3
2
1
CMSRC SRP

1
PR314

2
BQ24735RGRR_QFN20_3P5X3P5 6.8_0603_1%
ACDRV_CHG 4 12 SRN_CHG
1 2 SRN_CHG_R

2
ACDRV SRN PC319
0.1U_0603_16V7K
For 4S per cell 4.35V battery 1 2 5 11 BATDRV_CHG
+3VLP ACOK BATDRV
PR315
ACDET
100K_0402_1%

IOUT

SDA

SCL

ILIM
ACDET_CHG
<14> ACIN
6

10
PR319
1

3
316K_0402_1% 3

PR316 ILIM_CHG 1 2
+3VLP
2M_0402_1%

100K_0402_1%

0.01U_0402_25V7K
ACDET_CHG

1
IOUT_CHG

PC320
PR318
2

1
PR321
422K_0402_1%
1

1 2
+19V_VIN

2
PR320
2

1_0402_5%
1 2

PQ307
PR322 LTC015EUBFS8TL_UMT3F
100K_0402_1%
1 2 2
<14> BATT_4S
0.22U_0402_16V7K

EC_SMB_CK1 <14,27>
66.5K_0402_1%

100P_0402_50V8J
1
1

1
PR323
PC321

PC322
3

EC_SMB_DA1 <14,27>
1

D
2

2 PQ308
<14,15,30> SUSP#
2

G 2N7002KW _SOT323-3
1 2
S ADP_I <14,27>
3

PR324
0_0402_5% PC323
2.2U_0402_6.3V6M
2

Close EC chip
4 4

Vin Dectector
Min. Typ Max.
L-->H 17.16V 17.63V 18.12V CZ@ PR320 change to 499ohm for prochot delay
H-->L 16.76V 17.22V 17.70V
Security Classification Compal Secret Data Compal Electronics, Inc.
VILIM = 20*ILIM*Rsr Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title
ILIM = 3.3*100/(100+316)/20/0.01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CHARGER
= 3.966 A AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 28 of 35
A B C D
A B C D E

@ PR401
0_0402_5%
3V_EN_R 1 2
1 3V_EN <14> 1

PR403
499K_0402_1%
ENLDO_3V5V 1 2
+19VB +19VB

@
@EMI@ PL401 PR404 PC402

1
150K_0402_1%
5A_Z120_25M_0805_2P 0_0603_5% 0.1U_0603_25V7K
1 2 +19VB_3V BST_3V 1 2 1 2

PR405
2200P_0402_50V7K
@ PJ403

2
5

1
10U_0805_25V6K

10U_0805_25V6K
@EMI@ PC401

EMI@ PC403
0.1U_0402_25V6
1 2 PU401
1 2
1

BS
IN

IN

IN

IN
PC404

PC428
JUMP_43X79
LX_3V 6 20 PL402
2

2
LX LX 1.5UH_PCMB053T-1R5MS_6A_20%
7 19 LX_3V 1 2
@ GND LX +3VALWP

@EMI@ PR406
8 18
GND GND

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
4.7_1206_5%
SY8286BRAC_QFN20_3X3

1
9 17
PG LDO +3VLP

PC405

PC406

PC407

PC408
1
PR407 10 16

2
100K_0402_5% NC NC PC409

OUT
EN2

EN1
1 2 21

NC
FF
+3VALWP 4.7U_0603_6.3V6M

2
GND

13V_SN 2
2 2

11

12

13

14

15

680P_0603_50V7K
3.3V LDO 150mA~300mA

@EMI@ PC410
<14> SPOK

ENLDO_3V5V
Vout is 3.234V~3.366V

2
Ipeak=7A
Check pull up resistor of Imax=4.9A @ PJ401
+3VALWP 1 2 +3VALW
SPOK at HW side Iocp=10A 1 2
PC411 PR408 JUMP_43X118
1000P_0402_25V8J 1K_0402_5%
3V_EN_R 3V_FB 1 2 1 2

@ PJ402
+5VALWP 1 2 +5VALW
1 2
JUMP_43X118
+19VB
+19VB_5V

@
@EMI@ PL403 PR409
PC412
5A_Z120_25M_0805_2P 0_0603_5%
1 2 +19VB_5V BST_5V 1 2 1 2
2200P_0402_50V7K
10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6

0.1U_0603_25V7K
@EMI@ PC416

@ PJ404
1 2
1 2
1

1
PC413

PC414

EMI@ PC415

PU402
3 JUMP_43X79 3
BS
IN

IN

IN

IN

5*5*3
2

@ LX_5V 6 20 PL404
LX LX 1.5UH_PCMB053T-1R5MS_6A_20%
7 19 LX_5V 1 2
GND LX +5VALWP
8 18 @ @
GND GND

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
@EMI@ PR411
SY8286CRAC_QFN20_3X3

1
4.7_1206_5%
SPOK 1 2 9 17 1 2
PG VCC

PC418

PC419

PC420

PC421

PC422

PC423
@ PR410 10 16 PC417

2
0_0402_5% NC NC 4.7U_0603_6.3V6M
OUT

LDO
EN2

EN1

21
FF

1 5V_SN2
GND
11

12

13

14

15

680P_0603_50V7K
VL

@EMI@ PC424
Vout is 4.998V~5.202V
ENLDO_3V5V

5V LDO 150mA~300mA

2
1

4.7U_0603_6.3V6M

Ipeak=7A
5V_EN

PC425

PR412 Imax=4.9A
2

2.2K_0402_5%
1 2 Iocp=10A
<14> EC_ON @ PR413
0_0402_5%
1 2
<14,24,27> MAINPWON
PC426 PR414
4 5V_EN 1000P_0402_25V8J 1K_0402_5% 4
5V_FB 1 2 1 2
1M_0402_1%

4.7U_0402_6.3V6M
1

EC VDD0 is +3VL, PC426 UNPOP


1
PR415

PC427

EC VDD0 is +3VALW, PC426 POP


2

Security Classification Compal Secret Data Compal Electronics, Inc.


2

Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+3VALW/+5VALW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 29 of 35
A B C D E
5 4 3 2 1

Pin19 need pull separate from +1.5VP.


@EMI@ PL501
If you have +1.5V and +0.75V sequence question, 0.75Volt +/- 5%
D 5A_Z120_25M_0805_2P you can change from +1.5VP to +1.5VS. TDC 0.7A D

1 2 +19VB_1.5V PR501 Peak Current 1A


+19VB 2.2_0603_5%
BST_1.5V_R 1 2 BST_1.5V

2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6
@ PJ506 +1.5VP

1
1 2
1 2

@EMI@ PC501

EMI@ PC502

PC503

PC504
JUMP_43X79 UG_1.5V +0.75VSP

0.1U_0603_25V7K
2

2
LX_1.5V

10U_0805_6.3V6K

10U_0805_6.3V6K
5

1
PC505

PC506

PC507
AON7408L_DFN8-5

16

17

18

19

20
2
PU501

2
VLDOIN
PHASE

UGATE

BOOT

VTT
4 21
PAD

PQ501
LG_1.5V 15 1
LGATE VTTGND

1
2
3
14 2
PL503 PR502 PGND VTTSNS
1UH_11A_20%_7X7X3_M 25.5K_0402_1%
1 2 1 2 CS_1.5V 13 3
+1.5VP PC508 CS RT8207PGQW _W QFN20_3X3 GND

1
1U_0603_10V6K

SI7716ADN-T1-GE3_POWERPAK8-5
1 2 12 4 VTTREF_1.5V
VDDP VTTREF

5
C @EMI@ PR503 PR504 C
4.7_1206_5% 5.1_0603_5%
1 2 1 2 VDD_1.5V 11 5
+5VALW VDD VDDQ
+1.5VP

1
PGOOD
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
1

2
PC509

TON
1
4 0.033U_0402_16V7K

PQ502
@EMI@ PC517 PR505
PC511

PC512

PC513

PC514

PC515

PC516

FB
S5

S3

2
680P_0402_50V7K PC510 2.2_0603_5%
2

1U_0603_10V6K

10

6
1
1
2
3

FB_1.5V
EN_0.75VSP
TON_1.5V
PR506

EN_1.5V
10.2K_0402_1%
+5VALW PR507 1 2 +1.5VP
470K_0402_1%
+19VB_1.5V 1 2
H/S AON7408 Rds(on) :typ:27mOhm, max:34mOhm
Idsm(TA=25)=7.5A, Idsm(TA=70)=5.5A

1
Mode Level +0.75VSP VTTREF_1.5V
S5 L off off L/S AON7506 Rds(on) :typ:13mOhm, max:15.8mOhm @ PR509 PR508 0.75*(1+10.2/10)=1.515
S3 L off on Idsm(TA=25)=12A, Idsm(TA=70)=10.5A 0_0402_5% 10K_0402_1%
S0 H on on <14> SYSON 1 2

2
Choke: 7x7x3
Note: S3 - sleep ; S5 - power off

1
Rdc=8mohm(Typ), 11mohm(Max) @ PC518
0.1U_0402_10V7K

2
Switching Frequency: 530kHz
B
Ipeak=11.5A B
Iocp~13.8A @ PR510
0_0402_5%
OVP: 110%~120% 1 2 @ PJ501
VFB=0.75V, Vout=1.515V <14,15,28> SUSP# 1 2
+1.5VP 1 2 +1.5V

1
JUMP_43X118
@ PC519
0.1U_0402_10V7K

2
@ PJ504
1 2
+0.75VSP 1 2 +0.75VS
JUMP_43X39

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.5VP/+0.75VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 30 of 35
5 4 3 2 1
5 4 3 2 1

EN pin don't floating Module model information


If have pull down resistor at HW side, pls delete PR2
D SY8208D_V1.mdd D

@EMI@ PL601
+19VB 5A_Z120_25M_0805_2P PU601
1 2 +19VB_VDDP 2 9 @ PR603 PC602 @EMI@ PR602 @EMI@ PC603
IN PG 0_0603_5% 0.1U_0603_25V7K 4.7_1206_5% 680P_0603_50V7K
3 1 BST_VDDP 1 2 1 2 1 2SNB_VDDP 1 2

0.1U_0402_25V6

10U_0805_25V6K

10U_0805_25V6K
2200P_0402_50V7K
1

1
@ PJ604 IN BS

@EMI@ PC604
1 2 4 6

EMI@ PC601
LDO_VDDP 1 2 IN LX

2
5 19 PL602

PC605

PC622
JUMP_43X79 IN LX .68UH_PCMC063T-R68MN_15.5A_20%
1

LX_VDDP
7
GND LX
20
FB_VDDP
1 2
+0.95VALWP
@ PR604 8 14

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
GND FB
0_0402_5%

330P_0402_50V7K

1
@ PR601 18 17 LDO_VDDP
(R1)
2

ILMT_VDDP 0_0402_5% GND VCC

PC606

PC607

PC608

PC609

PC610

PC611
1

1
<14> 0.95_1.8VALW_PWREN 1 2 11 10 PC612

PC613

2
1

EN NC 2.2U_0402_6.3V6M PR606
ILMT_VDDP 13 12 16K_0402_1%

2
@ PR605 ILMT NC

1
0_0402_5% 15 16
+3VALW

2
BYP NC

1
PR607 @ PC614
2

1M_0402_1% 0.22U_0402_10V6K 21 PC609, PC610 from 47U_0603_6.3V6M change to

1
PAD
22U_0603_6.3V6M 2013/10/23

2
PC615 SY8288RAC_QFN20_3X3

2
1U_0402_6.3V6K

2
PR606 part count reduce FB = 0.6V
@ PJ601
C CZ+BR@ PR609 +0.95VALWP 1 2 +0.95VALW C
20K_0402_1% CZL+SR@ 1 2

1
JUMP_43X118
PR609
26.7K_0402_1%
(R2)

2
VFB=0.6V
Vout=0.6V*(1+R1/R2)=0.96V

EN_1.8VALW_R EN_1.8VALW_R 1 2
B 0.95_1.8VALW_PWREN <14> B

@ PR611
FB=0.6V
0.1U_0402_16V7K

0_0402_5%
1

PR612
Note:Iload(max)=3.5A 1M_0402_5%
PC616

Note:Iload(max)=2.5A
2

PU602 @
9
1 PGND 8
FB SGND
2 7 PL603
@ PJ602 PG EN 1UH_2.8A_30%_4X4X2_F
+3VALW 1 2IN_1.8VALW 3 6 LX_1.8VALW 1 2
1 2 IN LX +1.8VALWP
4 5
68P_0402_50V8J
1

JUMP_43X79 PGND NC @ PJ603


@EMI@ PR613
4.7_0603_5%

+1.8VALWP
1

1 2
PC618

22U_0603_6.3V6M

22U_0603_6.3V6M

+1.8VALW
1

SY8003ADFC_DFN8_2X2 PR614 1 2
PC617 20K_0402_1%
Rup
PC619

PC620
2

22U_0603_6.3V6M JUMP_43X79
2

FB_1.8VALW
1
680P_0402_50V7K

FB=0.6V
@EMI@ PC621
1

Note:Iload(max)=3A PR615
10K_0402_1%
Rdown
2

Note:
A When design Vin=5V, please stuff snubber A

to prevent Vin damage


Vout=0.6V* (1+Rup/Rdown)

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+0.95VALW/+1.8VALW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 31 of 35
5 4 3 2 1
8 7 6 5 4 3 2 1

@ PJ801
+19VB_APU 1 2
1 2
JUMP_43X79
@EMI@ PL801
5A_Z120_25M_0805_2P
1 2
H
Module model information +19VB H

33U_25V_NC_6.3X4.5
@EMI@ PL802

PC831
0.1U_0402_25V6
10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

2200P_0402_50V7K
RT3661AB_V1A.mdd for IC portion 1 5A_Z120_25M_0805_2P

1
1 2

PC832
1

1
PR802 +

PC821

PC820

PC802

PC803

PC830
0_0603_5%

@EMI@
RT3661AB_V1B.mdd for SW portion

2
UG1_APU 1 2UG1_APU_R 4

2
2

EMI@
PQ801

3
2
1
AON6428L_DFN8-5

PR803 PC804 PL803


2.2_0603_5% 0.1U_0201_10V6K 0.22UH_24A_20%_ 7X7X4_M
BST1_APU 1 2BST1_APU_R 1 2 1 4
+APU_CORE

PR804
ISEN1P_APU_R 2 3

4.7_1206_5%
5

1
LX1_APU PQ802

@EMI@
AON6794_DFN5X6-8-5
1 2 1 2

2
LG1_APU 4 4 PR805 PC805
G SNB_APU 1.24K_0603_1% 0.47U_0402_25V6K G

680P_0603_50V7K
1
PC806
@ PR801 PQ805 1 2

3
2
1

3
2
1

2
0_0402_5% AON6794_DFN5X6-8-5
1 2 PR852

@EMI@
+5VALW
1.24K_0402_1%
PC801 APU_core
2.2U_0402_10V6M
1 2 ISEN1P_APU TDC 22A
Peak Current 35A
ISEN1N_APU OCP current > 45.5A
EN: High > 2V, Low < 0.8V +19VB_APU Load line -2.1mV/A
FSW=300kHz

0.1U_0402_25V6
1
Can't be floating. ISEN1P_APU to ISEN1N_APU must <40mV

PC807
1
DCR 0.98mohm +/-5%

PVCC_RT3661
PR806
TYP MAX

2
<14,33> VR_ON 4.7_0402_1%

BST1_APU
UG1_APU

LG1_APU
H/S Rds(on) :6.7mohm , 8.5mohm

LX1_APU

UG_NB
LG_NB
LX_NB
L/S Rds(on) :3mohm , 3.8mohm

2
1 2
Confirm HW side the pull high resistor PC808

1000P_0402_25V8J
0.1U_0402_25V6
F F

40
39
38
37
36
35
34
33
32
31

1
LL=2.05m PU801
1 2 1 2

PC811
NC
NC

PVCC
UGATE
PHASE
LGATE

LGATE_NB
PHASE_NB
UGATE_NB
BOOT
<14> VGATE

1
PR809 PR807 @ PR851 @ PC840 @ PR808
10K_0402_1% 69.8K_0402_1% PR813 41 0_0402_5% PC809 PC810 0.1U_0402_25V6 0_0402_5%
1 2 1 2 100K_0402_5% AGND @ 82P_0402_50V8J 330P_0402_50V8J 1 2 1 2

2
2
1 2 APU_CORENB_SEN_H <7>
+3VS
1 30 BST_NB LL=3.996m
@ PR814 PC812 PC813 2 NC BOOT_NB 29 EN_RT3661 PR810 PR811 PR812
3 NC EN 28 Vin_RT3661
0_0402_5% 470P_0402_50V8J 82P_0402_50V8J 62K_0402_1% 10K_0402_1% 10_0402_1%
<7> APU_CORE_SEN_H 1 2 1 2 1 2 RGND_RT3661 4 PGOOD VIN 27 COMP_NB 1 2 1 2 VSEN_NB 1 2
COMP_APU RGND COMP_NB FB_NB +APU_CORE_NB
5 26
PR816 FB_APU 6 COMP FB_NB 25 ISENP_NB
VSEN_NB FB ISENP_NB ISENN_NB

1
10_0402_1% 7 24
1 2 VSEN_APU 8 VSEN_NB ISENN_NB 23 TSEN_NB @ PC814 @ PC815

100K_0402_1%_B25/50 4250K
+APU_CORE ISEN1P_APU VSEN TSEN_NB VDDIO_RT3661
9 22 1 2 +1.8VS 0.1U_0402_25V6 0.1U_0402_25V6

2
ISEN1N_APU 10 ISEN1P VDDIO 21 SVT_RT3661 @ PR820

VREF_PINSET
ISEN1N SVT
1

PR818 10_0402_1%
100 degree C RGND_RT3661
1

@ PC817 2.2_0402_5% 1 2

VRHOT_L

IMON_NB

60.4K_0402_1%

1
PWROK
0.1U_0402_25V6 @ PC818 @ PC842
2

1
TSEN

IMON
0.1U_0402_25V6 1 2

SET1
0.1U_0402_25V6 Close to

VCC

SVC
SVD
2

PR823

PR821
10_0402_1%
RGND_RT3661
@ PR824 PC816 R2 PQ804
1 2 0_0402_5% 1U_0402_6.3V6K

PH801
11
12
13
14
15
16
17
18
19
20

2
RT3661ABGQW_WQFN40_5X5 1 2
E
Rp3 E

2
1

@ PC819 APU_SVT_R <7>

IMON_NB
@ PR829 0.1U_0402_25V6 PR825 @ PR826

SET1_RT3661
TSEN_APU

IMON_APU
VREF_PINSET_RT3661

VCC_RT3661
@ PC841 0_0402_5% 1 2 316K_0402_1% 0_0402_5%
2

1 2 0.1U_0402_25V6 SVD_RT3661 1 2 TSEN_NB_R 1 2 1 2


<7,33> APU_VSS_SEN_L APU_SVD <7> VREF_PINSET_RT3661
@ PR827 @ PC836 PR828
0_0402_5% 0.1U_0402_25V6 24K_0402_1%
<7,14,33> APU_PROCHOT# 1 2 1 2 Rp4

100K_0402_1%_B25/50 4250K
100 degree C

60.4K_0402_1%
1

1
@ PR833 1 2
Rp1 Close to 0_0402_5%
PH802

PR830
RT3661AB SET1, TSEN and TSEN_NB Pin Setting Function: PQ802 SVC_RT3661 1 2 APU_SVC <7> @ PC834
AI_VDD=100%, AI_VDDNB=100% @ PR831
0_0402_5%
PR832
316K_0402_1% @ PC837
100P_0402_25V8K

QR Threshold: Disable 2

2
1 2 1 2 TSEN_APU_R 0.1U_0402_25V6
1 2 APU_SVD and APU_SVC RC filter put CPU side.
Frequency: 300kHz APU_SVT RC filter put controller side.
R1
1

VDD and VDDNB Initial Offset: 0mV (PS0)


1

@ PC835 PR834
VDD and VDDNB PHOCP Setting Ratio: 150% 100P_0402_25V8K 24K_0402_1%
APU_PWROK<7,33>
2

@EMI@ PC843 Confirm HW side the pull high resistor +19VB_APU


Rp2
2

VREF_PINSET_RT3661 0.1U_0402_25V6 PR840


D 2 1 0_0603_5% D
UG_NB UG_NB_R
1

1 2
PR836 PR837
4.7_0402_5%

EMI@
PC839 @EMI@
15.4K_0402_1%

10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6

2200P_0402_50V7K
1 2 +5VALW

1
@ PR838 PR839
2

1
0_0402_5% 34.8K_0402_1% PC822

PC823

PC824
1

2
1 2 1 2 2.2U_0402_10V6M PQ906

PC838
2

2
1 2 S TR AON6992 2N DFN5X6D

G1

D1

2
PR841 PC825
2.2_0603_5% 0.1U_0201_10V6K
BST_NB 1 2BST_NB_R 1 2 7 PL804
D2/S1 0.22UH_24A_20%_ 7X7X4_M
1 4 +APU_CORE_NB
1

G2

S2

S2

S2
PR843 PR842 LX_NB ISENP_NB_R 2 3

4.7_1206_5%
1
6.98K_0402_1%

@EMI@ PC827 @EMI@ PR844


5.49K_0402_1%

3
2

RNC1N_APU RNC1N__NB 1 2 1 2
100K_0402_1%_B25/50 4250K

2
LG_NB PR845 PC826
100K_0402_1%_B25/50 4250K

SNB_APU_NB 619_0603_1% 0.47U_0402_25V6K


1

1
Close to Close to
PH803

680P_0603_50V7K
PR846 PR847
PH804

C PL803 14K_0402_1% 13K_0402_1% PL804 1 2 C

2
@ PR853
2

1.24K_0402_1%
RNC1P_APU 1 2 1 2 RNC1P__NB
ISENP_NB
PR848 PR849
1

12.7K_0402_1% 13.3K_0402_1%
PR850 APU_CORE_NB ISENN_NB

VREF_PINSET_RT3661 3.9_0402_1% TDC 12A


Peak Current 17 A

0.1U_0402_25V6
1
2

OCP current > 25.5A

PC828
Load line -4mV/A

2
1

PC833
0.47U_0402_6.3V6K FSW=300kHz
DCR 0.98mohm +/-5%
2

TYP MAX
H/S Rds(on) :6.7mohm , 8.5mohm
L/S Rds(on) :3mohm , 3.8mohm
B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 2018/03/14 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+APU_CORE/+APU_CORE_NB
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Re v
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 32 of 35
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

@ PJ901
1 2
+19VB_GFX 1 2
JUMP_43X79

@CZ+BR_EMI@ PL901
Module model information 5A_Z120_25M_0805_2P
1 2
H RT3669EA_V1A.mdd for IC portion +19VB H

2200P_0402_50V7K
@CZ+BR_EMI@ PL902

CZ+BR@ PC939

CZ+BR@ PC938

CZ+BR@ PC901

CZ+BR@ PC902

PC904

@CZ+BR_EMI@
10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6
33U_D2_25VM_R60M
CZ+BR@ PQ901 1 5A_Z120_25M_0805_2P

CZ+BR_EMI@
1

1
1 2
RT3669EA_V1B.mdd for SW portion AON6428L_DFN8-5

1
CZ+BR@ PR901 +
0_0603_5%

@CZ+BR@

2
UG_GFX 1 2 UG_GFX_R 4

2
2

PC905

PC903
3
2
1
CZ+BR@ PR902 CZ+BR@ PC906 CZ+BR@ PL903
2.2_0603_5% 0.1U_0201_10V6K 0.22UH_24A_20%_ 7X7X4_M
BST_GFX 1 2BST_GFX_R 1 2 1 4 +APU_GFX
ISEN1P_GFX_R 2 3

@CZ+BR_EMI@ PR903
5

4.7_1206_5%
LX_GFX
CZ+BR@ PQ902 CZ+BR@ PQ903
AON6794_DFN5X6-8-5 AON6794_DFN5X6-8-5
1 2 1 2

2
LG_GFX 4 4 CZ+BR@ PR904 CZ+BR@ PC907
2K_0603_1% 0.47U_0402_25V6K

@CZ+BR_EMI@ PC908
SNB_GFX GFX_core
TDC 22A

1
680P_0603_50V7K
G 1 2 G
Peak Current 35A

3
2
1

3
2
1
CZ+BR@ PR905
OCP current > 45.5A

2
887_0402_1%
Load line -2.1mV/A
@CZ+BR@ PR906 FSW=400kHz
<8> VDDGFX_PWRGD
0_0402_5%
1 2
DCR 0.98mohm +/-5%
+5VALW ISEN1P_GFX
TYP MAX
CZ+BR@ PR907 CZ+BR@ PC909
100K_0402_5% 2.2U_0402_10V6M H/S Rds(on) :6.7mohm , 8.5mohm
ISEN1N_GFX
+3VALW 1 2 1 2 L/S Rds(on) :3mohm , 3.8mohm
EN Threshold: H>2V , L<0.8V @CZ+BR@ PR908

CZ+BR@ PC910

1
0.1U_0402_25V6
0_0402_5%
1 2

PVCC_GFX
<14,32> VR_ON +0.95VALWP

BST_GFX
CZ+BR@ PC912

UG_GFX
LG_GFX

LX_GFX

2
@CZ+BR@ PC911 10U_0603_6.3V6M
1000P_0402_25V8J CZ+BR@ PR912 Vout_LDO=0.4*((R1+R2)/R2)
check hardware side GFX_VR_ON have pull low 1 2 1 2 360K_0402_1% =0.4*((340k+360k)/360K)
1 2
=0.778 V
CZ+BR@ PR909

32

31

30

29

28

27

26

25
LL=2.05m

1
4.7_0402_1%

1
CZ+BR@ PR910 CZ+BR@ PR911 1 2

BOOT
EN

PGOOD

NC

PVCC
LGATE

PHASE

UGATE
+19VB_GFX S5_MUX_CTRL <8,15,33> CZ+BR@ PC914
10K_0402_1% 82K_0402_1% CZ+BR@ PR913
F 1 2 1 2 CZ+BR@ PC913 100P_0402_50V8J 340K_0402_1% F

2
0.1U_0402_25V6 @CZ+BR@

2
1 2 1 24 PR914 @CZ+BR@ PR940
VIN LDO_VIN 0_0402_5% 100K_0402_5% 1 2
@CZ+BR@ PR915 CZ+BR@ PC915 CZ+BR@ PC916 RGND_RT3669EA 2 23 1 2 1 2 +5VALW
0_0402_5% 470P_0402_50V8J 82P_0402_50V8J RGND MUX_CTRL CZ+BR@ PC917
1 2 1 2 1 2 COMP_GFX 3 22 FBA_GFX
4.7U_0603_6.3V6K
<7> APU_COREGFX_SEN_H COMP FBA +APU_CORE_NB
FB_GFX 4 21 0.775v_LDO OUT
CZ+BR@ PR916
10_0402_1% FB LDO_OUT @ PJ905
VSEN_GFX S5_OUT_GFX_R

1
+APU_GFX 1 2 5 20 1 2 +APU_CORE_FCH
VSEN S5_OUT 1 2
ISEN1P_GFX 6 19 JUMP_43X39 +APU_CORE_NB CZ+BR@ PR941
1

@CZ+BR@ PC918 ISEN1P VSEN_NB_IN 100K_0402_1% @CZ+BR@ PR931 CORE_NB_GATE <15>


ISEN1N_GFX VDDIO_GFX
1

5
22U_0603_6.3V6M

22U_0603_6.3V6M

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K
@CZ+BR@ PC919 7 18 CZ+BR@ PC937 0_0402_5%

CZ+BR@ PC933

CZ+BR@ PC934

CZ+BR@ PC935

CZ+BR@ PC936
0.1U_0402_25V6

2
ISEN1N VDDIO 1U_0402_6.3V6K 1 2 CORE_NB_GATE
0.1U_0402_25V6 @CZ+BR@ PC920 CZ+BR@ PQ905
2

SVT_GFX

1
VREF_PINSET
0.1U_0402_25V6 8 17 1 2 CZ+BR@ PR942 AON7506_DFN33-8-5
2

CZ+BR@ PR917 <7,14,32> APU_PROCHOT# VRHOT_L SVT 180K_0402_1%


10_0402_1% 33

2
RGND_RT3669EA EPAD

PWROK
1 2 CZ+BR@ PR919 4

3
TSEN

IMON
SET1
2.2_0402_5%

VCC

SVC

SVD
1 2
+1.8VS
1

@CZ+BR@ PC921 CZ+BR@ PQ904B


0.1U_0402_25V6 CZ+BR@ PC922 5 DMN65D8LDW-7_SOT363-6

10

11

12

13

14

15

16

3
2
1
1 2 CZ+BR@ PU901 1U_0402_6.3V6K
2

<7,32> APU_VSS_SEN_L RT3669EAGQW_WQFN32_4X4 1 2

4
VREF_PINSET_RT3669EA
@CZ+BR@ PR918
E 0_0402_5% E

6
CZ+BR@ PQ904A +APU_CORE_FCH

VCC_RT3669EA

SVC_RT3669EA

SVD_RT3669EA
close to low side MOSFET <8,15,33> S5_MUX_CTRL 1 2 2

TSEN_GFX

IMON_GFX
SET1_GFX
@CZ+BR@ PR943

100K_0402_1%_B25/50 4250K

1
0_0402_5%
100 degree C CZ+BR@ PH901

CZ+BR@ PR920
60.4K_0402_1%
1

1
R1 @CZ+BR@ PR921
Rp1 0_0402_5%
@CZ+BR@ PR922 CZ+BR@ PR923 1 2
0_0402_5% 66.5K_0402_1% @CZ+BR@ PC923 GFX_SVT_R <7>
2

1 2 1 2 TSEN_GFX_R
2 0.1U_0402_25V6
TSEN Pin Setting for GFX Controller Frequency, 1 2
Initial Offset and PHOCP Setting Ratio:
1

1 2
VTSEN_DIV=3.2*Rp2/Rp1+Rp2 CZ+BR@ PR925
402_0402_1% GFX_SVD <7>
=3.2*33.602k/66.5k+33.602k @CZ+BR@ PR926
0_0402_5%
=1074m V
2
1

@CZ+BR@ PC926
100P_0402_25V8K Rp2 1 2 GFX_SVD and GFX_SVC RC filter put CPU side.
D D
Frequency = 400kHz GFX_SVT RC filter put controller side.
2

@CZ+BR@ PC927
Initial Offset = 0mV CZ+BR@ PR928 0.1U_0402_25V6
1 2
33.2K_0402_1%
VDD PHOCP Setting Ratio = 200% GFX_SVC <7>
@CZ+BR@ PR929
2

0_0402_5%

1 2
1

@CZ+BR@ PC930
VREF_PINSET_RT3669EA CZ+BR@ PR930 0.1U_0402_25V6
14.7K_0402_1%
APU_PWROK<7,32> Pull high in HW side
2

RD CZ+BR@ PR932
4.7_0402_1%
1

@CZ+BR@ PR933
1 2 +5VALW +3VALW
0_0402_5%
CZ+BR@ PC931
SET1 Pin Setting for GFX Controller AI Gain Ratio: 2.2U_0402_10V6M @ PJ904
2

1
@CZ+BR@ PR934 CZ+BR@ PR935 1 2 +0.775VALWP 1 2 +0.775VALW
0_0402_5% 34K_0402_1% @ PJ903 1 2

1
VTSET1_DIV=3.2*RD/RU+RD 1 2 1 2 JUMP_43X39 JUMP_43X39
C C
=3.2*14.7k/34k+14.7k

2
=966 mV RU SR@

2
PU902
VIN_0.775VALW 1
VIN NC
8 +3VALW
AI_GFX = 100% 2 7

2
GND NC

1
1
SR@ PC924 3 6 SR@ PC925
4.7U_0603_6.3V6M VREF VCNTL 1U_0402_6.3V6K
SET1 Pin Setting for GFX Controller QR Threshold:

2
1

SR@ PR924 4 5
CZ+BR@ PR936 3.24K_0402_1% VOUT NC
16.2K_0402_1% 9
VTSET1_IR=80u*RU*RD/RU+RD

2
TP
VREF_0.775VALW
G2992F1U
=80u*34k*14.7k/34k+14.7k
2

RNC1N_GFX

1
=821 mV
100K_0402_1%_B25/50 4250K

+0.775VALWP

1
SR@ PR927
1K_0402_1% SR@ PC928
1

1
QR Threshold (GFX) : Disable 0.1U_0402_16V7K
PH902

2
CZ+BR@ PR937 SR@ PC929

2
18K_0402_1% 10U_0805_6.3V6M
close to PL903

2
CZ+BR@

RNC1P_GFX 1 2
B B
CZ+BR@ PR938
1

8.45K_0402_1%
CZ+BR@ PR939
VREF_PINSET_RT3669EA 3.9_0402_1%
2
1

CZ+BR@ PC932
0.47U_0402_6.3V6K
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+GFX_CORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date : Monday, March 14, 2016 Sheet 33 of 35
8 7 6 5 4 3 2 1
A
B
C
D

@
PC9084
220U_D2 SX_2VY_R9M

2
1
+
PC9085 PC9029 PC9001
220U_D2 SX_2VY_R9M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1

2
1
+

near CPU
@
PC9086 PC9081 PC9056 PC9030 PC9002
220U_D2 SX_2VY_R9M 180P_0402_50V8J 0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1

2
1
+

5
5

+APU_CORE
+APU_CORE

PC9057 PC9031 PC9003


0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1

2
1
+
PC9087 PC9058 PC9032 PC9004
560U_D2_2VM_R4.5M 0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1

PC9059 PC9033 PC9005


0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M

180pF*1
220uF*3
560uF*1
2 1 2 1 2 1

PC9060 PC9034 PC9006

APU_CORE
0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1

CPU back side


PC9061 PC9035 PC9007
0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1

22uF*20+0.22uF*8
PC9062 PC9036 PC9008
0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1
+APU_CORE

PC9063 PC9037 PC9009


0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1

PC9038 PC9010
22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1

4
4

(common part)
SGA00009S00 (330u)
change PC9088 from
SGA20221D40 (220u) to
PC9088
330U_D2_2V_Y
2
1
+
PC9039 PC9011
PC9064 22U_0603_6.3V6M 22U_0603_6.3V6M
0.22U_0402_10V6K 2 1 2 1
2 1 2 1
PC9040 PC9012

2
1
+

near CPU
PC9082 PC9065 22U_0603_6.3V6M 22U_0603_6.3V6M
180P_0402_50V8J 0.22U_0402_10V6K 2 1 2 1
2 1
PC9041 PC9013
PC9066 22U_0603_6.3V6M 22U_0603_6.3V6M
0.22U_0402_10V6K 2 1 2 1
2 1

@ PC9089
+APU_CORE_NB

PC9042 PC9014
PC9067 22U_0603_6.3V6M 22U_0603_6.3V6M
0.22U_0402_10V6K 2 1 2 1
2 1

Issued Date
220U_D2 SX_2VY_R9M
PC9043 PC9015
PC9068 22U_0603_6.3V6M 22U_0603_6.3V6M
180pF*1
220uF*2

0.22U_0402_10V6K 2 1 2 1

Security Classification
2 1
PC9044 PC9016
PC9069 22U_0603_6.3V6M 22U_0603_6.3V6M
0.22U_0402_10V6K 2 1 2 1
2 1
APU_CORENB

3
3

PC9045 PC9017
PC9070 22U_0603_6.3V6M 22U_0603_6.3V6M
0.22U_0402_10V6K 2 1 2 1
22uF*17+0.22uF*8

2 1
+APU_CORE_NB

PC9018
PC9071 22U_0603_6.3V6M

2016/03/14
0.22U_0402_10V6K 2 1
2 1
PC9019
22U_0603_6.3V6M
2 1

PC9020
22U_0603_6.3V6M
2 1

Compal Secret Data


Deciphered Date
CZ+BR@ PC9090
560U_D2_2VM_R4.5M

2
2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
1
+

2018/03/14
CPU back side

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

CZ+BR@ PC9091
330U_2V_M
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

CZ+BR@ PC9072 CZ+BR@ PC9046 CZ+BR@ PC9021


2
1
+

0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M


@CZ+BR@ PC9092 2 1 2 1 2 1 2 1
220U_D2 SX_2VY_R9M
CZ+BR@ PC9083 CZ+BR@ PC9073 CZ+BR@ PC9047 CZ+BR@ PC9022
2
1
+

180P_0402_50V8J 0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M


2 1 2 1 2 1
+APU_GFX
+APU_GFX

2
1
+

CZ+BR@ PC9074 CZ+BR@ PC9048 CZ+BR@ PC9023


Title

Date:

0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M


2 1 2 1 2 1
Custom

CZ+BR@ PC9075 CZ+BR@ PC9049 CZ+BR@ PC9024


0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1
+APU_GFX

CZ+BR@ PC9076 CZ+BR@ PC9050 CZ+BR@ PC9025


0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M
@CZ+BR@ PC9093

Size Document Number

2 1 2 1 2 1
220U_D2 SX_2VY_R9M
180pF*1
220uF*3
560uF*1

near CPU
APU_GFX

CZ+BR@ PC9077 CZ+BR@ PC9051 CZ+BR@ PC9026


Monday, March 14, 2016

0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M


2 1 2 1 2 1

CZ+BR@ PC9078 CZ+BR@ PC9052 CZ+BR@ PC9027


0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1
1
1

22uF*18+0.22uF*9

CZ+BR@ PC9079 CZ+BR@ PC9053 CZ+BR@ PC9028


Sheet

0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M


2 1 2 1 2 1
B5W18/19 LA-D661PR03
34

CZ+BR@ PC9080 CZ+BR@ PC9054


+APU_CORE Cap

0.22U_0402_10V6K 22U_0603_6.3V6M
2 1 2 1
Compal Electronics, Inc.

of

CZ+BR@ PC9055
22U_0603_6.3V6M
2 1
35
Rev
0.3
A
B
C
D
5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1


for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase

electrolytic capacitor is close


to PCB edge, high risk of electrolytic capacitor is close to PCB edge, high risk
01 of component crack issue. 01 33 change PC904 to SGA00007I00 for DFB request
D component crack issue. D

change PC810 from 470p to 330p


change PR807 from 64.9k to 69.8k
32 change PR810 from 59k to 62k
02 tune CPU transient and LL tune CPU transient and LL 01 change PR911 from 64.9k to 82k
33 change PC9091from SGA20221D40 to SF000008L00
change PC9088 from SGA20221D40 (220u) to SGA00009S00 (330u) (common part)
unpop PC9084, PC9086, PC9089, PC9092, PC9093

03 in S5, APU_CORE_FCH in S5, APU_CORE_FCH leakage to unpop PQ905


leakage to APU_CORE_NB APU_CORE_NB 01 33 add PR931 0ohm and connect to CORE_NB_GATE

32 change 0ohm to R-short: PR918, PR933, PR833, PR926, PR929, PR814,


04 reduce part count reduce part count 01 PR943, PR824, PR908, PR801, PR851, PR914, PR808, PR826, PR922,
33 PR838, PR906, PR827, PR934, PR829, PR831, PR921, PR915
C C

05

06
07

08

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/03/14 Deciphered Date 2018/03/14 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_PIR1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W18/19 LA-D661PR03
Date: Monday, March 14, 2016 Sheet 35 of 35
5 4 3 2 1

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