COMPUTER ARCHITECTURE

SRIJITH R UNNI

2020503545

Questions

1. What is an instruction cycle ?

In a computer, instructions are executed in the RAM by the CPU. The CPU follows a cycle which
includes fetching the instruction from the memory , decoding the instruction and then executing
it. This FETCH-DECODE-EXECUTE cycle is called an instruction cycle.

2. What is a CPU cycle ?

A CPU cycle by itself does not mean a physical process but in essence it can be said that a
certain number of CPU cycles can execute one instruction. Different instructions might differ in
the number of CPU cycles it needs. In other words it’s a quantum of time interval for CPUs.

3. What is an instruction count?

The total number of executable instructions that are executed by the program is called as
instruction count. Since one can only know the instruction count when executing , it is a
dynamic measure.

4. What is bit architecture?

When people say a system has a 32 or 64-bit architecture it just says how many different
memory addresses it can identify. For example, a 32-bit architecture can identify 2 32 unique
memory locations which means roughly 4 gigabytes of RAM. Basically, the bit in architecture
denotes the size of the address bus , data bus or the register width.

5. Difference between CISC and RISC

RISC CISC

Reduced Instruction Set Computer Complex Instruction Set Computer

 It decodes instruction one by one
The software has to optimize the instruction set
The execution time for each instruction is short
It can execute multiple instructions(IN RISC) in a
single instruction.
The emphasis is on hardware to optimize the
instruction set.
The execution time for each instruction is longer

The RISC takes more space in memory The CISC takes relatively less space in memory

6. Latest Processors available from different manufacturers and their capabilities

The main competitors in the market right now are intel and AMD. In 2017 when AMD
introduced the Ryzen, intel had to play catch up to match it’s processing speed and low price.
But the new Intel core i9-12900K easily beats all the AMD processors by a long shot.

INTEL CORE i9-12900K SPECS:

Cores: 16
Basically, it means that this processor has 16 processing units

Threads: 24

A thread is created by the OS for each process. Each core can have 1 to 2 threads. Threads are
created so that the processes are handled efficiently and multiple tasks can be done at the same
time by the processor. So, with more threads more efficiently the tasks are handled (Though the
number of threads depends on the number of cores, it’s the core that really matters).

Base clock: 3.20GHz

Clock speed tells one the number of cycles the CPU can perform per second. The Base clock is an
average clock speed that the manufacturer guarantees that every core in a processor can run at
with reasonable cooling.

Boost clock: 5.2GHz

When under heavy load, the CPU can choose to boost the clock speed of one or more cores. The
Boost clock tells one what the clock speed of the core(s) would be if it was boosted.

L3 cache: 30MB

It is the memory that is built onto the processor. It is also called a processor cache. It acts as a
backup for L1 and L2 cache and also improves their performance

TDP: 125W

TDP or Thermal Design Power tells the maximum amount of power that the cooling system has
to dissipate.

The latest AMD was AMD RYZEN 9 5900X

 Cores: 12
Threads: 24
Base clock: 3.7GHz
Boost clock: 4.8GHz
L3 cache: 64MB
TDP: 105W
Though this processor is better than Intel in almost all except the cores, the cores are the most
important spec when it comes to processing power.

Classification of instructions

ALL THE BELOW CLASSIFICATION IS BASED ON 8085 MICROPROCESSOR.

“The instruction set is a collection of Instructions of Microprocessor, that determines what functions
that microprocessor can perform”.

7. TYPES OF INSTRUCTION SET BASED ON WORD SIZE

A one-byte instruction includes the opcode and the operand in the same byte.

In a 2-byte instruction, the 1st-byte specifies the opcode and the 2nd-byte specifies the operand.

In a 3-byte instruction, the 1st byte specifies the opcode, and the following two bytes specify the 16-
bit address such that the 2nd byte is a low order address and the 3rd-byte is a high order address.

8. TYPES OF INSTRUCTION SET BASED ON ADDRESSING MODES

DIRECT: In this instruction set, the direct address contains the address of operand within the
instruction itself.

Example: IN 05

REGISTER: In this type of instruction set, operands will be present in the micro-process registers.

Example: ADD A, B

REGISTER INDIRECT: In this type of instruction, the operands will present in memory (M) and the
address of memory is present register pair.

Example: ADD A, M

IMMEDIATE: In this type, the operand and data are specified within the instruction itself. This type
of instruction has an operand field rather than an address field.

Example: MVI A, 25 (Move immediate)

IMPLICIT: If operations of the microprocessor are performed by accumulator alone or machine

control instructions, then it contains an implied addressing type.

Example: CMA (Complement the accumulator).

9. TYPES OF INSTRUCTION SET BASED ON OPERATION MODES

1. Data Transfer:

In 8085 microprocessors, data transfer instructions are used to move data between CPU registers,
memory, and I/O devices.

The data can be transferred between:

a) Register to register
b) Memory to register
c) I/O to accumulator
d) Load a 8-bit number to register
e) Load a 16-bit number to a register-pair

Example:

MOV A, B. This means that the content of register B is going to the contents of register A. Clearly,
this has register addressing mode.

2. Arithmetic Group:

All arithmetic operations are performed on the data by this group. It is implicitly assumed that
the contents of the accumulator (it is a specific purpose register) are one of the operands.

The results of the operations are stored in the accumulator thus the previous contents are
altered.

Example:
ADD B says that add the value inside register B to the existing value in the accumulator.

3. Logical Group :

This group's instruction set performs AND, OR, EXOR operations on data in registers and
memory, as well as compare, rotate, and take the complement of data.

One of the operands in the logical instruction must be the accumulator.

It has the capability to turn individual bits in the accumulator ON or OFF using the logical AND,
OR, and Exclusive OR commands.

A flag is a Specific Purpose register that shows the status of the operation. It gets affected
whenever a logical operation is done. However, a logical NOT does not affect it.

Example:

ANA C says that do the and operation with the accumulator and the register C and store it in the
accumulator.

4. Branch Group :

These are the most powerful instructions as they have the capability to change the sequence of a
program conditionally or unconditionally. This means that they can check certain conditions and
take appropriate actions for the right scenarios.

They are classified into 3 categories :

a. JUMP instructions
b. CALL
c. RETURN instructions
JUMP: It transfers the program sequence to a specific address. If it is unconditional jump(JMP) it
jumps to the described address in the operand whereas if it is a conditional jump it jumps to the
described address only if the condition is satisfied.

CALL: It is used to call a subroutine in the main function. When call is used the address of the next
instruction is passed onto the stack before the program sequence is transferred to the subroutine or
the specified address. This instruction too can be conditional and unconditional.

RETURN: It returns the program sequence from the subroutine to the calling program. When return
instruction is executed, the previously stored address in the stack during call is retrieved and the
sequence of execution in the calling program is resumed.

5. Stack, I/O, and Machine Control Group

The stack in an 8085 microprocessor is a collection of memory regions in the R/W memory that
is used to store binary data temporarily during program execution.

PUSH, POP, SPHL, and XHTL are examples of stack group instructions.

I/O group examples include IN and OUT.

Machine control groups include NOP, EI, D, SIM, RIM, and HLT.