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Unified SVPWM Strategy For Post-Fault Three-Level NPC Voltage Source Inverters
Unified SVPWM Strategy For Post-Fault Three-Level NPC Voltage Source Inverters
Abstract— Eight switch three-phase inverters (ESTPIs) P Fa1 Fb1 Fc1 P Fb1 Fc1
are the reconfigured topologies of the three-level neutral- Ta1 Tb1 Tc1 Tb1 Tc1
udc/2 C1
point-clamped (NPC) inverter with a failure leg. This failure C1 udc/2
Ta2 Tb2 Tc2 Tb2 Tc2
leads to different topologies of ESTPIs, which can be Ta a
controlled by different space vector pulse width modulation Tb a
Tc b b
(SVPWM) strategies. By analyzing the relationship of three O c
O c Tb3
SVPWM strategies for different ESTPIs, a unified coordinate Ta3 Tb3 Tc3 Tc3
udc/2
transformation is proposed, which can make one of the three C2
udc/2 Ta4 Tb4 Tc4 C2 Tb4 Tc4
SVPWM strategies be a unified control strategy of ESTPIs.
And the unified coordinate transformation is suited for two Fa2 Fb2 Fc2 Fb2 Fc2
N N
different SVPWM strategies for ESTPIs. Consequently, the
unified strategy not only simplifies the control strategy, but RL load RL load
also makes the fault tolerant control strategy more flexible.
Simulation and hardware-in-the-loop (HIL) test results have
(a) (b)
shown the validity and feasibility of the proposed unified
P P
SVPWM strategies. Ta1 Tc1 Ta1 Tb1
udc /2 udc /2
Ta2 Tc2 Ta2 Tb2
Index Terms--Eight-switch three-phase inverters C1 C1
(ESTPIs) fault tolerant control, unified coordinate b n c n
transformation, unified space vector pulse width modulation a a
O c O b
strategy Ta3 Tc3 RL load
Ta3 Tb3 RL load
udc /2 udc /2
C2 Ta4 Tc4 C2 Ta4 Tb4
I. INTRODUCTION N N
(c) (d)
The three-phase three-level neutral-point-clamped (3L-
Fig. 1 Three different topologies of ESTPIs: (a)Fault-tolerant
NPC) inverters are widely used in medium-voltage and three-level NPC inverter topology, (b)Topology of ESTPI-a,
high-power fields, due to its main advantages related to (c)Topology of ESTPI-b, (d)Topology of ESTPI-c
low harmonic, low switching loss, and low voltage stress
[1]. However, the multiplied number of the power Over the past several years, much attention has been
switching devices leads to the reduced reliability of the 3L- directed to the control strategies of the ESTPIs. In [6]-[8],
NPC inverters[2]. Hence, active online monitoring, fault- the SVPWM strategy, carrier-based pulse width
diagnosis and fault-tolerant control strategies are adopted modulation (CBPWM) strategy and the relationship
to improve reliability[3]. Furthermore, the fault-tolerant between the two different modulation strategies for
technology is an appropriate approach of the numerous ESTPIs have been elaborated in detail. In order to balance
solutions to enhance the reliability of 3L-NPC inverters. the output voltage and reduce the common-mode voltage
Consequently, eight-switch three-phase inverters of ESTPIs, several improved methods also have been
(ESTPIs), as the post-fault reconfigured topologies for 3L- proposed in [9]-[10]. However, different faulty legs lead to
NPC inverters with the failure of a leg, have been widely different topologies of ESTPIs, as shown in Fig. 1, which
studied in recent years[4]. As shown in Fig. 1(a), When the are controlled by different space vector pulse width
leg a has broken, the fuses Fa1 and Fa2 work to isolate the modulation (SVPWM). Therefore, three SVPWM
leg a. Then the bidirectional thyristor Ta1 turns on, and the strategies need to be prepared for three ESTPIs, which
load of phase a connects to the neutral point[4]. Finally, takes up lots of memory space in the controller and
the topology is reconstructed to ESTPI-a. Similarly, the increases the complexity of the control strategy. So far few
ESTPI-b and ESTPI-c can be obtained when the fault of literatures about elaborating the control strategy of the
leg b or leg c occurs, as shown as Fig. 1(b)-(d). different ESTPIs have been reported. But similar problems
have been encountered in four-switch three-phase
OO(u0) 0 0 0
II. TECHNICAL WORK PREPARATION NN(u1) /3 e /
/3 e /
/3
A. Working principle of ESTPIs ON(u2) e /
/3 e /
/3 e /
/3
/
The topologies of the ESTPIs are shown in Fig. 1, which PO(u3) e /3 /3 /3
are named ESTPI-a, ESTPI-b and ESTPI-c, respectively. PP(u4) − /3 e /
/3 e /
/3
Each leg has three switching states, presented as 1(P), OP(u5) e /
/3 e /
/3 e /
/3
0(O), -1(N), and the ideal switching function Sx is defined NO(u6) e /
/3 − /3 − /3
as follow. PN(u7) e /
/√3 e /
/√3 e /
/√3
NP(u8) / / /
e /√3 e /√3 e /√3
1, Tx1 , Tx 2 on, Tx3 , Tx 4 off
S x = 0, Tx 2 , Tx 3 on, Tx1 , Tx 4 off (1)
B. Working principle of SVPWM-I
−1, T , T on, T , T off
x3 x4 x1 x2 In any sector of the SVPWM-I method, the uref should
Assuming that udc is costant, uc1=uc2=udc/2. The pole be synthesized by two basic vectors and a zero vector[6],
voltage uxo (x=a, b, c) for the isolated leg is always zero, as shown in Fig. 2.
while the pole voltage uxo of two normal legs are described
TABLE II
THE DURATION TIME OF VECTORS FOR SVPWM-I
Sectors T1 T2
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Then based on the volt-second balancing principle, the where n is the sector number.
duration time of two adjacent vectors and the zero vector, β β
β
which are represented by T1, T2, and T0, are calculated. u3 u2 u1 u2 u5 u4
Taking sector I for example, the duration time of the three Ⅱ uref Ⅱ uref Ⅱ uref
u4 Ⅲ Ⅰ u1 u6 Ⅲ Ⅰ u3 u6 Ⅲ Ⅰ u3
vectors are calculated by (4). Similarly, the duration time Ⅳ α Ⅳ α Ⅳ α
Ⅵ Ⅵ Ⅵ
of the other vectors in other sectors can be obtained, as Ⅴ Ⅴ Ⅴ
u5 u6 u5 u4 u1 u2
shown in Table II.
(a) (b) (c)
uref ⋅ Ts = u1 ⋅ T1 + u2 ⋅ T2 Fig. 3 Three different voltage distribution of ESTPIs: (a)SVPWM-II
(4) for ESTPI-a, (b)SVPWM-II for ESTPI-b, (c)SVPWM-II for ESTPI-c
T0 = Ts − T1 − T2
where Ts is sample time. The principles of minimum switching losses and
harmonic components are adopted to the SVPWM-II. The
β u β
7 β switching sequences are displayed in Table IV.
u3 u2 u1 uref u2 u8 u5 u4
ⅢⅡ uref u7 TABLE IV
Ⅲ Ⅱ Ⅲ Ⅱ uref
u4 Ⅳ Ⅰ u1 u6 Ⅳ u3 THE SWITCHING SEQUENCES OF SVPWM-II
Ⅰ u6 Ⅳ Ⅰ u3
Ⅴ α Ⅷ
Ⅴ Ⅷ α Ⅵ
Ⅷ Ⅴ α Sectors ESTPI-a ESTPI-b ESTPI-c
ⅥⅦ Ⅶ Ⅶ
Ⅵ u7
u5 u6 u8 u5 u4 u1 u2 1 u1-u2-u0-u2-u1 u2-u0-u3-u0-u2 u4-u0-u3-u0-u4
u8
2 u2-u0-u3-u0-u2 u1-u2-u0-u2-u1 u0-u5-u4-u5-u0
(a) (b) (c)
Fig. 2 Three different voltage distribution of ESTPIs: (a)SVPWM-I 3 u4-u0-u3-u0-u4 u1-u6-u0-u6-u1 u6-u0-u5-u0-u6
for ESTPI-a, (b)SVPWM-I for ESTPI-b, (c)SVPWM-I for ESTPI-c
4 u0-u5-u4-u5-u0 u6-u0-u5-u0-u6 u1-u6-u0-u6-u1
According to the principles of minimum switching
5 u6-u0-u5-u0-u6 u0-u5-u4-u5-u0 u1-u2-u0-u2-u1
losses and harmonic components, the switching sequences
are illustrated in Table III. 6 u1-u6-u0-u6-u1 u4-u0-u3-u0-u4 u2-u0-u3-u0-u2
TABLE III
THE SWITCHING SEQUENCES OF SVPWM-I Combined with the duration time and switching
Sectors ESTPI-a ESTPI-b ESTPI-c sequence of the voltage vectors, the time sequencing of
1 u1-u2-u0-u2-u1 u7-u3-u0-u3-u7 u4-u3-u0-u3-u4 power switches in each sector can be acquired, which are
2 u7-u2-u0-u2-u7 u7-u2-u0-u2-u7 u4-u5-u0-u5-u4 mentioned in [13].
3 u7-u3-u0-u3-u7 u1-u2-u0-u2-u1 u8-u5-u0-u5-u8
4 u4-u3-u0-u3-u4 u1-u6-u0-u6-u1 u8-u6-u0-u6-u8 D. Coordinate transformation and unified SVPWM
strategies
5 u4-u5-u0-u5-u4 u8-u6-u0-u6-u8 u1-u6-u0-u6-u1
It is easily found that the both SVPWM-1 and SVPWM-
6 u8-u5-u0-u5-u8 u8-u5-u0-u5-u8 u1-u2-u0-u2-u1
II of three ESTPIs are different in duration time of vectors
7 u8-u6-u0-u6-u8 u4-u5-u0-u5-u4 u7-u2-u0-u2-u7 and the switching sequences. Taking SVPWM-II for
8 u1-u6-u0-u6-u1 u4-u3-u0-u3-u4 u7-u3-u0-u3-u7 example, the T1, T2, T0 of the same sectors in three ESTPIs
are equivalent, but the corresponding voltage vector
distributions are different so that the switching sequences
C. Working principle of SVPWM-II
are inequivalent. Vice versa, if the sectors are divided
Three basic vectors distribution and the sector division
according to the voltage vector distributions as shown in
of ESTPIs for the SVPWM-II are shown in the Fig. 3.
Fig. 4, the switching sequences would be same, but the
Compared to the SVPWM-I, each sector of the SVPWM-
duration time of corresponding voltage vectors are
II consists of a zero vector and two small vectors, whose
different. In other words, it is difficult to find a regular
amplitude is udc/3. The duration time of the two adjacent
pattern to unify the three SVPWM strategies in a simple
vectors and the zero vector, which are also represented by
way. Inspired from the idea of the unified SVPWM
T1, T2, and T0, can be calculated by (5).
strategy of FSTPIs[11], three different two-phase
T1 = 2 3 uref Ts sin(nπ / 3 − θ ) / udc coordinates are proposed to make the three SVPWM
strategies be equivalent to each other, named α’β’-
T2 = 2 3 uref Ts sin(θ − (n − 1)π / 3) / udc (5) coordinates, as shown in Fig. 4.
T0 = Ts − T1 − T2
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(a) (b) (c)
Fig. 4: Three imaginary α’β’-coordinates of three ESTPIs:
(a)SVPWM-II of ESTPI-a, (b)SVPWM-II of ESTPI-b,
(c)SVPWM-II of ESTPI-c
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ESTPI-a ib ic ia ib ic ia
uab ESTPI-a ESTPI-a
uab,ubc,uca(300V/div)
ia,ib,ic(3A/div)
ia,ib,ic(3A/div)
ubc
uca
ia,ib,ic(3A/div)
ia,ib,ic(3A/div)
ubc
uca
ESTPI-c uab ia ib ic ib ic ia
ESTPI-c ESTPI-c
uab,ubc,uca(300V/div)
ia,ib,ic(3A/div)
ia,ib,ic(3A/div)
ubc
uca
ia,ib,ic(3A/div)
ia,ib,ic(3A/div)
ubc
uca
ESTPI-b uab
uab,ubc,uca(300V/div)
ESTPI-b ia ic ib ESTPI-b ia ib ic
ia,ib,ic(3A/div)
ia,ib,ic(3A/div)
ubc
uca
ia,ib,ic(3A/div)
ia,ib,ic(3A/div)
ubc
uca
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The output voltage of ESTPIs are shown in the Fig. ACKNOWLEDGMENT
8(a), and Fig. 8(b)-(c) comparatively show the output This work was supported by the Research Fund for the
current of ESTPIs under different test cases. One is National Science Foundation of China (51677156,
controlled by the ESTPI-a’s SVPWM-I strategy, while the 61733015).
other is controlled by the unified SVPWM-I strategy. The
simulation results in Fig. 8(b) show that the current phase
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strategies of ESTPI-a can be used as the unified SVPWM
strategies to control the three ESTPIs. And with the help
of the unified coordinate transformations, the unified
strategies can be easily obtained. Accordingly, the unified
strategies not only simplify the control strategy, but also
make the fault tolerant control strategy more flexible. No
matter which leg occurs a fault, the unified SVPWM
strategies are available. The HIL test results have verified
the effectiveness of the proposed unified SVPWM
strategy.
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