CONFIDENTIAL

HERITAGE INSTITUTE OF TECHNOLOGY

B.Tech. 3rd Semester Class Test Examination 2021 Session: 2021-22
Discipline:CSE Paper Name:Digital Logic
Paper Code:ECEN2104
Time Allotted: 1 hr Full Marks: 30

Figures out of the right margin indicate full marks.

Answer all the questions
Candidates are required to give answer in their own words as far as practicable.

1(a) How to realize a full adder using 3:8 decoder? CO1 [Analyze/IOCQ] 5+5
=10
(b) Explain with circuit diagrams the difference between 2:4 CO1 [Remember/LOCQ]
decoder and 1:4 demultiplexer.
2(a) Draw the circuit diagram of half adder using NAND gates CO1 [Remember/LOCQ] 2+2+
only. 6=
(b) Convert the given binary number into gray code CO1 [Understand/LOCQ] 10
10111011
(c) Prepare K-map for the given function CO1 [Evaluate/HOCQ]
F=ABC+A’BC+B’C’
3(a) CO2 [Evaluate/HOCQ] 3+4+
3=
10

Draw the uncomplemented output of J-K flip flop from

the given information.
(b) Realize asynchronous MOD-5 counter. CO2 [Analyze/IOCQ]

(c) State difference between level triggering and edge triggering. CO2 [Understand/LOCQ]
Mention which one is suitable for error free operation.

Cognition Level LOCQ IOCQ HOCQ

Percentage distribution 30% 43.33% 26.67%

Course Outcome:

After the completion of the course students will be able to

1. Students will learn Binary Number system, and logic design using combinational gates.
2. Students will design applications of Sequential Circuits.
3. Students will design Finite State Machines.
4. Students will learn Memory classifications.
5. Students will learn basics of CMOS logic.
6. Students will be prepared to learn various digital component design as used in VLSI applications.
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*LOCQ: Lower Order Cognitive Question; IOCQ: Intermediate Order Cognitive Question; HOCQ: Higher Order Cognitive Question