MOSFET

MetalOxideSemiconductorFieldEffectTransistor

OptiMOSTM
OptiMOSª5Power-Transistor,80V
IPP023N08N5

DataSheet
Rev.2.0
Final

PowerManagement&Multimarket
 OptiMOSª5Power-Transistor,80V

IPP023N08N5

1Description TO-220-3

Features tab
•Idealforhighfrequencyswitchingandsync.rec.
•ExcellentgatechargexRDS(on)product(FOM)
•Verylowon-resistanceRDS(on)
•N-channel,normallevel
•100%avalanchetested
•Pb-freeplating;RoHScompliant
•QualifiedaccordingtoJEDEC1)fortargetapplications
•Halogen-freeaccordingtoIEC61249-2-21

Table1KeyPerformanceParameters Drain
Pin 2, Tab
Parameter Value Unit
VDS 80 V Gate
Pin 1
RDS(on),max 2.3 mΩ
Source
ID 120 A Pin 3

Qoss 156 nC
QG(0V..10V) 133 nC

Type/OrderingCode Package Marking RelatedLinks

IPP023N08N5 PG-TO220-3 023N08N5 -

1)
J-STD20 and JESD22
Final Data Sheet 2 Rev.2.0,2014-12-17
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IPP023N08N5

TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Final Data Sheet 3 Rev.2.0,2014-12-17

 OptiMOSª5Power-Transistor,80V

IPP023N08N5

2Maximumratings
atTj=25°C,unlessotherwisespecified

Table2Maximumratings
Values
Parameter Symbol Unit Note/TestCondition
Min. Typ. Max.
- - 120 TC=25°C1)
Continuous drain current ID A
- - 120 TC=100°C
Pulsed drain current1) ID,pulse - - 480 A TC=25°C
Avalanche energy, single pulse 2)
EAS - - 674 mJ ID=100A,RGS=25Ω
Gate source voltage VGS -20 - 20 V -
Power dissipation Ptot - - 300 W TC=25°C
IEC climatic category;
Operating and storage temperature Tj,Tstg -55 - 175 °C
DIN IEC 68-1: 55/175/56

3Thermalcharacteristics

Table3Thermalcharacteristics
Values
Parameter Symbol Unit Note/TestCondition
Min. Typ. Max.
Thermal resistance, junction - case RthJC - 0.4 0.5 K/W -
Thermal resistance, junction - ambient,
RthJA - - 62 K/W -
minimal footprint
Thermal resistance, junction - ambient,
RthJA - - 40 K/W -
6 cm2 cooling area3)
Soldering temperature, wave and
Tsold - - 260 °C reflow MSL1
reflow soldering are allowed

1)
See figure 3 for more detailed information
2)
See figure 13 for more detailed information
3)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection.
PCB is vertical in still air.
Final Data Sheet 4 Rev.2.0,2014-12-17
 OptiMOSª5Power-Transistor,80V

IPP023N08N5

4Electricalcharacteristics

Table4Staticcharacteristics
Values
Parameter Symbol Unit Note/TestCondition
Min. Typ. Max.
Drain-source breakdown voltage V(BR)DSS 80 - - V VGS=0V,ID=1mA
Gate threshold voltage VGS(th) 2.2 3.0 3.8 V VDS=VGS,ID=208µA
- 0.1 1 VDS=80V,VGS=0V,Tj=25°C
Zero gate voltage drain current IDSS µA
- 10 100 VDS=80V,VGS=0V,Tj=125°C
Gate-source leakage current IGSS - 1 100 nA VGS=20V,VDS=0V
- 2.0 2.3 VGS=10V,ID=100A
Drain-source on-state resistance RDS(on) mΩ
- 2.4 2.8 VGS=6V,ID=50A
Gate resistance1) RG - 1.2 1.8 Ω -
Transconductance gfs 100 200 - S |VDS|>2|ID|RDS(on)max,ID=100A

Table5Dynamiccharacteristics1)
Values
Parameter Symbol Unit Note/TestCondition
Min. Typ. Max.
Input capacitance Ciss - 9300 12100 pF VGS=0V,VDS=40V,f=1MHz
Output capacitance Coss - 1500 1950 pF VGS=0V,VDS=40V,f=1MHz
Reverse transfer capacitance Crss - 65 114 pF VGS=0V,VDS=40V,f=1MHz
VDD=40V,VGS=10V,ID=100A,
Turn-on delay time td(on) - 28 - ns
RG,ext=1.6Ω
VDD=40V,VGS=10V,ID=100A,
Rise time tr - 16 - ns
RG,ext=1.6Ω
VDD=40V,VGS=10V,ID=100A,
Turn-off delay time td(off) - 62 - ns
RG,ext=1.6Ω
VDD=40V,VGS=10V,ID=100A,
Fall time tf - 20 - ns
RG,ext=1.6Ω

Table6Gatechargecharacteristics2)
Values
Parameter Symbol Unit Note/TestCondition
Min. Typ. Max.
Gate to source charge Qgs - 43 - nC VDD=40V,ID=100A,VGS=0to10V
Gate to drain charge 1)
Qgd - 28 42 nC VDD=40V,ID=100A,VGS=0to10V
Switching charge Qsw - 45 - nC VDD=40V,ID=100A,VGS=0to10V
Gate charge total 1)
Qg - 133 166 nC VDD=40V,ID=100A,VGS=0to10V
Gate plateau voltage Vplateau - 4.6 - V VDD=40V,ID=100A,VGS=0to10V
Gate charge total, sync. FET Qg(sync) - 115 - nC VDS=0.1V,VGS=0to10V
Output charge 1)
Qoss - 156 207 nC VDD=40V,VGS=0V

1)
Defined by design. Not subject to production test.
2)
See ″Gate charge waveforms″ for parameter definition
Final Data Sheet 5 Rev.2.0,2014-12-17
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IPP023N08N5

Table7Reversediode
Values
Parameter Symbol Unit Note/TestCondition
Min. Typ. Max.
Diode continous forward current IS - - 120 A TC=25°C
Diode pulse current IS,pulse - - 480 A TC=25°C
Diode forward voltage VSD - 0.9 1.2 V VGS=0V,IF=100A,Tj=25°C
Reverse recovery time 1)
trr - 85 170 ns VR=40V,IF=IS,diF/dt=100A/µs
Reverse recovery charge 1)
Qrr - 202 404 nC VR=40V,IF=IS,diF/dt=100A/µs

1)
Defined by design. Not subject to production test.
Final Data Sheet 6 Rev.2.0,2014-12-17
 OptiMOSª5Power-Transistor,80V

IPP023N08N5

5Electricalcharacteristicsdiagrams

Diagram1:Powerdissipation Diagram2:Draincurrent
350 140

300 120

250 100

200 80
Ptot[W]

150 ID[A] 60

100 40

50 20

0 0
0 50 100 150 200 0 50 100 150 200
TC[°C] TC[°C]
Ptot=f(TC) ID=f(TC);VGS≥10V

Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance
3
10 100
1 µs

10 µs

102 100 µs
0.5
1 ms
ZthJC[K/W]

10 ms 0.2
ID[A]

101 10-1
DC 0.1

0.05
0.02
100
0.01
single pulse

10-1 10-2
10-1 100 101 102 10-5 10-4 10-3 10-2 10-1 100
VDS[V] tp[s]
ID=f(VDS);TC=25°C;D=0;parameter:tp ZthJC=f(tp);parameter:D=tp/T

Final Data Sheet 7 Rev.2.0,2014-12-17

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IPP023N08N5

Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance
480 4
7V 6V 5V 5.5 V 6V
440 10 V

400

360 3

320 5.5 V

280 7V

RDS(on)[mΩ]
ID[A]

240 2 10 V

200
5V
160

120 1

80

40

0 0
0 1 2 3 4 5 0 50 100 150 200 250 300 350 400 450 500
VDS[V] ID[A]
ID=f(VDS);Tj=25°C;parameter:VGS RDS(on)=f(ID);Tj=25°C;parameter:VGS

Diagram7:Typ.transfercharacteristics Diagram8:Typ.forwardtransconductance
400 250

350

200
300

250
150
gfs[S]
ID[A]

200

100
150

100
175 °C 25 °C
50

50

0 0
0 2 4 6 8 0 40 80 120 160
VGS[V] ID[A]
ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj gfs=f(ID);Tj=25°C

Final Data Sheet 8 Rev.2.0,2014-12-17

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IPP023N08N5

Diagram9:Drain-sourceon-stateresistance Diagram10:Typ.gatethresholdvoltage
5 4.0

3.5

4
3.0 2080 µA

208 µA
2.5
3
RDS(on)[mΩ]

max

VGS(th)[V]
2.0
typ
2
1.5

1.0
1

0.5

0 0.0
-60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180
Tj[°C] Tj[°C]
RDS(on)=f(Tj);ID=100A;VGS=10V VGS(th)=f(Tj);VGS=VDS;parameter:ID

Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode
5
10 103
25 °C
175 °C
25 °C, max
175 °C, max
Ciss
104

Coss 102
C[pF]

IF[A]

103

Crss 101

102

101 100
0 20 40 60 80 0.0 0.5 1.0 1.5 2.0 2.5
VDS[V] VSD[V]
C=f(VDS);VGS=0V;f=1MHz IF=f(VSD);parameter:Tj

Final Data Sheet 9 Rev.2.0,2014-12-17

 OptiMOSª5Power-Transistor,80V

IPP023N08N5

Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge
103 10

40 V
8

25 °C
102
6
100 °C

VGS[V]
IAV[A]

20 V 60 V

4
150 °C
1
10

100 0
100 101 102 103 0 50 100 150
tAV[µs] Qgate[nC]
IAS=f(tAV);RGS=25Ω;parameter:Tj(start) VGS=f(Qgate);ID=100Apulsed;parameter:VDD

Diagram15:Drain-sourcebreakdownvoltage Gate charge waveforms

90

85
VBR(DSS)[V]

80

75

70
-60 -20 20 60 100 140 180
Tj[°C]
VBR(DSS)=f(Tj);ID=1mA

Final Data Sheet 10 Rev.2.0,2014-12-17

 OptiMOSª5Power-Transistor,80V

IPP023N08N5

6PackageOutlines

Figure1OutlinePG-TO220-3,dimensionsinmm/inches

Final Data Sheet 11 Rev.2.0,2014-12-17

 OptiMOSª5Power-Transistor,80V

IPP023N08N5

RevisionHistory
IPP023N08N5

Revision:2014-12-17,Rev.2.0
Previous Revision
Revision Date Subjects (major changes since last revision)
2.0 2014-12-17 Release of final version

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InfineonTechnologiesAG
81726München,Germany
©2014InfineonTechnologiesAG
AllRightsReserved.

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Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics.With
respecttoanyexamplesorhintsgivenherein,anytypicalvaluesstatedhereinand/oranyinformationregardingtheapplication
ofthedevice,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithout
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Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon
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Warnings
Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion,
pleasecontactthenearestInfineonTechnologiesOffice.
TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or
automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa
failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand
aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare
intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis
reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered.

Final Data Sheet 12 Rev.2.0,2014-12-17