Oxidation growth
TCA (trichloroethane) – less corrosive,
Diffusion – the movement of one material
through another
- Atoms diffuse from regions of high
concentration to regions of low concentration
for solid, liquid, or gas states
- accelerated by temperature
- (in this process), occurs during oxidation
process
Liquid state diffusion
Fick’s Law – describes the rate of movement of
diffusing materials based on temperature,
concentration, and the energy necessary to
drive diffusion.
Oxide-Si Interface
• There is an abrupt transition at the
oxide-Si interface b/w single crystal Si
to amorphous SiO2.
• SiO2 molecule: each Si is bonded to
four O atoms & each O atom is bonded
to two Si atoms
Uses of chlorinated agents in oxidation
Cl-containing gas:
- to neutralize the charge accumulation at the
interface
- Cl ions diffuse to the postively charged layer
(to form neutral layer)
- Cl is kept below 3% (>3% causes instability)
- Tend to increase the oxide growth rate by 10-
15%
- Can immobilize (getter) MICs
Chlorine compound used:
1. HCl- extremely toxic & corrosive
2. DCE (dichloroethylene) – common Cl
compound
3. TCE (trichloroethylene) - less corrosive,
carcinogenic & not used anymore
4.
fallen out of favor because it is ozone-
depleting chemical
Rate of oxide growth
• Describes how fast the oxide grows on
the wafer
• Depends on parameters: temperature,
pressure, oxidizing condition (dry or
wet), Si crystal orientation, doping
levels
• Reduces the thermal budget
• Wide range of thickness (300-20,000 A)
• 2 growth stages: linear stage, parabolic
stage
Linear stage
• Initial growth of silica
• Consumes Si (wafer surface) as a linear
function of time
• Oxide layer is growing into the wafer at
a linear rate over time
• Valid up to about 150A of oxide
thickness
Parabolic stage growth
• Starts after about 150A of oxide
thickness
• This stage is slower than the linear
stage
• Diffusion controlled process
Factors affecting oxide growth
• Dopant effects
-heavily doped Si oxidizes at a faster
rate than lightly doped material
- In parabolic, B doping will oxidize
faster than P.
• Crystal orientation
- Linear is dependent on the
orientation of the crystal (e.g. ρ of
atoms on the (111) plane > (100)
plane; therefore, (111) Si crystal
will oxidize in the linear stage at a
faster rate than (100))
 - During parabolic, the parabolic rate
constant, B is independent of the
crystal orientation
• Pressure effect
- Growth rate will increase with
pressure (oxide layer depends on
the movement of the oxidizer)
- Higher pressure increases the linear
and parabolic rate constants
(forcing the oxygen atoms to
penetrate through the growing
oxide more rapidly)
• Plasma enhancement
- Increases the oxide growth rate at a
low temperature (reducing the
thermal budget)
- Carried out in an oxygen-plasma
discharge generated by an RF
source
- The Si is biased and collects the
charged oxygen in the plasma on
the wafer
- Results in rapid oxidation and
allows oxides to be grown at a temp
< 600oC
Drawbacks: particle generation, higher
film stress, inferior film quality
Furnace Equipment
• Horizontal Furnace
- The workhorse in thermal
processing (oldest)
- Its name derives from the
horizontal position of the quartz
tube where wafers are located and
heated
- Hot wall furnace
• Vertical Furnace
- Replaced horizontal furnace in the
early 1990s
- Easier to automate, improves
operator safely, and reduces
particulate contamination
- Also known as vertical diffusion
furnace (VDF)
- Better temp. control and uniformity
- Hot wall furnace
• Rapid Thermal Processor (RTP)
- Small, fast-heating system that
processes a single wafer at a time
with a radiant heat source and
cooling source
- Also known as rapid thermal anneal
(RTA)
- Cold wall furnace (heats only the
wafer)
METALLIZATION
• The process of depositing metal film
over a dielectric film and later
patterning it to form the
interconnecting metal lines and plugs of
ICs
• Deposition of a thin film of conductive
metal onto a wafer by use of chemical
or physical process
• Metal lines conduct the signal through
the IC circuit while dielectric layers
ensure signals are not influenced by
adjacent lines
• Important terms: interconnect, contact,
vias, plug
Interconnect – describes the conductor
materials that create the metal wiring that
carries electrical signals to different parts of the
chip
- a general term for the wiring between devices
on a die and the overall package
Contact – the electrical connection at the Si
surface between the devices in the Si wafer and
the first metal layer
Vias – openings that pass through the various
dielectric layers to form an electric pathway
from one metal layer to the adjacent metal
layer
Plug – a metal fills the vias to form the electrical
connection (interconnect) between the 2 metal
layers
REQUIREMENTS:
• Conductivity: highly conductive,
capable of handling high current
densities
• Adhesion: ability to adhere to the
underlying substrate, easily connect to
external connections
• Deposition: readily deposited with a
uniform structure & composition by
low-temp. process
• Patterning/planarization: high-
resolution patterning without etching
the underlying dielectric
• Reliability: metal is soft & ductile to
withstand temp. variations during
processing & service
• Corrosion: high resistance to corrosion
• Stress: resistance to mech’l stress to
reduce wafer distortion mat’l failures
METALS AND ALLOYS USED IN WAFER
FABRICATION
• Aluminum
• Aluminum-copper alloys
• Copper
• Barrier metals
• Silicides
• Metal plugs
Aluminum – the earliest interconnect metals
- the most common interconnect metal wafer
Selection of Al
• one of the thickest films deposited
on the wafer (1st metal layer: 5,000
A, upper noncritical layer: 20,000 A)
• has higher resistivity than Cu, Au,
and Ag (2.65 uΩ-cm at 20oC)
• Ag and Au are both prone to
corrosion and high diffusivity of Si
and silica
• Ag and Au are much more
expensive and do not adhere well
to the oxide films
• Al reacts readily with silica when
heated to form an alumina layer
• Al is easily deposited on the wafer
and etches on solution that do not
attack underlying films
• Al is compatible with the major
processes in Si IC fab, inexpensive
Ohmic contact (of Al)
• to form an ohmic contact b/w Al
and Si: heat the surface in an inert
gas or H2 at 450-500oC (the thermal
bake process is known as sinter or
anneal)
• undesirable interconnection is
called spiking
• junction spiking occurs when the
interface of pure Al and Si is heated,
causing the diffusion of Si into the
Al (amount of about 0.5% and
leaves behind voids)
Problems with spiking: addition of Si to the Al
Al-Cu ALLOYS
electromigration - another undesirable
interconnection
- a reliability problem which is a movement of
Al atoms in the conductor due to momentum
transfer from the electron carrying the current
- under high-current conditions, electrons
collide with Al atoms causing the atoms to
gradually move
- can be controlled by alloying Al with 0.5-4% Cu
Hillocks – another undesirable interconnection
- accumulation of metal atoms, atoms pile up
- protrusions on the surface of metal films due
to electromigration.
The Limitations of using Al-Cu alloy as
interconnect:
1. Cu is difficult to etch
2. Residual Cu remaining after etching the
Al alloy can promote corrosion
3. Possible to have electromigration in
contacts and vias
Copper – will replace Al in metallization
Cu Challenges:
• Cu diffuses quickly into oxides & Si
• Cu cannot be easily patterned using
regular plasma etching techniques
• Cu oxidizes quickly in air at low temp.
(<200oC) & does not form a protective
layer to stop further oxidation
Solution: converting the traditional
interconnect flow to dual damascene flow
Barrier metals – a thin layer of deposited metal
or metals that is designed to prevent
intermixing of the materials above and below
the barrier
- Thickness: 100 mm for feature size (0.25-um);
400 – 600 nm (0.35 um); 23 nm or less for 0.18
um
- prevents the Si and W from coming into
contact with each other.
Barrier metals – a class of high melting point
known as refractory metals
- common refractory metals: Ti, W, Ta,
Mo, Co, and Pt
Why Ti? Improved adhesion, reduced contact
resistance, reduced stress, and controlled
electromigration
- TiW and TiN are common barrier
metal layers that inhibit diffusion between Si
substrate and Al
For Cu interconnect: Ta, TaN, and TaSiN are
candidate materials for barrier metals
- Diffusion material must be about 75 Å
thick
- can be deposited using HDPCVD
Silicides – formed when refractory metals react
with Si when alloyed together
- a metal compound that is thermally
stable and provides for low electrical resistivity
at the Si/refractory metal interface
 - Co and Ti are common refractory
metals
- If the refractory metal is reacted with
polySi, it is called polycide
- Forms extremely good contact to the Si
- Serves as critical adhesion layer
between contact metal and the Si
junction regions
Metal Plugs
- vias filled with plugs to form electrical
pathways between 2 metal layers
- It is used to connect the Si devices in
the wafer to the 1st level of
metallization
- The most common plug is W (known as
W plugs)
Why W?
• its ability to uniformly fill the high-
aspect ratio vias when deposited by
CVD
• resistant to electromigration failure
• serves as a barrier to inhibit diffusion
and reaction between Si and the 1st
metal layer
• refractory material
• melting temp of 3417oC
• resistivity of 52.8 uΩ-cm at 20oC
 Al is desirable as plug material because
of its lower resistivity (2.65 uΩ-cm at
20oC) but cannot fill high-aspect ratio
vias
 Al is used as interconnect material & W
is limited to the plug
Lithography
Photolithography - At the center of the
wafer fab process, by how wafers
repeatedly flow into and out of the
photolithography operation in the fab
process
- Produces a three-dimensional pattern
on the surface of the wafer using a
light-sensitive photoresist material and
controlled exposure to light
- Refers to any printing process that
transfers a pattern to a planar surface
- Also known as photo, lithography,
masking, and patterning, printing and
sometimes referred to as optical
photolithography
Microlithography - describes the process
used to pattern the ultraminiature features
necessary for submicron wafer fabrication.
Concepts:
 The most critical step in the IC process
 Requires superior performance to
achieve high yield in other process
areas
 Patterns are semiconductor devices in
the Si wafer, isolation trenches,
contacts, metal interconnects, and vias
 Patterns are transferred into a light-
sensitive photoresist mat’l to prepare
the substrate for etch or implantation
 Patterned photoresist images are 3-
dimensional (width, length, and height)
 Employs a light-sensitive photoresist
(resist), that is applied on the substrate
surface as a polymer solution
 The resist is then baked, which drives
out the solvent
 The resist is exposed to a controlled
light
 The light passes through a reticle that
defines the desired pattern
 Photoresist is a temporary mat’l placed
on the wafer surface to transfer the
pattern and is removed once the
pattern is etched or implanted onto the
wafer surface.
Photoresist or resist
- A temporary material placed on the
wafer surface solely to transfer the
necessary pattern and is removed once
the pattern is etched or implanted onto
the wafer surface material
Components of Conventional Photoresist
Solvent: gives resist its flow characteristics
Resin: mix of polymers used as binder; gives
resist mechanical and chemical properties
Sensitizers: photosensitive component of the
resist material
Additives: chemicals that control specific
aspects of resist material
Photolithography Concepts:
• Patterning process
– Photomask - a mask, a quartz
plate that contains the full die
array needed to define one
process layer for the entire
wafer.
– Reticle - a quartz plate that
contains the pattern to be
reproduced on the wafer, just
as the negative of a camera film
has the pattern for a
photograph. This pattern may
contain a single die or several
die
• Critical dimension generations
- The width and space of critical
(smallest) circuit elements in an
IC
- Also referred to as CD,
minimum geometry, or feature
size
- Used to describe device
technology nodes or generation
Ex: sub-0.25 um nodes are 0.18
um, 0.15 um and 0.1 um
- The ability to reduce the critical
dimension permits more die to
be placed on a single wafer,
lowering fabrication costs and
improving profitability
• Light spectrum and wavelengths
- Energy is required to activate
the photoresist and transfer the
pattern from the reticle
- Deep ultraviolet (DUV)- less than
300nm wavelength) light source is the
source of energy
- The electromagnetic spectrum is used
to introduce the UV light spectrum of
most interest for photolithography
• Resolution
- The ability to differentiate between two
closely spaced features on the wafer
surface
- Actual dimensions of the patterned
images on the wafer are the feature
sizes
Note: features sizes - actual dimensions
of the patterned images on the wafer
- Critical dimension (CD) – minimum
feature size dimensions
• Overlay accuracy
- Precise alignment between the pattern
on the mask and the existing features
on the wafer surface
- Alignment is critical because the mask
pattern must be precisely transferred to
the wafer from layer to layer
Overlay budget – overlay misalignment
Misregistration – caused by poor
alignment between the mask and the
wafer
Runout – a net difference in the
distance from die to die, caused by
temperature variations
• Process latitude
 - Represents the capability of the  The dark portion of the mask is a thin
photolithography process to film of Cr deposited and patterned to
consistency produce products that form the desired mask artwork
meet the specified requirements  The chrome is opaque (does not permit
- Examples of process variables: the passage of the UV light)
equipment setting, types of materials,  The regions underneath the opaque
human performance, machine chrome of the mask are not exposed to
alignment, and the stability of materials light and therefore remain unchanged
over time
- Objective: to achieve the largest
process latitude possible to make the Positive Lithography
process more capable of producing  Regions of the positive resist exposed to
good parts light are removed in a developer
Process latitude means critical solution, whereas resist not exposed to
dimensions can be met within the light underneath the opaque mask
specified limits even with all the process pattern remains on the wafer
variations encountered during  The resist that remains was already
production hardened before light exposure and
remains on the wafer surface to protect
Important Wavelengths for the top layer during processing
Photolithography Exposure
Types of Lithography Mask
UV Wavelength Wavelength
UV Emission Source
(nm) Name
436 g-line Mercury arc lamp Dark-field mask – much of the quartz plate is
405 h-line Mercury arc lamp coated with chrome
365 i-line Mercury arc lamp - used for negative resist
248 Deep UV (DUV)
Mercury arc lamp or - used for source/drain implant, contact etch
Krypton Fluoride (KrF) excimer laser
193 Deep UV (DUV) Argon Fluoride (ArF) excimer laser
157 Vacuum UV (VUV) Fluorine (F2) excimer laser Clear field mask –has very thin patterns of
chrome with large areas of clear quartz
- used for positive resist
Negative Lithography - used for gate etch and metal interconnect
 The resist remains soft and dissolves etch
when exposed to the developer
chemical Photolithography Process
 UV light passes through the clear areas
of the mask and hardens the resist so Types:
that it does not dissolve in the  Negative Resist
developer chemical - Wafer image is opposite of
 The negative resist has a pattern that is mask image
the opposite of the pattern on the mask - Exposed resist hardens and is
 The mask for the photoresist is a insoluble
transparent plate of quartz - Developer removes unexposed
resist
  Positive Resist
- Mask image is same as wafer
image
- Exposed resist softens and is
soluble
- Developer removes exposed
resist
Automated Equipment
 Also known as coater, developer track
system, tracks
 Employs robots, automated material
handling, and computers to perform all
8 steps w/o human intervention
 Improves process controls (by
controlling delays), processes wafers
efficiently, increases flexibility, reduces
contamination due to environmental
control, minimal operator handling,
increases safety due to reduced
operator exposure to chemicals
Prior to Vapor Priming
 Wafer Cleaning
- The 1st step of photolithography
- Contaminants: native oxides, metallic
impurities, particles and organic
contaminants
- Effects of contaminants: poor adhesion
*particulates – uneven resist coating and
pinholes
 Dehydration Bake
- Wafer exposed to moisture is known as
hydrophilic or hydrated.
- Wafer must be hydrophobic for resist
adhesion
- Bake temp: 200-250C, done in an
convection oven with a dry inert gas (ex. N),
or on a hot plate
 For resist adhesion: dry, hydrophobic
(dehydrated) wafer surface
 HOW: to coat the wafer with
photoresist as quickly as possible,
maintain a controlled room humidity
below 50% RH
 Done (usually) before priming and resist
spin coating
 Bake temp: 200 – 250oC
 Done in convection oven with a dry
inert gas (N) or in a vacuum oven, hot
plate (followed by cold plate)
 Integrated into the wafer handling
system
8 Steps of Photolithography
1. Vapor Prime
- The First Step of
Photolithography (to clean and
prepare the surface of the
wafer):
- Promotes Good Photoresist-to-
Wafer Adhesion
- Wafer must be wet cleaned
using DI water
- Dehydration dry bake is done to
remove the moisture
- Primes Wafer with
Hexamethyldisilazane, HMDS
(acts as adhesion promoter)
- Serves as the link b/w Si and
resist (chemically compatible)
- Coating must be done no later
60 min after priming
- Priming Techniques (HMDS may
be applied by):
Puddle Dispense and Spin
• used for single wafer processing
• Consumes a large amount of
HMDS
Spray Dispense and Spin
• Uses nozzle spray to deposit a
fine mist of HMDS on the wafer
surface
 • spray will assist in particle
removal from the wafer surface
• Longer application time and
consumption of HMDS
Vapor Prime and Dehydration Bake
• Dehydration bake and vapor
priming in the vacuum chamber
w/ N gas
• Batch process where wafers are
placed in a quartz plate in the
oven chamber
• Batch process: heated chamber,
filled with HMDS vapor, after
pretreatment (fill with N)
2. Spin Coat
 After the wafer has been cleaned,
dehydrated, baked, and primed,
photoresist is then applied
 Photoresist is done by spin coating
Photoresist:
- An organic compound that experiences
a change in solubility in a developer
sol’n when exposed to UV light
Is applied as a liquid but dried into a
film.
Process Summary:
• Wafer is held onto vacuum chuck
• Dispense ~5ml of photoresist
• Slow spin ~ 500 rpm
• Ramp up to ~ 3000 to 5000 rpm
• Quality measures:
– time
– speed
– thickness
– uniformity
– particles and defects
Progressive Improvements in Photoresist
 Better image definition (resolution).
 Better adhesion to semiconductor
wafer surfaces.
 Better uniformity characteristics.
 Increased process latitude (less
sensitivity to process variations)
Negative VS Positive Photoresist in Spin Coat
Negative resist:
- Negative resist was used since the start
til mid-70s
- Good adhesion
- Good resistance to etching
- Resolution limit (due to swelling and
distortion during develop: about 2 um
Positive resist:
- Desirable in VLSI and ULSI
- Has power adhesion
- Improved resolution is not needed
- Remains the dominant type of resist
Physical Characteristics of Photoresist
• Resolution
- The ability to differentiate b/w 2 or
more closely spaced patterned features
on the wafer surface
- Practical way to interpret: the smallest
feature that can be printed on the
wafer and meets specified quality
requirements
• Contrast
- Represents the sharpness of the
transition from exposure to non-
exposure in photoresist
- Represents the ability of the resist to
become exposed only in those areas
defined by the clear region of the
photomask.
Poor Resist Contrast
- Sloped walls
- Swelling
- Poor contrast
Good Resist Contrast
- Sharp walls
- No swelling
- Good contrast
• Sensitivity
- The minimum amount of light energy
(mJ/cm2) at a certain wavelength that is
needed to produce a good pattern in
the photoresist on the wafer surface
- Exposure dose: the amount of light
energy supplied to a resist
- Important for new resists
• Viscosity
- Represents a quantitative measure of
flow characteristics for the liquid resist
- time-dependent: increases as the
solvent in the resist evaporates during
usage
- As viscosity increases, the resist has less
tendency to flow and its thickness on
the wafer increases
- Provides better step coverage and
better dry etch resistance
- Solid content: represents the amount
of the liquid resist that would remain as
a solid if the solvent were evaporated
- Specific gravity (SG): a measure of the
resist density and is related to the solid
content in the resist
- a higher SG means there are more
solids in the resist (higher viscosity and
lower tendency to flow)
- Viscosity: is measured in poise (or
centipoise: 1/100th of a poise)
• Adhesion
- Describes how strongly the resist sticks
to the substrate
- Resist must adhere to various types of
surfaces: (Si, polySi, silica, SiN, and
different metals)
- Lack of resist adhesion: distorted
patterns on the wafer surface
- Must withstand exposure,
developments, and subsequent
processing
• Etch resistance
- Resist film must maintain its adhesion
- Resist film protects the substrate
surface from the wet and dry etch
processes
- Dry-etch temperatures: > 150oC
- Resist must have thermal stability to
maintain its shape
• Surface tension
- Refers to the molecular
attraction forces in a liquid that
tend to pull surface molecules
toward the body of the liquid
- -must be low enough to provide
for good flow and wafer
coverage during application
• Storage and handling
- Photoresist chemicals are activated in
the presence of energy (light or heat)
- Resists have specific shelf-life and
storage temp environments
- If the solvent was evaporated due to
unsealed environment, viscosity
changes rapidly and solids precipitate
from the liquid
- Resist containers: collapsible pouches
that are opaque and loaded directly
into the wafer tracks to avoid opening
• Contaminants and particles
- Most purity concerns: MICs and
particles
- The resist is applied to the wafer
surface material and can easily
introduce contamination
- To control contamination: must meet
tight filtrations and packaging
procedures
- Control contamination: < 1ppb
3. Soft Bake
 Or also known as pre-bake
 Reasons:
- Drive off the solvent from the coated
resist on the wafer
- Improve the adhesion of the resist so
that it adheres adequately during the
development step
- Relieve stresses in the resist film that
occurred during the spin process
- Prevent resist from getting all over the
equipment (keep the cool clean)
Characteristics of Soft Bake:
After the resist applied to the wafer,
 Improves Photoresist-to-Wafer
Adhesion
 Promotes Resist Uniformity on Wafer
 Improves Linewidth Control During Etch
 Drives Off Most of Solvent in
Photoresist
 Typical Bake Temperatures are 90 to
100°C
- For About 30 Seconds on a Hot
Plate
- Followed by Cooling Step on
Cold Plate
 Typical time: 30 – 60 sec
 If the resist films were not soft baked &
continued to alignment & exposure,
problems are:
1. Resist film would be tacky & susceptible
to particulate contamination
2. Inherent stresses in the resist film from
spin coating would lead to adhesion
problems
3. High solvent levels would cause
inadequate discrimination b/w exposed
& unexposed resist for proper
dissolution during development
4. Outgassing from the resist (from heat
during exposure) could contaminate the
lens of the optical system
Soft Bake Equipment
 Vacuum hot plate by heat conduction –
commonly used
 Infrared (IR) heating
 Microwave heating
 Convection heating
Purpose of Soft Bake:
• Partial evaporation of photoresist
solvents
• Improves adhesion
• Improves uniformity
• Improves etch resistance
• Improves line width control
• Optimizes light absorbance
characteristics of photoresist
4. Alignment and Exposure
 This operation of the wafer stepper
commences once the wafer surface has
been coated with the photoresist and
soft baked
 Resist-coated wafers are automatically
loaded onto a wafer stage in the
stepper
 at this stage, the wafer is raised or
lowered as needed to bring into the
focus range of the stepper optics
 The wafer is aligned to the reticle so
that the pattern can be transferred to
the proper location on the wafer
surface
  Once the best focus and alignment are
obtained, a shutter opens to allow UV
light to pass from the illuminator to the
reticle through a projection lens and
then onto the resist-coated wafer
 The entire focusing, wafer alignment,
and exposure operation is done by the
stepper
 Once a pattern is exposed, the stepper
will step to the next location on the
wafer and repeat the alignment and
exposure (which explains the step-and-
repeat)
 Stepper is attached to an automated
wafer track machine
Optical exposure
- During exposure, light from an illumination
source passes through the aligned reticle
Reticle has opaque and transparent areas that
define a pattern to be transferred to the
photoresist to the wafer surface
GOAL: for the reticle pattern to be accurately
replicated (within specification) in the resulting
image in the resist
Process Summary:
The mask is aligned to the correct location of
the resist-coated Si wafer
Mask and wafer are exposed to UV light to
transfer the mask image to the resist-coated
wafer
• The light activates photo-sensitive
components of photoresist
• Quality measures:
– Line width resolution
– overlay accuracy
– particles and defects
Optical lithography
- Similar to photolithography
Ex: *a camera uses light and lens to transfer an
image of an object to a negative film
* the develop process then transfers the
film’s image to paper from which a picture is
obtained
•in photolithography, photomask and its
pattern are the objects to be photographed
- Optics and a light source are used to
project the image of the pattern of the
mask onto the resist coated wafer
- Once the resist is developed, (just as
the negative film of the camera) the
mask pattern appears in the resist
Exposure sources:
- UV light is used to expose resist (resist
reacts to light at this wavelength)
Types of UV exposure sources:
1. Mercury arc lamp
High – pressure mercury arc lamp
In this type of lamp, electrical current is
passed through a tube of mercury-
xenon gas to create a discharge arc
UV wavelength emissions between
about 240 nm and 500 nm in length
Light intensity - import aspect of the
exposure source
Light intensity
- defined by power per unit area
(mW/cm2) & measured on the surface
of the resist
- the quantity of light per unit area or
brightness
Energy
- The product of power and time
If the light intensity (power per unit
area) is multiplied by the time of
exposure = represents the amount of
exposure energy, or exposure dose
(mJ/cm2)
2. Excimer laser
- Provides more light intensity at the DUV
wavelength of 248 nm and below
 Excimer – an exotic molecule formed
from an atom of a noble gas and
halogen, such as ArF
- comes from the expression excited
dimer (a molecule formed from 2
identical atoms, such as F2)
- is used to represent the noble gas and
halogen molecules
- uses high-voltage pulse discharge (10
– 20 kV)
Most common excimer lasers:
1. Krypton-fluoride (KrF) – 248 nm, 10-20
W at a frequency of 1 kHz
2. Argon-fluoride (ArF) – 193 nm, < 20 W
3. Fluorine (F2) – 157 nm, low output
energy
General process
 The wafer is 1st positioned within the
focus range of the optical system
 Wafer alignment features are aligned to
similar matching features on the
photomask, and the UV light is
projected through the optics and the
mask pattern
 The mask pattern appears as light and
dark features on the wafer, thus
exposing the photoresist
Alignment and Exposure Equipment
 Step-and-repeat aligner
- the critical equipment for
photolithography
- also known as stepper
- aligns and exposes successive reticle
patterns by stepping from one exposure
site to another on the resist-coated
wafer surface
Purposes:
1. Focus and align the wafer surface to the
quartz plane reticle (containing the
pattern)
2. Reproduce a high-resolution reticle
image on the wafer through exposure
of photoresist
3. Produce an adequate quantity of
acceptable wafers per unit time to meet
production requirements
5. Post- Exposure Bake
 Required for Deep UV Resists
 Typical Temperatures 100 to 110°C on a
hot plate
 Immediately after Exposure
 Has Become a Virtual Standard for DUV
and Standard Resists
6. Photoresist Development
Process Summary:
• Soluble areas of photoresist are
dissolved by developer chemical
• Visible patterns appear on wafer
- windows
- islands
Methods: spin, spray and puddle
Then, wafers are rinsed in DI water and spin-
dried
• Quality measures:
- line resolution
- uniformity
- particles and defects
7. Hard Bake
 A Post-Development Thermal Bake
(thermal bake) to evaporate the
remaining photoresist solvent
 Improve Resist-to-Wafer Adhesion
 bake Temperature : 120 to 140°C that is
higher than Soft Bake
8. Develop/Inspect
Purpose:
- Identify Quality Problems
(Defects)
- Characterize the Performance
of the Photolithography Process
- Inspect to Verify a Quality Pattern
 Prevents Passing Defects to
Other Areas
 - Etch
- Implant
 Rework Mis-processed or
Defective Resist-coated Wafers
- Typically an Automated Operation