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W µ nCox
(VG − VT )
2
ID = VD ≥ VDsat
VG ≥ VT
2L
2a)
Derive
an
expression
for
the
electric
field
vs.
position
along
the
channel
in
the
linear
region
of
operation.
Solution:
The
drain
current
is
a
drift
current:
I D ( y ) = W µ nQn ( y )E y ( y )
,
where
in
the
square
law
theory:
Qn ( y ) = −Cox ⎡⎣VG − VT − V ( y ) ⎤⎦ .
Equate
this
to
the
expression
for
the
“linear
region”
current:
W µ nCox ⎡ VD2 ⎤
I D ( y ) = W µ nQn ( y )E y ( y ) = I D = ⎢(V − V )V − ⎥
L ⎣ G T D 2 ⎦
⎡ VD ⎤
2
⎢(VG − VT )VD − ⎥
1⎣ 2 ⎦
E y ( y) = −
L ⎡VG − VT − V ( y ) ⎤
⎣ ⎦
2b)
Derive
an
expression
for
the
electric
field
vs.
position
along
the
channel
at
VD = VDsat .
Solution:
Begin
as
in
2a).
The
drain
current
is
a
drift
current:
I D ( y ) = W µ nQn ( y )E y ( y )
,
where
in
the
square
law
theory:
Qn ( y ) = −Cox ⎡⎣VG − VT − V ( y ) ⎤⎦
Equate
this
to
the
expression
for
the
saturation
region
current:
W µ nCox
I D ( y ) = W µ nQn ( y )E y ( y ) = I D = (VG − VT )
2
2L
1
⎡VG − VT − V ( y ) ⎤E y ( y ) = − (VG − VT )
electric
field
is
gradient
of
voltage,
so:
2
⎣ ⎦ 2L
dV dV 1
− (VG − VT ) = − (VG − VT )
2
+V
dy dy 2L
V ( y) V ( y) y
1
∫ (V − VT ) dV + V dV = − (VG − VT ) ∫ dy
2
− G ∫ 2L
0 0 0
which
can
be
integrated
to
find:
V 2 ( y) 1 2⎛ y⎞
− (VG − VT )V ( y ) + = − (VG − VT ) ⎜ ⎟
2 2 ⎝ L ⎠
or
2⎛ y⎞
V 2 ( y ) − 2 (VG − VT )V ( y ) + (VG − VT ) ⎜ ⎟ = 0
⎝ L⎠
Solve
the
quadratic
equation
for
V(y):
V ( y ) = (VG − VT ) ± (VG − VT ) 1− y / L
Choose
the
minus
sign
because
V ( 0 ) = 0
and
V ( L ) = VG − VT
(drain
end
at
pinch-‐
off).
V ( y ) = (VG − VT ) ⎡1− 1− y / L ⎤
⎣ ⎦
E ( y) = −
dV
=− G
(V − VT ) (1− y / L)−1/2
dy 2L
(V − V )
E ( y ) = − G T (1− y / L )
−1/2
2L
Examine
answer:
At
y
=
0,
we
get
E (0) = − G T
(V − V )
2L
As
y → L ,
E ( y → L ) → −∞
At
the
pinch-‐off
point,
the
electric
field
approaches
infinity
and
the
inversion
layer
charge
approaches
zero.
The
product
of
the
two
is
finite.
This
is
a
limitation
of
the
simple
theory
that
the
velocity
saturation
model
tries
to
fix.
3) There
is
often
a
sheet
of
“fixed
charge”
at
the
oxide-‐semiconductor
interface.
(By
fixed
charge,
we
mean
a
charge
that
does
not
vary
with
surface
potential,
φS .)
Assume
a
1.5
nm
thick
oxide
with
a
relative
dielectric
constant
of
4.0.
Answer
the
questions
below.
3a)
Assume
that
a
fixed
charge
of
QF q = 1011 cm -2
is
present.
Explain
how
the
fixed
charge
shifts
the
threshold
voltage.
What
is
the
direction
of
this
shift
(e.g.
is
it
a
positive
or
negative
voltage
shift?).
Solution:
The
voltage
drop
across
the
oxide
is
changed
by
an
amount:
Q
ΔV = − F
Cox
K Oε 0 4.0 × 8.854 × 10−14
Cox = = = 2.36 × 10−6
xo 1.5 × 10−7
QF 1.6 × 10−19 × 1011
ΔV = − =− −6
= −6.8 × 10−3 V
Cox 2.36 × 10
ΔV = −6.8 × 10−3 V
This
change
in
voltage
drop
acriss
the
oxide
shifts
VT .
The
shift
is
negative.
If
we
are
dealing
with
an
N-‐MOSFET,
then
the
threshold
voltage
will
be
a
little
smaller
(less
positive).
If
we
are
dealing
with
a
P-‐MOSFET,
the
threshold
voltage
is
also
a
little
smaller,
which
means
that
the
threshold
voltage
will
be
a
little
more
negative.
Charge
at
the
oxide-‐Si
interface
reduces
the
magnitude
of
VT
for
N_MOSFETs
and
increases
the
magnitude
of
VT
for
P-‐MOSFETs.
Note:
The
semiconductor
is
accumulated.
There
is
a
little
depletion
of
electrons
in
the
polysilicon
gate.
This
does
not
happen
for
a
metal
because
there
are
so
many
4b)
An
n-‐type
Si
substrate
( N D = 1017 cm -3 )
with
a
p+
polysilicon
gate.
Solution:
(first
separated,
then
together)
Electrons
will
transfer
from
the
semiconductor
to
the
gate.
Note:
The
semiconductor
is
depleted.
We
again
see
some
depletion
in
the
polysilicon
gate.
4c)
A
p-‐type
Si
substrate
( N A = 1017 cm -3 )
with
an
n+
polysilicon
gate.
Solution:
(first
separated,
then
together)
Electrons
will
transfer
from
the
gate
to
the
semiconductor.
A
small
electron
transfer
will
occur
from
the
semiconductor
to
the
gate.
Note:
The
semiconductor
is
accumulated.
The
polysilicon
gate
also
depleted
a
little.
5)
Compute
the
“metal”-‐semiconductor
workfunction
difference
for
each
of
the
cases
above.
5a)
An
n-‐type
Si
substrate
with
an
n+
polysilicon
gate.
Solution:
We
must
find
the
location
of
the
Fermi
level
in
the
semiconductor.
Begin
with
n0 = N D = N C e(
E FS − EC ) k BT
,
which
can
be
solved
for
(E − E FS ) = k T ln ⎛ N ⎞
C
q
B
q ⎝ D⎠
C
( )
⎜ N ⎟ = 0.026 ln 323 = 0.150 eV
{ (
Φ MS = χ − χ + EC − E FS )} = − ( E C )
− E FS = − 0.150 eV
Φ MS = −0.150 eV
The
work
function
difference
is
small,
as
can
be
seen
in
the
energy
band
diagram
of
4a).
5b)
An
n-‐type
Si
substrate
with
a
p+
polysilicon
gate.
Solution
q
B
q
V
⎝ A⎠
( )
⎜ N ⎟ = 0.026 ln 183 = 0.135 eV
{
Φ MS = χ − χ + EG − E FS − EV ( )} = − E + ( E G FS )
− EV = −0.985 eV
Φ MS = −0.985 eV
The
work
function
difference
is
very
large
in
magnitude,
as
can
be
seen
I
the
energy
band
diagram
of
4c).
5d)
A
p-‐type
Si
substrate
with
a
p+
polysilicon
gate.
Solution:
The
same
p-‐type
substrate,
so:
( E FS − EV ) = 0.135 eV
q
{
Φ MS = χ + EG − χ + EG − E FS − EV ( )} = ( E FS )
− EV = 0.135 eV
Φ MS = 0.135 eV
The
work
function
difference
is
very
small
in
magnitude,
as
can
be
seen
in
the
energy
band
diagram
of
4d).