FCU360N65S3R0

MOSFET – Power, N-Channel,

SUPERFET III, Easy Drive
650 V, 10 A, 360 mW
Description
SUPERFET III MOSFET is ON Semiconductor’s brand−new high www.onsemi.com
voltage super-junction (SJ) MOSFET family that is utilizing charge
balance technology for outstanding low on-resistance and lower gate VDSS RDS(ON) MAX ID MAX
charge performance. This advanced technology is tailored to minimize
conduction loss, provide superior switching performance, and 650 V 360 mW @ 10 V 10 A
withstand extreme dv/dt rate.
Consequently, SUPERFET III MOSFET is very suitable for various D
power systems for miniaturization and higher efficiency.

Features
• 700 V @ TJ = 150°C G
• Typ. RDS(on) = 310 mW
• Ultra Low Gate Charge (Typ. Qg = 18 nC) S
• Low Effective Output Capacitance (Typ. Coss(eff.) = 173 pF) N-Channel MOSFET
• 100% Avalanche Tested
• These Devices are Pb−Free and are RoHS Compliant

Applications
G
• Computing / Display Power Supplies D
S
• Telecom / Server Power Supplies I−PAK
• Industrial Power Supplies CASE 369AP

• Lighting / Charger / Adapter

MARKING DIAGRAM

$Y&Z&3&K
FCU360
N65S3R0

$Y = ON Semiconductor Logo
&Z = Assembly Plant Code
&3 = Numeric Date Code
&K = Lot Code
FCU360N65S3R0 = Specific Device Code

ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.

© Semiconductor Components Industries, LLC, 2017 1 Publication Order Number:

August, 2019 − Rev. 3 FCU360N65S3R0/D
 FCU360N65S3R0

ABSOLUTE MAXIMUM RATINGS (TC = 25°C, Unless otherwise specified)

Symbol Parameter Value Unit
VDSS Drain to Source Voltage 650 V
VGSS Gate to Source Voltage DC ±30 V
AC (f > 1 Hz) ±30 V
ID Drain Current Continuous (TC = 25°C) 10 A
Continuous (TC = 100°C) 6
IDM Drain Current Pulsed (Note 1) 25 A
EAS Single Pulsed Avalanche Energy (Note 2) 40 mJ
IAS Avalanche Current (Note 1) 2.1 A
EAR Repetitive Avalanche Energy (Note 1) 0.83 mJ
dv/dt MOSFET dv/dt 100 V/ns
Peak Diode Recovery dv/dt (Note 3) 20
PD Power Dissipation (TC = 25°C) 83 W
Derate Above 25°C 0.67 W/°C
TJ, TSTG Operating and Storage Temperature Range −55 to +150 °C
TL Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 s 300 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive rating: pulse-width limited by maximum junction temperature.
2. IAS = 2.1 A, RG = 25 W, starting TJ = 25°C.
3. ISD ≤ 5 A, di/dt ≤ 200 A/ms, VDD ≤ 400 V, starting TJ = 25°C.

THERMAL CHARACTERISTICS
Symbol Parameter Value Unit
RqJC Thermal Resistance, Junction to Case, Max. 1.5 _C/W
RqJA Thermal Resistance, Junction to Ambient, Max. 100

PACKAGE MARKING AND ORDERING INFORMATION

Part Number Top Marking Package Packing Method Reel Size Tape Width Quantity
FCU360N65S3R0 FCU360N65S3R0 IPAK Tube N/A N/A 75 Units

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 FCU360N65S3R0

ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)

Symbol Parameter Test Conditions Min Typ Max Unit
OFF CHARACTERISTICS
BVDSS Drain to Source Breakdown Voltage VGS = 0 V, ID = 1 mA, TJ = 25_C 650 − − V
VGS = 0 V, ID = 1 mA, TJ = 150_C 700 − − V
DBVDSS/DTJ Breakdown Voltage Temperature ID = 1 mA, Referenced to 25_C − 0.68 − V/_C
Coefficient
IDSS Zero Gate Voltage Drain Current VDS = 650 V, VGS = 0 V − − 1 mA
VDS = 520 V, TC = 125_C − 0.58 −
IGSS Gate to Body Leakage Current VGS = ±30 V, VDS = 0 V − − ±100 nA
ON CHARACTERISTICS
VGS(th) Gate Threshold Voltage VGS = VDS, ID = 0.2 mA 2.5 − 4.5 V
RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 5 A − 310 360 mW
gFS Forward Transconductance VDS = 20 V, ID = 5 A − 6 − S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VDS = 400 V, VGS = 0 V, f = 1 MHz − 730 − pF
Coss Output Capacitance − 15 − pF
Coss(eff.) Effective Output Capacitance VDS = 0 V to 400 V, VGS = 0 V − 173 − pF
Coss(er.) Energy Related Output Capacitance VDS = 0 V to 400 V, VGS = 0 V − 26 − pF
Qg(tot) Total Gate Charge at 10 V VDS = 400 V, ID = 5 A, VGS = 10 V − 18 − nC
(Note 4)
Qgs Gate to Source Gate Charge − 4.3 − nC
Qgd Gate to Drain “Miller” Charge − 7.6 − nC
ESR Equivalent Series Resistance f = 1 MHz − 1 − W
SWITCHING CHARACTERISTICS
td(on) Turn-On Delay Time VDD = 400 V, ID = 5 A, − 12 − ns
VGS = 10 V, Rg = 4.7 W
tr Turn-On Rise Time (Note 4) − 11 − ns
td(off) Turn-Off Delay Time − 34 − ns
tf Turn-Off Fall Time − 10 − ns
SOURCE-DRAIN DIODE CHARACTERISTICS
IS Maximum Continuous Source to Drain Diode Forward Current − − 10 A
ISM Maximum Pulsed Source to Drain Diode Forward Current − − 25 A
VSD Source to Drain Diode Forward VGS = 0 V, ISD = 5 A − − 1.2 V
Voltage

trr Reverse Recovery Time VGS = 0 V, ISD = 5 A, − 241 − ns

dIF/dt = 100 A/ms
Qrr Reverse Recovery Charge − 2.4 − mC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature typical characteristics.

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 FCU360N65S3R0

TYPICAL PERFORMANCE CHARACTERISTICS

50 50
VGS = 10.0V *Notes:
8.0V 1. VDS = 20V
7.0V 2. 250 ms Pulse Test
6.5V
10 6.0V 10
ID, Drain Current[A]

ID, Drain Current[A]

5.5V
o
150 C

o
25 C
1 1
o
−55 C
*Notes:
1. 250 ms Pulse Test
o
2. TC = 25 C

0.1 0.1
0.2 1 10 20 2 3 4 5 6 7 8
VDS, Drain−Source Voltage[V] VGS, Gate−Source Voltage[V]

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

1.2 100
o
*Note: TC = 25 C *Notes:
1. VGS = 0V
Drain−Source On−Resistance [W ]

1.0 2. 250 ms Pulse Test

10
IS, Reverse Drain Current [A]

o
0.8 150 C
1
RDS(ON),

0.6 o
25 C
VGS = 10V
0.1
0.4 VGS = 20V
o
−55 C
0.2 0.01

0.0 0.001
0 5 10 15 20 25 30 0.0 0.5 1.0 1.5
ID, Drain Current [A] VSD, Body Diode Forward Voltage [V]

Figure 3. On-Resistance Variation vs. Drain Figure 4. Body Diode Forward Voltage
Current and Gate Voltage Variation vs. Source Current and Temperature

100000 10
*Note: I D = 5A
VGS, Gate−Source Voltage [V]

10000 8
VDS = 130V
Ciss
Capacitances [pF]

1000 VDS = 400V

6

100
Coss
*Note: 4
10 1. VGS = 0V
2. f = 1MHz
Ciss = C gs + Cgd (C ds = shorted) 2
1 Coss = C ds + Cgd
Crss
Crss = Cgd
0.1 0
0.1 1 10 100 1000 0 5 10 15 20
VDS, Drain−Source Voltage [V] Qg, Total Gate Charge [nC]

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

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 FCU360N65S3R0

TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

1.2 3.0
*Notes: *Notes:
Drain−Source Breakdown Voltage

1. VGS = 0V 1. VGS = 10V

Drain−Source On−Resistance
2. I D = 10mA 2.5 2. I D = 5A
1.1
BVDSS, [Normalized]

RDS(on), [Normalized]
2.0

1.0 1.5

1.0
0.9
0.5

0.8 0.0
−50 0 50 100 150 −50 0 50 100 150
o o
TJ, Junction Temperature [ C] TJ, Junction Temperature [ C]

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variant vs. Temperature

vs. Temperature

100 12

10
10m s
ID, Drain Current [A]

10
100m s
ID, Drain Current [A]

8
1ms
10ms
1 DC 6
Operation in This Area
is Limited by R DS(on)
4
*Notes:
0.1 o
1. TC = 25 C
2
o
2. TJ = 150 C
3. Single Pulse
0.01 0
1 10 100 1000 25 50 75 100 125 150
VDS, Drain−Source Voltage [V] TC, Case Temperature [ o C]

Figure 9. Maximum Safe Operation Area Figure 10. Maximum Drain Current
vs. Case Temperature

3
EOSS [m J]

0
0 130 260 390 520 650
VDS, Drain to Source Voltage [V]

Figure 11. EOSS vs. Drain to Source Voltage

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 FCU360N65S3R0

TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

r(t), NORMALIZED EFFECTIVE TRANSIENT 2

DUTY CYCLE−DESCENDING ORDER
1

D = 0.5
THERMAL RESISTANCE

0.2
0.1 PDM
0.1 0.05
0.02
0.01 t1
t2

0.01 NOTES:
Z qJC(t) = r(t) x RqJC
RqJC = 1.5 oC/W
SINGLE PULSE Peak T J = PDM x ZqJC(t) + TC
Duty Cycle, D = t1 / t2
0.001
−5 −4 −3 −2 −1 0 1 2
10 10 10 10 10 10 10 10
t, RECTANGULAR PULSE DURATION (sec)

Figure 12. Transient Thermal Response Curve

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 FCU360N65S3R0

Figure 13. Gate Charge Test Circuit & Waveform

RL VDS
VDS 90%

VGS VDD
RG

10%
VGS
V
10V
GS
DUT
td(on) tr td(off)
tf
t on t off

Figure 14. Resistive Switching Test Circuit & Waveforms

Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms

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 FCU360N65S3R0

DUT +

VDS

I SD
L

Driver
RG
Same Type
as DUT VDD

VGS Sdv/dt controlled by R G

SI SD controlled by pulse period

Gate Pulse Width

VGS D = −−−−−−−−−−−−−−−−−−−−−−−−−−
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

I SD
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recoverydv/dt

VSD VDD

Body Diode
Forward Voltage Drop

Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms

SUPERFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or
other countries.

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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

DPAK3 (STRAIGHT LEADS)

CASE 369AP
ISSUE O
DATE 30 SEP 2016

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98AON13816G Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: DPAK3 (STRAIGHT LEADS) PAGE 1 OF 1

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