Subject Name : Computer Organization and Architecture

Subject Code: INFO2161

Assignment List : Computer Architecture Part

Day 1

Write VHDL code for AND,OR,NOT,NAND,XOR,NOR,XNOR gates using Data flow and Behavioral
approach.

Day 2

a) Write VHDL code for Half Adder and Half Substractor using Behavioral approach.

b) Write VHDL code for Full Adder and Full Subtractor using Structural approach.

Day 3

Write VHDL code for SR-Flipflop, D-Fipflop, T-Flipflop and JK-Flipflop using Behavioral approach.
(Synthesis and Simulation)

Day 4

a) Write VHDL code to implement 2's complement and Excess Three of a four bit number using
Behavioral approach.(Synthesis and Simulation)

b) Write VHDL code for Binary to Gray code using Structural approach.(Synthesis and
Simulation)