De Unit5 Slides

DIGITAL ELECTRONICS
GAYATHRI DEVI B
Department of Electrical & Electronics Engineering

DIGITAL ELECTRONICS
Digital Logic families & Data Converters
GAYATHRI DEVI B
DIGITAL ELECTRONICS
Types of Logic Families
❖ Logic families are the logic circuits having identical electrical

parameters.
❖ It is a group of compatible ICs with the same logic levels and

supply voltages for performing various logic functions.
❖ They are fabricated using a specific circuit configuration which

is referred to as a Logic family. The circuit design of the basic
gate of each logic family is the same.
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❖ What is unipolar logic family?
➢ In unipolar logic families, unipolar devices are the key element.

MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is
a unipolar device, in which the current flows because of only
one type of charge carriers (that is, either electrons or holes).
➢ The examples of unipolar families include PMOS, NMOS, and

CMOS.
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What is bipolar logic?

❖Bipolar junction transistors (BJTs) along with resistors and
diodes can be used to create electronic circuits that perform
Boolean logic functions. Bipolar refers to transistors that have
two polarities of charge carriers inside: electrons and holes.
•The digital inverter and the resistor-transistor logic (RTL) family
•The diode-transistor logic (DTL) family
•The transistor-transistor logic (TTL) family
• The basic TTL logic circuit
• The “totem-pole” TTL logic circuit
• Further improvements of TTL logic circuits
• Three-state TTL logic circuits
•The emitter-coupled logic family (ECL)
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❖ Logic families are classified according to the principle type of

electronic components used in their circuitry as shown in Figure
1. They are a. Bipolar ICs: which uses diodes and transistors
(BJT) b. Unipolar ICs: which uses MOSFETs
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Resistor-Transistor Logic (RTL) family

❖ The resistor-transistor logic, also termed as RTL, was most
popular kind of logic before the invention of IC fabrication
technologies.
❖ As its name suggests, RTL circuits mainly consists of resistors and

transistors that comprises RTL devices.
❖ The basic RTL device is a NOR gate is shown here.

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Resistor-Transistor Logic(RTL)
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WORKING:
❖ Inputs to the NOR gate shown above are ‘input1’ & ‘input2’.
The inputs applied at these terminals represent either logic
level HIGH (1) or LOW (0).
❖ The logic level LOW is the voltage that drives corresponding

transistor in cut-off region, while logic level HIGH drives it into
saturation region.
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❖ If both the inputs are LOW, then both the transistors are in
cut-off i.e. they are turned-off. Thus, voltage Vcc appears at
output I.e. HIGH.
❖ If either transistor or both of them are applied HIGH input, the

voltage Vcc drops across Rc and output is LOW.
❖ RTL family is characterized by poor noise margin, poor fan-out

capability, low speed and high power dissipation. Due to these
undesirable characteristics, this family is now obsolete.
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One-transistor RTL NOR gate

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❖ With two or more base resistors (R3 and R4) instead of one, the
inverter becomes a two-input RTL NOR gate (see the figure).
❖ The logical operation OR is performed by applying

consecutively the two arithmetic
operations addition and comparison (the input resistor
network acts as a parallel voltage summer with equally
weighted inputs and the following common-emitter transistor
stage as a voltage comparator with a threshold about 0.7 V).
❖ The equivalent resistance of all the resistors connected to

logical "1" and the equivalent resistance of all the resistors
connected to logical "0" form the two legs of a composed
voltage divider driving the transistor.
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❖ The base resistances and the number of the inputs are chosen
(limited) so that only one logical "1" is sufficient to create base-
emitter voltage exceeding the threshold and, as a result,
saturating the transistor.
❖ If all the input voltages are low (logical "0"), the transistor is
cut-off. The pull-down resistor R1 biases the transistor to the
appropriate on-off threshold.
❖ The output is inverted since the collector-emitter voltage of

transistor Q1 is taken as output, and is high when the inputs
are low. Thus, the analog resistive network and the analog
transistor stage perform the logic function NOR.
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Advantages:
❖ The primary advantage of RTL technology was that it used a
minimum number of transistors. In circuits using discrete
components, before integrated circuits, transistors were the
most expensive component to produce.
❖ Early IC logic production (such as Fairchild's in 1961) used the

same approach briefly, but quickly transitioned to higher-
performance circuits such as diode–transistor logic and
then transistor–transistor logic (starting in 1963 at Sylvania
Electric Products), since diodes and transistors were no more
expensive than resistors in the IC.
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Limitations:
❖ The disadvantage of RTL is its high power dissipation when the

transistor is switched on, by current flowing in the collector
and base resistors. This requires that more current be supplied
to and heat be removed from RTL circuits.
❖ Another limitation of RTL is its limited fan-in: 3 inputs being

the limit for many circuit designs, before it completely loses
usable noise immunity. It has a low noise margin.
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gayathridb@pes.edu
+91 80 6666 3333 Extn 273
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GAYATHRI DEVI B

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GAYATHRI DEVI B
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Diode-Transistor Logic(DTL)
Diode-Transistor Logic (DTL) family
❖ The diode-transistor logic, also termed as DTL, replaced RTL

family because of greater fan-out capability and more noise
margin.
❖ As its name suggests, DTL circuits mainly consists of diodes

and transistors that comprises DTL devices.
❖ The basic DTL device is a NAND gate, shown aside.

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❖ Three inputs to the gate are applied through three diodes viz.
D1, D2 and D3. The diode will conduct only when
corresponding input is LOW.
❖ If any of the diode is conducting i.e. when at least one input is

LOW, the voltage at cathode of diode DA is such that it keeps
transistor T in cut-off and subsequently, output of transistor is
HIGH.
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DTL NAND gate

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❖ If all inputs are HIGH, all diodes are non-conducting, transistor

T is in saturation, and its output is LOW.
❖ Due to number of diodes used in this circuit, the speed of the

circuit is significantly low. Hence this family of logic gates is
modified to transistor-transistor logic i.e. TTL family.
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❖ Diode–transistor logic (DTL) is a class of digital circuits that is

the direct ancestor of transistor–transistor logic.
❖ It is called so because the logic gating function (e.g., AND) is

performed by a diode network and the amplifying function is
performed by a transistor (in contrast with RTL and TTL).
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AND NOR
OR
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Transistor-Transistor Logic (TTL) family

❖ TTL family is a modification to the DTL. It has come to
existence so as to overcome the speed limitations of DTL
family.
❖ The basic gate of this family is TTL NAND gate.
❖ The different TTL circuits are

➢ Basic TTL
➢ Totem pole TTL
➢ Schottky TTL
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Basic TTL NAND Circuitry

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✓ Modifications to DTL NAND:
1. The diodes D1, D2 and D3 are replaced by emitter-base

junctions of a multiple-emitter transistor labeled Q1.
2. Diode DA is replaced by collector-base junction Q1.
3. Diode DB is replaced by emitter-base junction of

transistor labeled Q2.
The working of this circuit is identical to that of DTL circuit.

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Circuit Illustration for Different Input States:

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A 3-input TTL NAND Gate with a Totem Pole Output Stage

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❖ The operation can be described briefly by three conditions

as specified below:
➢ Condition 1: At least one input is low (that is, 0). Transistor

T1 saturates. Thus, the base voltage of T2 is almost zero. T2 is
cut off and forces T3 to cut off. T4 functions as an emitter
follower and couples a high voltage to load. Output is high
(that is Y=1).
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Transistor-Transistor Logic(TTL)
➢ Condition 2: Each input is high. The emitter base junctions of

T1 are reverse biased. The collector base junction of T1 is
forward biased. Therefore, T1 is in reverse active mode. The
collector current of T1 flows in reverse direction. Because this
current is flowing in the base of T2, the transistors T2 and
T3 saturate and then output Y is low.
➢ Condition 3: The circuit is operating under II while one of the
inputs becomes low. The consequent emitter base junction of
T1 starts conducting and T1 base voltage drops to a low
value. Thus, T1 is in forward active mode. The high collector
current of T1 shifts the stored charge in T2 and T3 and hence,
T2 and T3 go to cut-off and T1 saturates and then output Y
returns to high.
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Advantages and Disadvantages of TTL Logic Gates

Advantages:
1. TTL family is the fastest saturating logic family (working in

between the saturation and cut-off modes). Also, TTL gates
are available in a variety of forms, such as high-speed TTL,
high-speed Schottky TTL, low-power TTL etc.
2. Typical supply voltage is only +5 V with a permitted variation

of ±0.25 V. At present, TTL gates of 3-volt and even to 1.5-volt
supply are possible.
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3. It has good noise immunity. Typical noise-margin is about 0.4

V.
4. Power dissipation is in the range of several mW only. In the
case of low-power Schottky TTL gates, this is less than 2 mW per
gate.
5.TTL gates are compatible with other logic families.
6.Commercial and military versions of TTL gates are available.
7.These gates are more freely available in the open market than
most other logic families.
8.Good fan-out; TTL gates can drive up to 10 gates.
9. TTL gates producing almost all of the logic functions are
available in the market.
10.TTL gates exhibit low output impedance for high/low states.
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Disadvantages:
1. Noise immunity is not very high; so TTL gates cannot be used
in applications where large noise voltages exist.
2. Because of isolation problems, which require more chip
space, TTL VLSI circuits are not possible in its conventional form.
3. Power dissipation of TTL gates is much higher than that of
MOS gates.
4. Cost of TTL gates is higher than that of NMOS/CMOS gates,
when MSI and LSI gates are considered.
5. TTL gates generate transient voltages at switching instants.
6. Wired-OR capability is not possible for the conventional TTL
gates; open-collector gates are required for this application.
THANK YOU
Gayathri Devi B
gayathridb@pes.edu
+91 80 6666 3333 Extn 273
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GAYATHRI DEVI B

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GAYATHRI DEVI B
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Emitter Coupled Logic (ECL) family
Emitter Coupled Logic (ECL) family(Non saturated type)

❖ ECL logic family implements the gates in differential amplifier
configuration in which transistors are never driven in the
saturation region thereby improving the speed of circuit to a
great extent.
❖ The ECL family is fastest of all logic families.
❖ In ECL logic family, logic 0 is represented as about -1.75 V and

logic 1 is represented as about -0.9 V with respect to ground.
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❖ The basic gate of ECL family is NOR gate (OR and NOR
together) as shown in diagram. The output1 is OR output
while ouput2 is NOR output.
❖ Transistor T1 is applied with input and additional inputs are

applied to transistors (T1’, T1’’, . . .) in parallel with T1.
❖ Thus transistor(s) T1 and T2 are connected in differential

amplifier configuration.
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❖ Transistors T3 and T4 are emitter-followers used for DC level-

shifting of output voltages.
❖ The positive supply terminal of the circuit is grounded while

negative supply terminal is at negative 5.2V.
❖ This is done to minimize the effect of noise introduced by the

power supply and also to protect the gate from short-circuit
that might occur accidently.
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❖ Both the outputs (HIGH/LOW) for OR and NOR are negative.
❖ Thus, to interface this logic family with other, a translator

circuit is needed which converts negative voltages to
compatible positive voltage levels.
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Advantages of ECL:
Following points summarize ECL advantages over TTL and

CMOS:
❖ It has fanout of 25 which is better than TTL and less then

CMOS.
❖ It has average propagation delay time ( 1 to 4 ns ) better

compare to both TTL and CMOS.
❖ Hence it is known as fastest logic family.

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Disadvantages of ECL:
Following points summarize ECL disadvantages over TTL and

CMOS:
❖ It has noise immunity worst compare to both TTL and CMOS.
❖ It has power per gate of about 4 to 55 mW.
❖ This power consumption figure is higher compare to both TTL

and CMOS.
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MOS Logic family
MOS Logic family(Unipolar Type)
❖ MOS logic family implements the logic gates using MOSFET

devices.
❖ MOSFETs are high density devices which can easily and

economically fabricated on ICs.
❖ MOS logic gates can be fabricated using either only NMOS or

only PMOS devices.
❖ MOS logic is vastly used in LSI and VLSI devices, such as

microprocessor chips, due to their high density characteristic.
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MOS Logic family
❖ P-type metal-oxide-semiconductor logic, PMOS , is a type of
digital circuit constructed using metal-oxide-semiconductor
field effect transistors (MOSFET) with a p-type
semiconductor source and drain printed on a bulk n-
type "well".
❖ When activated, by lowering the voltage on the gate, the

resulting circuit allows the conduction of electron
holes between the source and drain, turning the circuit "on".
❖ PMOS circuits are less susceptible to electronic noise than
other types of MOSFETs, which makes them easy to fabricate.
❖ They were widely used in the early days

of microprocessor development in the 1970s.
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MOS Logic family
❖ They have a number of disadvantages compared to

the NMOS and CMOS alternatives, including the need for
several different supply voltages (both positive and negative),
high power dissipation in the conducting state, and relatively
large features. Also, the overall switching speed is lower.
❖ PMOS was replaced by NMOS as better fabrication techniques

were introduced, especially the further elimination of impurities
from the silicon stock which lowered noise.
❖ NMOS offered major advantages in terms of power use, heat

loads, and feature size. NMOS became widely used by the mid-
1970s, before it was itself replaced by CMOS logic during the
early 1980s.
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MOS Logic family
!! Caution for using MOS devices!!
❖ If any of input of MOS is left unconnected, the open input

terminal which has very high input impedance may take any
stray electric charge as input and can develop extreme
dangerous high voltage which can damage the device and
may also harm the person handling the device.
❖ Thus, none of the un-used inputs of MOS device should be

left unconnected. It must connected to ground or supply.
Even for storage of device, all pins must be shorted.
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MOS Logic family
CMOS Logic family

❖ CMOS stands for complementary-MOS, in which both p-
channel and n-channel enhancement MOSFET devices are
fabricated on same chip.
❖ This causes density to be reduced and complex fabrication

process.
❖ However, CMOS devices consume negligible power and hence

are preferred over MOS devices in battery operated
applications.
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MOS Logic family
CMOS NAND Gate:

For example, here is the schematic diagram for a CMOS NAND
gate:
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MOS Logic family
❖ Notice how transistors Q1 and Q3 resemble the series-

connected complementary pair from the inverter circuit.
❖ Both are controlled by the same input signal (input A), the
upper transistor turning off and the lower transistor turning on
when the input is “high” (1), and vice versa.
❖ Notice also how transistors Q2 and Q4 are similarly controlled

by the same input signal (input B), and how they will also
exhibit the same on/off behavior for the same input logic
levels.
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MOS Logic family
❖ The upper transistors of both pairs (Q1 and Q2) have their
source and drain terminals paralleled, while the lower
transistors (Q3 and Q4) are series-connected.
❖ What this means is that the output will go “high” (1)

if either top transistor saturates, and will go “low” (0) only
if both lower transistors saturate.
MOS Logic family
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gayathridb@pes.edu
+91 80 6666 3333 Extn 273
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GAYATHRI DEVI B

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GAYATHRI DEVI B
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Characteristics of Logic Families
Characteristics of Logic Families:
❖ Main Characteristics of Logic Families are – Speed, Fan-in, Fan-

out, Noise Immunity, and Power Dissipation.
Let us see all the characteristics in greater detail.
❖ Speed (Propagation Delay)– Speed is decided by observing

the time span between applying the input to the given
circuitry and change in output.
❖ Fan–in – This characteristic of logic is one of the most

important because it decides how much input a logic circuit
would be able to handle.
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❖ Fan–out – This is something similar to Fan – in except it

decides how much circuits a particular gate would be able to
drive.
❖ Noise Immunity – Noise immunity is self-explanatory. It will

tell you how much noise any circuit can handle without
breaking the output.
❖ Power Dissipation in CMOS – Any given circuit, when switches

to another state from one state, there is some power
dissipated. That is known as Power Dissipation in CMOS.
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Propagation delay tp:
Speed=1/ tp
❖ The propagation delay is the time delay between the

occurrence of change in the logical level at the input and
before it is reflected at the output.
❖ It is the time delay between the specified voltage points on

the input and output waveforms.
❖ Propagation delays are separately defined for LOW-to-HIGH

and HIGH-to-LOW transitions at the output.
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✓ Fan in: This is the number of inputs of a logic gate. It is decided

by the input current sinking capability of a logic gate.
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❖ It specifies the number of standard loads that the output of

the gate can drive without affecting its normal operation.
❖ A standard load is usually defined as the amount of current

needed by an input of another gate in the same family.
❖ Sometimes, the term’ loading’ is also used instead of ‘fan out’.
❖ This term is derived from the fact that the output of the gate
can supply a limited amount of current above which it ceases
to operate properly and is said to be overloaded.
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✓ This is the maximum noise voltage added to the input signal

of digital circuit that does not cause an undesirable change
in the circuit output.
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Power Dissipation:
❖ This is the power supplied required to operate the gate.
❖ It is expressed in milli-watt (mW) and represents actual power

dissipated in the gate.
❖ It is the number that represents power delivered to gate from

the power supply.
❖ The total power dissipated in the digital system is sum of

power dissipated in each digital IC.
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In other way,
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Characteristics of ECL Logic Families:
➢ The output of an ECL system has a very low impedance, thus

having a fan-out of about 25.
➢ The propagation time is about 1ns, making it the fastest logic

family.
➢ A logic low voltage for ECL is about -1.7V to -1.75V.
➢ A logic high voltage for ECL is about -0.8V.
➢ It is the fastest amongst all the logic families.
➢ It has an average propagation delay time of about 1ns-4ns.

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Characteristics of CMOS Logic Families:
➢ CMOS supports a very large fan-out, more than 50

transistors.
➢ It has excellent noise immunity amongst all families.
➢ A logic low voltage for CMOS is from 0v to 1.5v
➢ A logic high voltage for ECL is somewhere between 3.5V to

5V.
➢ The propagation delay is the worst when compared with TTL

and ECL families at about 200ns.
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Characteristics of TTL Family:

➢ Logic low level is at 0 or 0.2V.
➢ Logic high level is at 5V.
➢ Typical fan out of 10. It means it can support at most 10

gates at its output.
➢ A basic TTL device draws a power of almost 10mW, which

reduces with the use of Schottky devices.
➢ The average propagation delay is about 9ns.
➢ The noise margin is about 0.4V.

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THANK YOU
Gayathri Devi B
gayathridb@pes.edu
+91 80 6666 3333 Extn 273
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GAYATHRI DEVI B

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GAYATHRI DEVI B
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Data Converters-Introduction
Data Converters
❖ All the real world quantities are analog in nature. We can

represent these quantities electrically as analog signals.
❖ An analog signal is a time varying signal that has any number

of values (variations) for a given time slot.
❖ In contrast to this, a digital signal varies suddenly from one

level to another level and will have only finite number of
values (variations) for a given time slot.
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Data Converters
There are two types of data converters −
➢ Analog to Digital Converter
➢ Digital to Analog Converter
❖ Note that some Analog to Digital Converters may require

Digital to Analog Converter as an internal block for their
operation.
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❖ Analog to Digital Converter (ADC) and Digital to Analog

Converter (DAC) are very important components in electronic
equipment.
❖ Since most real world signals are analog, these two

converting interfaces are necessary to allow digital electronic
equipment to process the analog signals.
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❖ Take the audio signal processing as an example, ADC

converts the analog signal collected by audio input
equipment, such as a microphone, into a digital signal that
can be processed by computer.
❖ The computer may add sound effect such as echo and adjust
the tempo and pitch of the music.
❖ DAC converts the processed digital signal back into the

analog signal that is used by audio output equipment such
as a speaker.
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Digital-to-Analog Converters
Digital to Analog Converters

❖ A Digital to Analog Converter (DAC) consists of a number of
binary inputs and a single output. In general, the number of
binary inputs of a DAC will be a power of two.
❖Types of DACs:
There are two types of DACs
➢ Binary Weighted Resistor DAC
➢ R-2R Ladder DAC

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Digital-to-Analog Converters-Binary Weighted Resistor Type
❖ A weighted resistor DAC produces an analog output, which is

almost equal to the digital (binary) input by using binary
weighted resistors in the inverting adder circuit.
❖ In short, a binary weighted resistor DAC is called as weighted

resistor DAC.
❖ The circuit diagram of a 3-bit binary weighted resistor DAC is

shown in the Figure next.
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Digital-to-Analog Converters-Binary Weighted Resistor Type
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Binary Weighted Resistor Type DAC
❖ Recall that the bits of a binary number can have only one of the
two values. i.e., either 0 or 1.
❖ Let the 3-bit binary input is b2b1b0. Here, the bits b2 and b0
denote the Most Significant Bit (MSB) and Least Significant Bit
(LSB) respectively.
❖ The digital switches shown in the above figure will be

connected to ground, when the corresponding input bits are
equal to ‘0’.
❖ Similarly, the digital switches shown in the above figure will be

connected to the negative reference voltage, −VR when the
corresponding input bits are equal to ‘1’.
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❖ In the circuit shown, the non-inverting input terminal of an op-

amp is connected to ground. That means zero volts is applied
at the non-inverting input terminal of op-amp.
❖ According to the virtual short concept, the voltage at the

inverting input terminal of opamp is same as that of the
voltage present at its non-inverting input terminal.
❖ So, the voltage at the inverting input terminal’s node will be

zero volts.
❖ The nodal equation at the inverting input terminal’s node is:

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The above equation represents the output voltage equation of

a 3-bit binary weighted resistor DAC. Since the number of bits
are three in the binary (digital) input, we will get seven
possible values of output voltage by varying the binary input
from 000 to 111 for a fixed reference voltage, VR.
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➢ We can write the generalized output voltage equation of an N-

bit binary weighted resistor DAC as shown below based on the
output voltage equation of a 3-bit binary weighted resistor
DAC.
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❖ The disadvantages of a binary weighted resistor DAC are as

follows −
❖ The difference between the resistance values corresponding

to LSB & MSB will increase as the number of bits present in
the digital input increases.
❖ It is difficult to design more accurate resistors as the number

of bits present in the digital input increases.
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R-2R Ladder DAC
R-2R Ladder DAC

❖ The R-2R Ladder DAC overcomes the disadvantages of a
binary weighted resistor DAC.
❖ As the name suggests, R-2R Ladder DAC produces an analog

output, which is almost equal to the digital (binary) input by
using a R-2R ladder network in the inverting adder circuit.
❖ The advantages of a R-2R Ladder DAC are as follows −
✓ R-2R Ladder DAC contains only two values of resistor: R and

2R.
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R-2R Ladder DAC
R-2R Ladder DAC

✓ So, it is easy to select and design more accurate resistors.
✓ If more number of bits are present in the digital input, then

we have to include required number of R-2R sections
additionally.
✓ Due to the above advantages, R-2R Ladder DAC is preferable

over binary weighted resistor DAC.
❖ The circuit diagram of a 3-bit R-2R Ladder DAC is shown in

the figure next −
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R-2R Ladder DAC
R-2R Ladder DAC
❖ It is difficult to get the generalized output voltage equation

of a R-2R Ladder DAC.
❖ But, we can find the analog output voltage values of R-2R

Ladder DAC for individual binary input combinations easily.
❑ Example
Let us find the value of analog output voltage of R-2R Ladder
DAC for a binary input, b2b1b0 = 100.
Circuit Diagram and its Simplification

The circuit diagram of a 3-bit R-2R Ladder DAC when binary
input, b2b1b0 = 100 applied to it is shown in the following
figure −
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R-2R Ladder DAC
In the circuit shown,

there exists series and
parallel combinations
of resistors to the left
of point A with
respect to ground. So,
we can replace that
entire resistor
network with a single
resistor having
resistance of 2RΩ.
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R-2R Ladder DAC
The simplified circuit diagram is shown in the following figure −

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R-2R Ladder DAC
❖ We can replace the part of the network that is connected to

the left of point B with respect to ground by using a
Thevenin’s equivalent circuit. The modified circuit diagram is
shown in the following figure −
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R-2R Ladder DAC
❖ In the circuit before, there exist a series combination of two

resistors.
❖ Replace this combination with a single resistor. The final circuit
diagram after simplification is shown in the following figure −
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R-2R Ladder DAC
❖ Now, the circuit diagram looks like an inverting amplifier.
❖ It is having an input voltage of −VR/2 volts, input resistance of

2RΩ and feedback resistance of 2RΩ.
❖ The output voltage of the circuit shown above will be −

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Analog-to-Digital Converters(ADCs)
❖ An Analog to Digital Converter (ADC) converts an analog signal

into a digital signal. The digital signal is represented with a
binary code, which is a combination of bits 0 and 1.
❖ An Analog to Digital Converter (ADC) consists of a single

analog input and many binary outputs. In general, the number
of binary outputs of ADC will be a power of two.
❖ There are two types of ADCs: Direct type ADCs and Indirect
type ADC.
❖ If the ADC performs the analog to digital conversion directly

by utilizing the internally generated equivalent digital (binary)
code for comparing with the analog input, then it is called
DIGITAL ELECTRONICS
Analog-to-Digital Converters(ADCs)
❖ Direct type ADCs :
1. Counter type ADC/Ramp type ADC
2. Successive Approximation ADC
3. Flash type ADC
❖ Indirect Type ADC :
1. Dual Slope/Integrating type

DIGITAL ELECTRONICS
Flash type ADC
Flash type ADC

❖ A flash type ADC produces an equivalent digital output for a
corresponding analog input in no time. Hence, flash type ADC is
the fastest ADC.
❖ Flash Type ADC is based on the principle of comparing analog

input voltage with a set of reference voltages.
❖ To convert the analog input voltage into a digital signal of n-bit

output, (2n – 1) comparators are required.
DIGITAL ELECTRONICS
Flash type ADC
The following figure shows 2- bit flash type ADC

DIGITAL ELECTRONICS
Flash type ADC
❖ The three op-amps are used as comparators. The non-inverting

inputs of all the three comparators are connected to the analog
input voltage.
❖ The inverting terminals are connected to a set of reference

voltages (V/4), (2V/4) and (3V/4) respectively which are
obtained using a resistive divider network and power supply
+V.
❖ The output of the comparator is in positive saturation(i.e. logic

1), when voltage at non-inverting terminal is greater than
voltage at inverting terminal and is in negative saturation
otherwise.
DIGITAL ELECTRONICS
Flash type ADC
➢ The following table shows the comparator outputs for different

ranges of analog input voltages and their corresponding digital
outputs.
DIGITAL ELECTRONICS
Flash type ADC
❖ Consider first condition, where analog input voltage VA(Vin) is

less than (V/4).
❖ In this case, the voltage at the non-inverting terminals of all

the three comparators is less than the respective voltages at
inverting terminals and hence the comparator outputs are
C1C2C3 = 000.
❖ This comparator outputs are applied to the further coding

circuit to get the digital outputs as B1B0 = 00
Similarly the digital outputs are calculated for other three
conditions also.
DIGITAL ELECTRONICS
Flash type ADC
Advantages:
❖ It is the fastest type of ADC because the conversion is
performed simultaneously through a set of comparators,
hence referred as flash type ADC. Typical conversion time is
100ns or less.
❖ The construction is simple and easier to design.
Disadvantages:
❖ It is not suitable for higher number of bits.
❖ To convert the analog input voltage into a digital signal of n-

bit output, (2n – 1) comparators are required. The number of
comparators required doubles for each added bit.
DIGITAL ELECTRONICS
Flash type ADC
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Counter Type ADC
Counter type ADC

❖ A counter type ADC produces a digital output, which is
approximately equal to the analog input by using counter
operation internally.
❖ The counter type ADC mainly consists of 5 blocks: Clock signal

generator, Counter, DAC, Comparator and Control logic.
DIGITAL ELECTRONICS
Counter Type ADC
The following figure shows the n-bit counter type ADC.

DIGITAL ELECTRONICS
Counter Type ADC
Operation:
❖ The n-bit binary counter is initially set to 0 by using reset

command. Therefore the digital output is zero and the
equivalent voltage VD is also 0V.
❖ When the reset command is removed, the clock pulses are

allowed to go through AND gate and are counted by the binary
counter.
❖ The D to A converter (DAC) converts the digital output to an

analog voltage and applied as the inverting input to the
comparator. The output of the comparator enables the AND
gate to pass the clock.
DIGITAL ELECTRONICS
Counter Type ADC
❖ The number of clock pulses increases with time and the analog
input voltage VD is a rising staircase waveform as shown in
figure below.
❖ The counting will continue until the DAC output VD, equals and
just rises more than unknown analog input voltage VA.
❖ Then the comparator output becomes low and this disables the
AND gate from passing the clock.
❖ The counting stops at the instance VA< VD, and at that instant
the counter stops its progress and the conversion is said to be
complete.
DIGITAL ELECTRONICS
Counter Type ADC
The numbers stored in the n-bit counter is the equivalent n-bit

digital data for the given analog input voltage.
DIGITAL ELECTRONICS
Counter Type ADC
Conversion time of Counter type ADC:
❖ Conversion time of ADC is the time taken by the ADC to

convert the input sampled analog value to digital value.
❖ Here the maximum conversion of high input voltage for a N bit

ADC is the clock pulses required to the counter to count its
maximum count value.
❖ So the maximum conversion of Counter type ADC is = (2N-1) T

DIGITAL ELECTRONICS
Counter Type ADC
➢ Where, T is the time period of clock pulse.
If N=2 bit then the Tmax = 3T.
By observing the above conversion time of Counter type ADC it is

illustrated that the sampling period of Counter type ADC should
be as shown below.
Ts >= (2N-1) T
DIGITAL ELECTRONICS
Counter Type ADC
Counter type ADC Advantages

1. Counter type ADC is very simple to understand and also to
operate.
2. Counter type ADC design is less complex, so the cost is also

less
Counter type ADC Disadvantages

1. Speed is less, since each time the counter has to begin from
ZERO.
2. There may be conflicts if the next i/p is sampled before

completion of one process.
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Successive Approximation ADC

❖ A successive approximation type ADC produces a digital
output, which is approximately equal to the analog input by
using successive approximation technique internally.
❖ The successive approximation ADC mainly consists of 5 blocks−

Clock signal generator, Successive Approximation Register
(SAR), DAC, comparator and Control logic.
❖ The block diagram of a successive approximation ADC is

shown in the figure next.
DIGITAL ELECTRONICS
DIGITAL ELECTRONICS
❖ The basic principle of this type of A/D converter is that the
unknown analog input voltage is approximated against an n-bit
digital value by trying one bit at a time, beginning with the
MSB.
❖ The principle of successive approximation process for a 4-bit

conversion is explained here.
❖ This type of ADC operates by successively dividing the voltage

range by half, as explained in the following steps.
DIGITAL ELECTRONICS
❖ It consists of a successive approximation register (SAR), DAC

and comparator.
❖ The output of SAR is given to n-bit DAC. The equivalent analog

output voltage of DAC, VD is applied to the non-inverting input
of the comparator.
❖ The second input to the comparator is the unknown analog

input voltage VA. The output of the comparator is used to
activate the successive approximation logic of SAR.
❖ When the start command is applied, the SAR sets the MSB to
logic 1 and other bits are made logic 0, so that the trial code
becomes 1000.
DIGITAL ELECTRONICS
1. The MSB is initially set to 1 with the remaining three bits set
as 000. The digital equivalent voltage is compared with the
unknown analog input voltage.
2. If the analog input voltage is higher than the digital

equivalent voltage, the MSB is retained as 1 and the second
MSB is set to 1. Otherwise, the MSB is set to 0 and the second
MSB is set to 1.
3. Comparison is made as given in step (1) to decide whether to

retain or reset the second MSB.
DIGITAL ELECTRONICS
4. The above steps are more accurately illustrated with the help of
an example as follows:
❖ Let us assume that the 4-bit ADC is used and the analog input
voltage is VA = 11 V. when the conversion starts, the MSB bit is
set to 1.
❖ Now VA = 11V > VD = 8V = [1000]2

DIGITAL ELECTRONICS
❖ Since the unknown analog input voltage VA is higher than the

equivalent digital voltage VD, as discussed in step (2), the MSB
is retained as 1 and the next MSB bit is set to 1 as follows
VD = 12V = [1100]2
❖ Now VA = 11V < VD = 12V = [1100]2
❖ Here now, the unknown analog input voltage VA is lower than

the equivalent digital voltage VD. As discussed in step (2), the
second MSB is set to 0 and next MSB set to 1 as
VD = 10V = [1010]2
DIGITAL ELECTRONICS
❖ Now again VA = 11V > VD = 10V = [1010]2
❖ Again as discussed in step (2) VA>VD, hence the third MSB is

retained to 1 and the last bit is set to 1. The new code word is
VD = 11V = [1011]2
❖ Now finally VA = VD , and the conversion stops.

DIGITAL ELECTRONICS
Advantages:
1 Conversion time is very small.
2 Conversion time is constant and independent of the amplitude

of the analog input signal VA.
Disadvantages:
1 Circuit is complex.
2 The conversion time is more compared to flash type ADC.
3. Size increases with number of bits

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Dual Ramp Type ADC
❖ If an ADC performs the analog to digital conversion by an

indirect method, then it is called an Indirect type ADC.
❖ In general, first it converts the analog input into a linear

function of time (or frequency) and then it will produce the
digital (binary) output.
❖ Dual slope ADC is the best example of an Indirect type ADC.

DIGITAL ELECTRONICS
Dual Ramp Type ADC
❖ In dual slope type ADC, the integrator generates two different

ramps, one with the known analog input voltage VA and
another with a known reference voltage –Vref.
❖ Hence it is called as dual slope A to D converter. The logic

diagram for the same is shown below.
DIGITAL ELECTRONICS
Dual Ramp Type ADC
Dual Slope ADC

DIGITAL ELECTRONICS
Dual Ramp Type ADC
Dual Slope ADC Working

DIGITAL ELECTRONICS
Dual Ramp Type ADC
Operation:
❖ The binary counter is initially reset to 0000; the output of

integrator reset to 0V and the input to the ramp generator or
integrator is switched to the unknown analog input voltage VA.
❖ The analog input voltage VA is integrated by the inverting

integrator and generates a negative ramp output.
❖ The output of comparator is positive and the clock is passed

through the AND gate.
DIGITAL ELECTRONICS
Dual Ramp Type ADC
❖ This results in counting up of the binary counter.

The negative ramp continues for a fixed time period t1, which
is determined by a count detector for the time period t1.
❖ At the end of the fixed time period t1, the ramp output of
integrator is given by
∴VS=-VA/RC×t1
DIGITAL ELECTRONICS
Dual Ramp Type ADC
❖ When the counter reaches the fixed count at time period t1,
the binary counter resets to 0000 and switches the integrator
input to a negative reference voltage –Vref.
❖ Now the ramp generator starts with the initial value –Vs and
increases in positive direction until it reaches 0V and the
counter gets advanced.
❖ When Vs reaches 0V, comparator output becomes negative (i.e.

logic 0) and the AND gate is deactivated. Hence no further clock
is applied through AND gate.
DIGITAL ELECTRONICS
Dual Ramp Type ADC
❖ Now, the conversion cycle is said to be completed and the
positive ramp voltage is given by
∴VS=Vref/RC×t2
➢ Where Vref & RC are constants and time period t2 is variable.
The dual ramp output waveform is shown below.
DIGITAL ELECTRONICS
Dual Ramp Type ADC
❖ Since ramp generator voltage starts at 0V, decreasing down to

–Vs and then increasing up to 0V, the amplitude of negative
and positive ramp voltages can be equated as follows.
∴Vref/RC×t2=-VA/RC×t1
∴t2=-t1×VA/Vref
∴VA=-Vref×t1/t2
❖ Thus the unknown analog input voltage VA is proportional to

the time period t2, because Vref is a known reference voltage
and t1 is the predetermined time period.
DIGITAL ELECTRONICS
Dual Ramp Type ADC
❖ The actual conversion of analog voltage VA into a digital

count occurs during time t2.
❖ The binary counter gives corresponding digital value for time

period t2.
❖ The clock is connected to the counter at the beginning of t2

and is disconnected at the end of t2.
❖ Thus the counter counts digital output as
Digital output=(counts/sec) t2
∴Digital output=(counts/sec)[t1×VA/Vref ]
DIGITAL ELECTRONICS
Dual Ramp Type ADC
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DIGITAL ELECTRONICS
Summary
❖ A logic family of monolithic digital integrated circuit devices is

a group of electronic logic gates constructed using one of
several different designs, usually with compatible logic levels
and power supply characteristics within a family.
❖ The families (RTL, DTL, and ECL) were derived from the logic
circuits used in early computers, originally implemented
using discrete components.
DIGITAL ELECTRONICS
Summary
❖ The PMOS and I2L logic families were used for relatively short
periods, mostly in special purpose custom large-scale
integration circuits devices and are generally considered
obsolete.
❖ For example, early digital clocks or electronic calculators may

have used one or more PMOS devices to provide most of the
logic for the finished product.
DIGITAL ELECTRONICS
Summary
❖ Of these families, only ECL, TTL, NMOS, CMOS, and BiCMOS

are currently still in widespread use.
❖ ECL is used for very high-speed applications because of its

price and power demands, while NMOS logic is mainly used
in VLSI circuits applications such as CPUs and memory chips
which fall outside of the scope of this article.
❖ Present-day "building block" logic gate ICs are based on the

ECL, TTL, CMOS, and BiCMOS families.
DIGITAL ELECTRONICS
Summary
❖ A family of simple resistor–transistor logic integrated circuits

was developed at Fairchild Semiconductor for the Apollo
Guidance Computer in 1962. Texas Instruments soon
introduced its own family of RTL.
❖ The first diode–transistor logic family of integrated circuits was

introduced by Signetics in 1962. DTL was also made by Fairchild
and Westinghouse.
❖ The first transistor–transistor logic family of integrated circuits

was introduced by Sylvania as Sylvania Universal High–Level
Logic (SUHL) in 1963. Texas Instruments introduced the 7400
series TTL family in 1964.
DIGITAL ELECTRONICS
Summary
❖ The first CMOS family of logic integrated circuits was

introduced by RCA as CD4000 COS/MOS, the 4000 series, in
1968. Initially CMOS logic was slower than LS-TTL.
❖ However, because the logic thresholds of CMOS were

proportional to the power supply voltage, CMOS devices were
well-adapted to battery-operated systems with simple power
supplies.
DIGITAL ELECTRONICS
Summary
❖ In electronics, a digital-to-analog converter (DAC, D/A, D2A, or

D-to-A) is a system that converts a digital signal into an analog
signal. An analog-to-digital converter (ADC) performs the
reverse function.
❖ When you call someone over the phone, your voice is

converted into an analog electrical signal by a microphone.
Then, an ADC converts the analog signal into a digital one.
DIGITAL ELECTRONICS
Summary
Digital to Analog Converter Working
❖ One widely used DAC design is the R-2R network. This uses
two resistors values with one twice as large as the other. This
lets R-2R scale easily as a method of using resistors to
attenuate and transform the input digital signal and get the
digital to analog converter working.
❖ A binary-weighted resistor is another common example of

DAC. These devices use resistors with outputs that meet at
the single resistor that sums up the resistances. The more
significant parts of the input digital current will give greater
output current. More bits of this resolution will allow more
current to flow through.
DIGITAL ELECTRONICS
Summary
❖ There are two types of ADCs: Direct type ADCs and Indirect
type ADC. This chapter discusses about the Direct type ADCs in
detail.
❖ If the ADC performs the analog to digital conversion directly by

utilizing the internally generated equivalent digital (binary)
code for comparing with the analog input, then it is called
as Direct type ADC.
❖ The following are the examples of Direct type ADCs −

•Counter type ADC
•Successive Approximation ADC
•Flash type ADC
DIGITAL ELECTRONICS
Summary
❖ If an ADC performs the analog to digital conversion by an

indirect method, then it is called an Indirect type ADC.
❖ In general, first it converts the analog input into a linear

function of time (or frequency) and then it will produce the
digital (binary) output.
❖ Dual slope ADC is the best example of an Indirect type ADC.

DIGITAL ELECTRONICS
Summary
Application of ADC
•Used together with the transducer.
•Used in computer to convert the analog signal to digital signal.
•Used in cell phones.
•Used in microcontrollers.
•Used in digital signal processing.
•Used in digital storage oscilloscopes.
•Used in scientific instruments.
•Used in music reproduction technology etc.
DIGITAL ELECTRONICS
Summary
Application of DAC
DACs are commonly used in music players to convert digital

data streams into analog audio signals. They are also used in
televisions and mobile phones to convert digital video data
into analog video signals.
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Department of Electrical & Electronics Engineering

Digital Logic families & Data Converters

❖ Logic families are the logic circuits having identical electrical

❖ It is a group of compatible ICs with the same logic levels and

❖ They are fabricated using a specific circuit configuration which

❖ What is unipolar logic family?

➢ In unipolar logic families, unipolar devices are the key element.

➢ The examples of unipolar families include PMOS, NMOS, and

What is bipolar logic?

❖ Logic families are classified according to the principle type of

Resistor-Transistor Logic (RTL) family

❖ As its name suggests, RTL circuits mainly consists of resistors and

❖ The basic RTL device is a NOR gate is shown here.

❖ The logic level LOW is the voltage that drives corresponding

❖ If either transistor or both of them are applied HIGH input, the

❖ RTL family is characterized by poor noise margin, poor fan-out

One-transistor RTL NOR gate

❖ The logical operation OR is performed by applying

❖ The equivalent resistance of all the resistors connected to

❖ The output is inverted since the collector-emitter voltage of

❖ Early IC logic production (such as Fairchild's in 1961) used the

❖ The disadvantage of RTL is its high power dissipation when the

❖ Another limitation of RTL is its limited fan-in: 3 inputs being

Department of Electrical & Electronics Engineering

Digital Logic families & Data Converters

Diode-Transistor Logic (DTL) family

❖ The diode-transistor logic, also termed as DTL, replaced RTL

❖ As its name suggests, DTL circuits mainly consists of diodes

❖ The basic DTL device is a NAND gate, shown aside.

❖ If any of the diode is conducting i.e. when at least one input is

DTL NAND gate

❖ If all inputs are HIGH, all diodes are non-conducting, transistor

❖ Due to number of diodes used in this circuit, the speed of the

❖ Diode–transistor logic (DTL) is a class of digital circuits that is

❖ It is called so because the logic gating function (e.g., AND) is

Transistor-Transistor Logic (TTL) family

❖ The basic gate of this family is TTL NAND gate.

❖ The different TTL circuits are

➢ Totem pole TTL

Basic TTL NAND Circuitry

✓ Modifications to DTL NAND:

1. The diodes D1, D2 and D3 are replaced by emitter-base

2. Diode DA is replaced by collector-base junction Q1.

3. Diode DB is replaced by emitter-base junction of

The working of this circuit is identical to that of DTL circuit.

Circuit Illustration for Different Input States:

A 3-input TTL NAND Gate with a Totem Pole Output Stage

❖ The operation can be described briefly by three conditions

➢ Condition 1: At least one input is low (that is, 0). Transistor

➢ Condition 2: Each input is high. The emitter base junctions of

Advantages and Disadvantages of TTL Logic Gates

1. TTL family is the fastest saturating logic family (working in

2. Typical supply voltage is only +5 V with a permitted variation

3. It has good noise immunity. Typical noise-margin is about 0.4

Department of Electrical & Electronics Engineering

Digital Logic families & Data Converters

Emitter Coupled Logic (ECL) family(Non saturated type)

❖ The ECL family is fastest of all logic families.

❖ In ECL logic family, logic 0 is represented as about -1.75 V and

❖ Transistor T1 is applied with input and additional inputs are

❖ Thus transistor(s) T1 and T2 are connected in differential

❖ Transistors T3 and T4 are emitter-followers used for DC level-

❖ The positive supply terminal of the circuit is grounded while