ECEG-3101 Logic Circuits & Computer Design

Addis Ababa Institute of Technology (AAIT) School of Electrical and

Computer Engineering
Learning Outcomes

 At the end of the lecture, students should get

familiarized with:
 Digital IC.
 Active high & Active low logic.
 IC characteristics.
 Digital Logic IC families.

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 Digital IC
 What is IC?
 An integrated circuit (IC) is a silicon semiconductor
crystal, called a chip, containing the electronic
components for constructing digital gates.
 Various gates connected inside to form required ckt.
 Logic Gates are the basic building blocks of Digital
Logics and Circuits.
 Digital ICs are often categorized according to the
complexity of their circuits, as measured by the
number of logic gates in a single package.

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Digital IC packaging density
Complexity Gates per chip
Small-scale integration (SSI) < 12

Medium-scale integration (MSI) 12 to 99

Large-scale integration (LSI) 100 to 9999

Very large-scale integration (VLSI) 10,000 to 99,999

Ultra large-scale integration (ULSI) 100,000 to 999,999

Giga-scale integration (GSI) 1,000,000 or more

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Positive and Negative logic
 Choosing the high‐level H to represent logic 1
defines a positive logic system (Active High).
Choosing the low‐level L to represent logic 1
defines a negative logic system (Active Low).

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Positive and Negative logic
 Example

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IC Parameters

 Fan-Out
 Power Dissipation
 Propagation Delay
 Noise Margin

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Fan-Out (Loading)
 Fan-Out specifies number of standard loads
that can be connected to the output of the gate
without degrading its normal operation.
 Standard load is defined by the amount of
current needed by the input of another gate.
 So simply, it is the maximum number of inputs
that can be connected to the output of a gate
and is expressed in number.
 Loading  Overloading

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Fan-Out (Loading)
 Fan-Out is calculated from the amount of
current available in the output gate and the
amount of current needed in each input gate.

 Example, standard TTL gates have the

following values of currents, IOH = 400 µA,
IIH = 40 µA IOL = 16 µA and IIL1.6 µA. Compute
their Fan-out.
Answer, 10
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Power Dissipation
 It is the power dissipated in each gate.
 VCC Supply Voltage.
 ICC Current drawn from supply voltage.
 ICCH Current drawn when output is High.
 ICCL Current drawn when output is Low.

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Power Dissipation

 Example
 A standard TTL circuit which has 4 NAND gates
uses a supply voltage of 5 V and has a current
drains of ICCH 1 mA and ICCL 3 mA. Compute the total
power dissipation.

Answer 40 mW

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Propagation Delay
 
Propagation delay of a gate is the average
transition-delay time for the signal to
propagate from input to output.
 Time taken for the output to change in
response to the changes in the inputs.
 tPHL, tPLH propagation delay when output
changes from H to L and L to H respectively.

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Propagation Delay

 Total Propagation Delay is the product of the

propagation delay of each gate and the total
number of logic levels.

 For high speed circuits, the maximum delay is

more critical than the average.

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Noise Margin
 Noise is a term used to denote undesirable
signal that is superimposed upon the normal
operating signal.
 It can be DC or AC
 Noise margin is the maximum noise voltage
added to an input signal of a digital circuit
without causing an undesirable change in the
circuit output.

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 Noise Margin
 Noise margin
 High state noise margin
 Low state noise margin

 Circuit should be designed that VIL should be

greater than VOL and VIH lower than VOH, To
compensate for any noise signal.
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Digital ICs
 Digital ICs are classified not only by their
complexity or logical operation, but also by the
specific circuit technology to which they belong.
 The circuit technology is referred to as a digital
logic family.
 Each logic family has its own basic electronic
circuit upon which more complex digital circuits
and components are developed.
 The basic circuit in each technology is a NAND,
NOR, or inverter gate.
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Digital IC Logic Family

 RTL : (Resistor-Transistor Logic)

 DTL : (Diode-Transistor Logic)
 TTL : (Transistor-Transistor Logic)
 ECL : (Emitter-Coupled Logic)
 MOS : (Metal-Oxide Semiconductor)
 CMOS : (Complementary MOS)

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Bipolar-Transistor Characteristics
 npn or pnp
 Germanium or Silicon
 Bipolar IC transistors are made with silicon
and are usually npn type.

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Bipolar-Transistor Characteristics

 hFE is transistor parameter called dc current

gain
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Bipolar Transistor Characteristics
 Example: Inverter

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RTL
 The basic circuit of RTL digital logic family is
the NOR gate.
 Low level = 0.2 V and high level from 1 to 3.6V

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DTL
 Diode is adapted from transistor.
 Behaves like base-emitter junction of a
transistor.
If VD < 0.6, off
If On, VD = 0.7

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 DTL
 The basic circuit of DTL digital logic family is the NAND
gate.
 Low level = 0.2 V and high level from 4 to 5 V

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 Modified DTL

 Increases fan out by supplying larger amount of base

current to the output transistor.
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 TTL
 Open collector TTL
 L = 0.2 V and H = 2.4 to 5 V

The multiple emitters

in Q1 behave like the
input diodes in DTL,
because they form a
pn junction.

NAND
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Totem-Pole TTL
 With an active pull-up circuit
replacing the passive pull-up
resistor RL a new configuration
called totem-pole is found.
(Totem-pole: because Q4 sits
on top of Q3)
 This configuration reduces
propagation delay.
 The reason for placing the
diode in the circuit is to
provide a diode drop in the
output path and thus ensure
that Q4 is cutoff when Q3 is
saturated
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Totem-Pole

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 Schottky TTL
 Schottky TTL gate
 Schottky Diode between base and collector. To
remove saturation.
 Diode formed by metal plus semiconductor.
 Usage of Schottky transistors decreases
propagation delay without scarifying power
dissipation.

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Three-State TTL
 Has three output states
1. Low: when the lower
transistor in totem-pole is
on and the upper off.
2. High: when the upper
transistor in totem-pole is
on and the lower off.
3. Open circuit or High Z :
when both transistors are
off.
 Allows wired connection with
other totem-pole gates.

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ECL (Emitter-Coupled Logic)

 Non-saturated digital logic family.

 Propagation Delay : 1~ 2 ns (The fastest)
 Was mostly used in systems requiring very
high speed. E.g. Mainframe computers.
 Very bad power dissipation and noise
immunity
 Noise margin : 0.3 V
 High fan-out possible
 Obsolete
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MOS
 MOS (Metal-Oxide Semiconductor) is a
unipolar transistor
 Consume low power
 Consume small area

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 Digital CMOS
Circuits

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MOS Logic circuits

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CMOS Logic Circuits

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CMOS Logic Circuits

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What to do this week?

 Please read about TTL and CMOS digital IC

families in depth.
 Read about K-maps also!

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