Microelectronics Reliability 49 (2009) 1330–1333

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Microelectronics Reliability
journal homepage: www.elsevier.com/locate/microrel

Characterization of ageing failures on power MOSFET devices by electron

and ion microscopies
D. Martineau a,*, T. Mazeaud b, M. Legros a, Ph. Dupuy b, C. Levade a,c, G. Vanderschaeve a,c
a
CEMES-CNRS, 29 rue Jeanne Marvig, 31055 Toulouse Cedex 4, France
b
Freescale Semiconductor, Inc., Avenue du Général Eisenhower, 31023 Toulouse, France
c
Université de Toulouse, INSA, 31077 Toulouse Cedex, France

a r t i c l e i n f o a b s t r a c t

Article history: Extreme electro-thermal fatigue tests have been performed to failure on power MOSFET devices that
Received 29 June 2009 were later observed using electron and ion microcopy. At variance with devices from the former technol-
Available online 7 August 2009 ogy generation, fatigue-induced ageing of these components is observed only in the source metallization
zone. An increase in drain–source resistance may originate from both a loss of contact between the wire
bondings and the Al layer and/or an extensive decohesion between the metal grains. Failure modes
include local melting of the Al and creation of eutectic alloys.
Ó 2009 Elsevier Ltd. All rights reserved.

1. Introduction
The integration effort on power devices in automobiles requires
a good knowledge of their reliability, which, on the R&D side, im-
plies to have deeper insight in their mode of ageing [1]. The com-
ponents investigated here were developed by Freescale
Semiconductor to support increasingly high electrical loads [2].
There is no current standard test procedure for power device age-
ing because these devices are of many different types, and have to
comply with various specifications [3,4]. The procedure adopted in
this study is an association of extreme cyclic electrical fatigue and
multi-scale structural analysis. The tests have been performed be-
yond the operating limits to assess the limit of device’s robustness
in extreme conditions.
The devices under study gathers on a single frame a MOSFET
power device and a control chip which is able to monitor the elec-
tric fluctuations and to detect errors. Their purpose is to command
the on/off states of light bulbs for cars. The first device under study
contains four areas with 15 mX drain–source resistance (Rdson) at
25 °C [5] while the second one contains two 10 mX Rdson areas
and two 35 mX Rdson areas at 25 °C [6]. The device operates under
a tension of 12 V and a nominal current of 20 A (5 A per area).
In the former generation devices, it appeared that the most
important failure mode was the delamination at the die attach sol-
der between the silicon substrate and the copper heatsink [7]. The
origin of the delamination lies in the large mismatch between the
thermal expansion coefficients of copper and silicon [8]. Here, after
an optimization of the component structure in this new genera-
tion, it is shown that this failure process is no longer operative
* Corresponding author. Tel.: +33 562257831; fax: +33 562257999.
E-mail address: donatien.martineau@cemes.fr (D. Martineau).
and that the fatigue-induced ageing mainly affects the active re-
gion of the MOS, that is the source metal and the wire bondings
[9]. Detailed evidences of the ageing modes of this region are given
and are discussed in terms of possible physical processes leading to
structural changes in the metal layer and bondings.
2. Experimental procedure
Prior to electrical ageing, a set of 10 devices was inspected by
transmitted (SAT) and regular (SAM) acoustic microscopy to eval-
uate potential defects and initial delamination on top and beneath
the power die. X-ray analysis was also done to rule out potential
voids inside the devices. After these initial tests, batches of cou-
pons carrying these power devices were electrically tested in two
similar and thermally regulated electrical benches. Among all the
different tests, the most harmful one consisted in trains of 90 A,
6 ms square electrical pulses followed by a nine times longer pause
at 90 °C. The pulse intensity is high enough to activate an overload
protection that turns off the MOS. Stressed devices were re-exam-
ined by X-ray, SAM and SAT for comparison with initial component
structures. Improved analyses were made on failed devices. The
mold compound was removed by chemical etching, making possi-
ble the Scanning Electron Microscopy (SEM) observation of the
metallization and Al wires. Energy Dispersive X-ray (EDX) analyses
were carried out to reveal a potential evolution of the composition
of the different Al alloys. We focused mainly on the active MOS
area: Al wires and metallization, silicon substrate and polysilicon
spacers. Transmission Electron Microscopy (TEM) cross-sections
were prepared using a tripod and diamond lapping films while fi-
nal electron transparency was attained with Ar ion bombardment.
In regions hardly accessible with tripod preparation such as Al
bonding and Al metallization, TEM cross-sections were made using

0026-2714/$ - see front matter Ó 2009 Elsevier Ltd. All rights reserved.
doi:10.1016/j.microrel.2009.07.011
 D. Martineau et al. / Microelectronics Reliability 49 (2009) 1330–1333 1331

3. Results

Investigations were first carried out on functional components.

The first step was to measure the evolution of the Rdson. This
parameter always increased after electrical ageing, but the rise
was different between components of a same batch (Fig. 1). In
our tests, the larger augmentation reached 30% in functional com-
ponents. The second step was to compare SAM and SAT results be-
fore and after electrical tests. We investigated both the mold
compound/die and leadframe delamination by SAM and the die at-
tach delamination by SAT. These analyses did not show any delam-
ination at the die attach nor under the mold (Fig. 2). This result
demonstrates the better ability of this new generation of devices
to maintain a constant evacuation of heat between the silicon
and the copper heat sink (delamination was identified as the main
failure mode in devices from the former generation [7]). We also
compared X-ray observations before and after electrical tests. As
in the preceding generation of switches, we did not notice any
growth of the initial voids in the solder between the leadframe
Fig. 1. Distribution of Rdson evolution for six different stressed devices which have
undergone a 100 mX short circuit after 842,000 cycles at 40 °C. These components and the power die.
were still operative but theirs Rdson increased from 11% to 16%. As illustrated by Fig. 2, delamination was not observed in these
components. In fact, we found that most of the degradation oc-
curred in the active transistor region that is either in the Al met-
a Focused Ion Beam (FIB) apparatus equipped with a allization of the source or in the wire bondings that carry the
micromanipulator. current to this metallization. This hypothesis was supported by lo-

Fig. 2. Acoustic microscopy images of an aged device. Delaminations are observed by SAM at the mold (a) and by SAT at the die attach (b). The control and power die are
indicated by white lines. Red zones in (a) correspond to delaminated area between the mold and the power die and black zones in (b) correspond to delaminated area
between the power die and the leadframe. In (c) the white arrow points to a void in solder between the power die and the leadframe. (For interpretation of the references in
colour to this figure legend, the reader is referred to the web version of this article.)

Fig. 3. SEM images of Al metallization and Al wire bonding. White arrows indicate cracks in and under Al wire bonding. In (c) black arrow indicates mold debris present in
cracks (those can be the result of a local heating or to the post mortem chemical etching of the mold).
1332 D. Martineau et al. / Microelectronics Reliability 49 (2009) 1330–1333

Fig. 4. SEM images of the Al metallization of devices under study. Before tests (a), the Al surface is smooth and individual grains cannot be detected. The destructured
metallization in (b) corresponds to a stressed device which has undergone an 85 A square electrical pulse during 250,000 cycles at 85 °C. This component was still operative
but its Rdson increased about 30%. White arrows show some inter-granular cracks in the metallization layer.

Fig. 5. TEM images of Al wires. Al grains with various crystalline orientations are observed in an untested Al wire (a). In a burned out Al wire a single crystallographic
orientation is found for all Al grains and sub-grains (b). White arrows in (c) indicate Si grains between Al sub-grains. This microstructure is typical of a high temperature
eutectic alloy formation between Si and Al.

cal electrical measurements carried out on one device that
showed an increase of Rdson of 30% between wire bonds and Al
metallization. SEM observations of the wire bondings revealed
that cracks where present across the wire section (Fig. 3). Most
of these cracks span over a small section of the wire and are un-
likely to cause such an increase of resistance in the wire. Some
cracks were however observed below the wire, at the interface
with the Al layer (Fig. 3b). Plane view SEM observations cannot
reveal how far these cracks go. If they crawl underneath the wire
from one side to the other, they could lead to a complete detach-
ment of the wire from the metallization. Even incomplete, such a
delamination could result in a substantial increase of the resis-
tance between the wire and the active cells. Especially if some
mold debris are absorbed in these cracks during the electrical
tests (Fig. 3c).
Other SEM observations clearly point to the degradation
undergone by the metallization. Fig. 4 represents the surface
of the device before testing (a) and after 250,000 cycles at
85 °C with an 85 A square electrical pulse (b). Square struc-
tures in (a) correspond to transistor cells. The metallization
underwent a complete degradation in (b) characterized by
many inter-granular cracks in the stressed metallization.
These cracks are probably formed by stress and tempera-
ture-induced accelerated diffusion at the grain boundaries
[10–12]: a severe loss of contact between Al grains, which
is not complete here, could again induce an increase of the
total source resistance.
Investigations were also performed on components that were
no longer operative after electrical tests. Some of them burned,
probably because the resistance drastically increased, thus leading
to an abrupt temperature upsurge. Regular TEM preparation was
not possible in case of burned out Al wire so FIB lamellae had to
be extracted from the damaged region and then analyzed by means
of EDX and TEM. We observed both a migration of Si from the ac-
tive area of the MOS to the Al wire and a complete reorganization
of Al grains of the wire (Fig. 5). In Fig. 5b, a crystallographic anal-
ysis showed that the whole TEM section consisted in one unique
Al grain divided by Si grains, Al–Si eutectic alloy bands and sub-
grains, which is a proof that a local melting of the Al metallization
occurred in this region.
Further analysis is currently carried out to pinpoint the local
micro-structural changes that could lead to a severe resistance
and then temperature increase that could explain such major
transformations in the Al layer.
 D. Martineau et al. / Microelectronics Reliability 49 (2009) 1330–1333
Acknowledgement
The authors would like to thank the Regional Council of Région
Midi-Pyrénées for its financial support.
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