Horizontal Stabilizer Trim Control System

Horizontal Stabilizer Trim Control System Training and Troubleshooting presentation

The intent of this presentation is to provide an overview of the CL-604 HSTCS to better
understand the operation. In addition, assist the maintenance technician to efficiently
troubleshoot failures and clearly define the different maintenance diagnostic data.

Prepared by: Joel Levasseur

This document shall only be used as a training aid

Horizontal Stabilizer Trim Control System

For training purpose only (001)

2
 Horizontal Stabilizer Trim Control System

LIST OF ACRONYMS
BITE: Build In Test Equipment
CH: Channel
CPU: Central Processing Unit
DCU: Data concentrator unit
DIR: Dispatch Interruption Rate
EICAS: Engine Indication and Crew Alerting System
FIM: Fault Isolation Manual
HSTA: Horizontal Stabilizer Trim Actuator
HSTAB: Horizontal Stabilizer
HSTCS: Horizontal Stabilizer Trim Control System
HSTCU: Horizontal Stabilizer Trim Control Unit
LBL: Label
MCU: Motor Control Unit
MDC: Maintenance Diagnostic Computer
MTBUR: Mean Time Between Unit Removal
NVM: Non-Volatile Memory
PBIT: Power Up Build In Test
PWM: Pulse Width Modulation
RAM: Random access memory
SL: Service Letter
WOW: Weight on wheel

For training purpose only (001)

3
HSTCS - Description

¾ General
• The HSTCS changes the angle of incidence of the horizontal stabilizer
• The range angle of the stabilizer is between 0 degree (leading edge up)
and -9 degree (leading edge down)
• The HSTCS contains the components that follow:
- One Horizontal Stabilizer Trim Control Unit (HSTCU)
- One Motor Control Unit (MCU)
- One Horizontal Stabilizer Actuator (HSTA)
- Two disconnect switches (pilot and co-pilot)
- Two trim switches (pilot and co-pilot)
- One pitch trim control panel which contains two trim channel
engage switches and one Mach trim engage switch

For training purpose only (001)

4
HSTCS - Description
¾ Component Details - HSTCU
• The HSTCU is located on the left hand
side of the avionic bay
•The HSTCU contains 2 independent and
identical channels and 1 BITE module:
- Channel 1 & 2 : priority code logic,
mach trim function & takeoff
position comparator
- BITE Module: Common to both
channels
•It is powered by 2 independent power
sources:
- 28Vdc Bus 2 (CH1)
- 28Vdc Essential bus (CH2)
•In normal configuration, channel 1 & 2
are engaged. CH1 is in command and
CH2 operates as a standby
For training purpose only (001)
5
HSTCS - Description

¾ Component Details - MCU

• The motor control unit is attached to the
vertical stabilizer structure, immediately
forward of the HSTA
• The MCU is composed of 2 identical and
independent channels
• It is powered by 2 independent power
sources:
- 115Vac (3 phases) Bus 2 (CH1)
- 115Vac (3 phases) Essential bus (CH2)
•The electrical power from each bus goes
through a full-wave rectifier circuit in the MCU.
These circuits supply 270 Vdc to the motors of
the HSTA
• The MCU receives commands from the
HSTCU used to generate the power required
for the HSTA motors
For training purpose only (001)
6
HSTCS - Description

¾ Component Details - HSTA

• The HSTA is collocated with the MCU

• The HSTA is mounted with a universal-
type gimbals, which makes it structurally
and mechanically fail-safe
•The HSTA is supplied and controlled by
the MCU/HSTCU
• The HSTA contains the components
that follows (non Line Replaceable Unit):
- Two electric motor assemblies
- One screw jack and gearbox
module
- Four position sensors

For training purpose only (001)

7
HSTCS - Description

¾ Component Details - Disconnect Trim Switch

• The manual trim disconnect

switch is located near the pilot/co-
pilot manual trim switch on the
control wheel Trim disconnect
switch
• It is a red button, and is double
pole, normally closed, momentary
action pushbutton switch
• The function of the switch is to
disengage both channels of the
HSTCS
• Time to disconnect:
•HSTCU -8 : 1ms
•HSTCU -9 : 100ms

For training purpose only (001)

8
HSTCS - Description

¾ Component Details - Trim Switch

• The trim switch is located on top end of

the control wheel, on the outboard horns
• It is an independently operated, DPDT,
center off, momentary action switch
• Both segments need to be activated to
get valid trim command
•When operated, the switch controls the
direction of manual trim
•The pilot trim switch has priority over
the copilot trim switch
•The manual trim switches have priority
over auto-pilot pitch trim commands and
Mach trim commands (Mach trim
function to be covered later)

For training purpose only (001)

9
HSTCS - Description

¾ Component Details - Engage Switches

• The Channels trim and Mach trim

engage switches are located on the
central pedestal
• When the channel engage switch is
pushed in, the corresponding channel is
engaged. To disengage, use the trim
disconnect switch
• The Mach trim function can be enabled
or disabled with the Mach trim engage
switch

For training purpose only (001)

10
HSTCS - Schematic

MDC (DCU)

(Message/position)

(2X)
(Mach Trim)

(Full speed when flaps

moving)

For training purpose only (001)

11
HSTCS - EICAS Messages

CONFIG STAB STAB CH1 INOP

STAB TRIM STAB CH2 INOP
MACH TRIM

For training purpose only (001)

12
HSTCS - EICAS Messages
There is an interface between the HSTCS and the EICAS. These following
EICAS messages can be shown:
• CONFIG STAB warning message
All the conditions that follow are present:
¾ Stabilizer position not in the green band or both channels are
inoperative; and
¾A/C on ground
¾Both engines N1 > 70%
¾ No thrust reverser command
•STAB TRIM caution message
¾ The 2 Stab trim Channels are not engaged or invalid (failed)
• MACH TRIM caution message
¾ Mach trim status is invalid (failed) or Mach trim is not engaged

For training purpose only (001)

13
HSTCS - EICAS Messages
•STAB CH1 INOP status message
¾ HSTCU STAB TRIM Channel 1 not engaged or invalid (failed) with
Channel 2 engaged
• STAB CH2 INOP status message
¾ HSTCU STAB TRIM Channel 2 not engaged or invalid (failed) with
Channel 1 engaged
•AP PITCH TRIM
¾ Autopilot pitch trim failure alert bit sent by any IAPS quadrant
• AP TRIM IS ND
¾ Mistrim condition found by any IAPS quadrant in pitch axis (nose
down)
• AP TRIM IS NU

¾ Mistrim condition found by any IAPS quadrant in pitch axis (nose up)

For training purpose only (001)

14
HSTCS - EICAS Messages / Aural Warning

TYPE CONDITION
This clacker operates when the rate of
horizontal stabilizer movement is
Aural Warning (a
determined to be more than 0.45
clacker)
degree per second for more than three
seconds
This aural warning is posted along
with the CONFIG TRIM warning EICAS
message
Config Trim Aural
Stabilizer position not in the green
Warning
band or both channels are inoperative;
and on the ground Both engines N1 >
70% ; No thrust reverser command;

For training purpose only (001)

15
 HSTCS - Operation
¾ Channel 1 Electrical Block Diagram
Mach Engage
Pilot-Copilot Trim SW
115VAC BUS 2
Pilot-Copilot DISC SW CB2-B8

PWM Command and Power and Speed 3 Phases motor

direction sign module brush less
Generator motor
5V sensor speed sensor
supply

Monitoring of speed Hall sensor

and direction Speed/Dir module

Chan1 Motor 2 brake

Chan 1 ON Logic
engage release

Motor 1 brake
Motor 1 brake release
release
Valid monit module Motor 1 temp
HSTA MCU valid sensor

MCU temp sensor

28VDC BUS 2 RVDT Supply

28V supply module
CB2-F5
RVDT monit and RVDT11
electrical stops RVDT21

For training purpose only (001)

16
 HSTCS - Operation
¾ Channel 2 Electrical Block Diagram
Mach Engage
Pilot-Copilot Trim SW
115VAC ESS BUS
Pilot-Copilot DISC SW CB3-A5

PWM Command and Power and Speed 3 Phases motor

direction sign module brush less
Generator motor
5V sensor speed sensor
supply

Monitoring of speed Hall sensor

and direction Speed/Dir module

Chan2 Motor 1 brake

Chan 2 ON Logic
engage release

Motor 2 brake
Motor 2 brake release
release
Valid monit module Motor 2 temp
HSTA MCU valid sensor

MCU temp sensor

28VDC ESS
BUS 28V supply module RVDT Supply
CB2-F5
RVDT monit and RVDT12
electrical stops RVDT22

For training purpose only (001)

17
HSTCS - Operation
¾ HSTCS Characteristics -- Speed
The HSTCU commands 3 different speeds:
• High Speed (100%), corresponds to 0.5 degrees per second
• In manual trim operation (full authority)
• In Autopilot Mode during Flap transition

• Low Speed (20%) corresponding to 0.1 degree per second

• In Autopilot Mode

• Very Low Speed (6 or 12%) corresponding to 0.03 or 0.06 degree per

second
• In Mach Trim Mode
• The speed or surface movement is depending on the actual A/C
speed

For training purpose only (001)

18
HSTCS – Operation

¾ HSTCS Characteristics -- Fault Monitoring

Power-up Built-In Test (PBIT)
The power up self check verifies the BITE card and is automatically initiated at
power up or after a power interruption >than 200 ms

Continuous Built-In Test (CBIT)

Monitors the active channel and records system malfunctions (including
intermittent faults) in a Non Volatile Memory in the event a fault occur during
flight or on the ground. It is important to remember that some bits are latched in
the NVM of the HSTCU.

Built-In Test Equipment (BITE) (ground maintenance test)

The BITE test verifies active and dormant elements within the HSTCS. The
following elements are verified:
9 Mach Trim function engagement and disengagement
9 Operation of the whole system at max speed on each channel
9 Operation of the HSTA brakes
9 Operation of the Mach Trim function

For training purpose only (001)

19
HSTCS - Operation
¾ HSTCS Characteristics -- Fault Monitoring (CBIT)
• In normal configuration (both channel engaged), when a fault is present
for more than 450ms on CH1, the system will automatically transfer to CH2
within 180 milliseconds
• The fault monitoring of CH2 is effective only if channel 2 is in command

¾ HSTA Validity Loss

•For each channel, the MCU-HSTA validity signal enables to engage the
corresponding channel
• The validity is given based on the HSTA motor overheat temperature, the
MCU overheat temperature and the presence of the 3 phases 115Vac power
supply to the MCU

For training purpose only (001)

20
HSTCS - Operation
¾ HSTCS Characteristics - MDC - Fault Monitoring (label 273)
STAB CHAN 1 (2) INOP will
follow
HSTA validity N1 Bit 11

RVDT 11 Comparator Bit 12

RVDT 21
D RVDT/dt
variation Bit 13
Comparator
Speed motor
Frequency
feedback Bit 17
Adaptation module Low and High
speed comparator Bit 18
PI or COI or AP
PWM Operating lane
commands Comparator Bit 15
PWM monit lane

Direction monit lane Comparator Bit 14

Direction operating lane

Motor direction Comparator Bit 16

feedback
Simultaneous U/D
Bit 21
monit lane

Simultaneous U/D Bit 22

operating lane
MACH TRM will follow
SPD Law Comp Mach Spd
Bit 25
Law
SPD Law
ADC1
Comp ADC Bit 23
ADC2
For training purpose only (001) MACH LAW1 (rvdt)
Comparator Bit 24 21
MACH LAW2 (rvdt)
 HSTCS - Operation
ƒ Label 273 bit 11 Bit 11

• HSTCU failed IMPORTANT: Bit 11 does not directly indicate a HSTCU failure

• This bit is set to 1 in 2 cases:

- One of the bits 12 to 18 is set to 1
- Failure detected by the HSTCU CBIT
- As a consequence, HSTCU channel disengagement
- Validity error from HSTA-MCU
- No other bit set to 1
- As a consequence, HSTCU channel disengagement

• Most probable causes of failure if ONLY this bit is set:

- Loss of one 28Vdc power supply for more than 200 ms
(external cause)
- Loss of 115V ac power supply (external cause)
- MCU internal failure, most often due to the housing temperature probe
- Motor temperature probe overheat detection, or probe failure
- HSTCU interface (low probability)

• This bit is reset under channel re-engagement

For training purpose only (001)

22
 HSTCS - Operation

ƒ Label 273 bit 12 Bit 12

• Delta Position monitor tripped

• This bit is set to 1 under the following condition:

- The HSTCU detects a difference between both position feedback from RVDTs of the
corresponding channel: 0.95 ± 0.2°stab
- Failure detected by the HSTCU CBIT
- As a consequence, HSTCU channel disengagement

• Most probable causes of failure:

- HSTA
- HSTCU interface (low probability)

• This bit is latched until a successful ground test

For training purpose only (001)

23
 HSTCS - Operation

ƒ Label 273 bit 13 Bit 13

• Delta Velocity monitor tripped

• This bit is set to 1 under the following condition :

- The HSTCU detects a difference between MCU velocity feedback and velocity
calculated by the HSTCU from RVDTs position signal > than 0.1 ± 0.05°/s stab
- Failure detected by the HSTCU CBIT
- As a consequence, HSTCU channel disengagement

• Most probable causes of failure:

- HSTA
- MCU

• This bit is latched until a successful ground test

For training purpose only (001)

24
 HSTCS - Operation

ƒ Label 273 bit 14 Bit 14

• CTRL U/D (Control Up/Down) monitor tripped

• This bit is set to 1 under the following condition :

- The HSTCU detects a difference between HSTCU direction command sent to MCU
and direction command monitoring
- Failure detected by the HSTCU CBIT
- As a consequence, HSTCU channel disengagement

• Most probable cause of failure:

- HSTCU

• This bit is latched until a successful ground test

For training purpose only (001)

25
 HSTCS - Operation

ƒ Label 273 bit 15 Bit 15

• CTRL PWM (Control Pulse Width Modulation)monitor tripped

• This bit is set to 1 under the following condition:

- The HSTCU detects a difference between HSTCU speed command sent to MCU and
speed command monitoring
- Failure detected by the HSTCU CBIT
- As a consequence, HSTCU channel disengagement

• Most probable cause of failure:

- HSTCU

• This bit is latched until a successful ground test

For training purpose only (001)

26
 HSTCS - Operation

ƒ Label 273 bit 16 Bit 16

• CTRL/HSTA U/D monitor tripped

• This bit is set to 1 under the following condition:

- The HSTCU detects a difference between HSTCU direction command and MCU
direction feedback
- Failure detected by the HSTCU CBIT
- As a consequence, HSTCU channel disengagement

• Most probable causes of failure:

- MCU
- HSTCU (low probability)
- HSTA (low probability)

• This bit is latched until a successful ground test

For training purpose only (001)

27
 HSTCS - Operation

ƒ Label 273 bit 17 Bit 17

• CTRL/HSTA low-speed monitor tripped

• This bit is set to 1 under the following condition:

- The HSTCU monitors the delta between HSTCU low speed command and MCU low
speed feedback
- Failure detected by the HSTCU CBIT
- As a consequence, HSTCU channel disengagement

• Most probable cause of failure:

- MCU
- HSTCU (low probability)
- HSTA (low probability)

• This bit is latched until a successful ground test

For training purpose only (001)

28
 HSTCS - Operation

ƒ Label 273 bit 18 Bit 18

• CTRL/HSTA high-speed monitor tripped

• This bit is set to 1 under the following condition:

- The HSTCU monitors the delta between HSTCU high speed command and MCU high
speed feedback
- Failure detected by the HSTCU BIT
- As a consequence, HSTCU channel disengagement

• Most probable causes of failure:

- MCU
- HSTCU (low probability)
- HSTA (low probability)

• This bit is latched until a successful ground test

For training purpose only (001)

29
 HSTCS - Operation

ƒ Label 273 bit 21 Bit 21

• Simultaneous Up/Down Commands (Monitor Circuit)

• This bit is set to 1 under the following condition:

- When the monitoring circuit detects that the control circuit is generating both an up and
a down command.
- Anomaly detected by the HSTCU CBIT
- No HSTCU channel disengagement
- No MACH TRIM function disengagement

• Most probable causes of failure:

- Pilot or Co-Pilot trim command switch.
- The HSTCU (low probability).

• This bit is latched until a successful ground test

For training purpose only (001)

30
 HSTCS - Operation

ƒ Label 273 bit 22 Bit 22

• Simultaneous Up/Down Commands (Control Circuit)

• This bit is set to 1 under the following condition:

- When the monitoring circuit detects that the control circuit is generating both an up and
a down command.
- Anomaly detected by the HSTCU CBIT
- No HSTCU channel disengagement
- No MACH TRIM function disengagement

• Most probable causes of failure:

- Pilot or Co-Pilot trim command switch.
- The HSTCU (low probability).

• This bit is latched until a successful ground test

For training purpose only (001)

31
 HSTCS - Operation

ƒ Label 273 bit 23 Bit 23

• Delta Mach monitor tripped

• This bit is set to 1 under the following condition:

- The HSTCU determines that the MACH numbers received from the two Air Data
Computer are not within an acceptable range
- Anomaly detected by the HSTCU CBIT
- No HSTCU channel disengagement
- As a consequence, MACH TRIM function disengagement

• Most probable causes of failure:

- Inconsistency between the 2 ADC
- Wiring fault between the ADC and the HSTCU (low probability)

• This bit is latched until a successful ground test

For training purpose only (001)

32
 HSTCS - Operation

ƒ Label 273 bit 24 Bit 24

• Mach Trim position monitor tripped

• This bit is set to 1 under the following condition:

- The HSTCU determines that the predicted HSTA position is not in accordance with the
position feedback coming from the #2 RVDT of each channel
- Anomaly detected by the HSTCU CBIT
- No HSTCU channel disengagement
- As a consequence, MACH TRIM function disengagement

• Most probable cause of failure:

- HSTA
- HSTCU (low probability)

• This bit is latched until a successful ground test

For training purpose only (001)

33
 HSTCS - Operation

ƒ Label 273 bit 25 Bit 25

• Mach Trim speed monitor tripped

• This bit is set to 1 under the following condition:

- The HSTCU determines that the MACH trim speed command generated by the two
channels of the HSTCU are not within an acceptable range
- No HSTCU channel disengagement
- As a consequence, MACH TRIM function disengagement

• Most probable cause of failure:

- HSTCU

• This bit is latched until a successful ground test

For training purpose only (001)

34
HSTCS - Operation
¾ MDC BIT Versus Message Logic
MDC LBL BITS
LBL 273 LBL 350 LBL 272 description
MDC LBL BITS
description
11 12 HSTA brakes fail
EICAS messages
Delta Position 12
STAB CHAN X INOP
Delta Velocity 13 or STAB TRIM
MACH TRIM
U/D Monitoring 14

PWM Monit 15

U/D HSTA 16 11 Maintenance required

HSTA Low Speed 17

HSTA High Speed MDC LBL BITS
18
description
U/D Command operating 21
U/D Command monit 22 HSTCU failed
21
ADC Delta Mach 23

Delta Mach Position 24

Delta Mach Law 25

AP high trim 26

WOW 27

For training purpose only (001)

35
 HSTCS - Operation
¾ HSTCS Characteristics -- Fault Monitoring (CBIT)
• The HSTCU record system malfunctions in a NVM in the event a fault
occurs during flight or on the ground
IMPORTANT: Always remember that some bits are latched
in the NVM until the HSTCU memory is cleared (red + green
button) or a successful BITE test is performed (blue button)
HSTCU
front panel
1 2 3 4 5 6
MDC bits
Label 270 bit 14 1 1 1 0 0 0

Label 270 bit 15 0 0 1 0 0 0

A/C flight

A/C flight
A/C flight

Label 270 bit 16 0 0 1 0 0 0

Label 273 bit 16 0 0 1 0 1 0
Label 273 bit 17 0 0 0 0 0 0
Label 273 bit 21 0 1 1 0 0 0

Simul U/D Monitor/ HSTA Successful Monitor/ HSTA Snag fixed

Commands direction BITE test direction +
monitor monitor Successful BITE
+ test
Engaged
For training purpose only (001)
Switches 36
 HSTCS - FIM Troubleshooting & Testing
¾ Ground Maintenance BITE test
IMPORTANT: Before performing a BITE test, ensure the Stab is in the green band
• Condition of activation
- WOW
- HSTCU front door opened
- Activation of the test by depressing the blue push button
Note: During the test (166 sec), the front panel LED’s flash one after the other

• Pass-fail condition
- Pass: Green LED flashes
- Fail: Red LED indicates the failed LRU

In Case of emergency, it is possible to stop the test by:

- Depressing the red A push button
- Depressing the pilot or copilot disconnect switch
- Closing the HSTCU front door

For training purpose only (001)

37
HSTCS - FIM Troubleshooting & Testing
¾ MCU/HSTA Troubleshooting
Normal configuration
Normal wiring installation on A/C

Configuration 2
Cables are crossed between HSTA and MCU

Configuration 3
Cables are crossed between MCU and A/C wiring. To do so, a
specific cable (patch cable) is required. We are looking to the
possibility to have this patch cable available in the GSE manual.

For training purpose only (001)

38
HSTCS - FIM Troubleshooting & Testing

¾ MCU/HSTA Troubleshooting

¾ If CH1 stays ON at the end of test:

Proposed troubleshooting:
- Apply wiring configuration 3 and re-launch
a BITE test
- If CH1 stays ON, replace HSTCU
- If CH2 stays ON, MCU or HSTA
must be suspected
- Apply wiring configuration 2 and re-launch
a BITE test
- If CH1 stays ON, replace MCU
- If CH2 stays ON, replace HSTA

For training purpose only (001)

39
HSTCS - FIM Troubleshooting & Testing

¾ MCU/HSTA Troubleshooting

¾ If CH2 stays ON at the end of test:

Proposed troubleshooting:
- Apply wiring configuration 3 and re-launch
a BITE test
- If CH2 stays ON, replace HSTCU
- If CH1 stays ON, MCU or HSTA
must be suspected
- Apply wiring configuration 2 and re-launch
a BITE test
- If CH2 stays ON, replace MCU
- If CH1 stays ON, replace HSTA

For training purpose only (001)

40
HSTCS - FIM Troubleshooting & Testing

¾ MCU/HSTA Troubleshooting

¾ If MOTOR 1 stays ON at the end of test:

Proposed troubleshooting:
- Apply wiring configuration 2 and re-launch
a BITE test
- If MOTOR1 remains ON at the end
of the test, replace the MCU
- If MOTOR2 remains ON at the end
of the test, replace the HSTA

For training purpose only (001)

41
HSTCS - FIM Troubleshooting & Testing

¾ MCU/HSTA Troubleshooting

¾ If POSIT 1 stays ON at the end of test:

Proposed troubleshooting:
- Apply wiring configuration 2 and re-launch
a BITE test
- If POSIT1 remains ON at the end of
the test, replace the MCU
- If POSIT2 remains ON at the end of
the test, replace the HSTA

For training purpose only (001)

42
HSTCS - FIM Troubleshooting & Testing

¾ MCU/HSTA Troubleshooting

¾ If MOTOR 2 stays ON at the end of test:

Proposed troubleshooting:
- Apply wiring configuration 2 and re-launch
a BITE test
- If MOTOR2 remains ON at the end
of the test, replace the MCU
- If MOTOR1 remains ON at the end
of the test, replace the HSTA

For training purpose only (001)

43
HSTCS - FIM Troubleshooting & Testing

¾ MCU/HSTA Troubleshooting

¾ If POSIT 2 stays ON at the end of test:

Proposed troubleshooting:
- Apply wiring configuration 2 and re-launch
a BITE test
- If POSIT 2 remains ON at the end of
the test, replace the MCU
- If POSIT 1 remains ON at the end of
the test, replace the HSTA

For training purpose only (001)

44
HSTCS - FIM Troubleshooting & Testing

¾ MCU/HSTA Troubleshooting

¾ If ACTUATOR stays ON at the end of test:

Proposed troubleshooting:
- Replace the HSTA

For training purpose only (001)

45
HSTCS – Additional information

• Troubleshooting assistance
For any additional troubleshooting assistance you may contact your local Field
Service Representative.

For training purpose only (001)

46