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FDC658P
S
General Description D
D
This P−Channel Logic Level MOSFET is produced using onsemi’s
advanced POWERTRENCH process that has been especially tailored G
D
to minimize the on−state resistance and yet maintain low gate charge Pin 1 D
for superior switching performance. These devices are well suited for TSOT23 6−Lead
notebook computer applications: load switching and power (SUPERSOT−6)
management, battery charging circuits, and DC/DC conversion. CASE 419BL
Features
• −4 A, −30 V MARKING DIAGRAM
♦ RDS(ON) = 0.050 W @ VGS = −10 V
♦ RDS(ON) = 0.075 W @ VGS = −4.5 V
• Low Gate Charge (8 nC Typical) 658 M
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, unless otherwise noted) PIN ASSIGNMENT
Symbol Parameter Value Unit
VDSS Drain−Source Voltage −30 V
1 6
VGSS Gate−Source Voltage − Continuous ±20 V
ID Drain Current − Continuous (Note 1a) −4 A
2 5
− Pulsed −20
PD Maximum Power Dissipation (Note 1a) 1.6 W
(Note 1b) 0.8 3 4
Symbol Parameter Max Unit FDC658P TSOT23−6 3000 / Tape & Reel
(Pb−Free)
RqJA Thermal Resistance, 78 °C/W
Junction−to−Ambient (Note 1a) †For information on tape and reel specifications,
including part orientation and tape sizes, please
RqJA Thermal Resistance, 30 °C/W
refer to our Tape and Reel Packaging Specifications
Junction−to−Case (Note 1)
Brochure, BRD8011/D.
1. RqJA is the sum of the junction−to−case and case−to−ambient thermal
resistance where the case thermal reference is defined as the solder
mounting surface of the drain pins. RqJC is guaranteed by design while RqCA
is determined by the user’s board design.
a. 78°C/W when mounted on a 1 in2 pad of 2 oz Cu on FR−4 board.
b. 156°C/W when mounted on a minimum pad of 2 oz Cu on FR−4 board.
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2
FDC658P
DRAIN−SOURCE ON−RESISTANCE
20 2
VGS = −10 V −6.0 V
−4.5 V 1.8 VGS = −4.0 V
RDS(on), NORMALIZED
16
−4.0 V
1.6 −4.5 V
12
−5.0 V
1.4
−3.5 V
8 −6.0 V
1.2
−8.0 V
4
−3.0 V 1
−10.0 V
0 0.8
0 1 2 3 4 0 4 8 12 16 20
−VDS, DRAIN−SOURCE VOLTAGE (V) −ID, DRAIN CURRENT (A)
1.6 0.16
1.4
0.12
1.2
0.08
TJ = 125°C
1
0.04 TJ = 25°C
0.8
0.6 0
−50 −25 0 25 50 75 100 125 150 2 4 6 8 10
TJ, JUNCTION TEMPERATURE (°C) −VGS, GATE TO SOURCE VOLTAGE (V)
20 20
VDS = −5 V 10 VGS = 0 V
−ID, DRAIN CURRENT (A)
TJ = −55°C 125°C
16
25°C 1
TJ = 125°C
12 25°C
0.1
8 0.01
−55°C
4 0.001
0 0.0001
1 2 3 4 5 6 0 0.2 0.4 0.6 0.8 1 1.2 1.4
−VGS, GATE TO SOURCE VOLTAGE (V) −VSD, BODY DIODE FORWARD VOLTAGE (V)
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3
FDC658P
CAPACITANCE (pF)
VDS = −5 V −10 V 1000 Ciss
6
−15 V
300 Coss
4
Crss
100
2
f = 1 MHz
VGS = 0 V
0 30
0 3 6 9 12 15 0.1 0.3 1 3 7 15 30
Qg, GATE CHARGE (nC) −VDS, DRAIN TO SOURCE VOLTAGE (V)
80 5
SINGLE PULSE
30 100 ms
RqJA = 156°C/W
−ID, DRAIN CURRENT (A)
RDS(ON) LIMIT
4 TA = 25°C
10
1 ms POWER (W)
3 10 ms 3
1 100 ms
0.3 1s 2
VGS = −10 V
0.1 SINGLE PULSE DC
RqJA = 156°C/W 1
0.03
TA = 25°C
0.01 0
0.1 0.2 0.5 1 2 5 10 20 50 0.01 0.1 1 10 100 300
−VDS, DRAIN−SOURCE VOLTAGE (V) SINGLE PULSE TIME (s)
Figure 9. Maximum Safe Operating Area Figure 10. Single Pulse Maximum Power
Dissipation
TRANSIENT THERMAL RESISTANCE
1
D = 0.5
r(t), NORMALIZED EFFECTIVE
0.5
0.2 RqJA (t) = r(t) x RqJA
0.2
0.1 RqJA = 156°C/W
0.1
0.05
P(pk)
0.05
0.02 t1
0.02 t2
0.01
0.01 TJ − TA = P x RqJA (t)
Single Pulse Duty Cycle, D = t1 / t2
0.005
0.00001 0.0001 0.001 0.01 0.1 1 10 100 300
t1, TIME (s)
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SUPERSOT is trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other
countries.
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4
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSOT23 6−Lead
CASE 419BL
ISSUE A
1 DATE 31 AUG 2020
SCALE 2:1
GENERIC
MARKING DIAGRAM*
XXX MG
G
1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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