This article has been accepted for publication in a future issue of this journal, but has not been
fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2019.2892499, IEEE
Journal of Emerging and Selected Topics in Power Electronics
High Step-Up Y-source Coupled-Inductor Impedance
Network Boost DC-DC Converters with Common Ground
and Continuous Input Current
Yuliang Ji, Hongchen Liu, Member, IEEE, Feng Yong, Senior Member, IEEE, Fengjiang Wu, Member, IEEE and Pat
Wheeler, Senior Member, IEEE
Abstract—High step-up Y-source coupled-inductor
impedance network boost DC-DC converter with common
ground and continuous input current is presented in this
paper. The proposed converter has added auxiliary diodes
and capacitors to three-winding Y-shape coupled inductor
cells to constitute the current conduction path and realize the
voltage-double function. Compared to other magnetically
coupled boost converters, the proposed converter can
produce the higher voltage gain with more degrees of
freedom in winding match. The same output gain can be
obtained by using different winding turn ratios. Also, the
proposed converter has a common ground and realizes the
continuous input current. The corresponding topologies and
steady operation principles are analyzed. The experimental
results in a 300W prototype have verified the validity of the
theoretical analysis.
Index Terms—common ground, continuous input current,
high gain, magnetically coupled, voltage-double
I. INTRODUCTION
Renewable energy systems such as wind energy, fuel cell,
photovoltaic systems have gradually been applied in more
circumstances for meeting electrical power demand [1-3]. To
transmit renewable energy to power grid, DC-DC converters are
added between input source and conventional inverters to realize
the voltage-boost performances, which is beneficial to connect
the power grid [4-7].
Z-source network [8] is presented to realize a single-stage
buck-boost inverter, and flexibly be extended to DC-DC
converters [9, 10], for AC-AC converters [11, 12], and for
AC-DC converters [13]. These flexibility applications for
impedance source networks in more circumstances have also
been shown in [14]. Z-source DC-DC converter can improve the
voltage gain, but having some disadvantages such as
discontinuous input currents which can reduce the utilization and
lifetime of input source, lack of common ground and higher
voltage stresses which can damage the devices.
Switched-inductor Z-source network [15] improves the
voltage-boost ability through replacing Z-source inductors with
switched-inductor cells, and the cascading concepts are
presented in [16, 17] to further improve the voltage gain, but
increasing the component counts. The magnetically coupled
impedance source networks in [18-22] replace switched-inductor
cells with coupled-inductor cells to produce the higher voltage
gain.
Manuscript received September 4, 2018; revised November 27, 2018;
accepted January 5, 2019. This work was supported by the National Natural
Science Foundation of China (51777043), Natural Science Foundation of
Heilongjiang Province of China (E2017035) and State Key Laboratory of
Electrical Insulation and Power Equipment (EIPE18208).
Yuliang Ji and Hongchen Liu are with the School of Electrical
Engineering and Automation, Harbin Institute of Technology and State Key
Laboratory of Electrical Insulation and Power Equipment, Xi’an Jiaotong
University. China (e-mail: 1010006043@qq.com; fenmiao@hit.edu.cn;).
Feng Yong and Fengjiang Wu are with the School of Electrical
Engineering and Automation, Harbin Institute of Technology, Harbin,
150001, China (e-mail: yfeng@hit.edu.cn; shimeng@hit.edu.cn).
P. Wheeler is with the Department of Electrical and Electronic
Engineering, The University of Nottingham, Nottingham, NG7 2RD, U.K.
(e-mail: pat.wheeler@nottingham.ac.uk)
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Compared with the aforementioned magnetically coupled
impedance networks [19-22], tapped-inductor (TL) Z-source
inverter [18] uses two coupled-inductor cells to reduce the
coupled inductor’s turn ratios, sizes and weights. Magnetically
coupled networks [19-22] only use one coupled-inductor cell to
increase the boost ability. Although the aforementioned
impedance networks [15-22] improve the voltage gain, but
resulting in the discontinuous input currents.
Embedded Z-source networks [23] realize the continuous
input current and reduce capacitor voltage stresses, but these
networks need two dc sources to make the impedance network
symmetrical so that both two capacitor voltage stresses are
reduced. Quasi-Z-source networks [24] can realize the
continuous input current and reduce capacitor voltage stresses
with one input source. By replacing the inductors of
quasi-Z-source networks [24] with magnetically coupled
networks [19-22], improved T-source [25], LCCT-Z-source [26],
Quasi-Y-source [27] and improved Y-source [28] can be obtained
with some advantages such as higher boost ability and the
continuous input current. The review for the aforementioned
magnetically coupled impedance networks is published in [28].
This paper proposes high step-up Y-source coupled-inductor
impedance network boost DC-DC converter with common
ground and continuous input current. Adding auxiliary capacitors
and diodes to three-winding Y-shape coupled inductor cells
constitutes the circuit conduction path to produce high step-up
gain with more degrees of freedom in winding match. Also, the
proposed converter has a common ground and realizes the
continuous input current. The theoretical analysis and feature
verifications are operated, and a 300W experiment is given out
to verify the performances of the proposed converter.
This paper is divided into five parts. Section II shows the
derivation and description for proposed converter. In Section III,
the theoretical analysis of proposed converter is operated in
detail, including the operation modes, voltage gain analysis,
voltage stress analysis, inductor and capacitor design, and
feature comparisons. In Section IV, the experiment results are
operated to verify the theoretical analysis. Finally, a conclusion
is drawn in Section V.
D Do
N N 3 1
Vin
N2 S Co R
C1
Fig.1 Y-source boost DC-DC converter
II. PROPOSED Y-SOURCE IMPEDANCE NETWORK
BOOST CONVERTER
A. Typical Y-source impedance network boost DC-DC
converter
Y-source network uses three-winding Y-shape coupled
inductor cells to realize more degrees of freedom in winding
match, and are extensively applied for DC-DC converters [20],
as shown in Fig.1. To realize the continuous input current,
Quasi-Y-Source boost DC-DC converter [27] are presented and
shown in Fig.2(a). Compared to conventional Y-source boost
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2019.2892499, IEEE
Journal of Emerging and Selected Topics in Power Electronics
DC-DC converter [20], Quasi-Y-Source boost DC-DC converter derivations, parameter design and feature comparisons are
[27] has the same voltage gain, but with more component counts operated in the following parts.
and different winding coefficient combinations. To increase the III. THEORETICAL ANALYSIS OF PROPSOED
voltage-boost ability, improved Y-source boost DC-DC converter CONVERTER
[28] are presented and shown in Fig.2(b). Compared to Theoretical analysis of proposed converter is operated in
Quasi-Y-Source boost DC-DC converter [27], improved the following parts, which includes operation principles, math
Y-source boost DC-DC converter [28] can produce the higher derivations, voltage gain, stress analysis, feature comparisons
voltage gain with same component counts and continuous input and parameter design.
current. A. Operation principles
D1
The proposed Y-source boost DC-DC converter can work
N3 N1 Do in continuous conduction mode (CCM) and discontinuous
L1 conduction mode (DCM). The operation principles in CCM
C2
N2
serve as the representative to show the work process. The
Vin operation modes include four stages (I, II, III and IV), and its
Co R
S equivalent circuits are shown in Fig.4. The corresponding
C1 theoretical waveforms diagram is plotted in Fig.5.
For the convenience of analysis, some assumptions are
done as follows,
(a) (a) The currents across capacitors, inductors, diodes and
C2 switches are fixed in one cycle.
D1 N N1 Do (b) The power devices are ideal, except for considering the
3
L1
parasitic capacitor of the power switch.
(c) The equivalent leakage inductances of three windings
N2
Vin (N1, N2 and N3) are defined as Lk1, Lk2 and Lk3, respectively.
Co R
S The three-winding coupled inductor is equivalent as one
C1 magnetizing inductance LM, three leakage inductances and
one ideal three-winding transformer. The turn ratios of
three-winding transformer meet the relations: n12= N1/N2, n13=
(b) N1/N3 and n23= N2/N3.
Fig.2 Extended Y-source boost DC-DC converter (a)
Quasi-Y-Source Boost DC-DC Converter (b) improved Y-source
boost DC-DC converter L1 N3
Lk3 N1 Lk1
LM Do
D1 C1
L1 N3 N1 N2
Lk2
Do
C1 N2 D2
S1 S1 Co R
Vin D2
S1 Co R

(a)
Fig.3 Proposed high step-up Y-source coupled-inductor
D1
impedance network boost DC-DC converter with common L1 N3
Lk3 N1 Lk1
ground and continuous input current.
LM
B. Proposed high step-up Y-source impedance network boost C1 Do
N2
DC-DC converter Lk2
The proposed high step-up Y-source coupled-inductor Vin D2
impedance network boost DC-DC converter with common S1 S1 Co R
ground and continuous input current is shown in Fig.3, which
includes one inductor L1, a Y-shape coupled-inductor cell, two
diodes (D1 and D2), one capacitor C1 and one switch S1. When
the switch S1 is turned on, input dc source charges the inductor L1 (b)
and coupled-inductor cell through diodes (D1 and D2), and the
capacitor C1, the diode D1 and three-winding Y-shape coupled D1
inductor cells forms the current circuit to realize the L1 Lk3 N3 N1 Lk1
voltage-double function and higher voltage gain. When the LM Do
switch S1 is turned off, the input source, one inductor L1, Y-shape C1 N2
coupled-inductor cell and capacitor C1 supplies the power to Lk2
loads. Vin D2
Compared to conventional Y-source boost converters [20], S1 S1 Co R
Quasi-Y-Source boost DC-DC converter [27] and improved
Y-source boost DC-DC converter [28], the proposed converter
can produce the higher voltage gain with more degrees of
freedom in winding match. The same output gain can be (c)
obtained by using different winding turn ratios. Also, the
proposed converter has a common ground and realizes the
continuous input current. Operation states in CCM, math
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2019.2892499, IEEE
Journal of Emerging and Selected Topics in Power Electronics
corresponding leakage inductance (Lk1 and Lk3) can supply the
D1 power to loads by the diode Do. The diodes (D1 and D2) are
L1 N3
Lk3 N1 Lk1 turned off due to the reverse voltage from capacitor C1 and
LM Do windings (N1 and N3). The corresponding current waveforms are
C1 N2 plotted in Fig.5. When the switch S1 begins to conduct at t4, this
Lk2 interval is finished.
Vin D2 Stage IV [t4, t5]: At the time t4, the switch S1 is turned on, and
S1 S1 Co R the equivalent circuits are shown in Fig.4(d). In stage, the input
source can supply the two inductors by the diodes (D1 and D2),
and the input source, voltage-double capacitor C1, the windings
(N1 and N3) and corresponding leakage inductance (Lk1 and Lk3)
(d) still supply the power to loads by the diode Do. The
Fig.4. Operational stages of proposed converter (a) Stage I. (b) corresponding current waveforms are shown in Fig.5. When the
Stage II. (c) Stage III. (d) Stage IV. switch S1 begins to conduct at t5, this interval is finished and the
new period begins.
DTS 1  D  TS B. Voltage gain analysis
Assuming the aforementioned converter operates in CCM
Vgs
mode. In order to simply the calculation process, we assume that
the leakage inductances of each winding have the relations:
iL1 Lk 1 L L
g= = 2 k2 = 2 k3 (1)
LM n21LM n31LM
iLk2 (iN2) Where g is the leakage inductance ratio, n12=N1/N2 and
n13=N1/N3 are the turn ratios of the coupled inductor.
iLk1(iN1) Since the operation time of stages II and IV is very short, thus,
the two stages are neglected. During the time duration of stage I,
iLk3 (iN3) based on Fig.4(a), the following relations can be obtained.
Vin + n23vL13Ι = gn23vL13Ι + n13vL13Ι + gn13vL13Ι (2)
iDo VC1 + gvL13Ι = vL13Ι + n13vL13Ι + gn13vL13Ι (3)
Vin = vL1 Ι (4)
iD1
Where vL13Ι is the voltage of the windings N3, and vL1 Ι is
iD2 the voltage of the inductor L1 in stage I. VC1, are the voltage of
capacitor C1.
From stage III, the output voltage can be expressed as follows.
iS Vin - vL1 ΙII + VC1 + gvL13ΙII - vL13ΙII - n13vL13ΙII - gn13vL13ΙII = vo (5)
t0 t1 t2 t3 t4 t5
Where vL13ΙII is the voltage of the windings N3, and vL1 ΙII is
Fig.5. Theoretical waveforms diagram of the presented converter
the voltage of the inductor L1 in stage III, vo is the output
In the CCM operation, three operating stages are analyzed in capacitor voltage.
one cycle. The theoretical waveforms diagram and the Applying the volt-second balance principle to the winding N3
current-flow paths for each mode are respectively plotted in and inductor L1, the following equations can be written.
∫ vL13Ι dt +∫
DTs T
Fig.4 and Fig.5. Subsequently, the operating stages are illustrated s
v dt = 0 (6)
0 DTs L13 ΙII
in detail.
∫ vL1 Ι dt +∫
Stage I [t1, t2]: In this stage, the switch S1 is turned on. The DTs s T
0
v dt = 0
DTs L1 ΙII
(7)
equivalent circuits of this mode are shown in Fig.4(a). From,
Fig.4(a), it can be seen that the input source charges the inductor Through the equations (3) and (6), we can obtain the following
L1 by the diode D1, and charge the windings (N1 and N2) and expressions.
leakage inductors (Lk1 and Lk2) of Y-shape coupled inductor by VC1
the diode D2. Through magnetically coupled theory, the windings vL13Ι = (8)
(N1 and N3) and leakage inductors (Lk1 and Lk3) charge the
(1 - g ) + ( g + 1)n13
capacitor C1 to realize the voltage-double function by the diode - DVC1
D1. So, the currents of three leakage inductors (Lk1, Lk2 and Lk2) vL13ΙII = (9)
[(1 - g ) + ( g + 1)n13 ](1 - D)
are equal to the currents of three windings (N1, N2 and N3). The
inductor current iL1 increase approximately linearly, as shown in Similarly, through the equations (4) and (7), we have
Fig.5. The output capacitor Co solely supplies to the load. When - DVin
the switch S1 is turned off at the time t2, this interval is finished. vL1 ΙII = (10)
(1 - D )
Stage II [t2, t3]: At the time t2, the switch S1 is off. Fig.4(b)
shows the current-flow path. The parasitic capacitor absorbs the Substituting the equations (2), (3), (4), (8), (9) and (10) to (7)
energy of the leakage inductors (Lk1, Lk2 and Lk2). As the voltage and (8), the output voltage vo and gain GY can be expressed as
on the parasitic capacitor is higher than the voltage of output follows.
capacitor Co, diode Do is turned on. When the energy of leakage (1 - D)[ g ( N 2 + N 1) + N 1 - N 2 ] + (1 - g )[ D( N 1 - N 2 ) + N 3 + N 2 ] + (1 + g )( N 1 - N 2 )
inductances is exhausted at the time t3, this interval is finished. vo = Vin (11)
(1 - D)[ g ( N 2 + N 1) - (1 - g )( N 1 - N 2 )]
Stage III [t3, t4]: At the time t3, the switch S1 keep off, and the
= GY Vin
equivalent circuits are shown in Fig.4(c). The input source,
voltage-double capacitor C1, the windings (N1 and N3) and When three-winding coupled inductor is ideal, namely g=0, the

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2019.2892499, IEEE
Journal of Emerging and Selected Topics in Power Electronics
following calculations can be obtained. follows.
k +2 (k + 1)Vin
vo g = 0 = V (12) VD1 = VD 2 = (15)
1 - D in 1- D
k +2 The normalized voltage stresses across diodes (D1 and D2) and
GY g = 0 = (13) capacitor C1 with various winding coefficient k are plotted in
1- D Fig.8(a) and Fig.8(b), respectively. From Fig.8, it can be seen
Where the winding coefficient of three-winding coupled inductor that the normalized voltage stresses across capacitors and diodes
N3 + N2 are increased as the winding coefficient k increases, when using
k= .
N1 - N 2 the same shoot-through ratio D.
6

Normalized voltage stresses of capacitor

TABLE I VOLTAGE GAINS OF PROPOSED CONVERTERS
WITH DIFFERENT K AND DIFFERENT TURN RATIOS
5
(N1:N2:N3)
k Voltage gain GY Turn ratios (N1:N2:N3)
4
1 3/(1-D) (3:1:1) (4:1:2) (5:2:1) (5:1:3)
2 4/(1-D) (2:1:1) (3:1:3) (5:3:1) (5:2:4)
3 5/(1-D) (3:2:1) (2:1:2) (4:2:4) (3:1:5) 3
4 6/(1-D) (4:3:1)(2:1:3) (3:2:2) (5:3:5)
5 7/(1-D) (5:4:1) (2:1:4) (4:3:2) (3:2:3) 2 VC1 /Vin k =2
6 8/(1-D) (2:1:5) (5:4:2) (3:2:4) (4:3:3) k =3
k =4
The winding coefficient k, the different winding combinations 10 0.2 0.4 0.6 0.8
Shoot-through ratio, D
and voltage gains of proposed voltage-double Y-source
impedance network boost converter are listed in Table I. (a)
Through the equation (11), the voltage gains of proposed 20
k =2

Normalized voltage stresses of diodes

converter under various leakage inductance ratios g and winding k =3
k =4
coefficients k =2 are plotted in Fig.6. The ideal gains under 15
different winding coefficients k are shown in Fig.7. As shown in
VD1 /Vin(VD2 /Vin )
Fig.6, voltage gains of proposed converter increase as the
leakage inductance ratios decrease, when using the same 10
shoot-through ratio D. From Fig.7, it can be seen that the voltage
gains largely increases as the winding coefficient k increases in
the same shoot-through ratio D. 5
20 g=0
g=0.02
g=0.04 0 0.2 0.4 0.6 0.8
Shoot-through ratio, D
15
Voltage gain, GY

(b)
Fig.8. Normalized voltage stresses (a) capacitor (b) diodes
10
Ts
DTs T1
5
winding coefficients 2 Vgs

0.2 00.4 0.6 0.8

Shoot-through ratio, D iL1
Fig.6. Voltage gains with winding coefficient k=2 and various
leakage inductor ratios g VL1
25 k =2
k =3
20 k =4
Voltage gain, GY

k =5
k =6
iN 2
15

10
VLM
5

0 0.4 0.2 0.6 0.8 t1 t2 t4

Shoot-through ratio, D
Fig.7. Voltage gains with different winding coefficients
Fig.9. Simplified theoretical waveforms diagrams
C. Voltage stress analysis
D. Inductor and capacitor design
The voltage stresses across the capacitor C1 and diodes (D1
The following parts give out the design method of input
and D2) can be calculated when leakage inductance ratio g=0.
inductor L1 and magnetizing inductance LM. To simply the
Through the aforementioned equations, the voltage stress across
calculation process, the transient state is neglected and the
capacitor C1 can be expressed as follows.
simplified theoretical waveforms diagram is plotted in Fig.9. In
VC1 = (k + 1)Vin (14) one cycle, the average current of the output diode Do have the
The voltage stress across diodes (D1 and D2) can be expressed as relations:

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2019.2892499, IEEE
Journal of Emerging and Selected Topics in Power Electronics

GYVin D1
I Do = I o = (16) Do
R
L1 C2 N3 N1
Where I o is the average current of load R, and I Do is the
Vin N2
average current of the output diode Do. Co R
As shown in Fig.4, when the switch S1 is turned off, the output S
capacitor Co is charged by the output diode Do. Thus, the C1
following equations can be obtained as follows.
Vin D(1 - D)Ts
I Do = (17) (a)
2 L1 D1
The minimum inductor values can be obtained in CCM. Do
D(1 - D)Ts R L1 N1
L1, min = (18) C2 N3
2GY N2
Vin
From Fig.4, it can be seen that the input source charge input Co R
S
inducror L1 and windings (N2 and N1), when the switch S1 is
C1
turned on. Thus, the average current of input source is equal to
the sum of the currents of inducror L1 and windings N2. In stage
[t1, t2], we have the following relations:
(b)
diL1
L1, min = vL1 I = Vin (19)
dt D1 N C2N Do
3 1
di L1
LN 2 N 2 = vN 2 = vL13I n23 (20)
dt N2
Where iL1 is the transient current of inductor L1, and iN 2 is the Co R
S
transient current of winding N2 in [t1, t2]. LN2 is the inductor C1
value of winding N2, and have the relations with magnetizing
inductance LM: LN 2 = n23
2
LM . The theoretical waveforms are
shown in Fig.9. Thus, the average current of input source can be (c)
expressed as follows.
D1 C2
Do
2 L n V G + v13I D 2 (1 - D)Ts R
I in = M 23 in Y (21) L1 N3 N1
2 LM n23(1 - D) R N2
In theory, the output power is equal to the input power, thus Vin
Co R
we have S
v13I D 2 (1 - D )Ts R C1
LM = (22)
2n23GYVin (GY - 1 - GY D )
Assuming the parasitic factors and leakage inductances are (d)
ignored. The voltage fluctuation of capacitor voltage mainly D1
results from electric charge of capacitors. Thus, the capacitors N3
must meet the relations. L1 N1 Do
dV C1
C =i (23) N2
dt
Where C is the capacitor value, and i is the current across Vin D2 Co
capacitor C. S1 R
Thus, the capacitors (C1 and Co) are designed by the equations
(24 and 25), respectively.
Vin D 2Ts2
≤ C1 (24) (e)
L1, min ΔVC1 D1

Vin D(1 - D )Ts2 L1 N3 N1 Do

≤ Co (25)
L1, min ΔVCo
C1 N2
Where C1, and Co are the values of capacitors C1, and Co, ΔVC1
and ΔVCo are the permitted voltage ripple of capacitors C1 and Vin D2 Co
S1 R
Co, respectively.
E. Feature Comparisons with converters [27, 28]
To verify the advantages of proposed converter, these detailed
comparisons such as operation states, voltage gains and voltage (f)
stresses are made among Quasi-Y-source boost converter [27], Fig.10. Operational states of Quasi-Y-source boost converter
improved Y-source boost converter [28] and proposed Y-source [27], improved Y-source boost converter [28] and proposed
coupled-inductor boost converter. Y-source coupled-inductor converter (a)(c)(e) Shoot-through
state (b)(d)(f) Nonshoot-through state
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2019.2892499, IEEE
Journal of Emerging and Selected Topics in Power Electronics

7 Through magnetically coupled theory, the windings (N1 and N3)

Winding coefficient 2 charge the capacitor C1. When switches are off, the windings (N1
6 and N3), input voltage and capacitor C1 supplied to the loads.
From the aforementioned analysis, it can be seen that the
Voltage gain, GY

5
operation states, charging and discharging paths of the proposed
4 converter are absolutely different from those of Quasi-Y-source
Quasi- Y-source [27]
converter [27] and improved Y-source converter [28]. At the
Proposed Y-source
3 same time, the different operation states will also result in the
Improved Y-source [28] different voltage gains and voltage stresses of diodes and
2 capacitors.
The voltage gains, maximum capacitor voltages and
10 0.05 0.1 0.15 0.2 0.25 maximum diode voltages of three converters are listed in Table II.
Shoot-through ratio, D The voltage gain comparisons among the aforementioned three
(a) converters are operated and plotted in Fig.11(a). From Fig.11(a),
VD /Vin it can be seen that the voltage gain of proposed converter is
Normalized voltage stresses of diodes

much higher than those of Quasi-Y-source converter [27] and

14
improved Y-source boost converter [28], when using the same
Quasi- Y-source [27]
12 shoot-through duty ratio D and winding coefficient 2.
The maximum voltage stress comparisons including diode
10 Improved Y-source [28] voltage and capacitor voltage are operated among the
8 aforementioned three converters. From Fig.11(b), it can be seen
that the diode voltage stresses of proposed converter are much
6 lower than those of Quasi-Y-source boost converter [27] and
Proposed Y-source improved Y-source boost converter [28], when producing the
4
same voltage gain. As shown in Fig.11(c), the proposed
Winding coefficient 2
2 converter produces the lower capacitor voltage stresses than
2 4 6 8 10 12 14 those of Quasi-Y-source boost converter [27] and improved
Voltage gain, GY Y-source boost converter [28], when producing the same voltage
(b) gain.
VC /Vin TABLE II PARAMETER COMPARISONS
Normalized voltage stresses of capacitor

14 Proposed
Parameter Converter [27] Converter [28]
Winding coefficient 2 Y-source
12 2+k 1 1
G
1- D 1 - σD 1 -(K + 1)D
10
VC,max [G(1 - D) - 1]Vin G(1 - D)Vin G(1 - D)Vin
Quasi-Y-source [27]
8 [G (1 - D ) - 1]Vin
VD,max G(σ - 1)Vin G( K + 1)Vin
6 (1 - D )
Proposed Y-source Capacitor
4 number 1 2 2
Improved Y-source [28] Diode number
2 2 1 1
TABLE III EXPERIMENT PARAMETERS
2 4 6 8 10 12 14
Voltage gain, GY Parameter Value
(c) Frequency 50kHz
Fig.11 Feature comparisons among conventional Y-source [20],
Input voltage 40V
Quasi-Y-source [27] and proposed Y-source converters (a)
voltage gain comparisons (b) voltage stresses across diodes and Output voltage 400V
(c) voltage stress across capacitors. Output power 300W
The operation states of the aforementioned three converters
Capacitor C1 220uF
are shown in Fig.10. The operation states when switches are on
shown in Fig.10(a), Fig.10(c) and Fig.10(e), and the operation Capacitor Co 470uF
states when switches are off are shown in Fig.10(b), Fig.10(d) Winding coefficient 3
and Fig.10(f). From Fig.10(a) and Fig.10(b), it can be seen when
switches are on, the input voltage and capacitor C2 of IV. EXPERIMENTAL VERIFICATIONS
To verify the validity of theoretical analysis, the experiment
Quasi-Y-source converter [27] charge the inductor L1 and
prototype for proposed converter is shown in Fig.12 and
windings (N1 and N3), and capacitor C1 charge the windings (N1
corresponding parameters are listed in Table III.
and N2). When switches are off, the windings (N1 and N3) charge
To further verify the performances of proposed converter,
the capacitor C2, and the capacitor C1 and windings (N1 and N2)
when the input voltage 40V and the voltage gain G=10, the
supplied to the loads. From Fig.10(c) and Fig.10(d), it can be
corresponding experimental results are shown in Fig.13. Fig.13(a)
seen when switches are on, the input voltage and capacitor C2 of
shows the experimental waveforms of input voltage Vin, the
improved Y-source converter [28] charge the inductor L1, and
capacitor voltage VC1, output voltage Vo and output current io,
capacitor C1 charge the windings (N1 and N2). When switches are
and the capacitor voltage VC1 and output voltage Vo are about
off, the windings (N1 and N3) charge the capacitor C2, and the
158V and 400V, respectively. Fig.13(b) shows that the currents
capacitor C1 and windings (N1 and N2) supplied to the loads.
across inductor L1 and three windings (N1, N2 and N3) are
From Fig.10(e) and Fig.10(f), it can be seen when switches are
continuous. The voltages across diodes (D1, D2 and Do) are
on, the input voltage of proposed converter charges the inductor
shown in Fig.13(c), and these voltage values are about 325V,
L1 by diode D1, and charges windings (N1 and N2) by diode D2.
319V and 397V, respectively. The aforementioned experimental
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2019.2892499, IEEE
Journal of Emerging and Selected Topics in Power Electronics
results have verified the performances of proposed converter. ground and continuous input current is presented. Through
The efficiency results are measured per 50W, and plotted in adding auxiliary capacitors and diodes to three-winding Y-shape
Fig.14. The highest efficiency is about 96.5%, when output coupled inductor cells to constitute the voltage-double circuit
power is 300W. conduction path, the proposed converter can obtain high step-up
gain with more degrees of freedom in winding match. Also, the

Coupled Transformer
proposed converter has a common ground and realizes the

L1
continuous input current. The operation modes, math derivations,
parameter design, feature comparisons and theoretical analysis
D1

C1 Co
are made, and the advantages of proposed converter are verified
through listing the various winding combinations, plotting the
D2 Do

comparison curves of voltage gains and stresses and analyzing

the operation modes. Finally, the experiment results in a 300W
S1

prototype have been made to verify the validity of the theoretical

analysis.
Fig.12 Experimental prototype of proposed converter REFERENCES
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