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FACULTY OF ENGINEERING
i- CREDIT HOURS ENGINEERING PROGRAMS
MECHATRONICS PROGRAM
a) A’ + B’C’ + D
b) A’C’ + B’C’ + D
c) A’ + B’ + C + D
d) (A’ + B’C’) D
2) Given a lowest priority 4x2 encoder, in order to have a value 1 0 on its outputs, its inputs D0 – D3
can be equal to ………….. respectively.
d) 0, 0, 1, x c) x, 1, 0, 0 b) 0, 1, x, x a) x, x, 1, 0
C) Implement the following truth table using suitable ROM. (show full ROM diagram) [2 marks]
A0 A1 A2 A3 I0 I1 I2
1 0 0 0 0 0 0
0 0 0 0 1 0 0
0 1 0 1 0 1 0
1 0 1 0 1 1 0
1 1 1 1 0 0 1
0 1 0 1 1 0 1
1 0 0 0 0 1 1
0 1 0 1 1 1 1
AIN SHAMS UNIVERSITY, FACULTY OF ENGINEERING
i-CREDIT HOURS ENGINEERING PROGRAMS, MECHATRONICS PROGRAM
Summer Semester 2019 Course Code: CSE115 Time Allowed: 3 Hrs.
Digital Design
The Exam Consists of Five Questions in Four Pages. 2/4
B) Using the following counter-module with the given function table, show the full connection to
obtain a divider by 7 using Carryout. [3 marks]
A) Design a counter that counts the sequence 1, 3, 4, 2 and 7 using T flipflops . [6 marks]
B) Find the content for the 4-bit shift register of the following sequential circuit during 4 clocks.
[The initial value for Q is zero] [3 marks]
AIN SHAMS UNIVERSITY, FACULTY OF ENGINEERING
i-CREDIT HOURS ENGINEERING PROGRAMS, MECHATRONICS PROGRAM
Summer Semester 2019 Course Code: CSE115 Time Allowed: 3 Hrs.
Digital Design
The Exam Consists of Five Questions in Four Pages. 3/4
A) Analyze the following counter circuit then find its state table, state diagram and the repeated
sequence. Is it a selfcorrecting counter ? why? [6 marks]
B) Follow the circuit connections, then find the function table of the given universal shift register of 4
different functions. (All muxs have the same selection control). [3 marks]
AIN SHAMS UNIVERSITY, FACULTY OF ENGINEERING
i-CREDIT HOURS ENGINEERING PROGRAMS, MECHATRONICS PROGRAM
Summer Semester 2019 Course Code: CSE115 Time Allowed: 3 Hrs.
Digital Design
The Exam Consists of Five Questions in Four Pages. 4/4
A) Design a sequential circuit according to the following state diagram using JK flip flops. [5 marks]
.
B) Implement the following Function using 8x1 mux and let W, X and Z be the selectors
F (W, X, Y, Z) = ∑ (0 , 2 , 4 , 5 , 6 ,7 ,10 , 12) [3
marks]