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Republic of the Philippines

Technological University of the Philippines


Ayala Blvd. cor. San Marcelino St. Ermita, Manila
• PEE 1L - M

COLLEGE OF ENGINEERING - ELECTRICAL DEPARTMENT

LABORATORY

Name: Course, Yr. & Sec. Subject:


Group No. Time: Days: Rm: Date:
Professor/Instructor: Rating:

EXPERIMENT SIX
Kirchhoff’s Laws

I. OBJECTIVES
1. To familiarize the students with Kirchhoff’s Laws
2. To verify experimentally Kirchhoff’s Current and Voltage Laws.
3. To apply Kirchhoff’s Laws in analyzing complex electric circuits.

II. THEORY
The solution to complex circuits is facilitated by the applications of Kirchhoff’s Laws. These laws were
formulated and published by the physicist GUSTAV ROBERT KIRCHHOFF (1824-1887) and became the basis of
all other modern network laws and theorems. These laws are applicable to circuits containing one or more
sources of voltages or currents.

Two laws apply to Kirchhoff namely: Kirchhoff’s Voltage Law (KVL) and Kirchhoff’s Current Law (KCL).

Kirchhoff’s Voltage Law states that the algebraic sum of the voltage rises, and voltage drops around a
closed loop or path in an electric circuit is zero. An equation maybe written based on any closed path or loop.
To do this, we can move from one node to the next one until we finally reach the starting node. Each time we
move from one node to another, a voltage rise or drop must be considered. If the first node is at a lower
potential than the next one, then we have a voltage rise. If the first node is at a higher potential than the next
one, then it is considered as a voltage drop. Kirchhoff’s law is based on the fact that there cannot be a potential
difference at a single node. To get the potential difference between any two nodes, we must consider the
potential differences of all the elements between any two nodes.
Kirchhoff’s Current Law states that the algebraic sum of currents entering the a node is equal to the
sum of the currents leaving it. If we consider the current entering a node to be positive while the currents
leaving it as negative, then Kirchhoff’s current provides that the algebraic sum of the current entering and the
current leaving a node is zero. Current cannot be retained at a node. Current entering a node must leave
through the other nodes.

III. MATERIALS AND EQUIPMENT


2 Regulated DC Power Supply
Digital multimeter/VOM
Breadboard
6 Carbon Resistors (1W)

Prepared by: Engr. Edwin C. Espinas, for TUP COE-EE Department


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Republic of the Philippines
Technological University of the Philippines
Ayala Blvd. cor. San Marcelino St. Ermita, Manila
• PEE 1L - M

COLLEGE OF ENGINEERING - ELECTRICAL DEPARTMENT

LABORATORY
1 100
150
220Ω
33Ω
22Ω
10Ω
Connecting wires

IV. PROCEDURES
1. Using the two regulated DC power supply, connect the circuit as shown in Figure 6.1. Make certain
that the power supply switch is in the off position and that the voltage output is turned fully
counterclockwise.
2. Turn on the power supply and adjust E1 and E2 to give an output of 12V and 15V, respectively.
3. Using a voltmeter, measure the individual current drawn by each resistor and record these values
in Table 6.1.
4. Using a ammeter, measure the individual current drawn by each resistor and record these values
in Table 6.2. (Observe correct meter polarity in connecting the ammeter).
5. Using the circuit in Figure 6.1, compute for the individual branch currents and voltage drops across
each resistor using Kirchhoff’s Laws. Record the results in Table 6.1.
6. Compute for the percent difference of the branch currents and voltage drops for each resistor.
Record the results in Table 6.1 and 6.2.

Figure 6.1

Prepared by: Engr. Edwin C. Espinas, for TUP COE-EE Department


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Republic of the Philippines
Technological University of the Philippines
Ayala Blvd. cor. San Marcelino St. Ermita, Manila
• PEE 1L - M

COLLEGE OF ENGINEERING - ELECTRICAL DEPARTMENT

LABORATORY
V. SIMULATIONS

Prepared by: Engr. Edwin C. Espinas, for TUP COE-EE Department


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Republic of the Philippines
Technological University of the Philippines
Ayala Blvd. cor. San Marcelino St. Ermita, Manila
• PEE 1L - M

COLLEGE OF ENGINEERING - ELECTRICAL DEPARTMENT

LABORATORY
VI. DATA AND RESULTS
Table 6.1
VOLTAGE V1 V2 V3 V4 V5
MEASURED 2.131 V 0.183 V 1.380 V 9.686 V 13.803 V
COMPUTED 2.131 V 0.184 V 1.386 V 9.69 V 13.86 V
% DIFFERENCE 0% 0.545% 0.434% 0.413% 0.412%

Table 6.2
CURRENT I1 I2 I3 I4 I5
MEASURED 0.065 A 0.00184 A 0.063 A 0.065 A 0.063 A
COMPUTED 0.064 A 0.00184 A 0.063 A 0.064 A 0.063 A
% DIFFERENCE 0% 0% 0% 0% 0%

Prepared by: Engr. Edwin C. Espinas, for TUP COE-EE Department


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Republic of the Philippines
Technological University of the Philippines
Ayala Blvd. cor. San Marcelino St. Ermita, Manila
• PEE 1L - M

COLLEGE OF ENGINEERING - ELECTRICAL DEPARTMENT

LABORATORY
VII. COMPUTATIONS
TABLE
1. KVL at LOOP A 2. KVL AT LOOP B
12 – I1R1 – I4R4 = 0 15 – I2R2 – I5R5 – I3R3 = 0
12– I1(33) – I4(150) – I2(100) = 0 15 – I2(100) – I5(220) – I3(22) = 0
12– I1(183) – I2(100) = 0
15 – I2(100) –I3(242) = 0
3. USE 2nd equation for I3 4. Substitute the value of I3 to 1st
equation
15 – I2(100) – I3(242) = O 12 - I1(183) – I2(100) = 0; I1 = I2 + I3
12 – 183 (I2 + I3) – I2(100) = 0
15 – I2(100) = I3(242) 𝐼5+𝐼2(100)
15−12 (100) 12 – 183 [𝐼2 + 242 ] – I2 (100) = 0
I3 = 12 – I2(183) -
2745−𝐼2 (18300)
– I2 (100) = 0
242 242
I3 = 0.063A 12 - 𝐼2(183) – 11.34 – I2(75.62) - I2(100) = 0
12 – 11.34 = 𝐼2(183) + I2(75.62) + I2(100)
0.66 = I2 (358.62)
0.66 𝐼2 (358.62)
= 358.62
358.62
I2= 0.00184 A

5. Substitute I2 to 2nd Equation 6. Substitute I2 TO EQUATION 1


15 + I2(100) – I3(242) = 0 12 - I1(183) – I2(100) = 0
15 + (0.00184) (100) – I3(242) = 0 12 - I1(183) – (0.00184) (100) = 0
15 + 0.184 = I3(242) 12 – 0.0184 = I1(183)
15.184 = I3(242) 11.816 = I1(183)
𝟏𝟓.𝟏𝟖𝟒 𝑰𝟑(𝟐𝟒𝟐) 𝟏𝟏.𝟖𝟏𝟔 𝑰𝟏 (𝟏𝟖𝟑)
= 𝟐𝟒𝟐 = 𝟏𝟖𝟑
𝟐𝟒𝟐 𝟏𝟖𝟑
I3 = 0.063 A
I1 = 0.065 A

Prepared by: Engr. Edwin C. Espinas, for TUP COE-EE Department


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Republic of the Philippines
Technological University of the Philippines
Ayala Blvd. cor. San Marcelino St. Ermita, Manila
• PEE 1L - M

COLLEGE OF ENGINEERING - ELECTRICAL DEPARTMENT

LABORATORY

TABLE 6.1
Given
I1 = 0.064 A R1 = 33Ω
I2 = 0.00184 A R2 = 100 Ω
I3 = 0.063 A R3 = 22 Ω
I1 = I4 = 0.0646 R4 = 150 Ω
I3 = I5 = 0.063 A R5 = 220 Ω

TABLE 6.1
V = IR

V1 = (I1)(R1) V3 = (I3)(R3)
V1 = (0.0646 A)(33 Ω) V3 = (0.063 A)(22 Ω)
V1 = 2.131 V V3 = 1.386 V

V2 = (I2)(R2) V4 = (I4)(R4)
V2 =( 0.00184 A)(100 Ω) V4 = (0.0646 A)(150 Ω)
V2 = 0.184 V V4 = 9.69 V

V5 = (I5)(R5)
V5 = (0.063 A)(220 Ω)
V5 = 13.86 V

Vt For 12 V Vt For 15 V
Vt = V1+V2 +V4 Vt = V2 + V3 + V5
Vt = 2.131V + 0.184V + 9.69V Vt = 0.184V + 1.386V + 13.86V
Vt = 12.005 V Vt = 15.43 V

PERCENT DIFFERENCE

2.131−2.131
V1 = 2.131+2.131 𝑥 100 = 0%
2

0.184−0.1832
V2 = 0.184+0.1832 𝑥 100 = 0.545%
2

1.386−1.38
V3 = 1.386+1.38 𝑥 100 = 0.434%
2

9.69−9.686
V4 = 9.69+9.686 𝑥 100 = 0.413%
2

13.86−13.803
V5 = 13.86+13.803 𝑥 100 = 0.412%
2

Prepared by: Engr. Edwin C. Espinas, for TUP COE-EE Department


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Republic of the Philippines
Technological University of the Philippines
Ayala Blvd. cor. San Marcelino St. Ermita, Manila
• PEE 1L - M

COLLEGE OF ENGINEERING - ELECTRICAL DEPARTMENT

LABORATORY

VIII. CONCLUSION

Prepared by: Engr. Edwin C. Espinas, for TUP COE-EE Department


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Republic of the Philippines
Technological University of the Philippines
Ayala Blvd. cor. San Marcelino St. Ermita, Manila
• PEE 1L - M

COLLEGE OF ENGINEERING - ELECTRICAL DEPARTMENT

LABORATORY
IX. GUIDE QUESTIONS

1. What is meant by difference in potential? Show that it is possible for two or more emf’s to exist
within a circuit without there being any difference of potential between the circuit terminals.
Ans:
Potential difference is the amount of energy or work required to move a unit charge from one
point to another. It is possible for the circuit to experience more than 2 excess emfs. More emfs
are added if they are connected in series because emfs are thought of as the circuit's source. The
flow of current via the terminal is necessary for the potential. If the current's magnitude is greater
than zero, it might exist.

2. If the assumed direction of a current in a network is in error, how is this fact indicated in the result?

3. Write the loop equations for the circuit shown in the Figure below and calculate the branch
currents.

Prepared by: Engr. Edwin C. Espinas, for TUP COE-EE Department


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