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UNIVERSITI TUN HUSSEIN ONN MALAYSIA

FINAL EXAMINATION
SEMESTER I
SESSION 2010t2011

COURSE NAME DIGITAL ELECTROMC

COURSE CODE DEE 2123

PROGRAMME 2DEE/DET

EXAMINATIONDATE NOVEMBER/DECEMBER 20 I O

DURATION 3 HOURS

INSTRUCTIONS ANSWER FrVE (s) QUESTTONS

ONLY

THIS QUESTION PAPER CONSISTS OF EIGHT (S) PAGES

 DEE2I23

Ql (a) Data are often fiansmiued between digital systems. State two types of
digital data transmission and the advantages for each type.
(4 marks)

(b) Explain why digital systems are less affected by noise.

(4 marks)

(c) Showing all working steps and without using a calculator, convert
52.375rc to:

(i) binary
(iD hexadecimal
(iii) octal
(7 marks)

(d) What is the main function of the

(i) BCD code

(iD parity code
(5 marks)

Q2 (a) A Boolean expression is given as Z = (B + D)(B + D) + AED

(i) Draw a logic diagram corresponding to the Boolean expression
without simpliffing it.
(6 marks)

(ii) Simpliff the Boolean expression in Q2a(i) using Boolean theorem.

(4 marks)
(iii) Draw the simplified circuit.
(2 marks)

(iv) Give 2 advantages for minimizing logic circuits.

(2 marks)

(b) Use a Karnaugh map to simplift the Boolean expression:

A.B.c.D + ,q,.E.c.n +1.n.e .o +Z.a.c.o + t.n.c.D + e.E.c.n + ,t.E.c.o

(6 marks)
 DEE2I23

Q3 (a) For the circuit in Figure Q3(a),

(i) Write down the logic expression for output F.

(5 marks)

(ii) By replacing each AND, OR and NOT gates with its NAND gates
equivalent, redraw the circuit using only 2-input NAND gates.

(7 marks)

(b) From the truth table in Table Q3O), write the

(i) standard sum of product output

(ii) standard product of sum output
(iiD obtain the minimum sum of product output
(8 marks)

Table Q3(b)

Inputs Output
A B C Z
0 0 0 0
0 0 I I
0 I 0 0
0 I I I
l 0 0 0
I 0 I 0
I I 0 I
I I I I

Q4 (a) write the tnrth table for a half adder. From the truth table obtain the
Boolean expressions for the suM and cARRY outputs. Then draw the
resulting logic circuit.
(6 marks).

(b) Produce a tnrth table for a full adder. use the Karnaugh map method to
simpli$ the Boolean expressions for the suM and cARRy outputs. Then
draw the resulting minimum circuit.
(10 marks)
(c) Draw a full adder circuit constructed using two half adders.

( 4 marks)
 DEE2I23

Qs (a) Perform the following 2's complement 8-bit signed binary arithmetic
operations.

(i) 00ll0lll +00110010

(iD 00110100 - 00001010

(5 marks)

(b) Add the following decimal numbers after converting each to its BCD
code.

(i) 385 + ltO

(ii) 149 + s8
(9 marks)

(c) Figure Q5(c) is a 4-bit binary adder-subtractor circuit. Determine the SUM
output if :

(i) inputs Aq As Ae Ar :
0 I 1 1, inputs Br Bz B: Br:0 0l 0 and
th",EOOnnl SUBTRACI"OR control :0

(iii) inputs Ar Az 'A,3 Aq : 0l I I and inputs Br Bz Bs Bc :01l0 and

the ,ennEn / SUBTMC.?'OR control :l
(6 marks)

Q6 (a) with the aid of a suitable truth table describe the operation of the 4- input
multiplexer circuit in Figrne Q6(a).
(6 marks)

(b) Multiplexer circuits find numerous applications in digital systems.

Describe two examples of the multiplexer applications.
(8 marks)

(c) Show how three 2-input multiplexers in Figure Q6(c) can be connected
to perform the function of one 4-input multiplexer.
(6 marks)
 DEE2I23

Q7 (a) Diagrams in Figure Q7(a) show the logic symbol for the 74LS138 decoder
and its intemal circuitry. By examining these diagrarns carefully, and
with the aid of a suitable truth table. determine the function of the
decoder.
(10 marks)

(b) What is at the outputs ofthe 74LS138 if :

(D Er=0,Er=0, Et=1, Az=1, Ar=0, Ao-l

(ii) E, =0,E, =0, Et=1, Az=0, Ar=0, Ar=I

(iii) Er=0,E2=0, Et=0, Az=lo Ar=1, Ao=l

(6 marks)

(d) Using the 74LSl38 logic symbol in Figure Q7(a), show how this decoder
can be wired up to operate as a demultiplexer.

(4 marks)
 DEE2I23

FINAL EXAMINATION

SEMESTER/SESSION : Il20rcn0ll PROGRAMME :?DEE/DET

COURSE : DIGITALELECTRONIC COURSECODE: DEE2I23

Fisure O3(e)

4+it binary numberA

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Conrol

9$SzSr BroL
4-bit binary SUM I
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b
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.=
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Fieure O5(c)

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 DEE2I23

FINAL EXAMINATION

SEMESTER/SESSION ll20r020ll PROGRAMME :?DEEIDET

COURSE DIGITALELECTRONIC COURSECODE : DEE2I23

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lr

Sr Ss

Fisure O6(a)

Fieune O6(c)
 DEE2I23

FINAL EXAMINATION

SEMESTER/SESSION : l/20l02,0ll PROGRAMME :2DEE/DET

COURSE : DIGITAL ELECTROMC COURSE CODE : DEE2I23

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E3

tr'ieure O7(a)