Acer Nitro AN517-41 - LA-L031P GH53Z REV1A

A B C D E
Model Name : Scala_CAS/Kamiq_CAS GN20E

Compal Project Name : GH53Z
File Name : LA-L031P
1 1
2
Compal LA-L031P 2
GH53Z MB Schematics Document

AMD Cezanne (FP6) Platform
3
REV:1A 3
2020-01-04
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2020/11/16 Deciphered Date 2021/11/16 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
COVER PAGE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-L031P
Shared with Compal Date: Tuesday, January 05, 2021 Sheet 1 of 122
A B C D E
A B C D E
Model Name : GH53Z
1 1
(Channel A) page 23 (Channel B) page 24
!
260pin DDRIV SO-DIMM 260pin DDRIV SO-DIMM
Memory BUS(DDR4)
8>,+, 8 $ 2'
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3200Mhz
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= , /*, ) 9) Security Classification Compal Secret Data Compal Electronics, Inc.

BLOCK DIAGRAMS
! 1.0
Date: Tuesday, January 05, 2021 Sheet 2 of 122
A B C D E
A B C D E
Voltage Rails BOARD ID Table Board ID / SKU ID Table for AD channel

Power Plane Description S0 S3 S5
Board ID PCB Revision
0 Rev 0.1
+19V_VIN Adapter power supply (19V) ON ON ON
1 Rev 1.0
+19VB AC or battery power rail for power circuit. ON ON ON
2
+APU_CORE Core voltage for APU ON OFF OFF
3
+APU_CORE_SOC Voltage for On-die VGA of APU ON OFF OFF
4 Rev 0.1 + RGB KB
+0.75VALW 0.75V always on power rail ON ON OFF
1 5 Rev 1.0 + RGB KB 1
+0.75VS 0.75V switched power rail ON OFF OFF
6
+1.8VALW 1.8V always on power rail ON ON OFF
7
+1.8VS 1.8V switched power rail ON OFF OFF
+1.8V 1.8V power rail for APU and DDR ON ON OFF
+1.2V 1.2V power rail for APU and DDR ON ON OFF
+MEM_VDDQ 1.1V/0.6V switched power rail for LPDDR4/4x ON OFF OFF
+3VALW 3.3V always on power rail ON ON OFF
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON AC:ON
DC:OFF
+5VS 5V switched power rail ON OFF OFF
+RTC_APU RTC power ON ON ON BOM Structure Table
+TP_VCC 3.3V Touch Pad power ON ON OFF Config Config Description
+TS_PWR 3.3V Touch Screen Power ON ON OFF @ Components Do Not Install
+FP_VCC 3.3V Finger Print power ON ON OFF 45@ HDMI Royalty PN
CONN@ Mechanical Connector
JP@ Jump
APU SMBus/I2C Address Table RS@ R-Short
2 Address [7:0] TP@ Test Point 2
Master Device Address[7:1]
Write Read HDT@ AMD HDT Debug Components
TPM@ TPM Components POWER SEQUENCE
I2C Port 0 Touch Screen CHG@ USB Charger
(+1.8VS) (Reserve) G-A +RTCBATT
TMS@/TMSIEC@ Thermal sensor /Thermal sensor for IEC
EC_ON
I2C Port 1 RD@ SATA Re-driver
+5VALW
(+1.8VS) HDD@ HDD Sku
0.75_1.8VALW_PWREN
LED14P@ RGB Keyboard G-B
I2C Port 2 +1.8VALW/+0.75VALW
N18PA@ / N20P@ Nvidia N18PA/GN20P GPU BOM
(+3VS) 3V_EN
12VGPU@/5VGPU@/ 12V FAN & 5V FAN
12VCPU@/5VCPU@ +3VALW
0101 0000b 1010 0000b 1010 0001b
JDIMM1 50h A0h A1h EMI@/@EMI@ EMI Components Install/Uninstall
SBMus Port 0 SYSON
(+3VS) ESD@/@ESD@ ESD Components Install/Uninstall
0101 0001b 1010 0010b 1010 0011b +1.2V/+2.5V
JDIMM2 TB@ Turbo Key
51h A2h A3h G-C SUSP#
DP@ / NDP@ Mini DP
+5VS/+3VS/+1.8VS/+MEM_VDDQ
PTP 0010 1100b 0101 1000b 0101 1001b 0.75VS_PWR_EN#
I2C_3_SCL (Synaptics) 2Ch 58h 59h EVT@/ PVT@ EC FW Board ID
+0.75VS
(+3VALW) FP@/FPESD@ Finger Print Components
3 PTP 0001 1111b 0011 1110b 0011 1111b VR_ON 3
(ELAN) 15h 3Eh 3Fh
G-D +APU_CORE
SMBus Port 1 +APU_CORE_SOC

(+3VALW)
EC SMBus Address Table

Smart Battery 0000 1011b 0001 0110b 0001 0111b
EC_SMB_CK1 0Bh 16h 17h
(+EC_VCC)
Charger IC 0000 1001b 0001 0010b 0001 0011b
09h 12h 13h
APU Temp. 0100 1100b 1001 1000b 1001 1001b

4Ch 98h 99h
1001 1110b
EC_SMB_CK2 GPU Temp. 9Eh
(+EC_VCC)
Thermal Sensor 1001 101xb
Temp. (UF1)
4 4
Thermal Sensor 1001 0000b

Temp. (UF2) 90h
EC_SMB_CK3 RGB KB 1100 0000b

(+5VS) Driver IC C0h Security Classification Compal Secret Data Compal Electronics, Inc.
ESB_CLK 1100 0000b NOTES LIST
(+EC_VCC) KC3810 C0h THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.0
A B C D E
5 4 3 2 1
D D
C C
B B
www.teknisi-indonesia.com
A A

POWER MAP
1.0
5 4 3 2 1
5 4 3 2 1
Power Sequence AC-IN G3 --> S0 S0 --> S3 S3 --> S0 S0 --> S5

D D
+3VLP +3VLP
ACIN ACIN
EC_ON 2.391ms EC_ON
+5VALW 2.633ms +5VALW
178ms
ON/OFFBTN# ON/OFFBTN#
89.96ms 91.88ms
0.75_1.8VALW_PWREN
198.5us 0.75_1.8VALW_PWREN
1.485ms
+0.75VALW 634us +0.75VALW
2.09ms
+1.8VALW +1.8VALW
100ms
3V_EN
3V_EN
590us 1.613ms +3VALW
+3VALW 101ms
PBTN_OUT# 7.896ms PBTN_OUT#
123.6ms
EC_RSMRST# 8.35s EC_RSMRST#
SLP_S5# 103.5us 1.3ms SLP_S5#
C
SLP_S3# 104.7us 4.92ms SLP_S3# C
SYSON 121.7ms
58.2ms SYSON
+1.2V_VDDQ 628.9us 1.605ms +1.2V_VDDQ
+0.6VS_VTT 937.3us 366.7us +0.6VS_VTT
+2.5V 1.078ms 2.855ms +2.5V
20.5ms
SUSP# 63.22ms 21.4ms 66.5ms SUSP#
374.3us
+5VS 1.764ms 351.4us 1.905ms +5VS
360.3us
+3VS 162us 361.4us 162.9us +3VS
1.286ms
+1.8VS 5.333ms 1.285ms 5.863ms +1.8VS
KBRST# 23.85ms 63.22ms 45.64ms 66.44ms KBRST#
0.75VS_PWR_EN# 26.16ms 63.22ms
68.92ms 66.5ms 0.75VS_PWR_EN#
271.7us
+0.75VS 1.234ms 274.7us 1.11ms +0.75VS
21ms
VR_ON 93ms 23.59ms 91.88ms VR_ON
2.13ms
+APU_CORE 97.78us 2.243ms 118.2us +APU_CORE
2.202ms
+APU_CORE_SOC 163us 2.195ms 242.9us +APU_CORE_NB
27.82ms
VGATE 2.541ms 2.557ms 34.34ms VGATE
B B
SYS_PWRGD_EC 41.23ms 36.48ms 42.93ms 24.59ms SYS_PWRGD_EC

APU_PWROK 17.95ms 3.64ms 18.11ms 3.62ms APU_PWROK
APU_PCIE_RST# 728ms 376.6ms APU_PCIE_RST#

APU_RST# 24.5ms 6.6ms APU_RST#
A A

POWER SEQUENCE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
1.0
5 4 3 2 1
5 4 3 2 1
Main Func = CPU
UC1B @
PCIE
VGA@ CV2731 2 1 0.22U_0201_6.3V PEG_CRX_GTX_P0 G13 P_GFX_RXP0 P_GFX_TXP0 F4 PEG_CTX_GRX_P0 CV2746 2 1 0.22U_0201_6.3V VGA@ PEG_CTX_C_GRX_P0
<25> PEG_CRX_C_GTX_P0 PEG_CRX_GTX_N0 PEG_CTX_GRX_N0 CV2747 2 PEG_CTX_C_GRX_N0 PEG_CTX_C_GRX_P0 <25>
D VGA@ CV2732 2 1 0.22U_0201_6.3V F13 P_GFX_RXN0 P_GFX_TXN0 F2 1 0.22U_0201_6.3V VGA@ D
<25> PEG_CRX_C_GTX_N0 PEG_CTX_C_GRX_N0 <25>
VGA@ CV2733 2 1 0.22U_0201_6.3V PEG_CRX_GTX_P1 J14 P_GFX_RXP1 P_GFX_TXP1 F3 PEG_CTX_GRX_P1 CV2748 2 1 0.22U_0201_6.3V VGA@ PEG_CTX_C_GRX_P1
VGA@ CV2734 2 1 0.22U_0201_6.3V H14 P_GFX_RXN1 P_GFX_TXN1 E4 1 0.22U_0201_6.3V VGA@
VGA@ CV2735 2 1 0.22U_0201_6.3V PEG_CRX_GTX_P2 G15 P_GFX_RXP2 P_GFX_TXP2 E1 PEG_CTX_GRX_P2 CV2750 2 1 0.22U_0201_6.3V VGA@ PEG_CTX_C_GRX_P2
VGA@ CV2736 2 1 0.22U_0201_6.3V F15 P_GFX_RXN2 P_GFX_TXN2 C1 1 0.22U_0201_6.3V VGA@
VGA@ CV2737 2 1 0.22U_0201_6.3V PEG_CRX_GTX_P3 J15 P_GFX_RXP3 P_GFX_TXP3 D5 PEG_CTX_GRX_P3 CV2752 2 1 0.22U_0201_6.3V VGA@ PEG_CTX_C_GRX_P3
VGA@ CV2738 2 1 0.22U_0201_6.3V K15 P_GFX_RXN3 P_GFX_TXN3 E6 1 0.22U_0201_6.3V VGA@
<25> PEG_CRX_C_GTX_N3 dGPU PEG_CTX_C_GRX_N3 <25>
GPU VGA@ CV2739 2 1 0.22U_0201_6.3V PEG_CRX_GTX_P4 H16 P_GFX_RXP4 P_GFX_TXP4 C6 PEG_CTX_GRX_P4 CV2754 2 1 0.22U_0201_6.3V VGA@ PEG_CTX_C_GRX_P4 GPU
VGA@ CV2797 2 1 0.22U_0201_6.3V J16 P_GFX_RXN4 P_GFX_TXN4 D6 1 0.22U_0201_6.3V VGA@
VGA@ CV2740 2 1 0.22U_0201_6.3V PEG_CRX_GTX_P5 F18 P_GFX_RXP5 P_GFX_TXP5 B6 PEG_CTX_GRX_P5 CV2756 2 1 0.22U_0201_6.3V VGA@ PEG_CTX_C_GRX_P5
VGA@ CV2741 2 1 0.22U_0201_6.3V G18 P_GFX_RXN5 P_GFX_TXN5 C7 1 0.22U_0201_6.3V VGA@
VGA@ CV2742 2 1 0.22U_0201_6.3V PEG_CRX_GTX_P6 J18 P_GFX_RXP6 P_GFX_TXP6 D8 PEG_CTX_GRX_P6 CV2758 2 1 0.22U_0201_6.3V VGA@ PEG_CTX_C_GRX_P6
VGA@ CV2743 2 1 0.22U_0201_6.3V K18 P_GFX_RXN6 P_GFX_TXN6 B8 1 0.22U_0201_6.3V VGA@
VGA@ CV2744 2 1 0.22U_0201_6.3V PEG_CRX_GTX_P7 H19 P_GFX_RXP7 P_GFX_TXP7 C8 PEG_CTX_GRX_P7 CV2760 2 1 0.22U_0201_6.3V VGA@ PEG_CTX_C_GRX_P7
VGA@ CV2745 2 1 0.22U_0201_6.3V G19 P_GFX_RXN7 P_GFX_TXN7 A8 1 0.22U_0201_6.3V VGA@
PCIE_ARX_DTX_P0 G11 P_GPP_RXP0 LAN P_GPP_TXP0 L3 PCIE_ATX_DRX_P0

<72> PCIE_ARX_DTX_P0 PCIE_ARX_DTX_N0 PCIE_ATX_DRX_N0 PCIE_ATX_DRX_P0 <72>
LAN F11 P_GPP_RXN0 P_GPP_TXN0 L1 LAN
<72> PCIE_ARX_DTX_N0 PCIE_ATX_DRX_N0 <72>
PCIE_ARX_DTX_P1 J10 P_GPP_RXP1 WLAN P_GPP_TXP1 L4 PCIE_ATX_DRX_P1 CC17 1 2 .1U_0402_16V7K
<52> PCIE_ARX_DTX_P1 PCIE_ARX_DTX_N1 PCIE_ATX_DRX_N1 PCIE_ATX_C_DRX_P1 <52>
C WLAN H10 P_GPP_RXN1 P_GPP_TXN1 L2 CC18 1 2 .1U_0402_16V7K WLAN C
<52> PCIE_ARX_DTX_N1 PCIE_ATX_C_DRX_N1 <52>
G8 P_GPP_RXP2/SATA0_RXP P_GPP_TXP2/SATA0_TXP M4
F8 P_GPP_RXN2/SATA0_RXN P_GPP_TXN2/SATA0_TXN M2 FH51S
FH51S
PCIE_SATA_ARX_DTX_P3 G6 P_GPP_RXP3/SATA1_RXP P_GPP_TXP3/SATA1_TXP N3 PCIE_SATA_ATX_DRX_P3
<68> PCIE_SATA_ARX_DTX_P3 PCIE_SATA_ARX_DTX_N3 PCIE_SATA_ATX_DRX_N3 PCIE_SATA_ATX_DRX_P3 <68>
HDD F7 P_GPP_RXN3/SATA1_RXN P_GPP_TXN3/SATA1_TXN N1 HDD
<68> PCIE_SATA_ARX_DTX_N3 PCIE_SATA_ATX_DRX_N3 <68>
PCIE_ARX_DTX_P4 M9 P_GPP_RXP4 P_GPP_TXP4 T2 PCIE_ATX_DRX_P4 CC23 1 2 0.22U_0402_16V7K

<69> PCIE_ARX_DTX_P4 PCIE_ARX_DTX_N4 PCIE_ATX_DRX_N4 CC24 PCIE_ATX_C_DRX_P4 <69>
M8 P_GPP_RXN4 P_GPP_TXN4 T4 1 2 0.22U_0402_16V7K
PCIE_ARX_DTX_P5 L7 P_GPP_RXP5 P_GPP_TXP5 R1 PCIE_ATX_DRX_P5 CC25 1 2 0.22U_0402_16V7K
L6 P_GPP_RXN5 P_GPP_TXN5 R3 1 2 0.22U_0402_16V7K SSD
SSD PCIE x4
PCIE_ARX_DTX_P6 K7 x4 PCIE Express P2 PCIE_ATX_DRX_P6 CC27 1 2 0.22U_0402_16V7K
PCIE x4 <69> PCIE_ARX_DTX_P6 P_GPP_RXP6 P_GPP_TXP6
PCIE_ATX_C_DRX_P6 <69>
PCIE_ARX_DTX_N6 K8 P_GPP_RXN6 P_GPP_TXN6 P4 PCIE_ATX_DRX_N6 CC28 1 2 0.22U_0402_16V7K
PCIE_ARX_DTX_P7 H6 P_GPP_RXP7 P_GPP_TXP7 N2 PCIE_ATX_DRX_P7 CC29 1 2 0.22U_0402_16V7K
H7 P_GPP_RXN7 P_GPP_TXN7 N4 1 2 0.22U_0402_16V7K
SATA Port2
PCIE_ARX_DTX_P8 L9 P_GPP_RXP8/SATA2_RXP P_GPP_TXP8/SATA2_TXP K2 PCIE_ATX_DRX_P8 CC19 1 2 0.22U_0402_16V7K
L10 P_GPP_RXN8/SATA2_RXN P_GPP_TXN8/SATA2_TXN K4 CC20 1 2 0.22U_0402_16V7K
PCIE_ARX_DTX_P9 K11 P_GPP_RXP9/SATA3_RXP P_GPP_TXP9/SATA3_TXP J4 PCIE_ATX_DRX_P9 CC21 1 2 0.22U_0402_16V7K
J11 P_GPP_RXN9/SATA3_RXN P_GPP_TXN9/SATA3_TXN J2 CC22 1 2 0.22U_0402_16V7K
B <69> PCIE_ARX_DTX_N9 PCIE_ATX_C_DRX_N9 <69> B
SSD SSD
PCIE_ARX_DTX_P10 J12 M.2 SSD H3 PCIE_ATX_DRX_P10 CC10 1 2 0.22U_0402_16V7K
PCIE/SATA <69> PCIE_ARX_DTX_P10 P_GPP_RXP10 P_GPP_TXP10
PCIE_ATX_C_DRX_P10 <69> PCIE/SATA
PCIE_ARX_DTX_N10 H12 P_GPP_RXN10 P_GPP_TXN10 H1 PCIE_ATX_DRX_N10 CC11 1 2 0.22U_0402_16V7K
PCIE_ARX_DTX_P11 J13 P_GPP_RXP11 P_GPP_TXP11 H4 PCIE_ATX_DRX_P11 CC12 1 2 0.22U_0402_16V7K
K13 P_GPP_RXN11 P_GPP_TXN11 H2 CC13 1 2 0.22U_0402_16V7K
FP6 REV 0.92

PART 2 OF 13
FP6_BGA1140
8& 7
UC1 UC1
RYZEN5 3.3G 5600H RYZEN7 3.2G 5800H

R556H@ R758H@
SA0000E3X20 SA0000E1P30
S IC RYZEN5 100-000000296 3.3G APU ABO S IC RYZEN7 100-000000295 3.2G APU ABO
A A
UC1
RYZEN9 3.3G 5900H Security Classification Compal Secret Data Compal Electronics, Inc.
R959H@ 2020/11/16 2021/11/16 Title
Issued Date Deciphered Date
SA0000E1N30 FP6_(1/7)_PEG/PCIE/SATA
S IC RYZEN9 100-000000300 3.3G APU ABO THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.0
5 4 3 2 1
5 4 3 2 1
Main Func = CPU

8/29
UC1A @
MEMORY A UC1I @
<23> DDR_A_MA[13..0]
MEMORY B
DDR_A_MA0 AK26 DDR_A_DQ[63..0] <23> <24> DDR_B_MA[13..0]
MA_ADD0/RSVD
DDR_A_MA1 AG24 K27 DDR_A_DQ0 DDR_B_MA0 AM29 DDR_B_DQ[63..0] <24>
MA_ADD1/RSVD MA_DATA0/MAA_DATA8 MB_ADD0/RSVD
DDR_A_MA2 AG23 MA_ADD2/MAB_CA0 MA_DATA1/MAA_DATA9 L26 DDR_A_DQ1 DDR_B_MA1 AH31 MB_ADD1/RSVD MB_DATA0/MBA_DATA8 C27 DDR_B_DQ0
DDR_A_MA3 AG26 MA_ADD3/MAA_CA4 MA_DATA2/MAA_DATA13 N26 DDR_A_DQ2 DDR_B_MA2 AJ30 MB_ADD2/MBB_CA0 MB_DATA1/MBA_DATA9 A28 DDR_B_DQ1
DDR_A_MA4 AG27 MA_ADD4/MAA_CA5 MA_DATA3/MAA_DATA12 N27 DDR_A_DQ3 DDR_B_MA3 AH29 MB_ADD3/MBA_CA4 MB_DATA2/MBA_DATA13 F29 DDR_B_DQ2
DDR_A_MA5 AF21 MA_ADD5/MAA_CA3 MA_DATA4/MAA_DATA11 G27 DDR_A_DQ4 DDR_B_MA4 AG32 MB_ADD4/MBA_CA5 MB_DATA3/MBA_DATA12 F31 DDR_B_DQ3
D D
DDR_A_MA6 AF22 MA_ADD6/MAA_CA2 MA_DATA5/MAA_DATA10 H27 DDR_A_DQ5 DDR_B_MA5 AG30 MB_ADD5/MBA_CA3 MB_DATA4/MBA_DATA11 B27 DDR_B_DQ4
DDR_A_MA7 AF25 MA_ADD7/RSVD MA_DATA6/MAA_DATA15 M27 DDR_A_DQ6 DDR_B_MA6 AG31 MB_ADD6/MBA_CA2 MB_DATA5/MBA_DATA10 D27 DDR_B_DQ5
DDR_A_MA8 AF24 MA_ADD8/RSVD MA_DATA7/MAA_DATA14 N24 DDR_A_DQ7 DDR_B_MA7 AF30 MB_ADD7/RSVD MB_DATA6/MBA_DATA15 E32 DDR_B_DQ6
DDR_A_MA9 AE21 MA_ADD9/RSVD DDR_B_MA8 AG29 MB_ADD8/RSVD MB_DATA7/MBA_DATA14 F30 DDR_B_DQ7
DDR_A_MA10 AL21 MA_ADD10/MAB_CS_L1 MA_DATA8/MAA_DATA0 L23 DDR_A_DQ8 DDR_B_MA9 AF29 MB_ADD9/RSVD
DDR_A_MA11 AF27 MA_ADD11/MAA_CKE1 MA_DATA9/MAA_DATA1 N21 DDR_A_DQ9 DDR_B_MA10 AM30 MB_ADD10/MBB_CS_L1 MB_DATA8/MBA_DATA0 H31 DDR_B_DQ8
DDR_A_MA12 AE23 MA_ADD12/MAA_CKE0 MA_DATA10/MAA_DATA5 T21 DDR_A_DQ10 DDR_B_MA11 AF31 MB_ADD11/MBA_CKE1 MB_DATA9/MBA_DATA1 H30 DDR_B_DQ9
DDR_A_MA13 AM23 MA_ADD13_BANK2/RSVD MA_DATA11/MAA_DATA4 T22 DDR_A_DQ11 DDR_B_MA12 AE32 MB_ADD12/MBA_CKE0 MB_DATA10/MBA_DATA5 K31 DDR_B_DQ10
DDR_A_MA14_W E# AM21 MA_WE_L_ADD14/MAB_CKE1 MA_DATA12/MAA_DATA7 M22 DDR_A_DQ12 DDR_B_MA13 AP30 MB_ADD13_BANK2/RSVD MB_DATA11/MBA_DATA4 L30 DDR_B_DQ11
<23> DDR_A_MA14_W E# DDR_A_MA15_CAS# AL27 L24 DDR_A_DQ13 DDR_B_MA14_W E# AP31 G30 DDR_B_DQ12
MA_CAS_L_ADD15/RSVD MA_DATA13/MAA_DATA6 MB_WE_L_ADD14/MBB_CKE1 MB_DATA12/MBA_DATA7
<23> DDR_A_MA15_CAS# DDR_A_MA16_RAS# AL24 R21 DDR_A_DQ14 <24> DDR_B_MA14_W E# DDR_B_MA15_CAS# AP29 H29 DDR_B_DQ13
MA_RAS_L_ADD16/MAB_CKE0 MA_DATA14/MAA_DATA2 MB_CAS_L_ADD15/RSVD MB_DATA13/MBA_DATA6
<23> DDR_A_MA16_RAS# R23 DDR_A_DQ15 <24> DDR_B_MA15_CAS# DDR_B_MA16_RAS# AN29 K30 DDR_B_DQ14
MA_DATA15/MAA_DATA3 MB_RAS_L_ADD16/MBB_CKE0 MB_DATA14/MBA_DATA2
<24> DDR_B_MA16_RAS# K29 DDR_B_DQ15
MB_DATA15/MBA_DATA3
DDR_A_BA0 AL22 MA_BANK0/MAB_CS_L0 MA_DATA16/MAA_DATA17 P24 DDR_A_DQ16
<23> DDR_A_BA0 DDR_A_BA1 AK27 R26 DDR_A_DQ17 DDR_B_BA0 AN31 N32 DDR_B_DQ16
MA_BANK1/MAB_CA1 MA_DATA17/MAA_DATA16 MB_BANK0/MBB_CS_L0 MB_DATA16/MBA_DATA21
<23> DDR_A_BA1 T27 DDR_A_DQ18 <24> DDR_B_BA0 DDR_B_BA1 AM32 N29 DDR_B_DQ17
MA_DATA18/MAA_DATA21 MB_BANK1/MBB_CA1 MB_DATA17/MBA_DATA22
DDR_A_BG0 AE27 V27 DDR_A_DQ19 <24> DDR_B_BA1 P30 DDR_B_DQ18
MA_BG0/MAA_CS_L1 MA_DATA19/MAA_DATA20 MB_DATA18/MBA_DATA20
<23> DDR_A_BG0 DDR_A_BG1 AE26 P25 DDR_A_DQ20 DDR_B_BG0 AD29 L32 DDR_B_DQ19
MA_BG1/MAA_CS_L0 MA_DATA20/MAA_DATA19 MB_BG0/MBA_CS_L1 MB_DATA19/MBA_DATA19
<23> DDR_A_BG1 P27 DDR_A_DQ21 <24> DDR_B_BG0 DDR_B_BG1 AD31 L31 DDR_B_DQ20
MA_DATA21/MAA_DATA18 MB_BG1/MBA_CS_L0 MB_DATA20/MBA_DATA17
DDR_A_ACT# AD22 V23 DDR_A_DQ22 <24> DDR_B_BG1 M30 DDR_B_DQ21
MA_ACT_L/RSVD MA_DATA22/MAA_DATA23 MB_DATA21/MBA_DATA16
<23> DDR_A_ACT# T25 DDR_A_DQ23 DDR_B_ACT# AD30 L29 DDR_B_DQ22
MA_DATA23/MAA_DATA22 MB_ACT_L/RSVD MB_DATA22/MBA_DATA18
<23> DDR_A_DM[7..0] DDR_A_DM0 L27 <24> DDR_B_ACT# N31 DDR_B_DQ23
MA_DM0/MAA_DM1 MB_DATA23/MBA_DATA23
DDR_A_DM1 N23 W22 DDR_A_DQ24 <24> DDR_B_DM[7..0] DDR_B_DM0 C30
MA_DM1/MAA_DM0 MA_DATA24/MAA_DATA30 MB_DM0/MBA_DM1
DDR_A_DM2 R27 MA_DM2/MAA_DM2 MA_DATA25/MAA_DATA31 Y23 DDR_A_DQ25 DDR_B_DM1 H32 MB_DM1/MBA_DM0 MB_DATA24/MBA_DATA30 R30 DDR_B_DQ24
DDR_A_DM3 Y24 MA_DM3/MAA_DM3 MA_DATA26/MAA_DATA26 AC24 DDR_A_DQ26 DDR_B_DM2 M29 MB_DM2/MBA_DM2 MB_DATA25/MBA_DATA31 R32 DDR_B_DQ25
DDR_A_DM4 AP27 MA_DM4/MAB_DM2 MA_DATA27/MAA_DATA27 AC23 DDR_A_DQ27 DDR_B_DM3 T29 MB_DM3/MBA_DM3 MB_DATA26/MBA_DATA26 V30 DDR_B_DQ26
DDR_A_DM5 AW23 MA_DM5/MAB_DM3 MA_DATA28/MAA_DATA28 V21 DDR_A_DQ28 DDR_B_DM4 AU30 MB_DM4/MBB_DM2 MB_DATA27/MBA_DATA27 V32 DDR_B_DQ27
DDR_A_DM6 AT21 MA_DM6/MAB_DM1 MA_DATA29/MAA_DATA29 W21 DDR_A_DQ29 DDR_B_DM5 BD28 MB_DM5/MBB_DM3 MB_DATA28/MBA_DATA28 P29 DDR_B_DQ28
DDR_A_DM7 AV18 MA_DM7/MAB_DM0 MA_DATA30/MAA_DATA24 AA24 DDR_A_DQ30 DDR_B_DM6 BB23 MB_DM6/MBB_DM1 MB_DATA29/MBA_DATA29 P31 DDR_B_DQ29
W24 RSVD_52 MA_DATA31/MAA_DATA25 AA22 DDR_A_DQ31 DDR_B_DM7 BD20 MB_DM7/MBB_DM0 MB_DATA30/MBA_DATA25 U31 DDR_B_DQ30
W31 RSVD_57 MB_DATA31/MBA_DATA24 U29 DDR_B_DQ31
C DDR_A_DQS0 M25 AP26 DDR_A_DQ32 C
MA_DQS_H0/MAA_DQS_H1 MA_DATA32/MAB_DATA17
<23> DDR_A_DQS0 DDR_A_DQS0# M24 AN24 DDR_A_DQ33 DDR_B_DQS0 E29 AT29 DDR_B_DQ32
MA_DQS_L0/MAA_DQS_L1 MA_DATA33/MAB_DATA16 MB_DQS_H0/MBA_DQS_H1 MB_DATA32/MBB_DATA16
<23> DDR_A_DQS0# DDR_A_DQS1 P22 AR25 DDR_A_DQ34 <24> DDR_B_DQS0 DDR_B_DQS0# D28 AU32 DDR_B_DQ33
MA_DQS_H1/MAA_DQS_H0 MA_DATA34/MAB_DATA21 MB_DQS_L0/MBA_DQS_L1 MB_DATA33/MBB_DATA17
<23> DDR_A_DQS1 DDR_A_DQS1# P21 AU26 DDR_A_DQ35 <24> DDR_B_DQS0# DDR_B_DQS1 J31 AW31 DDR_B_DQ34
<23> DDR_A_DQS1# DDR_A_DQS2 T24 AN25 DDR_A_DQ36 <24> DDR_B_DQS1 DDR_B_DQS1# J29 AW30 DDR_B_DQ35
<23> DDR_A_DQS2 DDR_A_DQS2# R24 AN27 DDR_A_DQ37 <24> DDR_B_DQS1# DDR_B_DQS2 N30 AR30 DDR_B_DQ36
<23> DDR_A_DQS2# DDR_A_DQS3 AA21 AR27 DDR_A_DQ38 <24> DDR_B_DQS2 DDR_B_DQS2# M31 AT31 DDR_B_DQ37
<23> DDR_A_DQS3 DDR_A_DQS3# Y21 AU27 DDR_A_DQ39 <24> DDR_B_DQS2# DDR_B_DQS3 T30 AV30 DDR_B_DQ38
<23> DDR_A_DQS3# DDR_A_DQS4 AP23 <24> DDR_B_DQS3 DDR_B_DQS3# T31 AW29 DDR_B_DQ39
MA_DQS_H4/MAB_DQS_H2 MB_DQS_L3/MBA_DQS_L3 MB_DATA39/MBB_DATA22
<23> DDR_A_DQS4 DDR_A_DQS4# AP24 AV25 DDR_A_DQ40 <24> DDR_B_DQS3# DDR_B_DQS4 AU29
MA_DQS_L4/MAB_DQS_L2 MA_DATA40/MAB_DATA30 MB_DQS_H4/MBB_DQS_H2
<23> DDR_A_DQS4# DDR_A_DQS5 AW22 AW25 DDR_A_DQ41 <24> DDR_B_DQS4 DDR_B_DQS4# AU31 AY29 DDR_B_DQ40
MA_DQS_H5/MAB_DQS_H3 MA_DATA41/MAB_DATA31 MB_DQS_L4/MBB_DQS_L2 MB_DATA40/MBB_DATA29
<23> DDR_A_DQS5 DDR_A_DQS5# AV22 AV20 DDR_A_DQ42 <24> DDR_B_DQS4# DDR_B_DQS5 BA27 AY32 DDR_B_DQ41
MA_DQS_L5/MAB_DQS_L3 MA_DATA42/MAB_DATA26 MB_DQS_H5/MBB_DQS_H3 MB_DATA41/MBB_DATA28
<23> DDR_A_DQS5# DDR_A_DQS6 AT20 AW20 DDR_A_DQ43 <24> DDR_B_DQS5 DDR_B_DQS5# BB27 BC27 DDR_B_DQ42
<23> DDR_A_DQS6 DDR_A_DQS6# AR20 AV27 DDR_A_DQ44 <24> DDR_B_DQS5# DDR_B_DQS6 BC23 BB26 DDR_B_DQ43
<23> DDR_A_DQS6# DDR_A_DQS7 AR18 AW26 DDR_A_DQ45 <24> DDR_B_DQS6 DDR_B_DQS6# BA23 BC25 DDR_B_DQ44
<23> DDR_A_DQS7 DDR_A_DQS7# AT18 AU21 DDR_A_DQ46 <24> DDR_B_DQS6# DDR_B_DQS7 BC20 BA25 DDR_B_DQ45
<23> DDR_A_DQS7# Y26 AW21 DDR_A_DQ47 <24> DDR_B_DQS7 DDR_B_DQS7# BA20 BB30 DDR_B_DQ46
RSVD_58 MA_DATA47/MAB_DATA25 MB_DQS_L7/MBB_DQS_L0 MB_DATA46/MBB_DATA30
Y27 <24> DDR_B_DQS7# Y32 BA28 DDR_B_DQ47
RSVD_59 RSVD_61 MB_DATA47/MBB_DATA31
MA_DATA48/MAB_DATA11 AT22 DDR_A_DQ48 Y30 RSVD_60

DDR_A_CLK0 AJ25 MA_CLK_H0/MAA_CKT MA_DATA49/MAB_DATA10 AP21 DDR_A_DQ49 MB_DATA48/MBB_DATA11 BA24 DDR_B_DQ48
<23> DDR_A_CLK0 DDR_A_CLK0# AJ24 AN19 DDR_A_DQ50 DDR_B_CLK0 AJ31 BC24 DDR_B_DQ49
MA_CLK_L0/MAA_CKC MA_DATA50/MAB_DATA14 MB_CLK_H0/MBA_CKT MB_DATA49/MBB_DATA10
<23> DDR_A_CLK0# DDR_A_CLK1 AJ22 AN18 DDR_A_DQ51 <24> DDR_B_CLK0 DDR_B_CLK0# AK30 BC22 DDR_B_DQ50
MA_CLK_H1/MAB_CKT MA_DATA51/MAB_DATA15 MB_CLK_L0/MBA_CKC MB_DATA50/MBB_DATA14
<23> DDR_A_CLK1 DDR_A_CLK1# AJ21 AU23 DDR_A_DQ52 <24> DDR_B_CLK0# DDR_B_CLK1 AK32 BA22 DDR_B_DQ51
MA_CLK_L1/MAB_CKC MA_DATA52/MAB_DATA12 MB_CLK_H1/MBB_CKT MB_DATA51/MBB_DATA15
<23> DDR_A_CLK1# AR22 DDR_A_DQ53 <24> DDR_B_CLK1 DDR_B_CLK1# AL31 BB25 DDR_B_DQ52
MA_DATA53/MAB_DATA13 MB_CLK_L1/MBB_CKC MB_DATA52/MBB_DATA12
AN20 DDR_A_DQ54 <24> DDR_B_CLK1# BD25 DDR_B_DQ53
MA_DATA54/MAB_DATA9 MB_DATA53/MBB_DATA13
MA_DATA55/MAB_DATA8 AP19 DDR_A_DQ55 MB_DATA54/MBB_DATA9 BB22 DDR_B_DQ54

MB_DATA55/MBB_DATA8 BD22 DDR_B_DQ55
MA_DATA56/MAB_DATA6 AT19 DDR_A_DQ56
DDR_A_CS0# AL25 MA_CS_L0/MAB_CA2 MA_DATA57/MAB_DATA7 AW18 DDR_A_DQ57 MB_DATA56/MBB_DATA4 BA21 DDR_B_DQ56
<23> DDR_A_CS0# DDR_A_CS1# AM26 AU16 DDR_A_DQ58 DDR_B_CS0# AN30 BC21 DDR_B_DQ57
MA_CS_L1/MAB_CA5 MA_DATA58/MAB_DATA2 MB_CS_L0/MBB_CA2 MB_DATA57/MBB_DATA5
<23> DDR_A_CS1# AW16 DDR_A_DQ59 <24> DDR_B_CS0# DDR_B_CS1# AR31 BC18 DDR_B_DQ58
MA_DATA59/MAB_DATA3 MB_CS_L1/MBB_CA5 MB_DATA58/MBB_DATA2
B AW19 DDR_A_DQ60 <24> DDR_B_CS1# BB18 DDR_B_DQ59 B
MA_DATA60/MAB_DATA4 MB_DATA59/MBB_DATA3
MA_DATA61/MAB_DATA5 AU19 DDR_A_DQ61 MB_DATA60/MBB_DATA6 BB20 DDR_B_DQ60

MA_DATA62/MAB_DATA1 AP16 DDR_A_DQ62 MB_DATA61/MBB_DATA7 BB21 DDR_B_DQ61
MA_DATA63/MAB_DATA0 AT16 DDR_A_DQ63 MB_DATA62/MBB_DATA1 BB19 DDR_B_DQ62
DDR_A_CKE0 AD24 MA_CKE0/MAA_CA1 MB_DATA63/MBB_DATA0 BA18 DDR_B_DQ63
<23> DDR_A_CKE0 DDR_A_CKE1 AD25 W27 DDR_B_CKE0 AC31
MA_CKE1/MAA_CA0 RSVD_54 MB_CKE0/MBA_CA1
<23> DDR_A_CKE1 W25 <24> DDR_B_CKE0 DDR_B_CKE1 AC29 W30
RSVD_53 MB_CKE1/MBA_CA0 RSVD_56
AC26 <24> DDR_B_CKE1 W29
RSVD_68 RSVD_55
RSVD_69 AC27 RSVD_65 AA30

DDR_A_ODT0 AM24 MA_ODT0/MAB_CA3 RSVD_49 V26 RSVD_67 AB29
<23> DDR_A_ODT0 DDR_A_ODT1 AM27 V24 DDR_B_ODT0 AP32 V29
MA_ODT1/MAB_CA4 RSVD_48 MB_ODT0/MBB_CA3 RSVD_50
<23> DDR_A_ODT1 AA27 <24> DDR_B_ODT0 DDR_B_ODT1 AR29 V31
RSVD_63 MB_ODT1/MBB_CA4 RSVD_51
AA25 <24> DDR_B_ODT1 AA29
RSVD_62 RSVD_64
RSVD_66 AA31
DDR_A_ALERT# AE24 MA_ALERT_L/TEST31A
<23> DDR_A_ALERT# AK24 DDR_A_PAR DDR_B_ALERT# AE30
MA_PAROUT/RSVD MB_ALERT_L/TEST31B
DDR_A_EVENT# AK23 DDR_A_PAR <23> <24> DDR_B_ALERT# AM31 DDR_B_PAR
MA_EVENT_L MB_PAROUT/RSVD
<23> DDR_A_EVENT# DDR_A_RST# AD27 AN21 M_DDR4 1 RS@ 2 RC250 DDR_B_EVENT# AL30 DDR_B_PAR <24>
MA_RESET_L M_DDR4 MB_EVENT_L
<23> DDR_A_RST# M_LPDDR4 +1.2V_VDDQ <24> DDR_B_EVENT# DDR_B_RST#
FP6 REV 0.92 M_LPDDR4 AN22 0_0402_5% AC32 MB_RESET_L
PART 1 OF 13
<24> DDR_B_RST#
FP6 REV 0.92
1
FP6_BGA1140 PART 9 OF 13
FP6_BGA1140
RS@ RC251
0_0402_5%
EVENT# pull high
2
+1.2V_VDDQ
RC1 1 2 1K_0402_5% DDR_A_EVENT#

A A
+1.2V_VDDQ
RC2 1 2 1K_0402_5% DDR_B_EVENT#

FP6_(2/7)_DDR4
1.0
5 4 3 2 1
A B C D E
Main Func = CPU

DISP
+1.8VALW
EC/THERM
5
UC66
UC1C @ 1
P
+3VS NC 4 ENBKL
DISPLAY/SVI2/JTAG/TEST
EDP_TXP0 D11 A22 ENBKL_R ENBKL_R 2 Y ENBKL <58>
<41> EDP_TXP0 DP0_TXP0 1V8_S0 DP_BLON
A
G
RC105 1 2 1K_0402_5% APU_SID EDP_TXN0 B11 DP0_TXN0 DP_DIGON D23 ENVDD_R
<41> EDP_TXN0 1V8_S0
RC106 1 2 1K_0402_5% APU_ALERT# EDP DP_VARY_BL C23 INVTPWM_R NL17SZ07DFT2G_SC70-5
1V8_S0
3
RC107 1 2 1K_0402_5% APU_SIC EDP_TXP1 C11 DP0_TXP1 SA0000BIO00
APU_PROCHOT# <41> EDP_TXP1 EDP_TXN1 EDP_AUXP
1
RC108 1 2 1K_0402_5% A11 DP0_TXN1 DP0_AUXP D12 1
<41> EDP_TXN1 B12 EDP_AUXN EDP_AUXP <38>
DP0_AUXN
EDP_AUXN <38> EDP
EDP_TXP2 D10 DP0_TXP2 DP0_HPD C12 EDP_HPD
<41> EDP_TXP2 EDP_TXN2 B10 EDP_HPD <38> +1.8VALW
DP0_TXN2
<41> EDP_TXN2 J20
DP1_AUXP
EDP_TXP3 D9 DP0_TXP3 DP1_AUXN K20
<41> EDP_TXP3
5
EDP_TXN3 B9 L21 DP1_HPD UC64
<41> EDP_TXN3 DP0_TXN3 DP3: DP1_HPD
1
P
G23 DP1_TXP0 DP2: DP2_AUXP L19 NC
Y
4 ENVDD
ENVDD <38,41>
H23 M19 ENVDD_R 2
DP1_TXN0 DP1: HDMI DP2_AUXN
A
G
DP2_HPD M20
+3VS F22 DP1_TXP1 DP0: eDP NL17SZ07DFT2G_SC70-5
3
G22 DP1_TXN1 DP3_AUXP M14 @ SA0000BIO00
DP3_AUXN L14
0906 G21 DP1_TXP2 DP3_HPD L16
H21 DP1_TXN2
ENVDD_R RC690 1 RS@ 2 0_0201_5% ENVDD
DP_STEREOSYNC B23 DP_STEREOSYNC
2
QC1A F20 FH51S

G
DP1_TXP3
2N7002KDW_SOT363-6 G20 DP1_TXN3 Downsize for eDP routing
SB00000EO00 +1.8VALW
EC_SMB_CK2 6 1 APU_SIC
S
<26,58> EC_SMB_CK2
5
UC65
D
5
@ 1
P
G
QC1B NC 4 INVTPWM
INVTPWM_R Y INVTPWM <38>
2N7002KDW_SOT363-6 2
A
G
SB00000EO00
EC_SMB_DA2 3 4 APU_SID NL17SZ07DFT2G_SC70-5
S
<26,58> EC_SMB_DA2
3
SA0000BIO00
D
@
Vgs=1.0-2.5V TEST4 BB6 APU_TEST4 TP@
APU_TEST5 TC1
TEST5 BD5 TP@ TC2
RC800 1 2 0_0402_5% +3VS
TEST6 AG12
RC801 1 2 0_0402_5% ENBKL RC3 1 2 4.7K_0402_5%
TEST14 G25 APU_TEST14
2 K25 APU_TEST15 ENVDD 1 2 4.7K_0402_5% 2
TEST15 RC4 @
TEST16 F25 APU_TEST16
FH51S TEST17 F26 APU_TEST17 INVTPWM RC5 1 2 4.7K_0402_5%
+3VS
add bypass Res.
TEST31 H26 APU_TEST31 TP@ TC3
RC664 1 2 1K_0402_5% THERMTRIP#
TEST41 AK9 APU_TEST41 TP@ TC4 ENBKL_R RC697 1 2 100K_0402_5%
APU_TDI AP3 TDI 1V8_S5 ANALOGIO_0 AK21 APU_TEST470 TP@
APU_PROCHOT# APU_TDO APU_TEST471 TC5 ENVDD_R
AU1 TDO 1V8_S5 ANALOGIO_1 AG21 TP@ TC6 RC698 1 2 100K_0402_5%
APU_RST# APU_TCK AR2 TCK 1V8_S5
APU_PWROK APU_TMS AU3 TMS 1V8_S5 INVTPWM_R RC699 1 @ 2 100K_0402_5%
APU_PWROK <97> APU_TRST# AR4
1 1 1 TRST_L 1V8_S5
@ESD@ ESD@ ESD@ +1.8VALW APU_DBREQ# AT2 DBREQ_L 1V8_S5 DP1_HPD RC817 1 2 100K_0402_5%
CC99 CC5 CC6 +0.75VS
.1U_0402_16V7K 33P_0201_50V8J 33P_0201_50V8J
2 2 2 RC80 1 2 4.7K_0402_5% APU_RST# AW3 P3 SMU_ZVDDP RC162 1 2 196_0402_1%
RESET_L 1V8_S5 SMU_ZVDD
RC81 1 2 4.7K_0402_5% APU_PWROK AW4 PWROK 1V8_S5
APU_SIC B22 SIC
<66> APU_SIC APU_SID D22
Close to APU <66> APU_SID APU_ALERT#
SID
APU_VDDP_SEN_H
C22 ALERT_L 3V3_S0 VDDP_S5_SENSE AK7
AN9 AK12 VDDP_SENSE APU_VDDP_SEN_H <91>
THERMTRIP# THERMTRIP_L 3V3_S0 VDDP_SENSE
<58> THERMTRIP# APU_PROCHOT# VCC_SENSE_APU_CORE_SOC VDDP_SENSE <91>
B25 PROCHOT_L 3V3_S0 VDDCR_SOC_SENSE J23
<58,85,97> APU_PROCHOT# K22 VCC_SENSE_APU_CORE VCC_SENSE_APU_CORE_SOC <97>
VDDCR_SENSE
J21 VDDIO_MEM_S3_SENSE VCC_SENSE_APU_CORE <97>
TP@
SVID <97> SVC_PWR_APU
RC669 1
RC670 1
2 0_0402_5% SVC_PWR_APU_R D25
2 0_0402_5% SVD_PWR_APU_R C25
SVC0
SVD0
1V8_S5
1V8_S5
VDDIO_MEM_S3_SENSE
VSS_SENSE_A J22 VSS_SENSE_A RC8141

TC10
2 0_0402_5%
<97> SVD_PWR_APU SVT_PWR_APU_R A25 VSS_SEN_APU_CORE <97>
SVT0 1V8_S5 FP6 REV 0.92 VSS_SENSE_B AJ12
+1.8VALW <97> SVT_PWR_APU_R PART 3 OF 13 APU_VDDP_SEN_L
APU_VDDP_SEN_L <91>
FP6_BGA1140
RC109 1 @ 2 1K_0201_5% SVT_PWR_APU_R

3 RC110 1 @ 2 1K_0201_5% SVC_PWR_APU 3
RC111 1 @ 2 1K_0201_5% SVD_PWR_APU
AMD DEBUG TESTPOINT

+1.8VALW +1.8VS
JHDT1 JDBG1
1 1
+1.8VALW APU_TCK 1 2 APU_TCK_R 2 1 <10> LPC_CLK1 2 1 DP_STEREOSYNC
RH41 RS@ 0_0201_5% RC155 1 2 1K_0402_5%
APU_TMS 1 2 APU_TMS_R 3 2 <10,58,63> LPC_RST# 3 2
RH42 RS@ 0_0201_5%
APU_TDI APU_TDI_R 3 <10> LPCPD#_AGPIO21 3
RH43 1 RS@ 2 0_0201_5% 4 4 RC154 1 @ 2 1K_0402_5%
APU_TCK 1 2 APU_TDO 1 2 APU_TDO_R 5 4 <10,58> LPC_FRAME#_R 5 4
RH34 1K_0402_5% RH44 RS@ 0_0201_5%
APU_TMS APU_PWROK APU_PWROK_R 5 <10,58> LPC_AD2_R 5
RH35 1 2 1K_0402_5% RH45 1 RS@ 2 0_0201_5% 6 6
APU_TDI 1 2 APU_RST# 1 2 APU_RST#_R 7 6 <10,58> LPC_AD3_R 7 6
RH36 1K_0402_5% RH46 RS@ 0_0201_5%
APU_DBREQ# 1 2 APU_DBREQ# 1 2 APU_DBREQ#_R 8 7 <10,58> LPC_AD1_R 8 7
RH37 1K_0402_5% RH47 HDT@ 33_0402_5%
APU_TRST# APU_TRST#_R 8 <10,58> LPC_CLK0_EC 8
RH21 1 HDT@ 2 33_0402_5% 9 9
APU_TRST# 1 2 1K_0402_5% 10 9 <10,58> LPC_AD0_R 10 9 +1.8VS
RH26 2 +3VS
HDT@ 11 10 11 10
11 +3VALW 11
CH2 12 12
0.01U_0402_16V7K 12 12
1 13 13 APU_TEST14 RC112 2 @ 1 10K_0201_5%
14 GND 14 GND APU_TEST15 RC113 2 @ 1 10K_0201_5%
GND GND APU_TEST16 RC114 2 @ 1 10K_0201_5%
ACES_51625-01201-001 ACES_51625-01201-001 APU_TEST17 RC115 2 @ 1 10K_0201_5%
SP010028W00 SP010028W00
CONN@ CONN@
4 4

FP6_(3/7)_DISP/MISC/HDT
1.0
A B C D E
A B C D E
Main Func = CPU
+1.8VS
UC1D @
3V3_S5 SFH_IPIO271 AM3
3V3_S5 SFH_IPIO272 AT4 I2C_0_SCL RC719 1 TSI2C@ 2 2.2K_0402_5%
ACPI/AUDIO/I2C/GPIO/MISC 3V3_S5 SFH_IPIO273 AM1 I2C_0_SDA RC720 1 TSI2C@ 2 2.2K_0402_5%
CC7 1 2 150P_0402_50V8J 3V3_S5 SFH_IPIO274 AJ8 I2C_1_SCL RC743 1 @ 2 2.2K_0402_5%
@ CC100 1 2 150P_0402_50V8J 3V3_S5 SFH_IPIO39 AW7 SW Program to 1.8V I2C_1_SDA RC744 1 @ 2 2.2K_0402_5%
3V3_S5 SFH_IPIO41 AU2
APU_PCIE_RST#_C RC29 1 2 33_0402_5% APU_PCIE_RST#_R AP6 PCIE_RST0_L/EGPIO26 SW PU/PD +3VS
1 APU_PCIE1_RST#_C APU_PCIE1_RST#_R I2C_0_SCL 1
RC704 1 @ 2 33_0402_5% AT13 PCIE_RST1_L/EGPIO27 SW PU/PD 1V8_S0 I2C0_SCL/EGPIO145 AP14
EC_RSMRST# AR8 SW PU/PD 1V8_S0 AN14 I2C_0_SDA I2C_0_SCL <38> SMB_0_SCL 1 2 2.2K_0402_5%
I2C Touch screen RC721
ACPI <58> EC_RSMRST#
PBTN_OUT# AT12
RSMRST_L
PWR_BTN_L/AGPIO0 3V3_S5 SW PU/PD 1V8_S0

I2C0_SDA/EGPIO146
I2C1_SCL/EGPIO147 AP2 I2C_1_SCL

I2C_0_SDA <38> SMB_0_SDA RC722 1 2 2.2K_0402_5%
<58> PBTN_OUT# SYS_PWRGD_EC I2C_1_SDA
AW2 PWR_GOOD SW PU/PD 1V8_S0 I2C1_SDA/EGPIO148 AN3 SW internal Pull-down 0911
<58,91> SYS_PWRGD_EC SYS_RST# +3VALW
AL2 SYS_RESET_L/AGPIO1 3V3_S5
+3VALW APU_PCIE_WAKE# AW12 WAKE_L/AGPIO2 3V3_S5 SW PU/PD 3V3_S0 I2C2_SCL/EGPIO113/SMBUS0_I2C_SCL AN12 SMB_0_SCL
SW PU/PD 3V3_S0 I2C2_SDA/EGPIO114/SMBUS0_I2C_SDA SMB_0_SDA SMB_0_SCL <23,24> I2C_3_SCL
AP12 DDR4 RC730 1 2 2.2K_0402_5%
SLP_S3# AT11 SMB_0_SDA <23,24> I2C_3_SDA 1 2 2.2K_0402_5%
SLP_S3_L RC731
APU_PCIE_WAKE# <58> SLP_S3# SLP_S5# I2C_3_SCL
RC705 1 2 10K_0402_5% AV11 SLP_S5_L SW PU/PD 3V3_S5 I2C3_SCL/AGPIO19/SMBUS1_I2C_SCL AM9
<58> SLP_S5# I2C_3_SDA I2C_3_SCL <63>
SW PU/PD 3V3_S5 I2C3_SDA/AGPIO20/SMBUS1_I2C_SDA AM10 Touch Pad DEVSLP0 RC737 1 2 10K_0402_5%
1 2 10K_0402_5% PBTN_OUT# PROJECT_ID1 AW13 I2C_3_SDA <63> 1 2 10K_0402_5%
RC768 S0A3_GPIO/AGPIO10 3V3_S5 DEVSLP1 RC819 @
1V8_S5 SFH1_SCL D24 APU_BT_WAKE# RC761 1 @ 2 2.2K_0402_5%
RC770 1 2 10K_0402_5% AGPIO12 AGPIO23 BA8 AC_PRES/AGPIO23 1V8_S5 SFH1_SDA B24
RC802 1 @ 2 0_0201_5% AGPIO12 AV6 LLB_L/AGPIO12 3V3_S5 SW PU/PD SSD_DET#_R RC732 1 2 10K_0402_5%
<38> APU_TS_I2C_INT#
3V3_S5 AGPIO3 BB7 APU_BT_WAKE#
DGPU_PWR_EN SSD_DET#_R APU_BT_WAKE# <52> +3VS
RC803 1 VGA@ 2 0_0201_5% AW8 EGPIO42 3V3_S5 3V3_S5 AGPIO4/SATAE_IFDET BA6 SSD_DET#_R <69>
3V3_S5 AGPIO5/DEVSLP0 AK10 DEVSLP0 PCIE/SATA AGPIO90 RC823 1 @ 2 10K_0402_5%
DEVSLP0 <69>
3V3_S5 AGPIO6/DEVSLP1 BC6 DEVSLP1 SATA Only
SATA_ACT_L/AGPIO130 AW15 PANEL_OD# AGPIO89 RC791 1 @ 2 10K_0402_5%
PANEL_OD# <38>
APU_WOV_CLK AG6 ACP_WOV_CLK/ACP_IPIO28 3V3_S5 AGPIO9 AU4 TP_I2C_INT#_APU RC792 1 @ 2 10K_0402_5%
APU_WOV_DAT TP_I2C_INT#_APU <63>
Reserve for MBDG/CRB AG7 ACP_WOV_MIC0_MIC1_DATA/ACP_IPIO29 SW PU/PD 3V3_S5 AGPIO40 AP7 AGPIO40
DGPU_HOLD_RST#_R AGPIO40 <52,69>
CRB use S0-rail AJ6 ACP_WOV_MIC2_MIC3_DATA/ACP_IPIO30 3V3_S0 AGPIO69 AV13 1 RS@ 2
+1.8VALW 3V3/1V8_S0 AGPIO86/SPI_CLK2 BB12 DGPU_HOLD_RST# <26>
CC101 0_0402_5% RC816
10U_0402_6.3V6M HDA_BIT_CLK AN6 AGPIO86 1 VGA@ 2 HDMI_HPD_APU
AZ_BITCLK/TDM_BCLK_MIC
HDMI_HPD_APU <10,26,40>
+3VALW +3VS 1 2 HDA_SDIN0 AL6 AZ_SDIN0/CODEC_GPI 0_0201_5% RC808 DEVSLP1 RC820 1 @ 2 10K_0402_5%
<56> HDA_SDIN0 HDA_SDIN1
@ AM7 AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK INTRUDER_ALERT AU7
HDA_SDIN2 AJ9 AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK/ACP_WOV_MIC4_MIC5_DATA 3V3_S0 SPKR/AGPIO91 AR11 APU_SPKR
APU_SPKR <56>
1
HDA_RST# AM6 AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC 3V3_S5 BLINK/AGPIO11 AW11 PROJECT_ID2

RC734 RC28 RC54 HDA_SYNC AN8 AZ_SYNC/TDM_FRM_MIC 1 @ 2 0_0201_5% RC805
HDA_SDOUT AK6 AV15 1 GC6@ 2 0_0201_5% RC804 DGPU_PWR_EN <26>
@ 10K_0402_1% 10K_0402_1% 22K_0402_1% AZ_SDOUT/TDM_FRM_PLAYBACK 3V3_S0 GENINT1_L/AGPIO89 AGPIO89 GC6_FB_EN3V3 <10,26>
3V3_S0 GENINT2_L/AGPIO90 AU14
RC757 1 @ 2 33_0402_5% APU_PCM_BCLK AM4 SW_MCLK/TDM_BCLK_BT AGPIO90 1 @ 2 RC780 0_0201_5%
<52> PCM_BCLK APU_SPI_IRQ#_R <10,63>
2
RC758 1 @ 2 33_0402_5% APU_PCM_DOUT AL3 SW_DATA0/TDM_DOUT_BT

SYS_PWRGD_EC EC_RSMRST# <52> PCM_DOUT APU_PCM_DIN
2 RC760 1 @ 2 0_0402_5% AM2 AGPIO7/FCH_ACP_I2S_SDIN_BT 3V3_S5 3V3_S0 FANIN0/AGPIO84 AT10 1 VGA@ 2 RC789 0_0201_5% 2
<52> PCM_DIN APU_PCM_LRCLK NVVDD1_PG <103>
RC759 1 @ 2 33_0402_5% AL4 AGPIO8/FCH_ACP_I2S_LRCLK_BT 3V3_S5 3V3_S0 FANOUT0/AGPIO85 AU10 AGPIO85
<52> PCM_LRCLK APU_TS_I2C_INT#
2 1 FP6 REV 0.92 1 @ 2 RC810 0_0201_5%
CC8 PART 4 OF 13
0.22U_0402_16V7K CC16 FP6_BGA1140
1U_0201_6.3V6M
1 2
APU_PCIE_RST#_C RC700 1 RS@ 2 0_0402_5%

APU_PCIE_RST# <52,69,72>
APU_PCIE1_RST#_C RC701 1 @ 2 0_0402_5% RC813 1 RS@ 2
PLT_RST# <26>
0_0402_5%
To GPU G-PAK
Strap Pin
HDA APU_SPI_CLK_R SYS_RST#
APU WOV (Reserve)
+VDDIO_AUDIO Project ID
USE 48MHZ CRYSTAL NORMAL RESET MODE
H CLOCK (Default) QC2A @ SB000016K00
5
(Default) PJT138KA_SOT363-6 LC2 @EMI@ +3VALW +3VS
BLM15PX221SN1D_2P
G
RC116 1 EMI@ 2 33_0402_5% HDA_RST# USE 100MHZ PCIE SHORT RESET MODE APU_WOV_CLK 4 3 1 2
<56> HDA_RST#_R HDA_BIT_CLK L CLOCK AS APU_WOV_CLK_L <56>
D
RC117 1 EMI@ 2 33_0402_5% SM01000NY00
<56> HDA_BIT_CLK_R
2
RC118 1 EMI@ 2 33_0402_5% HDA_SYNC REFERENCE CLOCK
<56> HDA_SYNC_R
1
RC119 1 EMI@ 2 33_0402_5% HDA_SDOUT
G
3 <56> HDA_SDOUT_R APU_WOV_DAT 3
1 6 CZH@ MAXP@ @ N18P@
APU_WOV_DAT_L <56>
D
RC715 RC707 RC776 RC798
RC120 1 @ 2 1K_0402_5% +1.8VS +1.8VALW +3VALW QC2B @ SB000016K00 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
RC121 1 @ 2 1K_0402_5% PJT138KA_SOT363-6 No GC6
2
RC122 1 @ 2 1K_0402_5%
RC123 1 @ 2 1K_0402_5% RC751 1 @ 2 0_0402_5% PROJECT_ID1
1
PROJECT_ID2
RC622 RC752 1 @ 2 0_0402_5% PROJECT_ID3
10K_0402_5%
10K_0402_5%
10K_0402_5%
<10> PROJECT_ID3
@ RC47 RC100
AGPIO23
RC695 1 @ 2 10K_0402_5% HDA_SDIN1
2
RC696 1 @ 2 10K_0402_5% HDA_SDIN2 +VDDIO_AUDIO

RC703 1 @ 2 10K_0402_5% HDA_SDIN0
1
SYS_RST# RC746 2 @ 1 2.2K_0402_5% APU_WOV_CLK GC6
<10,63> APU_SPI_CLK_R APU_WOV_DAT
RC745 2 @ 1 2.2K_0402_5% CZU@ MAXQ@ @ GN20@
1
+3VALW RC716 RC708 RC777 RC799

1
RC163 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%

2K_0402_5%
2K_0402_5%
1
1U_0201_6.3V6M
@ RC99 @ CC687 RC748 2 @ 1 2.2K_0402_5% APU_WOV_CLK_L
2
@ RC747 2 @ 1 2.2K_0402_5% APU_WOV_DAT_L
2
2
2
Project_ID1 Project_ID2 Project_ID3

(AGPIO10) (AGPIO11) AGPIO23 (AGPIO144)
N18P
H Cezanne-H MAX-P GPU Gaming_series GC6_no-support
GN20
L Cezanne-U MAX-Q GPU Aspire 7 GC6_support
4 4

FP6_(4/7)_GPIO/HDA/STRAP
1.0
A B C D E
A B C D E
Main Func = CPU
RC602
UC1E @ 33_0402_5%
CLK/LPC/EMMC/SD/SPI/eSPI/UART LPC_RST_A# 1 2
LPC_RST# <8,58,63>
1
+3VS GPU VGA_CLKREQ# AR13 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92 dGPU
<26> VGA_CLKREQ# CLKREQ_PCIE#1
SSD(PCIE) AP10 CLK_REQ1_L/AGPIO115 x4 PCIE Express CC615
<69> CLKREQ_PCIE#1 CLKREQ_PCIE#2
LAN AR15 CLK_REQ2_L/AGPIO116 GBE LAN 150P_0402_50V8J
<72> CLKREQ_PCIE#2 CLKREQ_PCIE#3 2
WLAN AT14 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131 WLAN
VGA_CLKREQ# <52> CLKREQ_PCIE#3 CLKREQ_PCIE#4
RC723 1 2 10K_0402_5% SSD(PCIE/SATA) AN11 CLK_REQ4_L/OSCIN/EGPIO132 SSD (PCIE/SATA)
CLKREQ_PCIE#1 <69> CLKREQ_PCIE#4 CLKREQ_PCIE#5
RC724 1 2 10K_0402_5% AN13 CLK_REQ5_L/EGPIO120 SW PU/PD RC449 close to UC1
RC763 1 2 10K_0402_5% CLKREQ_PCIE#2 AN15 CLK_REQ6_L/EGPIO121 VDD_33 +3VALW
1 RC764 1 2 10K_0402_5% CLKREQ_PCIE#3 1
RC765 1 2 10K_0402_5% CLKREQ_PCIE#4 EGPIO70 AW14 EGPIO70 RC781 1 @ 2 0_0201_5%
LPCPD#_AGPIO21 APU_BT_ON <52> EC_SCI#
SW PU/PD LPC_PD_L/AGPIO21 BB13 RC727 2 1 10K_0402_5%
CLKREQ_PCIE#5 CLK_PCIE_P0 LPC_AD0 LPCPD#_AGPIO21 <8>
RC725 1 @ 2 10K_0402_5% AF11 GPP_CLK0P LAD0/ESPI1_DATA0/EGPIO104 BA16 RC101 1 2 10_0402_5%
<25> CLK_PCIE_P0 CLK_PCIE_N0 LPC_AD1 LPC_AD0_R <8,58> +3VS
GPU AF12 GPP_CLK0N SSD (PCIE/SATA) LAD1/ESPI1_DATA1/EGPIO105 BA15 RC102 1 2 10_0402_5%
<25> CLK_PCIE_N0 LPC_AD2 LPC_AD1_R <8,58>
FH51S LAD2/ESPI1_DATA2/EGPIO106 BC13 RC103 1 2 10_0402_5%
CLK_PCIE_P1 LPC_AD3 LPC_AD2_R <8,58>
AG4 GPP_CLK1P LAD3/ESPI1_DATA3/EGPIO107 BB14 RC104 1 2 10_0402_5%
<69> CLK_PCIE_P1 CLK_PCIE_N1 LPC_CLK0 LPC_AD3_R <8,58>
SSD(PCIE) AG2 GPP_CLK1N x4 PCIE Express SW PU/PD LPCCLK0/EGPIO74 BB15 RC449 1 2 22_0402_5%
<69> CLK_PCIE_N1 LPC_CLK0_EC <8,58>
BD13 AGPIO88 TP@
48MHz CRYSTAL LAN
<72> CLK_PCIE_P2
CLK_PCIE_P2
CLK_PCIE_N2
AG3
AG1
GPP_CLK2P
GPP_CLK2N GBE LAN
SW PU/PD
LPC_CLKRUN_L/AGPIO88
LPCCLK1/EGPIO75
SERIRQ/AGPIO87
BA12
BC15
LPC_CLK1
SERIRQ RC753 2
TC11
1 0_0402_5%
LPC_CLK1 <8>
EGPIO108 RC729 2 1 10K_0402_5%
<72> CLK_PCIE_N2 LPC_FRAME# RC754 SERIRQ_R <58>
SW PU/PD LFRAME_L/EGPIO109 BA13 2 1 0_0402_5% Follow MDG.
48M_X2 CLK_PCIE_P3 LPC_FRAME#_R <8,58>
AF2 GPP_CLK3P
<52> CLK_PCIE_P3 CLK_PCIE_N3 LPC_RST_A#
WLAN AF4 GPP_CLK3N WLAN SW PU/PD LPC_RST_L/AGPIO32 BC12
48M_X1 <52> CLK_PCIE_N3
1 RC124 2 3V3_S0 AGPIO68 AU12 AGPIO68 RC793 1 @ 2 0_0201_5% GC6_FB_EN3V3 <9,26>
1M_0402_5% CLK_PCIE_P4 AH2 SW PU/PD AP4 EC_SCI# LPC_CLK1 RC735 2 @ 1 10K_0402_5%
<69> CLK_PCIE_P4
GPP_CLK4P LPC_PME_L/AGPIO22 EC_SCI# <58>
SSD(PCIE/SATA) CLK_PCIE_N4 AH4 GPP_CLK4N dGPU
<69> CLK_PCIE_N4 LPCPD#_AGPIO21 RC742 2 @ 1 10K_0402_5%
2 1 AJ2 GPP_CLK5P (
2 1 AJ4 M.2 SSD BA11
GPP_CLK5N SPI_ROM_REQ/EGPIO67
++ B B'8 @
SPI_ROM_GNT/EGPIO76 BB11
AF8 GPP_CLK6P/WIFIBT_CLKP @& 1 @ 2
HDMI_HPD_APU <9,26,40>
AF9 GPP_CLK6N/WIFIBT_CLKN x4 PCIE TBT SLOT ESPI_RESET_L/KBRST_L/AGPIO129 AT15 KBRST# KBRST# <58> 0_0201_5% RC824
YC2 ESPI_ALERT_L/LDRQ0_L/EGPIO108 BC11 EGPIO108
48MHZ_8PF_X3S048000D81H-W AK1 X48M_OSC RC74 10_0402_5%
BC10 APU_SPI_CLK 1 EMI@ 2
SJ10000JP00 1V8_S5 SPI_CLK/ESPI_CLK
BA10 APU_SPI_MISO APU_SPI_CLK_R <9,63>
3 4
48M_X1 BB3 X48M_X1
SPI_DI/ESPI_DATA
SPI_DO
SPI_WP_L/ESPI_DAT2
BB8
BA9
APU_SPI_MOSI
APU_SPI_WP#
APU_SPI_MISO
APU_SPI_MOSI
<63>
<63> 16MB SPI ROM
3 4 SPI_HOLD_L/ESPI_DAT3 BC8 APU_SPI_HOLD#
SPI_CS1_L BD11 APU_SPI_CS#1 Reserve for eSPI +SPI_VCC
1
48M_X2 BA5 X48M_X2 SPI_CS2_L/ESPI_CS_L/AGPIO30 BC9 APU_ESPI_CS# RC821 1 ESPI@ 2 0_0201_5% LPC_FRAME#_R
CC689 CC690 SPI_CS3_L/AGPIO31 BB10 APU_SPI_IRQ# 1 2 0_0201_5% APU_SPI_IRQ#_R
APU_SPI_IRQ#_R <9,63> APU_SPI_MISO
3.3P_0402_50V8 3.3P_0402_50V8 SW PU/PD SPI_TPM_CS_L/AGPIO29 BD8 TPM@ RC822 RC658 1 2 10K_0402_5%
2
APU_SPI_TPMCS#
APU_SPI_TPMCS# <63> APU_SPI_WP# RC640 1 2 10K_0402_5%
AG10 RSVD_71 TPM IRQ Change to SPI_CS3
AG9 RSVD_70 APU_SPI_HOLD# RC642 1 2 10K_0402_5%
APU_SPI_CS#1 RC639 1 2 10K_0402_5%

RC762 1 @ 2 22_0402_5% RTCCLK AW10 RTCCLK
<52> SUSCLK_WLAN
2 2
32.768KHz CRYSTAL 32K_X1 AY1 X32K_X1 EGPIO141/UART0_RXD
EGPIO143/UART0_TXD
BA17
BC16
UART_0_ARXD_DTXD
UART_0_ATXD_DRXD UART_0_ARXD_DTXD <52>
UART_0_RTS# UART_0_ATXD_DRXD <52>
EGPIO142/UART0_RTS_L/UART1_RXD BD15
UART_0_CTS# UART_0_RTS# <52>
EGPIO140/UART0_CTS_L/UART1_TXD BC17
32K_X2 PROJECT_ID3 UART_0_CTS# <52>
AY4 X32K_X2 AGPIO144/SHUTDOWN_L/UART0_INTR BB16
PROJECT_ID3 <9>
32K_X1 +1.8VALW +SPI_VCC
FP6 REV 0.92
1
PART 5 OF 13 RC158
SJ100011Z00 YC3 PVT FP6_BGA1140 +1.8VS 0_0603_5%
32.768KHZ_12.5PF_CM31532768DZFT 1 RS@ 2
2
2 1 32K_X2 RC159
RC98 0_0603_5%
20M_0402_5% 1 @ 2
PVT
1
CC686 CC682
15P_0402_50V8J 15P_0402_50V8J
2
UC7
APU_SPI_CS#1 1 8 +SPI_VCC
APU_SPI_MISO 2 CS# VCC 7 APU_SPI_HOLD#
APU_SPI_WP# 3 DO(IO1) HOLD#(IO3) 6 APU_SPI_CLK_R
4 WP#(IO2) CLK 5 APU_SPI_MOSI
GND DI(IO0)
2
XM25QU128BHIQT08H SOP8P @
SA0000CTP00 CC635
0.1U_0201_10V6K
USB Function S IC FL 128M XM25QU128BHIQT08H SOP8P SPI
128ROM@
1
@EMI@
APU_SPI_CLK_R 1 @EMI@ 2 1 2
RC680 CC636
10_0402_5% 10P_0402_50V8J
+1.8VALW
RC94 1 2 4.7K_0402_5% APU_USBC_SCL

3 UC1J @ 3
RC95 1 2 4.7K_0402_5% APU_USBC_SDA USB
USB20_P0 AC6 USBC0_DP/USB0_DP USBC0_TX1P/USB0_TXP/DP2_TXP2 AA1 USBC0_ATX_DRX_P1

<43> USB20_P0 USB20_N0 USBC0_ATX_DRX_N1 USBC0_ATX_DRX_P1 <42>
MB TypeC AC7 USBC0_DN/USB0_DN USBC0_TX1N/USB0_TXN/DP2_TXN2 AA3
<43> USB20_N0 USBC0_ATX_DRX_N1 <42>
+3VALW USB20_P1 AA8 AA2 USBC0_ARX_DTX_P1 WSON 8*6
<71> USB20_P1 USB20_N1
USB1_DP USBC0_RX1P/USB0_RXP/DP2_TXP3
USBC0_ARX_DTX_N1 USBC0_ARX_DTX_P1 <42> MB TypeC
MB USB3 CHG AA9 USB1_DN USBC0_RX1N/USB0_RXN/DP2_TXN3 AA4 USBC0_ARX_DTX_N1 <42>
<71> USB20_N1
Controller 0
RC96 1 @ 2 100K_0402_5% USB_OC0# USB20_P2 Y10 USB2_DP USBC0_TX2P/DP2_TXP1 AC2
<66> USB20_P2 USB20_N2
Finger Print Y9 USB2_DN USBC0_TX2N/DP2_TXN1 AC4
<66> USB20_N2
USB20_P3 Y7 USB3_DP USBC0_RX2P/DP2_TXP0 AC1
<52> USB20_P3 USB20_N3
WLAN/BT Y6 USB3_DN USBC0_RX2N/DP2_TXN0 AC3
<52> USB20_N3
Reserve USB1_TXP
USB1_TXN
AE1
AE3
USB3_ATX_DRX_P1
USB3_ATX_DRX_N1 USB3_ATX_DRX_P1 <71> APU_SPI_MOSI 5
JSKT2 CONN@
2 APU_SPI_MISO
+3VALW USB20_P4 USB3_ATX_DRX_N1 <71> D Q
AC9 USBC4_DP/USB4_DP
<72> USB20_P4 USB20_N4 USB3_ARX_DTX_P1 APU_SPI_CLK_R
MB USB3 AC10 USBC4_DN/USB4_DN USB1_RXP AD8 USB3_ARX_DTX_P1 <71> Type-A MB USB3.2 CHG 6
APU_BT_ON <72> USB20_N4 USB3_ARX_DTX_N1 C
RC771 1 2 10K_0402_5% USB1_RXN AD9 USB3_ARX_DTX_N1 <71>
@ USB20_P5 AA11 USB5_DP
APU_SPI_CS#1 1
<72> USB20_P5 USB20_N5 S
MB USB3 (SUB) AA12 USB5_DN
<72> USB20_N5 APU_SPI_HOLD# 7
USB20_P6 W8 USB6_DP Controller 1 HOLD
<38> USB20_P6 USB20_N6 USB3_ATX_DRX_P4 +SPI_VCC APU_SPI_WP#
Camera W9 USB6_DN USBC4_TX1P/USB4_TXP/DP3_TXP2 V3 3
+3VALW <38> USB20_N6 USB3_ATX_DRX_N4 USB3_ATX_DRX_P4 <72> W
USBC4_TX1N/USB4_TXN/DP3_TXN2 V1
USB20_P7 USB3_ATX_DRX_N4 <72> +SPI_VCC
W11 USB7_DP Type-A SUB USB3.0 (SUB) 8 4
<64> USB20_P7 USB20_N7 USB3_ARX_DTX_P4 VCC VSS
Touch Screen W12 USB7_DN USBC4_RX1P/USB4_RXP/DP3_TXP3 U4 USB3_ARX_DTX_P4 <72>
<64> USB20_N7
1
USBC4_RX1N/USB4_RXN/DP3_TXN3 U2 USB3_ARX_DTX_N4 ACES_50950-0084N-001_ROM

USB3_ARX_DTX_N4 <72>
@ RC783 APU_USBC_SCL AL9 USBC_I2C_SCL 1V8_S5 USBC4_TX2P/DP3_TXP1 W2
1M_0402_5% USBC4_TX2N/DP3_TXN1 W4
Check use or not APU_USBC_SDA AL8 USBC_I2C_SDA 1V8_S5
2
AGPIO24 USBC4_RX2P/DP3_TXP0 W1 +SPI_VCC

USBC4_RX2N/DP3_TXN0 W3
<71> USB_OC0#
1
USB_OC0# AE9 USB_OC0_L/AGPIO16

@ RC784 APU_BT_ON RC782 1 2 0_0201_5% AGPIO17 AE10 USB_OC1_L/AGPIO17 USB5_TXP AD2 USB3_ATX_DRX_P5 UC11
+3VALW USB3_ATX_DRX_P5 <72>
10K_0402_5% RC794 2 DP@ 1 0_0402_5% DP0_HPD_APU_R AE6 USB_OC2_L/AGPIO18 USB5_TXN AD4 USB3_ATX_DRX_N5 APU_SPI_CS#1 1 8 +SPI_VCC
<26,39> DP0_HPD_APU USB3_ATX_DRX_N5 <72> /CS VCC
AGPIO24 AE7 USB_OC3_L/AGPIO24 Type-A SUB USB3.0 (SUB)
) B( )B USB5_RXP AD12 USB3_ARX_DTX_P5 APU_SPI_MISO 2 7 APU_SPI_HOLD#
USB3_ARX_DTX_P5 <72>
2
IO1 IO3
1
SW PU/PD AD11 USB3_ARX_DTX_N5

( " @ ) ,+ USB5_RXN
USB3_ARX_DTX_N5 <72> APU_SPI_WP# APU_SPI_CLK_R
3 6
4 @ RC811 IO2 CLK 4
10K_0402_5% 4 5 APU_SPI_MOSI
GND IO0
FP6 REV 0.92
2
PART 10 OF 13 9
DP0_HPD_APU_R FP6_BGA1140 PAD
GD25R256DYIGR_WSON8_8X6
1
SA0000E0S00
S IC FL 256M GD25LB256EYIGR WSON 8P SPI ROM
NDP@ RC812 256ROM@
10K_0402_5%
2

FP6_(5/7)_CLK/USB/SPI/LPC
1.0
A B C D E
A B C D E
Main Func = CPU
UC1F @
TDC: 15A POWER TDC: 51A
EDC: 20A N16 VDDCR_SOC_1 VDDCR_1 G7 EDC: 90A
+APU_CORE_SOC +APU_CORE
N18 VDDCR_SOC_2 VDDCR_2 G10
N20 VDDCR_SOC_3 VDDCR_3 G12
SCL/MBDG: P17 VDDCR_SOC_4 VDDCR_4 G14
7*22uF (BU) P19 VDDCR_SOC_5 VDDCR_5 H8
1*1uF (BU) R18 VDDCR_SOC_6 VDDCR_6 H11
1*180pF (BU) R20 H15
VDDCR_SOC_7 VDDCR_7
1
T19 VDDCR_SOC_8 VDDCR_8 K6 1
U18 VDDCR_SOC_9 VDDCR_9 K12
teknisi-indonesia
U20 VDDCR_SOC_10 VDDCR_10 K14
V19 VDDCR_SOC_11 VDDCR_11 L8
W18 VDDCR_SOC_12 VDDCR_12 M7
W20 M10 SCL/MBDG:
+APU_CORE_SOC Cap Y19
VDDCR_SOC_13
VDDCR_SOC_14
VDDCR_13
VDDCR_14 N14 16*22uF (BU)
P7 1*180pF (BU)
place at Power Side VDDCR_15
VDDCR_16 P10
VDDCR_17 P13
VDDCR_18 P15
+1.2V_VDDQ TDC: 6A AC20 VDDIO_MEM_S3_1 VDDCR_19 R8
AC28 VDDIO_MEM_S3_2 VDDCR_20 R14
AD23 VDDIO_MEM_S3_3 VDDCR_21 R16
SCL/MBDG: AD26 T7
7*22uF (BU) AD28
VDDIO_MEM_S3_4
VDDIO_MEM_S3_5
VDDCR_22
VDDCR_23 T10 +APU_CORE Cap place at Power Side
2*1uF (BU) AD32 VDDIO_MEM_S3_6 VDDCR_24 T13
4*0.22uF AE20 T15
1*180pF (BU) SM01000I200 VDDIO_MEM_S3_7 VDDCR_25
2*180pF 3000ma 33ohm@100mhz DCR 0.04 AE22 VDDIO_MEM_S3_8 VDDCR_26 T17

AE25 VDDIO_MEM_S3_9 VDDCR_27 U14
AE28 VDDIO_MEM_S3_10 VDDCR_28 U16
AF23 VDDIO_MEM_S3_11 VDDCR_29 V13
+1.2V_VDDQ +1.2V_VDDQ +1.2V_VDDQ SM01000I200 +APU_VPH AF26 VDDIO_MEM_S3_12 VDDCR_30 V15
CHILISIN PBY160808T-330Y-N AF28 VDDIO_MEM_S3_13 VDDCR_31 V17
2 1 AF32 VDDIO_MEM_S3_14 VDDCR_32 W7
LC1 AG20 VDDIO_MEM_S3_15 VDDCR_33 W10
CC56
CC57
CC58
CC59
CC60
CC61
CC62
CC63
CC64
CC65
CC66
CC67
CC68
CC69
CC70
CC71
CC72
CC73
CC688
AG22 VDDIO_MEM_S3_16 VDDCR_34 W14
+1.8VS LC3 AG25 W16
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VDDIO_MEM_S3_17 VDDCR_35
AG28 VDDIO_MEM_S3_18 VDDCR_36 Y8
@ 1 2 AJ20 VDDIO_MEM_S3_19 VDDCR_37 Y13
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
180P_0402_50V8J
0.22U_0402_16V7K
0.22U_0402_16V7K
0.22U_0402_16V7K
0.22U_0402_16V7K
180P_0402_50V8J
180P_0402_50V8J
0.22U_0402_16V7K
SM01000I200 AJ23 VDDIO_MEM_S3_20 VDDCR_38 Y15
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 CHILISIN PBY160808T-330Y-N 2 AJ26 VDDIO_MEM_S3_21 VDDCR_39 Y17
AJ28 VDDIO_MEM_S3_22 VDDCR_40 AA7
AJ32 VDDIO_MEM_S3_23 VDDCR_41 AA10
AK22 VDDIO_MEM_S3_24 VDDCR_42 AA14
AK25 AA16
2 AK28
VDDIO_MEM_S3_25
VDDIO_MEM_S3_26
VDDCR_43
VDDCR_44 AA18 Stitching Cap. 2
AL23 VDDIO_MEM_S3_27 VDDCR_45 AB13
AL28 VDDIO_MEM_S3_29 VDDCR_47 AB17 +APU_CORE
AM22 AC14
All BU(on bottom side under SOC) ACROSS VDDIO AND VSS SPLIT AM25
VDDIO_MEM_S3_31
VDDIO_MEM_S3_32
VDDCR_49
VDDCR_50 AC16
AM28 VDDIO_MEM_S3_33 VDDCR_51 AC18
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
AN28 VDDIO_MEM_S3_34 VDDCR_52 AD7 1 1 1
AN32 VDDIO_MEM_S3_35 VDDCR_53 AD10
No support wake on voice AP28 AD13
CC200
CC201
CC202
VDDIO_MEM_S3_36 VDDCR_54
AR32 VDDIO_MEM_S3_37 VDDCR_55 AD15
+1.8VALW +VDDIO_AUDIO +3VS +3VS_APU VDDCR_56 AD17 2 2 2
RC766 RC160 TDC: 1A AC21 VDDIO_VPH_1 VDDCR_57 AD19
+APU_VPH
0_0402_5% 0_0402_5% AD21 VDDIO_VPH_2 VDDCR_58 AE8
1 2 1 2 VDDCR_59 AE14
+VDDIO_AUDIO TDC: 0.2A AP9 VDDIO_AUDIO VDDCR_60 AE16
+1.8VS
CC54
CC55
CC51
CC52
CC53
RC767 VDDCR_61 AE18

0_0402_5% 1 1 1 1 1 TDC: 0.25A AL18 VDD_33_1 VDDCR_62 AF7
+3VS_APU
1 2 AM17 VDD_33_2 VDDCR_63 AF10
@ VDDCR_64 AF13
22U_0603_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
0910
+1.8VS TDC: 2.5A AL20 VDD_18_1 VDDCR_65 AF15
2 2 2 2 2 AM19 VDD_18_2 VDDCR_66 AF17
VDDCR_67 AF19
+1.8VALW_APU TDC: 1A AL19 VDD_18_S5_1 VDDCR_68 AG14
AM18 VDD_18_S5_2 VDDCR_69 AG16
VDDCR_70 AG18
TDC: 0.25A AL17 VDD_33_S5_1 VDDCR_71 AH13
+3VALW_APU
AM16 VDD_33_S5_2 VDDCR_72 AH15
SCL/MBDG: SCL/MBDG: AH17
1*22uF (BO) BO BU 1*22uF (BO) BO BO BU TDC: 2A AL11 VDDP_S5_1
VDDCR_73
VDDCR_74 AH19
1*1uF (BU) 2*1uF (BO+BU) +0.75VALW
AL12 VDDP_S5_2 VDDCR_75 AJ7
AM12 VDDP_S5_3 VDDCR_76 AJ10
VDDCR_77 AJ14
+0.75VS TDC: 2A M15 VDDP_1 VDDCR_78 AJ16
3 M16 VDDP_2 VDDCR_79 AJ18 3
+1.8VS +1.8VALW RC755 +1.8VALW_APU +3VALW RC756 +3VALW_APU M18 VDDP_3 VDDCR_80 AK13
0_0603_5% 0_0402_5% VDDCR_81 AK15
1 2 1 2 VDDCR_82 AK17
VDDCR_83 AK19
+RTCBATT
CC74
CC75
CC76
CC77
CC78
CC79
CC80
CC81
CC82
+RTC_APU_R TDC: 4.5uA AJ11 VDDBT_RTC_G
1 1 1 1 1 1 1 1 1
FP6 REV 0.92 CONN@
PART 6 OF 13 JRTC1
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
FP6_BGA1140 1
2 2 2 2 2 2 2 2 2 2 1
2
3
4 GND
GND
ACES_50271-0020N-001
SCL/MBDG: SCL/MBDG: SCL/MBDG:

RTC OF APU +RTC_APU +RTCVCC
SP02000RO00
1*22uF (BO) BO BO BU 1*22uF (BO) BO BO BU 1*22uF (BO) BO BO BU Footprint from Sleepy/Grumpy
2*1uF (BO+BU) 2*1uF (BO+BU) 2*1uF (BO+BU)
RC750 1 RS@ 2 0_0402_5%
SCL/MBDG: +RTC_APU_R +RTCBATT_R +RTCBATT
1*1uF
1*0.22uF
Vo=1.5V RC741
+CHGRTC
close to UC1 RC733 DC1 1K_0402_5%
SCL/MBDG: SCL/MBDG: W=20mils 1K_0402_5% UC8 @ 3 1 2
+0.75VS 2*22uF (BO) +0.75VALW 1*22uF (BO) 1 2 3
8*1uF (BOx4+BUx4) 3*1uF (BOx1+BUx2) Vout 1 1
1*180pF (BU) 2 Vin
GND
1
1 1 1 2
CC83
CC84
CC85
CC86
CC87
CC88
CC89
CC90
CC91
CC92
CC93
CC94
CC95
CC96
CC97
AP2138N-1.5TRG1_SOT23-3 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 CC166 CC50 CLRP1 @ CC119 SA000066U00 CC120
0.22U_0402_16V7K 1U_0201_6.3V6M 0_0603_5% 0.1U_0201_10V6K 1000P_0402_50V7K ROW BAV70W 3P CC SOT-323
2 2 2 SC600000B00
2
2
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
180P_0402_50V8J
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
4 4
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
Need OPEN
for Clear CMOS
BO BOx4 BUx4 BU BO BO BU
FP6_(6/7)_PWR
1.0
A B C D E
5 4 3 2 1
Main Func = CPU

UC1G @
GND UC1H @
AM20 VSS VSS K28 GND UC1K @
A3 VSS VSS K32 V5 VSS VSS AE13 GND/RSVD
A5 VSS VSS L5 V8 VSS VSS AE15 AR14 VSS_246 VSS_305 BD19
A12 VSS VSS L18 V16 VSS VSS AF1 AR21 VSS_249 VSS_308 BD26
A14 VSS VSS L20 V18 VSS VSS AF3 AR26 VSS_250 VSS_309 BD30
A16 VSS VSS L25 V20 VSS VSS AF5 AR28 VSS_251
D A19 VSS VSS L28 V22 VSS VSS AF14 AT23 VSS_252 D
A21 VSS VSS M1 V25 VSS VSS AF16 AU5 VSS_253
A23 VSS VSS M3 V28 VSS VSS AF18 AU8 VSS_254
A26 VSS VSS M5 W5 VSS VSS AF20 AU11 VSS_255
A30 VSS VSS M21 W13 VSS VSS AG5 AU13 VSS_256
C3 VSS VSS M23 W15 VSS VSS AG8 AU15 VSS_257
C10 VSS VSS M26 W17 VSS VSS AG11 AU18 VSS_258 RSVD_46 AV8
C32 VSS VSS M28 W19 VSS VSS AG13 AU20 VSS_259 RSVD_47 BD18
E7 VSS VSS M32 W23 VSS VSS AG15 AU22 VSS_260 RSVD_45 AV3
E8 VSS VSS N5 W26 VSS VSS AG17 AU25 VSS_261 RSVD_44 AU6
E10 VSS VSS N8 W28 VSS VSS AG19 AU28 VSS_262 RSVD_43 AR6
E11 VSS VSS N11 W32 VSS VSS AH14 AV1 VSS_263 RSVD_42 AR3
E12 VSS VSS N13 Y1 VSS VSS AH16 AV5 VSS_264 RSVD_41 AP1
E13 VSS VSS N15 Y3 VSS VSS AH18 AV7 VSS_265 RSVD_40 AN16
E14 VSS VSS N17 Y5 VSS VSS AH20 AV10 VSS_266 RSVD_39 AN4
E15 VSS VSS N22 Y11 VSS VSS AJ1 AV12 VSS_267 RSVD_38 AN2
E16 VSS VSS N25 Y14 VSS VSS AJ3 AV14 VSS_268 RSVD_37 AM14
E18 VSS VSS N28 Y16 VSS VSS AJ5 AV16 VSS_269 RSVD_36 AM13
E19 VSS VSS P1 Y18 VSS VSS AJ13 AV19 VSS_270 RSVD_35 AL29
E23 VSS VSS P18 Y28 VSS VSS AK5 AV28 VSS_274 RSVD_31 AK3
E25 VSS VSS P20 AA5 VSS VSS AK8 AV32 VSS_275 RSVD_30 AJ29
E26 VSS VSS P23 AA13 VSS VSS AK11 AW5 VSS_276 RSVD_29 AJ27
E27 VSS VSS P26 AA15 VSS VSS AK14 AW28 VSS_277 RSVD_28 AF6
F5 VSS VSS P28 AA17 VSS VSS AK16 AY6 VSS_278 RSVD_27 AE12
F19 VSS VSS P32 AA19 VSS VSS AK18 AY7 VSS_279 RSVD_26 AD6
F21 VSS VSS R5 AA23 VSS VSS AK20 AY8 VSS_280 RSVD_25 AD3
C F23 VSS VSS R11 AA26 VSS VSS AL1 AY10 VSS_281 RSVD_24 AC30 C
F28 VSS VSS R13 AA28 VSS VSS AL5 AY11 VSS_282 RSVD_23 AC12
G1 VSS VSS R15 AA32 VSS VSS AL7 AY12 VSS_283 RSVD_22 AB31
G3 VSS VSS R17 AB2 VSS VSS AL10 AY13 VSS_284 RSVD_21 AA20
G5 VSS VSS R19 AB4 VSS VSS AL16 AY14 VSS_285 RSVD_20 AA6
G16 VSS VSS R22 AB14 VSS VSS AM5 AY15 VSS_286 RSVD_19 Y12
G26 VSS VSS R25 AB16 VSS VSS AM8 AY16 VSS_287 RSVD_18 W6
G28 VSS VSS R28 AB18 VSS VSS AM11 AY18 VSS_288 RSVD_17 V12
G32 VSS VSS T1 AB20 VSS VSS AM15 AY19 VSS_289 RSVD_16 R12
H5 VSS VSS T3 AC5 VSS VSS AN1 AY20 VSS_290 RSVD_15 N19
H22 VSS VSS T18 AC15 VSS VSS AN23 AY25 VSS_294 RSVD_11 M13
H25 VSS VSS T20 AC17 VSS VSS AN26 AY26 VSS_295 RSVD_10 M12
H28 VSS VSS T23 AC19 VSS VSS AP5 AY27 VSS_296 RSVD_9 M11
J19 VSS VSS T26 AC22 VSS VSS AP8 BB1 VSS_297 RSVD_8 M6
K1 VSS VSS T28 AC25 VSS VSS AP13 BB32 VSS_298 RSVD_7 L12
K3 VSS VSS T32 AD1 VSS VSS AP15 BD3 VSS_299 RSVD_6 K19
K5 VSS VSS U13 AD5 VSS VSS AP18 BD7 VSS_300 RSVD_5 F16
K26 VSS VSS U19 AD18 VSS VSS AR1 BD14 VSS_303 RSVD_2 F10
VSS V2 AD20 VSS VSS AR5 BD16 VSS_304 RSVD_1 C26
VSS V4 AE5 VSS VSS AR7
FP6 REV 0.92 AE11 VSS VSS AR12
PART 7 OF 13 FP6 REV 0.92
FP6_BGA1140 PART 8 OF 13 FP6 REV 0.92
FP6_BGA1140 PART 11 OF 13
B FP6_BGA1140 B
UC1M @ UC1L @
CAMERAS WiFi
D21 CAM0_CSI2_CLOCKP CAM0_CLK A18 N7 AGPIO256/WIFIBT_BT_DATA EGPIO267/RFIC_SPI_CLK P8

A20 CAM0_CSI2_CLOCKN R7 AGPIO257/WIFIBT_BT_VALID EGPIO268/RFIC_SPI_SS R9
CAM0_I2C_SCL C18 N6 AGPIO258/WIFIBT_BT_SYNC AGPIO269/RFIC_SPI_DATA R6
D18 CAM0_CSI2_DATAP0 CAM0_I2C_SDA B17 T6 AGPIO259/WIFIBT_BT_CLK
B18 CAM0_CSI2_DATAN0
CAM0_SHUTDOWN D17
C19 CAM0_CSI2_DATAP1
D20 CAM0_CSI2_DATAN1 R10 AGPIO260/WIFIBT_QSPI_DATA0 AGPIO270/WIFIBT_RFIC_WAKEUP P9
T12 AGPIO261/WIFIBT_QSPI_DATA1 EGPIO271/WIFIBT_BUCKEN T9
C21 CAM0_CSI2_DATAP2 P12 AGPIO262/WIFIBT_QSPI_DATA2 EGPIO266/WIFIBT_FLOW T8
B21 CAM0_CSI2_DATAN2 P11 AGPIO263/WIFIBT_QSPI_DATA3
T11 AGPIO264/WIFIBT_QSPI_CLK
C20 CAM0_CSI2_DATAP3 P6 AGPIO265/WIFIBT_QSPI_SS
B20 CAM0_CSI2_DATAN3 WIFIBT_DATA_RXP V7
WIFIBT_DATA_RXN V6
C15 CAM1_CSI2_CLOCKP CAM1_CLK A13
A15 CAM1_CSI2_CLOCKN WIFIBT_DATA_TXP V9
CAM1_I2C_SCL B13 WIFIBT_DATA_TXN V10
D16 CAM1_CSI2_DATAP0 CAM1_I2C_SDA D13
B16 CAM1_CSI2_DATAN0
A A
CAM1_SHUTDOWN C14 FP6 REV 0.92
D15 CAM1_CSI2_DATAP1 PART 12 OF 13
B15 CAM1_CSI2_DATAN1 CAM_PRIV_LED C16 FP6_BGA1140
CAM_IR_ILLU C13
FP6 REV 0.92
FP6_BGA1140
PART 13 OF 13
FP6_(7/7)_GND/RSVD/CSI
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
A B C D E
Reverse Type
8/29 2-3A to 1 DIMMs/channel
JDIMM1A
DDR_A_CLK0 DDR_A_DQ0 DDR_A_DQ[7..0] <7>
137 REVERSE 8
<7> DDR_A_CLK0 DDR_A_CLK0# 139 CK0(T) DQ0 7 DDR_A_DQ1
<7> DDR_A_CLK0# DDR_A_CLK1 138 CK0#(C) DQ1 20 DDR_A_DQ2 +1.2V_VDDQ +1.2V_VDDQ
<7> DDR_A_CLK1 DDR_A_CLK1# 140 CK1(T) DQ2 21 DDR_A_DQ3 JDIMM1B
1
Address : A0 <7>
<7>
DDR_A_CLK1#
DDR_A_CKE0
DDR_A_CKE0
DDR_A_CKE1
109
110
CK1#(C)
CKE0
DQ3
DQ4
DQ5
4
3
16
DDR_A_DQ4
DDR_A_DQ5
DDR_A_DQ6
Follow CRB design
111
112
REVERSE
VDD1 VDD11
141
142
1
<7> DDR_A_CKE1 CKE1 DQ6 17 DDR_A_DQ7 117 VDD2 VDD12 147
+3VS DDR_A_CS0# 149 DQ7 13 DDR_A_DQS0 +1.2V_VDDQ 118 VDD3 VDD13 148
<7> DDR_A_CS0# DDR_A_CS1# 157 S0# DQS0(T) 11 DDR_A_DQS0# DDR_A_DQS0 <7> 123 VDD4 VDD14 153
<7> DDR_A_CS1# S1# DQS0#(C) DDR_A_DQS0# <7> VDD5 VDD15
162 124 154
S2#/C0 DDR_A_DQ[15..8] <7> VDD6 VDD16
2
165 28 DDR_A_DQ8 129 159
S3#/C1 DQ8 VDD7 VDD17
1
29 DDR_A_DQ9 RD3 130 160

DDR_A_ODT0 DQ9 DDR_A_DQ10 +3VS VDD8 VDD18 +0.6VS_VTT
0_0402_5%
RD5
0_0402_5%
RD6
0_0402_5%
RD7
155 41 1K_0402_1% 135 163

<7> DDR_A_ODT0 DDR_A_ODT1 161 ODT0 DQ10 42 DDR_A_DQ11 +VREFA_CA 136 VDD9 VDD19
<7> DDR_A_ODT1 ODT1 DQ11 DDR_A_DQ12 VDD10 +2.5V
24
1
@ @ @ DDR_A_BG0 115 DQ12 25 DDR_A_DQ13 255 258
<7> DDR_A_BG0
2
DDR_A_BG1 113 BG0 DQ13 38 DDR_A_DQ14 VDDSPD VTT

<7> DDR_A_BG1 DDR_A_BA0 150 BG1 DQ14 37 DDR_A_DQ15
(
PC sample = 1.5K
15mil 164 257
DDR_A_SA2 <7> DDR_A_BA0 DDR_A_BA1 145 BA0 DQ15 34 DDR_A_DQS1 others = 1k ohm VREFCA VPP1 259
<7> DDR_A_BA1 BA1 DQS1(T) DDR_A_DQS1 <7> VPP2
CD20 4.7U_0402_6.3V6M
CD22 0.1U_0201_10V6K
CD21 0.1U_0201_10V6K
CD19 1000P_0402_50V7K
DDR_A_SA1 32 DDR_A_DQS1#
DDR_A_SA0 <7> DDR_A_MA[13..0] DDR_A_MA0 DQS1#(C) DDR_A_DQS1# <7>
CD31 1U_0201_6.3V6M
144 1 99
A0 DDR_A_DQ[23..16] <7> VSS VSS
2
DDR_A_MA1 133 50 DDR_A_DQ16 1 2 2 1 2 102
A1 DQ16 VSS VSS
1
DDR_A_MA2 132 49 DDR_A_DQ17 RD4 5 103

0_0402_5%
0_0402_5%
0_0402_5%
A2 DQ17 VSS VSS 1

DDR_A_MA3 131 62 DDR_A_DQ18 1K_0402_1% 6 106
RD8
RD9
RD10
RS@ RS@ RS@ DDR_A_MA4 128 A3 DQ18 63 DDR_A_DQ19 9 VSS VSS 107
DDR_A_MA5 126 A4 DQ19 46 DDR_A_DQ20 2 1 1 2 10 VSS VSS 167
1
DDR_A_MA6 127 A5 DQ20 45 DDR_A_DQ21 14 VSS VSS 168 2
2
DDR_A_MA7 122 A6 DQ21 58 DDR_A_DQ22 15 VSS VSS 171

CD1 @EMC@ DDR_A_MA8 125 A7 DQ22 59 DDR_A_DQ23 18 VSS VSS 172
.1U_0402_16V7K DDR_A_MA9 121 A8 DQ23 55 DDR_A_DQS2 19 VSS VSS 175
2 1 DDR_A_RST# DDR_A_MA10 146 A9 DQS2(T) 53 DDR_A_DQS2# DDR_A_DQS2 <7> 22 VSS VSS 176
DDR_A_MA11 120 A10_AP DQS2#(C) DDR_A_DQS2# <7> 23 VSS VSS 180
DDR_A_MA12 119 A11 70 DDR_A_DQ24 DDR_A_DQ[31..24] <7> 26 VSS VSS 181 CRB use 1uF x1
DDR_A_MA13 158 A12 DQ24 71 DDR_A_DQ25 27 VSS VSS 184
DDR_A_MA14_WE# 151 A13 DQ25 83 DDR_A_DQ26 30 VSS VSS 185
Note:
<7>
<7>
DDR_A_MA14_WE#
DDR_A_MA15_CAS#
DDR_A_MA15_CAS#
DDR_A_MA16_RAS#
156 A14_WE#
A15_CAS#
DQ26
DQ27
84 DDR_A_DQ27
DDR_A_DQ28
/ 4 )2## / / 31 VSS
VSS
VSS
VSS
188
Layout Note: 152 66 35 189
Check voltage tolerance of <7> DDR_A_MA16_RAS# A16_RAS# DQ28 67 DDR_A_DQ29 36 VSS VSS 192
Place near JDIMM1 VREF_DQ at the DIMM socket DDR_A_ACT# 114 DQ29 79 DDR_A_DQ30 39 VSS VSS 193
<7> DDR_A_ACT# ACT# DQ30 DDR_A_DQ31 VSS VSS
80 40 196
2 DDR4 support Even Parity check in DRAMs. DDR_A_PAR 143 DQ31 76 DDR_A_DQS3 43 VSS VSS 197 2
<7> DDR_A_PAR DDR_A_ALERT# 116 PARITY DQS3(T) 74 DDR_A_DQS3# DDR_A_DQS3 <7> 44 VSS VSS 201
<7> DDR_A_ALERT# DDR_A_EVENT# ALERT# DQS3#(C) DDR_A_DQS3# <7> VSS VSS
CRB use 0.1uF x12 (6 pop,6 unpop),180pF x1,100uF x2 134 47 202
<7> DDR_A_EVENT# DDR_A_RST# 108 EVENT# 174 DDR_A_DQ32 DDR_A_DQ[39..32] <7> 48 VSS VSS 205
+1.2V_VDDQ <7> DDR_A_RST# RESET# DQ32 DDR_A_DQ33 VSS VSS
173 51 206
DQ33 187 DDR_A_DQ34 52 VSS VSS 209
SMB_0_SDA 254 DQ34 186 DDR_A_DQ35 56 VSS VSS 210
<9,24> SMB_0_SDA SMB_0_SCL SDA DQ35 DDR_A_DQ36 VSS VSS
253 170 57 213
<9,24> SMB_0_SCL SCL DQ36 DDR_A_DQ37 VSS VSS
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
169 60 214
DDR_A_SA2 166 DQ37 183 DDR_A_DQ38 61 VSS VSS 217
1 1 1 1 1 1 SA2 DQ38 VSS VSS
DDR_A_SA1 DDR_A_DQ39
CD2
CD3
CD4
CD5
CD6
CD7
260 182 64 218

DDR_A_SA0 256 SA1 DQ39 179 DDR_A_DQS4 65 VSS VSS 222
SA0 DQS4(T) 177 DDR_A_DQS4# DDR_A_DQS4 <7> 68 VSS VSS 223
2 2 2 2 2 2 DQS4#(C) DDR_A_DQS4# <7> VSS VSS
69 226
DDR_A_DQ40 DDR_A_DQ[47..40] <7> VSS VSS
92 195 72 227
91 CB0_NC DQ40 194 DDR_A_DQ41 73 VSS VSS 230
+1.2V_VDDQ 104 CB6_NC DQ46 204 DDR_A_DQ47 86 VSS VSS 243
97 CB7_NC DQ47 200 DDR_A_DQS5 89 VSS VSS 244
( + = , 76 */ + + DQS8(T) DQS5(T) DDR_A_DQS5 <7> VSS VSS
95 198 DDR_A_DQS5# 90 247
=# DQS8#(C) DQS5#(C) DDR_A_DQS5# <7>
93 VSS VSS 248
216 DDR_A_DQ48 DDR_A_DQ[55..48] <7> 94 VSS VSS 251
1 <7> DDR_A_DM[7..0] DQ48 VSS VSS
DDR_A_DM0 DDR_A_DQ49
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
@ @ 12 215 98 252
+ CD18 DDR_A_DM1 33 DM0#/DBI0# DQ49 228 DDR_A_DQ50 VSS VSS
1 1 1 1 1 1 1 1 DM1#/DBI1# DQ50
DDR_A_DM2 DDR_A_DQ51
CD10
CD11
CD12
CD13
CD14
CD15
CD16
CD17
330U_D2_2V_Y 54 229 262 261

DDR_A_DM3 75 DM2#/DBI2# DQ51 211 DDR_A_DQ52 GND GND
2 DDR_A_DM4 178 DM3#/DBI3# DQ52 212 DDR_A_DQ53
2 2 2 2 2 2 2 2 DDR_A_DM5 199 DM4#/DBI4# DQ53 224 DDR_A_DQ54
SGA00009S00 DDR_A_DM6 220 DM5#/DBI5# DQ54 225 DDR_A_DQ55
330U 2V H1.9 DDR_A_DM7 241 DM6#/DBI6# DQ55 221 DDR_A_DQS6
DM7#/DBI7# DQS6(T) DDR_A_DQS6 <7>
9mohm POLY 96
DM8#/DBI8# DQS6#(C)
219 DDR_A_DQS6#
DDR_A_DQS6# <7>
3 3
DDR_A_DQ56 DDR_A_DQ[63..56] <7>

237
+1.2V_VDDQ DQ56 236 DDR_A_DQ57
DQ57 249 DDR_A_DQ58
DQ58 250 DDR_A_DQ59
DQ59 232 DDR_A_DQ60
DQ60 233 DDR_A_DQ61
DQ61
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
180P_0402_50V8J
2 2 2 2 2 245 DDR_A_DQ62
DQ62 DDR_A_DQ63
CD61
CD62
CD63
CD64
CD65
246
DQ63 242 DDR_A_DQS7
DQS7(T) 240 DDR_A_DQS7# DDR_A_DQS7 <7>
1 1 1 1 1 DQS7#(C) DDR_A_DQS7# <7>
DEREN_40-42271-26001RHF
CONN@ Layout Note:
SP07001CW00 Place near JDIMM1.258
CRB use 4.7uF x1,0.1uF x1
+0.6VS_VTT
Layout Note: Layout Note:
Place near JDIMM1.257,259 Place near JDIMM1.255
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1 1 1 1
CD108
CD27
CD28
CD29
CD30
@
CRB use 0.1uF x2,180pF x1 CRB use 1uF x1
+2.5V +3VS DVT 2 2 2 2 2

4 4
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1 1 1 1
CD23
CD24
CD25
CD98
CD26
2 2 2 2 @ 2
Security Classification Compal Secret Data

( + = , 76 */ + + DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D E
A B C D E
Standard Type
2-3A to 1 DIMMs/channel
JDIMM2A
DDR_B_CLK0 DDR_B_DQ0 DDR_B_DQ[7..0] <7>
137 STD 8
<7> DDR_B_CLK0 DDR_B_CLK0# 139 CK0(T) DQ0 7 DDR_B_DQ1
<7> DDR_B_CLK0# DDR_B_CLK1 138 CK0#(C) DQ1 20 DDR_B_DQ2 +1.2V_VDDQ +1.2V_VDDQ
<7> DDR_B_CLK1 DDR_B_CLK1# 140 CK1(T) DQ2 21 DDR_B_DQ3 JDIMM2B
1
Address : A2 <7>
<7>
DDR_B_CLK1#
DDR_B_CKE0
DDR_B_CKE0
DDR_B_CKE1
109
110
CK1#(C)
CKE0
DQ3
DQ4
DQ5
4
3
16
DDR_B_DQ4
DDR_B_DQ5
DDR_B_DQ6
Follow CRB design
111
112 VDD1
STD
VDD11
141
142
1
<7> DDR_B_CKE1 CKE1 DQ6 17 DDR_B_DQ7 117 VDD2 VDD12 147
+3VS DDR_B_CS0# 149 DQ7 13 DDR_B_DQS0 +1.2V_VDDQ 118 VDD3 VDD13 148
<7> DDR_B_CS0# DDR_B_CS1# 157 S0# DQS0(T) 11 DDR_B_DQS0# DDR_B_DQS0 <7> 123 VDD4 VDD14 153
<7> DDR_B_CS1# S1# DQS0#(C) DDR_B_DQS0# <7> VDD5 VDD15
162 124 154
S2#/C0 DDR_B_DQ[15..8] <7> VDD6 VDD16
2
165 28 DDR_B_DQ8 129 159
S3#/C1 DQ8 VDD7 VDD17
1
DDR_B_DQ9
10K_0402_5%
RD244
29 RD243 130 160

DDR_B_ODT0 DQ9 DDR_B_DQ10 +3VS VDD8 VDD18 +0.6VS_VTT
0_0402_5%
RD247
0_0402_5%
RD248
155 41 1K_0402_1% 135 163

<7> DDR_B_ODT0 DDR_B_ODT1 161 ODT0 DQ10 42 DDR_B_DQ11 +VREFB_CA 136 VDD9 VDD19
<7> DDR_B_ODT1 ODT1 DQ11 DDR_B_DQ12 VDD10 +2.5V
24
1
@ @ DDR_B_BG0 115 DQ12 25 DDR_B_DQ13 255 258
<7> DDR_B_BG0
2
DDR_B_BG1 113 BG0 DQ13 38 DDR_B_DQ14 VDDSPD VTT

<7> DDR_B_BG1 DDR_B_BA0 150 BG1 DQ14 37 DDR_B_DQ15
(
PC sample = 1.5K
15mil 164 257
DDR_B_SA2 <7> DDR_B_BA0 DDR_B_BA1 145 BA0 DQ15 34 DDR_B_DQS1 others = 1k ohm VREFCA VPP1 259
<7> DDR_B_BA1 BA1 DQS1(T) DDR_B_DQS1 <7> VPP2
CD84 4.7U_0402_6.3V6M
CD76 0.1U_0201_10V6K
CD80 0.1U_0201_10V6K
CD87 1000P_0402_50V7K
DDR_B_SA1 32 DDR_B_DQS1#
DDR_B_SA0 <7> DDR_B_MA[13..0] DDR_B_MA0 DQS1#(C) DDR_B_DQS1# <7>
CD89 1U_0201_6.3V6M
144 1 99
A0 DDR_B_DQ[23..16] <7> VSS VSS
2
DDR_B_MA1 133 50 DDR_B_DQ16 1 2 2 1 2 102
A1 DQ16 VSS VSS
1
DDR_B_MA2 132 49 DDR_B_DQ17 RD253 5 103

0_0402_5%
0_0402_5%
A2 DQ17 VSS VSS 1

DDR_B_MA3 DDR_B_DQ18
0_0402_5%
RD249
131 62 1K_0402_1% 6 106

RD252
RD246
RS@ RS@ CD73 @EMC@ DDR_B_MA4 128 A3 DQ18 63 DDR_B_DQ19 9 VSS VSS 107
.1U_0402_16V7K DDR_B_MA5 126 A4 DQ19 46 DDR_B_DQ20 2 1 1 2 10 VSS VSS 167
1
@ 2 1 DDR_B_RST# DDR_B_MA6 127 A5 DQ20 45 DDR_B_DQ21 14 VSS VSS 168 2
2
DDR_B_MA7 122 A6 DQ21 58 DDR_B_DQ22 15 VSS VSS 171

DDR_B_MA9 121 A8 DQ23 55 DDR_B_DQS2 19 VSS VSS 175
DDR_B_MA10 146 A9 DQS2(T) 53 DDR_B_DQS2# DDR_B_DQS2 <7> 22 VSS VSS 176
DDR_B_MA11 120 A10_AP DQS2#(C) DDR_B_DQS2# <7> 23 VSS VSS 180
DDR_B_MA12 119 A11 70 DDR_B_DQ24 DDR_B_DQ[31..24] <7> 26 VSS VSS 181 CRB use 1uF x1
DDR_B_MA14_WE# 151 A13 DQ25 83 DDR_B_DQ26 30 VSS VSS 185
Note:
<7>
<7>
DDR_B_MA14_WE#
DDR_B_MA15_CAS#
DDR_B_MA15_CAS#
DDR_B_MA16_RAS#
156 A14_WE#
A15_CAS#
DQ26
DQ27
84 DDR_B_DQ27
DDR_B_DQ28
/ 4 )2## / / 31 VSS
VSS
VSS
VSS
188
Layout Note: 152 66 35 189
Check voltage tolerance of <7> DDR_B_MA16_RAS# A16_RAS# DQ28 67 DDR_B_DQ29 36 VSS VSS 192
Place near JDIMM2 VREF_DQ at the DIMM socket DDR_B_ACT# 114 DQ29 79 DDR_B_DQ30 39 VSS VSS 193
<7> DDR_B_ACT# ACT# DQ30 DDR_B_DQ31 VSS VSS
80 40 196
2 DDR_B_PAR 143 DQ31 76 DDR_B_DQS3 43 VSS VSS 197 2
<7> DDR_B_PAR DDR_B_ALERT# 116 PARITY DQS3(T) 74 DDR_B_DQS3# DDR_B_DQS3 <7> 44 VSS VSS 201
<7> DDR_B_ALERT# DDR_B_EVENT# ALERT# DQS3#(C) DDR_B_DQS3# <7> VSS VSS
CRB use 0.1uF x12 (6 pop,6 unpop),180pF x1,100uF x2 134 47 202
<7> DDR_B_EVENT# DDR_B_RST# 108 EVENT# 174 DDR_B_DQ32 DDR_B_DQ[39..32] <7> 48 VSS VSS 205
+1.2V_VDDQ <7> DDR_B_RST# RESET# DQ32 DDR_B_DQ33 VSS VSS
173 51 206
DQ33 187 DDR_B_DQ34 52 VSS VSS 209
SMB_0_SDA 254 DQ34 186 DDR_B_DQ35 56 VSS VSS 210
<9,23> SMB_0_SDA SMB_0_SCL SDA DQ35 DDR_B_DQ36 VSS VSS
253 170 57 213
<9,23> SMB_0_SCL SCL DQ36 DDR_B_DQ37 VSS VSS
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
169 60 214
DDR_B_SA2 166 DQ37 183 DDR_B_DQ38 61 VSS VSS 217
1 1 1 1 1 1 SA2 DQ38 VSS VSS
DDR_B_SA1 DDR_B_DQ39
CD86
CD67
CD78
CD93
CD71
CD81
260 182 64 218

DDR_B_SA0 256 SA1 DQ39 179 DDR_B_DQS4 65 VSS VSS 222
SA0 DQS4(T) 177 DDR_B_DQS4# DDR_B_DQS4 <7> 68 VSS VSS 223
2 2 2 2 2 2 DQS4#(C) DDR_B_DQS4# <7> VSS VSS
69 226
DDR_B_DQ40 DDR_B_DQ[47..40] <7> VSS VSS
92 195 72 227
91 CB0_NC DQ40 194 DDR_B_DQ41 73 VSS VSS 230
+1.2V_VDDQ 104 CB6_NC DQ46 204 DDR_B_DQ47 86 VSS VSS 243
97 CB7_NC DQ47 200 DDR_B_DQS5 89 VSS VSS 244
( + = , 76 */ + + DQS8(T) DQS5(T) DDR_B_DQS5 <7> VSS VSS
95 198 DDR_B_DQS5# 90 247
DQS8#(C) DQS5#(C) DDR_B_DQS5# <7> VSS VSS
93 248
216 DDR_B_DQ48 DDR_B_DQ[55..48] <7> 94 VSS VSS 251
<7> DDR_B_DM[7..0] DDR_B_DM0 DQ48 DDR_B_DQ49 VSS VSS
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
12 215 98 252
DDR_B_DM1 33 DM0#/DBI0# DQ49 228 DDR_B_DQ50 VSS VSS
1 1 1 1 1 1 1 1 DM1#/DBI1# DQ50
DDR_B_DM2 DDR_B_DQ51
CD82
CD90
CD96
CD77
CD68
CD88
CD103
CD104
54 229 262 261

DDR_B_DM3 75 DM2#/DBI2# DQ51 211 DDR_B_DQ52 GND GND
DDR_B_DM4 178 DM3#/DBI3# DQ52 212 DDR_B_DQ53
2 2 2 2 2 2 2 2 @ DDR_B_DM5 199 DM4#/DBI4# DQ53 224 DDR_B_DQ54
DDR_B_DM6 220 DM5#/DBI5# DQ54 225 DDR_B_DQ55
DDR_B_DM7 241 DM6#/DBI6# DQ55 221 DDR_B_DQS6
DM7#/DBI7# DQS6(T) DDR_B_DQS6# DDR_B_DQS6 <7>
96 219
3 DM8#/DBI8# DQS6#(C) DDR_B_DQS6# <7> 3
DDR_B_DQ56 DDR_B_DQ[63..56] <7>

237
+1.2V_VDDQ DQ56 236 DDR_B_DQ57
DQ57 249 DDR_B_DQ58
DQ58 250 DDR_B_DQ59
DQ59 232 DDR_B_DQ60
DQ60 233 DDR_B_DQ61
DQ61
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
180P_0402_50V8J
2 2 2 2 2 245 DDR_B_DQ62
DQ62 DDR_B_DQ63
CD91
CD94
CD97
CD66
CD85
246
DQ63 242 DDR_B_DQS7
DQS7(T) 240 DDR_B_DQS7# DDR_B_DQS7 <7>
1 1 1 1 1 DQS7#(C) DDR_B_DQS7# <7>
FOX_AS0A821-H4SB-7H
CONN@ Layout Note:
SP07001HW00 Place near JDIMM2.258
Symbol follow EH5AW (Lada)
CRB use 4.7uF x1,0.1uF x1
+0.6VS_VTT
Layout Note: Layout Note:
Place near JDIMM2.257,259 Place near JDIMM2.255
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1 1 1 1
CD109
CD70
CD74
CD92
CD72
@
CRB use 0.1uF x2,180pF x1 CRB use 1uF x1
+2.5V +3VS DVT 2 2 2 2 2

4 4
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1 1 1 1
CD79
CD83
CD75
CD105
CD95
2 2 2 2 @ 2

( + = , 76 */ + + DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
A B C D E
5 4 3 2 1
AMD FP6 only support x8

UV1A
GN20-E7
+1.8VSDGPU_AON BGA2714
COMMON
+PEX_VDD
2
1/24 PCI_EXPRESS
RV501 VGA@
10K_0201_5% BR31 PEX_WAKE
1 CV21
1 CV22
PEX_DVDD BF32
PLTRST_VGA#_1V8
CV18
CV19
CV20
22U_0603_6.3V6M
22U_0603_6.3V6M
BT30 PEX_RST PEX_DVDD BF34
<26> PLTRST_VGA#_1V8
VGA@ CV10
VGA@ CV11
VGA@ CV12
VGA@ CV13
VGA@ CV14
VGA@ CV15
VGA@ CV16
VGA@ CV17
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
BF35
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
PEX_DVDD 1 1 1 1 1 1 1 1 1 1 1
D VGA_CLKREQ#_R BP31 BF37 D
<26> VGA_CLKREQ#_R PEX_CLKREQ PEX_DVDD
2 9 #) , ! PEX_DVDD BG32
CLK_PCIE_P0
VGA@
VGA@
VGA@
BJ30 PEX_REFCLK PEX_DVDD BG34
<10> CLK_PCIE_P0
VGA@ 2
VGA@ 2
CLK_PCIE_N0 BK30 BG35 2 2 2 2 2 2 2 2 2 2 2
<10> CLK_PCIE_N0 PEX_REFCLK PEX_DVDD
PEX_DVDD BG37
PEG_CRX_C_GTX_P0 BL31 PEX_TX0 PEX_DVDD BH32
<6> PEG_CRX_C_GTX_P0
PEG_CRX_C_GTX_N0 BM31 PEX_TX0 PEX_DVDD BH34
<6> PEG_CRX_C_GTX_N0
PEX_DVDD BH35
PEG_CTX_C_GRX_P0 BR32 PEX_RX0 PEX_DVDD BH37 Under GPU Near GPU
<6> PEG_CTX_C_GRX_P0 PEG_CTX_C_GRX_N0 BT32 PEX_RX0
<6> PEG_CTX_C_GRX_N0
PEG_CRX_C_GTX_P1 BJ32 PEX_TX1 1U_0402*6(X6S) 10U_0805*3
PEG_CRX_C_GTX_N1 BK32 PEX_TX1 4.7U_0603*2(X6S) 22U_0805*2
PEX_CVDD BF31
PEG_CTX_C_GRX_P1 BP33 PEX_RX1 PEX_CVDD BG31
<6> PEG_CTX_C_GRX_P1 PEG_CTX_C_GRX_N1 BR33 PEX_RX1 PEX_CVDD BH31
PEG_CRX_C_GTX_P2 BL33 PEX_TX2
PEG_CRX_C_GTX_N2 BM33 PEX_TX2
PEG_CTX_C_GRX_P2 BR34 PEX_RX2
PEG_CRX_C_GTX_P3 BJ34 PEX_TX3
+1.8VSDGPU_AON
PEG_CRX_C_GTX_N3 BK34 PEX_TX3
PEG_CTX_C_GRX_P3 BP35 PEX_RX3
<6> PEG_CTX_C_GRX_P3 PEG_CTX_C_GRX_N3 BR35 PEX_RX3
PEG_CRX_C_GTX_P4 BL35 PEX_TX4
PEG_CRX_C_GTX_N4 BM35 PEX_TX4
VGA@ CV23
VGA@ CV24
VGA@ CV25
VGA@ CV26
VGA@ CV27
VGA@ CV28
VGA@ CV29
VGA@ CV30
VGA@ CV31
VGA@ CV32
VGA@ CV33
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1 1 1 1 1 1 1 1 1 1 1
PEG_CTX_C_GRX_P4 BR36 PEX_RX4
C <6> PEG_CTX_C_GRX_N4 C
PEG_CRX_C_GTX_P5 BJ36 2 2 2 2 2 2 2 2 2 2 2
<6> PEG_CRX_C_GTX_P5 PEX_TX5
PEG_CRX_C_GTX_N5 BK36 PEX_TX5
PEG_CTX_C_GRX_P5 BP37 PEX_RX5 PEX_HVDD BF38
<6> PEG_CTX_C_GRX_P5 PEG_CTX_C_GRX_N5 BR37 PEX_RX5 PEX_HVDD BF40
PEX_HVDD BF41
PEG_CRX_C_GTX_P6 BL37 PEX_TX6 PEX_HVDD BG38
PEG_CRX_C_GTX_N6 BM37 PEX_TX6 PEX_HVDD BG40 Under GPU
PEX_HVDD BG41
PEG_CTX_C_GRX_P6 BR38 PEX_RX6 PEX_HVDD BG43
<6> PEG_CTX_C_GRX_P6 PEG_CTX_C_GRX_N6
1 CV37
1 CV38
BT38 PEX_RX6 PEX_HVDD BG44 1U_0402*9(X6S)
<6> PEG_CTX_C_GRX_N6 4.7U_0603*2(X6S)
CV34
VGA@ CV2812
CV36
22U_0603_6.3V6M
22U_0603_6.3V6M
PEX_HVDD BH38
PEG_CRX_C_GTX_P7
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
<6> PEG_CRX_C_GTX_P7 BJ38 PEX_TX7 PEX_HVDD BH40 1 1 1
PEG_CRX_C_GTX_N7 BK38 PEX_TX7 PEX_HVDD BH41
PEX_HVDD BH43
PEG_CTX_C_GRX_P7
VGA@
VGA@
BP39 PEX_RX7 PEX_HVDD BH44
<6> PEG_CTX_C_GRX_P7
VGA@ 2
VGA@ 2
PEG_CTX_C_GRX_N7 BR39 2 2 2
<6> PEG_CTX_C_GRX_N7 PEX_RX7
BL39 PEX_TX8
BM39 PEX_TX8
PEX_PLL_HVDD BF43
BR40 PEX_RX8
BT40 PEX_RX8 Near GPU 10U_0805*3
UV1 22U_0805*2
BJ40 PEX_TX9
BK40 PEX_TX9
+PEX_PLL_HVDD +1.8VSDGPU_AON
BP41 PEX_RX9
BR41 PEX_RX9 1 VGA@ 2
Nvidia GN20-E5-A1 RV529 0_0402_5%
E5QS@ BL41 PEX_TX10
SA0000DUL00 BM41 PEX_TX10
CV452
B S IC GN20-E5-A1 FCBGA 2714 GPU S B
1U_0201_6.3V6M
BR42 PEX_RX10 1
UV1 BT42 PEX_RX10
VGA@
BJ42 PEX_TX11
BK42 2
PEX_TX11
BP43 PEX_RX11
Nvidia GN20-E7-A1 BR43 PEX_RX11
E7QS@
SA0000DUM00 BL43 PEX_TX12
BM43 PEX_TX12
S IC GN20-E7-A1 FCBGA 2714 GPU S
BR44 PEX_RX12
UV1 BT44 PEX_RX12
BJ44 PEX_TX13
BK44 PEX_TX13
BP45 PEX_RX13
Nvidia GN20-E3-A1 BR45 PEX_RX13
E3MP@
SA0000E1930 BL45 PEX_TX14
BM45 PEX_TX14 PEX_CVDD_SENSE BK46
S IC GN20-E3-A1 FCBGA 2714 GPU ABO
UV1 BR46 PEX_RX14
BT46 PEX_RX14
BL47 PEX_TX15
BM47 PEX_TX15
Nvidia GN20-E5-A1 BP47 PEX_RX15 PEX_TERMP BT50 PEX_TERMP 1 2

E5MP@ BR47 PEX_RX15 VGA@ RV11
SA0000DUL20 2.49K_0402_1%
A A
S IC GN20-E5-A1 FCBGA 2714 GPU S
UV1
@
Nvidia GN20-E7-A1
E7MP@ Security Classification Compal Secret Data Compal Electronics, Inc.
SA0000DUM20 Issued Date 2020/11/16 Deciphered Date 2021/11/16 Title
S IC GN20-E7-A1 BGA 2714 GPU ABO!
GN20E PEG 1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
5 4 3 2 1
5 4 3 2 1
+1.8VSDGPU_AON
UV1Q To PWR
5
GN20-E7 QV13A VGA@
BGA2714 PJT138KA 2N SOT363-6
G
COMMON VGA_I2CC_SCL 4 3
+1.8VSDGPU_AON <36> VGA_I2CC_SCL VGA_I2CC_SCL_PWR <36,103>
D
12/24 MISC 1
2
QV13B VGA@
PJT138KA 2N SOT363-6
G
VGA_OVERT# BK7 OVERT I2CS_SCL BL8 VGA_I2CS_SCL RV14 1 VGA@ 2 1.8K_0402_1% VGA_I2CC_SDA 1 6
<36> VGA_I2CC_SDA VGA_I2CC_SDA_PWR <36,103>
BL7 VGA_I2CS_SDA RV15 1 VGA@ 2 1.8K_0402_1%
D
I2CS_SDA
D D
BG8 TS_VREF +1.8VSDGPU_AON
to G-PAK I2CC_SCL BM7 VGA_I2CC_SCL RV12 2 VGA@ 1 2.2K_0402_5% 2 9 #) , !
I2CC_SDA BN7 VGA_I2CC_SDA RV13 2 VGA@ 1 2.2K_0402_5%
5
QV2A VGA@
BN8 VGA_I2CB_SCL RV16 2 VGA@ 1 2.2K_0402_5% PJT138KA 2N SOT363-6
To CPU/ EC
G
I2CB_SCL
I2CB_SDA BM8 VGA_I2CB_SDA RV17 2 VGA@ 1 2.2K_0402_5% VGA_I2CS_SCL 4 3
EC_SMB_CK2 <8,58>
2
QV2B VGA@
BR8 PJT138KA 2N SOT363-6
G
THERMDN
VGA_I2CS_SDA 1 6 EC_SMB_DA2 <8,58>
BP8
D
THERMDP
GPIO0 BP2 NVVDD_VID +1.8VSDGPU_AON

BN3 GC6_FB_EN1V8 NVVDD_VID <103>
GPIO1
GPIO2 BN2
BP10 ADC_IN GPIO3 BM4 GPIO4_EN RV21 1 VGA@ 2 10K_0201_5%
<36> ADC_IN_P BR10 BM3 GPIO4_EN NVVDD_PSI 1 2
ADC_IN GPIO4 RV22 VGA@ 10K_0201_5%
<36> ADC_IN_N FRM_LCK# VRAM_VDD_CTL
GPIO5 BM2 RV516 1 @ 2 10K_0201_5%
GPIO6 BM1 NVVDD_PSI VGA_ALERT# RV518 1 VGA@ 2 10K_0201_5%
BL1 NVVDD_PSI <103> ACIN_BUF 1 2
GPIO7 RV514 VGA@ 10K_0201_5%
GPIO8 BK6 VRAM_VDD_CTL GPIO22_ADC_MUX_SEL RV515 1 VGA@ 2 10K_0201_5%
BK5 VGA_ALERT# VRAM_VDD_CTL <108>
GPIO9
GPIO10 BK4 VRAM_VREF_CTL FBVDDQ_PSI RV117 1 VGA@ 2 10K_0201_5%
@ T67 PAD~D JTAG_TCK BP25 JTAG_TCK GPIO11 BK3 VGA_OVERT# RV418 1 VGA@ 2 10K_0201_5%
@ T66 PAD~D JTAG_TMS BN25 JTAG_TMS GPIO12 BK2 ACIN_BUF 2 1 FRM_LCK# RV448 1 VGA@ 2 10K_0201_5%
JTAG_TDI DGPU_AC_DETECT <58,85>
@ T64 PAD~D BT25 JTAG_TDI GPIO13 BK1 VGA@ DV6
@ T65 PAD~D JTAG_TDO BR25 JTAG_TDO GPIO14 BJ6 DP0_HPD_GPU# RB751S40T1G_SOD523-2
1 2 JTAG_TRST# BM25 JTAG_TRST GPIO15 BJ5
C RV10 10K_0201_5% BJ4 GC6_FB_EN1V8 RV20 1 VGA@ 2 10K_0201_5% C
GPIO16
VGA@ GPIO17 BJ3 NVVDD_PSI RV23 1 @ 2 10K_0201_5%
+1.8VSDGPU_AON GPIO18 BJ2 VRAM_VDD_CTL RV517 1 @ 2 10K_0201_5%
BL25 NVJTAG_SEL GPIO19 BJ1 VRAM_VREF_CTL RV519 1 VGA@ 2 100K_0201_5%
GPIO20 BH1
1
GPIO21 BG7
RV19 GPIO22 BG6 GPIO22_ADC_MUX_SEL FBVDDQ_PSI RV530 1 @ 2 10K_0201_5%
BG5 GPIO22_ADC_MUX_SEL <36>
10K_0201_5% GPIO23
@ GPIO24 BG4
GPIO25 BG3 FBVDDQ_PSI
FBVDDQ_PSI <108>
2
GPIO26 BG2 ROM_WP# 0_0402_5% 1 VGA@ 2 RV120 ROM_WP#_R

BG1 HDMI_HPD_GPU# ROM_WP#_R <28>
GPIO27
1
GPIO28 BF1
RV18 GPIO29 BF2
10K_0201_5% GPIO30 BF3 +1.8VSDGPU_AON
VGA@ GPIO31 BF4
GPIO32 BF5
2
GPIO33 BF6 DP@

GPIO34 BF7 CV626
GPIO35 BF8 2 1 +1.8VSDGPU_AON
0.1U_0201_10V6K
1
@ 2 9 #) , ! VGA@
RV458
VCC
DP0_HPD_APU 1 10K_0402_5%
<10,39> DP0_HPD_APU IN B 4 2
+3VS PLTRST_VGA#_1V8 2 OUT Y Gate
GND
2
UV51 IN A 1 DP0_HPD_GPU#
VGA@ Drain
0.1U_0201_10V6K 2 1 CV541 1 20 3 DP@
3
VDD 1V8_MAIN_EN DP@ UV30 Source QV20
B NL17SZ08DFT2G_SC70-5 LBSS139WT1G_SC70-3 B
GPIO4_EN 2 19 PLTRST_VGA#_1V8 SA0000BJI00
1V8_MAIN_EN_GPU PEGX_RST# PLTRST_VGA#_1V8 <25>
- 'B 24 <9>
. 3 18
DGPU_PWR_EN DGPU_PW R_EN PEX_VDD_EN PEX_VDD_EN <37,110>
GC6_FB_EN1V8 RV415 1 VGA@ 2 0_0402_5% GC6_FB_EN1V8_R 4 +1.8VSDGPU_AON +1.8VSDGPU_AON
RV414 2 @ 1 10K_0201_5% GC6_FB_EN_GPU 17
FB_VDD_EN FBVDDQ_EN <37,108>
5
<110> PEX_VDD_PG PEX_VDD_PG
1
GN20E support GC6 VGA@ VGA@
6 16 CV625 RV457
<9,10> GC6_FB_EN3V3 GC6_FB_EN 3V3_SYS_EN 3VSDGPU_EN <37,39,78>
2 1 10K_0201_5%
<108> FBVDDQ_PG 7
FB_VDD_PG 15 ALL_GPWRGD 0.1U_0201_10V6K
2
ALL_GPU_PW R_OK
5
VGA_OVERT# 8 2 9 #) , ! HDMI_HPD_GPU#
OVERT#_GPU
VCC
6
14 1
OVERT# GPU_OVERT# <58> <9,10,40> HDMI_HPD_APU IN B 4 2
D
G
QV5B
9 13 +1.8VSDGPU_AON PLTRST_VGA#_1V8 2 OUT Y PJT138KA 2N SOT363-6
1
GND
1V8_AON_EN <37,110>
S
<9> DGPU_HOLD_RST# DGPU_HOLD_RST# 1V8_AON_EN PU at PCH side IN A
2 9 #) , ! @ VGA@
1
12 CV610
NVVDD_EN NVVDD1_EN <37,103> VGA_CLKREQ# <10>
10 VGA@ SA0000BJI00 0.1U_0201_10V6K
<9> PLT_RST#
3
PLT_RST#
2
UV31 2
RV83 VGA@ NL17SZ08DFT2G_SC70-5
11 10K_0201_5%
GND
3
1
ALL_GPWRGD 5
D
SLG4U44276VTR_STQFN20_3X2 G
QV5A
+1.8VSDGPU_AON PJT138KA 2N SOT363-6
VGA@
S
+ 8C@ * - A. 1 4 VGA@
SA0000DZ000 @
CV609
A RV417 1 VGA@2 10K_0201_5% PLTRST_VGA#_1V8 0.1U_0201_10V6K A
2 VGA_CLKREQ#_R
VGA_CLKREQ#_R <25>
0.1U_0201_10V6K 2 1 CV611
@
0.1U_0201_10V6K 2 1 CV542 VGA_OVERT#
@
0.1U_0201_10V6K 2 1 CV543 GPIO4_EN
@ Security Classification Compal Secret Data Compal Electronics, Inc.
GN20E GPIO 1/7
5 4 3 2 1
5 4 3 2 1
MEMORY: GPU Partition A/B
UV1B
GN20-E7 UV1C
BGA2714 GN20-E7
COMMON
BGA2714
COMMON
<32> FBA_D[63..0] 2/24 FBA FBA_CMD[24..0] <32>
<33> FBB_D[63..0] 3/24 FBB FBB_CMD[24..0] <33>
FBA_D0 AC51 Y53 FBA_CMD0
FBA_D0 FBA_CMD0
FBA_D1 AB48 AA56 FBA_CMD1 FBB_D0 D37 B37 FBB_CMD0
FBA_D1 FBA_CMD1 FBB_D0 FBB_CMD0
FBA_D2 AC52 AB55 FBA_CMD2 FBB_D1 J37 A37 FBB_CMD1
FBA_D3 AC49 AB56 FBA_CMD3 FBB_D2 G37 A38 FBB_CMD2
FBA_D4 AF52 AC56 FBA_CMD4 FBB_D3 F37 D38 FBB_CMD3
FBA_D5 AC54 AC53 FBA_CMD5 FBB_D4 H38 A39 FBB_CMD4
FBA_D6 AE51 AD56 FBA_CMD6 FBB_D5 E38 B40 FBB_CMD5
FBA_D7 AF51 AE55 FBA_CMD7 FBB_D6 F40 A40 FBB_CMD6
FBA_D8 W51 AE56 FBA_CMD8 FBB_D7 D40 A41 FBB_CMD7
FBA_D9 W50 AF56 FBA_CMD9 FBB_D8 F34 D41 FBB_CMD8
FBA_D10 W53 AF53 FBA_CMD10 FBB_D9 J34 A42 FBB_CMD9
FBA_D11 Y54 AG56 FBA_CMD11 FBB_D10 D34 B43 FBB_CMD10
FBA_D12 Y52 AH55 FBA_CMD12 FBB_D11 G34 A43 FBB_CMD11
FBA_D13 Y51 AH56 FBA_CMD13 FBB_D12 E35 A44 FBB_CMD12
FBA_D14 Y49 AJ56 FBA_CMD14 FBB_D13 K34 D44 FBB_CMD13
FBA_D15 AB51 AJ53 FBA_CMD15 FBB_D14 H35 A45 FBB_CMD14
FBA_D16 AM54 AK56 FBA_CMD16 FBB_D15 K35 B46 FBB_CMD15
FBA_D17 AL51 AL55 FBA_CMD17 FBB_D16 G47 A46 FBB_CMD16
D
FBA_D18 AM52 AL56 FBA_CMD18 FBB_D17 E44 A47 FBB_CMD17 D
FBA_D19 AJ54 AM56 FBA_CMD19 FBB_D18 F46 D47 FBB_CMD18
FBA_D20 AM47 AM53 FBA_CMD20 FBB_D19 F44 A48 FBB_CMD19
FBA_D21 AM51 AN56 FBA_CMD21 FBB_D20 E46 B49 FBB_CMD20
FBA_D22 AP50 AP55 FBA_CMD22 FBB_D21 C47 A49 FBB_CMD21
FBA_D23 AM49 AP56 FBA_CMD23 FBB_D22 E47 B50 FBB_CMD22
FBA_D24 AF54 AR56 FBA_CMD24 FBB_D23 C49 A50 FBB_CMD23
FBA_D24 FBA_CMD24 FBA_CMD[52..28] <32> FBB_D23 FBB_CMD23
FBA_D25 AF49 AR53 FBB_D24 G40 C50 FBB_CMD24
FBA_D25 FBA_CMD25_NC FBB_D24 FBB_CMD24 FBB_CMD[52..28] <33>
FBA_D26 AH51 AT56 FBB_D25 C41 A51
FBA_D26 FBA_CMD26_NC FBB_D25 FBB_CMD25_NC
FBA_D27 AF47 AR55 FBA_CMD27 FBB_D26 E41 B52
FBA_D27 FBA_CMD27 FBB_D26 FBB_CMD26_NC
FBA_D28 AJ52 BM56 FBA_CMD28 FBB_D27 F41 C52 FBB_CMD27
FBA_D29 AJ51 BM55 FBA_CMD29 FBB_D28 F43 Y56 FBB_CMD28
FBA_D30 AH48 BL56 FBA_CMD30 FBB_D29 C44 W56 FBB_CMD29
FBA_D31 AJ49 BK55 FBA_CMD31 FBB_D30 H41 W55 FBB_CMD30
FBA_D32 BA49 BK56 FBA_CMD32 FBB_D31 H44 V56 FBB_CMD31
FBA_D33 BD47 BJ56 FBA_CMD33 FBB_D32 L51 U53 FBB_CMD32
FBA_D34 BD54 BJ55 FBA_CMD34 FBB_D33 L52 U56 FBB_CMD33
FBA_D35 BD52 BH56 FBA_CMD35 FBB_D34 N51 T56 FBB_CMD34
FBA_D36 BC51 BG53 FBA_CMD36 FBB_D35 L49 T55 FBB_CMD35
FBA_D37 BD51 BG56 FBA_CMD37 FBB_D36 L54 R56 FBB_CMD36
FBA_D38 BF51 BF56 FBA_CMD38 FBB_D37 N47 P53 FBB_CMD37
FBA_D39 BD49 BF55 FBA_CMD39 FBB_D38 P51 P56 FBB_CMD38
FBA_D40 BG52 BE56 FBA_CMD40 FBB_D39 P49 N56 FBB_CMD39
FBA_D41 BG51 BD53 FBA_CMD41 FBB_D40 T51 N55 FBB_CMD40
FBA_D42 BG54 BD56 FBA_CMD42 FBB_D41 P52 M56 FBB_CMD41
FBA_D43 BF49 BC56 FBA_CMD43 FBB_D42 P54 L53 FBB_CMD42
FBA_D44 BJ54 BC55 FBA_CMD44 FBB_D43 U47 L56 FBB_CMD43
FBA_D45 BG50 BB56 FBA_CMD45 FBB_D44 U51 K56 FBB_CMD44
FBA_D46 BJ52 BA53 FBA_CMD46 FBB_D45 U52 K55 FBB_CMD45
FBA_D47 BK53 BA56 FBA_CMD47 FBB_D46 U54 J56 FBB_CMD46
FBA_D48 AP51 AY56 FBA_CMD48 FBB_D47 U49 H53 FBB_CMD47
FBA_D49 AP53 AY55 FBA_CMD49 FBB_D48 D52 H56 FBB_CMD48
FBA_D50 AR52 AW56 FBA_CMD50 FBB_D49 C53 G56 FBB_CMD49
FBA_D51 AR54 AV53 FBA_CMD51 FBB_D50 C54 G55 FBB_CMD50
FBA_D52 AU51 AV56 FBA_CMD52 FBB_D51 C55 E56 FBB_CMD51
FBA_D53 AR51 AU56 FBB_D52 D55 B54 FBB_CMD52 Follow NV CRB
FBA_D53 FBA_CMD53_NC FBB_D52 FBB_CMD52
FBA_D54 AV51 AU55 FBB_D53 D54 B53 FBB_CMD53
FBA_D54 FBA_CMD54_NC FBB_D53 FBB_CMD53_NC
FBA_D55 AR49 AV55 FBA_CMD55 FBB_D54 F56 A52
FBA_D55 FBA_CMD55 FBB_D54 FBB_CMD54_NC
FBA_D56 AV49 FBB_D55 F49 E55 FBB_CMD55
FBA_D56 FBB_D55 FBB_CMD55
FBA_D57 AV54 FBB_D56 G53
FBA_D57 FBB_D56
FBA_D58 AY51 FBB_D57 H49
FBA_D58 FBB_D57
FBA_D59 AV52 FBB_D58 H51
FBA_D59 FBB_D58
FBA_D60 AY48 FBB_D59 G51
FBA_D60 FBB_D59
FBA_D61 BA54 FBB_D60 H52
FBA_D61 FBB_D60
FBA_D62 BA52 AP48 FBB_D61 H54
FBA_D62 FBA_CLK0 FBA_CLK0 <32> FBB_D61
FBA_D63 BA51 AP47 FBB_D62 K48 K44
FBA_D63 FBA_CLK0 FBA_CLK0# <32> FBB_D62 FBB_CLK0 FBB_CLK0 <33>
AR48 FBB_D63 K51 J44
FBA_CLK1 FBA_CLK1 <32> FBB_D63 FBB_CLK0 FBB_CLK0# <33>
FBA_CLK1 AR47 FBB_CLK1 J46
<32> FBA_DBI[7..0] FBA_DBI0 FBA_CLK1# <32> FBB_CLK1 <33>
AE50 FBA_DQM0 FBB_CLK1 K46
FBA_DBI1 <33> FBB_DBI[7..0] FBB_DBI0 FBB_CLK1# <33>
AB50 FBA_DQM1 F38 FBB_DQM0
FBA_DBI2 AL50 AE48 FBB_DBI1 F35
FBA_DQM2 FBA_WCK01 FBA_WCK01 <32> FBB_DQM1
FBA_DBI3 AH50 AE47 FBB_DBI2 G46 J40
FBA_DQM3 FBA_WCK01 FBA_WCK01# <32> FBB_DQM2 FBB_WCK01 FBB_WCK01 <33>
FBA_DBI4 BC50 AC48 FBB_DBI3 G43 K40
FBA_DQM4 FBA_WCKB01 FBA_WCKB01 <32> FBB_DQM3 FBB_WCK01 FBB_WCK01# <33>
FBA_DBI5 BF50 AC47 FBB_DBI4 N50 K38
FBA_DQM5 FBA_WCKB01 FBA_WCKB01# <32> FBB_DQM4 FBB_WCKB01 FBB_WCKB01 <33>
FBA_DBI6 AU50 AL48 FBB_DBI5 T50 J38
FBA_DQM6 FBA_WCK23 FBA_WCK23 <32> FBB_DQM5 FBB_WCKB01 FBB_WCKB01# <33>
FBA_DBI7 AY50 AL47 FBB_DBI6 E49 J43
FBA_DQM7 FBA_WCK23 FBA_WCK23# <32> FBB_DQM6 FBB_WCK23 FBB_WCK23 <33>
AJ48 FBB_DBI7 K50 K43
FBA_WCKB23 FBA_WCKB23 <32> FBB_DQM7 FBB_WCK23 FBB_WCK23# <33>
FBA_WCKB23 AJ47 FBB_WCKB23 K41
<32> FBA_EDC[7..0] FBA_EDC0 FBA_WCKB23# <32> FBB_WCKB23 <33>
AE53 FBA_DQS_WP0 FBA_WCK45 BA47 FBB_WCKB23 J41
FBA_EDC1 FBA_WCK45 <32> <33> FBB_EDC[7..0] FBB_EDC0 FBB_WCKB23# <33>
AB53 FBA_DQS_WP1 FBA_WCK45 BA48 C38 FBB_DQS_WP0 FBB_WCK45 P47
FBA_EDC2 AL53 BC48 FBA_WCK45# <32> FBB_EDC1 C35 P48 FBB_WCK45 <33>
FBA_DQS_WP2 FBA_WCKB45 FBA_WCKB45 <32> FBB_DQS_WP1 FBB_WCK45 FBB_WCK45# <33>
FBA_EDC3 AH53 BC47 FBB_EDC2 D46 T48
FBA_DQS_WP3 FBA_WCKB45 FBA_WCKB45# <32> FBB_DQS_WP2 FBB_WCKB45 FBB_WCKB45 <33>
FBA_EDC4 BC53 AU48 FBB_EDC3 D43 T47
C
FBA_DQS_WP4 FBA_WCK67 FBA_WCK67 <32> FBB_DQS_WP3 FBB_WCKB45 FBB_WCKB45# <33> C
FBA_EDC5 BF53 AU47 +FBVDDQ FBB_EDC4 N53 K47
FBA_EDC6
FBA_DQS_WP5 FBA_WCK67 FBA_WCK67# <32> CKE_A FBB_EDC5
FBB_DQS_WP4 FBB_WCK67 FBB_WCK67 <33>
AU53 FBA_DQS_WP6 FBA_WCKB67 AV48 T53 FBB_DQS_WP5 FBB_WCK67 J47
FBA_EDC7 AY53 AV47 FBA_WCKB67 <32> FBB_EDC6 E53 L47 FBB_WCK67# <33> +FBVDDQ
FBA_DQS_WP7 FBA_WCKB67 FBA_WCKB67# <32> FBA_CMD14 FBB_EDC7
FBB_DQS_WP6 FBB_WCKB67 FBB_WCKB67 <33> CKE_A
2 VGA@ 1 K53 FBB_DQS_WP7 FBB_WCKB67 L48
FBB_WCKB67# <33>
RV87 10K_0402_5%
BN37 FBA_CMD44 2 VGA@ 1 FBB_CMD14 2 VGA@ 1
GND
BN38 GND RV88 10K_0402_5% BN44 GND RV97 10K_0402_5%
BN39 BN45 FBB_CMD44 2 VGA@ 1
GND
+FB_PLLVDD +1.8VSDGPU_AON
CKE_B GND
BN4 GND BN46 GND RV95 10K_0402_5%
BN40 FBA_CMD17 2 VGA@ 1 BN47
GND GND
+FB_PLLVDD
CKE_B
BN41 GND RV92 10K_0402_5% BN48 GND
BN42 VGA@ FBA_CMD41 2 VGA@ 1 BN6 FBB_CMD17 2 VGA@ 1
GND GND
BN43 GND FB_PLLVDD AC46 LV2 1 2 RV91 10K_0402_5% BN9 GND RV94 10K_0402_5%
AE11 CHILISIN PBY160808T-330Y-N BP1 L17 FBB_CMD41 2 VGA@ 1
CV164
CV165
CV166
FB_PLLVDD GND FB_PLLVDD

AP46 RESET RV93 10K_0402_5%
CV167
FB_PLLVDD 1 1 1 SM01000I200
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1CV179
1U_0201_6.3V6M
FBA_CMD3 2 VGA@ 1
SM01000I200 RESET
CV178
CV177
22U_0603_6.3V6M
RV89 10K_0402_5%
VGA@
VGA@
VGA@
1 1 3000ma 33ohm@100mhz DCR 0.04

4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
2 2 2 FBA_CMD31 2 VGA@ 1 FBB_CMD3 2 VGA@ 1
VGA@
RV90 10K_0402_5% 2 RV96 10K_0402_5%
FBB_CMD31 2 VGA@ 1
VGA@
VGA@
2 2 RV98 10K_0402_5%
@
@
VGA@
MEMORY: GPU Partition C/D

UV1D
GN20-E7 UV1E
BGA2714
GN20-E7
COMMON BGA2714
COMMON
<34> FBC_D[63..0] 4/24 FBC FBC_CMD[24..0] <34>
<35> FBD_D[63..0] 5/24 FBD FBD_CMD[24..0] <35>
FBC_D0 F7 B5 FBC_CMD0
FBC_D0 FBC_CMD0
FBC_D1 H5 A5 FBC_CMD1 FBD_D0 AR4 AU1 FBD_CMD0
FBC_D1 FBC_CMD1 FBD_D0 FBD_CMD0
FBC_D2 F8 C5 FBC_CMD2 FBD_D1 AP8 AU4 FBD_CMD1
FBC_D3 G5 A6 FBC_CMD3 FBD_D2 AP6 AT1 FBD_CMD2
FBC_D4 H8 B7 FBC_CMD4 FBD_D3 AR6 AR2 FBD_CMD3
FBC_D5 E8 A7 FBC_CMD5 FBD_D4 AM6 AR1 FBD_CMD4
FBC_D6 C8 A8 FBC_CMD6 FBD_D5 AP3 AP1 FBD_CMD5
FBC_D7 D10 D8 FBC_CMD7 FBD_D6 AP5 AP4 FBD_CMD6
FBC_D8 D2 A9 FBC_CMD8 FBD_D7 AM9 AN1 FBD_CMD7
FBC_D9 E1 B10 FBC_CMD9 FBD_D8 AU5 AM2 FBD_CMD8
FBC_D10 C2 A10 FBC_CMD10 FBD_D9 AV6 AM1 FBD_CMD9
FBC_D11 D3 A11 FBC_CMD11 FBD_D10 AV9 AL1 FBD_CMD10
FBC_D12 C3 D11 FBC_CMD12 FBD_D11 AU3 AL4 FBD_CMD11
FBC_D13 B4 A12 FBC_CMD13 FBD_D12 AU6 AK1 FBD_CMD12
FBC_D14 E4 B13 FBC_CMD14 FBD_D13 AU8 AJ2 FBD_CMD13
FBC_D15 D5 A13 FBC_CMD15 FBD_D14 AU10 AJ1 FBD_CMD14
FBC_D16 F17 A14 FBC_CMD16 FBD_D15 AR7 AH1 FBD_CMD15
FBC_D17 E14 D14 FBC_CMD17 FBD_D16 AF6 AH4 FBD_CMD16
FBC_D18 C14 A15 FBC_CMD18 FBD_D17 AH5 AG1 FBD_CMD17
FBC_D19 H14 B16 FBC_CMD19 FBD_D18 AH3 AF2 FBD_CMD18
FBC_D20 E17 A16 FBC_CMD20 FBD_D19 AF9 AF1 FBD_CMD19
FBC_D21 F16 A17 FBC_CMD21 FBD_D20 AE6 AE1 FBD_CMD20
FBC_D22 C17 D17 FBC_CMD22 FBD_D21 AE8 AE4 FBD_CMD21
FBC_D23 H17 A18 FBC_CMD23 FBD_D22 AE5 AD1 FBD_CMD22
FBC_D24 F10 B19 FBC_CMD24 FBD_D23 AE10 AC2 FBD_CMD23
FBC_D24 FBC_CMD24 FBC_CMD[52..28] <34> FBD_D23 FBD_CMD23
B
FBC_D25 G10 A19 FBD_D24 AL6 AC1 FBD_CMD24 B
FBC_D25 FBC_CMD25_NC FBD_D24 FBD_CMD24 FBD_CMD[52..28] <35>
FBC_D26 C11 A20 FBD_D25 AL3 AB1
FBC_D26 FBC_CMD26_NC FBD_D25 FBD_CMD25_NC
FBC_D27 E11 B20 FBC_CMD27 FBD_D26 AL5 AB4
FBC_D27 FBC_CMD27 FBD_D26 FBD_CMD26_NC
FBC_D28 F11 A36 FBC_CMD28 FBD_D27 AL8 AB2 FBD_CMD27
FBC_D29 F13 D35 FBC_CMD29 FBD_D28 AJ6 G2 FBD_CMD28
FBC_D30 F14 A35 FBC_CMD30 FBD_D29 AL10 G1 FBD_CMD29
FBC_D31 H11 A34 FBC_CMD31 FBD_D30 AH6 G3 FBD_CMD30
FBC_D32 F26 B34 FBC_CMD32 FBD_D31 AH8 H1 FBD_CMD31
FBC_D33 E26 A33 FBC_CMD33 FBD_D32 T5 H2 FBD_CMD32
FBC_D34 H26 D32 FBC_CMD34 FBD_D33 T6 J1 FBD_CMD33
FBC_D35 D28 A32 FBC_CMD35 FBD_D34 P6 K4 FBD_CMD34
FBC_D36 C26 A31 FBC_CMD36 FBD_D35 T8 K1 FBD_CMD35
FBC_D37 E29 B31 FBC_CMD37 FBD_D36 T3 K2 FBD_CMD36
FBC_D38 F28 A30 FBC_CMD38 FBD_D37 N5 L1 FBD_CMD37
FBC_D39 G28 D29 FBC_CMD39 FBD_D38 N3 L2 FBD_CMD38
FBC_D40 F31 A29 FBC_CMD40 FBD_D39 N6 M1 FBD_CMD39
FBC_D41 K29 A28 FBC_CMD41 FBD_D40 L6 N4 FBD_CMD40
FBC_D42 H29 B28 FBC_CMD42 FBD_D41 N8 N1 FBD_CMD41
FBC_D43 J28 A27 FBC_CMD43 FBD_D42 K6 P1 FBD_CMD42
FBC_D44 D31 D26 FBC_CMD44 FBD_D43 L9 P2 FBD_CMD43
FBC_D45 G31 A26 FBC_CMD45 FBD_D44 K3 R1 FBD_CMD44
FBC_D46 E32 A25 FBC_CMD46 FBD_D45 K5 T4 FBD_CMD45
FBC_D47 H31 B25 FBC_CMD47 FBD_D46 J2 T1 FBD_CMD46
FBC_D48 F19 A24 FBC_CMD48 FBD_D47 K8 U1 FBD_CMD47
FBC_D49 K17 D23 FBC_CMD49 FBD_D48 AC7 U2 FBD_CMD48
FBC_D50 C20 A23 FBC_CMD50 FBD_D49 AE3 V1 FBD_CMD49
FBC_D51 J19 A22 FBC_CMD51 FBD_D50 AC6 W4 FBD_CMD50
FBC_D52 E20 B22 FBC_CMD52 FBD_D51 AC4 W1 FBD_CMD51
FBC_D53 F20 A21 FBD_D52 AB3 Y1 FBD_CMD52
FBC_D53 FBC_CMD53_NC FBD_D52 FBD_CMD52
FBC_D54 K20 D20 FBD_D53 AB5 Y2
FBC_D54 FBC_CMD54_NC FBD_D53 FBD_CMD53_NC
FBC_D55 H20 B23 FBC_CMD55 FBD_D54 AB6 AA1
FBC_D55 FBC_CMD55 FBD_D54 FBD_CMD54_NC
FBC_D56 G22 FBD_D55 AB8 W2 FBD_CMD55
FBC_D56 FBD_D55 FBD_CMD55
FBC_D57 F22 FBD_D56 W6
FBC_D57 FBD_D56
FBC_D58 C23 FBD_D57 W8
FBC_D58 FBD_D57
FBC_D59 D22 FBD_D58 W5
FBC_D59 FBD_D58
FBC_D60 E23 FBD_D59 Y6
FBC_D60 FBD_D59
FBC_D61 F23 FBD_D60 W3
FBC_D61 FBD_D60
FBC_D62 F25 K22 FBD_D61 U9
FBC_D62 FBC_CLK0 FBC_CLK0 <34> FBD_D61
FBC_D63 H23 J22 FBD_D62 U6 AC10
FBC_D63 FBC_CLK0 FBC_CLK0# <34> FBD_D62 FBD_CLK0 FBD_CLK0 <35>
K23 FBD_D63 T10 AC9
FBC_CLK1 FBC_CLK1 <34> FBD_D63 FBD_CLK0 FBD_CLK0# <35>
FBC_CLK1 J23 FBD_CLK1 AB10
<34> FBC_DBI[7..0] FBC_DBI0 FBC_CLK1# <34> FBD_CLK1 <35>
G7 FBC_DQM0 FBD_CLK1 AB9
FBC_DBI1 <35> FBD_DBI[7..0] FBD_DBI0 FBD_CLK1# <35>
E3 FBC_DQM1 AM7 FBD_DQM0
FBC_DBI2 G16 K13 FBD_DBI1 AV7
FBC_DQM2 FBC_WCK01 FBC_WCK01 <34> FBD_DQM1
FBC_DBI3 G13 J13 FBD_DBI2 AF7 AP9
FBC_DQM3 FBC_WCK01 FBC_WCK01# <34> FBD_DQM2 FBD_WCK01 FBD_WCK01 <35>
FBC_DBI4 F29 K11 FBD_DBI3 AJ7 AP10
FBC_DQM4 FBC_WCKB01 FBC_WCKB01 <34> FBD_DQM3 FBD_WCK01 FBD_WCK01# <35>
FBC_DBI5 F32 J11 FBD_DBI4 P7 AR9
FBC_DQM5 FBC_WCKB01 FBC_WCKB01# <34> FBD_DQM4 FBD_WCKB01 FBD_WCKB01 <35>
FBC_DBI6 G19 J16 FBD_DBI5 L7 AR10
FBC_DQM6 FBC_WCK23 FBC_WCK23 <34> FBD_DQM5 FBD_WCKB01 FBD_WCKB01# <35>
FBC_DBI7 G25 K16 FBD_DBI6 Y7 AH10
FBC_DQM7 FBC_WCK23 FBC_WCK23# <34> FBD_DQM6 FBD_WCK23 FBD_WCK23 <35>
J14 FBD_DBI7 U7 AH9
FBC_WCKB23 FBC_WCKB23 <34> FBD_DQM7 FBD_WCK23 FBD_WCK23# <35>
FBC_WCKB23 K14 FBD_WCKB23 AJ10
<34> FBC_EDC[7..0] FBC_EDC0 FBC_WCKB23# <34> FBD_WCKB23 <35>
D7 FBC_DQS_WP0 FBC_WCK45 K31 FBD_WCKB23 AJ9
FBC_EDC1 FBC_WCK45 <34> <35> FBD_EDC[7..0] FBD_EDC0 FBD_WCKB23# <35>
B3 FBC_DQS_WP1 FBC_WCK45 J31 AM4 FBD_DQS_WP0 FBD_WCK45 P10
FBC_EDC2 FBC_WCK45# <34> FBD_EDC1 FBD_WCK45 <35>
D16 FBC_DQS_WP2 FBC_WCKB45 K32 AV4 FBD_DQS_WP1 FBD_WCK45 P9
FBC_EDC3 FBC_WCKB45 <34> FBD_EDC2 FBD_WCK45# <35>
D13 FBC_DQS_WP3 FBC_WCKB45 J32 AF4 FBD_DQS_WP2 FBD_WCKB45 N10
FBC_EDC4 C29 K25 FBC_WCKB45# <34> FBD_EDC3 AJ4 N9 FBD_WCKB45 <35>
FBC_DQS_WP4 FBC_WCK67 FBC_WCK67 <34> FBD_DQS_WP3 FBD_WCKB45 FBD_WCKB45# <35>
FBC_EDC5 C32 J25 FBD_EDC4 P4 Y10
FBC_DQS_WP5 FBC_WCK67 FBC_WCK67# <34> FBD_DQS_WP4 FBD_WCK67 FBD_WCK67 <35>
FBC_EDC6 D19 J26 FBD_EDC5 L4 Y9 +FBVDDQ
FBC_EDC7
FBC_DQS_WP6 FBC_WCKB67 FBC_WCKB67 <34> FBD_EDC6
FBD_DQS_WP5 FBD_WCK67 FBD_WCK67# <35> CKE_A
D25 FBC_DQS_WP7 FBC_WCKB67 K26 Y4 FBD_DQS_WP6 FBD_WCKB67 W9
FBC_WCKB67# <34> FBD_EDC7 FBD_WCKB67 <35>
U4 FBD_DQS_WP7 FBD_WCKB67 W10
FBD_WCKB67# <35> FBD_CMD14 2 VGA@ 1
BP32 GND RV527 10K_0402_5%
BP34 +FBVDDQ BP48 FBD_CMD44 2 VGA@ 1
A
GND CKE_A GND A
BP36 GND BR1 GND RV107 10K_0402_5%
BP38 GND BR12 GND CKE_B
BP40 +FB_PLLVDD FBC_CMD14 2 VGA@ 1 BR15 +FB_PLLVDD
GND GND
BP42 RV522 10K_0402_5% BR18 FBD_CMD17 2 VGA@ 1
GND GND
BP44 FBC_CMD44 2 VGA@ 1 BR2 RV525 10K_0402_5%
GND GND
BP46 L35 RV521 10K_0402_5% BR21 FBD_CMD41 2 VGA@ 1
GND FB_PLLVDD GND
CKE_B BR24 GND FB_PLLVDD T46 RV524 10K_0402_5%
CV168
FBC_CMD17 2 VGA@ 1 RESET

CV169
1
1U_0201_6.3V6M
RV100 10K_0402_5% 1
1U_0201_6.3V6M
FBC_CMD41 2 VGA@ 1 FBD_CMD3 2 VGA@ 1

RV99 10K_0402_5% RV526 10K_0402_5%
VGA@
2 FBD_CMD31 2 VGA@ 1
VGA@
2 RV528 10K_0402_5%
RESET
@
FBC_CMD3 2 VGA@ 1
@
RV102 10K_0402_5%
FBC_CMD31 2 VGA@ 1
RV523 10K_0402_5%

GN20E MEM-AB 3/
5 4 3 2 1
5 4 3 2 1
+1.8VSDGPU_AON
+1.8VSDGPU_AON
6WUDS熅 6WUDS熄 6WUDS熃
9HQGRU 59熆熈59熆熉 59熆熆59熆熇 59熆熄59熆熅 3DUW1XPEHU UV1W
2
100K_0402_1%
100K_0402_1%
100K_0402_1%
100K_0402_1%
100K_0402_1%
100K_0402_1%
GN20-E7
6DPVXQJ 6$熃熃熃熃&熉熅熋熃 BGA2714
熃[熃熃59熆熉熃59熆熇熃59熆熅熅熈熉0熆熅.熇=熋熃熆熅熈%&+&熄熇 @ @ @ VGA@ @ @ COMMON
2
RV31 RV33 RV35 RV37 RV39 RV41 14/24 MISC 2
+\QL[ 6$熃熃熃熃'8:熅熃
熃[熅熃59熆熉熄59熆熆熃59熆熅熅熈熉0熆熅+熈熉&熋+熅熇$,56熅&
@ @ VGA@
1
RV50 RV52 RV54
0LFURQ STRAP0 BM5 STRAP0 ROM_CS BP7 ROM_CS# 100K_0402_1% 10K_0402_5% 100K_0402_1%
6$熃熃熃熃%1'熋熃
熃[熄熃59熆熉熃59熆熇熄59熆熄 07熉熄.熅熈熉0熆熅-(熄熇$ STRAP1 BN5 STRAP1
1
D D
STRAP2 BP4 STRAP2 ROM_SI BR7 ROM_SI
STRAP3 BP3 STRAP3 ROM_SO BT8 ROM_SO
STRAP4 BR3 STRAP4 ROM_SCLK BT7 ROM_SCLK
STRAP5 BR4 STRAP5
2
100K_0402_1%
100K_0402_1%
100K_0402_1%
100K_0402_1%
100K_0402_1%
100K_0402_1%
2
X76@ X76@ X76@ @ VGA@ VGA@ VGA@ VGA@ @
RV32 RV34 RV36 RV38 RV40 RV42 RV51 RV53 RV55
100K_0402_1% 10K_0402_5% 100K_0402_1%
1
STRAP[0~2]
VRAM CFG
@
STRAP[3~5]
SMB ALT_ADDR
DEVID_SEL
PCIE_CFG
VGA_DEVICE
C C
+1.8VSDGPU_AON
+1.8VSDGPU_AON
UV1X
1
GN20-E7
BGA2714 VGA@ VGA@ 1 VGA@
+1.8VSDGPU_AON +GPU_PLLVDD COMMON
RV62 RV520 CV176
Change to Reserve 13/24 XTAL/PLL VGA@ 10K_0402_5% 10K_0402_5% 0.1U_0201_10V6K
VGA@ RV60
2
LV1 1 2 BG22 33_0402_5% UV2 2 VGA@
SP_PLLVDD
TAI-TECH HCB1608KF-330T30 ROM_CS# 1 2 ROM_CS_R# 1 8 RV63
ROM_SO 0_0402_5% 1 VGA@ 2 RV61 ROM_SO_R CS# VCC
CV174
1CV175
CV171
CV170
BG25 2 7
1U_0201_6.3V6M
1U_0201_6.3V6M
33_0402_5%
4.7U_0402_6.3V6M
SM01000I200 VID_PLLVDD DO(IO1) HOLD#(IO3)

ROM_WP#_R 3 6 ROM_SCLK_R 1 2 ROM_SCLK
22U_0603_6.3V6M
1 1 <26> ROM_WP#_R W P#(IO2) CLK

SM01000JX00 1 4 5 ROM_SI_R 1 2 ROM_SI
GND DI(IO0)
1
3000ma 33ohm@100mhz DCR 0.04
@
VGA@
Check if use WP @ W25Q16JWSSIQ_SO8 RV64

2 2
VGA@
RV119 VGA@ 33_0402_5%

VGA@ 2
2 10K_0402_5% VGA@
2
B BF9 GPCADC_AVDD B
P/N: SA0000DHJ00
CV172
CV173
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1
BF25 CORE_PLL_AVDD
+1.8VSDGPU_AON
VGA@
VGA@
2 2
@
RV66
100K_0402_1%
1
EXT_REFCLK_FL BK8 EXT_REFCLK_FL XTALOUTBUFF BP5 XTALOUTBUFF

1
10K_0402_5%
BT5 XTALIN XTALOUT BR5

1
1
10K_0402_5%
RV506 @
@ RV65 RV67
VGA@ 100K_0402_1%
2
@
2
2
18P_0402_50V8J
XTALIN RV503 1 @ 2 XTALOUT_R

CV640
10M_0402_5% NV suggest floating

@
1
RV502 VGA@
A VGA@ 330_0402_1% A
YV1
27MHZ_10PF_XRCGB27M000F2P18R0
2
NV suggest PD 10k 1 3 XTALOUT

1 3
1 NC NC 2
CV638 CV639
15P_0201_50V8J 2 4 15P_0201_50V8J Security Classification Compal Secret Data Compal Electronics, Inc.
2 VGA@ 1 2020/11/16 2021/11/16 Title
VGA@ Issued Date Deciphered Date
GN20E RON/XTAL 4/
5 4 3 2 1
5 4 3 2 1
UV1R
GN20-E7
BGA2714
COMMON
7/24 IFPAB
DL-DVI DVI/HDMI DP
IFPA_AUX BT10 DP0_AUXN

SDA SDA
BT11 DP0_AUXP DP0_AUXN <39> DP0_AUXN
IFPA_AUX RV28 1 DP@ 2 100K_0402_5%
SCL SCL DP0_AUXP <39>
DP0_AUXP RV29 1 DP@ 2 100K_0402_5%
IFPA_L3 BR20 DP0_TXN3
D IFPAB_RSET TXC TXC DP0_TXP3 DP0_TXN3 <39> D
RV25 2 VGA@ 1 BH23 IFPAB_RSET IFPA_L3 BP20
DP0_TXP3 <39>
TXC TXC
1K_0402_1%
+GPU_PLLVDD IFPA_L2 BP22 DP0_TXN2
TXD0 TXD0
DP0_TXP2 DP0_TXN2 <39>
TXD0 TXD0 IFPA_L2 BR22 DP0_TXP2 <39>
NV BH22 IFPAB_PLLVDD
suggest
BT22 DP0_TXN1
CV116
IFPA_L1
1U_0201_6.3V6M
TXD1 TXD1 DP0_TXP1 DP0_TXN1 <39>
IFPA_L1 BT23
TXD1 TXD1 DP0_TXP1 <39>
1
IFPA_L0 BR23 DP0_TXN0

TXD2 TXD2
DP0_TXP0 DP0_TXN0 <39>
VGA@ TXD2 TXD2 IFPA_L0 BP23 DP0_TXP0 <39>
2
IFPB_AUX BR11
SDA
SCL IFPB_AUX BP11
+PEX_VDD +IFP_IOVDD
UV1U
IFPB_L3 BL22
TXC GN20-E7
RV24 1 VGA@ 2 BF14 IFP_IOVDD IFPB_L3 BM22 BGA2714
TXC
0_0603_5% BF13 IFP_IOVDD COMMON
10/24 IFPE
BF16 BK22
VGA@ CV104
VGA@ CV101
VGA@ CV102
VGA@ CV103
1 1 1 1 IFP_IOVDD IFPB_L2
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
4.7U_0402_6.3V6M
TXD3 TXD0 DVI/HDMI DP

BF17 IFP_IOVDD TXD3 TXD0 IFPB_L2 BJ22
RV27 2 VGA@ 1 IFPEF_RSET BH17 IFPEF_RSET IFPE_AUX BJ11

SDA
2 2 2 2 BK23 1K_0402_1% BK11
TXD4 TXD1 IFPB_L1 SCL IFPE_AUX
TXD4 TXD1 IFPB_L1 BL23
+GPU_PLLVDD
IFPE_L3 BL13
TXC
TXD5 TXD2 IFPB_L0 BK25 BH16 IFPEF_PLLVDD IFPE_L3 BM13
TXC
TXD5 TXD2 IFPB_L0 BJ25
Near GPU Close GPU BK13
CV118
C IFPE_L2 C
1U_0201_6.3V6M
TXD0
IFPAB 1 TXD0 IFPE_L2 BJ13
NV
suggest TXD1 IFPE_L1 BK14
BL14
@
VGA@
TXD1 IFPE_L1
2 IFPE
TXD2 IFPE_L0 BL16
TXD2 IFPE_L0 BM16
UV1S
GN20-E7
+IFP_IOVDD
BGA2714
COMMON
BG13 IFP_IOVDD
8/24 IFPC BG14 IFP_IOVDD
BG23
VGA@ CV111
1 IFP_IOVDD
1U_0201_6.3V6M
RV26 2 VGA@ 1 IFPCD_RSET BH20 IFPCD_RSET
1K_0402_1% DVI/HDMI DP
+GPU_PLLVDD
@
2
BH19 IFPCD_PLLVDD IFPC_AUX BM10 GPU_HDMI_CTRL_DAT
SDA
BL10 GPU_HDMI_CTRL_CLK GPU_HDMI_CTRL_DAT <40>
SCL IFPC_AUX GPU_HDMI_CTRL_CLK <40>
CV117
1U_0201_6.3V6M
NV
suggest 1 IFPC_L3 BK17 GPU_HDMI_CLKN Under GPU
TXC GPU_HDMI_CLKN <40>
IFPC_L3 BL17 GPU_HDMI_CLKP
TXC GPU_HDMI_CLKP <40>
BL19 GPU_HDMI_N0
VGA@
TXD0 IFPC_L2 GPU_HDMI_N0 <40>

2 BM19 GPU_HDMI_P0
TXD0 IFPC_L2 GPU_HDMI_P0 <40> UV1V
IFPC IFPC_L1 BK19 GPU_HDMI_N1
GN20-E7
BGA2714
TXD1 GPU_HDMI_N1 <40>
IFPC_L1 BJ19 GPU_HDMI_P1 COMMON
TXD1 GPU_HDMI_P1 <40>
6/24 IFPF
IFPC_L0 BK20 GPU_HDMI_N2
+IFP_IOVDD TXD2 GPU_HDMI_P2 GPU_HDMI_N2 <40>
TXD2 IFPC_L0 BL20
GPU_HDMI_P2 <40>
DVI/HDMI DP
BF19 IFP_IOVDD
BF20 IFP_IOVDD IFPF_AUX BK10
SDA
IFPF_AUX BJ10
B SCL B
VGA@ CV108
VGA@ CV105
VGA@ CV106
VGA@ CV107
1 1 1 1
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
4.7U_0402_6.3V6M
IFPF_L3 BP13
TXC
IFPF_L3 BR13
2 2 2 2 TXC
UV1T
GN20-E7 IFPF_L2 BT13
TXD0
BGA2714 IFPF_L2 BT14
COMMON TXD0
9/24 IFPD
IFPF BR14
TXD1 IFPF_L1
+IFP_IOVDD IFPF_L1 BP14
TXD1
Near GPU Close GPU
DVI/HDMI DP IFPF_L0 BP16
TXD2
IFPF_L0 BR16
TXD2
BG19 IFP_IOVDD
IFPD_AUX BL11 BG20 IFP_IOVDD
SDA
IFPD_AUX BM11 BG16 IFP_IOVDD
SCL
BG17
VGA@ CV115
VGA@ CV112
VGA@ CV113
VGA@ CV114
1 1 1 1 IFP_IOVDD
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
4.7U_0402_6.3V6M
TXC IFPD_L3 BT16

BT17
@
TXC IFPD_L3
2 2 2 2
TXD0 IFPD_L2 BR17
TXD0 IFPD_L2 BP17
IFPD IFPD_L1 BP19
TXD1
TXD1 IFPD_L1 BR19
Near GPU Close GPU
TXD2 IFPD_L0 BT19
TXD2 IFPD_L0 BT20
+IFP_IOVDD
BF22 IFP_IOVDD
BF23 IFP_IOVDD
VGA@ CV109
VGA@ CV110
1 1
1U_0201_6.3V6M
1U_0201_6.3V6M
A 2 2 A
Near GPU Under GPU

GN20E DISP 6/
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
5 4 3 2 1
5 4 3 2 1
UV1F UV1G UV1H UV1I UV1J

GN20-E7 GN20-E7 GN20-E7 GN20-E7 GN20-E7 UV1K
BGA2714 BGA2714 BGA2714 BGA2714 BGA2714
COMMON COMMON COMMON COMMON COMMON GN20-E7
BGA2714
COMMON
15/24 GND_1/5 16/24 GND_2/5 21/24 GND_3/5 24/24 GND_5/5 23/24 GND_4/5
11/24 XVDD
A2 GND GND AE35 AK8 GND GND AR42 B39 GND GND BE6 H7 GND GND R41 BR6 GND GND F30
A3 GND GND AE36 AL13 GND GND AR43 B41 GND GND BE8 H9 GND GND R42 BR9 GND GND F33 CONFIGURABLE
A54 GND GND AE37 AL14 GND GND AR44 B42 GND GND BF52 J10 GND GND R43 BT2 GND GND F36 +NVVDD1 POWER CHANNELS
A55 GND GND AE38 AL15 GND GND AR5 B44 GND GND BF54 J17 GND GND R44 BT3 GND GND F39 (NC on substrate) +NVVDD1
AA10 GND GND AE39 AL16 GND GND AR50 B45 GND GND BG12 J20 GND GND R47 C1 GND GND F4
AA13 GND GND AE40 AL17 GND GND AR8 B47 GND GND BG15 J29 GND GND R49 C10 GND GND F42
AA14 GND GND AE41 AL18 GND GND AT10 B48 GND GND BG18 J35 GND GND R51 C13 GND GND F45
AA15 GND GND AE42 AL19 GND GND AT2 B51 GND GND BG21 J4 GND GND R53 C16 GND GND F47 AY1 XVDD_1 XVDD_88 BT52
AA16 GND GND AE43 AL2 GND GND AT4 B55 GND GND BG24 J49 GND GND R55 C19 GND GND F48 AY2 XVDD_2 XVDD_89 BR52
AA17 GND GND AE44 AL20 GND GND AT47 B56 GND GND BG30 J51 GND GND R6 C22 GND GND F51 AY3 XVDD_3 XVDD_90 BN50
AA18 GND GND AE49 AL21 GND GND AT49 B6 GND GND BG33 J53 GND GND R8 C25 GND GND F53 AY4 XVDD_4 XVDD_91 BM49
AA19 GND GND AE52 AL22 GND GND AT51 B8 GND GND BG36 J55 GND GND T2 C28 GND GND F55 AY5 XVDD_5 XVDD_92 BL48
D D
AA2 GND GND AE54 AL23 GND GND AT53 B9 GND GND BG39 J6 GND GND T49 C31 GND GND F6 AY6 XVDD_6 XVDD_93 BK47
AA20 GND GND AE7 AL24 GND GND AT55 BA14 GND GND BG42 J8 GND GND T52 C34 GND GND F9 AY7 XVDD_7 XVDD_94 BJ46
AA21 GND GND AE9 AL25 GND GND AT6 BA15 GND GND BG49 K12 GND GND T54 C37 GND GND G11 AY8 XVDD_8
AA22 GND GND AF10 AL26 GND GND AT8 BA16 GND GND BG55 K15 GND GND T7 C4 GND GND G14 AY9 XVDD_9
AA23 GND GND AF3 AL27 GND GND AU14 BA17 GND GND BH2 K18 GND GND T9 C40 GND GND G17 AY10 XVDD_10 XVDD_95
BT54
AA24 GND GND AF48 AL28 GND GND AU15 BA18 GND GND BH4 K19 GND GND U10 C43 GND GND G20 AY11 XVDD_11 XVDD_96 BR53
AA25 GND GND AF5 AL29 GND GND AU16 BA19 GND GND BH51 K21 GND GND U13 C46 GND GND G23 XVDD_97 BP52
AA26 GND GND AF50 AL30 GND GND AU17 BA20 GND GND BH53 K24 GND GND U14 C56 GND GND G26 XVDD_98 BN51
AA27 GND GND AF55 AL31 GND GND AU18 BA21 GND GND BH55 K27 GND GND U15 C7 GND GND G29 BA1 XVDD_12 XVDD_99 BM50
AA28 GND GND AF8 AL32 GND GND AU19 BA22 GND GND BH6 K28 GND GND U16 D12 GND GND G32 BA2 XVDD_13 XVDD_100 BL49
AA29 GND GND AG10 AL33 GND GND AU2 BA23 GND GND BH8 K30 GND GND U17 D15 GND GND G35 BA3 XVDD_14 XVDD_101 BJ47
AA30 GND GND AG13 AL34 GND GND AU20 BA24 GND GND BJ12 K33 GND GND U18 D18 GND GND G38 BA4 XVDD_15 XVDD_102 BH46
AA31 GND GND AG14 AL35 GND GND AU21 BA25 GND GND BJ14 K36 GND GND U19 D21 GND GND G4 BA5 XVDD_16 XVDD_103 BG45
AA32 GND GND AG15 AL36 GND GND AU22 BA26 GND GND BJ15 K37 GND GND U20 D24 GND GND G41 BA6 XVDD_17 XVDD_104 BF44
AA33 GND GND AG16 AL37 GND GND AU23 BA27 GND GND BJ17 K39 GND GND U21 D27 GND GND G44 BA7 XVDD_18
AA34 GND GND AG17 AL38 GND GND AU24 BA28 GND GND BJ18 K42 GND GND U22 D30 GND GND G49 BA8 XVDD_19
AA35 GND GND AG18 AL39 GND GND AU25 BA29 GND GND BJ20 K45 GND GND U23 D33 GND GND G52 BA9 XVDD_20 XVDD_105 BT55
AA36 GND GND AG19 AL40 GND GND AU26 BA30 GND GND BJ21 K49 GND GND U24 D36 GND GND G54 BA10 XVDD_21 XVDD_106 BR54
AA37 GND GND AG2 AL41 GND GND AU27 BA31 GND GND BJ23 K52 GND GND U25 D39 GND GND G8 BA11 XVDD_22 XVDD_107 BP53
AA38 GND GND AG20 AL42 GND GND AU28 BA32 GND GND BJ24 K54 GND GND U26 D4 GND GND H10 XVDD_108 BN52
AA39 GND GND AG21 AL43 GND GND AU29 BA33 GND GND BJ31 K7 GND GND U27 D42 GND GND H12 XVDD_109 BL50
AA4 GND GND AG22 AL44 GND GND AU30 BA34 GND GND BJ33 K9 GND GND U28 D45 GND GND H13 BB2 XVDD_23 XVDD_110 BK49
AA40 GND GND AG23 AL49 GND GND AU31 BA35 GND GND BJ35 L10 GND GND U29 D48 GND GND H15 BB4 XVDD_24 XVDD_111 BJ48
AA41 GND GND AG24 AL52 GND GND AU32 BA36 GND GND BJ37 L3 GND GND U3 D49 GND GND H16 BB6 XVDD_25 XVDD_112 BH47
AA42 GND GND AG25 AL54 GND GND AU33 BA37 GND GND BJ39 L5 GND GND U30 D51 GND GND H18 BB8 XVDD_26 XVDD_113 BG46
AA43 GND GND AG26 AL7 GND GND AU34 BA38 GND GND BJ41 L50 GND GND U31 D53 GND GND H19 BB10 XVDD_27
AA44 GND GND AG27 AL9 GND GND AU35 BA39 GND GND BJ43 L55 GND GND U32 D6 GND GND H21
AA47 GND GND AG28 AM10 GND GND AU36 BA40 GND GND BJ45 L8 GND GND U33 D9 GND GND H22 XVDD_114 BR55
AA49 GND GND AG29 AM3 GND GND AU37 BA41 GND GND BJ53 M10 GND GND U34 E10 GND GND H24 BC1 XVDD_28 XVDD_115 BP54
AA51 GND GND AG30 AM48 GND GND AU38 BA42 GND GND BJ9 M2 GND GND U35 E13 GND GND H25 BC2 XVDD_29 XVDD_116 BN53
AA53 GND GND AG31 AM5 GND GND AU39 BA43 GND GND BK31 M4 GND GND U36 E16 GND GND H27 BC3 XVDD_30 XVDD_117 BM52
AA55 GND GND AG32 AM50 GND GND AU40 BA50 GND GND BK33 M47 GND GND U37 E19 GND GND H28 BC4 XVDD_31 XVDD_118 BL51
AA6 GND GND AG33 AM55 GND GND AU41 BA55 GND GND BK35 M49 GND GND U38 E2 GND GND H3 BC5 XVDD_32 XVDD_119 BK50
AA8 GND GND AG34 AM8 GND GND AU42 BB47 GND GND BK37 M51 GND GND U39 E22 GND GND H30 BC6 XVDD_33 XVDD_120 BJ49
AB47 GND GND AG35 AN10 GND GND AU43 BB49 GND GND BK39 M53 GND GND U40 E25 GND GND H32 BC7 XVDD_34 XVDD_121 BG47
AB49 GND GND AG36 AN13 GND GND AU49 BB51 GND GND BK41 M55 GND GND U41 E28 GND GND H33 BC8 XVDD_35 XVDD_122 BF46
AB52 GND GND AG37 AN14 GND GND AU52 BB53 GND GND BK43 M6 GND GND U42 E31 GND GND H34 BC9 XVDD_36
C AB54 GND GND AG38 AN15 GND GND AU54 BB55 GND GND BK45 M8 GND GND U43 E34 GND GND H36 BC10 XVDD_37 C
AB7 GND GND AG39 AN16 GND GND AU7 BC14 GND GND BK54 N14 GND GND U44 E37 GND GND H37 BC11 XVDD_38 XVDD_123 BR56
AC13 GND GND AG4 AN17 GND GND AU9 BC15 GND GND BL12 N16 GND GND U48 E40 GND GND H39 XVDD_124 BP55
AC14 GND GND AG40 AN18 GND GND AV10 BC16 GND GND BL15 N18 GND GND U5 E43 GND GND H4 XVDD_125 BN54
AC15 GND GND AG41 AN19 GND GND AV3 BC17 GND GND BL18 N2 GND GND U50 E5 GND GND H40 BD1 XVDD_39 XVDD_126 BM53
AC16 GND GND AG42 AN2 GND GND AV5 BC18 GND GND BL2 N20 GND GND U55 E52 GND GND H42 BD2 XVDD_40 XVDD_127 BK51
AC17 GND GND AG43 AN20 GND GND AV50 BC19 GND GND BL21 N22 GND GND U8 E7 GND GND H43 BD3 XVDD_41 XVDD_128 BJ50
AC18 GND GND AG44 AN21 GND GND AV8 BC20 GND GND BL24 N24 GND GND V10 F1 GND GND H45 BD4 XVDD_42 XVDD_129 BH49
AC19 GND GND AG47 AN22 GND GND AW10 BC21 GND GND BL30 N26 GND GND V2 F12 GND GND H46 BD5 XVDD_43 XVDD_130 BG48
AC20 GND GND AG49 AN23 GND GND AW14 BC22 GND GND BL32 N28 GND GND V4 F15 GND GND H47 BD6 XVDD_44 XVDD_131 BF47
AC21 GND GND AG51 AN24 GND GND AW15 BC23 GND GND BL34 N29 GND GND V47 F18 GND GND H48 BD7 XVDD_45
AC22 GND GND AG53 AN25 GND GND AW16 BC24 GND GND BL36 N31 GND GND V49 F2 GND GND H50 BD8 XVDD_46
AC23 GND GND AG55 AN26 GND GND AW17 BC25 GND GND BL38 N33 GND GND V51 F21 GND GND H55 BD9 XVDD_47 XVDD_132 BP56
AC24 GND GND AG6 AN27 GND GND AW18 BC26 GND GND BL4 N35 GND GND V53 F24 GND GND H6 BD10 XVDD_48 XVDD_133 BN55
AC25 GND GND AG8 AN28 GND GND AW19 BC27 GND GND BL40 N37 GND GND V55 F27 GND BD11 XVDD_49 XVDD_134 BM54
AC26 GND GND AH2 AN29 GND GND AW2 BC28 GND GND BL42 N39 GND GND V6 XVDD_135 BL53
AC27 GND GND AH47 AN30 GND GND AW20 BC29 GND GND BL44 N41 GND GND V8 +PEX_VDD XVDD_136 BK52
AC28 GND GND AH49 AN31 GND GND AW21 BC30 GND GND BL46 N43 GND GND W13 @ XVDD_137 BJ51
AC29 GND GND AH52 AN32 GND GND AW22 BC31 GND GND BL55 N48 GND GND W14 XVDD_138 BF48
AC3 GND GND AH54 AN33 GND GND AW23 BC32 GND GND BL6 N52 GND GND W15 BT26 XVDD_50 XVDD_139 BE47
AC30 GND GND AH7 AN34 GND GND AW24 BC33 GND GND BL9 N54 GND GND W16 BR26 XVDD_51 XVDD_140 BD46
AC31 GND GND AJ13 AN35 GND GND AW25 BC34 GND GND BM14 N7 GND GND W17 BP26 XVDD_52
AC32 GND GND AJ14 AN36 GND GND AW26 BC35 GND GND BM17 P3 GND GND W18 BN26 XVDD_53
AC33 GND GND AJ15 AN37 GND GND AW27 BC36 GND GND BM20 P5 GND GND W19 BM26 XVDD_54
AC34 GND GND AJ16 AN38 GND GND AW28 BC37 GND GND BM23 P50 GND GND W20 BL26 XVDD_55
AC35 GND GND AJ17 AN39 GND GND AW29 BC38 GND GND BM30 P55 GND GND W21 BK26 XVDD_56
AC36 GND GND AJ18 AN4 GND GND AW30 BC39 GND GND BM32 P8 GND GND W22 BJ26 XVDD_57
AC37 GND GND AJ19 AN40 GND GND AW31 BC40 GND GND BM34 R10 GND GND W23 BH26 XVDD_58
AC38 GND GND AJ20 AN41 GND GND AW32 BC41 GND GND BM36 R13 GND GND W24 BG26 XVDD_59
AC39 GND GND AJ21 AN42 GND GND AW33 BC42 GND GND BM38 R14 GND GND W25 BF26 XVDD_60
AC40 GND GND AJ22 AN43 GND GND AW34 BC43 GND GND BM40 R15 GND GND W26
AC41 GND GND AJ23 AN44 GND GND AW35 BC49 GND GND BM42 R16 GND GND W27
AC42 GND GND AJ24 AN47 GND GND AW36 BC52 GND GND BM44 R17 GND GND W28 BR27 XVDD_61
AC43 GND GND AJ25 AN49 GND GND AW37 BC54 GND GND BM46 R18 GND GND W29 BN27 XVDD_62
AC44 GND GND AJ26 AN51 GND GND AW38 BD15 GND GND BM48 R19 GND GND W30 BL27 XVDD_63
AC5 GND GND AJ27 AN53 GND GND AW39 BD16 GND GND BN10 R2 GND GND W31 BJ27 XVDD_64
AC50 GND GND AJ28 AN55 GND GND AW4 BD19 GND GND BN11 R20 GND GND W32 BG27 XVDD_65
AC55 GND GND AJ29 AN6 GND GND AW40 BD20 GND GND BN12 R21 GND GND W33
B B
AC8 GND GND AJ3 AN8 GND GND AW41 BD23 GND GND BN13 R22 GND GND W34
AD10 GND GND AJ30 AP2 GND GND AW42 BD24 GND GND BN14 R23 GND GND W35 BT28 XVDD_66
AD2 GND GND AJ31 AP49 GND GND AW43 BD27 GND GND BN15 R24 GND GND W36 BR28 XVDD_67
AD4 GND GND AJ32 AP52 GND GND AW47 BD30 GND GND BN16 R25 GND GND W37 BP28 XVDD_68
AD47 GND GND AJ33 AP54 GND GND AW49 BD33 GND GND BN17 R26 GND GND W38 BN28 XVDD_69
AD49 GND GND AJ34 AP7 GND GND AW51 BD34 GND GND BN18 R27 GND GND W39 BM28 XVDD_70
AD51 GND GND AJ35 AR13 GND GND AW53 BD37 GND GND BN19 R28 GND GND W40 BL28 XVDD_71
AD53 GND GND AJ36 AR14 GND GND AW55 BD38 GND GND BN20 R29 GND GND W41 BK28 XVDD_72
AD55 GND GND AJ37 AR15 GND GND AW6 BD41 GND GND BN21 R30 GND GND W42 BJ28 XVDD_73
AD6 GND GND AJ38 AR16 GND GND AW8 BD42 GND GND BN22 R31 GND GND W43 BH28 XVDD_74
AD8 GND GND AJ39 AR17 GND GND AY47 BD48 GND GND BN23 R32 GND GND W44 BG28 XVDD_75
AE13 GND GND AJ40 AR18 GND GND AY49 BD50 GND GND BN24 R33 GND GND W52 BF28 XVDD_76
AE14 GND GND AJ41 AR19 GND GND AY52 BD55 GND GND BN30 R34 GND GND W54
AE15 GND GND AJ42 AR20 GND GND AY54 BE10 GND GND BN31 R35 GND GND W7
AE16 GND GND AJ43 AR21 GND GND B1 BE2 GND GND BN32 R36 GND GND Y3 BT29 XVDD_77
AE17 GND GND AJ44 AR22 GND GND B11 BE4 GND GND BN33 R37 GND GND Y48 BR29 XVDD_78
AE18 GND GND AJ5 AR23 GND GND B12 BE49 GND GND BN34 R38 GND GND Y5 BP29 XVDD_79
AE19 GND GND AJ50 AR24 GND GND B14 BE51 GND GND BN35 R39 GND GND Y50 BN29 XVDD_80
AE2 GND GND AJ55 AR25 GND GND B15 BE53 GND GND BN36 R4 GND GND Y55 BM29 XVDD_81
AE20 GND GND AJ8 AR26 GND GND B17 BE55 GND GND BR30 R40 GND GND Y8 BL29 XVDD_82
AE21 GND GND AK10 AR27 GND GND B18 BK29 XVDD_83
AE22 GND GND AK2 AR28 GND GND B2 BJ29 XVDD_84
AE23 GND GND AK4 AR29 GND GND B21 @ @ BH29 XVDD_85
AE24 GND GND AK47 AR3 GND GND B24 BG29 XVDD_86
AE25 GND GND AK49 AR30 GND GND B26 BF29 XVDD_87
AE26 GND GND AK51 AR31 GND GND B27
AE29 GND GND AK6 AR34 GND GND B32 @
AE30 GND GND B38 AR35 GND GND B33
AE31 GND GND BH13 AR36 GND GND B35
AE32 GND AR37 GND GND B36
AE33 GND AR38 GND GND AR40
AE34 GND AR39 GND GND AR41
@ @
A A

GN20E PWR 7/
5 4 3 2 1
5 4 3 2 1
UV1M UV1N UV1P

GN20-E7 GN20-E7
+FBVDDQ GN20-E7
+FBVDDQ
+NVVDD1 BGA2714 +NVVDD1 +NVVDD1 BGA2714 +NVVDD1 BGA2714
COMMON COMMON COMMON
UV1L
+NVVDD1 GN20-E7 17/24 VDD_1/2 18/24 VDD_2/2 19/24 FBVDDQ
BGA2714 +NVVDD1
COMMON AB14 AF29 AK38 AP39 AB11 L19
VDD VDD VDD VDD FBVDDQ FBVDDQ
22/24 VDDMS AB15 VDD VDD AF30 AK39 VDD VDD AP40 AB46 FBVDDQ FBVDDQ L20
AB16 VDD VDD AF31 AK40 VDD VDD AP41 AC11 FBVDDQ FBVDDQ L22
AY27 VDDMS VDDMS AB13 AB17 VDD VDD AF32 AK41 VDD VDD AP42 AE46 FBVDDQ FBVDDQ L23
AY28 VDDMS VDDMS AB44 AB18 VDD VDD AF33 AK42 VDD VDD AP43 AF11 FBVDDQ FBVDDQ L25
AY29 VDDMS VDDMS AD13 AB19 VDD VDD AF34 AK43 VDD VDD P14 AF46 FBVDDQ FBVDDQ L26
AY30 VDDMS VDDMS AD44 AB20 VDD VDD AF35 AM14 VDD VDD P15 AH11 FBVDDQ FBVDDQ L28
AY31 VDDMS VDDMS AF13 AB21 VDD VDD AF36 AM15 VDD VDD P16 AH46 FBVDDQ FBVDDQ L29
AY32 VDDMS VDDMS AF44 AB22 VDD VDD AF37 AM16 VDD VDD P17 AJ11 FBVDDQ FBVDDQ L31
AY33 VDDMS VDDMS AH13 AB23 VDD VDD AF38 AM17 VDD VDD P18 AJ46 FBVDDQ FBVDDQ L32
D AY34 VDDMS VDDMS AH44 AB24 VDD VDD AF39 AM18 VDD VDD P19 AL11 FBVDDQ FBVDDQ L34 D
AY35 VDDMS VDDMS AK13 AB25 VDD VDD AF40 AM19 VDD VDD P20 AL46 FBVDDQ FBVDDQ L37
AY36 VDDMS VDDMS AK44 AB26 VDD VDD AF41 AM20 VDD VDD P21 AM11 FBVDDQ FBVDDQ L38
AY37 VDDMS VDDMS AM13 AB27 VDD VDD AF42 AM21 VDD VDD P22 AM46 FBVDDQ FBVDDQ L40
AY38 VDDMS VDDMS AM44 AB28 VDD VDD AF43 AM22 VDD VDD P23 AP11 FBVDDQ FBVDDQ L41
AY39 VDDMS VDDMS AP13 AB29 VDD VDD AH14 AM23 VDD VDD P24 AR11 FBVDDQ FBVDDQ L43
AY40 VDDMS VDDMS AP44 AB30 VDD VDD AH15 AM24 VDD VDD P25 AR46 FBVDDQ FBVDDQ L44
AY41 VDDMS VDDMS AT13 AB31 VDD VDD AH16 AM25 VDD VDD P26 AU11 FBVDDQ FBVDDQ L46
AY42 VDDMS VDDMS AT14 AB32 VDD VDD AH17 AM26 VDD VDD P27 AU46 FBVDDQ FBVDDQ N11
AY43 VDDMS VDDMS AT15 AB33 VDD VDD AH18 AM27 VDD VDD P28 AV11 FBVDDQ FBVDDQ N46
AY44 VDDMS VDDMS AT16 AB34 VDD VDD AH19 AM28 VDD VDD P29 AV46 FBVDDQ FBVDDQ P11
BA13 VDDMS VDDMS AT17 AB35 VDD VDD AH20 AM29 VDD VDD P30 AY46 FBVDDQ FBVDDQ P46
BA44 VDDMS VDDMS AT18 AB36 VDD VDD AH21 AM30 VDD VDD P31 BA46 FBVDDQ FBVDDQ T11
BB13 VDDMS VDDMS AT19 AB37 VDD VDD AH22 AM31 VDD VDD P32 BC46 FBVDDQ FBVDDQ U11
BB14 VDDMS VDDMS AT20 AB38 VDD VDD AH23 AM32 VDD VDD P33 K10 FBVDDQ FBVDDQ U46
BB15 VDDMS VDDMS AT21 AB39 VDD VDD AH24 AM33 VDD VDD P34 L11 FBVDDQ FBVDDQ W11
BB16 VDDMS VDDMS AT22 AB40 VDD VDD AH25 AM34 VDD VDD P35 L13 FBVDDQ FBVDDQ W46
BB17 VDDMS VDDMS AT23 AB41 VDD VDD AH26 AM35 VDD VDD P36 L14 FBVDDQ FBVDDQ Y11
BB18 AT24 AB42 AH27 AM36 P37 L16 Y46 +FBVDDQ
VDDMS VDDMS VDD VDD VDD VDD FBVDDQ FBVDDQ
BB19 VDDMS VDDMS AT25 AB43 VDD VDD AH28 AM37 VDD VDD P38
BB20 VDDMS VDDMS AT26 AD14 VDD VDD AH29 AM38 VDD VDD P39
1
BB23 VDDMS VDDMS AT29 AD17 VDD VDD AH32 AM41 VDD VDD P42 0_0402_5% 0_0402_5% 1 VGA@ 2 RV505 FBVDDQ_GND_SENSE <108>
BB24 VDDMS VDDMS AT30 AD18 VDD VDD AH33 AM42 VDD VDD P43 @ RV209
BB25 VDDMS VDDMS AT31 AD19 VDD VDD AH34 AM43 VDD VDD T14 Place Near GPU
BB26 VDDMS VDDMS AT32 AD20 VDD VDD AH35 AP14 VDD VDD T15
2
BB28 VDDMS VDDMS AT34 AD22 VDD VDD AH37 AP16 VDD VDD T17 FBVDDQ_SENSE E54 FB_VDDQ_SENSE
FB_VDDQ_SENSE <108>
BB32 VDDMS VDDMS AT38 AD26 VDD VDD AH41 AP20 VDD VDD T21 FB_VREF W49 FB_VREF
BB33 VDDMS VDDMS AT39 AD27 VDD VDD AH42 AP21 VDD VDD T22 1
2
3.9P_0402_50V8C
+FBVDDQ
RV534
2.49K_0402_1%
VGA@
BB35 VDDMS VDDMS AT41 AD29 VDD VDD AK14 AP23 VDD VDD T24
CV628
BB36 VDDMS VDDMS AT42 AD30 VDD VDD AK15 AP24 VDD VDD T25 VGA@
BB37 VDDMS VDDMS AT43 AD31 VDD VDD AK16 AP25 VDD VDD T26 2
BB38 VDDMS VDDMS AT44 AD32 VDD VDD AK17 AP26 VDD VDD T27 FB_CAL_PD_VDDQ W47 FBCAL_VDDQ RV461 1 VGA@ 2 40.2_0402_1%
1
BB39 VDDMS VDDMS AU13 AD33 VDD VDD AK18 AP27 VDD VDD T28
BB40 VDDMS VDDMS AU44 AD34 VDD VDD AK19 AP28 VDD VDD Y34 FB_CAL_PU_GND Y47 FBCAL_GND RV459 1 VGA@ 2 40.2_0402_1%
BB41 VDDMS VDDMS AV13 AD35 VDD VDD AK20 AP29 VDD VDD Y35
BB42 VDDMS VDDMS AV14 AD36 VDD VDD AK21 AP30 VDD VDD Y36 FB_CALTERM_GND W48 FBCAL_TERM RV460 1 VGA@ 2 40.2_0402_1%
C BB43 AV15 AD37 AK22 AP31 Y37 C
VDDMS VDDMS VDD VDD VDD VDD
BB44 VDDMS VDDMS AV16 AD38 VDD VDD AK23 AP32 VDD VDD Y38
BC13 AV17 AD39 AK24 AP33 Y39
@
VDDMS VDDMS VDD VDD VDD VDD
BC44 VDDMS VDDMS AV18 AD40 VDD VDD AK25 AP34 VDD VDD Y40
BD13 VDDMS VDDMS AV19 AD41 VDD VDD AK26 AP35 VDD VDD Y41
BD18 VDDMS VDDMS AV22 AF14 VDD VDD AK29 AP38 VDD
BD21 VDDMS VDDMS AV23 AF15 VDD VDD AK30
BD26 AV26 AF18 AK33 BT48 VDD_SENSE RV533 1 VGA@ 2 0_0201_5%
BD28
VDDMS
VDDMS
VDDMS
VDDMS AV27 AF19
VDD
VDD
VDD
VDD AK34
VDD_SENSE
GND_SENSE BR48 GND_SENSE RV532 1 VGA@ 2 0_0201_5%
VCC_SENSE_NVVDD1_MSVDD <103> need check with PWR
VSS_SENSE_NVVDD1_MSVDD <103>
BD32 AV30 AF22 AK37
@
VDDMS VDDMS VDD VDD
BD35 VDDMS VDDMS AV31 AF23 VDD VDD V29
BD44 AV36 AF28 V34 +1.8VSDGPU_AON
VDDMS VDDMS VDD VDD UV1O
N13 VDDMS VDDMS AV37 T29 VDD VDD V35 GN20-E7
N15 VDDMS VDDMS AV38 T30 VDD VDD V36 BGA2714
COMMON
N17 VDDMS VDDMS AV39 T31 VDD VDD V37
N19 VDDMS VDDMS AV40 T32 VDD VDD V38 20/24 NC/1V8
N21 AV41 T33 V39
CV605
VGA@ CV606
CV602
VGA@ CV603
VGA@ CV604
VGA@ CV607
VGA@ CV608
VDDMS VDDMS VDD VDD
N23 AV42 T34 V40 AV1 BF10
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
VDDMS VDDMS VDD VDD NC 1V8 1 1 1 1 1 1 1
N25 VDDMS VDDMS AV43 T35 VDD VDD V41 AV2 NC 1V8 BF11
N27 VDDMS VDDMS AV44 T36 VDD VDD V42 BG9 NC 1V8 BG10
N30 AW13 T37 V43 BH10 BG11
VGA@
VGA@
VDDMS VDDMS VDD VDD NC 1V8
N32 AW44 T38 Y14 BH11 2 2 2 2 2 2 2
VDDMS VDDMS VDD VDD NC
N34 VDDMS VDDMS AY13 T39 VDD VDD Y15 BH14 NC
N36 VDDMS VDDMS AY14 T40 VDD VDD Y16 BJ16 NC
N38 VDDMS VDDMS AY15 T41 VDD VDD Y17 BJ7 NC
N40 VDDMS VDDMS AY16 T42 VDD VDD Y18 BJ8 NC RSVD_1 A4
N42 VDDMS VDDMS AY17 T43 VDD VDD Y19 BK16 NC RSVD_2 A53
N44 AY18 V14 Y20 BN49 BN1
P13
VDDMS
VDDMS
VDDMS
VDDMS AY19 V15
VDD
VDD
VDD
VDD Y21 BP50
NC
NC
RSVD_3
RSVD_4 BN56 Under GPU Near GPU
P44 VDDMS VDDMS AY20 V16 VDD VDD Y22 BR50 NC RSVD_5 BT4
T13 VDDMS VDDMS AY21 V17 VDD VDD Y23 BR51 NC RSVD_6 BT53
T44 VDDMS VDDMS AY22 V18 VDD VDD Y24 BT51 NC RSVD_7 D1
B V13 VDDMS VDDMS AY23 V19 VDD VDD Y25 D50 NC RSVD_8 D56 B
V44 VDDMS VDDMS AY24 V20 VDD VDD Y26 E50 NC
Y13 VDDMS VDDMS AY25 V21 VDD VDD Y27 F50 NC
Y44 AY26 V22 Y28 G50 +1.8VSDGPU_AON
VDDMS VDDMS VDD VDD NC
V23 VDD VDD Y29 G6 NC
V24 VDD VDD Y30 N49 NC FUSE_SRC BH25
V25 VDD VDD Y31
V26 VDD VDD Y32
VDDMS_SENSE BP49 V27 VDD VDD Y33 Connect to 1.8VSDGPU_AON
BR49 V28
@
GNDMS_SENSE VDD
@
VDDMS_SENSE 0_0402_5% 1 @ 2 RV508 VCC_SENSE_NVVDD1_MSVDD +FBVDDQ +FBVDDQ

GNDMS_SENSE 0_0402_5% 1 @ 2 RV509 VSS_SENSE_NVVDD1_MSVDD
CV119
VGA@ CV120
VGA@ CV121
VGA@ CV122
VGA@ CV123
VGA@ CV124
VGA@ CV125
VGA@ CV126
VGA@ CV127
VGA@ CV128
VGA@ CV129
VGA@ CV130
CV151
VGA@ CV152
VGA@ CV153
VGA@ CV154
VGA@ CV155
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
need check with PWR

VGA@
VGA@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
1CV156
1CV157
1CV158
1CV159
1CV160
1CV161
1CV162
1CV163
1CV641
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
CV131
VGA@ CV132
VGA@ CV133
VGA@ CV134
VGA@ CV135
VGA@ CV136
VGA@ CV137
VGA@ CV138
VGA@ CV139
VGA@ CV140
VGA@ CV141
VGA@ CV142
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@
2 2 2 2 2 2 2 2 2 2 2 2
A A
CV143
VGA@ CV144
VGA@ CV145
VGA@ CV146
VGA@ CV147
VGA@ CV148
VGA@ CV149
VGA@ CV150
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1 1 1 1 1
Place Near GPU
22U_0603*9(X6S)
VGA@
2 2 2 2 2 2 2 2 10U_0603*5(X6S)
1U_0402*24(X6S) Security Classification Compal Secret Data Compal Electronics, Inc.

Place Under GPU 10U_0603*8(X6S) 2020/11/16 2021/11/16 Title
GN20E GND 8/
5 4 3 2 1
5 4 3 2 1
Follow NV CRB UV3 MF=1 MF=2

Follow NV CRB UV4 Follow NV CRB
Follow NV CRB
C2 B4
<27> FBA_EDC1 EDC0_A DQ0_A FBA_D9 <27>
C13 A3 C2 B4
<27> FBA_EDC3 EDC1_A DQ1_A FBA_D8 <27> <27> FBA_EDC5 EDC0_A DQ0_A FBA_D41 <27>
T2 B3 C13 A3
<27> FBA_EDC0 EDC0_B DQ2_A FBA_D13 <27> <27> FBA_EDC7 EDC1_A DQ1_A FBA_D40 <27>
T13 B2 T2 B3
<27> FBA_EDC2 EDC1_B DQ3_A FBA_D10 <27> <27> FBA_EDC4 EDC0_B DQ2_A FBA_D42 <27>
E3 T13 B2
DQ4_A FBA_D14 <27> <27> FBA_EDC6 EDC1_B DQ3_A FBA_D44 <27>
E2 E3
DQ5_A FBA_D11 <27> DQ4_A FBA_D47 <27>
D2 F2 E2
<27> FBA_DBI1 DBI0#_A DQ6_A FBA_D15 <27> DQ5_A FBA_D46 <27>
D13 G2 D2 F2
<27> FBA_DBI3 DBI1#_A DQ7_A FBA_D12 <27> <27> FBA_DBI5 DBI0#_A DQ6_A FBA_D43 <27>
R2 B11 D13 G2
<27> FBA_DBI0 DBI0#_B DQ8_A FBA_D24 <27> <27> FBA_DBI7 DBI1#_A DQ7_A FBA_D45 <27>
R13 A12 R2 B11
<27> FBA_DBI2 DBI1#_B DQ9_A FBA_D27 <27> <27> FBA_DBI4 DBI0#_B DQ8_A FBA_D60 <27>
B12 R13 A12
DQ10_A FBA_D25 <27> <27> FBA_DBI6 DBI1#_B DQ9_A FBA_D61 <27>
B13 B12
DQ11_A FBA_D30 <27> DQ10_A FBA_D62 <27>
J10 E12 B13
<27> FBA_CLK0 CK DQ12_A FBA_D26 <27> DQ11_A FBA_D58 <27>
D K10 E13 J10 E12 D
<27> FBA_CLK0# CK# DQ13_A FBA_D31 <27> <27> FBA_CLK1 CK DQ12_A FBA_D63 <27>
G10 F13 K10 E13
<27> FBA_CMD14 CKE#_A DQ14_A FBA_D28 <27> <27> FBA_CLK1# CK# DQ13_A FBA_D59 <27>
M10 G13 G10 F13
<27> FBA_CMD17 CKE#_B DQ15_A FBA_D29 <27> <27> FBA_CMD44 CKE#_A DQ14_A FBA_D57 <27>
M10 G13
<27> FBA_CMD41 CKE#_B DQ15_A FBA_D56 <27>
U4
DQ0_B FBA_D4 <27>
V3 U4
DQ1_B FBA_D2 <27> DQ0_B FBA_D32 <27>
U3 V3
DQ2_B FBA_D6 <27> DQ1_B FBA_D33 <27>
J5 U2 U3
<27> FBA_CMD10 CABI#_A DQ3_B FBA_D5 <27> DQ2_B FBA_D36 <27>
K5 P3 J5 U2
<27> FBA_CMD9 CABI#_B DQ4_B FBA_D7 <27> <27> FBA_CMD37 CABI#_A DQ3_B FBA_D39 <27>
P2 K5 P3
DQ5_B FBA_D0 <27> <27> FBA_CMD38 CABI#_B DQ4_B FBA_D34 <27>
N2 P2
DQ6_B FBA_D3 <27> DQ5_B FBA_D38 <27>
M2 N2
DQ7_B FBA_D1 <27> DQ6_B FBA_D35 <27>
U11 M2
DQ8_B FBA_D17 <27> DQ7_B FBA_D37 <27>
V12 U11
DQ9_B FBA_D21 <27> DQ8_B FBA_D55 <27>
RV463 2 VGA@ 1 121_0402_1% J14 U12 V12
ZQ_A DQ10_B FBA_D16 <27> DQ9_B FBA_D48 <27>
RV462 2 VGA@ 1 121_0402_1% K14 U13 RV465 2 VGA@ 1 121_0402_1% J14 U12
ZQ_B DQ11_B FBA_D18 <27> ZQ_A DQ10_B FBA_D53 <27>
P12 RV464 2 VGA@ 1 121_0402_1% K14 U13
DQ12_B FBA_D19 <27> ZQ_B DQ11_B FBA_D49 <27>
P13 P12
DQ13_B FBA_D20 <27> DQ12_B FBA_D54 <27>
N13 P13
DQ14_B FBA_D22 <27> DQ13_B FBA_D51 <27>
M13 N13
DQ15_B FBA_D23 <27> DQ14_B FBA_D52 <27>
M13
DQ15_B FBA_D50 <27>
N5 H3
TCK CA0_A FBA_CMD1 <27>
F10 G11 N5 H3
TDI CA1_A FBA_CMD13 <27> TCK CA0_A FBA_CMD33 <27>
N10 G4 F10 G11
TDO CA2_A FBA_CMD12 <27> TDI CA1_A FBA_CMD45 <27>
F5 H12 N10 G4
TMS CA3_A FBA_CMD24 <27> TDO CA2_A FBA_CMD35 <27>
H5 F5 H12
CA4_A FBA_CMD11 <27> TMS CA3_A FBA_CMD46 <27>
H10 H5
CA5_A FBA_CMD15 <27> CA4_A FBA_CMD36 <27>
J12 H10
J11 J12
J4 J11
Follow NV CRB J3 Follow NV CRB J4
J3
CA9_A FBA_CMD32 <27>
L3
FBA_WCKB01 CA0_B FBA_CMD5 <27>
D4 M11 L3
<27> FBA_WCKB01 FBA_WCKB01# WCK_A CA1_B FBA_CMD18 <27> FBA_WCKB45 CA0_B FBA_CMD29 <27>
D5 M4 D4 M11
<27> FBA_WCKB01# FBA_WCK23 WCK#_A CA2_B FBA_CMD7 <27> <27> FBA_WCKB45 FBA_WCKB45# WCK_A CA1_B FBA_CMD52 <27>
R11 L12 D5 M4
<27> FBA_WCK23 FBA_WCK23# WCK_B CA3_B FBA_CMD20 <27> <27> FBA_WCKB45# FBA_WCK67 WCK#_A CA2_B FBA_CMD40 <27>
R10 L5 R11 L12
<27> FBA_WCK23# WCK#_B CA4_B FBA_CMD8 <27> <27> FBA_WCK67 FBA_WCK67# WCK_B CA3_B FBA_CMD50 <27>
L10 R10 L5
CA5_B FBA_CMD16 <27> <27> FBA_WCK67# WCK#_B CA4_B FBA_CMD39 <27>
K12 L10
CA6_B FBA_CMD21 <27> CA5_B FBA_CMD42 <27>
K11 K12
K4 K11
K3 K4
+FBAA_VREFC CA9_B FBA_CMD4 <27> CA8_B FBA_CMD28 <27>
K1 K3
VREFC +FBVDDQ +FBAB_VREFC CA9_B FBA_CMD30 <27>
K1
C1 VREFC +FBVDDQ
J1 VDDQ1 E1 C1
<27> FBA_CMD3 RESET# VDDQ2 VDDQ1
H1 J1 E1
VDDQ3 <27> FBA_CMD31 RESET# VDDQ2
L1 H1
B1 VDDQ4 P1 VDDQ3 L1
C +FBAA_VREFC D1 VSS1 VDDQ5 T1 B1 VDDQ4 P1 C
F1 VSS2 VDDQ6 J2 D1 VSS1 VDDQ5 T1
VSS3 VDDQ7 VSS2 VDDQ6
2
G1 K2 F1 J2
1K_0402_5%
M1 VSS4 VDDQ8 C4 +FBAB_VREFC G1 VSS3 VDDQ7 K2

RV478
VGA@ N1 VSS5 VDDQ9 F4 M1 VSS4 VDDQ8 C4

2
R1 N4 N1 F4
1K_0402_5%
U1 VSS7 VDDQ11 T4 R1 VSS6 VDDQ10 N4
RV479
1
A2 VSS8 VDDQ12 B5 VGA@ U1 VSS7 VDDQ11 T4

V2 VSS9 VDDQ13 U5 A2 VSS8 VDDQ12 B5
C3 VSS10 VDDQ14 B10 V2 VSS9 VDDQ13 U5
1
D3 VSS11 VDDQ15 U10 C3 VSS10 VDDQ14 B10
F3 VSS12 VDDQ16 C11 D3 VSS11 VDDQ15 U10
G3 VSS13 VDDQ17 F11 F3 VSS12 VDDQ16 C11
M3 VSS14 VDDQ18 N11 G3 VSS13 VDDQ17 F11
N3 VSS15 VDDQ19 T11 M3 VSS14 VDDQ18 N11
R3 VSS16 VDDQ20 J13 N3 VSS15 VDDQ19 T11
T3 VSS17 VDDQ21 K13 R3 VSS16 VDDQ20 J13
A4 VSS18 VDDQ22 C14 T3 VSS17 VDDQ21 K13
E4 VSS19 VDDQ23 E14 A4 VSS18 VDDQ22 C14
H4 VSS20 VDDQ24 H14 E4 VSS19 VDDQ23 E14
L4 VSS21 VDDQ25 L14 H4 VSS20 VDDQ24 H14
P4 VSS22 VDDQ26 P14 L4 VSS21 VDDQ25 L14
V4 VSS23 VDDQ27 T14 P4 VSS22 VDDQ26 P14
C5 VSS24 VDDQ28 V4 VSS23 VDDQ27 T14
T5 VSS25 C5 VSS24 VDDQ28
C10 VSS26 A1 T5 VSS25
T10 VSS27 VDD1 V1 C10 VSS26 A1
A11 VSS28 VDD2 H2 T10 VSS27 VDD1 V1
E11 VSS29 VDD3 L2 A11 VSS28 VDD2 H2
H11 VSS30 VDD4 E5 E11 VSS29 VDD3 L2
L11 VSS31 VDD5 P5 H11 VSS30 VDD4 E5
P11 VSS32 VDD6 E10 L11 VSS31 VDD5 P5
V11 VSS33 VDD7 P10 P11 VSS32 VDD6 E10
C12 VSS34 VDD8 H13 V11 VSS33 VDD7 P10
D12 VSS35 VDD9 L13 C12 VSS34 VDD8 H13
F12 VSS36 VDD10 A14 D12 VSS35 VDD9 L13
VSS37 VDD11
Follow NV CRB VSS36 VDD10
G12 V14 F12 A14
M12 VSS38 VDD12 +1.8VSDGPU_AON G12 VSS37 VDD11 V14
VSS39 VSS38 VDD12
Follow NV CRB
N12 M12 +1.8VSDGPU_AON
R12 VSS40 A5 N12 VSS39
T12 VSS41 VPP1 V5 R12 VSS40 A5
A13 VSS42 VPP2 A10 T12 VSS41 VPP1 V5
V13 VSS43 VPP3 V10 A13 VSS42 VPP2 A10
B14 VSS44 VPP4 V13 VSS43 VPP3 V10
D14 VSS45 R4 FBA_WCK01 B14 VSS44 VPP4
VSS46 WCK0_t_B,NC FBA_WCK01# FBA_WCK01 <27> VSS45 FBA_WCK45
F14 R5 D14 R4
VSS47 WCK0_c_B,NC FBA_WCK01# <27> VSS46 WCK0_t_B,NC FBA_WCK45# FBA_WCK45 <27>
G14 F14 R5
VSS48 VSS47 WCK0_c_B,NC FBA_WCK45# <27>
M14 G5 G14
N14 VSS49 RFU_A,NC M5 M14 VSS48 G5
UV3 R14 VSS50 RFU_B,NC N14 VSS49 RFU_A,NC M5
B U14 VSS51 180-BALL D10 FBA_WCKB23# R14 VSS50 RFU_B,NC B
VSS52 WCK1_c_A,NC FBA_WCKB23# <27> VSS51
SGRAM GDDR6 D11 FBA_WCKB23 U14 180-BALL D10 FBA_WCKB67#
WCK1_t_A,NC FBA_WCKB23 <27> VSS52 WCK1_c_A,NC FBA_WCKB67# <27>
UV4 SGRAM GDDR6 D11 FBA_WCKB67
WCK1_t_A,NC FBA_WCKB67 <27>
K4Z80325BC-HC14_FBGA180~D
SAMSUNG SA0000C6280 K4Z80325BC-HC14_FBGA180~D
S IC D6 256M32 K4Z80325BC-HC14 1.2V ABO! @ SA0000C6280
SA0000C6280 @
X76@ SAMSUNG
S IC D6 256M32 K4Z80325BC-HC14 1.2V ABO!
SA0000C6280
+1.8VSDGPU_AON X76@ +1.8VSDGPU_AON
+FBVDDQ +FBVDDQ
CV210
CV211
CV212
CV213
CV222
CV223
CV224
CV225
CV180
VGA@ CV181
VGA@ CV182
VGA@ CV183
VGA@ CV184
VGA@ CV185
VGA@ CV186
VGA@ CV187
VGA@ CV188
VGA@ CV189
VGA@ CV190
VGA@ CV191
VGA@ CV192
VGA@ CV193
VGA@ CV194
VGA@ CV195
VGA@ CV196
VGA@ CV197
CV226
VGA@ CV227
VGA@ CV228
VGA@ CV229
VGA@ CV230
VGA@ CV231
VGA@ CV232
VGA@ CV233
VGA@ CV234
VGA@ CV235
VGA@ CV236
VGA@ CV237
VGA@ CV238
VGA@ CV239
VGA@ CV240
VGA@ CV241
VGA@ CV242
VGA@ CV243
1 1 1 1 1 1 1 1
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
2 2 2 2 2 2 2 2
VGA@
VGA@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
CV198
VGA@ CV199
VGA@ CV200
VGA@ CV201
CV244
VGA@ CV245
VGA@ CV246
VGA@ CV247
1 1 1 1 1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
CLOSE OR UNDER DRAM CLOSE OR UNDER DRAM
VGA@
VGA@
2 2 2 2 2 2 2 2
B ? -$ . B ? -$ .
B ? -$ . B ? -$ .
+FBVDDQ +FBVDDQ
+FBVDDQ +FBVDDQ
A A
1CV204
1CV205
1CV206
1CV207
1CV208
1CV209
1CV216
1CV217
1CV218
1CV219
1CV220
1CV221
CV202
VGA@ CV203
CV214
VGA@ CV215
1 1
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
330U_D2_2V_Y
330U_D2_2V_Y
1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
+ +
CV612
CV613
VGA@
VGA@
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
2 2 2 2 2 2
VGA@
VGA@
BULK DECAPS CLOSE OR UNDER DRAM BULK DECAPS CLOSE OR UNDER DRAM
AROUND DRAM AROUND DRAM

2020/11/16 2021/11/16 Title
N18E-GDDR6_A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
5 4 3 2 1
5 4 3 2 1
Follow NV CRB
MF=1 Follow NV CRB UV6 MF=2
UV5 Follow NV CRB
Follow NV CRB
C2 B4
<27> FBB_EDC5 EDC0_A DQ0_A FBB_D42 <27>
C2 B4 C13 A3
<27> FBB_EDC1 EDC0_A DQ0_A FBB_D15 <27> <27> FBB_EDC7 EDC1_A DQ1_A FBB_D41 <27>
C13 A3 T2 B3
<27> FBB_EDC3 EDC1_A DQ1_A FBB_D9 <27> <27> FBB_EDC4 EDC0_B DQ2_A FBB_D40 <27>
T2 B3 T13 B2
<27> FBB_EDC0 EDC0_B DQ2_A FBB_D10 <27> <27> FBB_EDC6 EDC1_B DQ3_A FBB_D45 <27>
T13 B2 E3
<27> FBB_EDC2 EDC1_B DQ3_A FBB_D11 <27> DQ4_A FBB_D46 <27>
E3 E2
DQ4_A FBB_D13 <27> DQ5_A FBB_D44 <27>
E2 D2 F2
DQ5_A FBB_D8 <27> <27> FBB_DBI5 DBI0#_A DQ6_A FBB_D43 <27>
D2 F2 D13 G2
<27> FBB_DBI1 DBI0#_A DQ6_A FBB_D14 <27> <27> FBB_DBI7 DBI1#_A DQ7_A FBB_D47 <27>
D13 G2 R2 B11
<27> FBB_DBI3 DBI1#_A DQ7_A FBB_D12 <27> <27> FBB_DBI4 DBI0#_B DQ8_A FBB_D63 <27>
R2 B11 R13 A12
<27> FBB_DBI0 DBI0#_B DQ8_A FBB_D25 <27> <27> FBB_DBI6 DBI1#_B DQ9_A FBB_D61 <27>
R13 A12 B12
<27> FBB_DBI2 DBI1#_B DQ9_A FBB_D26 <27> DQ10_A FBB_D58 <27>
B12 B13
DQ10_A FBB_D27 <27> DQ11_A FBB_D60 <27>
B13 J10 E12
DQ11_A FBB_D24 <27> <27> FBB_CLK1 CK DQ12_A FBB_D62 <27>
D J10 E12 K10 E13 D
<27> FBB_CLK0 CK DQ12_A FBB_D29 <27> <27> FBB_CLK1# CK# DQ13_A FBB_D56 <27>
K10 E13 G10 F13
<27> FBB_CLK0# CK# DQ13_A FBB_D31 <27> <27> FBB_CMD44 CKE#_A DQ14_A FBB_D57 <27>
G10 F13 M10 G13
<27> FBB_CMD14 CKE#_A DQ14_A FBB_D28 <27> <27> FBB_CMD41 CKE#_B DQ15_A FBB_D59 <27>
M10 G13
<27> FBB_CMD17 CKE#_B DQ15_A FBB_D30 <27>
U4
DQ0_B FBB_D32 <27>
U4 V3
DQ0_B FBB_D1 <27> DQ1_B FBB_D35 <27>
V3 U3
DQ1_B FBB_D7 <27> DQ2_B FBB_D33 <27>
U3 J5 U2
DQ2_B FBB_D6 <27> <27> FBB_CMD37 CABI#_A DQ3_B FBB_D39 <27>
J5 U2 K5 P3
<27> FBB_CMD10 CABI#_A DQ3_B FBB_D5 <27> <27> FBB_CMD38 CABI#_B DQ4_B FBB_D36 <27>
K5 P3 P2
<27> FBB_CMD9 CABI#_B DQ4_B FBB_D4 <27> DQ5_B FBB_D38 <27>
P2 N2
DQ5_B FBB_D0 <27> DQ6_B FBB_D34 <27>
N2 M2
DQ6_B FBB_D3 <27> DQ7_B FBB_D37 <27>
M2 U11
DQ7_B FBB_D2 <27> DQ8_B FBB_D55 <27>
U11 V12
DQ8_B FBB_D18 <27> DQ9_B FBB_D49 <27>
V12 RV468 2 VGA@ 1 121_0402_1% J14 U12
DQ9_B FBB_D21 <27> ZQ_A DQ10_B FBB_D54 <27>
RV466 2 VGA@ 1 121_0402_1% J14 U12 RV469 2 VGA@ 1 121_0402_1% K14 U13
ZQ_A DQ10_B FBB_D20 <27> ZQ_B DQ11_B FBB_D48 <27>
RV467 2 VGA@ 1 121_0402_1% K14 U13 P12
ZQ_B DQ11_B FBB_D22 <27> DQ12_B FBB_D52 <27>
P12 P13
DQ12_B FBB_D19 <27> DQ13_B FBB_D51 <27>
P13 N13
DQ13_B FBB_D23 <27> DQ14_B FBB_D53 <27>
N13 M13
DQ14_B FBB_D17 <27> DQ15_B FBB_D50 <27>
M13
DQ15_B FBB_D16 <27>
N5 H3
TCK CA0_A FBB_CMD33 <27>
N5 H3 F10 G11
TCK CA0_A FBB_CMD1 <27> TDI CA1_A FBB_CMD45 <27>
F10 G11 N10 G4
TDI CA1_A FBB_CMD13 <27> TDO CA2_A FBB_CMD35 <27>
N10 G4 F5 H12
TDO CA2_A FBB_CMD12 <27> TMS CA3_A FBB_CMD46 <27>
F5 H12 H5
TMS CA3_A FBB_CMD24 <27> CA4_A FBB_CMD36 <27>
H5 H10
CA4_A FBB_CMD11 <27> CA5_A FBB_CMD43 <27>
H10 J12
J12 J11
J11 J4
J3
CA9_A FBB_CMD2 <27>
L3
FBB_WCKB45 CA0_B FBB_CMD29 <27>
L3 D4 M11
FBB_WCKB01 CA0_B FBB_CMD5 <27> <27> FBB_WCKB45 FBB_WCKB45# WCK_A CA1_B FBB_CMD52 <27>
D4 M11 D5 M4
<27> FBB_WCKB01 FBB_WCKB01# WCK_A CA1_B FBB_CMD18 <27> <27> FBB_WCKB45# FBB_WCK67 WCK#_A CA2_B FBB_CMD40 <27>
D5 M4 R11 L12
<27> FBB_WCKB01# FBB_WCK23 WCK#_A CA2_B FBB_CMD7 <27> <27> FBB_WCK67 FBB_WCK67# WCK_B CA3_B FBB_CMD50 <27>
R11 L12 R10 L5
<27> FBB_WCK23 FBB_WCK23# WCK_B CA3_B FBB_CMD20 <27> <27> FBB_WCK67# WCK#_B CA4_B FBB_CMD39 <27>
R10 L5 L10
<27> FBB_WCK23# WCK#_B CA4_B FBB_CMD8 <27> CA5_B FBB_CMD42 <27>
L10 K12
CA5_B FBB_CMD16 <27> CA6_B FBB_CMD49 <27>
K12 K11
K11 K4
K4 K3
CA8_B FBB_CMD6 <27> +FBBB_VREFC CA9_B FBB_CMD30 <27>
K3 K1
+FBBA_VREFC CA9_B FBB_CMD4 <27> VREFC +FBVDDQ
K1
VREFC +FBVDDQ C1
C1 J1 VDDQ1 E1
VDDQ1 <27> FBB_CMD31 RESET# VDDQ2
J1 E1 H1
<27> FBB_CMD3 RESET# VDDQ2 VDDQ3
H1 L1
VDDQ3 L1 B1 VDDQ4 P1
C B1 VDDQ4 P1 +FBBB_VREFC D1 VSS1 VDDQ5 T1 C
+FBBA_VREFC D1 VSS1 VDDQ5 T1 F1 VSS2 VDDQ6 J2
F1 VSS2 VDDQ6 J2 G1 VSS3 VDDQ7 K2
2
G1 K2 M1 C4
1K_0402_5%
2
M1 C4 N1 F4
RV481
1K_0402_5%
N1 VSS5 VDDQ9 F4 VGA@ R1 VSS6 VDDQ10 N4

RV480
VGA@ R1 VSS6 VDDQ10 N4 U1 VSS7 VDDQ11 T4

U1 VSS7 VDDQ11 T4 A2 VSS8 VDDQ12 B5
1
A2 VSS8 VDDQ12 B5 V2 VSS9 VDDQ13 U5
1
V2 VSS9 VDDQ13 U5 C3 VSS10 VDDQ14 B10

C3 VSS10 VDDQ14 B10 D3 VSS11 VDDQ15 U10
D3 VSS11 VDDQ15 U10 F3 VSS12 VDDQ16 C11
F3 VSS12 VDDQ16 C11 G3 VSS13 VDDQ17 F11
G3 VSS13 VDDQ17 F11 M3 VSS14 VDDQ18 N11
M3 VSS14 VDDQ18 N11 N3 VSS15 VDDQ19 T11
N3 VSS15 VDDQ19 T11 R3 VSS16 VDDQ20 J13
R3 VSS16 VDDQ20 J13 T3 VSS17 VDDQ21 K13
T3 VSS17 VDDQ21 K13 A4 VSS18 VDDQ22 C14
A4 VSS18 VDDQ22 C14 E4 VSS19 VDDQ23 E14
E4 VSS19 VDDQ23 E14 H4 VSS20 VDDQ24 H14
H4 VSS20 VDDQ24 H14 L4 VSS21 VDDQ25 L14
L4 VSS21 VDDQ25 L14 P4 VSS22 VDDQ26 P14
P4 VSS22 VDDQ26 P14 V4 VSS23 VDDQ27 T14
V4 VSS23 VDDQ27 T14 C5 VSS24 VDDQ28
C5 VSS24 VDDQ28 T5 VSS25
T5 VSS25 C10 VSS26 A1
C10 VSS26 A1 T10 VSS27 VDD1 V1
T10 VSS27 VDD1 V1 A11 VSS28 VDD2 H2
A11 VSS28 VDD2 H2 E11 VSS29 VDD3 L2
E11 VSS29 VDD3 L2 H11 VSS30 VDD4 E5
H11 VSS30 VDD4 E5 L11 VSS31 VDD5 P5
L11 VSS31 VDD5 P5 P11 VSS32 VDD6 E10
P11 VSS32 VDD6 E10 V11 VSS33 VDD7 P10
V11 VSS33 VDD7 P10 C12 VSS34 VDD8 H13
C12 VSS34 VDD8 H13 D12 VSS35 VDD9 L13
VSS35 VDD9 VSS36 VDD10
Follow NV CRB
D12 L13 Follow NV CRB F12 A14
F12 VSS36 VDD10 A14 G12 VSS37 VDD11 V14
G12 VSS37 VDD11 V14 M12 VSS38 VDD12 +1.8VSDGPU_AON
M12 VSS38 VDD12 +1.8VSDGPU_AON N12 VSS39
N12 VSS39 R12 VSS40 A5
R12 VSS40 A5 T12 VSS41 VPP1 V5
T12 VSS41 VPP1 V5 A13 VSS42 VPP2 A10
A13 VSS42 VPP2 A10 V13 VSS43 VPP3 V10
V13 VSS43 VPP3 V10 B14 VSS44 VPP4
B14 VSS44 VPP4 D14 VSS45 R4 FBB_WCK45
VSS45 FBB_WCK01 VSS46 WCK0_t_B,NC FBB_WCK45# FBB_WCK45 <27>
D14 R4 F14 R5
VSS46 WCK0_t_B,NC FBB_WCK01# FBB_WCK01 <27> VSS47 WCK0_c_B,NC FBB_WCK45# <27>
F14 R5 G14
G14 VSS47 WCK0_c_B,NC FBB_WCK01# <27> M14 VSS48 G5
M14 VSS48 G5 UV6 N14 VSS49 RFU_A,NC M5
N14 VSS49 RFU_A,NC M5 R14 VSS50 RFU_B,NC
B UV5 R14 VSS50 RFU_B,NC U14 VSS51 180-BALL D10 FBB_WCKB67# B
VSS51 VSS52 WCK1_c_A,NC FBB_WCKB67# <27>
U14 180-BALL D10 FBB_WCKB23# SGRAM GDDR6 D11 FBB_WCKB67
VSS52 WCK1_c_A,NC WCK1_t_A,NC FBB_WCKB67 <27>
SGRAM GDDR6 D11 FBB_WCKB23 FBB_WCKB23# <27>
WCK1_t_A,NC FBB_WCKB23 <27>
SAMSUNG K4Z80325BC-HC14_FBGA180~D
K4Z80325BC-HC14_FBGA180~D S IC D6 256M32 K4Z80325BC-HC14 1.2V ABO! SA0000C6280
SAMSUNG SA0000C6280 SA0000C6280 @
S IC D6 256M32 K4Z80325BC-HC14 1.2V ABO! @ X76@
SA0000C6280
X76@
+1.8VSDGPU_AON +1.8VSDGPU_AON
+FBVDDQ
+FBVDDQ
CV256
CV257
CV258
CV259
CV290
CV291
CV292
CV293
CV294
VGA@ CV295
VGA@ CV296
VGA@ CV299
VGA@ CV300
VGA@ CV301
VGA@ CV302
VGA@ CV303
VGA@ CV304
VGA@ CV305
VGA@ CV307
VGA@ CV310
VGA@ CV311
VGA@ CV2821
VGA@ CV2819
VGA@ CV2822
VGA@ CV2823
VGA@ CV2820
1 1 1 1 1 1 1 1
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
CV260
VGA@ CV261
VGA@ CV262
VGA@ CV263
VGA@ CV264
VGA@ CV265
VGA@ CV266
VGA@ CV267
VGA@ CV268
VGA@ CV269
VGA@ CV270
VGA@ CV2804
VGA@ CV2817
VGA@ CV2798
VGA@ CV2799
VGA@ CV2801
VGA@ CV2803
VGA@ CV2806
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
2 2 2 2 2 2 2 2
VGA@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
VGA@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
CV312
VGA@ CV313
VGA@ CV314
VGA@ CV315
VGA@ CV2818
VGA@ CV2800
VGA@ CV2802
VGA@ CV2805
1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
CLOSE OR UNDER DRAM

VGA@
CLOSE OR UNDER DRAM 2 2 2 2

2 2 2 2 B ? -$ .
B ? -$ . B ? -$ .
B ? -$ .
+FBVDDQ
+FBVDDQ +FBVDDQ
+FBVDDQ
1CV288
1CV289
CV2810
CV2811
CV2807
CV2808
A A
1CV250
1CV251
1CV252
1CV253
1CV254
1CV255
CV282
VGA@ CV2809
1
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
330U_D2_2V_Y
CV248
VGA@ CV249
1 1
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1
CV615
1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
330U_D2_2V_Y
+
VGA@
CV614
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
2 2 2
VGA@
VGA@
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
2 2
2
VGA@
BULK DECAPS CLOSE OR UNDER DRAM

AROUND DRAM
AROUND DRAM BULK DECAPS CLOSE OR UNDER DRAM

2020/11/16 2021/11/16 Title
N18E-GDDR6_B
5 4 3 2 1
5 4 3 2 1
Follow NV CRB Follow NV CRB

UV7 MF=1 UV8 MF=2
Follow NV CRB Follow NV CRB
C2 B4 C2 B4
<27> FBC_EDC1 EDC0_A DQ0_A FBC_D9 <27> <27> FBC_EDC5 EDC0_A DQ0_A FBC_D45 <27>
C13 A3 C13 A3
<27> FBC_EDC3 EDC1_A DQ1_A FBC_D8 <27> <27> FBC_EDC7 EDC1_A DQ1_A FBC_D44 <27>
T2 B3 T2 B3
<27> FBC_EDC0 EDC0_B DQ2_A FBC_D15 <27> <27> FBC_EDC4 EDC0_B DQ2_A FBC_D40 <27>
T13 B2 T13 B2
<27> FBC_EDC2 EDC1_B DQ3_A FBC_D10 <27> <27> FBC_EDC6 EDC1_B DQ3_A FBC_D46 <27>
E3 E3
DQ4_A FBC_D13 <27> DQ4_A FBC_D42 <27>
E2 E2
DQ5_A FBC_D12 <27> DQ5_A FBC_D41 <27>
D2 F2 D2 F2
<27> FBC_DBI1 DBI0#_A DQ6_A FBC_D14 <27> <27> FBC_DBI5 DBI0#_A DQ6_A FBC_D43 <27>
D13 G2 D13 G2
<27> FBC_DBI3 DBI1#_A DQ7_A FBC_D11 <27> <27> FBC_DBI7 DBI1#_A DQ7_A FBC_D47 <27>
R2 B11 R2 B11
<27> FBC_DBI0 DBI0#_B DQ8_A FBC_D25 <27> <27> FBC_DBI4 DBI0#_B DQ8_A FBC_D62 <27>
R13 A12 R13 A12
<27> FBC_DBI2 DBI1#_B DQ9_A FBC_D31 <27> <27> FBC_DBI6 DBI1#_B DQ9_A FBC_D60 <27>
B12 B12
DQ10_A FBC_D24 <27> DQ10_A FBC_D61 <27>
B13 B13
DQ11_A FBC_D30 <27> DQ11_A FBC_D58 <27>
J10 E12 J10 E12
<27> FBC_CLK0 CK DQ12_A FBC_D27 <27> <27> FBC_CLK1 CK DQ12_A FBC_D63 <27>
D K10 E13 K10 E13 D
<27> FBC_CLK0# CK# DQ13_A FBC_D29 <27> <27> FBC_CLK1# CK# DQ13_A FBC_D57 <27>
G10 F13 G10 F13
<27> FBC_CMD14 CKE#_A DQ14_A FBC_D26 <27> <27> FBC_CMD44 CKE#_A DQ14_A FBC_D59 <27>
M10 G13 M10 G13
<27> FBC_CMD17 CKE#_B DQ15_A FBC_D28 <27> <27> FBC_CMD41 CKE#_B DQ15_A FBC_D56 <27>
U4 U4
DQ0_B FBC_D5 <27> DQ0_B FBC_D33 <27>
V3 V3
DQ1_B FBC_D6 <27> DQ1_B FBC_D32 <27>
U3 U3
DQ2_B FBC_D2 <27> DQ2_B FBC_D36 <27>
J5 U2 J5 U2
<27> FBC_CMD10 CABI#_A DQ3_B FBC_D0 <27> <27> FBC_CMD37 CABI#_A DQ3_B FBC_D34 <27>
K5 P3 K5 P3
<27> FBC_CMD9 CABI#_B DQ4_B FBC_D4 <27> <27> FBC_CMD38 CABI#_B DQ4_B FBC_D39 <27>
P2 P2
DQ5_B FBC_D7 <27> DQ5_B FBC_D37 <27>
N2 N2
DQ6_B FBC_D3 <27> DQ6_B FBC_D35 <27>
M2 M2
DQ7_B FBC_D1 <27> DQ7_B FBC_D38 <27>
U11 U11
DQ8_B FBC_D19 <27> DQ8_B FBC_D49 <27>
V12 V12
DQ9_B FBC_D18 <27> DQ9_B FBC_D51 <27>
RV470 2 VGA@ 1 121_0402_1% J14 U12 RV472 2 VGA@ 1 121_0402_1% J14 U12
ZQ_A DQ10_B FBC_D17 <27> ZQ_A DQ10_B FBC_D48 <27>
RV471 2 VGA@ 1 121_0402_1% K14 U13 RV473 2 VGA@ 1 121_0402_1% K14 U13
ZQ_B DQ11_B FBC_D21 <27> ZQ_B DQ11_B FBC_D54 <27>
P12 P12
DQ12_B FBC_D22 <27> DQ12_B FBC_D55 <27>
P13 P13
DQ13_B FBC_D20 <27> DQ13_B FBC_D52 <27>
N13 N13
DQ14_B FBC_D16 <27> DQ14_B FBC_D53 <27>
M13 M13
DQ15_B FBC_D23 <27> DQ15_B FBC_D50 <27>
N5 H3 N5 H3
TCK CA0_A FBC_CMD1 <27> TCK CA0_A FBC_CMD33 <27>
F10 G11 F10 G11
TDI CA1_A FBC_CMD13 <27> TDI CA1_A FBC_CMD45 <27>
N10 G4 N10 G4
TDO CA2_A FBC_CMD12 <27> TDO CA2_A FBC_CMD35 <27>
F5 H12 F5 H12
TMS CA3_A FBC_CMD24 <27> TMS CA3_A FBC_CMD46 <27>
H5 H5
CA4_A FBC_CMD11 <27> CA4_A FBC_CMD36 <27>
H10 H10
J12 J12
J11 J11
J3 J3
L3 L3
FBC_WCKB01 CA0_B FBC_CMD5 <27> FBC_WCKB45 CA0_B FBC_CMD29 <27>
D4 M11 D4 M11
<27> FBC_WCKB01 FBC_WCKB01# WCK_A CA1_B FBC_CMD18 <27> <27> FBC_WCKB45 FBC_WCKB45# WCK_A CA1_B FBC_CMD52 <27>
D5 M4 D5 M4
<27> FBC_WCKB01# FBC_WCK23 WCK#_A CA2_B FBC_CMD7 <27> <27> FBC_WCKB45# FBC_WCK67 WCK#_A CA2_B FBC_CMD40 <27>
R11 L12 R11 L12
<27> FBC_WCK23 FBC_WCK23# WCK_B CA3_B FBC_CMD20 <27> <27> FBC_WCK67 FBC_WCK67# WCK_B CA3_B FBC_CMD50 <27>
R10 L5 R10 L5
<27> FBC_WCK23# WCK#_B CA4_B FBC_CMD8 <27> <27> FBC_WCK67# WCK#_B CA4_B FBC_CMD39 <27>
L10 L10
CA5_B FBC_CMD16 <27> CA5_B FBC_CMD42 <27>
K12 K12
K11 K11
K4 K4
K3 K3
+FBCA_VREFC CA9_B FBC_CMD4 <27> +FBCB_VREFC CA9_B FBC_CMD30 <27>
K1 K1
VREFC +FBVDDQ VREFC +FBVDDQ
C1 C1
J1 VDDQ1 E1 J1 VDDQ1 E1
<27> FBC_CMD3 RESET# VDDQ2 <27> FBC_CMD31 RESET# VDDQ2
H1 H1
VDDQ3 L1 VDDQ3 L1
B1 VDDQ4 P1 +FBCB_VREFC B1 VDDQ4 P1
C +FBCA_VREFC D1 VSS1 VDDQ5 T1 D1 VSS1 VDDQ5 T1 C
F1 VSS2 VDDQ6 J2 F1 VSS2 VDDQ6 J2
2
G1 K2 G1 K2
1K_0402_5%
2
M1 C4 M1 C4
RV483
1K_0402_5%
N1 VSS5 VDDQ9 F4 VGA@ N1 VSS5 VDDQ9 F4

RV482
VGA@ R1 VSS6 VDDQ10 N4 R1 VSS6 VDDQ10 N4

U1 VSS7 VDDQ11 T4 U1 VSS7 VDDQ11 T4
1
A2 VSS8 VDDQ12 B5 A2 VSS8 VDDQ12 B5
1
V2 VSS9 VDDQ13 U5 V2 VSS9 VDDQ13 U5

C3 VSS10 VDDQ14 B10 C3 VSS10 VDDQ14 B10
D3 VSS11 VDDQ15 U10 D3 VSS11 VDDQ15 U10
F3 VSS12 VDDQ16 C11 F3 VSS12 VDDQ16 C11
G3 VSS13 VDDQ17 F11 G3 VSS13 VDDQ17 F11
M3 VSS14 VDDQ18 N11 M3 VSS14 VDDQ18 N11
N3 VSS15 VDDQ19 T11 N3 VSS15 VDDQ19 T11
R3 VSS16 VDDQ20 J13 R3 VSS16 VDDQ20 J13
T3 VSS17 VDDQ21 K13 T3 VSS17 VDDQ21 K13
A4 VSS18 VDDQ22 C14 A4 VSS18 VDDQ22 C14
E4 VSS19 VDDQ23 E14 E4 VSS19 VDDQ23 E14
H4 VSS20 VDDQ24 H14 H4 VSS20 VDDQ24 H14
L4 VSS21 VDDQ25 L14 L4 VSS21 VDDQ25 L14
P4 VSS22 VDDQ26 P14 P4 VSS22 VDDQ26 P14
V4 VSS23 VDDQ27 T14 V4 VSS23 VDDQ27 T14
C5 VSS24 VDDQ28 C5 VSS24 VDDQ28
T5 VSS25 T5 VSS25
C10 VSS26 A1 C10 VSS26 A1
T10 VSS27 VDD1 V1 T10 VSS27 VDD1 V1
A11 VSS28 VDD2 H2 A11 VSS28 VDD2 H2
E11 VSS29 VDD3 L2 E11 VSS29 VDD3 L2
H11 VSS30 VDD4 E5 H11 VSS30 VDD4 E5
L11 VSS31 VDD5 P5 L11 VSS31 VDD5 P5
P11 VSS32 VDD6 E10 P11 VSS32 VDD6 E10
V11 VSS33 VDD7 P10 V11 VSS33 VDD7 P10
C12 VSS34 VDD8 H13 C12 VSS34 VDD8 H13
D12 VSS35 VDD9 L13 D12 VSS35 VDD9 L13
VSS36 VDD10
Follow NV CRB VSS36 VDD10
F12 A14 F12 A14
G12 VSS37 VDD11 V14 G12 VSS37 VDD11 V14
M12 VSS38 VDD12 +1.8VSDGPU_AON M12 VSS38 VDD12 +1.8VSDGPU_AON
N12 VSS39 N12 VSS39
VSS40 VSS40
Follow NV CRB
R12 A5 R12 A5
T12 VSS41 VPP1 V5 T12 VSS41 VPP1 V5
A13 VSS42 VPP2 A10 A13 VSS42 VPP2 A10
V13 VSS43 VPP3 V10 V13 VSS43 VPP3 V10
B14 VSS44 VPP4 B14 VSS44 VPP4
D14 VSS45 R4 FBC_WCK01 D14 VSS45 R4 FBC_WCK45
VSS46 WCK0_t_B,NC FBC_WCK01# FBC_WCK01 <27> VSS46 WCK0_t_B,NC FBC_WCK45# FBC_WCK45 <27>
F14 R5 F14 R5
VSS47 WCK0_c_B,NC FBC_WCK01# <27> VSS47 WCK0_c_B,NC FBC_WCK45# <27>
G14 G14
UV7 M14 VSS48 G5 M14 VSS48 G5
N14 VSS49 RFU_A,NC M5 N14 VSS49 RFU_A,NC M5
R14 VSS50 RFU_B,NC UV8 R14 VSS50 RFU_B,NC
B U14 VSS51 180-BALL D10 FBC_WCKB23# U14 VSS51 180-BALL D10 FBC_WCKB67# B
VSS52 WCK1_c_A,NC FBC_WCKB23# <27> VSS52 WCK1_c_A,NC FBC_WCKB67# <27>
SGRAM GDDR6 D11 FBC_WCKB23 SGRAM GDDR6 D11 FBC_WCKB67
WCK1_t_A,NC FBC_WCKB23 <27> WCK1_t_A,NC FBC_WCKB67 <27>
SAMSUNG
S IC D6 256M32 K4Z80325BC-HC14 1.2V ABO! K4Z80325BC-HC14_FBGA180~D K4Z80325BC-HC14_FBGA180~D
SA0000C6280 SA0000C6280 SAMSUNG SA0000C6280
X76@ @ S IC D6 256M32 K4Z80325BC-HC14 1.2V ABO! @
SA0000C6280
X76@
+1.8VSDGPU_AON
+1.8VSDGPU_AON
+FBVDDQ
+FBVDDQ
CV324
CV325
CV326
CV327
CV358
CV359
CV360
CV361
1 1 1 1
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
CV328
VGA@ CV329
VGA@ CV330
VGA@ CV331
VGA@ CV332
VGA@ CV333
VGA@ CV334
VGA@ CV335
VGA@ CV336
VGA@ CV337
VGA@ CV338
VGA@ CV339
VGA@ CV340
VGA@ CV341
VGA@ CV342
VGA@ CV343
VGA@ CV344
VGA@ CV345
1 1 1 1
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
CV362
VGA@ CV363
VGA@ CV364
VGA@ CV365
VGA@ CV366
VGA@ CV367
VGA@ CV368
VGA@ CV369
VGA@ CV370
VGA@ CV371
VGA@ CV372
VGA@ CV373
VGA@ CV374
VGA@ CV375
VGA@ CV376
VGA@ CV377
VGA@ CV378
VGA@ CV379
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
VGA@
VGA@
VGA@
VGA@
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
2 2 2 2
VGA@
VGA@
VGA@
VGA@
2 2 2 2
VGA@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
VGA@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
CV346
VGA@ CV347
VGA@ CV348
VGA@ CV349
CV380
VGA@ CV381
VGA@ CV382
1 1 1 1 VGA@ CV383
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
CLOSE OR UNDER DRAM 10U_0402_6.3V6M

VGA@
2 2 2 2
CLOSE OR UNDER DRAM
VGA@
B ? -$ . 2 2 2 2
B ? -$ . B ? -$ .
B ? -$ .
+FBVDDQ
+FBVDDQ
+FBVDDQ
A +FBVDDQ A
1
330U_D2_2V_Y
1CV318
1CV319
1CV320
1CV321
1CV322
1CV323
+
CV316
VGA@ CV317
1CV352
1CV353
1CV354
1CV355
1CV356
1CV357
CV617
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
CV350
VGA@ CV351
1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
330U_D2_2V_Y
1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
+ 2
VGA@
CV616
VGA@
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
2 2
VGA@
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
VGA@ 2
2 2 2
VGA@
AROUND DRAM BULK DECAPS CLOSE OR UNDER DRAM

AROUND DRAM
2020/11/16 2021/11/16 Title
N18E-GDDR6_C
5 4 3 2 1
5 4 3 2 1
Follow NV CRB
UV9 MF=1 Follow NV CRB
MF=2
Follow NV CRB UV10
Follow NV CRB
C2 B4
<27> FBD_EDC1 EDC0_A DQ0_A FBD_D14 <27>
C13 A3 C2 B4
<27> FBD_EDC3 EDC1_A DQ1_A FBD_D10 <27> <27> FBD_EDC5 EDC0_A DQ0_A FBD_D42 <27>
T2 B3 C13 A3
<27> FBD_EDC0 EDC0_B DQ2_A FBD_D15 <27> <27> FBD_EDC7 EDC1_A DQ1_A FBD_D45 <27>
T13 B2 T2 B3
<27> FBD_EDC2 EDC1_B DQ3_A FBD_D9 <27> <27> FBD_EDC4 EDC0_B DQ2_A FBD_D40 <27>
E3 T13 B2
DQ4_A FBD_D13 <27> <27> FBD_EDC6 EDC1_B DQ3_A FBD_D44 <27>
E2 E3
DQ5_A FBD_D8 <27> DQ4_A FBD_D43 <27>
D2 F2 E2
<27> FBD_DBI1 DBI0#_A DQ6_A FBD_D12 <27> DQ5_A FBD_D46 <27>
D13 G2 D2 F2
<27> FBD_DBI3 DBI1#_A DQ7_A FBD_D11 <27> <27> FBD_DBI5 DBI0#_A DQ6_A FBD_D41 <27>
R2 B11 D13 G2
<27> FBD_DBI0 DBI0#_B DQ8_A FBD_D26 <27> <27> FBD_DBI7 DBI1#_A DQ7_A FBD_D47 <27>
R13 A12 R2 B11
<27> FBD_DBI2 DBI1#_B DQ9_A FBD_D25 <27> <27> FBD_DBI4 DBI0#_B DQ8_A FBD_D61 <27>
B12 R13 A12
DQ10_A FBD_D24 <27> <27> FBD_DBI6 DBI1#_B DQ9_A FBD_D56 <27>
B13 B12
DQ11_A FBD_D27 <27> DQ10_A FBD_D62 <27>
J10 E12 B13
<27> FBD_CLK0 CK DQ12_A FBD_D28 <27> DQ11_A FBD_D58 <27>
D K10 E13 J10 E12 D
<27> FBD_CLK0# CK# DQ13_A FBD_D31 <27> <27> FBD_CLK1 CK DQ12_A FBD_D63 <27>
G10 F13 K10 E13
<27> FBD_CMD14 CKE#_A DQ14_A FBD_D30 <27> <27> FBD_CLK1# CK# DQ13_A FBD_D60 <27>
M10 G13 G10 F13
<27> FBD_CMD17 CKE#_B DQ15_A FBD_D29 <27> <27> FBD_CMD44 CKE#_A DQ14_A FBD_D59 <27>
M10 G13
<27> FBD_CMD41 CKE#_B DQ15_A FBD_D57 <27>
U4
DQ0_B FBD_D7 <27>
V3 U4
DQ1_B FBD_D6 <27> DQ0_B FBD_D36 <27>
U3 V3
DQ2_B FBD_D4 <27> DQ1_B FBD_D33 <27>
J5 U2 U3
<27> FBD_CMD10 CABI#_A DQ3_B FBD_D5 <27> DQ2_B FBD_D35 <27>
K5 P3 J5 U2
<27> FBD_CMD9 CABI#_B DQ4_B FBD_D3 <27> <27> FBD_CMD37 CABI#_A DQ3_B FBD_D32 <27>
P2 K5 P3
DQ5_B FBD_D0 <27> <27> FBD_CMD38 CABI#_B DQ4_B FBD_D34 <27>
N2 P2
DQ6_B FBD_D2 <27> DQ5_B FBD_D39 <27>
M2 N2
DQ7_B FBD_D1 <27> DQ6_B FBD_D38 <27>
U11 M2
DQ8_B FBD_D16 <27> DQ7_B FBD_D37 <27>
V12 U11
DQ9_B FBD_D22 <27> DQ8_B FBD_D49 <27>
RV474 2 CHD@ 1 121_0402_1% J14 U12 V12
ZQ_A DQ10_B FBD_D20 <27> DQ9_B FBD_D48 <27>
RV475 2 CHD@ 1 121_0402_1% K14 U13 RV476 2 CHD@ 1 121_0402_1% J14 U12
ZQ_B DQ11_B FBD_D21 <27> ZQ_A DQ10_B FBD_D50 <27>
P12 RV477 2 CHD@ 1 121_0402_1% K14 U13
DQ12_B FBD_D18 <27> ZQ_B DQ11_B FBD_D51 <27>
P13 P12
DQ13_B FBD_D23 <27> DQ12_B FBD_D55 <27>
N13 P13
DQ14_B FBD_D17 <27> DQ13_B FBD_D52 <27>
M13 N13
DQ15_B FBD_D19 <27> DQ14_B FBD_D54 <27>
M13
DQ15_B FBD_D53 <27>
N5 H3
TCK CA0_A FBD_CMD1 <27>
F10 G11 N5 H3
TDI CA1_A FBD_CMD13 <27> TCK CA0_A FBD_CMD33 <27>
N10 G4 F10 G11
TDO CA2_A FBD_CMD12 <27> TDI CA1_A FBD_CMD45 <27>
F5 H12 N10 G4
TMS CA3_A FBD_CMD24 <27> TDO CA2_A FBD_CMD35 <27>
H5 F5 H12
CA4_A FBD_CMD11 <27> TMS CA3_A FBD_CMD46 <27>
H10 H5
CA5_A FBD_CMD15 <27> CA4_A FBD_CMD36 <27>
J12 H10
J11 J12
Follow NV CRB J4 J11
J3 Follow NV CRB J4
J3
CA9_A FBD_CMD32 <27>
L3
FBD_WCKB01 CA0_B FBD_CMD5 <27>
D4 M11 L3
<27> FBD_WCKB01 FBD_WCKB01# WCK_A CA1_B FBD_CMD18 <27> FBD_WCKB45 CA0_B FBD_CMD29 <27>
D5 M4 D4 M11
<27> FBD_WCKB01# FBD_WCK23 WCK#_A CA2_B FBD_CMD7 <27> <27> FBD_WCKB45 FBD_WCKB45# WCK_A CA1_B FBD_CMD52 <27>
R11 L12 D5 M4
<27> FBD_WCK23 FBD_WCK23# WCK_B CA3_B FBD_CMD20 <27> <27> FBD_WCKB45# FBD_WCK67 WCK#_A CA2_B FBD_CMD40 <27>
R10 L5 R11 L12
<27> FBD_WCK23# WCK#_B CA4_B FBD_CMD8 <27> <27> FBD_WCK67 FBD_WCK67# WCK_B CA3_B FBD_CMD50 <27>
L10 R10 L5
CA5_B FBD_CMD16 <27> <27> FBD_WCK67# WCK#_B CA4_B FBD_CMD39 <27>
K12 L10
CA6_B FBD_CMD21 <27> CA5_B FBD_CMD42 <27>
K11 K12
K4 K11
K3 K4
+FBDA_VREFC CA9_B FBD_CMD4 <27> CA8_B FBD_CMD28 <27>
K1 K3
VREFC +FBVDDQ +FBDB_VREFC CA9_B FBD_CMD30 <27>
K1
C1 VREFC +FBVDDQ
J1 VDDQ1 E1 C1
<27> FBD_CMD3 RESET# VDDQ2 VDDQ1
H1 J1 E1
VDDQ3 <27> FBD_CMD31 RESET# VDDQ2
L1 H1
B1 VDDQ4 P1 VDDQ3 L1
C D1 VSS1 VDDQ5 T1 B1 VDDQ4 P1 C
F1 VSS2 VDDQ6 J2 D1 VSS1 VDDQ5 T1
G1 VSS3 VDDQ7 K2 F1 VSS2 VDDQ6 J2
+FBDA_VREFC M1 VSS4 VDDQ8 C4 G1 VSS3 VDDQ7 K2
N1 VSS5 VDDQ9 F4 +FBDB_VREFC M1 VSS4 VDDQ8 C4
R1 VSS6 VDDQ10 N4 N1 VSS5 VDDQ9 F4
2
U1 T4 R1 N4
1K_0402_5%
2
A2 B5 U1 T4
RV484
1K_0402_5%
CHD@ V2 VSS9 VDDQ13 U5 A2 VSS8 VDDQ12 B5
RV485
C3 VSS10 VDDQ14 B10 CHD@ V2 VSS9 VDDQ13 U5
D3 VSS11 VDDQ15 U10 C3 VSS10 VDDQ14 B10
1
F3 VSS12 VDDQ16 C11 D3 VSS11 VDDQ15 U10
1
G3 VSS13 VDDQ17 F11 F3 VSS12 VDDQ16 C11
M3 VSS14 VDDQ18 N11 G3 VSS13 VDDQ17 F11
N3 VSS15 VDDQ19 T11 M3 VSS14 VDDQ18 N11
R3 VSS16 VDDQ20 J13 N3 VSS15 VDDQ19 T11
T3 VSS17 VDDQ21 K13 R3 VSS16 VDDQ20 J13
A4 VSS18 VDDQ22 C14 T3 VSS17 VDDQ21 K13
E4 VSS19 VDDQ23 E14 A4 VSS18 VDDQ22 C14
H4 VSS20 VDDQ24 H14 E4 VSS19 VDDQ23 E14
L4 VSS21 VDDQ25 L14 H4 VSS20 VDDQ24 H14
P4 VSS22 VDDQ26 P14 L4 VSS21 VDDQ25 L14
V4 VSS23 VDDQ27 T14 P4 VSS22 VDDQ26 P14
C5 VSS24 VDDQ28 V4 VSS23 VDDQ27 T14
T5 VSS25 C5 VSS24 VDDQ28
C10 VSS26 A1 T5 VSS25
T10 VSS27 VDD1 V1 C10 VSS26 A1
A11 VSS28 VDD2 H2 T10 VSS27 VDD1 V1
E11 VSS29 VDD3 L2 A11 VSS28 VDD2 H2
H11 VSS30 VDD4 E5 E11 VSS29 VDD3 L2
L11 VSS31 VDD5 P5 H11 VSS30 VDD4 E5
P11 VSS32 VDD6 E10 L11 VSS31 VDD5 P5
V11 VSS33 VDD7 P10 P11 VSS32 VDD6 E10
C12 VSS34 VDD8 H13 V11 VSS33 VDD7 P10
D12 VSS35 VDD9 L13 C12 VSS34 VDD8 H13
F12 VSS36 VDD10 A14 D12 VSS35 VDD9 L13
G12 VSS37 VDD11 V14 F12 VSS36 VDD10 A14
M12 VSS38 VDD12 +1.8VSDGPU_AON G12 VSS37 VDD11 V14
N12 VSS39 M12 VSS38 VDD12 +1.8VSDGPU_AON
R12 VSS40 A5 N12 VSS39
VSS41 VPP1 VSS40
Follow NV CRB
T12 V5 Follow NV CRB R12 A5
A13 VSS42 VPP2 A10 T12 VSS41 VPP1 V5
V13 VSS43 VPP3 V10 A13 VSS42 VPP2 A10
B14 VSS44 VPP4 V13 VSS43 VPP3 V10
D14 VSS45 R4 FBD_WCK01 B14 VSS44 VPP4
VSS46 WCK0_t_B,NC FBD_WCK01# FBD_WCK01 <27> VSS45 FBD_WCK45
F14 R5 D14 R4
VSS47 WCK0_c_B,NC FBD_WCK01# <27> VSS46 WCK0_t_B,NC FBD_WCK45# FBD_WCK45 <27>
G14 F14 R5
VSS48 VSS47 WCK0_c_B,NC FBD_WCK45# <27>
M14 G5 G14
N14 VSS49 RFU_A,NC M5 M14 VSS48 G5
R14 VSS50 RFU_B,NC N14 VSS49 RFU_A,NC M5
B U14 VSS51 180-BALL D10 FBD_WCKB23# R14 VSS50 RFU_B,NC B
VSS52 WCK1_c_A,NC FBD_WCKB23# <27> VSS51
SGRAM GDDR6 D11 FBD_WCKB23 U14 180-BALL D10 FBD_WCKB67#
WCK1_t_A,NC FBD_WCKB23 <27> VSS52 WCK1_c_A,NC FBD_WCKB67# <27>
SGRAM GDDR6 D11 FBD_WCKB67
WCK1_t_A,NC FBD_WCKB67 <27>
K4Z80325BC-HC14_FBGA180~D
SA0000C6280 K4Z80325BC-HC14_FBGA180~D
@ SA0000C6280
@
+1.8VSDGPU_AON +1.8VSDGPU_AON
+FBVDDQ +FBVDDQ
CV392
CV393
CV394
CV395
CV426
CV427
CV428
CV429
1 1 1 1 1 1 1 1
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
CV396
CV397
CV398
CV399
CV400
CV401
CV402
CV403
CV404
CV405
CV406
CV407
CV408
CV409
CV410
CV411
CV412
CV413
CV430
CV431
CV432
CV433
CV434
CV435
CV436
CV437
CV438
CV439
CV440
CV441
CV442
CV443
CV444
CV445
CV446
CV447
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
2 2 2 2 2 2 2 2
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
CV414
CV415
CV416
CV417
CV448
CV449
CV450
CV451
1 1 1 1 1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
CLOSE OR UNDER DRAM CLOSE OR UNDER DRAM

CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
CHD@
2 2 2 2 2 2 2 2
B ? -$ . B ? -$ .
B ? -$ . B ? -$ .
+FBVDDQ
+FBVDDQ +FBVDDQ
A A
1
330U_D2_2V_Y
+FBVDDQ
+
1CV386
1CV387
1CV388
1CV389
1CV390
1CV391
1CV420
1CV421
1CV422
1CV423
1CV424
1CV425
CV619
CV384
CV385
CV418
CV419
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1 1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
330U_D2_2V_Y
@
+
CV618
CHD@
CHD@
CHD@
CHD@
CHD@ 2
CHD@ 2
CHD@ 2
CHD@ 2
CHD@ 2
CHD@ 2
CHD@ 2
CHD@ 2
CHD@ 2
CHD@ 2
CHD@ 2
CHD@ 2
2 2 2 2
2
@
AROUND DRAM BULK DECAPS CLOSE OR UNDER DRAM AROUND DRAM

2020/11/16 2021/11/16 Title
N18E-GDDR6_D
5 4 3 2 1
A B C D E
+3V_OVRM GEN2 NV suggest BS_IN3,4

need also connect with
BS_IN2(CSSP_FBVDD)
1
RV195
0_0402_5% No use SH_P/N need
GEN1@ PU the same voltage
NV Suggest as no use BS_IN
2
CSSP_B+ 75K_0402_1%1 GEN1@ 2 0_0402_5% 2 GEN2@ 1 RV192 CSSP_FBVDD
RV101
GEN1@
For OVRM Keep ON
1 1000P_0402_50V7K 2 1CV271 1 RV104 2 1
ON_GEN1@
649_0402_1%
1
2K_0402_5%
RV110
GEN1@
2K_0402_5%
RV111
GEN1@
2K_0402_5%
RV112
GEN1@
2K_0402_5%
RV113
GEN1@
RV114
RV115
@ @
1
OVRM@
2 RV729 1 100_0402_1%1 GEN1@ 2 RV103 CSSP_B+
CSSP_B+ <104>
2
0_0402_5% PFM_CH1_SH_IN_P3
1
+3VS CV273 PFM_CH1_SH_IN_N3
+3V_OVRM 680P_0402_50V7K SNN_PFM_CH1_SH_IN_P4
0_0201_5%
0_0201_5%
2
2
GEN2@ SNN_PFM_CH1_SH_IN_N4
2
OVRM@
1 RV178 20_0402_5% 0_0402_5%2 OVRM@ 1 RV105 CSSN_B+
CSSN_B+ <104>
CSSP_FBVDD 75K_0402_1%1 GEN1@ 2 CV272
RV106 0.1U_0201_10V6K OVRM@
GEN1@ OVRM@ 1 2 RV730 1 100_0402_1%1 GEN1@ 2 RV728 CSSP_FBVDD
CSSP_FBVDD <104>
1000P_0402_50V7K 2 1 CV274 1 RV108 2 0_0402_5%
1
665_0402_1% 680P_0402_50V7K
2 GEN2@
ON_GEN1@
CV275
2
UPI-Semi suggest pop CV274/CV271 when GEN2 0_0402_5%2 OVRM@ 1 RV116 CSSN_FBVDD
CSSN_FBVDD <104>
Keep NV suggest to unpop when GEN2. UV20
PFM_CH1_BS_IN1 3 27
PFM_CH1_BS_IN2 6 BS_IN1 VCC
PFM_CH1_BS_IN3 11 BS_IN2 2 PFM_CH1_SH_IN_P1
0_0402_5% PFM_CH1_BS_IN4 14 BS_IN3 SH_IN_P1 1 PFM_CH1_SH_IN_N1
GEN2@ BS_IN4 SH_IN_N1 5 PFM_CH1_SH_IN_P2
RV118 SH_IN_P2 4 PFM_CH1_SH_IN_N2
PFM_FILTER_GND_FET SH_IN_N2 PFM_CH1_SH_IN_P3 ADC_IN_N <26>
1 2 9 12
GND_FET SH_IN_P3 13 PFM_CH1_SH_IN_N3
SH_IN_N3 15 SNN_PFM_CH1_SH_IN_P4 ADC_IN_P <26>
RV122 1 2 340_0402_1% ON_GEN1@ SH_O1 32 SH_IN_P4 16 SNN_PFM_CH1_SH_IN_N4 @ OVRM@
2
RV123 1 2 634_0402_1% ON_GEN1@ IMON1 7 SH_O1 SH_IN_N4 ADC_IN_P RV1252 1 0_0201_5% CV276 1 2 47P_0402_50V8J 2
SH_O2 2
RV124 1 @ 2 169_0402_1% SH_O3 10 20
RV126 1 @ 2 169_0402_1% BG_REF_OUT 17 SH_O3 DIFF_OUT_P 19 @ CV308 @
SH_O4 DIFF_OUT_N ADC_IN_N 47P_0402_50V8J RV1272 1 0_0201_5% CV277 1 2 47P_0402_50V8J
1 1 1 1 1
0.015U_0402_16V7K
0.015U_0402_16V7K
0.015U_0402_16V7K
0.015U_0402_16V7K
30 PFM_PF_BSOK_R
BS_OK
CV278
CV279
CV280
CV281
RV128 OVRM@
1 @ 2 PFM_ADC_MUX_SEL_R 29 8 IMON2
2 2 2 2 MUX_SEL NC 18 BV_REF RV130 1 GEN2@ 2 0_0201_5%
0_0201_5% NC 21 ADSR0
PFM_ADC_FILTER_EN 28 NC 31 SYNC
ENABLE NC
2
TH1
23 PFM_BG_REF_OUT RV131 1 GEN1@ 2 0_0201_5% PFM_BG_REF_OUT_R 1 2 RV132 RV146
@ @ @ @ PFM_SKIP_R 25 BG_REF_OUT 24 PFM_BS_REF RV134 1 GEN1@ 2 0_0201_5% PFM_BS_REF_R ON_GEN1@ 0_0402_5%
<26> GPIO22_ADC_MUX_SEL SKIP BS_REF 22 ADSR1 1 GEN1@ 2 0_0201_5%
CM_REF_IN
RV194 uPI_GEN2@ ON-SEMISuggest need add RC filter.
237K_0402_1%
1
PFM_ADC_FILTER_MODE 26 33 1 CV285 RV133
MODE_SEL GND
1
2
CV453 OVRM@ OVRM@ +3V_OVRM
RV193 1000P_0402_50V7K RV135
NV Suggest 1
NV Suggest no use IMON PIN 0_0402_5% NCP45492XMNTWG_QFN32_4X4 @ 365K_0402_1%
10K_0402_1%
1000P_0402_50V7K
uPI_GEN2@ 2 GEN1@
uPI PD GND SA0000CQX00
1
@ 2
ON NC Floating
2
1
RV159
+3V_OVRM 10K_0402_1%
Reseve for On-Semi debug ADSR1_R OVRM@
2
1
+3V_OVRM GEN2@
1
RV141 0_0402_5%1 2 RV139
10K_0201_5% RV136
1
@ 681K_0402_1% PFM_PF_BSOK_R
1
RV152 CV309 GEN1@ NV Suggest no use IMON PIN
2
1K_0402_1% 1000P_0402_50V7K
NV Suggest Reseve uPI PD GND
1
GEN1@ OVRM@
PFM_ADC_FILTER_EN 2 ON NC Floating RV198
2
24.9K_0402_1%
PFM_SKIP_R ON_GEN2@
1
2
RV145
10K_0201_5%
3 OVRM@ 3
1
2
CV306
+3V_OVRM +3V_OVRM 1U_0201_6.3V6M
ON_GEN2@
2
1
+3V_OVRM
RV148 RV147
10K_0201_5% 10K_0201_5%
GEN2@ @
2
2
1
RV151 ADSR0 ADSR1

10K_0201_5%
@
1
1
2
RV149 RV150
10K_0201_5% 10K_0201_5%
PFM_ADC_FILTER_MODE @ GEN2@ !" RV200 1 GEN2@ 2 0_0402_5% PFM_BG_REF_OUT
<26> VGA_I2CC_SCL
2
RV201 1 GEN2@ 2 0_0402_5% PFM_BS_REF

<26> VGA_I2CC_SDA
1
RV156
10K_0201_5%
@ RV203 1 @ 2 0_0402_5%
ADSRO(Pin21) <26,103> VGA_I2CC_SCL_PWR
## !"
2
ADSR1(Pin22,) <26,103> VGA_I2CC_SDA_PWR

RV202 1 @ 2 0_0402_5%
OVRM Chip selection GEN2 selection uPI Gen1 strap

UV20 ON_GEN2@ RV101 GEN2@ RV106 GEN2@ RV152 GEN2@
RV104 uPI_GEN1@ RV108 uPI_GEN1@ RV132 uPI_GEN1@
ZZZ uPI_GEN1@
S IC NCP45495XMNTWG QFN 32P MONITOR 0_0402_5% 0_0402_5% 10K_0402_1%
SA0000DUX00 SD028000080 SD028000080 SD043100280 499_0402_1% 499_0402_1% 316K_0402_1%
4 SD034499080 SD034499080 SD034316380 4
UV20 uPI_GEN2@ RV110 GEN2@ RV111 GEN2@ RV112 GEN2@
RV122 uPI_GEN1@ RV123 uPI_GEN1@
X76901BOL23
S IC US5651AQKI WQFN 32P POWER MONITOR 0_0402_5% 0_0402_5% 0_0402_5%
ALT. GROUP PARTS OVRM UPI GN20 G1 GH51Z SA0000DY100 SD028000080 SD028000080 SD028000080 255_0402_1% 475_0402_1%
SD034255080 SD034475080
ZZZ @ UV20 uPI_GEN1@ RV113 GEN2@ RV103 GEN2@ RV728 GEN2@
S IC US5650QQKI WQFN 32P POWER MONITOR 0_0402_5% 0_0402_5% 0_0402_5%

SA0000CMA00 SD028000080 SD028000080 SD028000080 Security Classification Compal Secret Data
UV20 ON_GEN1@ RV132 GEN2@ 2020/11/16 2021/11/16 Title
X76901BOL24
! " # $ %& #%&' ()
ALT. GROUP PARTS OVRM ON GN20 G1 GH51Z S IC NCP45492XMNTWG QFN 32P MONITOR 31.6K_0402_1% AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
SA0000CQX00 SD034316280 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0 0 1.0
A B C D E
A B C D E F G H
2 9 #) , !
9" @ +1.8VSDGPU
+1.8VSDGPU_AON
+1.8VALW
VGA@
VGA@
1 1
22U_0603_6.3V6M
1U_0201_6.3V6M
C2785 1 2 1
1
+1.8VS
4.7U_0402_6.3V6M 1U_0201_6.3V6M UV104
+1.8VS_LS UV12
1 14
CV632
C2784
CV2795
2
2 1 2 VIN1 VOUT1 13 JP@ 2 1
VIN1 VOUT1 1 VIN1
J12 JUMP_43X118 0.1U_0201_10V6K 2
1 R4087 2 1K_0402_5% 1.8VS_ON 3 12 1 2 C2786 VIN2
<39,41,58,78,85,89> SUSP# ON1 CT1 +5VALW
C2787 330P_0402_50V7K 7 6
+5VALW 2 VIN thermal VOUT
1 2 4 11
VBIAS GND
10U_0402_6.3V6M
0.1U_0201_10V6K
CV2792
CV2816 0.1U_0201_10V6K VGA@ 2 1 3 1 1
VBIAS
CV2789 VGA@
5 10 CG340 0.1U_0201_10V6K
ON2 CT2 VGA@ 2 1 1V8_AON_EN_R 4 5
<26,110> 1V8_AON_EN ON GND
6 9 RV507 0_0402_5% 1
VIN2 VOUT2
1
7 8 2 2
VIN2 VOUT2
VGA@
RV413 @ CV2794 AOZ1334DI-01_DFN8-7_3X3
15 @ 1M_0402_5% 0.01U_0402_16V7K VGA@
GPAD 2
EM5209VF DFN 14P DUAL LOAD SW SA000070V00
2
SA00007PM00
VGA@
2 2
3 3
= + = D* /
+PEX_VDD +FBVDDQ +NVVDD1 +3VSDGPU
+5VS
2
1
RV498 VGA@ +5VS RV493 +5VS +5VS
20_0402_5% VGA@ 20_0402_5% RV491 VGA@ RV492 VGA@
2
1_0603_5% 1_0603_5%
RV494 VGA@
1
1
2
2
100K_0402_5%
2
RV496 VGA@ VGA@ RV495 VGA@ RV497
100K_0402_5% 100K_0402_5% 100K_0402_5%
1
VGA@ QV23B VGA@ QV24B

PEX_VDD_EN#
D
2 G QV21B VGA@ QV22B VGA@ PJT138KA_SOT363-6 PJT138KA_SOT363-6
1
1
3
6
S PJT138KA_SOT363-6 D 2N7002KDW_SOT363-6
FBVDDQ_EN# NVVDD1_EN# 3VSDGPU_EN#
D D
5 2 G 2 G
1
G S S
VGA@ QV21A VGA@ QV23A
1
PJT138KA_SOT363-6 S PJT138KA_SOT363-6
4
3
3
PEX_VDD_EN NVVDD1_EN
D D D
5 G VGA@ QV22A 5 G 5 G QV24A
<26,110> PEX_VDD_EN <26,103> NVVDD1_EN <26,39,78> 3VSDGPU_EN
6
S 2N7002KDW_SOT363-6 D S S
PJT138KA_SOT363-6
FBVDDQ_EN 2 VGA@
" @9" @ > <26,108> FBVDDQ_EN " @9" @ > " @9" @ >
4
4
G
4 " @ > S 4
1

GN20E-GPU Power control
A B C D E F G H
5 4 3 2 1
+3VS
0 ) 4A'% 2% 2& +LCDVDD +19VB +INVPW R_B+ EDP_HPD RVE1
Rename
1 2 100K_0201_5%
UVE1 W=60mils
1U_0201_6.3V6M
CVE13
5 1 LVE1 SM01000EJ00 INVTPW M RVE2 1 @ 2 100K_0201_5%
IN OUT HCB2012KF-221T30_0805
1
2
W=60mils 1 2
W=60mils @EMI@
GND 1 1
1 1 CVE16 1 2 220P_0402_50V7K
68P_0402_50V8J
CVE14 @EMI@
1000P_0402_50V7K
CVE15 @EMI@
4 3 CVE12 @EMI@
2 EN OC 0.1U_0201_10V6K BKOFF# CVE17 1 2 220P_0402_50V7K
SM01000EJ00 3000ma
SY6288C20AAC_SOT23-5 CVE11 2 2@
220ohm@100mhz
SA000079400 4.7U_0402_6.3V6M 2 2 RVE3 1 @ 2 10K_0201_5%
D DCR 0.04 D
<8,41> ENVDD Vih=1.5
RD_EDP_TXP0_C
/ / + ;')
CVE1 1 2 .1U_0402_16V7K
<41> RD_EDP_TXP0 RD_EDP_TXN0_C +LCDVDD
CVE2 1 2 .1U_0402_16V7K
<41> RD_EDP_TXN0 RD_EDP_TXP1_C
CVE3 1 2 .1U_0402_16V7K
<41> RD_EDP_TXP1 RD_EDP_TXN1_C
CVE4 1 2 .1U_0402_16V7K
<41> RD_EDP_TXN1 RD_EDP_TXP2_C
CVE5 1 2 .1U_0402_16V7K
CVE6 1 2 .1U_0402_16V7K 1
<41> RD_EDP_TXN2 RD_EDP_TXP3_C +LCDVDD
CVE7 1 2 .1U_0402_16V7K
CVE8 1 2 .1U_0402_16V7K RVE6 10K_0402_5% CVE18
<41> RD_EDP_TXN3
2 @ 1 0.1U_0201_10V6K
2@
<8> EDP_AUXP CVE9 1 2 .1U_0402_16V7K EDP_AUXP_C RVE7 10K_0402_5%
<8> EDP_AUXN CVE10 1 2 .1U_0402_16V7K EDP_AUXN_C 1 @ 2
RVE5 1 RS@ 2 0_0402_5% PANEL_OD#_R

<9> PANEL_OD#
DVE1 1 2
@
+LCDVDD From APU RB751V-40_SOD323-2
RVE21 1 @ 2 100K_0201_5% EDP_AUXN_C

RVE20 1 @ 2 100K_0201_5% EDP_AUXP_C
C C
0') 8'0
LVE3 EMI@ W=60mils JEDP1
+3VS +3VS_CAM 1 2 USB20_N6_L 1
<10> USB20_N6 +INVPW R_B+ 1
2
3 2
RVE8 1 RS@ 2 & */: / <10> USB20_P6
4 3 USB20_P6_L 4 3
4
0_0603_5% 5
/ / + ;') DLM0NSN900HY2D_4P
<8> INVTPW M
INVTPW M 6 5
6
0.1U_0201_10V6K
CVE20
1U_0201_6.3V6M
CVE19
1 1 SM070005U00 BKOFF# 7
+5VS +TS_PW R <58> BKOFF# EDP_HPD 7
8
@ 9 8
+3VS +LCDVDD 9
RVE9 2 @ 1 0_0603_5% 10
2 2 11 10
RVE10 2 1 0_0603_5% +3VS +3VS PANEL_OD#_R 12 11
RVE11 10K_0402_5% 13 12
2 TSI2C@ 1 EDP_AUXN_C 14 13
PU at APU side. 14
EDP_AUXP_C 15
15
2
16
G
0910 TS_I2C_INT# 1 3
To APU RD_EDP_TXP0_C
RD_EDP_TXN0_C
17
18
16
17
APU_TS_I2C_INT# <9> 18
TSI2C@ 19
S
+TS_PW R RD_EDP_TXP1_C 20 19
QVE1 RD_EDP_TXN1_C 21 20
RVE12 1 TSI2C@ 2 10K_0402_5% TS_I2C_INT# 2N7002KW 1N SOT323-3 -D 22 21
RVE13 1 TSI2C@ 2 10K_0402_5% TS_I2C_SCL RD_EDP_TXP2_C 23 22
B
SB000009Q80 23 B
RVE14 1 TSI2C@ 2 10K_0402_5% TS_I2C_SDA RD_EDP_TXN2_C 24
JEDP1_P25 25 24
RD_EDP_TXP3_C 26 25
RD_EDP_TXN3_C 27 26
+1.8VS TS_I2C_INT# RVE15 1 TSI2C@ 2 0_0201_5% JEDP1_P25 JEDP1_P28 28 27
RVE16 1 2 0_0201_5% TS_I2C_SCL 29 28
Pin33 For 3VS_DMIC used TS_I2C_SDA 30 29
31 30
Reserve TS_I2C_RST# 32 31
& */: / +TS_PW R 32
33
TS_I2C_RST# RVE171 TSI2C@ 2 0_0201_5% JEDP1_P28 TS_EN 34 33
<59> TS_I2C_RST# <59> TS_EN 34
PJT138KA_SOT363-6 PU +1.8VS at APU side. RVE181 2 0_0201_5% +3VS_CAM 35 41
35 GND
5
TSI2C@ QVE2A USB20_N6_L 36 42

USB20_P6_L 37 36 GND 43
G
TS_I2C_SCL 3 4 I2C_0_SCL 38 37 GND 44

I2C_0_SCL <9> 38 GND
D
DMIC_CLK_R 39 45
<56> DMIC_CLK_R DMIC_DATA_R 39 GND
40 46
<56> DMIC_DATA_R 40 GND
ACES_50203-04001-002
To APU
2
PJT138KA_SOT363-6
SP010014B10
3
TSI2C@ QVE2B
G
TS_I2C_SDA 6 1 I2C_0_SDA
I2C_0_SDA <9> CONN@
D
Remove USB interface 8/21

DVE4
@EMC@
YSLC05CH_SOT23-3
Remove DVE3 8/25
EDP_RD_HPD RVE191 RS@ 2 0_0402_5% EDP_HPD SCA00000U10
<41> EDP_RD_HPD
1
A A
<8> EDP_HPD
Reserve PD resistor on Redriver side

EDP/CAMERA/DMIC
1.0
5 4 3 2 1
A B C D E
+3VS_DP DP@ +3VALW +3VS_DP

CVD1
0.1U_0201_10V6K UVD2
2 1 5 1
DP@ @ DP@ DP@ DP@ DP@ IN OUT
10U_0402_6.3V6M
1U_0201_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
CVD19
DP@
1 1 1 1 1 1 2 1
GND
CVD2
CVD3
CVD4
CVD5
CVD6
CVD7
SUSP# 4 3
<37,41,58,78,85,89> SUSP# EN OC
DP@ UVD1
2 2 2 2 2 2 1 35 SY6288C20AAC_SOT23-5 2
VCC EQ1 TH42 TP@
6 38 TH40 TP@ DP@
20 VCC EQ0
VCC 0921 change souce to +3VALW, CTRL to SUSP#
1 28 17 I2C_EN_TBT 1
VCC I2C_EN
2 DPEQ1_TBT +3VS +3VS
DP@ CVD20 2 1 .1U_0402_16V7K DP0_TXP0_C 9 DPEQ1 14 DPEQ0_A1_TBT +3VS_DP
<29> DP0_TXP0 DP0_TXN0_C DP0p DPEQ0/A1
DP@ CVD21 2 1 .1U_0402_16V7K 10
<29> DP0_TXN0 DP0n
2
3 TH45 TP@ DP@ QVD1
SSEQ1
1
DP@ CVD22 2 1 .1U_0402_16V7K DP0_TXP1_C 12 11 A0_TBT RVD6 2
<29> DP0_TXP1 DP0_TXN1_C DP1p SSEQ0/A0 Gate
DP@ CVD23 2 1 .1U_0402_16V7K 13 DP@ 1M_0402_5%
<29> DP0_TXN1 DP1n DP0_HPD
RVD1 1
DP@ CVD24 2 1 .1U_0402_16V7K DP0_TXP2_C 15 21 FLIP_TBT_CLK 100K_0402_5% Drain
<29> DP0_TXP2
1
DP@ CVD25 2 1 .1U_0402_16V7K DP0_TXN2_C 16 DP2p FLIP/SCL 3
<29> DP0_TXN2 <10,26> DP0_HPD_APU
2
DP2n Source
2
22 CTL0_TBT_SDA GPU_DP_AUXN_C DP@
DP@ CVD26 2 1 .1U_0402_16V7K DP0_TXP3_C 18 CTL0/SDA GPU_DP_AUXP_C LBSS139W T1G_SC70-3 RVD7
<29>
<29>
DP0_TXP3
DP0_TXN3
DP@ CVD27 2 1 .1U_0402_16V7K DP0_TXN3_C 19 DP3p
DP3n CTL1
23 CTL1_TBT_HPDIN
& 100K_0402_5%
1
DP@ 2 9 #) , !
1
DP0_RD_TXN3 31 34 DP0_RD_TXN2 RVD2
DP0_RD_TXP3 30 RX1n TX1n 33 DP0_RD_TXP2 100K_0402_5%
RX1p TX1p
2
DP0_RD_TXN0 39 37 DP0_RD_TXP1
DP0_RD_TXP0 40 RX2n TX2p 36 DP0_RD_TXN1 +3VS_DP
RX2p TX2n
CONN@ JDP1
8 5 20
RVD3 1 DP@ 2 4.7K_0402_5% 7 SSTXp SSRXp 4 19 DP_PWR
+3VS_DP SSTXn SSRXn GND
DP0_AUXN_C_SW 18
DP0_RD_TXN2 DP@ CVD8 2 1 .1U_0402_16V7K DP0_RD_TXN2_C 17 AUX_CH-
RVD4 1 @ 2 4.7K_0402_5% 29 27 DP0_AUXP_C_SW 16 LAN2-
RESVD1 SBU1 TH43 TP@ AUX_CH+
32 26 TH44 TP@ DP0_RD_TXP2 DP@ CVD9 2 1 .1U_0402_16V7K DP0_RD_TXP2_C 15
2 RESVD2 SBU2 14 LAN2+ 2
24 GPU_DP_AUXP_C 13 GND
DP0_HPD 1 DP@ 2 GPU_DP_HPD_RD 41 AUXp 25 GPU_DP_AUXN_C DP0_RD_TXN3 DP@ CVD102 1 .1U_0402_16V7K DP0_RD_TXN3_C 12 GND
RVD5 0_0402_5% PAD AUXn DP0_RD_TXN1 DP@ CVD112 1 .1U_0402_16V7K DP0_RD_TXN1_C 11 LAN3- 21
DP0_RD_TXP3 DP@ CVD122 1 .1U_0402_16V7K DP0_RD_TXP3_C 10 LAN1- GND 22
TUSB546_QFN40_4X6 LAN3+ GND
1
DP0_RD_TXP1 DP@ CVD132 1 .1U_0402_16V7K DP0_RD_TXP1_C 9 23

8 LAN1+ GND 24
@ DP@ RVD9 1 2 1M_0402_5% 7 GND GND
RVD8 DP_CA_DET 6 GND
100K_0402_5% DP0_RD_TXN0 DP@ CVD142 1 .1U_0402_16V7K DP0_RD_TXN0_C 5 CA_DET
2
4 LAN0-
DP0_RD_TXP0 2 1 DP0_RD_TXP0_C 3 CFG1
DP@ CVD15 .1U_0402_16V7K DP0_HPD 2 LAN0+
+3VS_DP +3VS_DP +3VS_DP 1 HP_DET
20190924 Vender GND
1
I2C_EN_TBT RVD10 1 @ 2 1K_0402_5% A0_TBT RVD11 1 @ 2 1K_0402_5% CTL0_TBT_SDA RVD12 1 @ 2 1K_0402_5% SDAN_613007-020231
1 DP@ 2 1K_0402_5% 1 DP@ 2 1K_0402_5% 1 DP@ 2 1K_0402_5%

DC06000AIB0
RVD13 RVD14 RVD15 RVD16
1M_0402_5%
I2C Programming or pin strap programming select. SSEQ0,SSEQ1 : USB receiver equalizer gain DP@
2
I2C is only disable when this pin is '0' for upstream facing SSTXP/N +3VS_DP
0 : Pin Strap(I2C disable)(Default) F,F(Default)
+ /: /3 ,
R :
F :
1 :
TI test mode(I2C enable at 3.3V)
I2C enabled at 1.8V
I2C enabled at 3.3V
When I2C_EN is not '0' SSEQ0 sets I2C adress CTL1_TBT_HPDIN RVD17
RVD18
1 DP@
1 @
2 1K_0402_5%
2 1K_0402_5%
teknisi-indonesia
+3VS_DP +3VS_DP
DPEQ1_TBT RVD19 1 @ 2 1K_0402_5% FLIP_TBT_CLK RVD20 1 @ 2 1K_0402_5%

3 3
RVD21 1 DP@ 2 1K_0402_5% RVD22 1 DP@ 2 1K_0402_5%
DPEQ0,DPEQ1 : DP Receiver equalization gain

F,F(Default)
When I2C_EN is not '0' DPEQ0 sets I2C adress +3VSDGPU
+5VS
+3VS_DP DP@ CVD16
1 2
DPEQ0_A1_TBT RVD23 1 DP@ 2 1K_0402_5%
1
100K_0402_5%
DP@ RVD25
100K_0402_5%
DP@ RVD26
100K_0402_5%
DP@ RVD27
0.1U_0201_10V6K
RVD24 1 @ 2 1K_0402_5%
DP0_AUXP 1 6 DP0_AUXP_PROT
D
<29> DP0_AUXP
S
2
DP@ DP@
+5VS QVD2A UV42
2N7002KDW _SOT363-6 16
Vcc
G
4 DP0_AUXP_C_SW
2
1A
1
DP0_AUXP_PROT DP@ CVD17 1 2 0.1U_0201_10V6K DP0_AUXP_C 2 7 DP0_AUXN_C_SW

RVD28 DP_AUX_PROT 3 1B1 2A 9
1B2 3A
100K_0402_5%
+5VS 10K_0402_5% 1 DP0_AUXN_PROT DP@ CVD18 1 2 0.1U_0201_10V6K DP0_AUXN_C 5 12
2B1 4A
1
DP@ DP@ 6
2B2
RVD29
C2776 11 15
2
3B1 OE
1
DP_AUX_PROT 0.01U_0201_6.3V7K 10 1 DP_CA_DET

G
RVD30 2 14 3B2 S
10K_0402_5% 13 4B1 8 $
2
DP@ 4B2 GND 17 DP@
T-PAD %
1
C DP0_AUXN 4 3 DP0_AUXN_PROT
S
<29> DP0_AUXN
2
4 4
D
2 DP@ SN74CBT3257CRGYR_QFN16_4X3P5
B QVD3 QVD2B
E MMBT3904_SOT23-3 2N7002KDW _SOT363-6
3
DP@
1
R521 C
1 2 2
<26,37,78> 3VSDGPU_EN B DP@ Security Classification Compal Secret Data Compal Electronics, Inc.
10K_0402_5% E QVD4 2020/11/16 2021/11/16 Title
3
DP@ MMBT3904_SOT23-3
DP CONN (TUSB546)
A B C D E
A B C D E
% $. # ,/+ 0 )' " ) 0 , 1 '+!) +!2

+1.1V_HDMI
HDMI_RT_L_TX_P2 RVH34 1 2 0_0201_5% HDMI_RT_TX_P2

CVH17 +5VALW +3VS +VDD33_HDMI
1U_0201_6.3V6M W=40mils
22P_0402_50V8J
1
2 1 LVH2 LVH11 @EMI@ +5VS +HDMI_5V_OUT
1
10U_0402_6.3V6M
10U_0402_6.3V6M
RVH9 1 2 Cap. place near pin 3 4
UVH2 3.83K_0402_1% BLM18KG331SN1D_2P
CVH18
0.1U_0201_10V6K
4.7U_0402_6.3V6M
UVH3
0.01U_0402_16V7K
0.01U_0402_16V7K
+3VS 10 1 1 1 1 1 1 1 1
0.1U_0201_10V6K
9 VDD VOUT 2 2 2 1
CVH25
CVH19
CVH22
@
2
CVH24 8 VIN VOUT 3 3
10U_0402_6.3V6M 7 VIN VOUT 4 S COM FI_ PANASONIC EXC14CH900U OUT
CVH20
CVH29
CVH21
CVH23
VIN ADJ/NC 2 2 2 2 2 2 2 1
2 1 6 5 SM070007300 DLM0NSN900HY2D_4P 1
1 EN PGOOD HDMI_RT_L_TX_N2 RVH35 1 2 0_0201_5% HDMI_RT_TX_N2 IN CVH30
1
1
11 2 0.1U_0201_10V6K
PAD RVH10 GND 2
RT9059GQW_WDFN10_3X3 10K_0402_1%
SA000071S00 AP2330W-7_SC59-3
S IC RT9059GQW WDFN 10P LDO
2
Vout = 0.8 * ((3.83K+10K)/10K) = 1.1064V +1.8VSDGPU_AON +VDDIO_HDMI
LVH1 HDMI_RT_L_TX_P1 RVH36 1 2 0_0201_5% HDMI_RT_TX_P1
1 2 Cap. place near pin
BLM18KG331SN1D_2P DVH1
4.7U_0402_6.3V6M
0.01U_0402_16V7K
LVH12 @EMI@ HDMI_RT_HPD 6 3 HDMI_CTRL_DAT
1 1 1
0.1U_0201_10V6K
+1.1V_HDMI +VDD11_HDMI 3 4 I/O4 I/O2
CVH27
LVH3 Cap. place near pin
CVH26
CVH28
1 2 2 2 2 2 1 5 2
BLM18KG331SN1D_2P VDD GND
S COM FI_ PANASONIC EXC14CH900U
0.1U_0201_10V6K
0.1U_0201_10V6K
4.7U_0402_6.3V6M
0.01U_0402_16V7K
0.01U_0402_16V7K
1 1 1 1 1 SM070007300 DLM0NSN900HY2D_4P +HDMI_5V_OUT

HDMI_RT_L_TX_N1 RVH37 1 2 0_0201_5% HDMI_RT_TX_N1 HDMI_CTRL_CLK 4 1
I/O3 I/O1
CVH31
AZC099-04S.R7G_SOT23-6
2 2 2 2 2 @ESD@
CVH32
CVH33
CVH34
CVH35
+VDD33_HDMI
+VDD11_HDMI DVH2 @ESD@
UVH1 HDMI_RT_CLKN 1 9 HDMI_RT_CLKN
+VDDA11_HDMI 19 1
+VDDRX11_HDMI +VDDRX11_HDMI 41 VDD11 VDD33 13 HDMI_RT_CLKP 2 8 HDMI_RT_CLKP
LVH4 25 VDD11 VDD33
1 2 Cap. place near pin +VDDTX11_HDMI 15 VDDA11 HDMI_RT_TX_N0 4 7 HDMI_RT_TX_N0
BLM18KG331SN1D_2P 46 VDDRX11 37 HDMI_RT_C_TX_P2 CVH9 1 2 0.22U_0201_6.3V HDMI_RT_L_TX_P2
0.1U_0201_10V6K
0.1U_0201_10V6K
4.7U_0402_6.3V6M
0.01U_0402_16V7K
0.01U_0402_16V7K
26 VDDRX11 OUT_D2p 36 HDMI_RT_C_TX_N2 CVH10 1 2 0.22U_0201_6.3V HDMI_RT_L_TX_N2 HDMI_RT_TX_P0 5 6 HDMI_RT_TX_P0

1 1 1 1 1 VDDTX11 OUT_D2n
+VDDIO_HDMI 32
38 VDDTX11 34 HDMI_RT_C_TX_P1 CVH11 1 2 0.22U_0201_6.3V HDMI_RT_L_TX_P1
1.8V VDDTX11 OUT_D1p
43 33 HDMI_RT_C_TX_N1 CVH12 1 2 0.22U_0201_6.3V HDMI_RT_L_TX_N1
2 2 2 2 2 TMDS DP VDDIO OUT_D1n 3
CVH36
CVH37
CVH38
CVH39
CVH40
CVH1 1 2 0.22U_0201_6.3V HDMI_TX_P2 2 31 HDMI_RT_C_TX_P0 CVH13 1 2 0.22U_0201_6.3V HDMI_RT_L_TX_P0

<29> GPU_HDMI_P2 HDMI_TX_N2 IN_D2p OUT_D0p HDMI_RT_C_TX_N0 CVH14 HDMI_RT_L_TX_N0
2 CVH2 1 2 0.22U_0201_6.3V 3 30 1 2 0.22U_0201_6.3V TVWDF1004AD0_DFN9 2
TX2 DP0 <29> GPU_HDMI_N2 IN_D2n OUT_D0n
+VDDA11_HDMI CVH3 1 2 0.22U_0201_6.3V HDMI_TX_P1 5 28 HDMI_RT_C_CLKP CVH15 1 2 0.22U_0201_6.3V HDMI_RT_L_CLKP SC300003Z00
<29> GPU_HDMI_P1 HDMI_TX_N1 IN_D1p OUT_CLKp HDMI_RT_C_CLKN HDMI_RT_L_CLKN
LVH5 TX1 DP1 CVH4 1 2 0.22U_0201_6.3V 6 27 CVH16 1 2 0.22U_0201_6.3V
1 2 Cap. place near pin <29> GPU_HDMI_N1 IN_D1n OUT_CLKn DVH3 @ESD@
BLM18KG331SN1D_2P 1 1 1 CVH5 1 2 0.22U_0201_6.3V HDMI_TX_P0 8 HDMI_RT_TX_N1 1 9 HDMI_RT_TX_N1
0.1U_0201_10V6K
4.7U_0402_6.3V6M
0.01U_0402_16V7K
<29> GPU_HDMI_P0 HDMI_TX_N0 IN_D0p HDMI_CTRL_CLK

TX0 DP2 CVH6 1 2 0.22U_0201_6.3V 9 40
<29> GPU_HDMI_N0 IN_D0n OUT_SCL HDMI_CTRL_DAT HDMI_RT_TX_P1 HDMI_RT_TX_P1
39 2 8
CVH7 1 2 0.22U_0201_6.3V HDMI_CLKP 11 OUT_SDA
2 2 2 TXC DP3 <29> GPU_HDMI_CLKP HDMI_CLKN IN_CLKp HDMI_RT_TX_N2 HDMI_RT_TX_N2
CVH8 1 2 0.22U_0201_6.3V 12 4 7
CVH41
CVH42
CVH43
<29> GPU_HDMI_CLKN IN_CLKn @ PVT

RVH11 1 2 0_0402_5% GPU_HDMI_CTRL_CLK_R 45 42 HDMI_HPD_R RVH12 1 2 1K_0402_5% HDMI_HPD HDMI_RT_TX_P2 5 6 HDMI_RT_TX_P2
<29> GPU_HDMI_CTRL_CLK IN_SCL HPD_SRC
RVH13 1 2 0_0402_5% GPU_HDMI_CTRL_DAT_R 44 29 HDMI_RT_HPD
+VDDTX11_HDMI <29> GPU_HDMI_CTRL_DAT IN_SDA HPD_SNK
LVH6
1 2 Cap. place near pin HDMI_DCIN 7 20 HDMI_ISNK PD 3
BLM18KG331SN1D_2P 1.8V internal PU HDMI_EQ 16 DC_IN ISNK 35 HDMI_PD RVH14 1 2 4.7K_0402_5% L: Normal Operation
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
4.7U_0402_6.3V6M
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
HDMI_I2C_ADDR 4 EQ PD 14 HDMI_REXT RVH15 1 2 4.99K_0402_1% H: Chip power-down TVWDF1004AD0_DFN9

1 1 1 1 1 1 1 I2C_ADDR REXT
PVT
*+, ,* ! ) - '" SC300003Z00
21 18 HDMI_CSCL TP@
2 2 2 2 2 2 2 +VDD33_HDMI CFG0 CSCL TH46
2 RVH41 1 HDMI_CFG1 22 17 HDMI_CSDA TP@
CVH44
CVH45
CVH46
CVH47
CVH48
CVH49
CVH50
CFG1 CSDA TH47

1K_0402_5% 23
RVH16 1 2HDMI_CFG3 24 CFG2
4.7K_0402_5% 10 CFG3 47
CFG4 EPAD
+3VS
PS8419GTR-A1_QFN46_4P5X6P5
HDMI_RT_L_TX_P0 RVH38 1 2 0_0201_5% HDMI_RT_TX_P0 +HDMI_5V_OUT
2 RVH22 1
20K_0402_1%
@
LVH13 @EMI@ HDMI_CTRL_DAT RVH17 1 2 2K_0402_1%
3 4 HDMI_CTRL_CLK RVH18 1 2 2K_0402_1% +1.8VSDGPU_AON
HDP Deterct +3VS +1.8VS GPU_HDMI_CTRL_CLK RVH20 1 @ 2 2.2K_0402_5%
2 1 GPU_HDMI_CTRL_DAT RVH21 1 @ 2 2.2K_0402_5%
HDMI_EQ
2
3 3
S COM FI_ PANASONIC EXC14CH900U
2 RVH27 1
EQ SM070007300 DLM0NSN900HY2D_4P
1K_0402_5%
L0: Pull down with 1k, RVH19 HDMI_RT_L_TX_N0 RVH39 1 2 0_0201_5% HDMI_RT_TX_N0
@ 1M_0402_5% HDMI_HPD
EQ=8dB
L1: Pull down with 20k
1
EQ=7dB RVH40
G
L2: Floating (default) 6 1 1 2 HDMI_RT_HPD

EQ=5dB <9,10,26> HDMI_HPD_APU
D
QVH1B
L3: Pull up with 20k PJT138KA_SOT363-6 0_0402_5% PVT
2
EQ=3dB 2 9 #) , ! RVH24 1 2 HDMI_RT_L_CLKP RVH32 1 2 0_0201_5% HDMI_RT_CLKP

L4:Pull up with 1k 0_0402_5% @ RVH26
EQ=1dB 100K_0402_5% +HDMI_5V_OUT HDMI connector
RY11 design guide rev2.0 LVH10 @EMI@ CONN@
+3VS use 20K pull down. 3 4 JHDMI1
1
3
HDMI_RT_HPD 19
5 G
D
QVH1A 18 HP_DET
+5V
1
S
PJT138KA_SOT363-6 2 1 17
HDMI_CTRL_DAT 16 DDC/CEC_GND
4
@ RVH30 S COM FI_ PANASONIC EXC14CH900U HDMI_CTRL_CLK 15 SDA

4.7K_0402_5% 14 SCL
SM070007300 DLM0NSN900HY2D_4P
HDMI_RT_L_CLKN RVH33 1 2 0_0201_5% HDMI_RT_CLKN 13 Reserved
2
HDMI_DCIN HDMI_RT_CLKN 12 CEC 20

11 CK- GND 21
CK_shield GND
1
HDMI_RT_L_TX_N0 RVH1 1 2 649_0201_1% HDMI_RT_CLKP 10 22

HDMI_RT_L_TX_P0 RVH2 1 2 649_0201_1% HDMI_RT_TX_N0 9 CK+ GND 23
&
RVH31 HDMI_RT_L_TX_N1 RVH3 1 2 649_0201_1% 8 D0- GND
" '() "! & & ('*
4.7K_0402_5% HDMI_RT_L_TX_P1 RVH4 1 2 649_0201_1% HDMI_RT_TX_P0 7 D0_shield
% " '() "! & & ('*
HDMI_RT_L_TX_N2 RVH5 1 2 649_0201_1% HDMI_RT_TX_N1 6 D0+
2
HDMI_RT_L_TX_P2 RVH6 1 2 649_0201_1% 5 D1-

HDMI_RT_L_CLKN RVH7 1 2 649_0201_1% HDMI_RT_TX_P1 4 D1_shield
HDMI_ISNK
HDMI_RT_L_CLKP RVH8 1 2 649_0201_1% HDMI_RT_TX_N2 3 D1+

+1.8VSDGPU_AON 2 D2-
HDMI_RT_TX_P2 1 D2_shield
0.1U_0201_10V6K
D2+
+3VS ACON_HMR2E-AK120D
DC232000Y00
CVH51
1
4 4
5
1
@ GPU_HDMI_CTRL_CLK 4 3 HDMI_CTRL_CLK 2
S
RVH25 QVH2A
4.7K_0402_5% PJT138KA_SOT363-6
@
2
HDMI_I2C_ADDR
G
1
GPU_HDMI_CTRL_DAT 1 6 HDMI_CTRL_DAT
S
I2C ADDR QVH2B

L: 0x10 - 0x2F (Default) RVH29 PJT138KA_SOT363-6
M: 0x30 - 0x4F 4.7K_0402_5%
H: 0x90 - 0x9f and 0xD0 - 0xDF 3ohm/10pF @ Issued Date 2020/11/16 Deciphered Date 2021/11/16 Title
HDMI CONN.
2
A B C D E
5 4 3 2 1
+3VS +3V_eDPRD
1012 check Ti if need +3V_eDPRD
LV3
1 2 +3V_eDPRD CTL1_HPDIN RV700 1 2 1K_0402_5%
@
PBY160808T-600Y-N_2P I2C_EN RV701 1 2 1K_0402_5% @
RV702 1 2 1K_0402_5%
RV703 1 2 1K_0402_5%
+3V_eDPRD
D I2C Programming or pin strap programming select. @ D
CTL0_EDPRD_SDA RV704 1 2 1K_0402_5%
I2C is only disable when this pin is '0'
0 : Pin Strap(I2C disable)(Default)
R : TI test mode(I2C enable at 3.3V) RV705 1 2 1K_0402_5%
Rerserve for 3V power supply F : I2C enabled at 1.8V
1 : I2C enabled at 3.3V
+5VALW +3V_eDPRD
@
FLIP_EDPRD_CLK RV707 1 2 1K_0402_5%
+3V_eDPRD
1 UV44
2.2U_0402_6.3V6M
CV707 RV706 1 2 1K_0402_5%
1 5
VIN VOUT
2 2
1U_0201_6.3V6M
GND 1
CV704
3 4
EN NC +3V_eDPRD
G9091-330TA1U_SC70-5 2 @
@ DPEQ0_A1_EDPRD RV708 1 2 1K_0402_5%
RV720 1 @ 2 0_0201_5% +3VSEDPRD_ON

<37,39,58,78,85,89> SUSP#
RV709 1 2 1K_0402_5%
RV723 1 @ 2 0_0201_5% 1
<8,38> ENVDD
@ PVT change 0,0
CV703 +3V_eDPRD
C 0.1U_0201_10V6K @ C
2 DPEQ1_EDPRD RV710 1 2 1K_0402_5%
RV712 1 2 1K_0402_5%
+3V_eDPRD DPEQ0,DPEQ1 : DP Receiver equalization gain

F,F(Default)
When I2C_EN is not '0' DPEQ0 sets I2C adress
10U_0402_6.3V6M
1U_0201_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
1 1 1 1 1 1
CV715 CV700 CV705 CV702 CV701 CV706
+3V_eDPRD
@
2 2 2 2 2 2
A0_EDPRD RV711 1 2 1K_0402_5%
@
RV713 1 2 1K_0402_5%
UV43
1 35 TH2 TP@
6 VCC EQ1 38
VCC EQ0 TH3 TP@
20 SSEQ0,SSEQ1 : USB receiver equalizer gain
28 VCC 17 I2C_EN
VCC I2C_EN for upstream facing SSTXP/N
2 DPEQ1_EDPRD F,F(Default)
EDP_TXP0_C DPEQ1 DPEQ0_A1_EDPRD
B <8> EDP_TXP0
CV712 1 2 .1U_0402_16V7K 9
DP0p DPEQ0/A1
14 When I2C_EN is not '0' SSEQ0 sets I2C adress B
CV709 1 2 .1U_0402_16V7K EDP_TXN0_C 10
<8> EDP_TXN0 DP0n 3 TH4 TP@
CV711 1 2 .1U_0402_16V7K EDP_TXP1_C 12 SSEQ1 11 A0_EDPRD
<8> EDP_TXP1 EDP_TXN1_C DP1p SSEQ0/A0
CV710 1 2 .1U_0402_16V7K 13
<8> EDP_TXN1 DP1n
CV713 1 2 .1U_0402_16V7K EDP_TXP2_C 15 21 FLIP_EDPRD_CLK
<8> EDP_TXP2 EDP_TXN2_C DP2p FLIP/SCL
CV714 1 2 .1U_0402_16V7K 16
<8> EDP_TXN2 DP2n CTL0_EDPRD_SDA
22
CV716 1 2 .1U_0402_16V7K EDP_TXP3_C 18 CTL0/SDA
<8> EDP_TXP3 EDP_TXN3_C DP3p CTL1_HPDIN
CV708 1 2 .1U_0402_16V7K 19 23
<8> EDP_TXN3 DP3n CTL1
+3V_eDPRD
RD_EDP_TXN3 31 34 RD_EDP_TXN2
<38> RD_EDP_TXN3 RX1n TX1n RD_EDP_TXN2 <38>
RD_EDP_TXP3 30 33 RD_EDP_TXP2
<38> RD_EDP_TXP3 RX1p TX1p RD_EDP_TXP2 <38>
2
RD_EDP_TXN0 39 37 RD_EDP_TXP1 RV717
<38> RD_EDP_TXN0 RX2n TX2p RD_EDP_TXP1 <38>
RD_EDP_TXP0 40 36 RD_EDP_TXN1 100K_0201_5%
<38> RD_EDP_TXP0 RX2p TX2n RD_EDP_TXN1 <38>
@
1
+3V_eDPRD 8 5
RV714 1 2 4.7K_0402_5% 7 SSTXp SSRXp 4 RD_EDP_AUXN
SSTXn SSRXn RD_EDP_AUXP
@
1
RV715 1 2 4.7K_0402_5% 29 27 TH5 TP@
32 RESVD1 SBU1 26 RV718
RESVD2 SBU2 TH6 TP@
100K_0201_5%
24 RD_EDP_AUXP
EDP_RD_HPD 41 AUXp 25 RD_EDP_AUXN @
<38> EDP_RD_HPD
2
PAD AUXn
A A
TUSB546_QFN40_4X6
1
RV719
@ 100K_0402_5%

2
Reserve
1.0
5 4 3 2 1
5 4 3 2 1
+3VS_TYPEC
+3VS RT500 +3VS_TYPEC
0_0603_5% UT1
1 RS@ 2
+3VALW 1 14 TYPEC_DCBOOST#
13 VDD33 PS 5 TYPEC_EN EN Pin need check
1 2 VDD33 EN 7 TYPEC_MODE +3VS_TYPEC
0_0603_5% NC 24 TYPEC_RSVD1
RT501 USBC0_RDRX_DTX_N1 20 NC
1 1 1 RX2N
1
10U_0402_6.3V6M
CT506
0.1U_0201_10V6K
CT507
0.1U_0201_10V6K
CT508
@ USBC0_RDRX_DTX_P1 19 From APU
RX2P 12 USBC0_ARX_C_RD_DTX_P1 0.33U_0402_10V6K 2 1 CT504
USB3.2 / PCIe GEN 2 TX2P USBC0_ARX_C_RD_DTX_N1 0.33U_0402_10V6K USBC0_ARX_DTX_P1 <10>
To MUX 11 2 1 CT503 RT231
2 2 2 USBC0_RDTX_DRX_P1 ReDriver TX2N USBC0_ARX_DTX_N1 <10>
22 1K_0402_5%
D USBC0_RDTX_DRX_N1 23 TX1P D
2
TX1N 9 USBC0_ATX_C_RD_DRX_P1 0.22U_0402_16V7K 2 1 CT502
RX1P USBC0_ATX_C_RD_DRX_N1 0.22U_0402_16V7K USBC0_ATX_DRX_P1 <10> TYPEC_EN
8 2 1 CT501
TYPEC_CFG1 RXIN USBC0_ATX_DRX_N1 <10>
4
TYPEC_CH1_EQ1 2 SW1
EQ1 1
TYPEC_CH1_EQ2 3 CT505
+3VS_TYPEC DG1 6 0.22U_0402_16V7K
FH51S GND
pop RT853 by vender suggestion 10
+3VS_TYPEC TYPEC_CFG2 15 GND 18 2
TYPEC_CH2_EQ1 16 SW2 GND 21
TYPEC_CH2_EQ2 17 DG2 GND 25
EQ2 EPAD
1
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
RT861
RT863
RT865
RT867
RT869
1
1
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
@ @ @ @ 4.7K_0402_5% GL9901T-OGY11_QFN24_4X4
RT855
RT857
RT859
RT853
SA0000D8810
@ @ @
2
TYPEC_CFG1
2 3 4 15 17 16 14
2
TYPEC_CH1_EQ1 TYPEC_CFG2 !(3!)")() '+ ) $$$$ $$

TYPEC_CH1_EQ2 TYPEC_MODE
TYPEC_CH2_EQ1 TYPEC_RSVD1
SW1 EQ1 DG1 SW2 EQ2 DG2 PS
TYPEC_CH2_EQ2 TYPEC_DCBOOST#
F F F F F F H
1
1
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
RT854
RT856
RT858
RT860
RT862
RT864
RT866
RT868
RT870
@ @ @ @ @ @ @ @ @
+5VALW +5VALW_MUX
2
2
UT5
5 1
IN OUT
10U_0402_6.3V6M
0.1U_0201_10V6K
2 1 1
C GND C
CT210
CT211
RB82 1 2 MUX_EN 4 3
<58,72> USB_EN EN OC
0_0201_5%
RB81 1 @ 2 SY6288C20AAC_SOT23-5 2 2
<59> EC_TYPEC_EN
0_0201_5%
Close to Pin19
UT2 Rename for naming rule
VMON 17 12 CC1_VCONN CC1_VCONN CT513 1 2 220P_0402_50V8J

VMON CC1 CC1_VCONN <43>
14 CC2_VCONN CC2_VCONN CT514 1 2 220P_0402_50V8J
CC2 CC2_VCONN <43>
OCP_DET# 16 FH51S
+5VALW_MUX +USB3_VCCC <43> OCP_DET# OCP_DET
TX change to 0.22u
USBC_EN 15
<43> USBC_EN VBUS_EN (Vender suggestion)
Type-C Port Side
11 USBC0_CC_TX_P2 CT44 1 2 0.22U_0402_16V7K USBC0_CC_TX_P2_C
C_TX2_1P/2N USBC0_CC_TX_P2_C <43>
1
From Re-driver To VBUS PWR EN System side 10 USBC0_CC_TX_N2 CT45 1 2 0.22U_0402_16V7K USBC0_CC_TX_N2_C
C_TX2_1N/2P USBC0_CC_TX_N2_C <43>
RT154
RT152 200K_0402_1% USBC0_RDRX_DTX_P1 CT40 1 2 0.33U_0402_10V6K USBC0_RDRX_C_DTX_P1 4
4.7K_0402_5% USBC0_RDRX_DTX_N1 CT41 1 2 0.33U_0402_10V6K USBC0_RDRX_C_DTX_N1 5 SSRX_1P/2N 24 USBC0_CC_RX_P2 CT46 1 2 0.33U_0402_10V6K USBC0_CC_RX_P2_C
SSRX_1N/2P C_RX2_1P/2N USBC0_CC_RX_P2_C <43>
1 USBC0_CC_RX_N2 CT47 1 2 0.33U_0402_10V6K USBC0_CC_RX_N2_C
USBC0_CC_RX_N2_C <43>
2
OCP_DET# VMON C_RX2_1N/2P

1
USBC0_RDTX_DRX_P1 CT42 1 2 0.22U_0402_16V7K USBC0_RDTX_C_DRX_P1 6 0! & 1 23 8 USBC0_CC_TX_P1 CT48 1 2 0.22U_0402_16V7K USBC0_CC_TX_P1_C

USBC0_RDTX_DRX_N1 SSTX_1P/2N C_TX1_1P/2N USBC0_CC_TX_P1_C <43>
RT153 RT155 CT43 1 2 0.22U_0402_16V7K USBC0_RDTX_C_DRX_N1 7 9 USBC0_CC_TX_N1 CT49 1 2 0.22U_0402_16V7K USBC0_CC_TX_N1_C
SSTX_1N/2P C_TX1_1N/2P USBC0_CC_TX_N1_C <43>
10K_0402_1% 10K_0402_1%
B B
FH51S 2 USBC0_CC_RX_P1 CT50 1 2 0.33U_0402_10V6K USBC0_CC_RX_P1_C
USBC0_CC_RX_P1_C <43>
2
C_RX1_1P/2N 3 USBC0_CC_RX_N1 CT51 1 2 0.33U_0402_10V6K USBC0_CC_RX_N1_C

TX change to 0.22u C_RX1_1N/2P USBC0_CC_RX_N1_C <43>
(Vender suggestion) PLUG_ORI 23
M1 21 GPIO
M0 22 CURRENT_M1
CURRENT_M0
+3VO_MUX +3VO_MUX USBC0_CC_RX_P2_C
USBC0_CC_RX_N2_C
VCON_IN
LDO_3V3
18
REXT
1
2
5V_IN
1
1
RT163 25 RT164 RT165

RT156 @ 6.2K_0402_1% E-PAD 220K_0201_1% 220K_0201_1%
10K_0402_5% RT158 RT160 RTS5441E-GRT_QFN24_4X4
20
19
13
10K_0402_5% 10K_0402_5%
2
1
2
2
+3VO_MUX +5VALW_MUX
M0 1 RS@ 2
PLUG_ORI TYPEC_1P5A <43,58> USBC0_CC_RX_P1_C
RT162 0_0402_5%
M1 USBC0_CC_RX_N1_C
1 1
CT52 CT53
4.7U_0402_6.3V6M 0.1U_0201_10V6K
1
2
1
2 2 RT166 RT167
RT159 @ RT161 @
Close to Pin13 220K_0201_1% 220K_0201_1%
RT157 10K_0402_5% 10K_0402_5%
10K_0402_5%
2
1
2
A A
! !" # $% & '
,- . - . +
+ $ "/ )
$ "( )* +
confirm realtek hand-shake Issued Date 2020/11/16 Deciphered Date 2021/11/16 Title
GL9901T / RTS5441E
1.0
5 4 3 2 1
5 4 3 2 1
+5VALW +USB3_VCCC
RSET
1
1
0.1U_0201_10V6K
0.1U_0402_25V6
22U_0805_25V6M
22U_0805_25V6M
1 1 1 1
CT71
CT72 @
CT73 @
CT74 @
CT70 + RT172 RT173 RT174
150U_B2_6.3VM_R35M 6.2K_0402_5% 4.3K_0402_5% 8.2K_0402_5%
SGA00009M00
2 2 2 2 2
% 0, ,4#4 $
3 2
D D
UT6 D ,- . - ,- . 789:
6 1 5 TYPEC_3A <58>
IN OUT G
4
RSET 5 2 S QT3B
4
SET GND 1 @ 2 2N7002KDW _SOT363-6
OCP_DET# <42>
6
RT171 0_0402_5% D 45
4 3 2 TYPEC_1P5A <42,58>
<42> USBC_EN EN FLAG G
6
1
SY6861B1ABC_TSOT23-6 1
RT170 S QT3A
1
47K_0402_5% ; 10 # CT75 2N7002KDW _SOT363-6
0.1U_0201_10V6K
-< 1 $ < 7 % 0, ,4#4 $ : 2 @
2
DT4 ESD@
DT1 ESD@ CC1_VCONN 1 9 CC1_VCONN
USBC0_CC_TX_P1_C 1 9 USBC0_CC_TX_P1_C
<42> USBC0_CC_TX_P1_C TBTA_SBU2 TBTA_SBU2
2 8
USBC0_CC_TX_N1_C 2 8 USBC0_CC_TX_N1_C
<42> USBC0_CC_TX_N1_C TBTA_SBU1 TBTA_SBU1
4 7
USBC0_CC_RX_N2_C 4 7 USBC0_CC_RX_N2_C
<42> USBC0_CC_RX_N2_C CC2_VCONN CC2_VCONN
C 5 6 C
USBC0_CC_RX_P2_C 5 6 USBC0_CC_RX_P2_C
<42> USBC0_CC_RX_P2_C
3 Gen2 ESD
3
TVW DF1004AD0_DFN9
TVW DF1004AD0_DFN9 SC300006T00
SC300006T00 Gen2 ESD AZ176S-04F.R7G
AZ176S-04F.R7G
DT3 ESD@
USB20_P0_L 1 9 USB20_P0_L
DT2 ESD@
USBC0_CC_TX_P2_C 1 9 USBC0_CC_TX_P2_C USB20_N0_L 2 8 USB20_N0_L
<42> USBC0_CC_TX_P2_C
USBC0_CC_TX_N2_C 2 8 USBC0_CC_TX_N2_C 4 7
<42> USBC0_CC_TX_N2_C
USBC0_CC_RX_N1_C 4 7 USBC0_CC_RX_N1_C 5 6
<42> USBC0_CC_RX_N1_C
USBC0_CC_RX_P1_C 5 6 USBC0_CC_RX_P1_C
<42> USBC0_CC_RX_P1_C
3 Gen2 ESD
+USB3_VCCC +USB3_VCCC
3 TVW DF1004AD0_DFN9
SC300006T00
TVW DF1004AD0_DFN9 AZ176S-04F.R7G
SC300006T00
AZ176S-04F.R7G Gen2 ESD JUSBC1 CONN@
A1 B12
B GND GND B
USBC0_CC_TX_P1_C A2 B11 USBC0_CC_RX_P1_C
USBC0_CC_TX_N1_C A3 SSTXP1 SSRXP1 B10 USBC0_CC_RX_N1_C
0.1U_0402_25V6 2 1 CT510 SSTXN1 SSRXN1
A4 B9 CT82 1 2 0.1U_0402_25V6
FH51S VBUS VBUS
1
Remove RC CT90 A5 B8 TBTA_SBU2
<42> CC1_VCONN CC1 RFU2
10U_0603_25V6M
LT1 EMI@ USB20_P0_L A6 B7 USB20_N0_L
2 1 USB20_P0_L 2 USB20_N0_L A7 DP1 DN2 B6 USB20_P0_L
<10> USB20_P0 2 1 DN1 DP2
3
2
TBTA_SBU1 A8 B5
RFU1 CC2 CC2_VCONN <42>
3 4 USB20_N0_L 0.1U_0402_25V6
<10> USB20_N0 3 4 2 1 CT81 A9 B4 CT83 1 2 0.1U_0402_25V6
DLM0NSN900HY2D_4P DT5 ESD@ VBUS VBUS
PESD24VS2UT_SOT23-3 USBC0_CC_RX_N2_C A10 B3 USBC0_CC_TX_N2_C
$4$$$5 $$ SCA00004500 USBC0_CC_RX_P2_C A11 SSRXN2 SSTXN2 B2 USBC0_CC_TX_P2_C
1
SSRXP2 SSTXP2
A12 B1
GND GND
1
2 GND 7
3 GND GND 8
4 GND GND 9
5 GND GND 10
6 GND GND
GND
A
SINGA_2UB3C02-008111F A
DC23300TOA0
SINGA_2UB3C02-008111F_24P-T
CC1_VCONN & CC2_VCONN need 20miil trace width.
TypeC Conn.
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
A B C D E
A, 0 8 0912 +1.8VALW
UW 8 SA0000BIO00
+3VALW +1.8VALW +3V_W LAN
5
NL17SZ07DFT2G_SC70-5
1
1
P
NC 4 PCM_LRCLK RW 31 RW 29
Y
1
+3V_W LAN PCM_LRCLK_R 2 0_0402_5% @ 0_0402_5% @
60mil A
G
+3VS RW 1
@ @ 10K_0402_5% @
2
G
RW 30 1 2 0_0805_5% RW 26 1 @ 2 10K_0402_5%
@
2
+3VALW APU_BT_W AKE#_L 3 1
W=60mils +1.8VALW APU_BT_W AKE# <9>
D
1 1
UW 1 RW 27 1 @ 2 10K_0402_5%
5 1 UW 7 SA0000BIO00 QW 1
IN OUT
5
1U_0201_6.3V6M
CW7
NL17SZ07DFT2G_SC70-5 2N7002KW 1N SOT323-3 -D
22U_0603_6.3V6M
1 2 1 SB000009Q80
0.1U_0201_10V6K
0.1U_0201_10V6K
4.7U_0402_6.3V6M
P
GND NC 4 PCM_DIN
1 1 1 1 Y
4 3 @ PCM_DIN_R 2
EN OC A
G
CW 9 CW 10 CW 11 CW 12
2 SY6288C20AAC_SOT23-5 @ @
3
2 2 2 2
FH51S SA000079400
Vih=1.5
KEY E +3V_W LAN
JNGFF1 CONN@
1 2
3 GND_1 3.3VAUX_2 4
W LAN_ON <58> <10> USB20_P3 USB_D+ 3.3VAUX_4
5 6
<10> USB20_N3 USB_D- LED1# PCM_BCLK
7 8
GND_7 PCM_CLK PCM_LRCLK_R PCM_BCLK <9>
9 10 RW 24 1 @ 2 0_0402_5%
SDIO_CLK PD PCM_SYNC PCM_DIN_R PCM_LRCLK <9>
11 12 RW 25 1 @ 2 33_0402_5%
SDIO_CMD PU PCM_OUT PCM_DOUT PCM_DIN <9>
13 14
SDIO_DAT0 PCM_IN PCM_DOUT <9>
15 16
17 SDIO_DAT1 LED2# 18
19 SDIO_DAT2 GND_18 20 APU_BT_W AKE#_L
21 SDIO_DAT3 UART_WAKE 22 UART_0_ARXD_R_DTXD
23 SDIO_WAKE UART_TX
SDIO_RST
24 UART_0_ATXD_R_DRXD 2 1
25 UART_RX 26 UART_0_CTS#_R RW 7 100K_0402_5%
PCIE_ATX_C_DRX_P1 27 GND_33 UART_RTS 28 UART_0_RTS#_R
<6> PCIE_ATX_C_DRX_P1 PCIE_ATX_C_DRX_N1 PET_RX_P0 UART_CTS E51TXD_P80DATA_R
2 29 30 RW 6 2 RS@ 1 0_0402_5% 2
NGFF WL+BT (KEY E) <6> PCIE_ATX_C_DRX_N1
PCIE_ARX_DTX_P1
31
33
PET_RX_N0
GND_39
CLink_RST
CLink_DATA
32
34
E51RXD_P80CLK_R RW 5 2 RS@ 1 0_0402_5%
EC_TX <58>
EC_RX <58>
<6> PCIE_ARX_DTX_P1 PCIE_ARX_DTX_N1 PER_TX_P0 CLink_CLK EC_BT_W AKE#
35 36
<6> PCIE_ARX_DTX_N1 PER_TX_N0 COEX3 EC_BT_W AKE# <58>
37 38
CLK_PCIE_P3 39 GND_45 COEX2 40
<10> CLK_PCIE_P3 CLK_PCIE_N3 REFCLK_P0 COEX1 SUSCLK_W LAN
41 42
<10> CLK_PCIE_N3 REFCLK_N0 SUSCLK(32KHz) W L_RST#_R SUSCLK_W LAN <10>
43 44
CLKREQ_PCIE#3 45 GND_51 PERST0# 46 BT_ON RW 32 1 2 0_0402_5%
<10> CLKREQ_PCIE#3 CLKREQ0# W_DISABLE2# W L_OFF# APU_BT_ON <10>
47 48
PEWAKE0# W_DISABLE1# W L_OFF# <58>
49 50 PVT
RW 3 2 1 10K_0402_5% 51 GND_57 I2C_DAT 52 DW 1 2 1
+3V_W LAN RSVD/PCIE_RX_P1 I2C_CLK
53 54 @
55 RSVD/PCIE_RX_N1 I2C_IRQ 56 RB751S40T1G_SOD523-2 +3V_W LAN
57 GND_63 RSVD_64 58
RW 16 1 2 0_0402_5% 59 RSVD/PCIE_TX_P1 RSVD_66 60
<58>
EC_W LAN_W AKE# RSVD/PCIE_TX_N1 RSVD_68 EC_BT_W AKE#
61 62 RW 21 1 2 10K_0402_5%
Reserve EC WLAN WAKE# +3VALW 63 GND_69 RSVD_70 64
65 RSVD_71 3.3VAUX_72 66
67 RSVD_73 3.3VAUX_74 @
GND_75
5
UW 3 68 SUSCLK_W LAN CW 14 1 2 22P_0402_50V8J

1 69 GND1
P
NC 4 UART_0_ATXD_R_DRXD GND2
2 Y BELLW _80152-3221
<10> UART_0_ATXD_DRXD A
G
@ SP070013E00
3
SA0000BIO00
Footprint from Sleepy/Grumpy
3 +3VALW +3V_W LAN 3
PVT
teknisi-indonesia
5
UW 4 BT_ON RW 33 1 @ 2 10K_0402_5%
1
P
NC 4 UART_0_RTS#_R RW 34 1 @ 2 10K_0402_5%
2 Y
<10> UART_0_RTS# A
G
@
3
SA0000BIO00 +1.8VS RW 12 1 2 0_0402_5%
UART_0_ATXD_R_DRXD RW 10 1 @ 2 1K_0402_5%
+1.8VALW UART_0_RTS#_R RW 19 1 @ 2 1K_0402_5% +3VALW
UART_0_ARXD_R_DTXD RW 23 1 @ 2 1K_0402_5%
5
UW 5 UART_0_CTS#_R RW 22 1 @ 2 1K_0402_5%
5
1 @
P
4 NC 1
P
<10> UART_0_ARXD_DTXD Y UART_0_ARXD_R_DTXD +3VS <9,69,72> APU_PCIE_RST# IN1 W L_RST#_R
2 4
A O
G
2
<9,69> AGPIO40 IN2
G
@ NL17SZ07DFT2G_SC70-5 UART_0_ARXD_DTXD RW 11 1 @ 2 1K_0402_5%
3
1
SA0000BIO00 UART_0_CTS# RW 20 1 @ 2 1K_0402_5% UW 2 SA0000BIO00
3
1
MC74VHC1G08DFT2G_SC70-5 RW 13
RW 14 @ 100K_0402_5%
+1.8VALW 10K_0402_5% @
2
2
5
UW 6
1
P
4 NC 4
4
<10> UART_0_CTS# Y UART_0_CTS#_R
2
A
G
@ NL17SZ07DFT2G_SC70-5
3
SA0000BIO00
M.2 KEY-E (WLAN)
1.0
A B C D E
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

Reserve
1.0
5 4 3 2 1
A B C D E
() *+, + / DMIC_DATA 2 1 DMIC_DATA_R TO eDP cable

RA1 0_0402_5% DMIC_DATA_R <38>
$ $$$ $$ $ $$$ $$
APU_WOV_DAT_L 2 @ 1
+5VS
#$$$ + 77$ / 8 $$ /9 +5VS_PVDD +5VS_AVDD
#$$$ + 77$ / 8 $$ /9 +5VS <9> APU_WOV_DAT_L
& $ $5 & $ $6 RA3 33_0402_5%
LA10 LA1
1 2 1 2 APU_WOV_CLK_L 2 @ 1
<9> APU_WOV_CLK_L
HCB2012KF-221T30_2P_0805 HCB2012KF-221T30_2P_0805 RA4 33_0402_5%
1 1 1 1 1 1 DMIC_CLK 2 1 DMIC_CLK_R
DMIC_CLK_R <38>
10U_0402_6.3V6M
CA8
0.1U_0201_10V6K
CA9
10U_0402_6.3V6M
CA5
0.1U_0201_10V6K
CA3
10U_0402_6.3V6M
CA6
0.1U_0201_10V6K
CA4
1 1 1 1 LA9 EMC@ BLM15PX221SN1D_2P
10U_0402_6.3V6M
CA10
0.1U_0201_10V6K
CA11
10U_0402_6.3V6M
CA12
0.1U_0201_10V6K
CA13
SM01000Q500
1 2 2 2 2 2 2 change PN to SM01000Q500 1
1
2 2 2 2
100_0402_5% 330P_0402_50V7K
RA2
EMC@
1
10P_0201_50V8J
CA7
EMC@
+
+ + GNDA " 6$
" 6 " 6: 2
2
+1.8VS_AVDD
CA1
EMC@
1
+
AVDD2
CA14 1 2 0.1U_0201_10V6K 2
DVDDIO " +1.8VS_AVDD +1.8VS =%
1 1
10U_0402_6.3V6M
CA15
0.1U_0201_10V6K
CA16
CA17 1 2 10U_0402_6.3V6M
+1.8V_DVDDIO
+1.8VS +1.8V_DVDDIO 2 1 RA76
2 2 0_0402_5%
+1.8VALW
2 3
RA74 1 @ 2 + CONN@
+1.8VALW
0_0402_5% +3VS +3VS_DVDD
" 7$ LA2 SM01000BW00 , SPK_R+
JSPK1
GNDA 2 @ 1 RA77 SPKR+ EMI@ 1 2 PBY160808T-121Y-N_2P 1
1 @ 2 0_0402_5% SPKR- EMI@ 1 2 PBY160808T-121Y-N_2P SPK_R- 2 1
RA7 0_0402_5% LA3 SM01000BW00 2 3
1 RS@ 2 +5VALW G1
RA75 DVT 4
0_0402_5% G2
1 1 1
10U_0402_6.3V6M
CA18
0.1U_0201_10V6K
CA19
0.1U_0201_10V6K
CA20
RA9 1 RS@ 2 CVILU_CI4202M2HR0-NH
0_0402_5% SP02001CK00
GND
2 2 2 SPKL+ SPKL+ <72>
SPKL-
18
41
46
40
20
33
SPKL- <72>
3
+ UA1
'#2 D* < > '#2 , E # 4A
DVDD-IO
PVDD1
PVDD2
AVDD1
CPVDD/AVDD2
5VSTB/AUX MODE
DVDD
" # HDA_BIT_CLK_AUDIO
1
XEMC@
+3VS_DVDD LINE1_L 36 RA73
LINE1_R 35 LINE1-L(PORT-C-L) 0_0402_5%
2
LINE1-R(PORT-C-R) ! 2
2
1
RA78 RING2 30 43 SPKL- 1

@ SLEEVE 31 MIC2-L(PORT-F-L) /RING2 SPK-OUT-L- 42 SPKL+ XEMC@
10K_0402_5% MIC2-R(PORT-F-R) /SLEEVE SPK-OUT-L+ CA39
45 SPKR+ 22P_0402_50V8J
2
DMIC_MUTE# DMIC_DATA 4 SPK-OUT-R+ 44 SPKR- 2
<58> DMIC_MUTE#
DMIC_MUTE# 1 GPIO0/DMIC-DATA12
GPIO2/DMIC-DATA34
SPK-OUT-R- ( + : 4*
1
DMIC_CLK 5
RA79 GPIO1/DMIC-CLK 27 HPOUT_L
7 HPOUT-L(PORT-I-L) 26 HPOUT_R
10K_0402_5% I2C-CLK HPOUT-R(PORT-I-R)
6 +MIC2_VREFO_R
I2C-DATA 15 HDA_SYNC_R
PVT
2
AUDIOLINK:SYNC 14 HDA_BIT_CLK_AUDIO RA14 1 2 0_0402_5% HDA_SYNC_R <9> +MIC2_VREFO_L

AUDIOLINK:BCLK HDA_BIT_CLK_R <9>
1
HDA_SDOUT_R
2.2K_0402_5%
RA8
11 17
8 I2S-MCLK AUDIOLINK:SDATA-OUT 16 HDA_SDIN0_AUDIO RA15 1 2 33_0402_5% HDA_SDOUT_R <9>
I2S-IN AUDIOLINK:SDATA-IN HDA_SDIN0 <9>
1
2.2K_0402_5%
RA10
12
10 I2S-LRCK
9 I2S-BCLK 29 +MIC2_VREFO_R
2
I2S-OUT MIC2-VREFO-R 28
MIC2-VREFO-L +MIC2_VREFO_L
SLEEVE SLEEVE <72>
2
CA25 1 2
CBP 23 39 RING2 RING2 <72>
1U_0402_6.3VAK CBN 24 CBP LDO1-CAP 21
CBN LDO2-CAP 19
LDO3-CAP
MONO_IN 34 HPOUT_R 1 2 HPOUT_R_1
PCBEEP HPOUT_R_1 <72>
1
CODEC_VREF
10U_0402_6.3V6M
CA29
10U_0402_6.3V6M
CA30
10U_0402_6.3V6M
CA38
100K_0402_5%
RA19
38 1 1 1 RA16 51_0402_5%
VREF HPOUT_L 1 2 HPOUT_L_1
13 HPOUT_L_1 <72>
RA17 51_0402_5%
MUTE# 2 DC-DET/EAPD
PDB 25 CPVEE 2 2 2 Vendor suggest 1/21
2
SENSE_A 48 CPVEE LINE1_R CA28 1 2 4.7U_0402_6.3V6M
HP/LINE1-JD(JD1)
2.2U_0402_6.3V6M
CA33
47 37
1U_0402_6.3VAK
I2S-IN/I2S-OUT-JD(JD2) AVSS1 1 1 2 2
3
LINE1_L
330P_0402_50V7K
CA26
@EMC@
330P_0402_50V7K
CA27
@EMC@
TVNST52302AB0_SOT523-3
D2
@EMC@
22 CA24 1 2 4.7U_0402_6.3V6M
32 AVSS2 49
MIC2-CAP Thermal Pad CA32
3 1 2 2 1 1 3
GNDA GNDA
CA34 ALC299-CG_MQFN48_6X6
10U_0402_6.3V6M SA0000A5L00
1
2 GNDA GNDA GNDA
S IC ALC295-CG MQFN 48P AUDIO CODEC
GNDA GNDA GND
&7;5 (! &7;; !< 3 *
; 5) / +3VS_DVDD
RA60 2 @ 1 0_0402_5%
1
RA61 2 @ 1 0_0402_5% RA20
100K_0402_1%
RA62 2 @ 1 0_0402_5%
TO Audio Jack
2
SENSE_A 2 1 HP_PLUG#
HP_PLUG# <72>
1 200K_0402_1% RA21
+3VS_DVDD
CA35
0.1U_0201_10V6K
RA63 2 @ 1 0_0402_5%
% F 1
;)
1
RA26 1 2 BEEP#_R 1 2 MONO_IN 2

<58> EC_BEEP#
22K_0402_1% ( ;) 028' ;)
GND GNDA CA36 0.1U_0201_10V6K RA22
RA70 1 2 10K_0402_5% 5 5
<9> APU_SPKR
1
22K_0402_1% 1 Near pin 48

2
RA64 2 @ 1 0_0402_5% CA37 RA23 1 2 0_0402_5% MUTE#

5.1K_0402_1% <58> EC_MUTE#
RA71 2 @ 1 10K_0402_5%
100P_0402_50V8J RA28 <9> HDA_RST#_R 0914
RA65 2 @ 1 0_0402_5% 2
@
2
4 4
@
CA31 1 2 .1U_0402_16V7K @ RA72
10K_0402_5%
2
RA25 1 @ 2 0_0402_5%
GND GNDA Security Classification Compal Secret Data Compal Electronics, Inc.
HDA CODEC (ALC295)
1.0
A B C D E
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
+3VLP
JP2
+EC_VCC L44
FBM-11-160808-601-T_0603
+EC_VCCA Board ID / Rb Board ID / Rb(RGB) +EC_VCC
1 2 1 2 EVT@ EVTRGB@
1 2
1
0.1 0 R4079 0_0402_5% 0.1(RGB) 0 R4079 27K_0402_1%
+VCC_LPC
0.1U_0201_10V6K
C1255
0.1U_0201_10V6K
C1256
0.1U_0201_10V6K
C1257
0.1U_0201_10V6K
C1258
1000P_0402_50V7K
C1261
1000P_0402_50V7K
C1259
JUMP_43X39 2 SD028000080 SD034270280
JP@ C1262 R1562
R1502 1 ESPI@ 2 10K_0402_5% SPOK_5V

2 2 2 2 1 1
0.1U_0201_10V6K
1.0 1
PVT@
R4079 12K_0402_5% 1.0(RGB) 1
PVTRGB@
R4079 33K_0402_1%
Ra 100K_0402_5%
2
1
ESPI@
R1503 1 ESPI@ 2 10K_0402_5% KBRST#_R @ SD034120280 SD034330280
R1505 1 ESPI@ 2 10K_0402_5% LPC_FRAME#_R 1 1 1 1 2 2 AD_BID
ECAGND <84>
1
+VCC_LPC 2 2 2
D +3VLP R4079 C1269 D
1 ESPI@ 2 KSI0
+EC_VCC +VCC_LPC 2 1
1U_0201_6.3V6M C1300
ECAGND Rb @ 20K_0402_1% 0.1U_0201_10V6K
@
R1506 470K_0402_1% 1 RS@ 2 R1515 1
2
111
125
0_0402_5%
22
33
96
67
9
VCC_LPC
VCC
VCC
VCC
VCC
AVCC
VCC0
SPOK_5V 1 21 EC_BT_WAKE# Add for Wifi-AX 0920
<87> SPOK_5V GATEA20/GPIO00 EC_VCCST_PG/GPIO0F EC_BT_WAKE# <52>
1 RS@ 2 0_0402_5% KBRST#_R 2 23 EC_BEEP#
<10> KBRST# KBRST#/GPIO01 BEEP#/GPIO10 EC_BEEP# <56> +RTC_APU_R
R1501 SERIRQ_R 3 26 FAN_PWM1
<10> SERIRQ_R LPC_FRAME#_R SERIRQ EC_FAN_PWM/GPIO12 FAN_PWM2 FAN_PWM1 <77>
4 PWM Output 27
<8,10> LPC_FRAME#_R LPC_AD3_R LPC_FRAME# AC_OFF/GPIO13 FAN_PWM2 <77>
5
<8,10> LPC_AD3_R LPC_AD2_R LPC_AD3
7
<8,10> LPC_AD2_R LPC_AD2
1
LPC_AD1_R 8 63 BATT_TEMP D
<8,10> LPC_AD1_R LPC_AD0_R LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38 VCIN1_BATT_DROP BATT_TEMP <84,85> EC_RTCRST
10 64 2 Q91
<8,10> LPC_AD0_R LPC_AD0LPC & MISC VCIN1_BATT_DROP/AD1/GPIO39 65 ADP_I VCIN1_BATT_DROP <84>
G
ADP_I/AD2/GPIO3A ADP_I <84,85> 2N7002KW 1N SOT323-3 -D
1
LPC_CLK0_EC 12 AD Input 66 AD_BID S SB000009Q80
<8,10> LPC_CLK0_EC
3
LPC_RST# 13 CLK_PCI_EC AD_BID/AD3/GPIO3B 75 VRAM_TEMP R1563
<8,10,63> LPC_RST# EC_RST# PCIRST#/GPIO05 AD4/GPIO42 DCHG_I VRAM_TEMP <84>
37 76 Add for PWR IDCHG 10K_0402_5%
<77> EC_RST# EC_SCI# EC_RST# AD5/GPIO43 DCHG_I <85>
20
<10> EC_SCI# WLAN_ON EC_SCI#/GPIO0E
38
2
<52> WLAN_ON CLKRUN#/GPIO1D
68 EC_WLAN_WAKE# PVT
DA0/GPIO3C GPU_OVERT# EC_WLAN_WAKE# <52>
DA Output 70
<64> KSI[0..7] EN_DFAN1/DA1/GPIO3D TP_SENOFF# GPU_OVERT# <26> New Add for GPU Thermal
KSI0 55 71
KSI0/GPIO30 DA2/GPIO3E SPOK_3V TP_SENOFF# <63> +3VS
KSI1 56 72 SPOK_3V <87>
KSI2 57 KSI1/GPIO31 DA3/GPIO3F
KSI3 58 KSI2/GPIO32 83 TYPEC_1P5A EC_MUTE# R1565 1 @ 2 10K_0402_5%
KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A TYPEC_3A TYPEC_1P5A <42,43> TP_I2C_INT#
KSI4 59 84 New Add for PW I Limit R116 1 @ 2 1K_0402_5%
KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B EC_SMB_CK3 TYPEC_3A <43> GPU_OVERT#
KSI5 60 85 R4082 1 VGA@ 2 1K_0402_5%
KSI5/GPIO35 PSCLK2/GPIO4C EC_SMB_DA3 EC_SMB_CK3 <64>
KSI6 61 PS2 Interface 86
C KSI6/GPIO36 PSDAT2/GPIO4D TP_CLK EC_SMB_DA3 <64> C
KSI7 62 87 +EC_VCC
<64> KSO[0..17] KSI7/GPIO37 TP_CLK/GPIO4E TP_DATA TP_CLK <63>
KSO0 39 88 PS2
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <63> EC_SMB_DA1
KSO1 40 R1577 1 2 2.2K_0402_5%
KSO2 41 KSO1/GPIO21 EC_SMB_CK1 R1574 1 2 2.2K_0402_5%
1 2 1 2 LPC_CLK0_EC KSO3 42 KSO2/GPIO22 97 CHG_CTL1 LID_SW# R344 1 2 47K_0402_5%
KSO3/GPIO23 ENKBL/GPXIOA00 DGPU_AC_DETECT CHG_CTL1 <71> EC_LAN_PME#
C1263 @EMC@ R1560 @EMC@ KSO4 43 98 R345 1 @ 2 47K_0402_5%
KSO4/GPIO24 WOL_EN/GPXIOA01 0.75VS_PWR_EN# DGPU_AC_DETECT <26,85>
22P_0402_50V8J 10_0402_1% KSO5 44 99
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 9022_PH1 0.75VS_PWR_EN# <78> +5VS
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH1/GPXIOD00 9022_PH1 <84>
C819 1 2 0.1U_0201_10V6K EC_RST# KSO8 47 KSO7/GPIO27 EC_SMB_CK3 RB79 2 KB@ 1 4.7K_0402_5%
KSO8/GPIO28 SPI Device Interface EC_RTCRST EC_SMB_DA3
KSO9 48 119 RB80 2 1 4.7K_0402_5%
KSO10 49 KSO9/GPIO29 MISO/GPIO5B 120 THERMTRIP# KB@
ESD@ THERMTRIP# <8>
KSO11 50 KSO10/GPIO2A MOSI/GPIO5C 126 EC_LAN_PME# C1265
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58 FP_PWR_EN EC_LAN_PME# <72> BATT_TEMP
KSO12 51 128 2 1 100P_0201_50V8J
LPC_RST# KSO12/GPIO2C SPICS#/GPIO5A FP_PWR_EN <66>
1 @ 2 KSO13 52 Reserve for FP C1266
R207 100K_0402_5% KSO14 53 KSO13/GPIO2D ACIN 2 1 100P_0201_50V8J
1 2 @EMC@ KSO15 54 KSO14/GPIO2E 73 CHG_EN Change for New Charger IC
KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 CHG_EN <71>
C1279 100P_0402_50V8J KSO16 81 74 VGATE VGATE <97>
KSO17 82 KSO16/GPIO48 SYS_PWROK/AD7/GPIO41 89 BATT_4S EC_RSMRST# R3907 1 @ 2 47K_0402_5%
KSO17/GPIO49 GPIO50 90 BATT_BLUE_LED# BATT_4S <85> SYSON R1675 1 @ 2 100K_0402_5%
BATT_CHG_LED#/GPIO52 CAPSLOCK_LED# BATT_BLUE_LED# <63> 3V_EN
91 R940 1 2 1M_0402_5%
EC_SMB_CK1 CAPS_LED#/GPIO53 PWR_LED# CAPSLOCK_LED# <64>
77 GPIO 92
<84,85> EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CLK1/GPIO44 PWR_LED#/GPIO54 BATT_AMB_LED# PWR_LED# <63>
78 93
<84,85> EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DAT1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_AMB_LED# <63>
+EC_VCC 79 95 SYSON
<8,26> EC_SMB_CK2 EC_SMB_DA2 EC_SMB_CLK2/GPIO46 SYSON/GPIO56 VR_ON SYSON <89>
80 121
EC_SMB_DA2 <8,26> EC_SMB_DA2 EC_SMB_DAT2/GPIO47 VR_ON/GPIO57 0.75_1.8VALW_PWREN VR_ON <97>
R4084 1 @ 2 2.2K_0402_5% 127
EC_SMB_CK2 R4085 1 @ 2 2.2K_0402_5% DPWROK_EC/GPIO59 0.75_1.8VALW_PWREN <90,91,110>
SM Bus
RS@ 2 0_0402_5% SLP_S3#_R
R1511 1 6 100 EC_RSMRST#
<9> SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 EC_RSMRST# <9>
RS@ 2 0_0402_5% TP_I2C_INT#_R
R1512 1 14 101 CHG_ILMSEL Change for New Charger IC
<63> TP_I2C_INT# CHG_CTL3 GPIO07 GPXIOA04 9022_VCIN CHG_ILMSEL <71>
15 102 9022_VCIN <84>
<71> CHG_CTL3 TP_3V_EN GPIO08 VCIN1_ADP_PROCHOT/GPXIOA05 EC_THERM
16 103 R1690
WL_OFF# <63> TP_3V_EN ESB_CLK 17 GPIO0A VCOUT1_PROCHOT#/GPXIOA06 104 MAINPWON EC_THERM 1 RS@ 2 0_0402_5% APU_PROCHOT# <8,85,97>
B EC_MUTE# <59> ESB_CLK ESB_DAT 18 GPIO0B VCOUT0_MAIN_PWR_ON/GPXIOA07 105 BKOFF#_R R1509 1 RS@ 2 0_0402_5% MAINPWON <77,84,87>
B
<59> ESB_DAT USB_EN GPIO0C BKOFF#/GPXIOA08 DMIC_MUTE# BKOFF# <38>
19 GPIO GPO 106 PVT
<42,72> USB_EN KBL_EN AC_PRESENT/GPIO0D GPXIOA09 3V_EN_R_EC DMIC_MUTE# <56>
25 107
<64> KBL_EN FAN_SPEED1 PWM2/GPIO11 PCH_PWR_EN/GPXIOA10 F9_MUTE_LED# 3V_EN
28 108 MAINPWON 1 2
<77> FAN_SPEED1 FAN_SPEED2 FAN_SPEED1/GPIO14 PWR_VCCST_PG/GPXIOA11 F9_MUTE_LED# <64> 3V_EN <87>
29
<77> FAN_SPEED2 EC_TX 30 FANFB1/GPIO15 D2012 @
<52> EC_TX EC_RX EC_TX/GPIO16
31 110 ACIN RB751V-40_SOD323-2
<52> EC_RX SYS_PWRGD_EC EC_RX/GPIO17 VCIN1_AC_IN/GPXIOD01 EC_ON ACIN <85> 3V_EN_R_EC
SYS_PWRGD_EC is OD-Pin <9,91> SYS_PWRGD_EC 32 112 1 2 1K_0402_5%
PWR_SUSP_LED# 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 ON/OFFBTN# EC_ON <87> R3926
<63> PWR_SUSP_LED# WL_OFF# SUSP_LED#/GPIO19 ON/OFF#/GPXIOD03 LID_SW# ON/OFFBTN# <63,64>
36 GPI 115
<52> WL_OFF# NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# <63>
116 SUSP#
SUSP#/GPXIOD05 EC_ENBKL R1508 1 SUSP# <37,39,41,78,85,89>
117 RS@ 2 0_0402_5%
GPXIOD06 EC_MUTE# ENBKL <8> SPOK_3V EC_RSMRST#
118 1 2
PBTN_OUT# PECI/GPXIOD07 EC_MUTE# <56>
122
<9> PBTN_OUT# 1 RS@ 2 SLP_S5#_R 123 PBTN_OUT#/GPIO5D 124 D2013 @
<9> SLP_S5# PM_SLP_S4#/GPIO5E V18R/VCC_IO2 +EC_VCC
R1507 0_0402_5% RB751V-40_SOD323-2
AGND
GND
GND
GND
GND
GND
1 2 SYS_PWRGD_EC
D2014 @
11
24
35
94
113
69
UE1 RB751V-40_SOD323-2
KB9022QD_LQFP128_14X14 L43
FBM-11-160808-601-T_0603
2 1
20mil FH51S
ECAGND Add TURBO_EN#
+3VALW
TURBO_EN# R4083 1 2 10K_0402_5%
SYSON 1 2
A ESD@ C2777 33P_0201_50V8J A
1 2
ESD@ C2778 33P_0201_50V8J
C2777 near UE1, C2778 near PU2501

EC ENE-KB9022
1.0
5 4 3 2 1
A B C D E
+EC_VCC
1
KB3810@ 47K_0402_5%
RK20 UK2 KB3810@
ESB_CLK 1 13
<58> ESB_CLK
2
ESB_CLK TEST_EN#
1 KC3810_RST# PVT delete FAN_EN 2 14 1
GPIO00 GPIO08/CAS_DAT
KC3810_RST# 3 15 EC_PERKEY_EN
2 RST# GPIO09 EC_PERKEY_EN <64>
KB3810@ CK16 ESB_DAT 4 16 TURBO_LED#
<58> ESB_DAT ESB_DAT GPIO0A TURBO_LED# <77>
0.1U_0201_10V6K
1 TS_EN 5 17 +EC_VCC
Reserve TS_EN <38> TS_EN GPIO01 GPIO0B
TS_I2C_RST# 6 18
Reserve TS_I2C_RST# <38> TS_I2C_RST# GPIO02 GPIO0C/PWM0
2
THERMAL_ALERT# 7 19 BaseAddOpt
<66> THERMAL_ALERT# GPIO03 GPIO0D/PWM1 RE4
PVT TURBO_EN# 8 20 47K_0402_5%
+EC_VCC <77> TURBO_EN# GPIO04 GPIO0E/PWM2 KB3810@
EC_TYPEC_EN 9 21
<42> EC_TYPEC_EN
1
KB3810@ GPIO05 GPIO0F/PWM3
RK207 2 1 4.7K_0402_5% ESB_CLK EC_PERKEY_INT# 10 22 KC3810_GPIO11
<64> EC_PERKEY_INT# GPIO06 GPIO10/ESB_RUN#
2
RK208 2 1 4.7K_0402_5% ESB_DAT 11 23 KC3810_GPIO11
KB3810@ GPIO07/CAS_CLK GPIO11/BaseAddOpt RE5
RK221 2 1 4.7K_0402_5% EC_PERKEY_INT# 12 24 47K_0402_5%
GND
GND VCC +EC_VCC
@ @
0.1U_0201_10V6K
1
CK202
KC3810NF-A0_QFN24_4X4 1
25
SA00002AI00 KB3810@
2
2 2
3 3
4 4

Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 1.0
A B C D E
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
1 2 3 4 5 6 7 8
4894 &8 & 9

+TP_VCC +3VALW
I2C_3_SDA_R R812 1 2 2.2K_0402_5%

I2C_3_SCL_R R813 1 2 2.2K_0402_5%
TP_I2C_INT# R633 2 1 10K_0402_5%

TP_I2C_INT#_APU R814 1 2 2.2K_0402_5%
+TP_VCC +3VALW +TP_VCC
, U13 SA000079400
SY6288C20AAC_SOT23-5
+TP_VCC
4.7U_0402_6.3V6M
RK214 5 1
100K_0402_5% 1 @ 2 IN OUT
+3VS 1
1U_0201_6.3V6M
C28
2 1 R463 0_0402_5% 2
+3VLP GND
2
C27
G
2 Q2510 SB000009Q80
A
CONN@ C663 4 3 2N7002KW 1N SOT323-3 -D A
ON/OFFBTN# JTP1 0.1U_0201_10V6K EN OC 2 TP_I2C_INT# 3 1
<58,64> ON/OFFBTN#
1 1 2 TP_I2C_INT#_APU <9> To APU
D
1 2 TP_CLK @ 1 Vih=1.5
2 3 TP_DATA Vgs=1.0-2.0V
3 4
4
5
5 I2C_3_SDA_R
I2C_3_SCL_R
TP_3V_EN <58> TP_I2C_INT# <58> To EC
4 3 6
6 7 TP_I2C_INT#
Test Only SWK1 PB@ 7 8 TP_SENOFF#
8 TP_SENOFF# <58> +TP_VCC
BOT SKRPABE010_4P 9
2 1 SN100004N00 GND 10 +TP_VCC
GND 1
C2779
JXT_FP202DH-008M10M 1000P_0402_50V7K Vgs=1.0-2.5V
5
SP010020L00 ESD@ PU +3VALW APU side
G
1
1
2 Q2509B
Footprint from Octavia FH51S R281 R282 2N7002KDW_SOT363-6
Add by ESD demand, near JTP1 4.7K_0402_5% 4.7K_0402_5% SB00000EO00
I2C_3_SCL_R 4 3
S
I2C_3_SCL <9>
D
2
2
G
TP_CLK
TP_DATA TP_CLK <58>
Q2509A To APU
2N7002KDW_SOT363-6
TP_DATA <58> I2C_3_SDA_R 1 6 SB00000EO00
S
I2C_3_SDA <9>
0,+ =, /: (Hall Effect Switch)
D
R283 1 @ 2 0_0402_5%
R284 1 @ 2 0_0402_5%
+3VLP +3VLP
+3VLP CONN@
JHS1
1
1U_0402_6.3V6K
1
1
LID_SW# 2 CG5 CG6
1U_0402_6.3V6K
<58> LID_SW# 2
3 5
4 3 GND 6 @ @
1 1
2
B 4 GND DK3 @ESD@ B
CG2 CG3 JXT_FP202DH-004M10M TP_CLK 1 9 TP_CLK
0.1U_0201_10V6K 0.1U_0201_10V6K SP010022U00
2 ESD@ 2 TP_DATA 2 8 TP_DATA
TP_I2C_INT# 4 7 TP_I2C_INT#
TP_SENOFF# 5 6 TP_SENOFF#
& # TVWDF1004AD0_DFN9
SC300006T00
+SPI_VCC RK1 +TPM_VCC

0_0603_5%
1 RS@ 2 Add by ESD demand, near JTP1
10U_0402_6.3V6M
CK1
0.1U_0201_10V6K
CK205 TPM@
0.1U_0201_10V6K
CK206 TPM@
0.1U_0201_10V6K
CK207 TPM@
1 1 1 1
TPM@
2 2 2 2
, E E
+3VALW
5
C UK8 TPM@ C
1
P
NC 4 TPM_RST#
2 Y
<8,10,58> LPC_RST# A
G
3
SA0000BIO00
CRB PU with SPI power rail +TPM_VCC
0') Battery LED
TPM_SPI_TPMCS#_R RK212 1 TPM@ 2 10K_0402_5%
RK219 2 TPM@ 1 0_0402_5% TPM_SPI_TPMCS#_R TPM_SPI_IRQ# RK211 1 TPM@ 2 10K_0402_5%
<10> APU_SPI_TPMCS# TPM_RST# LED1
RK209 1 TPM@ 2 10K_0402_5% RG1
RK218 2 TPM@ 1 0_0402_5% TPM_SPI_IRQ# 1K_0402_5%
<9,10> APU_SPI_IRQ#_R BATT_AMB_LED#
<58> BATT_AMB_LED# 1 2 3 A 4 +5VALW
RK220 2 TPM@ 1 10_0402_5% TPM_SPI_CLK_R
<9,10> APU_SPI_CLK_R
BATT_BLUE_LED# 1 2 1 B 2
<58> BATT_BLUE_LED#
+TPM_VCC RG2
5 / / +7 < 560_0402_5%
UK1 TPM@ LTST-C295TBKF-CA_AMBER-BLUE
1
29 VSB
30 SDA/GPIO0 8
SCL/GPIO1 VHIO
VHIO
22 Power LED
6
GPIO3 2 LED2
RG3
APU_SPI_MISO 24 NC 3 1K_0402_5%
<10> APU_SPI_MISO APU_SPI_MOSI MISO NC PWR_SUSP_LED# 1
21 5 <58> PWR_SUSP_LED#
2 3 A 4
<10> APU_SPI_MOSI TPM_SPI_IRQ# 18 MOSI/GPIO7 NC 7
PIRQ/GPIO2 NC 9
NC 10 PWR_LED# 1 2 1 B 2
TPM_SPI_CLK_R NC <58> PWR_LED# +5VALW
19 11 RG4
TPM_SPI_TPMCS#_R 20 SCLK NC 12 560_0402_5%
TPM_RST# 17 SCS/GPIO5 NC 14
D D
27 PLTRST NC 15 LTST-C295TBKF-CA_AMBER-BLUE
13 NC NC 26
GPIO4 NC 25
NC 28
4 NC 31
PP/GPIO6 NC 32
NC
16
GND 23
GND
PGND
33 Security Classification Compal Secret Data Compal Electronics, Inc.
NPCT750AAAYX_QFN32_5X5
SA0000AQ2F0 S IC NPCT750AABYX QFN 32P TPM THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB/TP/TPM/LID
1.0
1 2 3 4 5 6 7 8
5 4 3 2 1
+5VS_BL CONN@
0') + ,> +5VS_BL +5VS_BL

5 /30,!: 1
2
3
JBL1
1
2 5
4 3 GND 6
4 GND
1
+5VALW
2.2K_0402_5%
RE69 @
2.2K_0402_5%
RE70 @
JXT_FP202DH-004M10M
R42 1 2 +5VS_BL SP010022U00
5
PERKEY@ 0_0603_5% 40mil
G
QE62B @ +5VS
2
2N7002KDW_SOT363-6 U2616
1 2 5V_BL 5 1
EC_SMB_CK3 4 3 EC_SMB_CK3_LEDDRV R41 0_0603_5% IN OUT
S
<58> EC_SMB_CK3 JBL2
0.1U_0201_10V6K
KB@ 2
GND
C32
D 16 D
4 3 15 GND
<58> KBL_EN EN OC 1 GND
2
EC Side PU +5VS +5VS_BL
G
2 14
EC_SMB_DA3 1 6 EC_SMB_DA3_LEDDRV 13 14
S
<58> EC_SMB_DA3 KB_A_LED_R_DRV# 13
D
12
QE62A @ When Perkey function , KBL_EN follow SYSON KB_A_LED_G_DRV# 11 12
KB_A_LED_B_DRV# 10 11
2N7002KDW_SOT363-6 10
KB_B_LED_R_DRV# 9
KB_B_LED_G_DRV# 8 9
KB_B_LED_B_DRV# 7 8
KB_C_LED_R_DRV# 6 7
KB_C_LED_G_DRV# 5 6
KB_C_LED_B_DRV# 4 5
KB_D_LED_R_DRV# 3 4
KB_D_LED_G_DRV# 2 3
KB_D_LED_B_DRV# 1 2
1
ACES_51522-01401-P01
CONN@
+5VS_BL +5VS_BL
SP01001R800
1
RE65 LED14P@
4.7K_0402_1% 1
CE3 LED14P@
UE4 0.1U_0201_10V6K
5
2
24 27 2
RESET Vcc
3 KB_A_LED_R_DRV# JKB1 CONN@
EC_SMB_CK3 RE1 2 LED14P@
1 0_0402_5% EC_SMB_CK3_LEDDRV 25 OUT0 4 KB_A_LED_G_DRV# 32 34
EC_SMB_DA3 RE2 2 LED14P@
1 0_0402_5% EC_SMB_DA3_LEDDRV 26 SCL OUT1 5 KB_A_LED_B_DRV# RE76 1 2 820_0402_5% F9_MUTE_LED#_R 31 32 G2 33
SDA OUT2 KB_B_LED_R_DRV# <58> F9_MUTE_LED# 31 G1
C 6 RE77 1 2 820_0402_5% CAPSLOCK_LED#_R 30 C
OUT3 KB_B_LED_G_DRV# <58> CAPSLOCK_LED# 30
AD0 31 8 +5VS 29
AD1 32 A0 OUT4 9 KB_B_LED_B_DRV# KSO16 28 29
AD2 1 A1 OUT5 10 KB_C_LED_R_DRV# KSO17 27 28
AD3 2 A2 OUT6 11 KB_C_LED_G_DRV# KSI[0..7] KSO0 26 27
A3 OUT7 14 KB_C_LED_B_DRV# <58> KSI[0..7] KSO1 25 26
12 OUT8 15 KB_D_LED_R_DRV# KSO[0..17] KSO2 24 25
13 N.C. OUT9 16 KB_D_LED_G_DRV# <58> KSO[0..17] KSO3 23 24
28 N.C. OUT10 17 KB_D_LED_B_DRV# KSO4 22 23
29 N.C. OUT11 19 AD0 KSO5 21 22
30 N.C. OUT12 20 AD1 KSO6 20 21
N.C. OUT13 21 AD2 KSO7 19 20
OUT14 19
1
22 AD3 KSO6 KSO8 18

RE64 OUT15 KSO7 KSO9 17 18
17
1
@ 10K_0402_5% 7 23 KSO8 KSO10 16
18 GND GND 33 RE75 RE74 RE73 RE72 KSO9 KSO11 15 16
GND GND 4.7K_0402_1% 4.7K_0402_1% 4.7K_0402_1% 4.7K_0402_1% KSO10 KSO12 14 15
%' 39 * * G
2
LED14P@ LED14P@ LED14P@ LED14P@ KSO13 13 14

13
@ESD@ CE4
@ESD@ CE5
@ESD@ CE6
@ESD@ CE7
@ESD@ CE8
TLC59116FIRHBR_VQFN32_5X5 KSO14 12
1000P_0201_50V7K
1000P_0201_50V7K
1000P_0201_50V7K
1000P_0201_50V7K
1000P_0201_50V7K
1 1 1 1 1
2
KSO15 11 12
LED14P@ PVT 11
KSI0 10
KSI1 9 10
2 2 2 2 2 KSI2 8 9
KSI3 7 8
KSI4 6 7
% F8 < 1 KSI5 5 6
5
KSI6 4
KSI7 3 4
2 3
ON/OFFBTN# 1 2
<58,63> ON/OFFBTN# 1
@ESD@ ACES_51519-03201-001
0.1U_0201_10V6K 2 1 CE9 SP01001RH00
PVT
B B
+5VALW +3V_PERKEY
+3VALW
R43
40mil
U2617
+3V_PERKEY
5 6
1 2 3V_KB 5 1
+3V_PERKEY 0_0603_5% IN OUT
0.1U_0201_10V6K
PERKEY@ 2
GND
1
C2790
RE84
RE85
LE1 EMI@
4.7K_0402_5%
4.7K_0402_5%
4 3 1 2 USB20_P7_PERKEY
RE78
RE79
4.7K_0402_5%
4.7K_0402_5%
<59> EC_PERKEY_EN EN OC 1 <10> USB20_P7

5
@
SY6288C20AAC_SOT23-5 @
G
USB20_N7_PERKEY
@
@ PERKEY@ 4 3
<10> USB20_N7
2
QE63B 2 JKB2
2
2N7002KDW_SOT363-6 DLM0NSN900HY2D_4P +5VS_BL 14

EC_SMB_CK3 3 4 EC_SMB_CK3_PERKEY SM070005U00 13 GND
S
GND
D
12
G
11 12
10 11
USB20_N7_PERKEY 9 10
EC_SMB_DA3 6 1 EC_SMB_DA3_PERKEY DE1 @ESD@ USB20_P7_PERKEY 8 9
S
6 3 USB20_P7_PERKEY 7 8
D
@ QE63A +5VS_BL I/O4 I/O2 6 7

+3V_PERKEY +3V_PERKEY 5 6
2N7002KDW_SOT363-6 5
When support PERKEY KB, ON/OFFBTN# 4
EC side PU +5VALW EC_SMB_CK3 RE80 2 PERKEY@
1 0_0402_5% 5 2 PERKEY_INT# 3 4
VDD GND 3
1
(PU +5VS change to unpop) EC_SMB_DA3_PERKEY 2

2
1
EC_SMB_DA3 RE81 2 PERKEY@ EC_SMB_CK3_PERKEY

0.1U_0201_10V6K
1 0_0402_5% RE82 1
RE86 1
4.7K_0402_5% 1
USB20_N7_PERKEY
@
C2791
4.7K_0402_5% 4 1 ACES_51625-01201-001
I/O3 I/O1
@
@ CONN@
2
A AZC099-04S.R7G_SOT23-6 A
SP010028W00
2
2
SC300001G00
2 1 DE2 PERKEY_INT#
<59> EC_PERKEY_INT#
@
LRB751V-40T1G_SOD323-2
2 PERKEY@
1
RE83 0_0402_5%

KB/Backlight/RGB
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
1.0
5 4 3 2 1
5 4 3 2 1
THERMAL SENSOR
RF24
+3VS THERMAL IEC
Close to UF1 +3VS 10K_0402_5%
THERMAL_ALERT# 2 TMS@ 1
REMOTE1+ CF20 TMS@ UF2 TMSIEC@
1 0.1U_0201_10V6K UF1 APU_SIC 1 5 APU_SID
CF21 TMS@ 2 1 SMBCLK SMBDATA
PU +3VS with 1K at APU side
2200P_0402_50V7K 2
1 10 APU_SIC GND
D APU_SIC <8> D
2 REMOTE1- VCC SCL THERMAL_ALERT2# 3 4
ALERT# +Vs +3VS
REMOTE1+ 2 9 APU_SID
DP1 SDA APU_SID <8> Need check
REMOTE2+ 1 1
1 REMOTE1- 3 8 THERMAL_ALERT# G753T11U_SOT23-5 TMSIEC@ @
DN1 ALERT# THERMAL_ALERT# <59>
CF22 TMS@ SA00008CH00 CF4 CF24
2200P_0402_50V7K REMOTE2+ 4 7 TH1_THERM# 2 TMS@ 1 RF28 1 @ 2 THERMAL_ALERT2# 0.1U_0201_10V6K 10U_0402_6.3V6M
DP2 THERM# +3VS 2 2
10K_0402_5% RF23 0_0201_5%
2 REMOTE2- REMOTE2- 5 6 FH51S
DN2 GND IEC THERMAL_ALERT2# combined with THERMAL_ALERT#
Place near UV1 F75303M_MSOP10 +3VS

TMS@
REMOTE1+ THERMAL_ALERT2# RF25 1 2 2K_0402_5%
TMSIEC@
1
C
2 QF1 TMS@
B MMBT3904W H_SOT323-3
E
3
REMOTE1-
Place near UC1 REMOTE1,2(+/-):

REMOTE2+ Trace length: <8"
1
C
2 QF2 TMS@
B MMBT3904W H_SOT323-3
C E C
3
REMOTE2-
JFP1
, ! , RK16 1 FP@ 2 0_0402_5% UK6
+FP_VCC PIN
1
SA464K-2200
+FP_VCC(3V)
+3VALW
RK17 1 @ 2 0_0402_5% 5 1
+5VALW IN OUT
1
2 D+
2 FP@
Power Source Check GND CK12 3 D-
4 3
EGIS ETU801 +FP_VCC=5V 2
EN OC 2
4.7U_0402_6.3V6M
4 GND
ELAN SA464K-2200 +FP_VCC=3.3V FP@
CK11
FP@ 5 NC
B 1U_0201_6.3V6M B
1 SA000079400 6 NC
FP_PWR_EN <58>
7 NC
8 NC
USB20_N2 RK18 1 RS@ 2 0_0402_5% USB20_N2_R

<10> USB20_N2
USB20_P2 RK19 1 RS@ 2 0_0402_5% USB20_P2_R +FP_VCC

<10> USB20_P2
09/10
JFP1 CONN@
1
www.teknisi-indonesia.com USB20_P2_R 2 1
DK2 FPESD@ USB20_N2_R 3 2
6 3 USB20_N2_R 4 3
I/O4 I/O2 5 4
6 5
7 6
5 2 8 7
VDD GND 8
+FP_VCC 9
10 GND
4 1 USB20_P2_R GND
A I/O3 I/O1 A
@ JXT_FP201H-008G10M
CK210 2 1 AZC099-04S.R7G_SOT23-6 SP010020S00
SC300001G00
0.1U_0201_10V6K

Thermal sensor
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
SATA Re-Driver +3VS

0902
B_EQ1
A_EQ2
A_EQ1
CS14
DEW
2 1 RD@
+5VS +5VS_HDD
0.01U_0402_16V7K UO2
20
19
18
17
16
D RD@ PS8527CTQFN20GTR2A_TQFN20_4X4 RS@ 100mils D
SA00007JU10 1 2
VDD2
B_EQ1
A_EQ2
A_EQ1
DEW
RS29
0_0805_5% 1
10U_0402_6.3V6M
1
10U_0402_6.3V6M
1
RD@ CS10 2 1 0.01U_0402_16V7K SATA_ATX_C_RD_DRX_P1 1 15 SATA_ATX_RD_DRX_P1 CS15 CS16 CS17
<6> PCIE_SATA_ATX_DRX_P3 A_INP A_OUTP
RD@ CS11 2 1 0.01U_0402_16V7K SATA_ATX_C_RD_DRX_N1 2 14 SATA_ATX_RD_DRX_N1 0.1U_0201_10V6K
<6> PCIE_SATA_ATX_DRX_N3 A_INN A_OUTN
3 13 B_EQ2 HDD@ HDD@ @
RD@ CS12 2 1 0.01U_0402_16V7K SATA_ARX_C_RD_DTX_N1 4 GND1 B_EQ2 12 SATA_ARX_RD_DTX_N1 2 2 2
<6> PCIE_SATA_ARX_DTX_N3 SATA_ARX_C_RD_DTX_P1 5 B_OUTN B_INN SATA_ARX_RD_DTX_P1
RD@ CS13 2 1 0.01U_0402_16V7K 11
<6> PCIE_SATA_ARX_DTX_P3 B_OUTP B_INP
21
GND2
REXT
VDD1
B_DE
A_DE
EN
+3VS
6
7
8
9
10
+3VS
RS10 1 @ 2 4.7K_0402_5% A_DE RS26 +3VS
RS11 1 @ 2 4.7K_0402_5% 4.99K_0402_1% 1
2 @ 1 CS30
B_DE
A_DE
RS12 1 @ 2 4.7K_0402_5% A_EQ1 0.1U_0201_10V6K JHDD1
RS13 1 RD@ 2 4.7K_0402_5% RS27 2 RD@ 1 RD@ +5VS_HDD 14
+3VS 4.99K_0402_1% 2 13 GND
RS14 1 @ 2 4.7K_0402_5% A_EQ2 GND
RS15 1 RD@ 2 4.7K_0402_5% RS28 1 @ 2 12
4.7K_0402_5% 11 12
RS16 1 @ 2 4.7K_0402_5% B_DE remove G_INT2 0911 10 11
RS17 1 @ 2 4.7K_0402_5% RS33 1 RS@ 2 0_0402_5% JHDD_P9 9 10
8 9
RS18 1 @ 2 4.7K_0402_5% B_EQ1 7 8
RS19 1 RD@ 2 4.7K_0402_5% SATA_ARX_RD_DTX_P1 CS20 1 2 HDD@ 0.01U_0402_16V7K SATA_ARX_C_DTX_P1 6 7
C SATA_ARX_RD_DTX_N1 CS21 1 2 HDD@ 0.01U_0402_16V7K SATA_ARX_C_DTX_N1 5 6 C
RS20 1 @ 2 4.7K_0402_5% B_EQ2 4 5
RS21 1 RD@ 2 4.7K_0402_5% SATA_ATX_RD_DRX_N1 CS22 1 2 HDD@ 0.01U_0402_16V7K SATA_ATX_C_DRX_N1 3 4
SATA_ATX_RD_DRX_P1 CS23 1 2 HDD@ 0.01U_0402_16V7K SATA_ATX_C_DRX_P1 2 3
RS22 1 @ 2 4.7K_0402_5% DEW 1 2
RS23 1 @ 2 4.7K_0402_5% close to CONN. 1
ACES_51625-01201-001
CONN@
SP010028W00
B B
A A

SATA HDD
1.0
5 4 3 2 1
A B C D E F G H
PCIEx4 NGFF SSD Conn. +3V_SSD

+3V_SSD
JSSD1
1 2
3 GND 3.3VAUX 4
22U_0603_6.3V6M
0.1U_0201_10V6K
GND 3.3VAUX 1 1 1
PCIE_ARX_DTX_N7 5 6
<6> PCIE_ARX_DTX_N7 PCIE_ARX_DTX_P7 PERn3 DTx3 N/C + CS163
7 8
CS162
CS161
<6> PCIE_ARX_DTX_P7 PERp3 N/C
9 10 150U_B2_6.3VM_R35M
PCIE_ATX_C_DRX_N7 11 GND DAS/DSS# 12 2 2 SGA00009M00
<6> PCIE_ATX_C_DRX_N7 PCIE_ATX_C_DRX_P7 PETn3 DRx3 3.3VAUX 2
13 14
<6> PCIE_ATX_C_DRX_P7 15 PETp3 3.3VAUX 16
1 1
PCIE_ARX_DTX_N6 17 GND 3.3VAUX 18
<6> PCIE_ARX_DTX_N6 PCIE_ARX_DTX_P6 PERn2 DTx2 3.3VAUX
19 20
21 22
PCIE_ATX_C_DRX_N6 23 GND N/C 24
<6> PCIE_ATX_C_DRX_N6 PCIE_ATX_C_DRX_P6 25 PETn2 DRx2 N/C 26
<6> PCIE_ATX_C_DRX_P6 PETp2 N/C
27 28
PCIE_ARX_DTX_N5 29 GND N/C 30
<6> PCIE_ARX_DTX_N5 PCIE_ARX_DTX_P5 PERn1 DTx1 N/C
31 32
33 34
<6> PCIE_ATX_C_DRX_N5 PCIE_ATX_C_DRX_P5 PETn1 DRx1 N/C
37 38
<6> PCIE_ATX_C_DRX_P5 PETp1 DEVSLP
39 40 Place near connector(ESD)
PCIE_ARX_DTX_N4 41 GND N/C 42
<6> PCIE_ARX_DTX_N4 PCIE_ARX_DTX_P4 PERn0/SATA_B+ DTx0 N/C
43 44 @ESD@ CS164
<6> PCIE_ARX_DTX_P4 45 PERp0/SATA_B- N/C 46 2 1 100P_0201_50V8J
<6> PCIE_ATX_C_DRX_N4 PCIE_ATX_C_DRX_P4 PETn0/SATA_A- DRx0 N/C SSD_PCIE_RST#
49 50
<6> PCIE_ATX_C_DRX_P4 PETp0/SATA_A+ PERST# CLKREQ_PCIE#1
51 52
CLK_PCIE_N1 GND CLKREQ# CLKREQ_PCIE#1 <10>
53 54
<10> CLK_PCIE_N1 CLK_PCIE_P1 55 REFCLKn PEWake# 56 0902
<10> CLK_PCIE_P1 REFCLKp N/C
57 58
GND N/C
67 68 SUSCLK_SSD TP@
N/C SUSCLK TS3
69 70
LON/SAM:Pin61=GND 71 PEDET 3.3VAUX 72
73 GND 3.3VAUX 74
75 GND 3.3VAUX
GND
remove SSD_DET# on PCIEX4 SSD 0911 76
GND 77
GND
2 2
CONN@ BELLW_80159-4221
SP07001D300
PCIE/SATA NGFF SSD Conn. +3V_SSD

+3V_SSD
JSSD2
1 2
3 GND 3.3VAUX 4
PCIE_ARX_DTX_N11 5 GND 3.3VAUX 6
<6> PCIE_ARX_DTX_N11 PCIE_ARX_DTX_P11 7 PERn3 DTx3 N/C 8 LON/SAM:Pin10=Device_Active_Signal
22U_0603_6.3V6M
0.1U_0201_10V6K
<6> PCIE_ARX_DTX_P11 PERp3 N/C 1 1 1
9 10
PCIE_ATX_C_DRX_N11 11 GND DAS/DSS# 12 + CS152
CS1
CS151
<6> PCIE_ATX_C_DRX_N11 PCIE_ATX_C_DRX_P11 PETn3 3.3VAUX
13 DRx3 14 150U_B2_6.3VM_R35M
<6> PCIE_ATX_C_DRX_P11 PETp3 3.3VAUX +3V_SSD 2 2
15 16 SGA00009M00
PCIE_ARX_DTX_N10 17 GND 3.3VAUX 18 2
<6> PCIE_ARX_DTX_N10 PCIE_ARX_DTX_P10 PERn2 DTx2 3.3VAUX
19 20
<6> PCIE_ARX_DTX_P10 PERp2 N/C DEVSLP0_R
21 22 RS158 1 2 100K_0402_5%
<6> PCIE_ATX_C_DRX_N10 PCIE_ATX_C_DRX_P10 PETn2 N/C
25 DRx2 26
<6> PCIE_ATX_C_DRX_P10 27 PETp2 N/C 28
3 PCIE/SATA SSD GND N/C
3
PCIE_ARX_DTX_N9 29 30 LON:If system didn't support DEVSLP, set Device Sleep Signal high and
<6> PCIE_ARX_DTX_N9 PCIE_ARX_DTX_P9 PERn1 N/C keep (from power on), device will ignore.
31 DTx1 32
33 34 RS161 1 @ 2 0_0402_5%
<6> PCIE_ATX_C_DRX_N9 PCIE_ATX_C_DRX_P9 37 PETn1 DRx1 N/C 38 DEVSLP0_R 2 1
DS1
<6> PCIE_ATX_C_DRX_P9 PETp1 DEVSLP DEVSLP0 <9>
39 40 LRB751V-40T1G_SOD323-2
PCIE_ARX_DTX_P8 41 GND N/C 42 RS152 1 2 0_0402_5%
SATA Pin <6> PCIE_ARX_DTX_P8 PCIE_ARX_DTX_N8 43 PERn0/SATA_B+ DTx0 N/C 44 @ESD@ @
reverse <6> PCIE_ARX_DTX_N8
45 PERp0/SATA_B- N/C 46 CS150 2 1 100P_0402_50V8J
PCIE_ATX_C_DRX_N8 47 GND N/C 48 Place near connector(ESD)
<6> PCIE_ATX_C_DRX_N8 PCIE_ATX_C_DRX_P8 PETn0/SATA_A- DRx0 N/C SSD_PCIE_RST#
49 50
<6> PCIE_ATX_C_DRX_P8 PETp0/SATA_A+ PERST# CLKREQ_PCIE#4
51 52 CLKREQ_PCIE#4 <10>
CLK_PCIE_N4 53 GND CLKREQ# 54
<10> CLK_PCIE_N4 CLK_PCIE_P4 REFCLKn PEWake#
55 56
<10> CLK_PCIE_P4 57 REFCLKp N/C 58 RS155 1 @ 2 0_0402_5%
GND N/C
67 68 SUSCLK_SSD1 TP@ +3VALW

SSD_DET# N/C SUSCLK TS1
RS1 1 RS@ 2 0_0402_5% 69 70
<9> SSD_DET#_R LON/SAM:Pin61=GND 71 PEDET 3.3VAUX 72
73 GND 3.3VAUX 74
GND 3.3VAUX
FH51S
5
75
GND APU_PCIE_RST# 1
P
<9,52,72> APU_PCIE_RST# IN1 SSD_PCIE_RST#
76 4
GND 77 RS159 1 RS@ 2 0_0402_5% SSD_RST# 2 O
GND <9,52> AGPIO40 IN2
1
US14 SA0000BIP00
3
1
CONN@ BELLW_80159-4221 MC74VHC1G08DFT2G_SC70-5 RS156
SP07001D300 RS157 @ 100K_0402_5%
SSD_DET# Function 10K_0402_5%
2
2
4 4
1 PCIE SSD Device
0 SATA SSD Device

M.2 SSD
1.0
A B C D E F G H
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
+3VS_TYPEA
+3VS_TYPEA
1
+3VS RT220 +3VS_TYPEA
0_0603_5% UT3
1 RS@ 2 RT230
+3VALW 1 14 TYPEA_DCBOOST# 1K_0402_5%
13 VDD33 PS 5 TYPEA_EN
2
1 @ 2 VDD33 EN 7 TYPEA_MODE
0_0603_5% NC 24 TYPEA_RSVD1 TYPEA_EN
RT221 USB3_ARX_RD_DTX_N1 20 NC From APU
1 1 1 RX2N
10U_0402_6.3V6M
CT100
0.1U_0201_10V6K
CT101
0.1U_0201_10V6K
CT102
USB3_ARX_RD_DTX_P1 19
D RX2P 1 D
12 USB3_ARX_C_RD_DTX_P1 0.33U_0402_10V6K 2 1 CT39 CT500
USB3.2 / PCIe GEN 2 TX2P USB3_ARX_C_RD_DTX_N1 0.33U_0402_10V6K USB3_ARX_DTX_P1 <10>
11 2 1 CT38 0.22U_0402_16V7K
2 2 2 USB3_ATX_RD_DRX_P1 ReDriver TX2N USB3_ARX_DTX_N1 <10>
22
USB3_ATX_RD_DRX_N1 23 TX1P 2
TX1N 9 USB3_ATX_C_RD_DRX_P1 0.22U_0402_16V7K 2 1 CT37
RX1P USB3_ATX_C_RD_DRX_N1 0.22U_0402_16V7K USB3_ATX_DRX_P1 <10>
8 2 1 CT36
TYPEA_CFG1 RXIN USB3_ATX_DRX_N1 <10>
4
TYPEA_CH1_EQ1 2 SW1
TYPEA_CH1_EQ2 3 EQ1
DG1 6
GND 10
TYPEA_CFG2 15 GND 18
TYPEA_CH2_EQ1 16 SW2 GND 21
TYPEA_CH2_EQ2 17 DG2 GND 25
EQ2 EPAD
GL9901T-OGY10_QFN24_4X4
Naming follow TI
SA0000D8810
+3VS_TYPEA +3VS_TYPEA
SWAP Pin 8/12

1
1
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
DT6 ESD@
USB3_ATX_RD_DRX_P1 USB3_ATX_C_DRX_P1 USB3_ATX_C_DRX_P1
RT202
RT204
RT206
RT208
RT210
RT212
RT214
RT871 To Conn. CT104 1 2 0.22U_0402_16V7K 1 9
RT200
@ @ @ @ @ @ @ @ 4.7K_0402_5%
USB3_ATX_RD_DRX_N1 CT103 1 2 0.22U_0402_16V7K USB3_ATX_C_DRX_N1 2 8 USB3_ATX_C_DRX_N1
2
2
TYPEA_CH1_EQ1 TYPEA_CFG1 USB3_ARX_RD_DTX_P1 CT105 1 2 0.33U_0402_10V6K USB3_ARX_C_DTX_P1 4 7 USB3_ARX_C_DTX_P1
TYPEA_CH1_EQ2 TYPEA_CFG2
TYPEA_CH2_EQ1 TYPEA_MODE USB3_ARX_RD_DTX_N1 CT106 1 2 0.33U_0402_10V6K USB3_ARX_C_DTX_N1 5 6 USB3_ARX_C_DTX_N1
TYPEA_CH2_EQ2 TYPEA_RSVD1
C C
TYPEA_DCBOOST#
1
1
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
3
1
1
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
RT201
RT203
RT205
RT207
RT211
RT209
RT213
RT215
RT872
@ @ @ @ @ TVWDF1004AD0_DFN9
@ @ @ @ SC300006T00
AZ176S-04F.R7G
2
2 3 4 15 17 16 14
2
2
SW1 EQ1 DG1 SW2 EQ2 DG2 PS
F F F F F F H USB3.0 Conn.
+USB3_VCCA
.1U_0402_16V7K
.1U_0402_16V7K
1 1 1
EMI@ @RF@
CT35 + CT60 CT511
150U_B2_6.3VM_R35M
SGA00009M00 2 2
USB Host Charger Truth Table SW_USB20_P1 2 1 USB20_P1_R 6

DT12
I/O4
ESD@
I/O2
3 USB20_P1_R
2
1
JUSB1
CTL2 CTL3 ILIM_SEL MODE Current Limit Note VBUS
Setting +USB3_VCCA USB20_N1_R 2
SW_USB20_N1 3 4 USB20_N1_R USB20_P1_R 3 D-
5 2 4 D+
1 0 1 SDP1-OFF ILIM_H Port power off 1 VDD GND GND
DLM0NSN900HY2D_4P USB3_ARX_C_DTX_N1 5
LT2 EMI@ CT515 @ USB3_ARX_C_DTX_P1 6 STDA_SSRX- 10
1 0 1 SDP1 ILIM_H Data Lines Connected STDA_SSRX+ GND
SM070005U00 0.1U_0201_10V6K 7 11
2 4 1 USB20_N1_R USB3_ATX_C_DRX_N1 8 GND GND 12
1 1 1 DCP ILIM_H Data Lines Disconnected I/O3 I/O1 STDA_SSTX- GND
B Auto USB3_ATX_C_DRX_P1 9 13 B
AZC099-04S.R7G_SOT23-6 STDA_SSTX+ GND
1 1 1 CDP ILIM_H Data Lines Connected SC300001G00 OCTEK_USB-09BTLWAB
Temp LTCX0093GB0
0924
CHG_EN CTL1
+5VALW
+5VALW 0904 vendor recommend
0 0
RT48 1 RS@ 2 0_1206_5%
1 0 1 @ 2 CHG_CTL3 0904 reserve VIN & VOUT 1206 for
QFN current measure
22U_0603_6.3V6M
0.1U_0201_10V6K
RT42 10K_0402_5% 1 1
1 0
CT34
CT32
@
CHG_EN 2 @ 1 CHG_CTL1 CHG@ +USB3_VCCA
RT47 10K_0402_5% 2 2
1 1
UT4 CHG@
+5VALW_CHG 1 12 +USB3VCCA_CHG RT49 1 RS@ 2 0_1206_5%
VIN VOUT
.1U_0402_16V7K
1
USB20_N1 2 @RF@
+5VALW <10> USB20_N1 USB20_P1 DM_OUT
3 CT512
<10> USB20_P1 DP_OUT SW_USB20_P1
10
USB_OC0# RT37 2 @ 1 0_0402_5% 13 DP_IN 11 SW_USB20_N1 2
<10> USB_OC0# FAULT# DM_IN
RT40 1 CHG@ 2 10K_0402_5% CHG_CTL2 1 CHG_ILMSEL 4
<58> CHG_ILMSEL ILIM_SEL
CT33 CHG_EN 5 15
<58> CHG_EN EN ILIM_L
0.1U_0201_10V6K 16
RT41 1 @ 2 10K_0402_5% CHG_ILMSEL @ 2 ILIM_HI
1
CHG_CTL1 6
<58> CHG_CTL1 CTL1 ILM R vaule
22.1K_0402_1%
39K_0402_1%
CHG_CTL2 7 9
CTL2 NC
Ios(mA)=50250/R(Kohm)
RT38
RT39
CHG_CTL3 8 14
<58> CHG_CTL3 CTL3 GND
A 17 A
Thermal Pad CHG@ @ ILIM_Hi=2273mA
2
SLGC55544CVTR_TQFN16_3X3 ILIM_L=1288mA
SA000097E10

USB3.0 CHARGER
1.0
5 4 3 2 1
5 4 3 2 1
D D
LT4 EMI@
USB20_P4 2 1 USB20_P4_R
<10> USB20_P4
JIO2 CONN@
USB20_N4 3 4 USB20_N4_R SPKL- 1
<10> USB20_N4 <56> SPKL-
SPKL+
40mil 2 1
DLM0NSN900HY2D_4P
<56> SPKL+ 40mil 3 2
+3VS 3
SM070005U00 +5VALW 4
5 4
6 5
6
7
8 GND
GND
CVILU_CI4206M2HRJ-NH
C C
JIO1 CONN@
SM070005U00 42
DLM0NSN900HY2D_4P 41 GND2
USB20_P5 2 1 USB20_P5_R 40 GND1
<10> USB20_P5 USB3_ATX_DRX_P5 40
<10> USB3_ATX_DRX_P5 39
USB3_ATX_DRX_N5 38 39
<10> USB3_ATX_DRX_N5 38
USB20_N5 3 4 USB20_N5_R 37
<10> USB20_N5 USB3_ARX_DTX_P5 37
Port3 36
LT3 EMI@ <10> USB3_ARX_DTX_P5 USB3_ARX_DTX_N5 36
35
<10> USB3_ARX_DTX_N5 35
34
USB20_N5_R 33 34
USB20_P5_R 32 33
31 32
USB20_N4_R 30 31
USB20_P4_R 29 30
28 29
USB3_ATX_DRX_P4 27 28
B <10> USB3_ATX_DRX_P4 USB3_ATX_DRX_N4 27 B
26
<10> USB3_ATX_DRX_N4 26
25
USB3_ARX_DTX_P4 24 25
Port2 <10> USB3_ARX_DTX_P4 USB3_ARX_DTX_N4 24
23
<10> USB3_ARX_DTX_N4 23
22
PCIE_ARX_DTX_N0 21 22
<6> PCIE_ARX_DTX_N0 PCIE_ARX_DTX_P0 21
20
<6> PCIE_ARX_DTX_P0 20
19
PCIE_ATX_DRX_N0 18 19
<6> PCIE_ATX_DRX_N0 PCIE_ATX_DRX_P0 18
LAN 17
<6> PCIE_ATX_DRX_P0 17
16
CLK_PCIE_P2 15 16
<10> CLK_PCIE_P2 CLK_PCIE_N2 15
14
<10> CLK_PCIE_N2 14
13
USB_EN 12 13
<42,58> USB_EN 12
+3VALW 11
10 11
CLKREQ_PCIE#2 9 10
<10> CLKREQ_PCIE#2 EC_LAN_PME# 9
8
<58> EC_LAN_PME# APU_PCIE_RST# 8
7
<9,52,69> APU_PCIE_RST# 7
GNDA 6
5 6
<56> HP_PLUG# 5
<56> RING2 4
3 4
<56> SLEEVE 3
<56> HPOUT_R_1 2
1 2
<56> HPOUT_L_1 1
TW VM_FPC0518-40RC-TAGHT
0927 Update SP01002UH00
A A

IO Board
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
8
GPU Side
+FAN1_PW R
+5VS
D
+12V_FAN 40mil RF1 1 5VGPU@2 0_0603_5%
D
% , /*, +3VLP
1000P_0402_50V7K
1
RF27 1 2 0_0603_5%
12VGPU@ @EMI@
CF2 RK215 1 @ 2 0_0402_5%
MAINPWON <58,84,87>
2
2
RK216 RK217 1 RS@ 2 0_0402_5%
EC_RST# <58>
100K_0402_5%
6
+3VS D
+FAN1_PW R BI_GATE# 2 QK1A
G
2B &' ( "%& @ A% ,+ 2N7002KDW _SOT363-6
1
SB00000EO00
3
RF2 4.7U_0402_6.3V6M D 1 S
1
10K_0402_5% 2 1 BI_GATE 5
CF1 5VGPU@ CONN@ <84> BI_GATE G CK209
4.7U_0603_25V6K 40mil JFAN1 0.1U_0201_10V6K
2
CF26 2 1 12VGPU@ 1 S 2
4
FAN_SPEED1 2 1 QK1B
<58> FAN_SPEED1 FAN_PW M1 2
3 2N7002KDW _SOT363-6
<58> FAN_PW M1 3
4 SB00000EO00
4
1 5 Vgs=1.0-2.5V
CF3 6 GND
1000P_0402_50V7K GND
@EMI@ CVILU_CI4204M2HR0-NH
2
C
SP020012X00 C
Footprint from CIS
% *
SW K2
@
BI_GATE 1 2
CPU Side 3 4
+FAN2_PW R
+5VS SN100004N00
SKRPABE010_4P
+12V_FAN
40mil RF29 1 5VCPU@2 0_0603_5%
1000P_0402_50V7K
RF30 1 2 0_0603_5% 1
12VCPU@
@EMI@
CF28
2
B B
+3VS
+FAN2_PW R
1
RF26 4.7U_0402_6.3V6M
10K_0402_5% 2 1
CF29 5VCPU@ CONN@
4.7U_0603_25V6K 40mil JFAN2
2
CF27 2 1 12VCPU@ 1
1
<58> FAN_SPEED2
<58> FAN_PW M2
FAN_SPEED2
FAN_PW M2
2
3
4
2
3
4
&* 7 5 6 +5VALW CONN@
1 5 JTRB1
CF25 6 GND 1
1000P_0402_50V7K GND TURBO_LED# 2 1
<59> TURBO_LED# TURBO_EN# 2
@EMI@ CVILU_CI4204M2HR0-NH 3 5
2 <59> TURBO_EN# 3 G1
SP020012X00 4 6
4 G2
Footprint from CIS ACES_51575-00401-001
SP01002LG00
A A

FAN/BATT RESET_DEGUB SW
1.0
5 4 3 2 1
A B C D E
-@ 2 G @.E2# $- /: .G E%+ G :
Modify GPU +1.8V VPP from +3VS

UV8 to U20 for Layout placement
+3VSDGPU
CV2796
VGA@ U20
1 2 1 1 2 1 14 RV230 1 RS@ 2 1
VIN1 VOUT1
0.1U_0201_10V6K
10U_0402_6.3V6M
CV2728 VGA@ 2 13 0_0603_5%
0.01U_0402_16V7K 1U_0201_6.3V6M VIN1 VOUT1 VGA@
1 1
CV2729
CV298
RV260 1 RS@ 2 3VSDGPU_EN_R 3 12 CV297 1 2 220P_0402_50V8J VGA@
<26,37,39> 3VSDGPU_EN ON1 CT1
0_0402_5% +5VALW VGA@
2 1 4 11
C2788 0.1U_0201_10V6K VBIAS GND 2 2
R117 1 2 3VS_ON 5 10 1 2
<37,39,41,58,85,89> SUSP# ON2 CT2
0_0402_5% 1 C10 560P_0402_50V7K
6 9 +3VS
4.7U_0402_6.3V6M @ +3VALW 7 VIN2 VOUT2 8 J7 JP@
C52 VIN2 VOUT2 +3VS_LS
2 15
GPAD 1
2 JUMP_43X118
RV342 @ C12 C13
1M_0402_5% 1U_0201_6.3V6M EM5209VF_DFN14_3X2
0.1U_0201_10V6K
2 1 3VSDGPU_EN SA00007PM00 2
1 Vih=1.2
+3VALW
2 2
1
+3VALW -@ 2 G @.E2# $- /: .G E%+ G : C2780
U21 .1U_0402_16V7K
C11 +3V_SSD 2 @RF@
1 2 1 14 J8 JP@
2 VIN1 VOUT1 13 +3V_SSD_LS
1U_0201_6.3V6M VIN1 VOUT1
1
SUSP# R119 1 RS@ 2 0_0402_5% 3V_SSD_ON 3 12 1 2 JUMP_43X118 (
ON1 CT1 C9 330P_0402_50V7K C14
+5VALW % > < % E % 1
2 1 4 11 0.1U_0201_10V6K
C2789 0.1U_0201_10V6K VBIAS GND 2
R120 1 RS@ 2 0_0402_5% 5VS_ON 5 10 1 2
ON2 CT2 C817 330P_0402_50V7K +5VS
6 9 J10 JP@
6A
+5VALW VIN2 VOUT2
0918 SUSP# for SSD power 7 8 +5VS_LS
VIN2 VOUT2
1 1
1U_0201_6.3V6M 15 JUMP_43X118
C816 GPAD C818
EM5209VF_DFN14_3X2 0.1U_0201_10V6K
2 2
SA00007PM00
3 160mils(4.0A) 3
+0.75VALW U22 +0.75VS
SB00001EO00
DMN3009LFV-13_POW ERDI3333-8-5
3
2
4.7U_0402_6.3V6M
C701
1U_0201_6.3V6M
C461
5 1 1 1
1
C702
4.7U_0402_6.3V6M
4
2 @2
2
Vgs=1.0-3.0V
+5VALW
1 2 0.75VS_GATE
R941 1
4.7K_0402_5%
C16
D
1
0.1U_0201_10V6K
2 2
<58> 0.75VS_PW R_EN#
G
1
S Q84
3
R750 2N7002KW 1N SOT323-3-D

10K_0402_5% SB000009Q80
Vgs=1.0-2.0V
2
4 4

DC INTERFACE
1.0
A B C D E
5 4 3 2 1
/ =( +4 02
CLIP1 CLIP6 CLIP8 CLIP9
@ H2 @ H5 @ H3 @ H4 @ H10 @ H11 @ H12 @ H13 EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P
H_3P0 H_3P0 H_3P0 H_4P0 H_3P3 H_3P3 H_3P3 H_3P3
1
@ @ @ @
1
1
D D
APU
CLIP2 CLIP7 CLIP10 CLIP11
@ H6 @ H7 @ H8 @ H9 EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P
H_4P0 H_5P6 H_4P0 H_4P0
@ H20 @ H22
H_3P3 H_3P3
1
@ @ @ @
1
1
WLAN CLIP3 CLIP12 CLIP13
SSD EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P
@ H14 @ H15 @ H16
H_3P8 H_3P8 H_3P8 DDR Socket
1
GPU
@ @ @
1
CLIP4 CLIP14 CLIP15

FD1 FD2 EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P
@ H17 @ H18 @ H19 @ H21

H_2P5 H_3P0 H_3P0 H_5P6 @ @
1
@ @ @
FIDUCIAL_C40M80 FIDUCIAL_C40M80
1
FD3 FD4 CLIP5 CLIP16 CLIP17

EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P
C @ H23 @ @ C
1
1
H_3P0X2P5
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80
@ @ @
GPU BOT
1
CLIP18
EMIST_SUL-12A2M_1P
1
@
ZZZ 45@
ROYALTY HDMI W/LOGO+HDCP

RO0000003HM
;* < 0')
PVT
ZZZ PCB@
@ JC1
B 1 2 B
1 2
JUMP_43X79
PCB 3BL LA-L031P REV0 MB 4 S
DAB0008M01A @ JC2
1 2
1 2
ZZZ DAZ@
JUMP_43X79
PCB 3BL LA-L031P REV0 MB 4 S

DAZ3BL00101
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C Reserve C
B www.teknisi-indonesia.com B
A A

Reserve
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
Size
1.0
5 4 3 2 1
A B C D
EMI@ PL101
FBMA-L11-201209-800LMA50T
1 2
+19V_ADPIN EMI@ PL102
+19V_VIN
FBMA-L11-201209-800LMA50T
+19V_ADPIN 1 2
EMI@ PL103
2
FBMA-L11-201209-800LMA50T
PR102
2
4.7_1206_5% 1 2
PR103
4.7_1206_5%
2+19V_ADPIN_ FOR_EMI 1
1 1
2+19V_VIN_FOR_EMI 1
@ PJP101
1
1
1
1
2 EMI@ PC102
2 3 PC101 EMI@ 1000P_0402_50V7K
2
3 4 100P_0402_50V8J
2
4 5
5 6
6 7
7 8
8 9 EMI@ PC103 EMI@ PC104
9 10 0.1U_0603_25V7K 0.1U_0603_25V7K
1
1
10
SINGA_2DC3207-000111F
ADAPDET <85>
2 2
3 3
@ PR101
0_0603_5%
1 2
+3VLP +CHGRTC
4 4

DCIN
Custom 1.0
A B C D
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
Size
1.0
5 4 3 2 1
A B C D
PR201 100_0402_1%
1 2
EC_SMB_DA1 <58,85>
PR202 100_0402_1%
1 2
EC_SMB_CK1 <58,85>
+3VLP
PR203
200K_0402_1%
@ 1 2
PJP201 +3VLP
1 @
1
1
2 1 2 PC202
1
2 3 EC_SMB_DA1-1 BATT_TEMP <58,85> 1
1
4 EC_SMB_CK1-1 PR204 1K_0402_1% 0.1U_0603_25V7K
2
4 5 BATT_TS @ @
5
1
6 BATT_B/I @ PR205 PR206
6 7 PR207 10K_0402_1% 10K_0402_1%
7 8 100K_0402_1%
2
8 9 +RTCVCC @
GND 10 PU201
2
GND 1 8
VCC TMSNS1
1
CVILU_CI9908M2HR0-NH 2 7 2 1
PR208 GND RHYST1
1
100K_0402_5% 3 6 @
D PQ201 <58,77,87> MAINPWON OT1 TMSNS2 PR209 @
2
2 4 5 47K_0402_1% PH201
<77> BI_GATE G OT2 RHYST2 100K_0402_1%_NCP15WF104F03RC
S LBSS139LT1G_SOT23-3 G718TM1U_SOT23-8
2
EMI@ PL201
1 BATT_B/I_TO GND 3
+16.8V_BATT+ FBMA-L11-201209-800LMA50T
1 2
EMI@ PL202
FBMA-L11-201209-800LMA50T
1 2
+16.8V_BATT
EMI@ PL203
FBMA-L11-201209-800LMA50T
1
1
1 2 @
EMI@ PC201 EMI@ PC203 PR212
1000P_0402_50V7K 1000P_0402_50V7K 0_0402_5%
2
2
For KB9022 For KB9012
2
OTP Active Recovery sense 20m Active Recovery 2
2
VCIN0_PH(V) 92C, 1V 56C, 2.V SR 45W 58.5W, 0.61V 58.5W, 0.61V
PH202(ohm) 7.3092K 26.11K BR 65W 84.5W, 0.61V 84.5W, 0.61V
PH202 under CPU botten side :

CPU thermal protection at 96 degree C ( shutdown )
Recovery at 56 degree C +EC_VCCA
ADP_I <58,85>
2013/10/02 +EC_VCCA
Add for ENE9022 Battery Voltage drop detection. Recovery at 56 degree C
3
Connect to ENE9022 pin64 AD1. 3
1
PR210
PR211
Reserve for 2-cell design 16.9K_0402_1%
1
10K_0402_1%
PR218
2
16.5K_0402_1%
<58> 9022_PH1
+19VB_5V
2
<58> VRAM_TEMP
9022_VCIN <58>
1
PH202
1
@ 100K_0402_1%_B25/50 4250K
1
PR213
750K_0402_1% PH204 @ PH203 B value:4250K±1%
2
@ 100K_0402_1%_B25/50 4250K 100K_0402_1%_B25/50 4250K
PR214
2
0_0402_5%
2
1 2 VCIN1_BATT_DROP <58> @
T1
1
@
T2 PR215
1
@ @ 10K_0402_1%
2
1
PC204 PR216 B value:4250K±1%
0_0402_5%
PR217
0.1U_0402_25V6 150K_0402_1%
2
1
2
4 4
ECAGND

BATTERY CONN / OTP
Custom 1.0
A B C D
A B C D E
Choke 4.7uH SH00000YC00 (Common Part)

PRB1
(Size:6.6 x 7.3 x 3 mm)
1
1M_0402_1% D PQB3
2 1 2 (DCR:28m~33m)
G L2N7002SWT1G_SOT323-3
PRB2 S
3
2 1
3M_0402_5%
PQB18 EMP21N03HC_N_DFN56-8-5
AON7380_DFN3X3-8-5 PQB19
5 1 1
2 2 PRB46
3 3 5 0.01_1206_1%
1 4
+19V_P2 +19VB PQB13 AON7380_DFN3X3-8-5
4
1
+19V_P1 +16.8V_BATT_CHG
4
2 3 2
1 5 3 1
PQB11 EMP21N03HC_N_DFN56-8-5 AON7380_DFN3X3-8-5 PQB12
4
5 1 1
PRB3
0.01_1206_1% EMI@ PLB1
+19V_CHG
+19V_VIN 2 2 HCB2012KF-121T50_0805
3 3 5 1 4 1 2
10U_0603_25V6M
680P_0402_50V7K
2 3
10U_0603_25V6M
PCB8 @ 10U_0603_25V6M
0.047U_0603_25V7M
EMI@ PCB29
EMI@ PCB30
4
10U_0603_25V6M
1000P_0402_50V7K
2200P_0402_50V7K
PCB2
1 2
1
PCB1
PCB3
PCB4
68P_0402_50V8J
0.1U_0402_25V6
0.1U_0402_25V6
ACP ACN
1
@EMI@ PCB5
EMI@ PCB6
PCB9
EMI@ PCB10
0.022U_0603_25V7K
2
4.7_0603_1%
4.02K_0402_1%
2
10_0402_1%
1
1
PRB4
ACFET MDU1512 SB00000SY00 PCB12
2
PCB11
0.1U_0402_25V6 PCB13
PRB5
PRB6
Rds(on):4.2~5m Ohm
EMI@
2 1 1 2 1 2
Vgs=20V
PCB7
1
Vds=30V
2
ACDRV_CHGR_R 0.1U_0402_25V7K 0.1U_0402_25V7K
ID= 24.2A (Ta=70C)
+19V_VIN PRB7
4.02K_0402_1% BATDRV_CHGR
1
1 2 ACDRV_CHGR
1
PRB47
10K_0402_50%_TPM0S103P130R @0@ PRB8 @0@ PRB9
0_0402_5% 0_0402_5%
2 1CMSRC_CHGR BATSRC_CHGR
2
PRB10
2
+19V_VIN
1
4.02K_0402_1%
ACN_CHGR
ACP_CHGR
PRB48
PDB1 PRB12 @ PCB15
0_0402_5% S SCH DIO BAS40CW SOT-323 10_0805_5%~N 1000P_0402_50V7K 2016/03/13 SE158225K80 X1
1
down size SE00000WP00 S

499K_0402_1%
3 1 2
+19V_VIN
2
PRB44
1 2 1
+19VB 2 ACDRV_CHGR CER CAP 2.2U 25V K X5R 0603
1
2
PCB16 1U_0603_25V6K +6V_CHG_REGN 2
PRB11 2 1 PCB18 PQB1
2
422K_0402_1% 2.2U_0603_16V6K AON7506_DFN33-8-5
5
PUB1
1 2
ACDRV
ACP
ACN
2
<82> ADAPDET ACDET 28

VCC PRB14
CMSRC_CHGR 3 24 0_0603_5%
2N7002KW_SOT323-3
CMSRC REGN 2DH_CHGR_R4

68.1K_0402_1%
PCB19 1
1
1
D PCB17 6 PRB16 0_0603_5% 0.047U_0603_25V7M

ACDET
1
BST_CHGR1 2BST_CHGR_R 1
215K_0402_1%
PRB13
2200P_0402_25V7K 25 2
PQB17
2 BTST
EC_SMB_DA1_CHGR11
PRB45
@0@ PRB15 1 2 0_0402_5%

G <58,84> EC_SMB_DA1 SDA +16.8V_BATT
2
3
2
1
@0@ PRB17 1 2 0_0402_5% EC_SMB_CK1_CHGR12 26 UG_CHGR PRB19
S
2
<58,84> EC_SMB_CK1 SCL HIDRV

3
PLB2 0.01_1206_1%
2
ACPRN_CHGR 5 4.7UH_PCMB063T-4R7MS_8A_20%
ACOK
1
<58,84> ADP_I PCB20 27 LX_CHGR 1 2 1 4

PRB49 1 2 PRB18 1 2 0_0402_5% 7 PHASE
IADP 2 3
1
LG_CHGR
4.7_1206_5%
0_0402_5% 100P_0402_50V8J IDCHG 8 23
<58> DCHG_I IDCHG LODRV
EMI@ PRB20
2
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
1 2 9
PMON
@ PCB21 10 22 PRB22 316K_0402_1% SRP SRN
1SNUB_CHGR2
/PROCHOT GND
1
PCB22
PCB23
@ PCB28
100P_0402_50V8J 1 2
+3VLP
@0@ PRB24 78.7K_0402_1% 4
2
PRB23 13 21 ILIM_CHGR 1 2
GND ILIM
680P_0402_50V7K
1 2 PRB25 PQB2
<8,58,97> APU_PROCHOT# 14 10_0402_1%
NC SRP_CHGR
EMI@ PCB24
0_0402_5% @0@ 20 1 2 EMB12N03V_N_DFN33-8-5
3
2
1
PRB26 SRP
1 2 15 19 SRN_CHGR 1 2
20160601 colay BQ24781
2
/BATPRES SRN
0_0402_5% PRB27
16 18 BATDRV_CHGR 10_0402_1% PCB25
/TB_STAT BATDRV 0.1U_0402_25V6
29 17 BATSRC_CHGR 1 2
PWPD BATSRC
<58,84> BATT_TEMP
3
CHG_TB_STAT BQ24781RUYR_WQFN28_4X4 3
+6V_CHG_REGN
0.1U_0402_25V6
0.1U_0402_25V6
3.3*100/(316+100)=0.79 H/L Side AON7506 SB000010A00
@ PRB36
ICHG= 0.79 /(20*0.01)=3.95A Rds(on):13~15.8mohm
1
PCB26
PCB27
10K_0402_1%
1 2 Vgs=20V
3.3*78.7/(316+78.7)=0.66 Vds=30V
2
ICHG= 0.66 /(20*0.01)=3.28A ID= 10.5A (Ta=70C)
ACDET
For 4S per cell 4.35V battery +3VS
1
4S_BATT@
PRB28
2M_0402_1%
1 2
4S_BATT@
1
PRB31
0_0402_5% +6V_CHG_REGN @ PRB42 @ PRB43
10K_0402_1% 10K_0402_1%
2
2
1
4S_BATT@ DGPU_AC_DETECT <26,58>

PQB7 PRB32
4S_BATT@ PRB33 LTC015EUBFS8TL_UMT3F 10K_0402_1%
100K_0402_1% PRB34 @ PQB16A
6
1 2 2 10K_0402_1% D 2N7002KDW_SOT363-6
2
<58> BATT_4S 1 2 ACPRN_CHGR 2

<58> ACIN G
1
1
4S_BATT@ PRB35 S
3
1
1
PQB9 D @ PQB15 @ PQB16B
3
2 12K_0402_1% RUM001L02_VMT3 D 2N7002KDW_SOT363-6
<37,39,41,58,78,89> SUSP# G APU_PROCHOT# 2 ACIN 5
2
G
S
L2N7002SWT1G_SOT323-3
3
4 S 4
4
3

* +
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size
R&D Document Number Rev
Custom
A B C D E
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
Size
1.0
5 4 3 2 1
A B C D E
PR301
499K_0402_1%
ENLDO_3V5V 1 2
EN1 and EN2 dont't floating +19VB
1
150K_0402_1%
+19VB
PR302
EMI@ PL311 PR303 PC301
FBMA-L11-201209-800LMA50T 0_0402_5% 0.1U_0402_25V7K
1 +19VB_3V BST_3V BST_3V_R 1
1 2 1 2 1 2
2200P_0402_50V7K
10U_0603_25V6M
10U_0603_25V6M
2
EMI@ PC302
@EMI@ PC303
EMI@ PC304
0.1U_0402_25V6
0.1U_0402_25V6
1
1
@ PC305
PC306
PU301
SY8288BRAC_QFN20_3X3 Choke 2.2uH SH00000YV00 (Common Part)
1
2
2
PL301
BS
IN
IN
IN
IN
2.2UH_7.8A_20%_7X7X3_M
LX_3V 6 20 LX_3V 1 2
LX LX +3VALWP
7 19
GND LX
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
8 18 @EMI@
+3VALWP GND GND
PC307
PC308
PC309
@ PC310
PC311
PC312
PR304
SPOK_3V 9 17 4.7_1206_5%
+3VLP
2
PG LDO
SN_3V 2
1
10 16
NC NC
1
PC313
OUT
EN2
EN1
21 4.7U_0402_6.3V6M
NC
FF
2
PR305 GND @
100K_0402_5%
11
12
13
14
15
1
@EMI@
2
PC314
680P_0402_50V7K
Vout is 3.234V~3.366V
<58> SPOK_3V
2
3.3V LDO 150mA~300mA
ENLDO_3V5V PC315 PR306

1000P_0402_50V7K 1K_0402_5%
FB_3V 1 2 FB_3V_R 1 2
<58> 3V_EN
@ PJ302
+3VALWP 1 2 +3VALW
1 2
JUMP_43X118
2 2
keep short pad,

snubber is for EMI only.
+19VB +19VB_5V
@
EMI@ PL511 PR501 PC501
FBMA-L11-201209-800LMA50T 0_0402_5% 0.1U_0402_25V7K
1 2 +19VB_5V BST_5V 1 2 BST_5V_R 1 2
2200P_0402_50V7K
0.1U_0402_25V6
0.1U_0402_25V6
10U_0603_25V6M
10U_0603_25V6M
PU501
Choke 1.5uH SH000016700 (Common Part)
13
1
SY8270CTMC_QFN13_3X4
@EMI@ PC504
PC502
PC503
EMI@ PC517
@EMI@ PC505
(Size:6.8 x 6.47 x 3 mm)

BS
IN
(DCR:14m~15m Ohm)
2
LX_5V 2 12 LX_5V
LX1 LX2 PL501
1.5UH_9A_20%_7X7X3_M
3 11 1 2 +5VALWP
GND1 GND2
4 10 VCC_5V 1 2
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
+3VLP PG VCC
1
1
PR502
PC507
PC508
PC509
PC510
PC511
PC512
PC518
4.7_1206_5%
PC506
OUT
LDO
EN2
EN1
@EMI@
2.2U_0402_6.3V6M
FF
2
1
PR503 @
2
100K_0402_5%
2
1SN_5V
3 +5VLP 3
680P_0402_50V7K
5V LDO 150mA~300mA
4.7U_0402_6.3V6M
<58> SPOK_5V
1
ENLDO_3V5V @EMI@
PC514
PC513
2
2
PR504
2.2K_0402_5% 5V_3V_EN
1 2 Iocp=12A
<58> EC_ON
@
PR505
0_0402_5%
1 2 EN1 and EN2 dont't be floating.
<58,77,84> MAINPWON EN :H>0.8V ; L<0.4V PC515 PR506 @ PJ502
1000P_0402_50V7K 1K_0402_1% +5VALWP 1 2 +5VALW
FB_5V 1 2 FB_5V_R 1 2 1 2
Fsw : 600K Hz
JUMP_43X118
5V_3V_EN
1M_0402_1%
1
SY8270C -> SA0000B9G00

1
PR507
PC516
4.7U_0402_6.3V6M
SY8371C -> SA0000D6S10
-> SA0000D6S00
2
2
SY8370C -> SA0000DLY00
4 4

+3VALW/+5VALW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
Custom 1.0
A B C D E
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
Size
1.0
5 4 3 2 1
A B C D E
@ PJM1
JUMP_43X79 Pin19 need pull separate from +1.35VP.
1 2
1 2 +19VB_1.2VP If you have +1.35V and +0.675V sequence question, 0.6Volt +/- 5%
you can change from +1.35VP to +1.35VS. TDC 0.7A
1 2 +19VB_1.2VP PRM11 Peak Current 1A
+19VB @EMI@ PLM11 2.2_0603_5%
HCB2012KF-121T50_0805 BST_1.2VP_R 1 2 BST_1.2VP
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_50V7K
+1.2VP
1
EMI@ PCM1
EMI@ PCM2
PCM3
PCM4
@EMI@ PCM20
UG_1.2VP +0.6VSP
1
1 1
PCM5
0.1U_0603_25V7K LX_1.2VP
22U_0603_6.3V6M
10U_0603_6.3V6M
2
1
PCM6
PCM7
16
17
18
19
20
PUM1
2
VLDOIN
BOOT
VTT
PHASE
UGATE
21 @
PAD
LG_1.2VP 15 1
PQM1 LGATE VTTGND
1
EMB09A03VP_EDFN3X3-8-10
IOCP
14 2
D1
D1
D1
G1
PLM1 PRM1 PGND VTTSNS
1UH_6.6A_20%_5X5X3_M 22.1K_0402_1%
1 2 LX_1.2VP 10 9 1 2 CS_1.2VP 13 3
+1.2VP D1 D2/S1 PCM8 CS RT8207PGQW_WQFN20_3X3 GND
1
1U_0201_6.3V6K
1 2 12 4 VTTREF_1.2VP
G2
S2
S2
S2
@EMI@ PRM2 PRM3 VDDP VTTREF
4.7_1206_5% 5.1_0603_5% 35.4
8
1 2 VDD_1.2VP 11 5
PCM9
PCM10
PCM11
PCM12
PCM13
PCM14
+1.2VP
SN_1.2VP 2
VDD VDDQ
1
PGOOD
PCM16
1 1 1 1 1 1 +5VALW 2 1
TON
1
PCM17 0.033U_0402_16V7K
FB
S5
S3
2
1
@
PDM1
1U_0201_6.3V6K 30MA_30V_0.5UA_0.4V_SOD323-2
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
10
6
2 2 2 2 2 2 PRM4
35.4
1
2.2_0402_1%
FB_1.2VP
@EMI@ PCM15
EN_1.2VP
680P_0402_50V7K PRM5
TON_1.2VP
EN_0.6VSP
2
6.34K_0402_1%
+5VALW Frequency 1 2 +1.2VP
PRM6
470K_0402_1%
1
+19VB_1.2VP 1 2
2 2
@
PRM8 PRM7
0_0402_5% 10K_0402_1%
Vout=0.75V* (1+Rup/Rdown)
SYSON 1 2 =0.75*(1+(6.34/10))
2
<58> SYSON
=1.2255V 2.1%
1
@ PCM18
0.1U_0402_16V7K
Vout=0.75V* (1+Rup/Rdown)
2
Choke 1uH SH00000YE00 (Common Part) =0.75*(1+(6.19/10))
(Size:6.86 x 6.47 x 3 mm) =1.214V 1.2%
@
PRM9
(DCR:6.2m~7.2m Ohm) 0_0402_5%
1 2
<37,39,41,58,78,85> SUSP# Vout=0.75V* (1+Rup/Rdown)
@ PJM2
Mode Level +0.675VSP VTTREF_1.35V JUMP_43X118 =0.75*(1+(8.2/10))
S5 L off off +1.2VP 1
1 2
2 +1.2V_VDDQ=1.365V 1.1%
S3 L off on H/S AON7408 Rds(on) :typ:27m Ohm, max:34m Ohm
S0 H on on Idsm(TA=25)=7.5A, Idsm(TA=70)=5.5A
1
@ PCM19 @ PJM3
Note: S3 - sleep ; S5 - power off L/S AON7506 Rds(on) :typ:13m Ohm, max:15.8m Ohm JUMP_43X39
0.1U_0402_16V7K 1 2
Idsm(TA=25)=12A, Idsm(TA=70)=10.5A +0.6VSP +0.6VS_VTT
2
1 2
Choke: SH00000YE00 Size:7x7x3 (Common Part)

Rdc=6.7mohm(Typ), 7.4mohm(Max) CYNTEC
Rdc=Xmohm(Typ), 11mohm(Max) TOKO
Rdc=6.2mohm(Typ), 7.2mohm(Max) Maglayers
Rdc=8.3mohm(Typ), 10mohm(Max) Tai-Tech
Rdc=6.7mohm(Typ), 7.4mohm(Max) Chilisin
Rdc=6.9±15% Panasonic
+3VALW Switching Frequency: 530kHz
3 Imax=A, Iocp=A 3
+5VALW Iocp=10.63~12.76A
OVP: 110%~120%
2
PJ2501 VFB=0.607V, Vout=1.214V

2
JUMP_43X79
@
1
1
PC2501
1U_0402_6.3V6K
2
1
PC2502
PU2501
FB=0.8V
22U_0603_6.3V6M Note:Iload(max)=4A
2
G9661MF11U_SO8 @ PJ2502
@
PR2501 4 5 JUMP_43X79
0_0402_5% VIN_2.5V 3 VPP NC 6 1 2
SYSON 1 2 EN_2.5V 2 VIN VO 7 +2.5VP +2.5VP 1 2 +2.5V
GND
1 VEN ADJ 8
22U_0603_6.3V6M
22U_0603_6.3V6M
0.01U_0402_25V7K
POK GND
1
0.1U_0402_16V7K
PR2503
PC2504
9
1
PR2502
Rup
PC2503
PC2505
@ PC2506
21.5K_0402_1%
2
1M_0402_5%
2
2
2
@ FB_2.5V
1
PR2504
10K_0402_1%
Rdown Vout=0.8V* (1+Rup/Rdown)
Vout=0.8V* (1+(21.5/10)) = 2.52V (x1.008)
2
4 4

A B C D E
5 4 3 2 1
D D
C C
@ PJ1801 PL1801
JUMP_43X39 PU1801 SY8843QWC_QFN7_1P5X1P5 1UH_2.8A_30%_4X4X2_F
1 2 IN_1.8VALW 5 6 LX_1.8VALW 1 2 PJ1802
+5VALW 1 2 IN LX +1.8VALWP @
3 2 1 2
FG OUT +1.8VALWP 1 2 +1.8VALW
EN_1.8VALW 4 1 FB_1.8VALW
@EMI@ PR1805
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
EN GND FB
1
1
JUMP_43X79
Rup
4.7_0603_5%
20.5K_0402_1%
PC1805
PR1803
PC1806
PC1804
PC1807
PC1808
7
22U_0603_6.3V6M
2
2
2
2
@ @
PR1801
1
<58,91,110> 0.75_1.8VALW_PWREN 0.75_1.8VALW_PWREN 1 2
680P_0402_50V7K
FB=0.6V
@EMI@ PC1801
1
0_0402_5%
PR1804 Rdown
10K_0402_1% Note:Iload(max)=3A
0.1U_0402_16V7K
2
1
PR1802
1M_0402_5%
Vout=[0.6V*(Rup+Rdown)/Rdown]
PC1803
=1.8
2
=0.6*(20.5+10)/10
2
B @ B
=1.83V (1.6%)
A A

1.8VALW
Custom 1.0
5 4 3 2 1
5 4 3 2 1
EN pin don't floating

If have pull down resistor at HW side, pls delete PR2
D D
PJF2 @
+19VB_CPU @ PJF1 PUF1 +0.75VALWP 1 2
+0.75VALW
1 2 +19VB_0.75VALWP 2 9 @ PRF3 PCF2 @EMI@ PRF2 @EMI@ PCF3 1 2
1 2 IN PG 0_0402_5% 0.1U_0402_25V7K 4.7_1206_5% 680P_0402_50V7K JUMP_43X118
BST_0.75VALWP SNB_0.75VALWP
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
3 1 1 2 1 2 1 2 1 2
0.1U_0402_25V6
0.1U_0402_25V6
JUMP_43X79 IN BS
1
@EMI@ PCF23
EMI@ PCF4
EMI@ PCF1
4 6
IN LX
2
5 19
PCF5
PCF22
PLF2
IN LX 1UH_6.6A_20%_5X5X3_M
7
GND LX
20 LX_0.75VALWP 1 2
" @ 0A
8 14 FB_0.75VALWP
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
GND FB
330P_0402_50V7K
1
@ PRF1 18 17 LDO_0.75VALWP
GND VCC
PCF6
PCF7
PCF8
PCF9
PCF10
PCF11
0_0402_5%
1
1 2 11 10
PCF13
PCF12 PRF10
2
<58,90,110> 0.75_1.8VALW_PWREN EN NC 2.2U_0402_6.3V6M 10_0402_1%
ILMT_0.75VALWP 13 12
2
ILMT NC
2
1
15 16
+3VALW BYP NC
1
PRF7 @ PCF14
1M_0402_1% 0.22U_0402_10V6K 21 PRF6
PAD
1
10K_0402_1% 1 2
$ 45
2
PCF15 SY8288RAC_QFN20_3X3 1 2 SYS_PWRGD_EC <9,58>

2
1U_0201_6.3V6M @ PRF23
2
(R1) 0_0402_5%
1
FB = 0.6V
@ PRF4
C 1 2 1 3 C
0_0402_5%
VDDP_SENSE <8>
2
1
ILMT_0.75VALWP @ PRF22
PRF9 0_0402_5% PQF1
(R2)
1
34.8K_0402_1% LSK3541G1ET2L_VMT3
@ PRF5 1 2
2
0_0402_5% APU_VDDP_SEN_H <8>
@ PRF24
2
0_0402_5%
1 2
APU_VDDP_SEN_L <8>
@ PRF21
0_0402_5%
VFB=0.6V
Vout=0.6V*(1+R1/R2)
Vout=0.6V*(1+10K/34.8K)=0.772
B B
A A

0.75VALWP
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
Size
1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
VCC_SENSE_APU_CORE
<8>
VSS_SEN_APU_CORE
<8>
<98>
<98>
ISEN3P_APU_CORE
ISEN3N_APU_CORE
D D
+5VS +5VS +19VB_CPU
0_0402_5%
0_0402_5%
15W_CPU@ PRZ44
15W_CPU@ PRZ46
1
2
PRZ1 PRZ2 PCZ2
0_0402_5%
0_0402_5%
10_0402_5% 10_0402_5% 0.01U_0402_50V7K
CORE SW= 435KHz
102K_0402_1%
2
2
1 2 1 2
+APU_CORE
PRZ43
PRZ45
PRZ7
1
1
25W_CPU@
PRZ6
1
@
@
54.9K_0402_1%
LL CORE(Rdroop)=0.7m
1 2
<98>
<98>
<98>
<98>
@ PCZ1 2 1
ISEN1P_APU_CORE
ISEN2P_APU_CORE
ISEN1N_APU_CORE
ISEN2N_APU_CORE
+5VS
330P_0402_50V7K
PRZ5 54W_CPU@ PRZ6 15W_CPU@ PRZ48
10K_0402_1% 47.5K_0402_1% 0_0402_5%
1 2 1 2 2 1 PWM3_APU_CORE <98>
@ PRZ47 0_0402_5%
PCZ7 PCZ8
330P_0402_50V7K 68P_0402_50V8J BST2_APU_CORE <98>
1 2 1 2
UG2_APU_CORE <98>
ISEN3N_APU_CORE_IC
ISEN3P_APU_CORE_IC
PWM3_APU_CORE_IC
ISEN1N_APU_CORE
ISEN2N_APU_CORE
ISEN1P_APU_CORE
ISEN2P_APU_CORE
BST2_APU_CORE
UG2_APU_CORE
TONSET_CPU
COMP_CPU
FB_CPU
+1.8VALW PUZ1
13
12
11
10
1
RT3663BRGQW_WQFN52_6X6
TONSET
PWM3
BOOT2
UGATE2
VSEN
ISEN3N
ISEN1N
ISEN2N
COMP
FB
ISEN3P
ISEN1P
ISEN2P
1
+5VALW
PRZ62 53 PRZ11
C 2.2_0402_5% GND 2.2_0402_5% C
14 52 LX2_APU_CORE LX2_APU_CORE <98> PVCC_CPU 1 2
RGND PHASE2
2
IMON_CPU 15 51 LG2_APU_CORE LG2_APU_CORE <98>
IMON LGATE2 VCC_CPU 1 2
PCZ13 VREF_CPU 16 50 PVCC_CPU
1U_0201_6.3V6M V064/SET3 PVCC PRZ12
2.2U_0603_10V6K
2.2U_0603_10V6K
1
1
IMONA_CPU17 49 LG1_APU_CORE LG1_APU_CORE <98> 10_0603_5%
PCZ14
PCZ15
IMONA LGATE1
SVD_CPU and SVC_CPURC filter put CPU side. 1 2 18 48 LX1_APU_CORE LX1_APU_CORE <98>
SVT_CPU RC filter put controller side.
2
VDDIO PHASE1
19 47 UG1_APU_CORE UG1_APU_CORE <98>
<8> APU_PWROK PWROK UGATE1
SVC_PWR_APU 20 46 BST1_APU_CORE BST1_APU_CORE <98>
<8> SVC_PWR_APU SVC BOOT1
SVD_PWR_APU 21 45 LG1_APU_CORE_SOC LG1_APU_CORE_SOC <99>
<8> SVD_PWR_APU SVD LGATEA1
1 2SVT_PWR_APU 22 44 LX1_APU_CORE_SOC LX1_APU_CORE_SOC <99>
SVT PHASEA1
25W_CPU@ PRZ15 0_0402_5% 23 43 UG1_APU_CORE_SOC UG1_APU_CORE_SOC <99>
<8> SVT_PWR_APU_R OFS UGATEA1
PRZ16
2
10K_0402_1% 54W_CPU@ 24 42 BST1_APU_CORE_SOC BST1_APU_CORE_SOC <99>
PRZ16 PRZ18 OFSA BOOTA1
23.2K_0402_1% SET1_CPU 25 41 PRZ19
13K_0402_1% SET1 PWMA2 +5VS
100K_0402_1%
SET2_CPU 26 40 1 2 +19VB_CPU
1
SET2 TONSETA
PGOODA
ISENA2N
ISENA1N
ISENA2P
ISENA1P
PGOOD
COMPA
VSENA
OCP_L
IBIAS
25W_CPU@ 54W_CPU@ PRZ21 PRZ22
VCC
FBA
PRZ21 10K_0402_1% 6.49K_0402_1%
EN
11K_0402_1% 1 2 1 2
100K_0402_1%_B25/50 4250K
27
28
1 IBIAS_CPU 29
COMPA_CPU 30
31
32
33
34
35
36
37
38
39
100K_0402_1%_B25/50 4250K
Confirm HW side the pull high resistor
1
VCC_CPU
54W_CPU@ PRZ23
PHZ1
PHZ2
FBA_CPU
PRZ25 20K_0402_1%
VGATE <58>
PRZ859 16.5K_0402_1%
21.5K_0402_1% APU_PROCHOT# <8,58,85> 1 2 EN: high > 2V, Low < 0.8V
+3VS
2
2
VCC_CPU 1 2 VREF_CPU
(** /" / +) % !" PRZ28 100K_0402_5%
Can't be floating.
100K_0402_1%
24.3K_0402_1%
2
+5VS VR_ON <58>

1
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
PRZ58
PRZ27
1
1
PCZ52 ISENA1P_APU_CORE_SOC <99>
PCZ27
PCZ28
0.1U_0402_25V6
2
1
0.022U_0402_25V7K
1
2 ISENA1N_APU_CORE_SOC <99> @ PRZ29
PCZ31
1
2
@ @ 10K_0402_5%
2
PCZ29 PCZ30 @
2
68P_0402_50V8J 330P_0402_50V7K
Close to IC Pin16 1 2 1 2
B B
25W_CPU@
PRZ25 PRZ31 PRZ32
15.4K_0402_1% 82.5K_0402_1% 10K_0402_1%
1 2 1 2
@ PCZ33
330P_0402_50V7K
SVD and SVC RC filter put CPU side. 1 2
SVT RC filter put controller side.
SVC_PWR_APU
SVD_PWR_APU
LL_SOC(Rdroop)=2.1m
1
@ PCZ54 PCZ55 @
10P_0402_25V8J 10P_0402_25V8J
2
VSS_SEN_APU_CORE
SVT_PWR_APU_R
1
PCZ53 @
10P_0402_25V8J PRZ33
2
10_0402_5%
1 2
SET1_CPU
+APU_CORE_SOC
1
PRZ34 PRZ35 PRZ61
20.5K_0402_1% 124K_0402_1% 1K_0402_1% PCZ38
1 2 1 2 1 2 0.01U_0402_50V7K
2
PRZ36 PRZ37 VCC_CPU
470_0402_1% 33K_0402_1%
1 2 1 2
VCC_SENSE_APU_CORE_SOC
<8>
SET2_CPU
A A

+APU_CORE
5 4 3 2 1
5 4 3 2 1
+19VB_CPU
EMI@ PLZ1
NA_2P
1 2
+19VB
EMI@ PLZ2
0.1U_0402_25V6
33U_D1_25VM_R6M
33U_D1_25VM_R6M
NA_2P
@EMI@ PCZ21
@EMI@ PCZ22
1 1
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
1 2
1
+ +
PCZ19
PCZ18
PCZ20
PCZ34
2
2
2 2
PRZ17
0_0603_5%
1 2 UG2_APU_CORE_R
<97> UG2_APU_CORE
PRZ20 PCZ24
2.2_0603_5% 0.22U_0603_25V7K 7x7x3
D 1 2 BST2_APU_CORE_R 1 2 D
<97> BST2_APU_CORE 25W_CPU@ PLZ4
0.15UH_NA__35A_20%
<97> LX2_APU_CORE
4
25W_CPU@
G1
D2/S1_3 S1/D2
D1_1
D1_2
PQZ2
AOE6936_DFN5X6E8-10
9 10
D1_3 S2 7x7x4
D2/S1_2
D2/S1_1
54W_CPU@ PLZ4
54W_CPU@ 0.15UH_NA__36A_20%
G2
PQZ2 1 4
+APU_CORE
AOE6930_DFN5X6E8-10
5
ISEN2P_APU_CORE_R 2 3
EMI@ PRZ24
4.7_1206_5%
1
54W_CPU@
LX2_APU_CORE-1 PRZ26
<97> LG2_APU_CORE 2.74K_0402_1%
1 2 1 2
680P_0402_50V7K
1 2
SNB_APU PCZ25
PCZ26
25W_CPU@ 0.1U_0402_25V6
PRZ26
EMI@
2K_0402_1%
ISEN2N_APU_CORE_R
<97> ISEN2P_APU_CORE
PRZ30
1.1K_0402_1%
<97> ISEN2N_APU_CORE 1 2
0.1U_0402_25V6
PCZ32
1
2
C C
APU_core
+19VB_CPU
PRZ38
7x7x3 TDC 58A (45W & 54W)
<97> UG1_APU_CORE
0_0603_5%
1 2 UG1_APU_CORE_R
25W_CPU@ PLZ5 EDC 110A (45W & 54W)
0.15UH_NA__35A_20%
0.1U_0402_25V6
@EMI@ PCZ9
@EMI@ PCZ10
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
PRZ39 PCZ41 TDC 44A (25W)
1
2.2_0603_5% 0.22U_0603_25V7K
PCZ39
PCZ40
<97> BST1_APU_CORE 1 2 BST1_APU_CORE_R1 2 EDC 95A (25W)
2
<97> LX1_APU_CORE 7x7x4 OCP current 154A (45W & 54W)
OCP current 133A (25W)
4
54W_CPU@ PLZ5
25W_CPU@ 0.15UH_NA__36A_20%
G1
D2/S1_3 S1/D2
D1_1
D1_2
PQZ4 1 4
AOE6936_DFN5X6E8-10
+APU_CORE Load line -0.7mV/A
ISEN1P_APU_CORE_R
9
D1_3 S2
10 2 3 DCR 0.67mohm +/-5% (7x7x4)
D2/S1_2
D2/S1_1
EMI@ PRZ40
4.7_1206_5%
54W_CPU@ DCR 0.9mohm +/-5% (7x7x3)
1
54W_CPU@ PRZ41
G2
PQZ4 2.74K_0402_1%
AOE6930_DFN5X6E8-10 1 2 1 2
680P_0402_50V7K
PCZ42
EMI@ PCZ43
12
25W_CPU@ 0.1U_0402_25V6
PRZ41
2K_0402_1%
2
<97> LG1_APU_CORE LX1_APU_CORE-1
ISEN1N_APU_CORE_R
<97> ISEN1P_APU_CORE
PRZ42
1.1K_0402_1%
<97> ISEN1N_APU_CORE 1 2
0.1U_0402_25V6
1
PCZ44
2
B B
+19VB_CPU
PRZ53
0_0603_5%
1 2 UG3_APU_CORE_R
0.1U_0402_25V6
2200P_0402_50V7K
@EMI@ PCZ16
@EMI@ PCZ17
10U_0603_25V6M
10U_0603_25V6M
1
1
7x7x3
PCZ47
PCZ48
PRZ60 PCZ46 25W_CPU@ PLZ6
2
2.2_0603_5% 0.22U_0603_25V7K 0.15UH_NA__35A_20%
BST3_APU_CORE 1 2 BST3_APU_CORE_R 1 2
1
25W_CPU@
PQZ5
G1
D2/S1_3 S1/D2
D1_1
D1_2
AOE6936_DFN5X6E8-10
PUZ2
9 10
D1_3 S2
D2/S1_2
D2/S1_1
4 3 UG3_APU_CORE
BOOT UGATE 7x7x4
<97> PWM3_APU_CORE 5 2 LX3_APU_CORE 54W_CPU@ 54W_CPU@ PLZ6
G2
PWM PHASE PQZ5 0.15UH_NA__36A_20%

1 6 AOE6930_DFN5X6E8-10 1 4
+APU_CORE
8
EN PGND
EMI@ PRZ55
8 7 LG3_APU_CORE ISEN3P_APU_CORE_R 2 3
4.7_1206_5%
+5VS VCC LGATE 9

GND
1
54W_CPU@
2
RT9610CGQW_WDFN8_2X2 PRZ56
PCZ45 2.74K_0402_1%
1U_0603_10V6K LX3_APU_CORE-1 1 2 1 2
1
680P_0402_50V7K
1 2
SNB_APU3
EMI@ PCZ49
25W_CPU@ PCZ50
PRZ56 0.1U_0402_25V6
2K_0402_1%
2
ISEN3N_APU_CORE_R
A <97> ISEN3P_APU_CORE A
PRZ57
1.1K_0402_1%
1 2
<97> ISEN3N_APU_CORE
0.1U_0402_25V6
1
PCZ51
2

APU_CORE_Stage
5 4 3 2 1
5 4 3 2 1
D D
+19VB_CPU
PRA3
+APU_CORE_SOC
0_0603_5%
<97> UG1_APU_CORE_SOC 1 2 UG1_APU_CORE_SOC_R
TDC 15A (45W & 54W)
EDC 20A (45W & 54W)
10U_0603_25V6M
10U_0603_25V6M
1
1
PCA3
PCA4
C TDC 13A (25W) C
EDC 17A (25W)
2
1
2
7x7x3 OCP current 28A (45W & 54W)
G1
D1
PRA4 PCA5 PQA1 PLA3
2.2_0603_5% 0.22U_0603_25V7K AONY36352_DFN5X6D-8-7 0.15UH_NA__35A_20% OCP current 28A (25W)
<97> BST1_APU_CORE_SOC 1 2 BST1_APU_CORE_SOC_R1 2 7 1 4
D2/S1 +APU_CORE_SOC
ISENA1P_APU_CORE_SOC_R2 3 Load line -2.1mV/A
1
EMI@ PRA8
680P_0402_50V7K 4.7_1206_5%
PRA9
DCR 0.9mohm +/-5%
G2
S2
S2
S2
<97> LX1_APU_CORE_SOC 2K_0402_1%
1 2 1 2
3
PCA6
ISENA1N_APU_CORE_SOC_R
0.1U_0402_25V6
<97> LG1_APU_CORE_SOC SNB_APU_CORE_SOC
1
EMI@ PCA11
2
<97> ISENA1P_APU_CORE_SOC
<97> ISENA1N_APU_CORE_SOC 1 2
0.1U_0402_25V6
PRA10
PCA12
B 845_0402_1% B
A A

APU_CORE_SOC_Stage
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
A
B
C
D
2
1
+
PCZ995
330U_D2_2V_Y
PCZ948 PCZ929 PCZ901
2
1
+
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
Under CPU PCZ996 2 1 2 1 2 1 2 1 2 1
220U_D7_2VM_R4.5M
PCZ981 PCZ956 PCZ952 PCZ930 PCZ902
180P_0402_50V8J 0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2
1
+
2 1 2 1 2 1 2 1
+APU_CORE
Bot PCZ997
+APU_CORE
560U_D2_2VM_R4.5M PCZ957 PCZ946 PCZ931 PCZ903

0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
5
5
2 1 2 1 2 1 2 1
2
1
+
330U_D2_2V_Y 0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
2
1
+
330U_D2_2V_Y 0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
2
1
+
560U_D2_2VM_R4.5M 0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
2
1
+
PCZ961 PCZ949 PCZ935 PCZ907
Under CPU PCZ921 0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
220U_D7_2VM_R4.5M 2 1 2 1 2 1 2 1

0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1

0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
PCZ938 PCZ910
22U_0603_6.3V6M 22U_0603_6.3V6M
+APU_CORE
2 1 2 1
180pF*1
22uF*27
330uF*5
0.22uF*8
APU_CORE
4
4
330u is common part SGA00009S00

2
1
+
3
3
Under CPU
Issued Date
PCA998
220U_D7_2VM_R4.5M
Security Classification
2
1
+
PCA999 PCA939 PCA911

330U_D2_2V_Y 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2
1
+
2 1 2 1
PCA997 PCA940 PCA912
near CPU
330U_D2_2V_Y PCA982 PCA964 22U_0603_6.3V6M 22U_0603_6.3V6M

180P_0402_50V8J 0.22U_0402_16V7K 2 1 2 1
2 1
2020/11/16
PCA941 PCA913
PCA965 22U_0603_6.3V6M 22U_0603_6.3V6M
0.22U_0402_16V7K 2 1 2 1
2 1
PCA942 PCA914
+APU_CORE_SOC
PCA966 22U_0603_6.3V6M 22U_0603_6.3V6M

0.22U_0402_16V7K 2 1 2 1
2 1
PCA943 PCA915
PCA967 22U_0603_6.3V6M 22U_0603_6.3V6M
180pF*1
22uF*18
330uF*2
0.22uF*8
0.22U_0402_16V7K 2 1 2 1
2 1
PCA944 PCA916
PCA968 22U_0603_6.3V6M 22U_0603_6.3V6M
0.22U_0402_16V7K 2 1 2 1
2 1
PCA945 PCA917
Compal Secret Data
Deciphered Date
PCA969 22U_0603_6.3V6M 22U_0603_6.3V6M

APU_CORE_SOC
0.22U_0402_16V7K 2 1 2 1
2 1
PCA953 PCA918
2
2
PCA970 22U_0603_6.3V6M 22U_0603_6.3V6M

0.22U_0402_16V7K 2 1 2 1
2 1
PCA919
PCA971 22U_0603_6.3V6M
0.22U_0402_16V7K 2 1
2021/11/16
PCA920
22U_0603_6.3V6M
+APU_CORE_SOC
2 1
330u is common part SGA00009S00
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Title
Date:
Custom
Document Number
CPU Cap
LA-L031P
Tuesday, January 05, 2021
1
1
Sheet
101
Compal Electronics, Inc.
of
122
Rev
1.0
A
B
C
D
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
Size
1.0
5 4 3 2 1
5 4 3 2 1
VGA5P@ PRV3 @ PCV1 PRV2 +5VCC

15K_0402_1% 0.1U_0402_25V6 34K_0402_1%
2 1 2 1
PRV1
0_0402_5% PRV3VGA4P@ PRV4
1 2 1 2 38.3K_0402_1%
18.7K_0402_1% 2 1
NVVDD1
GPU_B+
TDC 156A
PCV2
0.1U_0402_25V6 +5VCC PRV6 PRV7 Peak Current 460A
+3VS 1 2
2
4.3K_0402_1%
1
442_0402_1%
1 2
OCP 552A
Fsw=300kHz
91K_0402_1%
PRV8
10K_0402_1%
10K_0402_1%
PRV9 PCV3
1
D D
3.6K_0402_1% 1U_0402_6.3V6K
2 1 1 2
PRV139
PRV140
PRV11
2
10K_0402_1%
2 1 PRV10
2
2
VGA_I2CC_SDA_PWR 100K_0402_1%
1 2 +5VCC
VGA_I2CC_SCL_PWR PCV4
0.1U_0402_25V6 @ PCV5 0.1U_0402_25V6
1
1
0_0402_5%
0_0402_5%
1 2 1 2
@ PRV142
@ PRV141 1 2 1 2 PRV14
PRV12 PRV13 2K_0402_1%
1 2
2
0_0402_5% 0_0402_5%
0_0402_5%
1 2 2 1
PRV16
PCV6 PRV15
0.015U_0402_16V7K 2.4K_0402_1% PRV145 0_0402_5%
1 2
FDMF3170_REFIN
ADDR/FSW_GPU
FDMF3170_IMON1 <104>
1 2 1 2
0.1U_0402_25V6
CSNSUM_GPU
CSPSUM_GPU
VINMON_GPU
2
1K_0402_1%
PCV8
@ PCV7
NCP303150D@
COMP_GPU
1
IMON_GPU
PRV20 @ PRV18 0.1U_0402_25V6
DAC_GPU
EAP_GPU
LPC_GPU
<31> VCC_SENSE_NVVDD1_MSVDD
PRV19
0_0402_5% 0_0402_5%
0_0402_5%
1 2
PRV21
2
+5VCC +5VCC
@
2
+NVVDD1 1 2 @
FDMF3170_REFIN <104,105,1
PRV22 PRV146 0_0402_5%
30
29
28
27
26
25
24
23
22
21
1
1 2
100K_0402_1%
100K_0402_1%
10_0402_1%
FDMF3170_IMON2 <104>
1
VGA4P@
VGA5P@
PRV25
0.1U_0402_25V6
C C
COMP
EAP
DAC
VINMON
ADDR/FSW
IMON
LPC
REFOUT
CSPSUM
CSNSUM
1
PRV29
PRV159
@ 0_0402_5% @ PCV11
NCP303150D@
@ PCV13
1 2 1 2
0.1U_0402_25V6
VOUT_S
PCV14
PRV30
2
0.1U_0402_25V6 1K_0402_1%
2
2 1
2
@ PRV31 31 20 CSP1_GPU
1
1K_0402_1% FB CSP1 FDMF3170_REFIN

PRV34 NVVDD1_FBRTN 32 19 CSP2_GPU PRV147 0_0402_5%
31> VSS_SENSE_NVVDD1_MSVDD 0_0402_5% FBRTN PUV1 CSP2 1 2
TSENSE_GPU CSP3_GPU FDMF3170_IMON3 <105>
1 2 33 UP9512PQGJ_VQFN40_5X5 18
0.1U_0402_25V6
<104,105,106> TSENSE_GPU TSENSE CSP3
1
NCP303150D@
1
VGA_I2CC_SDA_PWR CSP4_GPU
@ PCV17
1 2 34 17
PRV35 <26,36> VGA_I2CC_SDA_PWR SDA CSP4 PRV36
10_0402_1% VGA_I2CC_SCL_PWR 35 16 CSP5_GPU 1K_0402_1%
2
NVVDD1_FBRTN <26,36> VGA_I2CC_SCL_PWR SCL CSP5
2
1 2 EN_GPU 36 15 CSP6_GPU
+3VALW EN CSP6
PRV39 FDMF3170_REFIN
1
PSI_GPU 37 14
10K_0402_1%
10K_0402_1% PRV148 0_0402_5%

PSI CSP7 1 2
PRV40
+5VCC
DMN53D0LDW-7 2N SOT363-6
DMN53D0LDW-7 2N SOT363-6
NVVDD1_PG +5VS FDMF3170_IMON4 <105>

38 13
0.1U_0402_25V6
PWM2/APL_HYS/MID_BUF
PGOOD CSP8
1
2 1
NCP303150D@
6
1
VID_GPU
@ PCV20
39 12 PRV42
2
VID 5VCC
4.7U_0402_6.3V6M
PQV01A
PQV01B
2.2_0603_1% PRV43
PCV18
REFADJ_GPU 40 11 PWM1_GPU 1K_0402_1%
PWM7/RMP_SLP
<26,37> NVVDD1_EN
2
REFADJ LL/PW M1
PWM8/T_RAMP
2 5
2
1
41
6.19K_0402_1%
PWM6/APL4
PWM5/APL3
PWM4/APL2
PWM3/APL1
2
GND FDMF3170_REFIN
PRV44
1
VGA5P@ PRV149 0_0402_5%

R1
CH_OC
REFIN
1 2 1 2
VREF
B +3VS FDMF3170_IMON5 <106>
B
@ PRV46
0.1U_0402_25V6
2
1
0_0402_5%
NCP303150D@VGA5P@
@VGA5P@ PCV22
1
10
PRV48
1K_0402_1%
2
PWM6_GPU
PWM5_GPU
PWM4_GPU
PWM3_GPU
PWM2_GPU
CH_OC_GPU
REFIN_GPU
2
NVVDD_PSI <26> PRV50 FDMF3170_REFIN
0_0402_5%
1 2 R3 PRV54 0_0402_5%
PRV53 1 2 GPU_PWM1 <104>
2 1
1 2 1
PRV56 20_0402_5%
274_0402_1% 13.7K_0402_1%
GPU_PWM2 <104>
1
@ PRV52 2.8K_0402_1%
1 20_0402_5%
PRV57
0_0402_5% PRV58
PRV61 R4 GPU_PWM3 <105>
100K_0402_1% 1PRV60 20_0402_5% GPU_PWM4 <105>
+3VS 1 2
1 2
1 2 GPU_PWM5 <106>
PRV62 0_0402_5%
PRV64
<9> NVVDD1_PG R5
113K_0402_1%
150K_0402_1%
150K_0402_1%
21K_0402_1%
169K_0402_1%
31.6K_0402_1%
42.2K_0402_1%
42.2K_0402_1%
R2 PRV66
PRV63
2
NCP303150D@ 2 1 VGA5P@ PRV68 VGA5P@ PRV72 VGA5P@ PRV73

1
+5VS 16.9K_0402_1% 34K_0402_1% 34K_0402_1%

1U_0402_16V6K
PRV70
1
PCV9 20.5K_0402_1%
4700P_0402_50V7K
1
2
PCV26
PCV25
1 2
@ 100K_0402_1%
0.1U_0402_25V6
PRV71
@ PRV51
@ PRV55
PRV67
VGA4P@ PRV68
VGA4P@ PRV72
VGA4P@ PRV73
PRV69
1 2 NCP303150D@
C
E3_MAXP@
PUV8 <26> NVVDD_VID

2
M74VHC1GT08DFT2G_SC-70 0_0402_5%
A 2 A
5
@
1
P
+5VS B GPU_DRVON <104,105,106>

4
EN_GPU 2 O NVVDD1_FBRTN
A
G
E7_MAXQ PRV71 E5_MAXQ PRV71

95.3K_0402_1% 93.1K_0402_1%
3

PRV155
0_0402_5%
PWR_VGA_UP9512P
1 2 QXNWJE!‫ޑ‬SD!CPN AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
1.0
QD9619A@ !ፎਥᏵHQV(t!dpogjh!೛‫ۓ‬ MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-L031P
5 4 3 2 1
1 2 3 4 5
GPU_B+ FBVDD_B+
PRV74 PRV75
+19VB EMI@ PLV7 5A_Z80_0805_2P
1 2 1 4 1 4
2 3 2 3
EMI@ PLV8 5A_Z80_0805_2P
1 2
0.005_2512_1% 0.005_2512_1%
NVVDD1
TDC 156A
Peak Current 460A
OCP 552A
+5VS DCR=0.48 mohm +/-5%
A
NCP303150D@ PRV76 A
0_0402_1%
2
<36> CSSP_B+ <36> CSSN_B+ CSSP_FBVDD <36><36> CSSN_FBVDD
@
PRV77
0_0402_5%
PRV76 GPU_B+
1
37.4K_0402_1%
1 2
Use 0603 size
QD9619A@
33U_D1_25VM_R6M
PRV82 0_0402_5%
PCV30
PCV31
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
10U_0805_25VAK
10U_0805_25VAK
0.1U_0402_25V6
1
1 2 TMON1_FDMF3170 BST1_FDMF3170
1 2 NCP303150D@ PRV80
<103,105,106> TSENSE_GPU
1
PRV80 4.7_0603_1% +
PCV32
PCV33
PCV34
PCV35
PCV249
2.2_0603_1%
QD9619A@
2
1
+5VS 2
EMI@
EMI@
16
17
11
10
13
9
PCV40
0.1U_0603_25V7K
VIN1
FAULT
BOOT
ZCD_EN
N/C
VIN
2
QD9619A@
PRV85 0_0402_5%
PCV27 +NVVDD1 1 2 VOS1_FDMF3170 1
2.2U_0402_6.3V6M NC
1 2 4 12 PHASE1_FDMF3170
PVCC PHASE
1 2 VCC1_FDMF3170 3
PRV78 VCC NCP303150D@ PUV2
2_0402_5% 2 NCP303150DMNTWG
AGND
1
PCV37
2.2U_0402_6.3V6M 5 QD9619A@ 13X8X4
PGND PUV2
Isat:77A
2
20 QD9619AQR1_VQFN41_5X6
PGND2 DCR:0.48m (+/-5%)
+NVVDD1
B PLV2 B
PRV79 0_0402_5%
1 2 PWM1_FDMF3170 14 8 LX1_FDMF3170 1 2
<103> GPU_PWM1 PWM SW
1
PRV84 1 2 EN1_FDMF3170
0_0402_5% 15
<103,105,106> GPU_DRVON DISB# 0.22UH_MHT-MHDZIR22MEM3-RT_45A_20%
560U_D2_2VM_R4.5M
FDMF3170_IMON1 18 EMI@ PRV154 1
<103> FDMF3170_IMON1 IMON 4.7_1206_5%
PRV81 1 2 FDMF3170_REFIN1
0_0402_5% 19 +
PCV365
PGND1
<103,105,106> FDMF3170_REFIN
2
REFIN
GPU1_SNB1
GL
TP
1
2
EMI@ PCV255
6
21
7
680P_0402_50V7K
2
+5VS
2
NCP303150D@ PRV88
0_0402_1% @
PRV87
0_0402_5%
PRV88
Reverse GPU_B+
1
37.4K_0402_1%
1 2
Use 0603 size
QD9619A@
33U_D1_25VM_R6M
PRV92 0_0402_5%
PCV47
PCV48
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
10U_0805_25VAK
10U_0805_25VAK
0.1U_0402_25V6
1
TSENSE_GPU 1 2 TMON2_FDMF3170 BST2_FDMF3170
1 2 NCP303150D@ PRV90
1
PRV90 4.7_0603_1% +
PCV49
PCV50
PCV51
PCV52
PCV427
C C
2.2_0603_1%
QD9619A@
2
1
+5VS 2
EMI@
EMI@
16
17
11
10
13
9
PCV57
0.1U_0603_25V7K
VIN1
FAULT
BOOT
ZCD_EN
N/C
VIN
QD9619A@
PRV95 0_0402_5%
2.2U_0402_6.3V6M NC
1 2 4 12 PHASE2_FDMF3170
PVCC PHASE
1 2 VCC2_FDMF3170 3
2_0402_5% 2 NCP303150DMNTWG
1
PCV54 AGND
2.2U_0402_6.3V6M 5 QD9619A@ 13X8X4
PGND PUV3
Isat:77A
2
PGND2 DCR:0.48m (+/-5%)
+NVVDD1
PLV3
PRV89 1 2 PWM2_FDMF3170 14
0_0402_5% 8 LX2_FDMF3170 1 2
1
GPU_DRVON
PRV94 1 2 EN2_FDMF3170
0_0402_5% 15
DISB# 0.22UH_MHT-MHDZIR22MEM3-RT_45A_20%
560U_D2_2VM_R4.5M
FDMF3170_IMON2 18 EMI@ PRV93
<103> FDMF3170_IMON2 IMON 1
4.7_1206_5%
FDMF3170_REFIN
PRV91 1 2 FDMF3170_REFIN2 19
0_0402_5% +
PCV366
PGND1
REFIN
GPU1_SNB2
GL
TP
2
EMI@ PCV60
6
21
D 680P_0402_50V7K D
2

PWR_+NVVDD1
1.0
1 2 3 4 5
5 4 3 2 1
+5VS
NCP303150D@ PRV96
2
0_0402_1%
@
PRV97
0_0402_5%
PRV96 GPU_B+
1
37.4K_0402_1%
1 2
Use 0603 size
D
QD9619A@ D
PRV102 0_0402_5%
PCV64
PCV65
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
10U_0805_25VAK
10U_0805_25VAK
0.1U_0402_25V6
1 2
<103,104,106> TSENSE_GPU
1
PRV100 NCP303150D@ PRV100
PCV66
PCV67
PCV68
PCV69
2.2_0603_1% 4.7_0603_1%
QD9619A@
2
1
+5VS
EMI@
EMI@
16
17
11
10
13
9
PCV74
0.1U_0603_25V7K
VIN1
FAULT
BOOT
ZCD_EN
N/C
VIN
2
QD9619A@
PRV105 0_0402_5%
2.2U_0402_6.3V6M NC
1 2 4 12 PHASE3_FDMF3170
PVCC PHASE
1 2 VCC3_FDMF3170 3
PRV98 VCC
2_0402_5% 2 NCP303150D@ PUV4
AGND
1
PCV71 NCP303150DMNTWG
2.2U_0402_6.3V6M 5 QD9619A@ 13X8X4
PGND PUV4
2
Isat:77A
PGND2 DCR:0.48m (+/-5%)
+NVVDD1
PLV4
PRV99 1 2 PWM3_FDMF3170
0_0402_5% 14 8 LX3_FDMF3170 1 2
1
1
PRV104 2 EN3_FDMF3170
0_0402_5% 15
<103,104,106> GPU_DRVON DISB# 0.22UH_MHT-MHDZIR22MEM3-RT_45A_20%
560U_D2_2VM_R4.5M
<103> FDMF3170_IMON3 IMON 4.7_1206_5%
1
PRV101 2 FDMF3170_REFIN3
0_0402_5% 19 +
PCV363
PGND1
<103,104,106> FDMF3170_REFIN
2
REFIN
GPU1_SNB3
GL
TP
1
C 2 C
EMI@ PCV77
21
7
680P_0402_50V7K
2
+5VS
NCP303150D@ PRV106
0_0402_1%
2
@
PRV108
0_0402_5%
PRV106 GPU_B+
1
37.4K_0402_1%
1 2
Use 0603 size
QD9619A@
PRV112 0_0402_5%
EMI@ PCV81
EMI@ PCV82
10U_0603_25V6M
2200P_0402_50V7K
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
0.1U_0402_25V6
TSENSE_GPU 1 2 TMON4_FDMF3170 BST4_FDMF3170
1 2 NCP303150D@ PRV110
1
PRV110 4.7_0603_1%
PCV83
PCV84
PCV85
PCV86
2.2_0603_1%
B B
QD9619A@
2
1
+5VS
16
17
11
10
13
9
PCV91
0.1U_0603_25V7K
VIN1
FAULT
BOOT
ZCD_EN
N/C
VIN
2
QD9619A@
PRV115 0_0402_5%
2.2U_0402_6.3V6M NC
1 2 4 12 PHASE4_FDMF3170
PVCC PHASE
1 2 VCC4_FDMF3170 3
2_0402_5% 2 NCP303150DMNTWG
1
PCV88 AGND
13X8X4
2.2U_0402_6.3V6M 5 QD9619A@
PGND PUV5
Isat:77A
2
20 QD9619AQR1_VQFN41_5X6 DCR:0.48m (+/-5%)

PGND2
+NVVDD1
PLV5
1
PRV109 2 PWM4_FDMF3170
0_0402_5% 14 8 LX4_FDMF3170 1 2
GPU_DRVON 1
PRV114 2 EN4_FDMF3170
0_0402_5% 15 1
DISB# 0.22UH_MHT-MHDZIR22MEM3-RT_45A_20%
560U_D2_2VM_R4.5M
<103> FDMF3170_IMON4 IMON 4.7_1206_5%
FDMF3170_REFIN 1
PRV111 2 FDMF3170_REFIN4
0_0402_5% 19 +
PCV364
PGND1
REFIN
GPU1_SNB4
GL
TP
2
EMI@ PCV94
6
21
680P_0402_50V7K
2
A A

PWR_+NVVDD1
1.0
5 4 3 2 1
5 4 3 2 1
+5VS
NCP303150D@VGA5P@ PRV116
0_0402_1%
2
@VGA5P@
PRV118
0_0402_5%
PRV116 GPU_B+
1
37.4K_0402_1%
1 2
Use 0603 size
D
VGA5P@ QD9619A@VGA5P@ D
PRV122 0_0402_5% NCP303150D@VGA5P@
EMI@VGA5P@ PCV98
EMI@VGA5P@ PCV99
VGA5P@ PCV101
VGA5P@ PCV102
2200P_0402_50V7K
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
0.1U_0402_25V6
1 2 PRV120
<103,104,105> TSENSE_GPU

Acer Nitro AN517-41 - LA-L031P GH53Z REV1A

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Acer Nitro AN517-41 - LA-L031P GH53Z REV1A

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A B C D E

Model Name : Scala_CAS/Kamiq_CAS GN20E

GH53Z MB Schematics Document

Security Classification Compal Secret Data Compal Electronics, Inc.

Model Name : GH53Z

) "# $ ( & &

= , /*, ) 9) Security Classification Compal Secret Data Compal Electronics, Inc.

Voltage Rails BOARD ID Table Board ID / SKU ID Table for AD channel

SMBus Port 1 +APU_CORE_SOC

EC SMBus Address Table

APU Temp. 0100 1100b 1001 1000b 1001 1001b

Thermal Sensor 1001 0000b

EC_SMB_CK3 RGB KB 1100 0000b

Security Classification Compal Secret Data Compal Electronics, Inc.

Power Sequence AC-IN G3 --> S0 S0 --> S3 S3 --> S0 S0 --> S5

SYS_PWRGD_EC 41.23ms 36.48ms 42.93ms 24.59ms SYS_PWRGD_EC

APU_PCIE_RST# 728ms 376.6ms APU_PCIE_RST#

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

PCIE_ARX_DTX_P0 G11 P_GPP_RXP0 LAN P_GPP_TXP0 L3 PCIE_ATX_DRX_P0

PCIE_ARX_DTX_P4 M9 P_GPP_RXP4 P_GPP_TXP4 T2 PCIE_ATX_DRX_P4 CC23 1 2 0.22U_0402_16V7K

FP6 REV 0.92

RYZEN5 3.3G 5600H RYZEN7 3.2G 5800H

Main Func = CPU

MA_DATA48/MAB_DATA11 AT22 DDR_A_DQ48 Y30 RSVD_60

MA_DATA55/MAB_DATA8 AP19 DDR_A_DQ55 MB_DATA54/MBB_DATA9 BB22 DDR_B_DQ54

MA_DATA61/MAB_DATA5 AU19 DDR_A_DQ61 MB_DATA60/MBB_DATA6 BB20 DDR_B_DQ60

RSVD_69 AC27 RSVD_65 AA30

RC1 1 2 1K_0402_5% DDR_A_EVENT#

RC2 1 2 1K_0402_5% DDR_B_EVENT#

Main Func = CPU

QC1A F20 FH51S

VSS_SENSE_A J22 VSS_SENSE_A RC8141

RC109 1 @ 2 1K_0201_5% SVT_PWR_APU_R

AMD DEBUG TESTPOINT

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

PWR_BTN_L/AGPIO0 3V3_S5 SW PU/PD 1V8_S0

I2C1_SCL/EGPIO147 AP2 I2C_1_SCL

HDA_RST# AM6 AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC 3V3_S5 BLINK/AGPIO11 AW11 PROJECT_ID2

RC758 1 @ 2 33_0402_5% APU_PCM_DOUT AL3 SW_DATA0/TDM_DOUT_BT

APU_PCIE_RST#_C RC700 1 RS@ 2 0_0402_5%

RC696 1 @ 2 10K_0402_5% HDA_SDIN2 +VDDIO_AUDIO

+3VALW RC716 RC708 RC777 RC799

RC163 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%

@ RC99 @ CC687 RC748 2 @ 1 2.2K_0402_5% APU_WOV_CLK_L

Project_ID1 Project_ID2 Project_ID3

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

APU_SPI_CS#1 RC639 1 2 10K_0402_5%

32.768KHz CRYSTAL 32K_X1 AY1 X32K_X1 EGPIO141/UART0_RXD

RC94 1 2 4.7K_0402_5% APU_USBC_SCL

USB20_P0 AC6 USBC0_DP/USB0_DP USBC0_TX1P/USB0_TXP/DP2_TXP2 AA1 USBC0_ATX_DRX_P1

USBC4_RX1N/USB4_RXN/DP3_TXN3 U2 USB3_ARX_DTX_N4 ACES_50950-0084N-001_ROM

AGPIO24 USBC4_RX2P/DP3_TXP0 W1 +SPI_VCC

USB_OC0# AE9 USB_OC0_L/AGPIO16

SW PU/PD AD11 USB3_ARX_DTX_N5

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

2*180pF 3000ma 33ohm@100mhz DCR 0.04 AE22 VDDIO_MEM_S3_8 VDDCR_26 T17

RC767 VDDCR_61 AE18

+RTC_APU_R TDC: 4.5uA AJ11 VDDBT_RTC_G

SCL/MBDG: SCL/MBDG: SCL/MBDG:

Main Func = CPU

熃[熃熃59熆熉熃59熆熇熃59熆熅熅熈熉0熆熅.熇=熋熃熆熅熈%&+&熄熇 @ @ @ VGA@ @ @ COMMON