Apple Macbook m42b

8 7 6 5 4 3 2 1
CK ENG
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD APPD
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. REV ZONE ECN DESCRIPTION OF CHANGE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
M42B MLB NO_LDO SCHEMATIC 07 355269 ENGINEERING RELEASED

DATE
12/10/04 ?
DATE
3/22/2007
D D
(.csa) Date
(.csa)
Contents Date
Page Contents DRI Sync
Page 1
DRI Sync N/A
TABLE_TABLEOFCONTENTS_HEAD
49 62
TEMPERATURE SENSE
11/09/2005
RX ENET
TABLE_TABLEOFCONTENTS_HEAD
1 Table of Contents RX N/A 63

ES 5/23/05
50
TABLE_TABLEOFCONTENTS_ITEM
2 2
SYSTEM BLOCK DIAGRAM
5/23/05 SPI BOOTROM MASTER
RX MASTER 65 11/10/2005
51
3 3
Power Block Diagram
06/30/2005 Fan MK ENET
MK POWER 66 08/23/2005
52
4 4
CONFIGURATION OPTIONS
07/18/2005 SMS RX SMC
5
RX SMC
07/25/2005
53 67
TPM
07/18/2005
5 FUNC TEST 1 OF 2 RX TP 68
DK SMC
08/05/2006
54
6 6
SIGNAL ALIAS /RESET
08/19/2005 AUDIO: CODEC DK M42AUDIO
RX ENET TABLE_TABLEOFCONTENTS_ITEM
72 08/05/2006
7 7
CPU 1 OF 2-FSB RX MASTER
05/03/2005 55 73
AUDI0: SPEAKER AMP DK M42AUDIO
08/05/2006
DK
8 8
CPU 2 OF 2-PWR/GND MK MASTER
05/03/2005 56 74
AUDIO: JACK M42AUDIO
08/05/2006
MK
9 9
CPU DECAPS & VID<> MK SMC
08/19/2005 57 75
AUDIO: JACK TRANSLATORS M42AUDIO
07/13/2005
MK
10 10
CPU MISC1-TEMP SENSOR ES ENET
08/19/2005 58 76
IMVP6 CPU VCore Regulator POWER
07/13/2005
MK
11 11
CPU ITP700FLEX DEBUG RX MASTER
5/23/05 59 77
5V / 3.3V Power Supply POWER
12/06/2005
MK
12 12
NB CPU Interface MK NB
07/25/2005 60 78
2.5V/1.2V Regulator ENET
07/13/2005
MK
13 13
NB PEG / Video Interfaces DK NB
07/25/2005 61 79
1.8V Supply POWER
07/13/2005
MK
14 14
NB Misc Interfaces RX NB
08/15/2005 62 80
1.5V / 1.05V Power Supply POWER
08/30/2005
MK
15 15
NB DDR2 Interfaces LT NB
07/25/2005 63 S3/S0 FETS, G3H SUPPLY ENET
C TABLE_TABLEOFCONTENTS_ITEM
16 16
NB Power 1 DK NB
07/25/2005
64 81
82
Power Conn / Alias MK ENET
11/16/2005
07/13/2005
C
MK
17 17
NB Power 2 DK NB
07/25/2005 65 83
DC-In & Battery Connectors POWER
08/19/2005
18 07/25/2005
66 PBUS Supply/Battery Charger ES

18 NB Grounds DK NB TABLE_TABLEOFCONTENTS_ITEM
94
DK
SMC
06/06/2005
19 19
NB (GM) Decoupling DK NB
06/22/2005 67 95
INVERTER,LVDS,TMDS GRAPHIC
06/06/2005
20 06/28/2005
68 EXTERNAL TMDS DK
20 NB Config Straps DK NB 98
GRAPHIC
05/21/05
69
21 21 08/05/2005 MINI-DVI CONNECTOR EUGENE

RX SB 99
70
22 22
RX ENET
11/16/2005 Cross Reference Page
100
71
23 23 11/28/2005 Cross Reference Page

RX ENET 101
72

RX SB 102
73

RX SB 103
74
26 26
SB Misc
RX NB 104
75
27 27
M42 SMBUS CONNECTIONS
ES ENET 105
76
28 28
DDR2 SO-DIMM Connector A
LT MEMORY TABLE_TABLEOFCONTENTS_ITEM
106
29 29
DDR2 SO-DIMM Connector B LT MEMORY
06/20/2005
77 107
Cross Reference Page
30 30
Memory Active Termination LT MEMORY
06/20/2005
78 108
Cross Reference Page
31 31
Memory Vtt Supply LT (MASTER)
(MASTER)
79 Cross Reference Page
33 06/03/2005
32
CLOCKS DK CLOCK
34 06/06/2005
33
B 38
CLOCK TERMINATION DK CLOCK
11/01/2005
B
34
PATA CONNECTOR ES ENET

39 11/14/2005
35
SATA CONNECTOR ES ENET

41 12/06/2005
ES
36 42
ETHERNET CONTROLLER ENET
11/14/2005
37 44
ETHERNET CONNECTOR ES ENET
08/30/2005
38 45
FIREWIRE CONTROLLER ES ENET
11/16/2005
39 49
FIREWIRE PORT ES ENET
11/16/2005
40 51
CONNECTOR MISC ES ENET
11/09/2005
41 52
IR CONTROLLER ES ENET
11/01/2005
42 53
ES ENET
08/19/2005
43 54
ES ENET
08/29/2005
MK
44 58
BLUETOOTH INTERFACE ENET
08/18/2005
45 59
SMC MK SMC
08/23/2005
EE DRIS:
46 60
SMC SUPPORT LD SMC
06/30/2005
MK
47 61
LPC+ Debug Connector NB
08/30/2005
RX-RAYMOND XU
CPU Current & Voltage Sense ES
DIMENSIONS ARE IN MILLIMETERS
48 ENET
DK-DINESH KUMAR METRIC Apple Computer Inc.
XX
A RC-RAY CHANG X.XX

DRAFTER DESIGN CK NOTICE OF PROPRIETARY PROPERTY A
MK-MARC KLINGELHOFER X.XXX
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
Schematic / PCB #’s LT-LAWRENCE TAN ENG APPD MFG APPD
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
TABLE_5_HEAD
ANGLES II NOT TO REPRODUCE OR COPY IT

PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
051-7374 1 SCHEM,M42B,MLB NO_LDO SCH

TABLE_5_ITEM
LD-LINDA DUNN QA APPD DESIGNER TITLE

TABLE_5_ITEM
DO NOT SCALE DRAWING
820-1889 1 PCBF,M42,MLB NO_LDO PCB
RELEASE SCALE
NONE
SCHEM,MLB NO_LDO,M42B
SIZE DRAWING NUMBER REV.
MATERIAL/FINISH
NOTED AS D 051-7374 A
THIRD ANGLE PROJECTION APPLICABLE SHT 1 OF 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
INVERTER
CONNECTOR
P.67 CLOCKING
CPU
LCD Panel THERMAL
PROCESSOR Config
AND SPECTRUM
P.67 SENSOR 479 BGA J2800
D P.32-33 D
P.10
MINI DVI & P.7-9
CRT CONNECTOR DDR2 SDRAM DIMM A
P.69 SO-DIMM Connector
FSB
P.28
ETHERNET J2900
CONNECTOR LVDS CH.A
P.37 TV+CRT
CHIPSET-NB
FW CONNECTOR TMDS TMDS SDVO DDR2 SDRAM DIMM B
P.68 1466UFCBGA DDR2 VTT
CH.B SO-DIMM Connector
P.39 REGULATOR
ENET ENET CONTROLLER P.29
USB 2.0 P.31
CONNECTOR P.36 P.12-20
P.42
C FW FW CONTROLLER C
P.38 DMIX4
5V USB PCIEX1
PCIEX1 TO WIRELESS
HDD CARD
Connector SATA
PCI
P.35 CHIPSET-SB P.43
USB
IR_RX_OUT IR CONTROLLER USB 609 BGA BLUETOOTH
P.41 CONNECTOR
ODD 66MHZ
P.44
Connector PATA 16BITS
P.34
B SB MISC. B
INTERNAL KB
USB P.21-26
TP CONNECTOR
P.40 P.26
SPI
AUDIO AZALIA LPC 33MHZ
POWER SUPPLY
P.54-57
SPI FLASH
BOOTROM TPM LPC
SMC DEBUG
P.50
P.53 CONNECTOR P.58~P.66
P.47
SMBUS
P.27 SMS CONNECTOR TO SYSTEM BLOCK DIAGRAM

BATTERIES SYNC_MASTER=MASTER SYNC_DATE=5/23/05
A P.52 & Charger NOTICE OF PROPRIETARY PROPERTY
A
FAN THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
CONNECTOR P.45 SMBUS PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
P.64 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
P.51 II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 2 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
M42A POWER SYSTEM ARCHITECTURE SMC PWRGD

SMC_RST_L
04
MC33465N_30ATR
U5900
(PAGE 45)
02 03
ENABLE
3.425V G3HOT
LT3470 PP3V42_G3H_REG
PBUSB_VSENSE
U8090
D CHGR_EN
(S5) 7A FUSE
U8310 V Q6150
(PAGE 62) D
PPVBAT_S5_CHGR_REG PPBUSA_G3H
ENABLES VOUT
A 02
01 PBUS CONVERTER/ VIN
1V5S0_RUNSS 1.5V PP1V5_S0
U8370 BATTERY CHARGER 16 (S0) ENA1 VOUT1 17
6A FUSE (6A MAX CURRENT)
AC CLOCK
ISL6255 1V05S0_RUNSS 1.05V PP1V05_S0
ADAPTER
IN
DCIN
A VIN
U8300
16 (S0) ENA2 VOUT2
(8A MAX CURRENT)
17
CK410_PD_VTT_PRGD_L PWRGD
SMC_BATT_ISENSE
SMC_DCIN_ISENSE LTC3728
(PAGE 65) U8375 U7900 CY28445-5
(PAGE 61) 18 U3301
PGOOD 1V51V05S0_PGOOD (PAGE 33)
A 02
SMC_CPU_VSENSE
U6100
01
VIN
V 22 ICH
6-1
BATTERY Q8000 13 PGD_IN

CPUVCORE
VOUT A PPVCORE_CPU_S0
(36A MAX CURRENT)
U2603
VR_PWRGD_CK410 VRMPWRGD
PWRBTN*
27
PP5V_S3 SMC_CPU_ISENSE
BATT_POS_F 23
CLKEN#
VR_PWRGD_CK410_L PLTRST*
PLT_RST_L
IMVP_VR_ON
VR_ON
U2601 25
12 P5VS3_EN_L_RC (S0)
21 24 RSMRST*
(S3) ISL6262 PGOOD VR_PWRGOOD_DELAY
PM_SB_PWROK
U7500
(PAGE 57) CPU_PWRGD
Q8005 17 PWROK CPUPWRGD(GPIO49)
3S2P / 3S3P 26
PP5V_S0
C PPBUSB_G3H C
2 VIN CPU
16 P5VS0_EN_RC
SMC 06 Q8059 07 VIN 8 (S0)
ENA
TV 3.3VVOUT PP3V3_S0_NB_TVDAC
17-1 PWRGOOD
Q8060 PP5V_S5_REG
5VS5_RUNSS ENA2 5V
SMC_PM_G2_ENABLE (S5)
VOUT2 (5A MAX CURRENT) MM157
P60 PP3V3_S5_REG U1901
(S5) PP5V_S5 08 (PAGE 19) RESET*
3V3S5_RUNSS
(S5)
ENA1 3.3V VOUT1
(4A MAX
07 CURRENT) 8
Q8059
LTC3728 VIN
CHGR_EN U7600 Q8010
P25 LOGIC
(PAGE 58) PP3V3_S3 PP3V3_S0_AUDIO AUDIO 4.5V PP4V5_AUDIO_ANALOG
U5800 13 17 ENA
VOUT 17-1
MCH
(PAGE 44) DELAY PGOOD (S0) TPS79501 28
R=10k PP5VS3_EN_L_RC VR6800
Q8031 12 RSMRST_PWRGD 12 (PAGE 68) FSB_CPURST_L
c=2.2nf (S3) PWROK HCPURST*
DELAY 5V3V3S5_PGOOD P3V3S3_EN_L_RC
R=100k PP3V3S3_EN_L_RC 12 9 (S3)
VIN
2.5V
PP2V5_S3
c=0.01uf (S3) ENA VOUT
ICH MAX8887 14
SLP_S5_L 11 U7700 (0.3A MAX CURRENT)
SLP_S4_L (PAGE 59) 10
SLP_S4_L U8080
(S3) 19 SMC
SLP_S3_L Q8015 RSMRST_OUT(P15) PM_RSMRST_L
SLP_S3_L (S0)
17 PP3V3_S0 ALL_SYS_PWRGD
PWRGD(P12) 99ms DLY
IMVP_VR_ON
15 09 RSMRST_PWRGD
IMVP_VR_ON(P16) 21
RSMRST_IN(P13)
16 VIN
(0.3A MAX CURRENT)
PLT_RST*
B P3V3S0_EN_RC
ENA
2.5V
MAX8887
VOUT
SMC_ONOFF_L
PWR_BUTTON(P90)
PM_PWRBTN_L
B
Q8061 U7701 PP2V5_S0 V1(5V) 19 P17(BTN_OUT)
SOFT 1V5S0_RUNSS
(S0)
V1(3.3V)
BATTERY ONLY: 05
START (S0) 16 PPBUS_S5_FWPWRSW (PAGE 59) S0PWRGD_OK SMC_RST_L
V1(2.5V) RST* RST*
Q8062 Q8061 18
V1(1.8V) ADAPTER IN : 08-1
SOFT 1V05S0_RUNSS VADJ1(1.2V)
START (S0) 16 08
PP3V3_S5 VADJ2(0.9V) SLP_S5_L
SLP_S5_L(P95)
PP2V5_S0_NB_DISP_PLL LTC2908
DELAY U8070 SLP_S4_L
SLP_S4_L(P94)
R=10k (PAGE 62) SIGNAL DELAY TIME
Q8030 Q8030
P5VS0_EN_RC
c=0.1uf (S0) 16 SLP_S3_L
VIN SLP_S3_L(P93)
DELAY
IMVP_VR_ON 99ms
MCH DPLL 1.5V
R=100k ENA VOUT1 PP1V5_S0_DPLL 18_1 S0PWRGD_OK 200ms
P3V3S0_EN_RC 16 U5800
c=0.1uf (S0) VR_PWRGOOD_DELAY 7ms (PAGE 44)
TPS73115
U1900
P1V2S0_EN (PAGE 19) POWER ON SEQUENCE LIST
16
2 PWR/RST STATUS STEP
Q8031 DELAY
12 Q8025 G3H POWER ON 01-04
R=100k P1V8S0_EN_L_RC
c=0.01uf (S0) 16 VIN
S5 POWER ON 01,05-09
1.8V PP1V8_S3_REG PP1V8_S0 17
PM_SLP_S4_L ENA VOUT
S3 POWER ON 10-13
(S3) (8A MAX CURRENT) S0 SYSTEM POWER ON 14-18
ISL6269
U7800 S0 CPU POWER ON 17,19-24
(PAGE 60) P1V8S0_EN_L_RC16 PLATFORM,CPU RESET 25-27
PGOOD (S0)
VIN
STEP 06 (S5 POWER STATUS)TRUTH TABLE Power Block Diagram
17 NO AC/BATTERY L(S5 OFF)
A PP5V_S0_MEMVTTENA
0.9V VOUT PP0V9_S0 18 BATTERY ONLY L(S5 OFF)
SYNC_MASTER=POWER
NOTICE OF PROPRIETARY PROPERTY

SYNC_DATE=06/30/2005
A
BD3535FVM ACIN WITH/WITHOUT BATTERY H(S5 ON)
U3100
(PAGE 31) BATTERY ONLY,PRESS PWR BUTTON H(S5 ON) THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
VIN 13 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
ENA
1.2V VOUT PP1V2_S3_ENET
II NOT TO REPRODUCE OR COPY IT
MAX8516 Q8063
U7720 SIZE DRAWING NUMBER REV.
(PAGE 59) PP1V2_S0 17
APPLE COMPUTER INC.
D 051-7374 A
SCALE SHT OF
16 P1V2_S0_EN NONE 3 79
8 7 6 5 4 3 2 1
PAGE_BORDER=TRUE
8 7 6 5 4 3 2 1
Page Notes M42A GOOD
ST MICRO
M42A BETTER
ST MICRO
M42A BEST
KIONIX
M42A GOOD
KIONIX
M42A BETTER
KIONIX
M42A BEST
ST MICRO
Power aliases required by this page:
(NONE)
Signal aliases required by this page:

BOM OPTION BOMOPTION
1V51V05S0_CONT
630-7795
EVT
630-7796
EVT
630-7799
EVT
630-7798
EVT
630-7736
EVT
630-7797
EVT
(NONE)
>
>
>
>
>
>
1V51V05S0_SKIP
BOM options provided by this page:
5V3V3S3_CONT
(NONE)
5V3V3S3_SKIP
>
>
>>
>>
>>
>
ACCEL_KIONIX
D ACCEL_ST D
> >
> >
>>
INVERTER_BUF
>
>
>
INVERTER_UNBUF
ITP
LEMENU
> >
> >
> >
> >
> >
> >
MEMVTT_EN_PU
NBCFG_DMI_REVERSE
BOARD STACK-UP AND CONSTRUCTION NBCFG_DMI_X2

NBCFG_DYN_ODT_DISABLE
NBCFG_PEG_REVERSE
Top SIGNAL MLB STACKUP NBCFG_SDVO_AND_PCIE
LAYER THICKNESS TRACE WIDTH NBCFG_VCC_1V5

2 GROUND (MM) (MM) NO_REBOOT_MODE
3 SIGNAL(High Speed) USB_C_OC_PU
> > > >
> > >
> > >
> > > >
> > >
> > >

CONFORMAL_COAT 0.018
USB_D_OC_PU
4 SIGNAL(High Speed) L1 SIGNAL(TOP) 0.047 0.1 USB_E_OC_PU
L1-L2 GOOD
5 GROUND 0.07
--- BETTER
>
>
C 6 POWER L2 GROUND 0.014
BEST
C
> > >
> > >

L2-L3 0.076 M42A_PGM
> >
> >
> >
> >
7 POWER L3 SIGNAL 0.014 0.079 ONEWIRE_PULLUP
8 GROUND L3-L4 0.156 ONEWIRE_PULLUP_OLD

ONEWIRE_PU_PROT
>
>
>
>
>
>
L4 SIGNAL 0.079
9 SIGNAL(High Speed) 0.014
ONEWIRE_PU_ACOK
L4-L5 0.076 ONEWIRE_PWRCTL
>
>
>
>
>
>
10 SIGNAL(High Speed) L5 GND 0.014 ONEWIRE_ALWAYSON
---
11 GROUND 3V3_IND_2MM8
>
>
>
>
>
>
L5-L6 0.07 3V3_IND_3MM
BOTTOM SIGNAL L6 POWER 0.031 --- NORMAL
>
>
>
>
L6-L7 FANCY
> > >
> > >

0.076
STANDOFF
> >
> >
> >
> >
L7 POWER 0.031 ---
FET_FDN6296
0.07
TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION

TABLE_5_ITEM
L7-L8 FET_STL8NH3LL
337S3450 1 IC,MEROM,CPU L2 1.83GHZ,479 PGA U0700 GOOD
L8 GROUND 0.014 --- GOOD-ST
>
TABLE_5_ITEM
337S3389 1 IC,MEROM,CPU 2.0GHZ,479 PGA U0700 BETTER

BETTER-ST
>
TABLE_5_ITEM
L8-L9 0.076
B 337S3391 1 IC,MEROM,CPU 2.16GHZ,479 PGA U0700 BEST
BEST-KIONIX
B
>
L9 SIGNAL 0.014 0.1
>
GOOD-KIONIX
L9-L10 0.156
TABLE_5_HEAD
>
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION BETTER-KIONIX
TABLE_5_ITEM
338S0268 1 IC,FW32306,1394A LINK,BGA,129P U4400 LEMENU 0.1 BEST-ST

0.014
>
TABLE_5_ITEM
L10 SIGNAL
338S0270 1 IC,88E8053,GIGABIT ENET XCVR,64P QFN, NO U4101 LEMENU TPM
359S0109 1 IC,SLG8LP436,CLOCK GEN,68PIN QFN U3301 LEMENU
TABLE_5_ITEM
L10-L11 0.076 PVT-DIMM

L11 GROUND 0.014 0.1 POST-RAMP-DIMM35
>
>
>
>
>
>
TABLE_5_HEAD
341S2131 1 IC, 16MBIT 8-PIN SPI SERIAL FLASH,SOIC8 U6301 M42A_PGM

TABLE_5_ITEM
L11-L12 0.07
341S1797 1 IC,EEPROM,SERIAL IIC,8KBIT,SO8 U4102 M42A_PGM
TABLE_5_ITEM
L12 SIGNAL(BOTTOM) 0.047 0.1

TABLE_5_ITEM
M42
341S2133 1 IC,SMC,176P BGA,HS8/2116 U5800 M42A_PGM
CONFORMAL_COAT 0.018 M42A
>
>
>
>
>
>
TABLE_5_ITEM
341S1890 1 IC,PSOC+W/USB,56P,MLF,CY8C24794 U5100 M42A_PGM
341S2132 FOR M42B LOCKED BOOTROM TOTAL 1.276 ---

TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION

TABLE_5_ITEM
826-4393 1 LBL,P/N LABEL,PCB,28MMX6MM EEE:YCT CRITICAL BEST-KIONIX
826-4393 1 LBL,P/N LABEL,PCB,28MMX6MM EEE:YCS CRITICAL BETTER-KIONIX

TABLE_5_ITEM
TABLE_5_ITEM
CONFIGURATION OPTIONS
826-4393 1 LBL,P/N LABEL,PCB,28MMX6MM EEE:YCR CRITICAL GOOD-KIONIX
SYNC_MASTER=SMC SYNC_DATE=07/18/2005
A NOTICE OF PROPRIETARY PROPERTY
A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 4 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Functional Test Points
Power Supply NO_TESTs
NO_TEST
Fan Connectors Battery Digital Connector
IMVP6_RBIAS FUNC_TEST FUNC_TEST
I93 58A4 58B7
I94
IMVP6_COMP 58A4 58B7 I12 TRUE =PP5V_S0_FAN_RT 51C4 64D3 I1 TRUE SMC_BS_ALRT_L 45C5 46C6 65A2
TRUE FAN_RT_PWM 51B3 TRUE SMBUS_BATT_SCL_F 65B6

I95
5VS5_RUNSS 59B4 63C7
I15 I3
TRUE FAN_RT_TACH 51C3 TRUE SMBUS_BATT_SDA_F 65A6
1V5S0_RUNSS 62B5 63B7
I16 I4
I96
TRUE =PP3V3_S0_FAN_RT 51C4 64A6 TRUE BATT_IN
D I101
1V8S3_COMP
1V8S3_FSET
61B6
61C6
I157
I158 TRUE SMC_FAN_1_CTL 45B8 51B4

I2
I177 TRUE BATT_POS 65A6 D

I102
TRUE SMC_FAN_1_TACH 45B8 51C4 TRUE BATT_NEG 65A6
I103 TRUE 3V3S5_COMP I159 I180
I104 TRUE 3V3S5_FSET

1V05S0_COMP
I106
I105
TRUE
TRUE 1V05S0_FSET LPC+ Debug Connector I9
Audio FUNC_TEST
TRUE PP5V_S0_AUDIO_PWR
I107 TRUE P3V42G3H_FB 63D2 FUNC_TEST I11 TRUE PP5V_S0_AUDIO
TRUE GND_AUDIO_PWR 64B2
I20 TRUE =PP3V42_G3H_LPCPLUS 47C6 64D1
I10
TRUE GND_AUDIO_CODEC 64B2
=PP5V_S0_LPCPLUS I21
CLOCK NO_TESTS I19 TRUE 47C6 64D3
TRUE ACZ_SDATAIN<0> 21C7 54D7

TRUE LPC_AD<0> 21D4 45D8 47C6 53C6
I22
NO_TEST I18
TRUE ACZ_SDATAOUT 21C7 54D7
TRUE LPC_AD<1> 21D4 45D8 47C6 53C6
I24
I17
TRUE ACZ_BITCLK 21C7 54D7
TRUE CK410_CPU0_N 32C4 33D5 TRUE LPC_FRAME_L 21C5 45C8 47C6 53C6
I23
I111 I71
TRUE ACZ_RST_L 21C7 54C7 57C3
TRUE CK410_CPU0_P 32C4 33D5 TRUE PM_CLKRUN_L 23C8 38A5 45D5 47C6
I25
I112 I72 53C6 TRUE ACZ_SYNC 21C7 54D7
I113 TRUE CK410_CPU1_N 32C4 33D5 I73 TRUE BOOT_LPC_SPI_L 22B3 45C8 47C6
I45
I115 TRUE CK410_CPU1_P 32C4 33D5 I74 TRUE SMC_TMS 45B5 46C6 47C6 Battery FUNC_TEST
I114 TRUE CK410_CPU2_ITP_SRC10_N 32C4 33D5 I75 TRUE DEBUG_RST_L 26B1 47C6 I29 TRUE SMC_BATT_ISET 45B5 66B7
I116 TRUE CK410_CPU2_ITP_SRC10_P 32C4 33D5 I76 TRUE SMC_TRST_L 45C1 47C6 I32 TRUE SMC_BATT_CHG_EN 45D8 46B6 66A4
I117 TRUE CK410_DOT96_27M_N 32A4 33B5 I77 TRUE SMC_TDO 45C5 46C6 47B6 I31 TRUE SMC_BC_ACOK 45C5
65C7
46B6 65C3
66A5
I118 TRUE CK410_DOT96_27M_P 32A4 33B5 I78 TRUE SMC_MD1 45C2 47B6 I33 TRUE SMC_PS_ON 39C6 45D5 46B3
65C3
I119 TRUE CK410_LVDS_N 32B4 33A5 I79 TRUE SMC_TX_L 45C8 46B2 46D6 47B6 I36 TRUE SMC_BATT_TRICKLE_EN_L 45D8 46B6 66A3
I120 TRUE CK410_LVDS_P 32B4 33A5 I80 TRUE FWH_INIT_L 6B2 21C4 47C5 I38 TRUE SYS_ONEWIRE 45B8 46D6 65C8
I121 TRUE CK410_PCI4_CLK_SPN I81 TRUE PCI_CLK_PORT80_LPC 33D6 47C5
I122 TRUE CK410_PCIF1_CLK 32B6 33D8 I82 TRUE LPC_AD<2> 21D4 45D8 47C5 53C6
CK410_SRC1_N_SPN LPC_AD<3> USB FUNC_TEST

I123 TRUE 6B3 I83 TRUE 21D4 45D8 47C5 53C6
TP_USBP_E
CK410_SRC1_P_SPN INT_SERIRQ I44 TRUE 6C2
I124 TRUE 6B3 I84 TRUE 23C8 45C8 47C5 53C6
TP_USBN_E
CK410_SRC2_N PM_SUS_STAT_L I47 TRUE 6C2
I125 TRUE 32B4 33C5 I85 TRUE 23C5 45D5 46D3 47C5
TP_USBP_F
TRUE
C I183 TRUE
TRUE
CK410_SRC2_P
CK410_SRC3_N_SPN
32B4 33C5
6B3
I86 TRUE
TRUE
SMC_TDI
SMC_TCK
53C6
45C5 46C6 47C5
45C5 46C6 47C5

I46
I48 TRUE TP_USBN_F C
I184 I87
I185 TRUE CK410_SRC3_P_SPN 6B3 I88 TRUE SMC_RST_L 45C3 46D7 47C5
I186 TRUE CK410_SRC4_N 32B4 33B5 I89 TRUE SMC_NMI 45C1 47B5
CK410_SRC4_P SMC_RX_L DC-JACK FUNC_TEST

I187 TRUE 32B4 33B5 I91 TRUE 45C8 46B2 46D6 47B5
I188 TRUE CK410_SRC5_N 32B4 33C5 I90 TRUE SV_SET_UP 23B6 23C3 47B5 I57 TRUE ACIN_ENABLE_GATE 65C3
I189 TRUE CK410_SRC5_P 32B4 33C5
I190 TRUE CK410_SRC6_N 32B4 33C5

Battery charger FUNC_TEST
I191 TRUE CK410_SRC6_P 32B4 33D5 Other Func Test Points
I192 TRUE CK410_SRC7_N_SPN 6B3 I58 TRUE PPVBAT_G3H_CHGR_OUT 66B5 66C2
CK410_SRC7_P_SPN FUNC_TEST
I193 TRUE 6B3
I194 TRUE CK410_SRC8_N 32A4 33C5 I92 TRUE =PP1V05_S0_REG 62B1 64D8
CK410_SRC8_P INVERTER CONNECTOR FUNC_TEST

I195 TRUE 32A4 33C5
I196 TRUE CK410_SRC_CLKREQ1_L_SPN 6B3 I60 TRUE PPBUS_ALL_INV_CONN 67D3
CK410_SRC_CLKREQ3_L_SPN 6B3 SMBus FUNC_TEST INV_GND

I197 TRUE I182 I59 TRUE 67D2
I198 TRUE CK410_SRC_CLKREQ8_L 32A4 33A5 TRUE SMBUS_SMC_MLB_SCL 27C5 I61 TRUE PP5V_INV_F 67D3
TRUE INV_BKLIGHT_PWM_L 67D2

I151 TRUE SMBUS_SMC_MLB_SDA 27B5
I63
FIREWIRE FUNC_TEST
FIREWARE NO_TESTS I152 TRUE PPFW_SWITCH 39D4
NO_TEST
SLEEP LED FUNC_TEST
I199 TRUE FW_B_TPA_N_SPN 6D1
I155 TRUE SYS_LED_ANODE 35C5 46A3
I200 TRUE FW_B_TPA_P_SPN 6D1
I201 TRUE FW_B_TPBIAS_SPN 6D1 SMC FUNC_TEST

TRUE FW_B_TPB_N_SPN 6D1
B I202
I203 TRUE FW_B_TPB_P_SPN 6D1

I153 TRUE
TRUE
SMC_LID
SMC_MANUAL_RST_L
40C4 45B5 46C6 65A8
46D8
B
I204 TRUE FW_C_TPA_N_SPN 6D1
I154
TRUE SMC_CPU_VSENSE 45D5 48B1
I205 TRUE FW_C_TPA_P_SPN 6D1
I156
I206 TRUE FW_C_TPBIAS_SPN 6D1 Power Supply FUNC_TEST

I207 TRUE FW_C_TPB_N_SPN 6D1
TRUE ALL_SYS_PWRGD 26A5 45D8 63B1
TRUE FW_C_TPB_P_SPN 6D1
I160
I208
I161 TRUE PPVCORE_CPU_S0 64D7
I162 TRUE PP1V05_S0 64D7
LVDS NO_TESTS I163 TRUE PP1V5_S0 64C7
I164 TRUE PP1V8_S0 64C7

NO_TEST PP2V5_S0
I165 TRUE 64B7
I209 TRUE LVDS_B_CLK_N_SPN 6D5 I169 TRUE PP3V3_S0 64B7
I210 TRUE LVDS_B_CLK_P_SPN 6D5 I166 TRUE PP5V_S0 64D4
I211 TRUE LVDS_B_DATA_N0_SPN 6D5 I167 TRUE PP1V2_S3 64C4
I214 TRUE LVDS_B_DATA_P1_SPN 6D5 I174 TRUE PP3V3_S3 64B4
I215 TRUE LVDS_B_DATA_P2_SPN 6D5 I171 TRUE PP5V_S3 64B4
I172 TRUE PP3V3_S5 64A4
I173 TRUE PP5V_S5 64A4
ETHERNET NO_TESTS I175 TRUE PP3V42_G3H 64D1
I176 TRUE PPBUSA_G3H

NO_TEST PPBUSB_G3H
I179 TRUE 64C1
I216 TRUE ENET_MDI_TRAN_P<2> 37B5 I178 TRUE PP18V5_G3H 64C1
I217 TRUE ENET_MDI_TRAN_N<2> 37B5 I181 TRUE PP0V9_S0 64D7 FUNC TEST 1 OF 2
I218 TRUE ENET_MDI_TRAN_P<3> 37B5

A
NO_TEST AGREES TO THE FOLLOWING
I219 TRUE SMC_FAN_3_TACH 45B8 46C3
I220 TRUE ALS_LEFT 45A8 46C3
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 5 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
(EMI PAD FOR INVERTER GONNECTOR)
SPKR-MIC-CLIP-M42
INVT_CHGND ZS0620
1 EMI-SPRING NC 1 ZS0621 LVDS ALIASES
67C2
CLIP-SM-M42
SM
NB CFG ALIASES FIREWIRE ALIASES
NO-CONNECT UNUSED LVDS INTERFACE PORTS
NO-CONNECT UNUSED CFG INTERFACE PORTS
NO-CONNECT UNUSED FIREWIRE INTERFACE PORTS
13C5 LVDS_B_CLK_N LVDS_B_CLK_N_SPN 5A7
NB_CFG<3> TP_NB_CFG3
CHASSIS GND 13C5 LVDS_B_CLK_P LVDS_B_CLK_P_SPN
MAKE_BASE=TRUE
MAKE_BASE=TRUE
5A7
14C6
14C6 NB_CFG<4> TP_NB_CFG4

MAKE_BASE=TRUE 38B3 FW_B_TPBIAS FW_B_TPBIAS_SPN 5B7
MAKE_BASE=TRUE
BATTERY,AUDIO,DIP DIMM CONNECTOR CHASSIS GND 13C5 LVDS_B_DATA_N<0> LVDS_B_DATA_N0_SPN
MAKE_BASE=TRUE
5A7
MAKE_BASE=TRUE 38B3 FW_B_TPA_P FW_B_TPA_P_SPN 5B7
MAKE_BASE=TRUE
13C5 LVDS_B_DATA_N<1> LVDS_B_DATA_N1_SPN 5A7 MAKE_BASE=TRUE 38B3 FW_B_TPA_N FW_B_TPA_N_SPN 5B7
GND_CHASSIS_IO 6C7 OMIT MAKE_BASE=TRUE 14C6 NB_CFG<8> TP_NB_CFG8 MAKE_BASE=TRUE
LVDS_B_DATA_N<2> LVDS_B_DATA_N2_SPN 38B3 FW_B_TPB_P FW_B_TPB_P_SPN
Z0606 13C5
MAKE_BASE=TRUE
5A7
MAKE_BASE=TRUE 5B7
MAKE_BASE=TRUE
D 65A6 =GND_BATT_CHGND
5R2P3-7SQB
1
13C5
13C5
LVDS_B_DATA_P<0>
LVDS_B_DATA_P<1>
LVDS_B_DATA_P0_SPN
LVDS_B_DATA_P1_SPN
MAKE_BASE=TRUE
5A7
MAKE_BASE=TRUE
MAKE_BASE=TRUE
38B3 FW_B_TPB_N
38B3 FW_C_TPBIAS
FW_B_TPB_N_SPN
FW_C_TPBIAS_SPN
5B7
MAKE_BASE=TRUE
5B7
D
MAKE_BASE=TRUE 14C6 NB_CFG<12> TP_NB_CFG12 MAKE_BASE=TRUE
56B8 =GND_CHASSIS_AUDIO_JACK 13C5 LVDS_B_DATA_P<2> LVDS_B_DATA_P2_SPN 5A7 MAKE_BASE=TRUE 38B3 FW_C_TPA_P FW_C_TPA_P_SPN 5B7
MAKE_BASE=TRUE 14C6 NB_CFG<13> TP_NB_CFG13 MAKE_BASE=TRUE
=GND_CHASSIS_AUDIO_SPKRCONN MAKE_BASE=TRUE 38B3 FW_C_TPA_N FW_C_TPA_N_SPN 5B7
14C6 NB_CFG<14> TP_NB_CFG14 MAKE_BASE=TRUE
57A6 =GND_CHASSIS_AUDIO_MIC MAKE_BASE=TRUE 38B3 FW_C_TPB_P FW_C_TPB_P_SPN 5B7
=GND_CHASSIS_AUDIO_SHIELD1 MAKE_BASE=TRUE 38B3 FW_C_TPB_N FW_C_TPB_N_SPN 5B7
=GND_CHASSIS_AUDIO_SHIELD2 MAKE_BASE=TRUE
=GND_CHASSIS_AUDIO_SHIELD3 PCI_EXPRESS GRAPHICS ALIASES 39C6 =FWPWR_PWRON NC_FWPWR_PWRON

28A5 =GND_CHASSIS_DIPDIMM_LEFT NO_TEST=TRUE
NO-CONNECT UNUSED SDVO INTERFACE PORTS MAKE_BASE=TRUE
SATA,LVDS CONNECTOR CHASSIS GND 13D3 PEG_D2R_N<0> PEG_D2R_N0_SPN

MAKE_BASE=TRUE
SATA ALIASES
13D3 PEG_D2R_N<2> PEG_D2R_N2_SPN
MAKE_BASE=TRUE NO-CONNECT UNUSED SATA INTERFACE PORTS
GND_CHASSIS_SATA 35C8 OMIT 13D3 PEG_D2R_N<3> PEG_D2R_N3_SPN
VOLTAGE=0V Z0607 13D3 PEG_D2R_N<4> PEG_D2R_N4_SPN
MAKE_BASE=TRUE
21B6 SATA_A_D2R_N SATA_A_D2R_N_SPN
MAKE_BASE=TRUE 6P5R2P6-5P5B 13D3 PEG_D2R_N<5> PEG_D2R_N5_SPN
MAKE_BASE=TRUE
21B6 SATA_A_D2R_P SATA_A_D2R_P_SPN
MAKE_BASE=TRUE USB PORT A = External USB2.0 Port
1 MAKE_BASE=TRUE MAKE_BASE=TRUE 42C5 =USB2_EXTA_P USB2_EXTA_P USB_A_P 22C2
13D3 PEG_D2R_N<6> PEG_D2R_N6_SPN 21B6 SATA_A_R2D_C_N SATA_A_R2D_C_N_SPN MAKE_BASE=TRUE
MAKE_BASE=TRUE MAKE_BASE=TRUE 42C5 =USB2_EXTA_N USB_A_N
1 C0607 1 C0608 13D3 PEG_D2R_N<7> PEG_D2R_N7_SPN 21B6 SATA_A_R2D_C_P SATA_A_R2D_C_P_SPN
42C8 =EXTAUSB_OC_L
USB2_EXTA_N
MAKE_BASE=TRUE
EXTAUSB_OC_L USB_A_OC_L
22C2
22C4 22D8
67B2 67A2 =GND_CHASSIS_LVDS 0.1UF 0.01uF 13D3 PEG_D2R_N<8> PEG_D2R_N8_SPN
MAKE_BASE=TRUE MAKE_BASE=TRUE
MAKE_BASE=TRUE
10% 10%
16V
2 X5R
16V
2 CERM 13D3 PEG_D2R_N<9> PEG_D2R_N9_SPN
MAKE_BASE=TRUE
USB PORT B = Trackpad(Geyser)
MAKE_BASE=TRUE
402 402 13C3 PEG_D2R_N<10> PEG_D2R_N10_SPN 40C7 =USB2_GEYSER_P USB2_GEYSER_P USB_B_P 22C2
MAKE_BASE=TRUE
13C3 PEG_D2R_N<11> PEG_D2R_N11_SPN
MAKE_BASE=TRUE
MAKE_BASE=TRUE
PCI_EXP ALIASES 40C7 =USB2_GEYSER_N USB2_GEYSER_N
MAKE_BASE=TRUE
USB_B_N 22C2
DCIN CONNECTOR CHASSIS GND 13C3 PEG_D2R_N<12> PEG_D2R_N12_SPN

MAKE_BASE=TRUE NO-CONNECT UNUSED PCI_EXP INTERFACE PORTS USB PORT C = External USB2.0 Port B
GND_CHASSIS_DCIN OMIT 13C3 PEG_D2R_N<13> PEG_D2R_N13_SPN 42B5 =USB2_EXTB_P USB2_EXTB_P USB_C_P 22C2
VOLTAGE=0V Z0602 13C3 PEG_D2R_N<14> PEG_D2R_N14_SPN
MAKE_BASE=TRUE
22D4 PCIE_C_D2R_N PCIE_C_D2R_N_SPN
42B5 =USB2_EXTB_N
MAKE_BASE=TRUE
USB2_EXTB_N USB_C_N
MAKE_BASE=TRUE 5R2P3-7SQB 13C3 PEG_D2R_N<15> PEG_D2R_N15_SPN
MAKE_BASE=TRUE
22D4 PCIE_C_D2R_P PCIE_C_D2R_P_SPN
22C2
42C8 =EXTBUSB_OC_L EXTBUSB_OC_L USB_C_OC_L 22C4 22D8
65C8 =GND_DCIN_CHGND 1 MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE
13C3 PEG_D2R_P<0> PEG_D2R_P0_SPN 22D4 PCIE_C_R2D_C_N PCIE_C_R2D_C_N_SPN
=GND_CHASSIS_RJ45 PEG_D2R_P<2> PEG_D2R_P2_SPN PCIE_C_R2D_C_P PCIE_C_R2D_C_P_SPN USB PORT D = CAMERA
37A4
1 C0630 13C3 22D4
C
C 69C3 69A4 =GND_CHASSIS_TMDS_UPPER 0.1UF
10%
13C3
13C3
PEG_D2R_P<3>
PEG_D2R_P<4>
PEG_D2R_P3_SPN
PEG_D2R_P4_SPN
MAKE_BASE=TRUE
MAKE_BASE=TRUE
22D4
22D4
PCIE_D_D2R_N
PCIE_D_D2R_P
PCIE_D_D2R_N_SPN
PCIE_D_D2R_P_SPN
MAKE_BASE=TRUE
MAKE_BASE=TRUE
67B4 =USB2_CAMERA_P
67A4 =USB2_CAMERA_N
USB2_CAMERA_P
MAKE_BASE=TRUE
USB2_CAMERA_N
USB_D_P
USB_D_N
22C2
22C2
16V
2 X5R MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE
402 13C3 PEG_D2R_P<5> PEG_D2R_P5_SPN 22D4 PCIE_D_R2D_C_N PCIE_D_R2D_C_N_SPN
MAKE_BASE=TRUE MAKE_BASE=TRUE USB PORT "E" = Unused
13C3 PEG_D2R_P<6> PEG_D2R_P6_SPN 22D4 PCIE_D_R2D_C_P PCIE_D_R2D_C_P_SPN
MAKE_BASE=TRUE MAKE_BASE=TRUE 5C1 TP_USBP_E USB_E_P 22C2
13C3 PEG_D2R_P<7> PEG_D2R_P7_SPN 22C4 PCIE_E_D2R_N PCIE_E_D2R_N_SPN MAKE_BASE=TRUE
I/O CONNECTOR CHASSIS GND OMIT
13C3 PEG_D2R_P<8> PEG_D2R_P8_SPN
MAKE_BASE=TRUE
22C4 PCIE_E_D2R_P PCIE_E_D2R_P_SPN
MAKE_BASE=TRUE
5C1 TP_USBN_E
MAKE_BASE=TRUE
USB_E_N 22C2
GND_CHASSIS_IO PEG_D2R_P<9> PEG_D2R_P9_SPN PCIE_E_R2D_C_N PCIE_E_R2D_C_N_SPN USB PORT "F" = IR CONTROLLER

VOLTAGE=0V
6D7
Z0608 13C3
PEG_D2R_P<10> PEG_D2R_P10_SPN
MAKE_BASE=TRUE
22C4
PCIE_E_R2D_C_P PCIE_E_R2D_C_P_SPN
MAKE_BASE=TRUE 41C6 =USB2_IR_P USB_IR_P USB_F_P
22C2
MAKE_BASE=TRUE 5P0R2P3-7BLB 13C3
MAKE_BASE=TRUE
22C4
MAKE_BASE=TRUE 41C6 =USB2_IR_N USB_IR_N MAKE_BASE=TRUE USB_F_N
1 13C3 PEG_D2R_P<11> PEG_D2R_P11_SPN 22C4 PCIE_F_D2R_N PCIE_F_D2R_N_SPN 22C2
MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE
39A1 =GND_CHASSIS_FW_DOWN 13C3 PEG_D2R_P<12> PEG_D2R_P12_SPN 22C4 PCIE_F_D2R_P PCIE_F_D2R_P_SPN USB PORT "G" = BLUETOOTH
=GND_CHASSIS_USB
1 C0610 1 C0611 PEG_D2R_P<13> PEG_D2R_P13_SPN
MAKE_BASE=TRUE
PCIE_F_R2D_C_N PCIE_F_R2D_C_N_SPN
MAKE_BASE=TRUE
42C4 42C2 42A4 42A2
0.1UF 0.01uF 13C3
MAKE_BASE=TRUE
22C4
MAKE_BASE=TRUE
44C6 =USB2_BT_P USB_BT_P USB_G_P 22C2
10% 10% PEG_D2R_P<14> PEG_D2R_P14_SPN PCIE_F_R2D_C_P PCIE_F_R2D_C_P_SPN MAKE_BASE=TRUE
16V
2 X5R 2 CERM
16V 13C3
MAKE_BASE=TRUE
22C4
MAKE_BASE=TRUE
44C6 =USB2_BT_N USB_BT_N USB_G_N 22C2
402 402 13C3 PEG_D2R_P<15> PEG_D2R_P15_SPN MAKE_BASE=TRUE

MAKE_BASE=TRUE
13B3 PEG_R2D_C_N<4> PEG_R2D_C_N4_SPN USB PORT "H" = PCI-E Mini Card
MAKE_BASE=TRUE
PEG_R2D_C_N<5> PEG_R2D_C_N5_SPN
DIP DIMM CONNECTOR CHASSIS GND OMIT
13B3
MAKE_BASE=TRUE CLOCK ALIASES 43B4 =USB2_AIRPORT_P USB2_AIRPORT_P
MAKE_BASE=TRUE
USB_H_P 22C2
GND_CHASSIS_CENTER Z0610 13B3
MAKE_BASE=TRUE
43B4 =USB2_AIRPORT_N USB2_AIRPORT_N
MAKE_BASE=TRUE
USB_H_N 22C2
VOLTAGE=0V
MAKE_BASE=TRUE
5R2P3-7SQB 13B3
MAKE_BASE=TRUE
NO-CONNECT UNUSED CLOCK INTERFACE PORTS
29A5 28D5 =GND_CHASSIS_DIPDIMM_CENTER 1 13B3 PEG_R2D_C_N<8> PEG_R2D_C_N8_SPN
MAKE_BASE=TRUE
1 C0616 1 C0617 13B3
MAKE_BASE=TRUE 32B4 CK410_SRC1_N CK410_SRC1_N_SPN 5C7
0.1UF 0.01uF 13B3
MAKE_BASE=TRUE 32B4 CK410_SRC1_P CK410_SRC1_P_SPN
MAKE_BASE=TRUE
5C7
10% 10% 13B3 PEG_R2D_C_N<11> PEG_R2D_C_N11_SPN MAKE_BASE=TRUE
16V
2 X5R
16V
2 CERM MAKE_BASE=TRUE 32B4 CK410_SRC3_N CK410_SRC3_N_SPN 5C7 ANALOG SWITCH GPIO
402 402 13B3 PEG_R2D_C_N<12> PEG_R2D_C_N12_SPN MAKE_BASE=TRUE
MAKE_BASE=TRUE 32B4 CK410_SRC3_P CK410_SRC3_P_SPN 5C7 69A6 =SB_GPIO22 SB_GPIO22 TP_SB_GPIO22 22B6
13B3 PEG_R2D_C_N<13> PEG_R2D_C_N13_SPN MAKE_BASE=TRUE MAKE_BASE=TRUE
MAKE_BASE=TRUE 32B4 CK410_SRC7_N CK410_SRC7_N_SPN 5C7
13B3 PEG_R2D_C_N<14> PEG_R2D_C_N14_SPN MAKE_BASE=TRUE
DIP DIMM CONNECTOR CHASSIS GND OMIT 13B3 PEG_R2D_C_N<15> PEG_R2D_C_N15_SPN
MAKE_BASE=TRUE 32B4 CK410_SRC7_P CK410_SRC7_P_SPN 5C7
MAKE_BASE=TRUE
45B8 14B7 PM_EXTTS_L<0> DIMM_OVERTEMP_L 28C4 29C4
CK410_SRC_CLKREQ1_L CK410_SRC_CLKREQ1_L_SPN MAKE_BASE=TRUE
GND_CHASSIS_RIGHT Z0609 13B3 PEG_R2D_C_P<4> PEG_R2D_C_P4_SPN
MAKE_BASE=TRUE 32B4
CK410_SRC_CLKREQ3_L CK410_SRC_CLKREQ3_L_SPN
5B7
MAKE_BASE=TRUE
VOLTAGE=0V 5R2P3-7SQB MAKE_BASE=TRUE 32B4 5B7
B 29D4 =GND_CHASSIS_DIPDIMM_RIGHT
MAKE_BASE=TRUE
1
13B3
13B3
PEG_R2D_C_P<5>
PEG_R2D_C_P<6>
PEG_R2D_C_P5_SPN
PEG_R2D_C_P6_SPN
MAKE_BASE=TRUE
MAKE_BASE=TRUE
47C5 21C4 5C2 FWH_INIT_L
MAKE_BASE=TRUE
SMC_CPU_INIT_3_3_L 45D5 B
1 C0614 1 C0615 13B3 PEG_R2D_C_P<7> PEG_R2D_C_P7_SPN
MAKE_BASE=TRUE
0.1UF 0.01uF 13B3 PEG_R2D_C_P<8> PEG_R2D_C_P8_SPN

MAKE_BASE=TRUE
10% 10% MAKE_BASE=TRUE
16V
2 X5R
16V
2 CERM PEG_R2D_C_P<9> PEG_R2D_C_P9_SPN
402 402
13B3
13B3 PEG_R2D_C_P<10> PEG_R2D_C_P10_SPN

MAKE_BASE=TRUE SB ALIASES
MAKE_BASE=TRUE NO-CONNECT UNUSED CLOCK INTERFACE PORTS
13B3 PEG_R2D_C_P<11> PEG_R2D_C_P11_SPN
OMIT OMIT PEG_R2D_C_P<12> PEG_R2D_C_P12_SPN
MAKE_BASE=TRUE
SUS_CLK_SB SUS_CLK_SB_SPN
Z0601 Z0611 13A3
PEG_R2D_C_P<13> PEG_R2D_C_P13_SPN
MAKE_BASE=TRUE
23C3
MAKE_BASE=TRUE
5R2P3-7SQB 5R2P3-7B 13A3
MAKE_BASE=TRUE
GND_CHASSIS_CPU 1 GND_CHASSIS_FANSCREW 1 13A3 PEG_R2D_C_P<14> PEG_R2D_C_P14_SPN
MAKE_BASE=TRUE
13A3 PEG_R2D_C_P<15> PEG_R2D_C_P15_SPN
MAKE_BASE=TRUE
1 C0612 1 C0613 1 C0618 1 C0619

0.1UF 0.01uF 0.1UF
10%
16V
10%
16V
10%
16V
0.01uF
2 X5R 2 CERM 2 X5R 10%
402 402 402 2 16V
CERM GND_CHASSIS_IO1
VOLTAGE=0V
SO-DIMM ALIASES
402 MAKE_BASE=TRUE NO-CONNECT UNUSED ADDRESS INTERFACE PORTS
69A3 =GND_CHASSIS_TMDS_DOWN
I393 28C4 MEM_A_A<15> MEM_A_A15_SPN
OMIT
DIGITAL GND SCREW HOLE OMIT 39A1 =GND_CHASSIS_FW_UPPER 28C4 MEM_A_A<14> MEM_A_A14_SPN
MAKE_BASE=TRUE
MAKE_BASE=TRUE
29C4 MEM_B_A<15> MEM_B_A15_SPN
Z0603 Z0604 MEM_B_A<14> MEM_B_A14_SPN
MAKE_BASE=TRUE
STDOFF-4.5OD3.95H-1.1-3.7-TH1 STDOFF-4.5OD3.95H-1.1-3.7-TH1 29C4
MAKE_BASE=TRUE
NB_RIGHT_DOWN_SCREW 1 CPU_THERMAL_SCREW_UP 1
1 1
Ethernet ALIASES
R0612 R0610 ENET_CTRL12 ENET_CTRL12_SPN
5%
0 0
5%
36C8
ENET_CTRL25 ENET_CTRL25_SPN
MAKE_BASE=TRUE
SIGNAL ALIAS /RESET
36C8
1/16W 1/16W MAKE_BASE=TRUE
A MF-LF
2 402
MF-LF
2 402
SYNC_MASTER=ENET

A
OMIT OMIT TABLE_5_HEAD

PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
Z0605 Z0621 TABLE_5_ITEM
STDOFF-4.5OD3.95H-1.1-3.7-TH1 STDOFF-4.5OD3.95H-1.1-3.7-TH1 860-0722 4 THERMAL STANDOFF Z0603,Z0604,Z0605,Z0621 STANDOFF I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
CPU_THERMAL_SCREW_DOWN 1 CPU_THERMAL_SCREW_RIGHT 1 TABLE_5_ITEM

860-0723 1 STANDOFF WIRELESS Z0612 STANDOFF
1 1 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
R0611 R0621 OMIT OMIT 860-0749 1 STANDOFF W/THRU HOLES,WIRELESS Z0613 STANDOFF
TABLE_5_ITEM
0 0 SIZE DRAWING NUMBER REV.

5% 5% Z0612 Z0613
1/16W
MF-LF
2 402
1/16W
MF-LF
2 402
STDOFF-4.2OD2.15H-1.2-TH STDOFF-4.2OD2.15H-1.2-TH
APPLE COMPUTER INC.
D 051-7374 A
1 1
NC NC SCALE SHT OF
NONE 6 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
OMIT
U0700 =PP1V05_S0_CPU 7B5 7B6 7D5 8C7 9C8 11B3 11C5 64D6
12D4
IO FSB_A_L<3> J4 A3* YONAH ADS* H1 12C4 FSB_ADS_L IO
12D4
IO
FSB_A_L<4> L4 A4*
CPU BNR* E2 12C4 FSB_BNR_L IO 1
12D4
IO
FSB_A_L<5> M3 A5*
BGA BPRI* G5 12C4 FSB_BPRI_L
IO
R0702
FSB_A_L<6> 54.9
12D4 K5 A6* (1 OF 4) 1%
IO
DEFER* H5 12B4 FSB_DEFER_L 1/16W
12D4
IO
FSB_A_L<7> M1 A7* IO
MF-LF
F21 12B4 FSB_DRDY_L
12D4 FSB_A_L<8> N2 A8*
DRDY* IO 2 402
12B4 FSB_DBSY_L
IO
DBSY* E1 IO
12D4 IO FSB_A_L<9> J1 A9*
FSB_A_L<10> FSB_BREQ0_L
ADDR GROUP0
12D4
IO N3 A10* BR0* F1 12C4
IO
PLACE TESTPOINT ON
12D4 FSB_A_L<11> P5 A11*
IO
IERR* D20 FSB_IERR_L FSB_IERR_L WITH A GND
FSB_A_L<12>
D
CONTROL
12D4 P2 A12*
D 12D4
IO
IO
FSB_A_L<13> L1 A13*
INIT* B3 21C4 CPU_INIT_L
IN 0.1" AWAY
12D4
IO FSB_A_L<14> P4 A14* LOCK* H4 12B4 FSB_LOCK_L IO
12D4
IO
FSB_A_L<15> P1 A15*
RESET* B1 12C4 11B5 FSB_CPURST_L
12C4 FSB_A_L<16> R1 A16* IN
IO
RS0* F3 12A4 FSB_RS_L<0> IN
12C4 FSB_ADSTB_L<0> L2 ADSTB0*
IO
RS1* F4 12A4 FSB_RS_L<1> IN
RS2* G3 12A4 FSB_RS_L<2>
12B4 FSB_REQ_L<0> K3 REQ0* IN
12A4 FSB_TRDY_L =PP1V05_S0_CPU
IO
TRDY* G2 IN 7B5 7B6 7D5 8C7 9C8 11B3 11C5 64D6
12B4 IO FSB_REQ_L<1> H2 REQ1*
12A4
IO
FSB_REQ_L<2> K2 REQ2* HIT* G6 12B4 FSB_HIT_L IO
12A4
IO FSB_REQ_L<3> J3 REQ3* HITM* E4 12B4 FSB_HITM_L
IO
12A4
IO FSB_REQ_L<4> L5 REQ4* 1
R0703
BPM0* AD4 XDP_BPM_L<0>
11B2 54.9
FSB_A_L<17> IO
XDP/ITP SIGNALS
12C4
IO Y2 A17* 1% OMIT
BPM1* AD3 11B2 XDP_BPM_L<1> 1/16W
12C4 FSB_A_L<18> U5 A18* IO
MF-LF
11B2 XDP_BPM_L<2>
IO
BPM2* AD1 2 402
12C4
IO FSB_A_L<19> R3 A19*
BPM3* AC4 11B3 XDP_BPM_L<3>
IO
U0700
12C4 FSB_A_L<20> W6 A20* IO
YONAH
ADDR GROUP1
IO
PRDY* AC2 11B2 XDP_BPM_L<4> 12D6 FSB_D_L<0> E22 D0* D32* AA23 12C6 FSB_D_L<32>
12C4 FSB_A_L<21> U4 A21* IO IO
CPU IO
11B2 XDP_BPM_L<5> FSB_D_L<1> FSB_D_L<33>
IO
PREQ* AC1 12D6 F24 D1* D33* AB24 12C6
12C4 FSB_A_L<22> Y5 A22* IO IO BGA IO
11B3 11B2 7A8 XDP_TCK FSB_D_L<2> FSB_D_L<34>
IO
TCK AC5 12D6 E26 D2* (2 OF 4) D34* V24 12C6
12C4
IO FSB_A_L<23> U2 A23* IN IO IO
TDI AA6 11B3 7B8 XDP_TDI IN 12D6 IO FSB_D_L<3> H22 D3* D35* V26 12C6 FSB_D_L<35> IO
FSB_A_L<24> 1
12C4
IO R4 A24*
TDO AB3 11B5 XDP_TDO
R0704 12D6
IO FSB_D_L<4> F23 D4* D36* W25 12C6 FSB_D_L<36>
IO
12C4 IO FSB_A_L<25> T5 A25* OUT
68
TMS AB5 11B2 7B8 XDP_TMS 5% 12D6 FSB_D_L<5> G25 D5* D37* U23 12C6 FSB_D_L<37>
12C4 FSB_A_L<26> T3 A26* IN
1/16W IO IO
11B3 XDP_TRST_L FSB_D_L<6> 12C6 FSB_D_L<38>
IO
TRST* AB6 IN MF-LF 12D6
IO E25 D6* D38* U25 IO
FSB_A_L<27> W3 A27* 2 402
DATA GRP0
DATA GRP2
12C4
26C6 11B4 XDP_DBRESET_L FSB_D_L<7> 12B6 FSB_D_L<39>
IO
DBR* C20 12D6 E23 D7* D39* U22
12C4
IO
FSB_A_L<28> W5 A28* OUT IO IO
12D6 FSB_D_L<8> K24 D8* D40* AB25 12B6 FSB_D_L<40>
12C4 FSB_A_L<29> Y4 A29* CPU_PROCHOT_L TO SMC
IO IO
IO
PROCHOT* D21 58C8 46C2 46B5 CPU_PROCHOT_L 12D6
IO
FSB_D_L<9> G24 D9* D41* W22 12B6 FSB_D_L<41>
IO
FSB_A_L<30> W2 A30*
THERM OUT
12C4 AND CPU VR TO INFORM
10B6 CPU_THERMD_P FSB_D_L<10> 12B6 FSB_D_L<42>
IO
THERMDA A24 12D6 J24 D10* D42* Y23
FSB_A_L<31> OUT IO IO
C 12C4
12C4
IO
IO
FSB_ADSTB_L<1>
Y1 A31*
V4 ADSTB1*
THERMDC A25 10B6 CPU_THERMD_N
OUT
CPU IS HOT
12D6
12D6
IO FSB_D_L<11>
FSB_D_L<12>
J23 D11*
H26 D12*
D43*
D44*
AA26
Y26
12B6 FSB_D_L<43>
12B6 FSB_D_L<44>
IO C
IO IO
THERMTRIP* C7 46B3 21C2 14B6 PM_THRMTRIP_L
21C4
IN CPU_A20M_L A6 A20M* OUT
12C6
IO
FSB_D_L<13> F26 D13* D45* Y22 12B6 FSB_D_L<45>
IO
21C2
OUT CPU_FERR_L A5 FERR* 12C6 IO FSB_D_L<14> K22 D14* D46* AC26 12B6 FSB_D_L<46> IO
PM_THRMTRIP#
21C4
IN
CPU_IGNNE_L C4 IGNNE* 12C6
IO
FSB_D_L<15> H25 D15* D47* AA24 12B6 FSB_D_L<47>
IO
HCLK
SHOULD CONNECT TO
BCLK0 A22 33D3 33C2 FSB_CLK_CPU_P 12B4 FSB_DSTBN_L<0> H23 DSTBN0* DSTBN2* W24 12B4 FSB_DSTBN_L<2>
21C4 CPU_STPCLK_L D5 STPCLK* IN
ICH7-M AND GMCH IO IO
33C2 FSB_CLK_CPU_N FSB_DSTBP_L<0> 12B4 FSB_DSTBP_L<2>
IN
BCLK1 A21 33D3
IN 12B4
IO G22 DSTBP0* DSTBP2* Y25 IO
21C4 CPU_INTR C6 LINT0 WITHOUT T-ING (NO
IN
12B4 FSB_DINV_L<0> J26 DINV0* DINV2* V23 12B4 FSB_DINV_L<2>
21C4
IN
CPU_NMI B4 LINT1 STUB) IO IO
21C4
IN
CPU_SMI_L A3 SMI* 12C6
IO FSB_D_L<16> N22 D16* D48* AC22 12B6 FSB_D_L<48> IO
12C6 FSB_D_L<17> K25 D17* D49* AC23 12B6 FSB_D_L<49>
TP_CPU_A32_L AA1 RSVD1 IO IO
12C6
IO FSB_D_L<18> P26 D18* D50* AB22 12B6 FSB_D_L<50>
IO
TP_CPU_A33_L AA4 RSVD2 RSVD12 T22 TP_CPU_EXTBREF
RESERVED
12C6 FSB_D_L<19> R23 D19* D51* AA21 12B6 FSB_D_L<51>

TP_CPU_A34_L AB2 RSVD3 IO IO
12C6 FSB_D_L<20> L25 D20* D52* AB21 12B6 FSB_D_L<52>
TP_CPU_A35_L AA3 RSVD4 IO IO
RSVD13 D2 TP_CPU_SPARE0 12C6
IO FSB_D_L<21> L22 D21* D53* AC25 12B6 FSB_D_L<53>
IO
TP_CPU_A36_L M4 RSVD5 LAYOUT NOTE:
DATA GRP1
DATA GRP3
RSVD14 F6 TP_CPU_SPARE1 12C6 FSB_D_L<22> L23 D22* D54* AD20 12B6 FSB_D_L<54>
TP_CPU_A37_L N5 RSVD6 SPARE[7-0],HFPLL:
IO IO
COMP0,2 CONNECT WITH ZO=27.4OHM, MAKE
RSVD15 D3 TP_CPU_SPARE2 12C6 IO FSB_D_L<23> M23 D23* D55* AE22 12B6 FSB_D_L<55> IO
TP_CPU_A38_L T2 RSVD7 ROUTE TO TP VIA AND TRACE LENGTH SHORTER THAN 0.5".
RSVD16 C1 TP_CPU_SPARE3 12C6 FSB_D_L<24> P25 D24* D56* AF23 12B6 FSB_D_L<56>
TP_CPU_A39_L V3 RSVD8 PLACE GND VIA W/IN 1000 MILS IO IO
COMP1,3 CONNECT WITH ZO=55OHM, MAKE
RSVD17 AF1 TP_CPU_SPARE4 12C6 FSB_D_L<25> P22 D25* D57* AD24 12B6 FSB_D_L<57>
TP_CPU_APM0_L B2 RSVD9 IO IO
TRACE LENGTH SHORTER THAN 0.5".
RSVD18 D22 TP_CPU_SPARE5 12C6
IO FSB_D_L<26> P23 D26* D58* AE21 12B6 FSB_D_L<58>
IO
TP_CPU_APM1_L C3 RSVD10
RSVD19 C23 TP_CPU_SPARE6 12C6
IO FSB_D_L<27> T24 D27* D59* AD21 12B6 FSB_D_L<59>
IO
TP_CPU_HFPLL B25 RSVD11 RSVD20 C24 TP_CPU_SPARE7 12C6
IO FSB_D_L<28> R24 D28* D60* AE25 12B6 FSB_D_L<60>
IO
R0716
=PP1V05_S0_CPU 27.4 2
64D6 11C5 11B3 9C8 8C7 7D5 7B6 12C6
IO FSB_D_L<29> L26 D29* D61* AF25 12B6 FSB_D_L<61>
IO
1
12C6
IO FSB_D_L<30> T25 D30* D62* AF22 12B6 FSB_D_L<62>
IO
402
1 12C6
IO FSB_D_L<31> N24 D31* D63* AF26 12B6 FSB_D_L<63>
IO
R0717
R0705 FSB_DSTBN_L<1> 54.9 2
12B4 M24 DSTBN1* DSTBN3* AD23 12B4 FSB_DSTBN_L<3> 1
IO IO
1K
1% 12B4 FSB_DSTBP_L<1> N25 DSTBP1* DSTBP3* AE24 12B4 FSB_DSTBP_L<3> 1% 402
B =PP1V05_S0_CPU 7B5 7D5 8C7 9C8 11B3 11C5 64D6 1/16W
MF-LF
2 402
12B4
IO
IO FSB_DINV_L<1> M26 DINV1* DINV3* AC20 12B4 FSB_DINV_L<3>
IO
IO R0718 B
CPU_GTLREF CPU_COMP<0> 1
27.4 2
AD26 GTLREF COMP0 R26
R0720 1 A2 NC MISC COMP1 U26 CPU_COMP<1>
54.9 2 R0706 LAYOUT NOTE: 0.5" MAX LENGTH R0719
11B2 7C6 XDP_TMS 1 COMP2 U1 CPU_COMP<2>
2.0K CPU_TEST1 C26 TEST1 54.9 2
1% 1% COMP3 V1 CPU_COMP<3> 1
402 1/16W
MF-LF CPU_TEST2 D25 TEST2 1%
2 402 DPRSTP* E5 58C7 21C4 CPU_DPRSTP_L IN
402
33C6
OUT CPU_BSEL<0> B22 BSEL0 DPSLP* B5 21C4 CPU_DPSLP_L
IN
R0721 33B6
OUT CPU_BSEL<1> B23 BSEL1 DPWR* D24 12B4 FSB_DPWR_L
IN
54.9 2
11B3 7C6 XDP_TDI 1 33B6
OUT
CPU_BSEL<2> C21 BSEL2 PWRGOOD D6 21C4 CPU_PWRGD
IN
1% SLP* D7 12A4 FSB_SLPCPU_L
IN
402 NOSTUFF 58C7 CPU_PSI_L
PSI* AE6 IN
R0730
1
0 2
R0722
54.9 2
11B3 11B2 7C6 XDP_TCK 1 402 NOSTUFF
1 1
1%
402 R0712 R0707
51 1K
5% 5%
1/16W 1/16W
MF-LF MF-LF
2 402 2 402
CHANGE THE PULLS RESISTOR VALUE PER NAPA PLATFORM DG REV 0.9
CPU 1 OF 2-FSB
WE THROUGH THE ITP700FLEX CONNECTOR CONNECT TO PDB XDP BUFFER BOARD--ECM*50
A SO THE TDI PULL UP THROUGH 54.9 OHM,TMS PULL UP THROUGH 54.9 OHM
TCK PULL DOWN THROUGH 54.9 OHM(FOLLOW UP XDP DESIGN REFERENCE)
SYNC_MASTER=MASTER

A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 7 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
OMIT
A4 VSS_1 P6
A8 VSS_2
U0700 VSS_82
VSS_83 P21
A11 VSS_3
YONAH VSS_84 P24
=PPVCORE_S0_CPU 8B5 9B8 48A5 48B3 64D6 A14 VSS_4
CPU VSS_85 R2
A16 VSS_5
BGA
OMIT VSS_86 R5
(CPU CORE POWER) A19 VSS_6
(4 OF 4)
VSS_87 R22
A7 VCC_1 VCC_68 AB20
A9 VCC_2
U0700 VCC_69 AB7
A23 VSS_7 VSS_88 R25
A10 VCC_3 YONAH VCC_70 AC7
A26 VSS_8 VSS_89 T1
A12 VCC_4 CPU VCC_71 AC9
B6 VSS_9 VSS_90 T4
BGA B8 VSS_10 VSS_91 T23
D
A13 VCC_5
A15 VCC_6
(3 OF 4)
VCC_72 AC12
VCC_73 AC13
B11 VSS_11 VSS_92 T26 D
B13 VSS_12 VSS_93 U3
A17 VCC_7 VCC_74 AC15
B16 VSS_13 VSS_94 U6
B19 VSS_14 VSS_95 U21
B21 VSS_15 VSS_96 U24
B7 VCC_10 VCC_77 AD7
B24 VSS_16 VSS_97 V2
C5 VSS_17 VSS_98 V5
C8 VSS_18 VSS_99 V22
C11 VSS_19 VSS_100 V25
C14 VSS_20 VSS_101 W1
C16 VSS_21 VSS_102 W4
C19 VSS_22 VSS_103 W23
C2 VSS_23 VSS_104 W26
B20 VCC_18 VCC_85 AE9
C22 VSS_24 VSS_105 Y3
C9 VCC_19 VCC_86 AE10
C25 VSS_25 VSS_106 Y6
D1 VSS_26 VSS_107 Y21
D4 VSS_27 VSS_108 Y24
D8 VSS_28 VSS_109 AA2
D16 VSS_31 VSS_112 AA11
D9 VCC_26 VCC_93 AF9
D19 VSS_32 VSS_113 AA14
D23 VSS_33 VSS_114 AA16
D26 VSS_34 VSS_115 AA19
E3 VSS_35 VSS_116 AA22
E6 VSS_36 VSS_117 AA25
C D18 VCC_32
E7 VCC_33
VCC_99 AF18
VCC_100 AF20
E8 VSS_37
E11 VSS_38
VSS_118 AB1
VSS_119 AB4
C
E14 VSS_39 VSS_120 AB8
E9 VCC_34
E16 VSS_40 VSS_121 AB11
E10 VCC_35 VCCP_1 V6 =PP1V05_S0_CPU 7B5 7B6 7D5 9C8 11B3 11C5 64D6
E19 VSS_41 VSS_122 AB13
E12 VCC_36 VCCP_2 G21
E13 VCC_37 VCCP_3 J6
(CPU IO POWER 1.05V) E21 VSS_42 VSS_123 AB16
E24 VSS_43 VSS_124 AB19
E15 VCC_38 VCCP_4 K6
F5 VSS_44 VSS_125 AB23
E17 VCC_39 VCCP_5 M6
F8 VSS_45 VSS_126 AB26
E18 VCC_40 VCCP_6 J21
F11 VSS_46 VSS_127 AC3
E20 VCC_41 VCCP_7 K21
F7 VCC_42 VCCP_8 M21
F9 VCC_43 VCCP_9 N21
F19 VSS_49 VSS_130 AC11
F10 VCC_44 VCCP_10 N6
F12 VCC_45 VCCP_11 R21
F22 VSS_51 VSS_132 AC16
F14 VCC_46 VCCP_12 R6
F25 VSS_52 VSS_133 AC19
F15 VCC_47 VCCP_13 T21
G4 VSS_53 VSS_134 AC21
F17 VCC_48 VCCP_14 T6
G1 VSS_54 VSS_135 AC24
F18 VCC_49 VCCP_15 V21
G23 VSS_55 VSS_136 AD2
F20 VCC_50 VCCP_16 W21
G26 VSS_56 VSS_137 AD5
AA7 VCC_51
VCCA=1.5 ONLY H3 VSS_57 VSS_138 AD8
AA9 VCC_52
AA10 VCC_53 VCCA B26 =PP1V5_S0_CPU 9D8 64C6 H6 VSS_58 VSS_139 AD11
AA12 VCC_54 (CPU INTERNAL PLL POWER 1.5V) H21 VSS_59 VSS_140 AD13
H24 VSS_60 VSS_141 AD16
AA13 VCC_55 VID0 AD6 CPU_VID<0> OUT 9C3
J2 VSS_61 VSS_142 AD19
AA15 VCC_56 VID1 AF5 CPU_VID<1> OUT 9C3
VID FOR CPU POWER SUPPLY =PPVCORE_S0_CPU 8D7 9B8 48A5 48B3 64D6 J5 VSS_62 VSS_143 AD22
AA17 VCC_57 VID2 AE5 CPU_VID<2> OUT 9C3
IF NO USE, NEED PULL-UP OR J22 VSS_63 VSS_144 AD25
B AA18 VCC_58
AA20 VCC_59
VID3 AF4
VID4 AE3
CPU_VID<3>
CPU_VID<4>
OUT
OUT
9C3
9C3
PULL-DOWN 1
R0802
J25 VSS_64 VSS_145 AE1 B
K1 VSS_65 VSS_146 AE4
AB9 VCC_60 VID5 AF2 CPU_VID<5> OUT 9D3 100
1% K4 VSS_66 VSS_147 AE8
AC10 VCC_61 VID6 AE2 CPU_VID<6> OUT 9D3 1/16W
MF-LF K23 VSS_67 VSS_148 AE11
AB10 VCC_62
2 402 K26 VSS_68 VSS_149 AE14
AB12 VCC_63
L3 VSS_69 VSS_150 AE16
AB14 VCC_64
L6 VSS_70 VSS_151 AE19
AB15 VCC_65 VCCSENSE AF7 CPU_VCCSENSE_P OUT 58A4 58A5
L21 VSS_71 VSS_152 AE23
AB17 VCC_66
L24 VSS_72 VSS_153 AE26
AB18 VCC_67 VSSSENSE AE7 CPU_VCCSENSE_N OUT 58A4 58A5
LAYOUT NOTE: M2 VSS_73 VSS_154 AF3
PROVIDE A TEST POINT (WITH NO STUB) M5 VSS_74 VSS_155 AF6
1 TO CONNECT A DIFFERENCTIAL PROBE M22 VSS_75 VSS_156 AF8
R0803 LAYOUT NOTE:
BETWEEN VCCSENSE AND VSSSENSE AT THE M25 VSS_76 VSS_157 AF11
LAYOUT NOTE: CONNECT R0803 100 CPU_VCCSENSE_P/CPU_VCCSENSE_N USE
1% LOCATION WHERE THE TWO 54.9 OHM N1 VSS_77 VSS_158 AF13
TO TP_VSSSENSE WITH NO 1/16W ZO=27.4 OHM DIFFERNTIAL TRACE ROUTING.
MF-LF RESISTORS TERMINATE THE 55 OHM N4 VSS_78 VSS_159 AF16
STUB. 2 402 TRANSMISSION LINE N23 VSS_79 VSS_160 AF19
N26 VSS_80 VSS_161 AF21
LAYOUT NOTE:
P3 VSS_81 VSS_162 AF24
VCCSENSE AND VSSSENSE LINES
SHOULD BE OF EQUAL LENGTH
CPU 2 OF 2-PWR/GND
A SYNC_MASTER=MASTER

A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 8 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CPU CORE VID<> SETTINGS

D
VCCA DECOUPLING D
(CPU INTERNAL PLL POWER 1.5V)
64C6 8B7 =PP1V5_S0_CPU
C0950 1 1 C0951
0.01uF 10UF
10% 20%
16V 2 6.3V
CERM 2
402
X5R
603 8B7
IN CPU_VID<6> R0921 1
5% 1/16W
2 0
MF-LF402
58C7 58A4 CPU_VID_R<6> OUT
8B7
5% 1/16W
2 0
MF-LF402
8B7
5% 1/16W
2 0
MF-LF402
8B7
5% 1/16W
2 0
MF-LF402
8B7
5% 1/16W
2 0
MF-LF402
8B7
IN
CPU_VID<1> R0926 1
5% 1/16W
2 0
MF-LF402
8B7
5% 1/16W
2 0
MF-LF402
TABLE_ALT_HEAD
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:

PART NUMBER
TABLE_ALT_ITEM
R0921~R0927 FOR CPU VOLTAGE MANUAL SETTING

138S0603 138S0602 ? ALL USE SAMSUNG AND MURATA ONLY
TABLE_ALT_ITEM
138S0606 138S0602 ? ALL USE TAIYO
C C
VCCP CORE DECOUPLING THIS 470UF FOR CPU,GMCH FSB BUS 1.05V
(CPU IO POWER 1.05V)
=PP1V05_S0_CPU
64D6 11C5 11B3 8C7 7D5 7B6 7B5
CRITICAL
PLACE NEAR THE NORTH BRIDGE 1
0.1UF
C0926 1 C0934
0.1UF
1 C0935
0.1UF
1 C0936 1 C0937 1 C0938
0.1UF 0.1UF 0.1UF
1
C0940
470UF
ON BOTTOM SIDE 20% 20% 20% 20% 20% 20% 20%
2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 3 2 2.5V
TANT
402 402 402 402 402 402 D2T
MIN TYP MAX

DUAL CORE VCCHFM 1.1625 1.30
B SV CPU B
VCC (CPU
CORE DECOUPLING
CORE POWER)
VCCLFM TBD TBD
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
=PPVCORE_S0_CPU
64D6 48B3 48A5 8D7 8B5
SINGLE CORE VCCHFM 1.1625 1.30
1 C0923
22UF
C0911
22UF
C0910
22UF
1 C0908
22UF
1 1 1 C0901
22UF
1 C0928
22UF
1 C0900
22UF
C0909
22UF
C0907
22UF
C0929
22UF
1 1 1
SV CPU
PLACE NEAR THE CPU 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% VCCLFM TBD
6.3V
2 CERM-X5R 6.3V
2 CERM-X5R 6.3V
2 CERM-X5R 6.3V
2 CERM-X5R 6.3V
2 CERM-X5R 6.3V
2 CERM-X5R 6.3V
2 CERM-X5R 6.3V
2 CERM-X5R 6.3V
2 CERM-X5R 6.3V
2 CERM-X5R
ON BOTTOM SIDE 805 805 805 805 805 805 805 805 805 805
(10 PCS ON NORTH SIDE CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
DUAL CORE VCCHFM 1.0 1.1625
10 PCS ON SOUTH SIDE) 1 C0924
22UF
1 C0918 1 C0913 1 C0912
22UF 22UF 22UF
1 C0904
22UF
1 C0930
22UF
1 C0902
22UF
1 C0931 1 C0939 1 C0920
22UF 22UF 22UF
LV CPU VCCLFM TBD
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R
805 805 805 805 805 805 805 805 805 805
ULV CPU VCCHFM TBD TBD
IF WE USE LOW ESL CAP,THEN WE CAN USE 20 PCS 22UF CAP VCCLFM TBD UNIT: V
# ALL PROCESSOR DEFAULT VCORE FOR INITIAL POWER UP IS 1.2V
# TWO PROCESSORS AT THE SAME FREQUENCY MAY HAVE DIFFERENT SETTING
WITH THE VID RANGE(VCORE VOLTAGE)!
# REFER TO YONAH PROCESSOR EMTS REV 1.0 CPU DECAPS & VID<>
# VCCHFM: VCORE AT HIGHEST FREQUENCY MODE
A # VCCLFM: VCORE AT LOWEST FREQUENCY MODE
A
(2 PCS ON NORTH SIDE NOSTUFF PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL AGREES TO THE FOLLOWING
1 1 1 1 1
2 PCS ON SOUTH SIDE) C0941 C0942 C0943 C0944 C0946 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
470UF-8MOHM 470UF-8MOHM 470UF-8MOHM 470UF-8MOHM 470UF-8MOHM II NOT TO REPRODUCE OR COPY IT
20% 20% 20% 20% 20%
3 2 2.5V 3 2 2.5V 3 2 2.5V 3 2 2.5V 3 2 2.5V III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
POLY POLY POLY POLY POLY
D2T D2T D2T D2T D2T
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 9 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
CPU ZONE THERMAL SENSOR
64A6 49D3 49B3 =PP3V3_S0_THRM_SNR
C C
LAYOUT NOTE: LAYOUT NOTE:
1 1
ADD GND GUARD TRACE ROUTE CPU_THERMD_P AND
1
C1002 R1005 R1006
0.1UF 10K 10K
FOR CPU_THERMD_P AND CPU_THERMD_N ON SAME 5% 5%
10% 1/16W 1/16W
16V
CPU_THERMD_N LAYER. 2 X5R MF-LF MF-LF
10 MIL TRACE PLACEHOLDER ADT7461A 402 2 402 2 402
10 MIL SPACING
CRITICAL 1
VDD
ALERT*/ 6
R1001 THM2* THRM_ALERT_L
CPU_THERMD_P 1
499
2 THRM_CPU_DX_P 2 U1001 4 THRM_ALERT
OUT
7C6 D+ THM*
1% THRM_CPU_DX_N 3
D- ADT7461
8 SMB_THRM_CLK
1/16W
MSOP
SCLK 27C3
IO
MF-LF
7
402 1
C1001 SDATA 27B3 SMB_THRM_DATA IO
(TO CPU INTERNAL THERMAL DIODE)
0.001uF
10%
R1002 2
50V
CERM
GND
499 402 5
IN
7C6 CPU_THERMD_N 1 2
1%
1/16W
MF-LF
402
PLACE U1001 NEAR THE U1200
B B
CPU MISC1-TEMP SENSOR

A SYNC_MASTER=ENET

A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 10 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
CPU ITP700FLEX DEBUG SUPPORT
C C
64D6 11B3 9C8 8C7 7D5 7B6 7B5 =PP1V05_S0_CPU

ITP
1 CRITICAL
R1101 1R1103 J1102
54.9 54.9 F-ST-5047
1% 1%
1/16W 1/16W SM1
MF-LF MF-LF
2 402 2 402
7C6 7B8
OUT
XDP_TDI 1 2 7C6 7B8 XDP_TMS OUT
ITP
7C6
OUT
XDP_TRST_L 3 4
NC
R1102 11B2 7C6 7A8
OUT XDP_TCK (TCK) 5 6
NC
22.6 2
7C6
IN
XDP_TDO 1 ITP_TDO 7 8
(FBO)
ITP
1%
1/16W
33D3 33D2
(FROM CK410M HOST 133/167MHZ)
IN
CPU_XDP_CLK_N 9 10 XDP_TCK OUT
MF-LF 33D3 33D2
IN CPU_XDP_CLK_P 11 12 7C6 XDP_BPM_L<5> IO
R1100 402
13 14
12C4 7D6 FSB_CPURST_L 1

22.6 2 ITPRESET_L 15 16 XDP_BPM_L<4>
7C6
IN IO
1%
1/16W
7C6
IO
XDP_BPM_L<3> 17 18
MF-LF
402
19 20 7C6 XDP_BPM_L<2> IO
21 22
64A3 26C5 23D1 =PP3V3_S5_SB_PM 9C8 8C7 7D5 7B6 7B5=PP1V05_S0_CPU
64D6 11C5
25 26
29 30
1 ITP
R1104 C1100
B 5%
240
1
10%
0.1UF B
1/16W 516S0416
MF-LF 2 16V
X5R
2 402 402
OUT
26C6 7C6 XDP_DBRESET_L
(AND WITH RESET BUTTON) (DBA#) INDICATE THAT ITP IS USING TAP I/F, NC IN 945GM CHIPSET SYSTEM.
(DEBUG PORT ACTIVE)
(DBR#) TO ICH7M SYS_RST*, AND WITH SYSTEM RESET LOGIC
(DEBUG PORT RESET)
1
R1106
680
ITP TCK SIGNAL LAYOUT NOTE: 5%
1/16W
ROUTE THE TCK SIGNAL FROM ITP700FLEX CONNECTOR’S TCK PIN TO CPU’S MF-LF
TCK PIN AND THEN FORK BACK FROM CPU TCK PIN AND ROUTE BACK TO ITP700FLEX 2 402
CONNECTOR’S FBO PIN.
CPU ITP700FLEX DEBUG

SYNC_MASTER=MASTER SYNC_DATE=5/23/05
A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 11 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
7C4
IO
FSB_D_L<0> F1 HD0* HA3* H9 7D8 FSB_A_L<3> IO
D
7C4
7C4
IO
IO
FSB_D_L<1>
FSB_D_L<2>
J1
H1
HD1*
HD2*
HA4*
HA5*
C9
E11
7D8 FSB_A_L<4>
7D8 FSB_A_L<5>
IO
IO
D
7C4
IO
FSB_D_L<3> J6 HD3* LEMENU HA6* G11 7D8 FSB_A_L<6>
IO
7C4
IO
FSB_D_L<4> H3 HD4* HA7* F11 7D8 FSB_A_L<7>
IO
7C4 FSB_D_L<5> K2
U1200 G12 7D8 FSB_A_L<8>
IO HD5* HA8* IO
7C4
IO
FSB_D_L<6> G1 HD6* 945GM HA9* F9 7D8 FSB_A_L<9>
IO
7C4 FSB_D_L<7> G2 HD7* HA10* H11 7D8 FSB_A_L<10>
IO NB IO
7C4
IO
FSB_D_L<8> K9 HD8* HA11* J12 7D8 FSB_A_L<11>
IO
BGA
7C4 IO FSB_D_L<9> K1 HD9* HA12* G14 7D8 FSB_A_L<12> IO
(1 OF 10)
7C4
IO
FSB_D_L<10> K7 HD10* HA13* D9 7D8 FSB_A_L<13>
IO
7C4
IO FSB_D_L<11> J8 HD11* HA14* J14 7D8 FSB_A_L<14>
IO
7C4
IO FSB_D_L<12> H4 HD12* HA15* H13 7D8 FSB_A_L<15>
IO
7C4
IO FSB_D_L<13> J3 HD13* HA16* J15 7D8 FSB_A_L<16>
IO
7C4
IO
FSB_D_L<14> K11 HD14* HA17* F14 7C8 FSB_A_L<17>
IO
7C4
IO FSB_D_L<15> G4 HD15* HA18* D12 7C8 FSB_A_L<18>
IO
7C4
IO FSB_D_L<16> T10 HD16* HA19* A11 7C8 FSB_A_L<19>
IO
7C4
IO
FSB_D_L<17> W11 HD17* HA20* C11 7C8 FSB_A_L<20>
IO
7B4
IO
7B4
IO FSB_D_L<19> U7 HD19* HA22* A13 7C8 FSB_A_L<22>
IO
7B4 IO FSB_D_L<20> U9 HD20* HA23* E13 7C8 FSB_A_L<23>
IO
7B4
IO FSB_D_L<21> U11 HD21* HA24* G13 7C8 FSB_A_L<24>
IO
7B4
IO FSB_D_L<22> T11 HD22* HA25* F12 7C8 FSB_A_L<25>
IO
7B4
IO FSB_D_L<23> W9 HD23* HA26* B12 7C8 FSB_A_L<26>
IO
7B4
IO FSB_D_L<24> T1 HD24* HA27* B14 7C8 FSB_A_L<27>
IO
7B4
IO FSB_D_L<25> T8 HD25* HA28* C12 7C8 FSB_A_L<28>
IO
7B4
IO
7B4
IO FSB_D_L<27> W7 HD27* HA30* C14 7C8 FSB_A_L<30>
IO
=PP1V05_S0_FSB_NB 12A7 12B7 19D7 33B8 33C7 33C8 64D6
C 7B4
7B4
IO FSB_D_L<28>
FSB_D_L<29>
U5 HD28* HA31* D14 7C8 FSB_A_L<31>
IO
1
C
IO T9 HD29* R1210
7B4
IO FSB_D_L<30> W6 HD30* 100
HADS* E8 7D6 FSB_ADS_L IO 1%
7B4 IO FSB_D_L<31> T5 HD31* 1/16W
HADSTB0* B9 7D8 FSB_ADSTB_L<0> IO MF-LF
7C3 FSB_D_L<32> AB7 HD32*
HOST
IO 402
C13 FSB_ADSTB_L<1> 2
7C3 FSB_D_L<33> AA9
HADSTB1* 7C8 IO
IO HD33* J13 NB_FSB_VREF
7C3 FSB_D_L<34> HAVREF
IO W4 HD34*
HBNR* C6 7D6 FSB_BNR_L IO
7C3
IO FSB_D_L<35> W3 HD35*
HBPRI* F6 7D6 FSB_BPRI_L OUT
1
R1211
7C3
IO FSB_D_L<36> Y3 HD36*
C7 7D6 FSB_BREQ0_L
C1211 1
200
7C3 FSB_D_L<37> HBREQ0* IO 0.1uF
IO Y7 HD37* 1%
B7 FSB_CPURST_L 10%
7C3 FSB_D_L<38> W5
HCPURST* OUT 16V 1/16W
IO HD38* A7 7D6 FSB_DBSY_L X5R 2 MF-LF
7C3 FSB_D_L<39> Y10

HDBSY* IO 402 2
402
IO HD39* C3 7D6 FSB_DEFER_L
7C3 FSB_D_L<40> AB8
HDEFER* OUT
IO HD40* J9 7B3 FSB_DPWR_L
7C3 FSB_D_L<41> W2
HDPWR* IO
IO HD41* H8 7D6 FSB_DRDY_L
FSB_D_L<42> HDRDY* IO
7C3 IO AA4 HD42*
HDVREF K13
7C3
IO FSB_D_L<43> AA7 HD43*
7C3
HDINV0* J7 7C4 FSB_DINV_L<0> IO
7C3
HDINV1* W8 7B4 FSB_DINV_L<1> IO
7C3
IO
FSB_D_L<46> AA10 HD46*
HDINV2* U3 7C3 FSB_DINV_L<2> IO
7C3
IO FSB_D_L<47> Y8 HD47*
HDINV3* AB10 7B3 FSB_DINV_L<3>
IO
7C3
64D6 33C8 33C7 33B8 19D7 12C2 12A7 =PP1V05_S0_FSB_NB 7C3
IO FSB_D_L<49> AB4 HD49* HDSTBN0* K4 7C4 FSB_DSTBN_L<0> IO
7B3
IO
FSB_D_L<50> AC9 HD50* HDSTBN1* T7 7B4 FSB_DSTBN_L<1>
IO
7B3
IO
FSB_D_L<51> AB11 HD51* HDSTBN2* Y5 7C3 FSB_DSTBN_L<2>
IO
R1220 1 1
R1225 7B3
IO FSB_D_L<52> AC11 HD52* HDSTBN3* AC4 7B3 FSB_DSTBN_L<3>
IO
54.9 221 7B3 IO FSB_D_L<53> AB3 HD53*
1% 1% HDSTBP0* K3 7C4 FSB_DSTBP_L<0>
B 1/16W
MF-LF
402
1/16W
MF-LF
402
7B3
7B3
IO
IO
FSB_D_L<54>
FSB_D_L<55>
AC2
AD1
HD54*
HD55*
HDSTBP1* T6 7B4 FSB_DSTBP_L<1>
IO
IO B
2 2 AA5 7C3 FSB_DSTBP_L<2>
7B3 FSB_D_L<56> AD9
HDSTBP2* IO
IO HD56* 7B3 FSB_DSTBP_L<3>
HDTSBP3* AC5 IO
7B3
IO
FSB_D_L<57> AC1 HD57*
7B3
IO FSB_D_L<58> AD7 HD58*
HHIT* D3 7D6 FSB_HIT_L IO
7B3
IO FSB_D_L<59> AC6 HD59*
HHITM* D4 7D6 FSB_HITM_L
FSB_D_L<60> IO
7B3
IO AB5 HD60*
1 1 7D6 FSB_LOCK_L
R1221 R1226 1
C1226 7B3
IO FSB_D_L<61> AD10 HD61*
HLOCK* B3 IO
24.9 100 0.1uF
1% 1%
10%
7B3
IO
FSB_D_L<62> AD4 HD62*
1/16W 1/16W 16V HREQ0* D8 7D8 FSB_REQ_L<0> IO
MF-LF MF-LF 2 X5R
7B3
IO
FSB_D_L<63> AC8 HD63*
402 402 HREQ1* G8 7D8 FSB_REQ_L<1>
2 2 402 IO
HREQ2* B8 7D8 FSB_REQ_L<2>

IO
NB_FSB_XRCOMP E1 HXRCOMP
HREQ3* F8 7D8 FSB_REQ_L<3> IO
NB_FSB_XSCOMP E2 HXSCOMP
HREQ4* A8 7D8 FSB_REQ_L<4>
IO
NB_FSB_XSWING E4 HXSWING
HRS0* B4 7D6 FSB_RS_L<0> OUT

NB_FSB_YRCOMP Y1 HYRCOMP
E6 7D6 FSB_RS_L<1>
=PP1V05_S0_FSB_NB NB_FSB_YSCOMP HRS1* OUT
64D6 33C8 33C7 33B8 19D7 12C2 12B7 U1 HYSCOMP
HRS2* D6 7D6 FSB_RS_L<2>
NB_FSB_YSWING OUT
W1 HYSWING
33D3 33D2
IN
FSB_CLK_NB_P AG2 HCLKIN HSLPCPU* E3 7A3 FSB_SLPCPU_L OUT
1 1
R1230 R1235 33D3 33C2 FSB_CLK_NB_N AG1 HCLKIN* HTRDY* E7 7D6 FSB_TRDY_L
IN OUT
54.9 221
1% 1%
1/16W 1/16W
MF-LF MF-LF
402 402
2 2
NB CPU Interface
A SYNC_MASTER=NB

A
1 1
R1231 R1236 1
C1236
24.9 100 0.1uF THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1% 1%
10%
1/16W 1/16W 16V AGREES TO THE FOLLOWING
MF-LF MF-LF 2 X5R
402
2 2
402 402 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 12 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
=PP1V5_S0_NB_PCIE 19D7 64C6
1
R1310
LEMENU 24.9
1%
1/16W
U1200 MF-LF
402
2
LVDS Disable 945GM
67C6 LVDS_BKLTCTL D32 L_BKLTCTL EXP_A_COMPI D40 PEG_COMP
D Can leave all signals NC if LVDS is not implemented 67D7

OUT
OUT LVDS_BKLTEN J30 L_BKLTEN

NB
BGA EXP_A_COMPO D38 SDVO Alternate Function D
Tie VCC_TXLVDS and VCCA_LVDS to GND. If SDVO is used 67A7
OUT
LVDS_CLKCTLA H30 L_CLKCTLA (3 OF 10)
EXP_A_RXN0 F34 6D6 PEG_D2R_N<0> IN SDVO_TVCLKIN#
VCCD_LVDS must remain powered with proper decoupling. 67A7
OUT
LVDS_CLKCTLB H29 L_CLKCTLB
EXP_A_RXN1 G38 68B6 PEG_D2R_N<1> SDVO_INT#
IN
Otherwise, tie VCCD_LVDS to GND also. 67B6
IO LVDS_DDC_CLK G26 L_DDC_CLK
EXP_A_RXN2 H34 6D6 PEG_D2R_N<2> SDVO_FLDSTALL#
LVDS_DDC_DATA IN
67B6
IO G25 L_DDC_DATA
EXP_A_RXN3 J38 6C6 PEG_D2R_N<3>
LVDS_IBG IN
67A6
IO B38 L_IBG
EXP_A_RXN4 L34 6C6 PEG_D2R_N<4>
IN
TP_LVDS_VBG C35 L_VBG
EXP_A_RXN5 M38 6C6 PEG_D2R_N<5>
IN
67B7
OUT
LVDS_VDDEN F32 L_VDDEN
EXP_A_RXN6 N34 6C6 PEG_D2R_N<6> IN
67A7
IN
LVDS_VREFH C33 L_VREFH
EXP_A_RXN7 P38 6C6 PEG_D2R_N<7>
IN
67A7
IN LVDS_VREFL C32 L_VREFL
EXP_A_RXN8 R34 6C6 PEG_D2R_N<8>
IN
67B2
OUT
LVDS_A_CLK_N A33 LA_CLK* EXP_A_RXN9 T38 6C6 PEG_D2R_N<9>
IN
67B2
OUT
LVDS_A_CLK_P A32 LA_CLK EXP_A_RXN10 V34 6C6 PEG_D2R_N<10>
IN
6D6
OUT LVDS_B_CLK_N E27 LB_CLK* EXP_A_RXN11 W38 6C6 PEG_D2R_N<11>
IN
LVDS
6D6
OUT
LVDS_B_CLK_P E26 LB_CLK EXP_A_RXN12 Y34 6C6 PEG_D2R_N<12>
IN
EXP_A_RXN13 AA38 6C6 PEG_D2R_N<13>
IN
67B2
OUT
LVDS_A_DATA_N<0> C37 LA_DATA0*
EXP_A_RXN14 AB34 6C6 PEG_D2R_N<14>
IN
67B2
OUT LVDS_A_DATA_N<1> B35 LA_DATA1*
EXP_A_RXN15 AC38 6C6 PEG_D2R_N<15>
IN
67B2
OUT LVDS_A_DATA_N<2> A37 LA_DATA2*
EXP_A_RXP0 D34 6C6 PEG_D2R_P<0> IN SDVO_TVCLKIN
67B2
OUT LVDS_A_DATA_P<0> B37 LA_DATA0
EXP_A_RXP1 F38 68B6 PEG_D2R_P<1> SDVO_INT
LVDS_A_DATA_P<1> IN
67B2
OUT B34 LA_DATA1
EXP_A_RXP2 G34 6C6 PEG_D2R_P<2> SDVO_FLDSTALL
IN
67B2
OUT
LVDS_A_DATA_P<2> A36 LA_DATA2
EXP_A_RXP3 H38 6C6 PEG_D2R_P<3>
IN
6D6
OUT
LVDS_B_DATA_N<0> G30 LB_DATA0* EXP_A_RXP4 J34 6C6 PEG_D2R_P<4>
IN
LVDS_B_DATA_N<1> 6C6 PEG_D2R_P<5>
PCI-EXPRESS GRAPHICS
6D6
OUT D30 LB_DATA1* EXP_A_RXP5 L38 IN
6D6
OUT
LVDS_B_DATA_N<2> F29 LB_DATA2* EXP_A_RXP6 M34 6C6 PEG_D2R_P<6>
IN
EXP_A_RXP7 N38 6C6 PEG_D2R_P<7>
LVDS_B_DATA_P<0> IN
6D6
OUT F30 LB_DATA0
C 6D6
6D6
OUT
LVDS_B_DATA_P<1>
LVDS_B_DATA_P<2>
D29
F28
LB_DATA1
LB_DATA2
EXP_A_RXP8
EXP_A_RXP9
P34
R38
6C6 PEG_D2R_P<8>
6C6 PEG_D2R_P<9>
IN
IN
C
OUT 6C6 PEG_D2R_P<10>
EXP_A_RXP10 T34 IN
EXP_A_RXP11 V38 6C6 PEG_D2R_P<11>
IN
TV-Out Signal Usage:
69B8
OUT TV_DACA_OUT A16 TV_DACA_OUT EXP_A_RXP12 W34 6C6 PEG_D2R_P<12>
IN
Composite: DACA only 69A8
OUT TV_DACB_OUT C18 TV_DACB_OUT EXP_A_RXP13 Y38 6C6 PEG_D2R_P<13> IN
S-Video: DACB & DACC only 69A8
OUT
TV_DACC_OUT A19 TV_DACC_OUT EXP_A_RXP14 AA34 6B6 PEG_D2R_P<14>
IN
TV
Component: DACA, DACB & DACC EXP_A_RXP15 AB38 6B6 PEG_D2R_P<15>
IN
69C8
OUT
TV_IREF J20 TV_IREF
Unused DAC outputs must remain powered, but can omit 69B8
OUT
TV_IRTNA B16 TV_IRTNA EXP_A_TXN0 F36 68C6 PEG_R2D_C_N<0> OUT SDVOB_RED#
filtering components. Unused DAC outputs should 69A8
OUT
TV_IRTNB B18 TV_IRTNB EXP_A_TXN1 G40 68C6 PEG_R2D_C_N<1>
OUT SDVOB_GREEN#
connect to GND through 75-ohm resistors. 69A8
OUT TV_IRTNC B19 TV_IRTNC EXP_A_TXN2 H36 68B6 PEG_R2D_C_N<2>
OUT SDVOB_BLUE#
EXP_A_TXN3 J40 68B6 PEG_R2D_C_N<3> SDVOB_CLKN
OUT
TV-Out Disable
EXP_A_TXN4 L36 6B6 PEG_R2D_C_N<4> SDVOC_RED#
OUT
69B8
OUT CRT_BLUE E23 CRT_BLUE
Tie DACx_OUT, IRTNx, and IREF to 1.5V power rail. EXP_A_TXN5 M40 6B6 PEG_R2D_C_N<5> SDVOC_GREEN#
OUT
69B8
OUT
CRT_BLUE_L D23 CRT_BLUE*
Tie VCCD_TVDAC, VCCD_QTVDAC, VCCA_TVDACx, and EXP_A_TXN6 N36 6B6 PEG_R2D_C_N<6> SDVOC_BLUE#
CRT_GREEN OUT
69A8
OUT C22 CRT_GREEN
VCCA_TVBG to 1.5V power rail. Tie VSSA_TVBG to GND. EXP_A_TXN7 P40 6B6 PEG_R2D_C_N<7> SDVOC_CLKN
CRT_GREEN_L OUT
69A8
OUT B22 CRT_GREEN*
EXP_A_TXN8 6B6 PEG_R2D_C_N<8>
VGA
R36 OUT
69A8
OUT
CRT_RED A21 CRT_RED
CRT Disable EXP_A_TXN9 T40 6B6 PEG_R2D_C_N<9>
OUT
69A8
OUT
CRT_RED_L B21 CRT_RED*
EXP_A_TXN10 V36 6B6 PEG_R2D_C_N<10>
OUT
Tie R/R#/G/G#/B/B# and IREF to VCC Core rail, tie
69D7
IO
CRT_DDC_CLK C26 CRT_DDC_CLK EXP_A_TXN11 W40 6B6 PEG_R2D_C_N<11>
OUT
HSYNC and VSYNC to GND. Tie VCCA_CRTDAC to VCC Core
69D7
IO
CRT_DDC_DATA C25 CRT_DDC_DATA EXP_A_TXN12 Y36 6B6 PEG_R2D_C_N<12>
OUT
rail, and tie VSSA_CRTDAC and VCC_SYNC to GND.
69C3
OUT CRT_HSYNC_R G23 HSYNC EXP_A_TXN13 AA40 6B6 PEG_R2D_C_N<13>
OUT
69C8
OUT
CRT_IREF J22 CRT_IREF EXP_A_TXN14 AB36 6B6 PEG_R2D_C_N<14>
OUT
69C3
OUT
CRT_VSYNC_R H23 CRT_VSYNC EXP_A_TXN15 AC40 6B6 PEG_R2D_C_N<15>
OUT
EXP_A_TXP0 D36 68C6 PEG_R2D_C_P<0> OUT SDVOB_RED

EXP_A_TXP1 F40 68C6 PEG_R2D_C_P<1> SDVOB_GREEN
B EXP_A_TXP2 G36 68B6 PEG_R2D_C_P<2>
OUT
OUT SDVOB_BLUE B
EXP_A_TXP3 H40 68B6 PEG_R2D_C_P<3> SDVOB_CLKP
OUT
EXP_A_TXP4 J36 6B6 PEG_R2D_C_P<4> SDVOC_RED
OUT
EXP_A_TXP5 L40 6B6 PEG_R2D_C_P<5> SDVOC_GREEN
OUT
EXP_A_TXP6 M36 6B6 PEG_R2D_C_P<6> SDVOC_BLUE
OUT
EXP_A_TXP7 N40 6B6 PEG_R2D_C_P<7> SDVOC_CLKP
OUT
EXP_A_TXP8 P36 6B6 PEG_R2D_C_P<8>
OUT
EXP_A_TXP9 R40 6B6 PEG_R2D_C_P<9>
OUT
EXP_A_TXP10 T36 6B6 PEG_R2D_C_P<10>
OUT
EXP_A_TXP11 V40 6B6 PEG_R2D_C_P<11>
OUT
EXP_A_TXP12 W36 6B6 PEG_R2D_C_P<12>
OUT
EXP_A_TXP13 Y40 6B6 PEG_R2D_C_P<13>
OUT
EXP_A_TXP14 AA36 6B6 PEG_R2D_C_P<14>
OUT
EXP_A_TXP15 AB40 6B6 PEG_R2D_C_P<15>
OUT
NB PEG / Video Interfaces

A SYNC_MASTER=NB

A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 13 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
64A6 20B4 20A4 19C7 14C7 =PP3V3_S0_NB
R1440 1 1
R1441
10K 10K
5% 5% LEMENU
1/16W 1/16W
D MF-LF
402
2 2
MF-LF
402 U1200 D
945GM
(D_PLLMON1#) NC T32 RSVD1 SM_CK0 AY35 28D4 MEM_CLK_P<0>
NB OUT
(D_PLLMON1) NC R32 RSVD2 SM_CK1 AR1 28A4 MEM_CLK_P<1>
BGA OUT
(H_EDRDY#) NC F3 RSVD3 (2 OF 10) SM_CK2 AW7 29A4 MEM_CLK_P<2>
OUT
(H_PCREQ#) NC F7 RSVD4 SM_CK3 AW40 29D4 MEM_CLK_P<3>
OUT
(H_PLLMON1#) NC AG11 RSVD5
SM_CK0* AW35 28D4 MEM_CLK_N<0> OUT
(H_PLLMON1) NC AF11 RSVD6
SM_CK1* AT1 28A4 MEM_CLK_N<1>
OUT
(H_PROCHOT#) TP_NB_XOR_FSB2_H7 H7 RSVD7
RSVD
SM_CK2* AY7 29A4 MEM_CLK_N<2>
TP_NB_TESTIN_L OUT
(TESTIN#) J19 RSVD8
SM_CK3* AY40 29D4 MEM_CLK_N<3>
OUT
(TV_DCONSEL0) NB_TV_DCONSEL0 K30 RSVD9
30D6
(TV_DCONSEL1) NB_TV_DCONSEL1 J29 RSVD10 SM_CKE0 AU20 28C6 MEM_CKE<0> OUT
30D6
(VSS_MCHDETECT) NC A41 RSVD11 SM_CKE1 AT20 28C4 MEM_CKE<1> OUT
30D6
DDR MUXING
(LA_DATAN3) TP_NB_XOR_LVDS_A35 A35 RSVD12 SM_CKE2 BA29 29C6 MEM_CKE<2>
OUT
30D6
(LA_DATAP3) TP_NB_XOR_LVDS_A34 A34 RSVD13 SM_CKE3 AY29 29C4 MEM_CKE<3>
OUT
(LB_DATAN3) TP_NB_XOR_LVDS_D28 D28 RSVD14 30D6
SM_CS0* AW13 28B4 MEM_CS_L<0> OUT
(LB_DATAP3) TP_NB_XOR_LVDS_D27 D27 RSVD15 30D6
SM_CS1* AW12 28B6 MEM_CS_L<1>
OUT
30D6
33C7
IN NB_BSEL<0> K16 CFG0 SM_CS2* AY21 29B4 MEM_CS_L<2>
OUT
30D6
33B7 IN NB_BSEL<1> K18 CFG1 SM_CS3* AW21 29B6 MEM_CS_L<3>
OUT
33B7
IN
NB_BSEL<2> J18 CFG2
SMOCDCOMP0 AL20 NC
6D4
IN
NB_CFG<3> F18 CFG3 IPU =PP1V8_S3_MEM_NB 16B6 19D7 28D2 29D2 61C2 64C6
SMOCDCOMP1 AF10 NC
6D4
IN
NB_CFG<4> E15 CFG4 IPU
30D6 1
20C7
IN
NB_CFG<5> F15 CFG5 IPU SM_ODT0 BA13 28B4 MEM_ODT<0> OUT R1410
30D6
6D4
IN
NB_CFG<6> E18 CFG6 IPU SM_ODT1 BA12 28B6 MEM_ODT<1> OUT 80.6
30D6 1%
20C7
IN
NB_CFG<7> D19 CFG7 IPU SM_ODT2 AY20 29B4 MEM_ODT<2> OUT 1/16W
CFG
30D6 MF-LF
6D4
IN
NB_CFG<8> D16 CFG8 IPU SM_ODT3 AU21 29B6 MEM_ODT<3>
OUT 402
C 20B7
6D4
IN
NB_CFG<9>
NB_CFG<10>
G16
E16
CFG9
CFG10
IPU
IPU
SMRCOMP* AV9 MEM_RCOMP_L
2
C
IN
SMRCOMP AT9 MEM_RCOMP
6D4
IN NB_CFG<11> D15 CFG11 IPU
6D4 IN NB_CFG<12> G15 CFG12 IPU SMVREF0 AK1 19C7 MEM_VREF_NB_0 IN
6D4
IN
NB_CFG<13> K15 CFG13 IPU SMVREF1 AK41 19C6 MEM_VREF_NB_1 IN
64A6 20B4 20A4 19C7 14D6 =PP3V3_S0_NB 6D4
IN NB_CFG<14> C15 CFG14 IPU 33C4
G_CLKIN* AF33 33B2 NB_CLK100M_GCLKIN_N IN
6D4
IN NB_CFG<15> H16 CFG15 IPU 33C4
NB_CLK100M_GCLKIN_P
C1415 1 1
C1416 1
R1411
G_CLKIN AG33 33C2
IN 0.1uF 0.1uF
NOSTUFF1 NB_CFG<16> CFG16 IPU 80.6
CLK
20C5 G18 33C2
IN
R1421 R1420 1 6D4 NB_CFG<17> H15 CFG17 IPU
D_REFCLKIN* A27 33B3
33C2
NB_CLK_DREFCLKIN_N IN
20%
10V
2 2
20%
10V 1%
1/16W
IN CERM CERM
10K 10K D_REFCLKIN A26 33B3 NB_CLK_DREFCLKIN_P MF-LF
IN 402 402
5% 5% 20B5
IN NB_CFG<18> J25 CFG18 IPD 33C2 2 402
1/16W 1/16W D_REFSSCLKIN* C40 33A4 NB_CLK_DREFSSCLKIN_N
IN
MF-LF MF-LF 20B5
IN NB_CFG<19> K27 CFG19 IPD 33C2
402 2 402 2 D_REFSSCLKIN D41 33A3 NB_CLK_DREFSSCLKIN_P
IN
20A5
IN
NB_CFG<20> J26 CFG20 IPD
DMI_RXN0 AE35 22D2 DMI_S2N_N<0> IN
45B8 6B2
IN PM_EXTTS_L<0> 23C5
OUT PM_BMBUSY_L G28 PM_BM_BUSY*
DMI_RXN1 AF39 22D2 DMI_S2N_N<1>
R1422 F25 PM_EXTTS0*
IN
0 DMI_RXN2 AG35 22D2 DMI_S2N_N<2> IN
PM
58D8 23C3
IN
PM_DPRSLPVR 1 2 PM_DPRSLPVR_R H26 PM_EXTTS1*
DMI_RXN3 AH39 22D2 DMI_S2N_N<3>
IN
5% 46B3 21C2 7C6
OUT
PM_THRMTRIP_L G6 PW_THRMTRIP*
1/16W
R1430 MF-LF 58C7 26B5
IN
VR_PWRGOOD_DELAY AH33 PWROK DMI_RXP0 AC35 22D2 DMI_S2N_P<0> IN
100 402
26C1
IN
NB_RST_IN_L 1 2 NB_RST_IN_L_R AH34 RSTIN* DMI_RXP1 AE39 22D2 DMI_S2N_P<1> IN
5% DMI_RXP2 AF35 22D2 DMI_S2N_P<2>
IN
1/16W 68A6 SDVO_CTRLCLK H28 SDVO_CTRLCLK
MISC
IO
DMI_RXP3 22D2 DMI_S2N_P<3>
DMI
MF-LF AG39 IN
402 68A6
IO
SDVO_CTRLDATA H27 SDVO_CTRLDATA
22A6
OUT NB_SB_SYNC_L K28 ICH_SYNC* DMI_TXN0 AE37 22D2 DMI_N2S_N<0> OUT
32B4
OUT
CLK_NB_OE_L H32 CLK_REQ* DMI_TXN1 AF41 22D2 DMI_N2S_N<1>
OUT
DMI_TXN2 AG37 22D2 DMI_N2S_N<2>
OUT
NC D1 NC0
DMI_TXN3 AH41 22D2 DMI_N2S_N<3>
OUT
NC C41 NC1
NC C1 NC2 DMI_TXP0 AC37 22D2 DMI_N2S_P<0>
B NC BA41 NC3 DMI_TXP1 AE41 22D2 DMI_N2S_P<1>
OUT
OUT
B
NC BA40 NC4 DMI_TXP2 AF37 22D2 DMI_N2S_P<2>
OUT
NC BA39 NC5 DMI_TXP3 AG41 22D2 DMI_N2S_P<3>
OUT
NC BA3 NC6
NC BA2 NC7
NC BA1 NC8
NC
NC
B41 NC9
NC B2 NC10
NC AY41 NC11
NC AY1 NC12
NC AW41 NC13
NC AW1 NC14
NC A40 NC15
NC A4 NC16
NC A39 NC17
NC A3 NC18
NB Misc Interfaces
A SYNC_MASTER=NB

A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 14 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D LEMENU LEMENU
D
U1200 U1200
30C6 30A6
28D4
IO MEM_A_DQ<0> AJ35 SA_DQ0 945GM SA_BS0 AU12 28B6 MEM_A_BS<0> OUT
29D4
IO MEM_B_DQ<0> AK39 SB_DQ0 945GM SB_BS0 AT24 29B6 MEM_B_BS<0> OUT
30C6 30A6
28D4
IO
MEM_A_DQ<1> AJ34 SA_DQ1 NB SA_BS1 AV14 28B4 MEM_A_BS<1> OUT
29D6
IO
MEM_B_DQ<1> AJ37 SB_DQ1 NB SB_BS1 AV23 29B4 MEM_B_BS<1> OUT
30C6 30A6
28D6
IO MEM_A_DQ<2> AM31 SA_DQ2 BGA SA_BS2 BA20 28C6 MEM_A_BS<2> 29D6
IO MEM_B_DQ<2> AP39 SB_DQ2 BGA SB_BS2 AY28 29C6 MEM_B_BS<2>
OUT OUT
28D6 MEM_A_DQ<3> AM33 SA_DQ3
(4 OF 10) 29D6 MEM_B_DQ<3> AR41 SB_DQ3
(5 OF 10)
IO 30B6 IO 30A6
SA_CAS* AY13 28B6 MEM_A_CAS_L OUT SB_CAS* AR24 29B6 MEM_B_CAS_L OUT
28D4
IO MEM_A_DQ<4> AJ36 SA_DQ4 29D4
IO MEM_B_DQ<4> AJ38 SB_DQ4
SA_DM0 AJ33 28D4 MEM_A_DM<0> SB_DM0 AK36 29D4 MEM_B_DM<0>
OUT OUT
28D4
IO MEM_A_DQ<5> AK35 SA_DQ5 29D6
IO MEM_B_DQ<5> AK38 SB_DQ5
SA_DM1 AM35 28D4 MEM_A_DM<1> SB_DM1 AR38 29D4 MEM_B_DM<1>
OUT OUT
28D6
IO MEM_A_DQ<6> AJ32 SA_DQ6 29D4
IO MEM_B_DQ<6> AN41 SB_DQ6
SA_DM2 AL26 28C6 MEM_A_DM<2> SB_DM2 AT36 29C4 MEM_B_DM<2>
MEM_A_DQ<7> OUT MEM_B_DQ<7> OUT
28D6
IO AH31 SA_DQ7 29D4
IO AP41 SB_DQ7
SA_DM3 AN22 28C4 MEM_A_DM<3> SB_DM3 BA31 29C6 MEM_B_DM<3>
OUT OUT
28D6
IO MEM_A_DQ<8> AN35 SA_DQ8 29D6
IO MEM_B_DQ<8> AT40 SB_DQ8
SA_DM4 AM14 28B4 MEM_A_DM<4> SB_DM4 AL17 29A4 MEM_B_DM<4>
28D6
IO AP33 SA_DQ9 29D4
IO AV41 SB_DQ9
SA_DM5 AL9 28B6 MEM_A_DM<5> SB_DM5 AH8 29A6 MEM_B_DM<5>
28D6
IO AR31 SA_DQ10 29D6
IO AU38 SB_DQ10
SA_DM6 AR3 28A6 MEM_A_DM<6> SB_DM6 BA5 29A6 MEM_B_DM<6>
OUT OUT
28D4
IO MEM_A_DQ<11> AP31 SA_DQ11 29D4
IO MEM_B_DQ<11> AV38 SB_DQ11
SA_DM7 AH4 28A4 MEM_A_DM<7> SB_DM7 AN4 29B4 MEM_B_DM<7>
OUT OUT
28D4
IO
MEM_A_DQ<12> AN38 SA_DQ12 29D6
IO
MEM_B_DQ<12> AP38 SB_DQ12
28D6
IO MEM_A_DQ<13> AM36 SA_DQ13 29D6
IO MEM_B_DQ<13> AR40 SB_DQ13
SA_DQS0 AK33 28D6 MEM_A_DQS_P<0> IO SB_DQS0 AM39 29D6 MEM_B_DQS_P<0> IO
28D4
IO MEM_A_DQ<14> AM34 SA_DQ14 29D4
IO MEM_B_DQ<14> AW38 SB_DQ14
SA_DQS1 AT33 28D6 MEM_A_DQS_P<1> SB_DQS1 AT39 29D6 MEM_B_DQS_P<1>
IO IO
28D4
IO MEM_A_DQ<15> AN33 SA_DQ15 29D4
IO MEM_B_DQ<15> AY38 SB_DQ15
SA_DQS2 AN28 28C4 MEM_A_DQS_P<2> SB_DQS2 AU35 29C6 MEM_B_DQS_P<2>
IO IO
28C4
IO MEM_A_DQ<16> AK26 SA_DQ16 29C4
IO MEM_B_DQ<16> BA38 SB_DQ16
SA_DQS3 AM22 28C6 MEM_A_DQS_P<3> SB_DQS3 AR29 29C4 MEM_B_DQS_P<3>
IO IO
28C6
IO MEM_A_DQ<17> AL27 SA_DQ17 29C6
IO MEM_B_DQ<17> AV36 SB_DQ17
SA_DQS4 AN12 28B6 MEM_A_DQS_P<4> SB_DQS4 AR16 29A6 MEM_B_DQS_P<4>
IO IO
MEM_A_DQ<18> MEM_B_DQ<18>
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY B

28C4
IO AM26 SA_DQ18 29C6
IO AR36 SB_DQ18
SA_DQS5 AN8 28B4 MEM_A_DQS_P<5> SB_DQS5 AR10 29A4 MEM_B_DQS_P<5>
IO IO
28C6
IO MEM_A_DQ<19> AN24 SA_DQ19 29C4
IO MEM_B_DQ<19> AP36 SB_DQ19
SA_DQS6 AP3 28A4 MEM_A_DQS_P<6> SB_DQS6 AR7 29A4 MEM_B_DQS_P<6>
IO IO
28C6
IO
MEM_A_DQ<20> AK28 SA_DQ20 29C6
IO
MEM_B_DQ<20> BA36 SB_DQ20
SA_DQS7 AG5 28A6 MEM_A_DQS_P<7> SB_DQS7 AN5 29B6 MEM_B_DQS_P<7>
MEM_A_DQ<21> IO MEM_B_DQ<21> IO
28C4
IO AL28 SA_DQ21 29C4
IO AU36 SB_DQ21
SA_DQS0* AK32 28D6 MEM_A_DQS_N<0> SB_DQS0* AM40 29D6 MEM_B_DQS_N<0>
IO IO
28C6
IO MEM_A_DQ<22> AM24 SA_DQ22 29C6
IO MEM_B_DQ<22> AP35 SB_DQ22
C 28C4
28D6
IO MEM_A_DQ<23>
MEM_A_DQ<24>
AP26
AP23
SA_DQ23
SA_DQ24
SA_DQS1*
SA_DQS2*
AU33
AN27
28D6 MEM_A_DQS_N<1>
28C4 MEM_A_DQS_N<2>
IO
IO
29C4
29C4
IO MEM_B_DQ<23>
MEM_B_DQ<24>
AP34
AY33
SB_DQ23
SB_DQ24
SB_DQS1*
SB_DQS2*
AU39
AT35
29D6 MEM_B_DQS_N<1>
29C6 MEM_B_DQS_N<2>
IO
IO
C
IO IO
SA_DQS3* AM21 28C6 MEM_A_DQS_N<3> SB_DQS3* AP29 29C4 MEM_B_DQS_N<3>
IO IO
28C6
IO MEM_A_DQ<25> AL22 SA_DQ25 29C4
IO MEM_B_DQ<25> BA33 SB_DQ25
SA_DQS4* AM12 28B6 MEM_A_DQS_N<4> SB_DQS4* AP16 29A6 MEM_B_DQS_N<4>
IO IO
28C4
IO MEM_A_DQ<26> AP21 SA_DQ26 29C4
IO MEM_B_DQ<26> AT31 SB_DQ26
SA_DQS5* AL8 28B4 MEM_A_DQS_N<5> SB_DQS5* AT10 29A4 MEM_B_DQS_N<5>
28C6
IO AN20 SA_DQ27 29C6
IO AU29 SB_DQ27
SA_DQS6* AN3 28A4 MEM_A_DQS_N<6> SB_DQS6* AT7 29B4 MEM_B_DQS_N<6>
IO IO
28C4
IO
MEM_A_DQ<28> AL23 SA_DQ28 29C4
IO
MEM_B_DQ<28> AU31 SB_DQ28
SA_DQS7* AH5 28A6 MEM_A_DQS_N<7> SB_DQS7* AP5 29B6 MEM_B_DQS_N<7>
28D4
IO AP24 SA_DQ29 29C6
IO AW31 SB_DQ29
28C4
IO
MEM_A_DQ<30> AP20 SA_DQ30 30C6 29C6
IO
MEM_B_DQ<30> AV29 SB_DQ30 30B5
SA_MA0 AY16 28B4 MEM_A_A<0> OUT SB_MA0 AY23 29B4 MEM_B_A<0> OUT
28C6
IO
MEM_A_DQ<31> AT21 SA_DQ31 30C6 29C6
IO
MEM_B_DQ<31> AW29 SB_DQ31 30B5
SA_MA1 AU14 28B6 MEM_A_A<1> SB_MA1 AW24 29B6 MEM_B_A<1>
28B6
IO AR12 SA_DQ32 30C6 29A6
IO AM19 SB_DQ32 30B5
SA_MA2 AW16 28B4 MEM_A_A<2> SB_MA2 AY24 29B4 MEM_B_A<2>
28B4
IO AR14 SA_DQ33 30C6 29A4
IO AL19 SB_DQ33 30B5
SA_MA3 BA16 28B6 MEM_A_A<3> SB_MA3 AR28 29B6 MEM_B_A<3>
28B4
IO AP13 SA_DQ34 30C6 29A6
IO AP14 SB_DQ34 30B5
SA_MA4 BA17 28B4 MEM_A_A<4> SB_MA4 AT27 29B4 MEM_B_A<4>
28B4
IO AP12 SA_DQ35 30C6 29A4
IO AN14 SB_DQ35 30B5
SA_MA5 AU16 28B6 MEM_A_A<5> SB_MA5 AT28 29B6 MEM_B_A<5>
28B4
IO AT13 SA_DQ36 30C6 29A4
IO AN17 SB_DQ36 30B5
SA_MA6 AV17 28C4 MEM_A_A<6> SB_MA6 AU27 29C4 MEM_B_A<6>
28B6
IO AT12 SA_DQ37 30C6 29A6
IO AM16 SB_DQ37 30B5
SA_MA7 AU17 28C4 MEM_A_A<7> SB_MA7 AV28 29C4 MEM_B_A<7>
28B6
IO AL14 SA_DQ38 30C6 29A6
IO AP15 SB_DQ38 30B5
SA_MA8 AW17 28C6 MEM_A_A<8> SB_MA8 AV27 29C6 MEM_B_A<8>
28B6
IO AL12 SA_DQ39 30C6 29A4
IO AL15 SB_DQ39 30B5
SA_MA9 AT16 28C6 MEM_A_A<9> SB_MA9 AW27 29C6 MEM_B_A<9>
28B4
IO AK9 SA_DQ40 30C6 29A4
IO AJ11 SB_DQ40 30B5
SA_MA10 AU13 28B6 MEM_A_A<10> SB_MA10 AV24 29B6 MEM_B_A<10>
28B6
IO AN7 SA_DQ41 30C6 29A6
IO AH10 SB_DQ41 30A5
SA_MA11 AT17 28C4 MEM_A_A<11> SB_MA11 BA27 29C4 MEM_B_A<11>
28A4
IO AJ9 SB_DQ42 30A5
SA_MA12 AV20 28C6 MEM_A_A<12> SB_MA12 AY27 29C6 MEM_B_A<12>
28A6
IO AN10 SB_DQ43 30A5
SA_MA13 AV12 28B4 MEM_A_A<13> SB_MA13 AR23 29B4 MEM_B_A<13>
28B6
IO AP9 SA_DQ44 29A6
IO AK13 SB_DQ44
28B4
IO
MEM_A_DQ<45> AN9 SA_DQ45 30B6 29A6
IO
MEM_B_DQ<45> AH11 SB_DQ45 30A6
SA_RAS* AW14 28B4 MEM_A_RAS_L OUT SB_RAS* AU23 29B4 MEM_B_RAS_L OUT
28A4
IO
MEM_A_DQ<46> AT5 SA_DQ46 29A4
IO
MEM_B_DQ<46> AK10 SB_DQ46
SA_RCVENIN* AK23 NC SB_RCVENIN* AK16 TP_SB_RCVENIN_L
28A6
IO
MEM_A_DQ<47> AL5 SA_DQ47 29A4
IO
MEM_B_DQ<47> AJ8 SB_DQ47
SA_RCVENOUT* AK24 NC SB_RCVENOUT* AK18 NC
28A6
IO MEM_A_DQ<48> AY2 SA_DQ48 30B6 29B4
IO MEM_B_DQ<48> BA10 SB_DQ48 30A6
SA_WE* AY14 28B6 MEM_A_WE_L SB_WE* AR27 29B6 MEM_B_WE_L
B 28A6
28A4
IO
IO
MEM_A_DQ<49>
MEM_A_DQ<50>
AW2
AP1
SA_DQ49
SA_DQ50
OUT 29A6
29B6
IO
IO
MEM_B_DQ<49>
MEM_B_DQ<50>
AW10
BA4
SB_DQ49
SB_DQ50
OUT
B
28A4
IO
MEM_A_DQ<51> AN2 SA_DQ51 29A4
IO
MEM_B_DQ<51> AW4 SB_DQ51
28A6
IO
MEM_A_DQ<52> AV2 SA_DQ52 29A6
IO
MEM_B_DQ<52> AY10 SB_DQ52
28A4
IO
MEM_A_DQ<53> AT3 SA_DQ53 29B4
IO
28A4
IO
MEM_A_DQ<54> AN1 SA_DQ54 29A4
IO
MEM_B_DQ<54> AW5 SB_DQ54
28A6
IO
MEM_A_DQ<55> AL2 SA_DQ55 29B6
IO
28A6
IO
MEM_A_DQ<56> AG7 SA_DQ56 29B4
IO
MEM_B_DQ<56> AV4 SB_DQ56
28A6
IO
MEM_A_DQ<57> AF9 SA_DQ57 29B6
IO
MEM_B_DQ<57> AR5 SB_DQ57
28A6
IO
IO
28A4
IO MEM_A_DQ<59> AF6 SA_DQ59 29B4
IO MEM_B_DQ<59> AK3 SB_DQ59
28A4
IO
IO
MEM_B_DQ<60> AT4 SB_DQ60
28A4
IO
MEM_A_DQ<61> AH6 SA_DQ61 29B4
IO
28A4
IO
IO
28A6
IO
IO
NB DDR2 Interfaces
A SYNC_MASTER=NB

A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 15 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
NCTF balls are Not Critical To Function
These connections can break without
impacting part performance.
LEMENU
64D6 19D7 19C8 16C8 =PPVCORE_S0_NB
AD27 VCC_NCTF0 VSS_NCTF0 AE27
AC27 VCC_NCTF1
U1200 VSS_NCTF1 AE26
AB27 945GM AE25

VCC_NCTF2 VSS_NCTF2
AA27 VCC_NCTF3
NB VSS_NCTF3 AE24
Y27 BGA AE23

VCC_NCTF4 VSS_NCTF4
W27
(7 OF 10) AE22
VCC_NCTF5 VSS_NCTF5
D
V27 VCC_NCTF6 VSS_NCTF6 AE21
D
NCTF
U27 VCC_NCTF7 VSS_NCTF7 AE20
T27 VCC_NCTF8 VSS_NCTF8 AE19
R27 VCC_NCTF9 VSS_NCTF9 AE18
AD26 VCC_NCTF10 VSS_NCTF10 AC17
AC26 VCC_NCTF11 VSS_NCTF11 Y17

AB26 VCC_NCTF12 VSS_NCTF12 U17
AA26 VCC_NCTF13
Y26 VCC_NCTF14
W26 VCC_NCTF15
=PP1V5_S0_NB_VCCAUX 17B6 19B6
V26 VCC_NCTF16 19D7 64C6
VCCAUX_NCTF0 AG27
U26 VCC_NCTF17
VCCAUX_NCTF1 AF27
T26 VCC_NCTF18
VCCAUX_NCTF2 AG26
R26 VCC_NCTF19
VCCAUX_NCTF3 AF26
AD25 VCC_NCTF20
VCCAUX_NCTF4 AG25
AC25 VCC_NCTF21
VCCAUX_NCTF5 AF25
AB25 VCC_NCTF22
VCCAUX_NCTF6 AG24
AA25 VCC_NCTF23
=PPVCORE_S0_NB 16D3 19C8 19D7 64D6 VCCAUX_NCTF7 AF24
Y25 VCC_NCTF24
1.05V or 1.5V VCCAUX_NCTF8 AG23
W25 VCC_NCTF25
VCCAUX_NCTF9 AF23
V25 VCC_NCTF26
AA33
AA32
AA31
AA30
AA29
AB28
AA28
AB23
AA23
AC22
AB22
AC21
AA21
AC20
AB20
AB19
AA19
VCCAUX_NCTF10 AG22
W33
P33
N33
L33
J33
Y32
W32
V32
P32
N32
M32
L32
J32
W31
V31
T31
R31
P31
N31
M31
Y30
W30
V30
U30
T30
R30
P30
N30
M30
L30
Y29
W29
V29
U29
R29
P29
M29
L29
Y28
V28
U28
T28
R28
P28
N28
M28
L28
P27
N27
M27
L27
P26
N26
L26
N25
M25
L25
P24
N24
M24
Y23
P23
N23
M23
L23
Y22
W22
P22
N22
M22
L22
W21
N21
M21
L21
Y20
W20
P20
N20
M20
L20
Y19
N19
M19
L19
N18
M18
L18
P17
N17
M17
N16
M16
L16
U25 VCC_NCTF27
VCCAUX_NCTF11 AF22
T25 VCC_NCTF28
VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
VCC_110
VCCAUX_NCTF12 AG21
R25 VCC_NCTF29
VCCAUX_NCTF13 AF21
AD24 VCC_NCTF30
VCCAUX_NCTF14 AG20
AC24 VCC_NCTF31
VCCAUX_NCTF15 AF20
AB24 VCC_NCTF32
(6 OF 10)
C AG19
C
U1200
VCCAUX_NCTF16
945GM
AA24 VCC_NCTF33
VCC AF19
BGA
VCCAUX_NCTF17
NB
LEMENU Y24 VCC_NCTF34

VCCAUX_NCTF18 R19
W24 VCC_NCTF35
VCCAUX_NCTF19 AG18
V24 VCC_NCTF36
VCC_SM100
VCC_SM101
VCC_SM102
VCC_SM103
VCC_SM104
VCC_SM105
VCC_SM106
VCC_SM107
VCCAUX_NCTF20 AF18
VCC_SM10
VCC_SM11
VCC_SM12
VCC_SM13
VCC_SM14
VCC_SM15
VCC_SM16
VCC_SM17
VCC_SM18
VCC_SM19
VCC_SM20
VCC_SM21
VCC_SM22
VCC_SM23
VCC_SM24
VCC_SM25
VCC_SM26
VCC_SM27
VCC_SM28
VCC_SM29
VCC_SM30
VCC_SM31
VCC_SM32
VCC_SM33
VCC_SM34
VCC_SM35
VCC_SM36
VCC_SM37
VCC_SM38
VCC_SM39
VCC_SM40
VCC_SM41
VCC_SM42
VCC_SM43
VCC_SM44
VCC_SM45
VCC_SM46
VCC_SM47
VCC_SM48
VCC_SM49
VCC_SM50
VCC_SM51
VCC_SM52
VCC_SM53
VCC_SM54
VCC_SM55
VCC_SM56
VCC_SM57
VCC_SM58
VCC_SM59
VCC_SM60
VCC_SM61
VCC_SM62
VCC_SM63
VCC_SM64
VCC_SM65
VCC_SM66
VCC_SM67
VCC_SM68
VCC_SM69
VCC_SM70
VCC_SM71
VCC_SM72
VCC_SM73
VCC_SM74
VCC_SM75
VCC_SM76
VCC_SM77
VCC_SM78
VCC_SM79
VCC_SM80
VCC_SM81
VCC_SM82
VCC_SM83
VCC_SM84
VCC_SM85
VCC_SM86
VCC_SM87
VCC_SM88
VCC_SM89
VCC_SM90
VCC_SM91
VCC_SM92
VCC_SM93
VCC_SM94
VCC_SM95
VCC_SM96
VCC_SM97
VCC_SM98
VCC_SM99
U24 VCC_NCTF37
VCC_SM0
VCC_SM1
VCC_SM2
VCC_SM3
VCC_SM4
VCC_SM5
VCC_SM6
VCC_SM7
VCC_SM8
VCC_SM9
VCCAUX_NCTF21 R18
T24 VCC_NCTF38
VCCAUX_NCTF22 AG17
R24 VCC_NCTF39
VCCAUX_NCTF23 AF17
AD23 VCC_NCTF40
VCCAUX_NCTF24 AE17
AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1
V23 VCC_NCTF41
VCCAUX_NCTF25 AD17
U23 VCC_NCTF42
VCCAUX_NCTF26 AB17
T23 VCC_NCTF43
VCCAUX_NCTF27 AA17
R23 VCC_NCTF44
NB_VCCSM_LF4 1
C1615 28D2 19D7 14C2 =PP1V8_S3_MEM_NB NB_VCCSM_LF2
AD22
VCCAUX_NCTF28 W17
0.47UF
64C6 61C2 29D2 VCC_NCTF45
NB_VCCSM_LF5 10%
NB_VCCSM_LF1 VCCAUX_NCTF29 V17
V22 VCC_NCTF46
6.3V T17
2 CERM-X5R U22
VCCAUX_NCTF30
402 VCC_NCTF47
C1614 1 1
C1613 C1620 1 1
C1621 1
C1610 C1612 1 1
C1611 T22
VCCAUX_NCTF31 R17
0.47UF 0.47UF Layout Note: 10uF 10uF 0.47UF 0.47UF 0.47UF VCC_NCTF48 AG16
10% 10% 20% 20% 10% 10% 10% R22
VCCAUX_NCTF32
6.3V 6.3V Place near pin BA23 6.3V 6.3V 6.3V 6.3V 6.3V VCC_NCTF49 AF16
CERM-X5R 2 2 CERM-X5R X5R 2 2 X5R 2 CERM-X5R CERM-X5R 2 2 CERM-X5R AD21
VCCAUX_NCTF33
402 402 603 603 402 402 402 VCC_NCTF50 AE16
V21
VCCAUX_NCTF34
Layout Note: VCC_NCTF51 AD16
U21
VCCAUX_NCTF35
Place near pin BA15 VCC_NCTF52 AC16
T21
VCCAUX_NCTF36
Layout Note: VCC_NCTF53 AB16
R21
VCCAUX_NCTF37
Place in cavity VCC_NCTF54 AA16
AD20
VCCAUX_NCTF38
(Need to better define cavity) VCC_NCTF55 Y16
V20
VCCAUX_NCTF39
VCC_NCTF56 W16
U20
VCCAUX_NCTF40
VCC_NCTF57 V16
T20
VCCAUX_NCTF41
VCC_NCTF58 U16
VCCAUX_NCTF42
B R20
AD19
VCC_NCTF59
VCC_NCTF60
VCCAUX_NCTF43 T16
R16
B
V19
VCCAUX_NCTF44
VCC_NCTF61 AG15
U19
VCCAUX_NCTF45
VCC_NCTF62 AF15
T19
VCCAUX_NCTF46
VCC_NCTF63 AE15
AD18
VCCAUX_NCTF47
VCC_NCTF64 AD15
AC18
VCCAUX_NCTF48
VCC_NCTF65 AC15
AB18
VCCAUX_NCTF49
VCC_NCTF66 AB15
AA18
VCCAUX_NCTF50
VCC_NCTF67 AA15
Y18
VCCAUX_NCTF51
VCC_NCTF68 Y15
W18
VCCAUX_NCTF52
VCC_NCTF69 W15
V18
VCCAUX_NCTF53
VCC_NCTF70 V15
U18
VCCAUX_NCTF54
VCC_NCTF71 U15
T18
VCCAUX_NCTF55
VCC_NCTF72 T15
VCCAUX_NCTF56
VCCAUX_NCTF57 R15
NB Power 1
A SYNC_MASTER=NB

A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 16 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
LEMENU
=PP1V05_S0_NB_VTT 19B5 19D7 64C6
=PP2V5_S0_NB_VCCSYNC H22 AC14

64B6 19D7 19B6 VCCSYNC VTT0
U1200 AB14
VTT1
64B6 19D7 19B8 =PP2V5_S0_NB_VCC_TXLVDS C30
VCC_TXLVDS0 945GM
VTT2 W14
B30
VCC_TXLVDS1 NB
VTT3 V14
A30
VCC_TXLVDS2 BGA
VTT4 T14
(8 OF 10)
PP1V5_S0_NB_VCC3G AJ41 R14
19B2 VCC3G0 VTT5
AB41 P14
VCC3G1 VTT6
D
Y41
V41
VCC3G2
VCC3G3
VTT7
VTT8
N14
M14
D
POWER
R41 L14
VCC3G4 VTT9
N41 AD13
VCC3G5 VTT10
L41 AC13
VCC3G6 VTT11
PP1V5_S0_NB_VCCA_3GPLL AC33 AB13
19A2 VCCA_3GPLL VTT12
=PP2V5_S0_NB_VCCA_3GBG G41 AA13
64B6 19D7 19B7 VCCA_3GBG VTT13
GND_NB_VSSA_3GBG H41 Y13
19A2 VSSA_3GBG VTT14
VTT15 W13
PP2V5_S0_NB_VCCA_CRTDAC F21
19D1 VCCA_CRTDAC0 V13
E21 VTT16
VCCA_CRTDAC1 U13
G21 VTT17
19C1 GND_NB_VSSA_CRTDAC VSSA_CRTDAC
VTT18 T13
PP1V5_S0_NB_VCCA_DPLLA B26 R13

19D4 VCCA_DPLLA VTT19
PP1V5_S0_NB_VCCA_DPLLB C39 N13
19D4 VCCA_DPLLB VTT20
PP1V5_S0_NB_VCCA_HPLL AF1 M13
19C4 VCCA_HPLL VTT21
VTT22 L13
=PP2V5_S0_NB_VCCA_LVDS A38
64B6 19D1 19C7 VCCA_LVDS AB12
B39 VTT23
19D1 GND_NB_VSSA_LVDS VSSA_LVDS
VTT24 AA12
PP1V5_S0_NB_VCCA_MPLL AF2 Y12

19C4 VCCA_MPLL VTT25
VTT26 W12
PP3V3_S0_NB_VCCA_TVBG H20
19B1 VCCA_TVBG V12
G20 VTT27
19A1 GND_NB_VSSA_TVBG VSSA_TVBG
VTT28 U12
PP3V3_S0_NB_VCCA_TVDACC E20 T12

19B1 VCCA_TVDACC0 VTT29
F20 R12
VCCA_TVDACC1 VTT30
PP3V3_S0_NB_VCCA_TVDACB C20 P12
19B1 VCCA_TVDACB0 VTT31
D20 N12
VCCA_TVDACB1 VTT32
PP3V3_S0_NB_VCCA_TVDACA E19 M12
19C1 VCCA_TVDACA0 VTT33
C F19
VCCA_TVDACA1 VTT34
VTT35
L12
R11
C
=PP1V5_S0_NB_VCCD_HMPLL AH1
64C6 19D7 VCCD_HMPLL0 P11
AH2 VTT36
VCCD_HMPLL1 N11
VTT37
=PP1V5_S0_NB_VCCD_LVDS A28 M11
64C6 19D7 19B8 VCCD_LVDS0 VTT38
B28 R10
VCCD_LVDS1 VTT39
C28 P10
VCCD_LVDS2 VTT40
VTT41 N10
PP1V5_S0_NB_VCCD_TVDAC D21
19A5 VCCD_TVDAC M10
VTT42
=PP3V3_S0_NB_VCC_HV A23 P9
64B6 19C7 19B7 VCC_HV0 VTT43
B23 N9
VCC_HV1 VTT44
B25 M9
VCC_HV2 VTT45
VTT46 R8
PP1V5_S0_NB_VCCD_QTVDAC H19
19A5 VCCD_QTVDAC P8
VTT47
64C6 19D7 19B6 16D1 =PP1V5_S0_NB_VCCAUX AK31 VCCAUX0 VTT48 N8
AF31 VCCAUX1 VTT49 M8
AE31 VCCAUX2 VTT50 P7
AC31 VCCAUX3 VTT51 N7

AL30 VCCAUX4 VTT52 M7
AK30 VCCAUX5 VTT53 R6
AJ30 VCCAUX6 VTT54 P6

AH30 VCCAUX7 VTT55 M6
AG30 VCCAUX8 VTT56 A6 NB_VTTLF_CAP3

AF30 VCCAUX9 VTT57 R5
AE30 VCCAUX10 VTT58 P5 C1713 1
AD30 VCCAUX11 VTT59 N5 0.47UF

10%
B AC30
AG29
VCCAUX12
VCCAUX13
VTT60
VTT61
M5
P4
6.3V
CERM-X5R
402
2
B
AF29 VCCAUX14 VTT62 N4
AE29 VCCAUX15 VTT63 M4
AD29 VCCAUX16 VTT64 R3
AC29 VCCAUX17 VTT65 P3
AG28 VCCAUX18 VTT66 N3
AF28 VCCAUX19 VTT67 M3
AE28 VCCAUX20 VTT68 R2
AH22 VCCAUX21 VTT69 P2
AJ21 VCCAUX22 VTT70 M2

AH21 VCCAUX23 VTT71 D2 NB_VTTLF_CAP2
AJ20 VCCAUX24 VTT72 AB1 NB_VTTLF_CAP1
AH20 VCCAUX25 VTT73 R1
AH19 VCCAUX26 VTT74 P1 C1711 1 1
C1712
P19 VCCAUX27 VTT75 N1 0.47UF 0.22UF
10% 20%
P16 M1 6.3V 6.3V
VCCAUX28 VTT76 CERM-X5R 2 2 X5R
AH15 402 402
VCCAUX29
P15 VCCAUX30
AH14 VCCAUX31
AG14 VCCAUX32
AF14 VCCAUX33
AE14 VCCAUX34
Y14 VCCAUX35
AF13 VCCAUX36 NB Power 2
AE13 VCCAUX37
A AF12
AE12
VCCAUX38
VCCAUX39
SYNC_MASTER=NB

A
AD12 VCCAUX40
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 17 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
LEMENU
LEMENU
AC41 VSS_0 VSS_97 AK34
AT23 VSS_180 VSS_273 J11
AA41 VSS_1 U1200 VSS_98 AG34
AN23
U1200 D11
VSS_181 VSS_274
W41 VSS_2 945GM VSS_99 AF34 945GM
AM23 VSS_182 VSS_275 B11
T41 VSS_3 VSS_100 AE34 NB
NB AH23 VSS_183 VSS_276 AV10
P41 VSS_4 VSS_101 AC34 BGA
BGA AC23 VSS_184 VSS_277 AP10
M41 VSS_5 VSS_102 C34 (10 OF 10)
(9 OF 10) W23 VSS_185 VSS_278 AL10
J41 VSS_6 VSS_103 AW33
K23 VSS_186 VSS_279 AJ10
F41 VSS_7 VSS_104 AV33
J23 VSS_187 VSS_280 AG10
AV40 VSS_8 VSS_105 AR33
F23 VSS_188 VSS_281 AC10
AP40 VSS_9 VSS_106 AE33
C23 VSS_189 VSS_282 W10
AN40 VSS_10 VSS VSS_107 AB33
D
D AK40 VSS_11 VSS_108 Y33
AA22
K22
VSS_190
VSS_191
VSS VSS_283
VSS_284
U10
BA9
AJ40 VSS_12 VSS_109 V33
G22 VSS_192 VSS_285 AW9
AH40 VSS_13 VSS_110 T33
F22 VSS_193 VSS_286 AR9
AG40 VSS_14 VSS_111 R33
E22 VSS_194 VSS_287 AH9
AF40 VSS_15 VSS_112 M33
D22 VSS_195 VSS_288 AB9
AE40 VSS_16 VSS_113 H33
A22 VSS_196 VSS_289 Y9
B40 VSS_17 VSS_114 G33
BA21 VSS_197 VSS_290 R9
AY39 VSS_18 VSS_115 F33
AV21 VSS_198 VSS_291 G9
AW39 VSS_19 VSS_116 D33
AR21 VSS_199 VSS_292 E9
AV39 VSS_20 VSS_117 B33
AN21 VSS_200 VSS_293 A9
AR39 VSS_21 VSS_118 AH32
AL21 VSS_201 VSS_294 AG8
AN39 VSS_22 VSS_119 AG32
AB21 VSS_202 VSS_295 AD8
AJ39 VSS_23 VSS_120 AF32
Y21 VSS_203 VSS_296 AA8
AC39 VSS_24 VSS_121 AE32
P21 VSS_204 VSS_297 U8
AB39 VSS_25 VSS_122 AC32
K21 VSS_205 VSS_298 K8
AA39 VSS_26 VSS_123 AB32
J21 VSS_206 VSS_299 C8
Y39 VSS_27 VSS_124 G32
H21 VSS_207 VSS_300 BA7
W39 VSS_28 VSS_125 B32
C21 VSS_208 VSS_301 AV7
V39 VSS_29 VSS_126 AY31
AW20 VSS_209 VSS_302 AP7
T39 VSS_30 VSS_127 AV31
AR20 VSS_210 VSS_303 AL7
R39 VSS_31 VSS_128 AN31
AM20 VSS_211 VSS_304 AJ7
P39 VSS_32 VSS_129 AJ31
AA20 VSS_212 VSS_305 AH7
N39 VSS_33 VSS_130 AG31
K20 VSS_213 VSS_306 AF7
M39 VSS_34 VSS_131 AB31
B20 VSS_214 VSS_307 AC7
L39 VSS_35 VSS_132 Y31
A20 VSS_215 VSS_308 R7
J39 VSS_36 VSS_133 AB30
C H39
G39
VSS_37
VSS_38
VSS_134
VSS_135
E30
AT29
AN19
AC19
VSS_216
VSS_217
VSS_309
VSS_310
G7
D7 C
W19 VSS_218 VSS_311 AG6
F39 VSS_39 VSS_136 AN29
K19 VSS_219 VSS_312 AD6
D39 VSS_40 VSS_137 AB29
G19 VSS_220 VSS_313 AB6
AT38 VSS_41 VSS_138 T29
C19 VSS_221 VSS_314 Y6
AM38 VSS_42 VSS_139 N29
AH18 VSS_222 VSS_315 U6
AH38 VSS_43 VSS_140 K29
P18 VSS_223 VSS_316 N6
AG38 VSS_44 VSS_141 G29
H18 VSS_224 VSS_317 K6
AF38 VSS_45 VSS_142 E29
D18 VSS_225 VSS_318 H6
AE38 VSS_46 VSS_143 C29
A18 VSS_226 VSS_319 B6
C38 VSS_47 VSS_144 B29
AY17 VSS_227 VSS_320 AV5
AK37 VSS_48 VSS_145 A29
AR17 VSS_228 VSS_321 AF5
AH37 VSS_49 VSS_146 BA28
AP17 VSS_229 VSS_322 AD5
AB37 VSS_50 VSS_147 AW28
AM17 VSS_230 VSS_323 AY4
AA37 VSS_51 VSS_148 AU28
AK17 VSS_231 VSS_324 AR4
Y37 VSS_52 VSS_149 AP28
AV16 VSS_232 VSS_325 AP4
W37 VSS_53 VSS_150 AM28
AN16 VSS_233 VSS_326 AL4
V37 VSS_54 VSS_151 AD28
AL16 VSS_234 VSS_327 AJ4
T37 VSS_55 VSS_152 AC28
J16 VSS_235 VSS_328 Y4
R37 VSS_56 VSS_153 W28
F16 VSS_236 VSS_329 U4
P37 VSS_57 VSS_154 J28
C16 VSS_237 VSS_330 R4
N37 VSS_58 VSS_155 E28
AN15 VSS_238 VSS_331 J4
M37 VSS_59 VSS_156 AP27
AM15 VSS_239 VSS_332 F4
L37 VSS_60 VSS_157 AM27
AK15 VSS_240 VSS_333 C4
J37 VSS_61 VSS_158 AK27
N15 VSS_241 VSS_334 AY3
H37 VSS_62 VSS_159 J27
M15 VSS_242 VSS_335 AW3
B G37
F37
VSS_63
VSS_64
VSS_160
VSS_161
G27
F27
L15
B15
VSS_243 VSS_336 AV3
AL3
B
D37 C27
VSS_244 VSS_337
VSS_65 VSS_162 A15 AH3
AY36 B27
VSS_245 VSS_338
VSS_66 VSS_163 BA14 AG3
AW36 AN26
VSS_246 VSS_339
VSS_67 VSS_164 AT14 AF3
AN36 M26
VSS_247 VSS_340
VSS_68 VSS_165 AK14 AD3
AH36 K26
VSS_248 VSS_341
VSS_69 VSS_166 AD14 AC3
AG36 F26
VSS_249 VSS_342
VSS_70 VSS_167 AA14 AA3
AF36 D26
VSS_250 VSS_343
VSS_71 VSS_168 U14 G3
AE36 AK25
VSS_251 VSS_344
VSS_72 VSS_169 K14 AT2
AC36 P25
VSS_252 VSS_345
VSS_73 VSS_170 H14 AR2
C36 K25
VSS_253 VSS_346
VSS_74 VSS_171 E14 AP2
B36 H25
VSS_254 VSS_347
VSS_75 VSS_172 AV13 AK2
BA35 E25
VSS_255 VSS_348
VSS_76 VSS_173 AR13 AJ2
AV35 D25
VSS_256 VSS_349
VSS_77 VSS_174 AN13 AD2
AR35 A25
VSS_257 VSS_350
VSS_78 VSS_175 AM13 AB2
AH35 BA24
VSS_258 VSS_351
VSS_79 VSS_176 AL13 Y2
AB35 AU24
VSS_259 VSS_352
VSS_80 VSS_177 AG13 U2
AA35 AL24
VSS_260 VSS_353
VSS_81 VSS_178 P13 T2
Y35 AW23
VSS_261 VSS_354
VSS_82 VSS_179 F13 N2
W35
VSS_262 VSS_355
VSS_83 D13 J2
V35
VSS_263 VSS_356
VSS_84 B13 H2
T35
VSS_264 VSS_357
VSS_85 AY12 F2
R35
VSS_265 VSS_358
VSS_86 AC12 C2
VSS_266 VSS_359
P35 VSS_87 K12 VSS_267 VSS_360 AL1
NB Grounds
N35 VSS_88 H12
A M35
L35
VSS_89
VSS_90
E12
VSS_268
VSS_269
SYNC_MASTER=NB

A
AD11 VSS_270
J35 VSS_91 AA11 VSS_271 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
H35 VSS_92 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
Y11 VSS_272 AGREES TO THE FOLLOWING
G35 VSS_93
F35 VSS_94
D35 VSS_95
AN34
VSS_96
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 18 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
MCH VCCA_LVDS FILTER
Power Interface (MCH LVDS ANALOG 2.5V PWR)
These are the power signals that leave the NB "block" =PP2V5_S0_NB_VCCA_LVDS 17C6 19C7
64B6
IN =PP1V05_S0_FSB_NB 12A7 12B7 12C2 33B8 33C7 33C8 64D6 Layout Note:
=PPVCORE_S0_NB
1
C1980 1
C1981
IN 16C8 16D3 19C8 64D6 This 0.1uF cap should 0.1uF 0.01uF
IN =PP1V05_S0_NB 19D1 64C6 be within 5 mm of NB edge 20%
10V
10%
16V
=PP1V05_S0_NB_VTT
MCH VCCA_DPLLA FILTER 2 CERM 2 CERM
IN 17D3 19B5 64C6
MCH DISPLAY PLL POWER LDO R1950 (MCH DISPLAY A PLL 1.5V PWR) 402 402
1
0 2
GND_NB_VSSA_LVDS 17C6
IN =PP1V5_S0_NB 19C1 64C6 PP1V5_S0_NB_VCCA_DPLLA 17C6
CRITICAL VOLTAGE=1.5V
D IN
IN
=PP1V5_S0_NB_PCIE
=PP1V5_S0_NB_PLL
13D2 64C6
19C6 64C6 64B6 =PP2V5_S0_NB_DISP_PLL U1900

5%
1/16W
MF-LF
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=1.0 mm
Layout Note: Route to caps, then GND
D
402
IN
=PP1V5_S0_NB_TVDAC 19A8 64C6 TPS73115 1
C1953
D1986
=PP1V5_S0_NB_VCCD_HMPLL SOT23-5 0.1uF
IN 17C6 64C6
1 IN OUT 5 PP1V5_S0_DPLL 20% BAT54DW
=PP1V5_S0_NB_VCCD_LVDS 17C6 19B8 64C6 2
10V
64B6 19D7 =PP2V5_S0_NB_CRTDAC R1985 SOT-363 =PP1V05_S0_NB 19D7 64C6
IN 3 EN NR/FB 4 TPS73115_NR CERM
10
=PP1V5_S0_NB_VCCAUX 402 1 2 PP2V5_S0_NB_CRTDAC_FOLLOW 6 1
IN 16D1 17B6 19B6 64C6
VOLTAGE=2.5V
IN =PP1V8_S3_MEM_NB 14C2 16B6 28D2 29D2 61C2 64C6
1 C1950 GND 1
C1951 1
C1952
GMCH VCCA_DPLL_B FILTER
1%
1/16W
NC 5
1UF 2 0.01uF 10uF MF-LF
IN =PP2V5_S0_NB_CRTDAC 19D4 64B6
10% 10% 20% R1951 (MCH DISPLAY B PLL 1.5V PWR) 402 MCH VCCA_CRTDAC BYPASS
2 6.3V 2
16V
2
6.3V
0
CERM
402
CERM X5R 1 2 PP1V5_S0_NB_VCCA_DPLLB 17C6 C1986 (MCH CRTDAC ANALOG 2.5V PWR)
IN
=PP2V5_S0_NB_VCCSYNC 17D6 19B6 64B6
402 603
VOLTAGE=1.5V L1985 22000pF-1000mA
5% MIN_LINE_WIDTH=1.0 mm 180-OHM-1.5A 16V
IN =PP2V5_S0_NB_VCC_TXLVDS 17D6 19B8 64B6 1/16W MIN_NECK_WIDTH=1.0 mm NFM18 PP2V5_S0_NB_VCCA_CRTDAC 17D6
MF-LF VOLTAGE=2.5V
IN =PP2V5_S0_NB_VCCA_3GBG 17D6 19B7 64B6 402 1 2 PP2V5_S0_NB_CRTDAC_F 1 3
=PP2V5_S0_NB_VCCA_LVDS
1
C1954 0603
17C6 19D1 64B6
IN 0.1uF 2
=PP3V3_S0_NB
20%
10V Layout Note: C1985 1
Layout Note:
14C7 14D6 20A4 20B4 64A6 2
IN CERM
THESE 4 0.1UF CAPS SHOULD 0.1uF These 2 caps should be
=PP3V3_S0_NB_VCC_HV 402 20%
IN 17C6 19B7 64B6 10V
be within 5 mm of NB edge CERM 2 within 6.35 mm of NB edge
=PP5V_S0_NB_TVDAC 402
IN 19C4 64D3
GMCH VCCA_HPLL FILTER GND_NB_VSSA_CRTDAC 17D6
L1934 (HOST PLL 1.5V PWR)

FERR-120-OHM-0.2A Layout Note: Route to caps, then GND
64C6 19D7 =PP1V5_S0_NB_PLL PP1V5_S0_NB_VCCA_HPLL 17C6 CRITICAL
VOLTAGE=1.5V
=PP1V8_S3_MEM =PP1V8_S3_MEM 1 2
64C3 29D6 29D4 29B2 28D6 28D4 28B2 19C7 29B2 28D6 28D4 28B2 19C8
64C3 29D6 29D4
0603 CRITICAL
MIN_NECK_WIDTH=1.0 mm U1901 D1986
MM157 BAT54DW
PLACE THOSE COMPONENT C1934 1 1
C1935 SOT23-5-LF
1 VIN R1990
22UF 0.1uF 64D3 19C7 =PP5V_S0_NB_TVDAC VOUT 5 PP3V3_S0_NB_TVDAC SOT-363 =PP1V5_S0_NB 19D7 64C6
1
CLOSE TO GMCH 1 20% 20% 1
10
2 PP3V3_S0_NB_TVDAC_FOLLOW 3 4
R1988 R1986 6.3V
2 2
10V 3 CONT NOISE 4 MM1573DN_NR VOLTAGE=3.3V
CERM-X5R CERM
1K 1K 805 402
1% MIN_LINE_WIDTH=1.0 mm
1% 1% 1/16W MIN_NECK_WIDTH=1.0 mm
NC 2
1/16W 1/16W
GND MF-LF
MF-LF MF-LF 402
402 402 GMCH VCCA_MPLL FILTER 2
1 C1940 C1941 1 C1942
C
2
MEM_VREF_NB_0 14C2
2
MEM_VREF_NB_1
VOLTAGE=0.9V
14C2 L1936 (MCH MEMORY PLL 1.5V PWR) 1UF
10%
1
0.01uF
10% 10%
1UF
C1992
MCH VCCA_TVDACC FILTER
(MCH TV OUT CHANNEL A 3.3V PWR)
C
VOLTAGE=0.9V FERR-120-OHM-0.2A PP1V5_S0_NB_VCCA_MPLL 6.3V 16V 6.3V L1990
MIN_LINE_WIDTH=0.25 mm MIN_LINE_WIDTH=0.25 mm 17C6 2 CERM 2 CERM 2 CERM 22000pF-1000mA
MIN_NECK_WIDTH=0.25 mm MIN_NECK_WIDTH=0.25 mm VOLTAGE=1.5V 402 402 402 180-OHM-1.5A 16V
1 2
MIN_LINE_WIDTH=1.0 mm NFM18 PP3V3_S0_NB_VCCA_TVDACA 17C6
1 PP3V3_S0_NB_TVDAC_F
R1989 1 0603 CRITICAL
1 2 1 3
VOLTAGE=3.3V
1K R1987 MIN_LINE_WIDTH=1.0 mm
1% 1K C1936 1 1
C1937 0603
1/16W 1% 2
MF-LF 1/16W
22UF 0.1uF 1
C1990 C1991 1
20% 20%
402 MF-LF
2 6.3V 10V 10uF 0.1uF
2 402 CERM-X5R 2 2 CERM 20% 20%
805 402 6.3V 10V
2 X5R CERM 2
GMCH CORE PWR 1.05V BYPASS 603 402
THIS 470UF FOR GMCH CORE 1.05V
19D7 16D3 16C8 =PPVCORE_S0_NB
64D6
CRITICAL
MCH VCCA_TVDACC FILTER
1
C1900 1
C1902 1
C1903 1 C1904 1
C1905 1
C1906 1
C1907 C1994
22000pF-1000mA (MCH TV OUT CHANNEL B 3.3V PWR)
470UF 10uF 10uF 1UF 0.22uF 0.22uF 0.22uF 16V
20% 20% 20% 10% 20% 20% 20%
NFM18 PP3V3_S0_NB_VCCA_TVDACB 17C6
3 2 2.5V 2
6.3V
X5R 2
6.3V
X5R 2 6.3V
CERM 2
6.3V
X5R 2
6.3V
X5R 2
6.3V
X5R VOLTAGE=3.3V
TANT 1 3
D2T 603 603 402 402 402 402
2
C1993 1
MCH VCC_HV BYPASS 0.1uF
GMCH VCCD_LVDS BYPASS 20%
(MCH HV BUFFER 3.3V PWR) MCH VTT BYPASS 10V
(MCH LVDS DIGITAL 1.5V PWR) MCH VCCSYNC BYPASS
=PP1V05_S0_NB_VTT CERM 2 Layout Note:
64C6 19D7 17D3 (MCH FSB 1.05V PWR) (SHARE C0940 470UF) 402
64C6 19D7 17C6 =PP1V5_S0_NB_VCCD_LVDS 64B6 19C7 17C6 =PP3V3_S0_NB_VCC_HV (MCH H/V SYNC 2.5V PWR) These 8 caps should be
19D7 17D6 =PP2V5_S0_NB_VCCSYNC within 6.35 mm of NB edge
64B6
1
C1965 1
C1966 1
C1967
1
C1910 1
C1911 1
C1914 1
C1915 1
C1917 4.7uF 2.2uF 0.22uF C1996 MCH VCCA_TVDACC FILTER
10uF 0.1uF 10uF 0.1uF 0.1uF 20% 20% 20%
22000pF-1000mA (MCH TV OUT CHANNEL C 3.3V PWR)
20% 20% 20% 20% 20% 6.3V 6.3V 6.3V
6.3V 10V 6.3V 10V 10V 2 CERM 2 CERM1 2 X5R 16V
2 X5R 2 CERM 2 X5R 2 CERM 2 CERM 603 603 402 NFM18 PP3V3_S0_NB_VCCA_TVDACC 17C6
603 402 603 402 402 VOLTAGE=3.3V
1 3
B 945 EDS: 5 mOhm, 1nH (1210?)
Layout Note: Layout Note:
2
B
Place in cavity Place on the edge C1995 1
GMCH VCCTX_LVDS BYPASS 0.1uF
(MCH LVDS DATA/CLK TX 2.5V PWR) MCH VCCA_3GBG BYPASS GMCH VCCAUX FILTER 20%
10V
64B6 19D7 17D6 =PP2V5_S0_NB_VCC_TXLVDS (MCH PCIE/DMI BAND GAP 2.5V PWR) (MCH DDR DLL&IO, FSB HSIO&IO PWR 1.5V) CERM 2
=PP2V5_S0_NB_VCCA_3GBG =PP1V5_S0_NB_VCCAUX 402
64B6 19D7 17D6 64C6 19D7 17B6 16D1
91NH, 20%, 20MOHM, 1.5A (1210 TYP)
CRITICAL GMCH VCC3G FILTER
1
C1912 1
C1913 1
C1916 1
C1918
4.7uF 0.1uF 0.1uF 0.1uF L1970 (PCI-E/DMI ANALOG 1.5V PWR)
20% 20% 20% 20% C1998 MCH VCCA_TVBG FILTER
2
6.3V
2
10V
2
10V
2
10V
64C6 =PP1V5_S0_NB_3G 91nH PP1V5_S0_NB_VCC3G 17D6 22000pF-1000mA (MCH TV DAC BAND GAP 3.3V PWR)
CERM CERM CERM CERM
VOLTAGE=1.5V 16V
603 402 402 402 1 2 MIN_LINE_WIDTH=1.0 mm NFM18 PP3V3_S0_NB_VCCA_TVBG 17C6
MIN_NECK_WIDTH=1.0 mm VOLTAGE=3.3V
1210 1 3
945 EDS: 1210? CRITICAL MIN_NECK_WIDTH=1.0 mm
1
C1970 1
C1971 1
C1972
Layout Note: 10uF 10uF Layout Note: 2
220UF
20% 20%
C1997 1
Place L and C 20%
6.3V 6.3V 10uF caps should 0.1uF
2 2.5V 2 2
X5R X5R
C1921 GMCH VCCD_TVDAC FILTER close to MCH POLY
SMB2 603 603 be close to MCH 20%
10V
CERM 2
22000pF-1000mA (MCH TVDAC DEDICATED PWR 1.5V) on opposite side. 402
16V
64C6 19D7 =PP1V5_S0_NB_TVDAC NFM18 PP1V5_S0_NB_VCCD_TVDAC 17C6 GND_NB_VSSA_TVBG 17C6
1 3
VOLTAGE=1.5V
MIN_NECK_WIDTH=1.0 mm Layout Note: Route to caps, then GND
2
C1920 1
0.1uF 1uH, 20% GMCH VCCA_3GPLL FILTER

20%
10V
2 Layout Note: (3GIO PLL 1.5V PWR)
CERM
402
L1975
These 4 caps should be 1.0UH-220MA-0.12-OHM R1975
64C6 =PP1V5_S0_NB_3GPLL PP1V5_S0_NB_VCCA_3GPLL 17D6
within 6.35 mm of NB edge 0.51 VOLTAGE=1.5V
1 2 PP1V5_S0_NB_3GPLL_F 1 2 MIN_LINE_WIDTH=1.0 mm
0805
VOLTAGE=1.5V
MIN_LINE_WIDTH=1.0 mm 1%
MIN_NECK_WIDTH=1.0 mm NB (GM) Decoupling
C1923 GMCH VCCD_QTVDAC FILTER MIN_NECK_WIDTH=1.0 mm 1/16W
C1975 1 1
C1976
A L1922
180-OHM-1.5A
22000pF-1000mA
16V
NFM18
(MCH TVDAC DIGITAL QUIET 1.5V PWR)
PP1V5_S0_NB_VCCD_QTVDAC 17B6
MF-LF
402
10uF
20%
0.1uF
20%
SYNC_MASTER=NB

A
6.3V 10V
VOLTAGE=1.5V X5R 2 2 CERM
1 2 PP1V5_S0_NB_QTVDAC 1 3
MIN_LINE_WIDTH=1.0 mm Layout Note: 603 402
MIN_NECK_WIDTH=1.0 mm THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
0603 3GPLL 10uF cap should GND_NB_VSSA_3GBG 17D6 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
2 AGREES TO THE FOLLOWING
C1922 1
be placed in cavity
0.1uF Layout Note: Route to caps, then GND I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
20%
10V II NOT TO REPRODUCE OR COPY IT
CERM 2
402 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 19 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Internal pull-ups
00 = Partial Clock Gating Disable

01 = XOR Mode Enabled
NB_CFG<13:12>
10 = All-Z Mode Enabled
NB_CFG<3> RESERVED
D 11 = Normal Operation
D
NB_CFG<4> RESERVED NB_CFG<14> RESERVED
14C6 NB_CFG<5>
Internal pull-up NBCFG_DMI_X2
1
R2075
NB_CFG<5> High = DMIx4 2.2K
5%
1/16W NB_CFG<15> RESERVED
DMI x2 Select Low = DMIx2 MF-LF
402
2
PROBABLY NOT NEEDED
14C6 NB_CFG<16>
C Internal pull-up NBCFG_DYN_ODT_DISABLE

1
R2085
C
NB_CFG<16> High = Enabled 2.2K
5%
NB_CFG<6> RESERVED FSB Dynamic 1/16W
Low = Disabled MF-LF
ODT 2
402
14C6 NB_CFG<7>
Internal pull-up NO STUFF
1
R2077
NB_CFG<7> High = Mobile CPU 2.2K
5%
1/16W NB_CFG<17> RESERVED
CPU Strap Low = RESERVED MF-LF
402
2
=PP3V3_S0_NB 14C7 14D6 19C7 20A4 20B4 64A6
NBCFG_VCC_1V5
1
R2058
NB_CFG<18> High = 1.5V 2.2K
5%
NB_CFG<8> RESERVED VCC Select 1/16W
Low = 1.05V MF-LF
402
2
14C6 NB_CFG<18>
B Internal pull-down
B
14C6 NB_CFG<9> =PP3V3_S0_NB 14C7 14D6 19C7 20A4 20B4 64A6
Internal pull-up NBCFG_PEG_REVERSE NBCFG_DMI_REVERSE

1 1
R2079 R2059
NB_CFG<9> High = Normal 2.2K NB_CFG<19> High = Reversed 2.2K
5% 5%
PCIE Graphics 1/16W DMI Lane 1/16W
Low = Reversed MF-LF Low = Normal MF-LF
Lane Reversal 2
402 Reversal 2
402
14C6 NB_CFG<19>
Internal pull-down
=PP3V3_S0_NB 14C7 14D6 19C7 20B4 64A6
945 External Design Spec says reserved NBCFG_SDVO_AND_PCIE

1
High = Both active R2060
NB_CFG<20> 2.2K
5%
NB_CFG<10> RESERVED PCIe Backward Low = Only SDVO 1/16W
MF-LF
Interop. Mode or PCIe x1 2
402
14B6 NB_CFG<20>
Internal pull-down
PROBABLY NOT NEEDED

NB Config Straps
A NB_CFG<11> RESERVED
SYNC_MASTER=NB

A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 20 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
26D3 25A4 24B3 PP3V3_S5_SB_RTC
=PP3V3_S0_SB_GPIO 21C3 23B2 23D5 64B6

2 R2105
332K NOTE: ENABLE INTERNAL 1.05V SUSPEND REG
402 MF-LF
1/16W 1%
1
R2194
D
1
5%
10K LAYOUT NOTE: PLACE R2101 & R2194 WHERE ACCESSIBLE D
LEMENU 1/16W
MF-LF
2 402
U2100
ICH7-M
26C8 SB_RTC_X1 AB1 SB AA6
53C6
47C6
45D8 5D2 LPC_AD<0>
IN RTCX1 BGA LAD0 IO
26C8 SB_RTC_X2 AB2 (1 OF 6) AB5 LPC_AD<1>
OUT RTCX2 LAD1 IO
AC4 NOTE: LAD<0-3> HAVE INTERNAL 20K PU
AA3 LAD2 LPC_AD<2> IO
26D4
IN SB_RTC_RST_L RTCRST* Y6 47C5 53C6
RTC
LPC
45D8 5C2 LPC_AD<3>
LAD3 IO
26D4 IN SB_SM_INTRUDER_L Y5
INTRUDER* AC3 TP_SB_DRQ0_L
SB_INTVRMEN W4 INTVRMEN LDRQ0*
NOTE: EE_CS HAS INTERNAL PD, ONLY ENABLED WHEN LAN_RST#=L AA5 NOTE: LDRQ<0-1># HAVE INTERNAL 20K PU
LDRQ1*/GPIO23 TP_SB_GPIO23 IO
53C6 =PP3V3_S0_SB_GPIO =PP1V05_S0_SB_CPU_IO
W1 AB3 47C6 NOSTUFF 21D3 23B2 23D5 64B6 21C1 24C3 25C4 64D6
TP_SB_XOR_W1 EE_CS LFRAME* 45C8 5C2 LPC_FRAME_L OUT
TP_SB_XOR-Y1 Y1
EE_SHCLK
R2101
Y2 AE22 1
2.2K 2
TP_SB_XOR-Y2 (INT PU) EE_DOUT A20GATE SB_A20GATE
2
W3 AH28 NOTE: PULLED UP PER INTEL 1
(INT PU) EE_DIN A20M* CPU_A20M_L
7C8
OUT
5%
1/16W R2199 NOTE: R2110 NOTE: R2110=56 IN CV.
V3 AG27 TP_CPU_CPUSLP_L
MF-LF
402
10K 54.9 CHANGED TO 54.9 FOR
(WEAK INT PD) LAN_CLK CPUSPL* 5% SPEC SAYS WEAK PU IS REQUIRED
LAN
1/16W MF-LF 402 BOM CONSOLIDATION
MF-LF BUT CAPELL VALLEY USES 56-OHM PU 1/16W 1%
1
TP_SB_XOR-U3 U3 AF24 CPU_DPRSTP_L 2 402
LAN_RSTSYNC TP1/DPRSTP* 58C7 7B3
OUT
AH25 CHECK WITH INTEL
NOTE: U5 TP2/DPSLP* 7B3 CPU_DPSLP_L OUT
LAN_RXD0
POR IS SMC WILL PUT LAN INT’F (WEAK INT PU) V4 AG26
LAN_RXD1 FERR* 7C8 CPU_FERR_L IN
INTO RESET STATE TO SAVE PWR. T5
LAN_RXD2 AG24 CPU_PWRGD
INTEL CONFIRMS OK TO LEAVE PINS AS NC GPIO49/CPUPWRGD 7B3
OUT
TP_SB_XOR-U7 U7
CPU
LAN_TXD0 AG22 CPU_IGNNE_L
TP_SB_XOR-V6 V6 IGNNE* 7C8
OUT
LAN_TXD1 AG21 47C5 6B2 5C2 FWH_INIT_L
5% TP_SB_XOR-V7 V7 INIT3_3V* OUT
1/16W
LAN_TXD2 AF22 7D6 CPU_INIT_L =PP1V05_S0_SB_CPU_IO
INIT* OUT NOSTUFF 21C1 24C3 25C4 64D6
C 54D7 5C1
OUT
ACZ_BITCLK R2195 1
MF-LF
402
2 39 SB_ACZ_BITCLK U1
ACZ_BIT_CLK
INTR
AF25 7C8 CPU_INTR
OUT R2100
0
NOTE: R2108=56 IN CV.
C
54D7 5C1
OUT
ACZ_SYNC R2198 1 2 39 SB_ACZ_SYNC R6
ACZ_SYNC RCIN*
AG23 CPU_RCIN_L
NOTE: KEYBOARD CONTROLLER RESET CPU
1 2 45C8 SMC_RCIN_L IN CHANGED TO 54.9 FOR
AC-97/
2
AZALIA
57C3 54C7 5C1
OUT
ACZ_RST_L R2197 1 2 39 SB_ACZ_RST_L R5
ACZ_RST* NMI
AH24 7C8 CPU_NMI
OUT NOTE: RISING-EDGE TRIGGERED AT CPU
MF-LF 402
1/16W 5%
BOM CONSOLIDATION R2108 LAYOUT NOTE: R2108 TO BE
54D7 5D1
IN
ACZ_SDATAIN<0> T2
ACZ_SDIN0 SMI*
AF23 7C8 CPU_SMI_L OUT
54.9 < 2 IN OF R2107 W/O STUB
MF-LF 402
TP_SB_ACZ_SDIN1 T3 20K PD 1/16W 1%
ACZ_SDIN1 AH22 CPU_STPCLK_L 1
TP_SB_ACZ_SDIN2 T1 20K PD
ACZ_SDIN2
STPCLK* 7C8
OUT R2107
20K PD AF26 24.9 2 46B3
R2196 T4 THRMTRIP* CPU_THERMTRIP_R 1 14B6 7C6 PM_THRMTRIP_L IN
54D7 5D1
OUT
ACZ_SDATAOUT 1 2 39 SB_ACZ_SDATAOUT ACZ_SDOUT MF-LF 402
1/16W 1%
TP_SB_SATALED_L AF18 SATALED* DD0
AB15 34C5 IDE_PDD<0> IO
AE14 LAYOUT NOTE: R2107 TO BE
AF3 DD1 34C5 IDE_PDD<1> IO
6C4
IN
SATA_A_D2R_N SATA_0RXN AG13 < 2 IN OF SB
AE3 DD2 34C5 IDE_PDD<2> IO
6C4
IN
SATA_A_D2R_P SATA_0RXP AF13
DD3 34C5 IDE_PDD<3>
6C4 SATA_A_R2D_C_N AG2 IO
OUT SATA_0TXN AD14 34C5 IDE_PDD<4>
6C4 SATA_A_R2D_C_P AH2 DD4 IO
OUT SATA_0TXP AC13 34C5 IDE_PDD<5>
DD5 IO
35D4 IN SATA_C_D2R_N AF7 AD12 34C5 IDE_PDD<6>
SATA_2RXN DD6
SATA
IO
AE7 AC12
IDE
35C4
IN
SATA_C_D2R_P SATA_2RXP DD7 34C5 IDE_PDD<7>
IO NOTE: DD<7> HAS INTERNAL 11.5K PD
35D4 SATA_C_R2D_C_N AG6 AE12 34C3 IDE_PDD<8>
OUT SATA_2TXN DD8 IO
35D4 SATA_C_R2D_C_P AH6 AF12 34C3 IDE_PDD<9>
OUT SATA_2TXP DD9 IO
AB13 34C3 IDE_PDD<10>
33B3 33B2 SB_CLK100M_SATA_N AF1 DD10 IO
IN SATA_CLKN AC14 34C3 IDE_PDD<11>
33B3 33B2 SB_CLK100M_SATA_P AE1 DD11 IO
IN SATA_CLKP AF14 34C3 IDE_PDD<12>
DD12 IO
35D2 SATA_RBIAS_N AH10 AH13 34C3 IDE_PDD<13>
IN SATARBIASN DD13 IO
35D2 SATA_RBIAS_P AG10 AH14 34C3 IDE_PDD<14>
IN SATARBIASP DD14 IO
AC15 34C3 IDE_PDD<15>
DD15 IO
IDE_PDIOR_L AF15
34C3 DIOR* (HSTROBE) AH17
B 34B5
OUT
OUT
IDE_PDIOW_L AH15
AF16
DIOW* (STOP)
DA0
DA1
AE17
34B5 IDE_PDA<0>
34B5 IDE_PDA<1>
OUT
OUT
B
34B3
OUT
IDE_PDDACK_L DDACK* AF17
DA2 34B3 IDE_PDA<2>
34B6 IDE_IRQ14 AH16 OUT
IN IDEIRQ
IDE_PDIORDY AG16 AE16 IDE_PDCS1_L
34B6
IN IORDY (DSTROBE) DCS1* 34B5
OUT
34B6 IDE_PDDREQ AE15 AD16 34B3 IDE_PDCS3_L
IN DDREQ DCS3* OUT
NOTE: DDREQ HAS INTERNAL 11.5K PD
NOTE: ALL IDE PINS HAVE INTERNAL 33-OHM SERIES R’S
AC ’07 INTEL HIGH DEFINITION AUDIO

SB: 1 OF 4
A ACZ_BIT_CLK INTERNAL 20K PD ENABLED WHEN
- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR
INTERNAL 20K PD ONLY ENABLED IN S3COLD
A
ACZ_RST# NONE
- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED
ACZ_SDIN[0-2] INTERNAL 20K PD INTERNAL 20K PD AGREES TO THE FOLLOWING
ACZ_SDOUT INTERNAL 20K PD ENABLED DURING RESET AND WHEN INTERNAL 20K PD ENABLED WHEN
- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR - LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR
- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED - BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED
ACZ_SYNC INTERNAL 20K PD
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 21 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
64A3 =PP3V3_S5_SB_USB
LEMENU
USB_C_OC_PU USB_D_OC_PU USB_E_OC_PU 1 1 1
1
R2225 1
R2200 1
R2250 1
R2255 1
R2251 R2223 R2226 R2208 U2100
10K 10K 10K ICH7-M
10K 10K 10K 10K 10K 5% 5% 5% F26 V26
5% 5% 5% 5% 5% 1/16W 1/16W 1/16W 36D5 PCIE_A_D2R_N PERN1 DMI0RXN 14B4 DMI_N2S_N<0>
1/16W 1/16W 1/16W 1/16W 1/16W MF-LF MF-LF MF-LF
IN
F25 SB V25
IN
MF-LF MF-LF MF-LF MF-LF MF-LF 2 402 2 402 2 402
36D5
IN PCIE_A_D2R_P PERP1 BGA DMI0RXP 14B4 DMI_N2S_P<0> IN
2 402 2 402 2 402 2 402 2 402 36C5 PCIE_A_R2D_C_N E28 U28 DMI_S2N_N<0>
OUT PETN1 (3 OF 6) DMI0TXN 14B4
OUT
36C5 PCIE_A_R2D_C_P E27 U27 14B4 DMI_S2N_P<0>
OUT PETP1 DMI0TXP OUT
22C4 6C1 USB_A_OC_L H26 Y26
43C7
IN
PCIE_B_D2R_N PERN2 DMI1RXN 14B4 DMI_N2S_N<1> IN
22C4 USB_B_OC_L
D 22C4 6C1 USB_C_OC_L

43C7
43B7
IN
OUT
PCIE_B_D2R_P
PCIE_B_R2D_C_N
H25
G28
PERP2
PETN2
DMI1RXP
DMI1TXN
Y25
W28
14B4 DMI_N2S_P<1>
14B4 DMI_S2N_N<1>
IN
OUT
D
22C4 USB_D_OC_L G27 W27
43B7
OUT
PCIE_B_R2D_C_P PETP2 DMI1TXP 14B4 DMI_S2N_P<1>
OUT
22C4 USB_E_OC_L
6C4 PCIE_C_D2R_N K26 AB26 DMI_N2S_N<2>
IN PERN3 DMI2RXN 14B4
IN
6C4 PCIE_C_D2R_P K25 AB25 14B4 DMI_N2S_P<2>
IN PERP3 DMI2RXP IN
PCI-EXP
6C4 PCIE_C_R2D_C_N J28 AA28 14B4 DMI_S2N_N<2>
OUT PETN3 DMI2TXN OUT
DMI
6C4 PCIE_C_R2D_C_P J27 AA27 14B4 DMI_S2N_P<2>
SB_GPIO29 OUT PETP3 DMI2TXP OUT
22C4
6C4 IN PCIE_D_D2R_N M26 AD25 DMI_N2S_N<3>

PERN4 DMI3RXN 14B4
IN
SB_GPIO31 6C4 PCIE_D_D2R_P M25 AD24 14B4 DMI_N2S_P<3>
22C4 IN PERP4 DMI3RXP IN
6C4 PCIE_D_R2D_C_N L28 AC28 14B4 DMI_S2N_N<3>
OUT PETN4 DMI3TXN OUT
SB_GPIO30 6C4 PCIE_D_R2D_C_P L27 AC27 14B4 DMI_S2N_P<3>
36D8 22C4 OUT PETP4 DMI3TXP OUT
=PP3V3_S5_SB_IO 6C4 PCIE_E_D2R_N P26 AE28 33C3 33B2 SB_CLK100M_DMI_N

64A3 IN PERN5 DMI_CLKN IN
PP1V5_S0_SB_VCC1_5_B
6C4 PCIE_E_D2R_P P25 AE27 33C3 33B2 SB_CLK100M_DMI_P
24D5 25B6
IN PERP5 DMI_CLKP IN
PCIE_E_R2D_C_N N28
2 2 2
6C4
OUT
N27
PETN5
DMI_ZCOMP
C25 R2203 LAYOUT NOTE:
NOSTUFF 6C4
OUT
PCIE_E_R2D_C_P PETP5 D25 1
24.9 2
DMI_IRCOMP DMI_IRCOMP_R PLACE R2203 < 1/2 IN FROM SB
R2205 R2206 R2207 6C4
IN
PCIE_F_D2R_N T25
PERN6 1/16W MF-LF 1% 402
10K 10K 10K 6C4 PCIE_F_D2R_P T24 F1 6C1 USB_A_N
MF-LF MF-LF MF-LF IN PERP6 USBP0N IO
R28 F2 EXTERNAL 0
1/16W 1/16W 1/16W 6C4 PCIE_F_R2D_C_N PETN6 USBP0P 6C1 USB_A_P IO
402 5% 402 5% 402 5% OUT
1 1 1 6B4 PCIE_F_R2D_C_P R27 G4 6C1 USB_B_N
OUT PETP6 USBP1N IO
G3 TRACKPAD (Geyser)
USBP1P 6C1 USB_B_P
IO
50C7 45D5 SPI_SCLK R2 H1 6C1 USB_C_N
IO SPI_CLK (INT PD) USBP2N IO
P6 H2 EXTERNAL 1
50C7 45B5 SPI_CE_L SPI_CS* USBP2P 6C1 USB_C_P
SPI
IO IO
45D5 SPI_ARB P1 J4 6C1 USB_D_N
IO SPI_ARB (INT PD) USBP3N IO
J3 CAMERA NOTE: USBP[0-7]P/N HAVE INTERNAL 15K PD
6C1 USB_D_P
USB
50C1 45D5 SPI_SI P5 USBP3P IO
IO SPI_MOSI K1 6C1 USB_E_N
P2 USBP4N IO
C 50C1 45D5
IO
SPI_SO SPI_MISO
USBP4P
K2
L4
6C1 USB_E_P
6C1 USB_F_N
IO
EXTERNAL 2
C
USB_A_OC_L D3 USBP5N IO
22D8 6C1
IN OC0* L5 IR
USBP5P 6C1 USB_F_P
22D8 USB_B_OC_L
C4 IO
OC1* M1 6B1 USB_G_N
D5 USBP6N IO
22D8 6C1 USB_C_OC_L OC2* M2 BT
USBP6P 6B1 USB_G_P
22D8 USB_D_OC_L
D4 IO
OC3* N4 6B1 USB_H_N
E5 USBP7N IO
22D8 USB_E_OC_L OC4* N3 AIRPORT
USBP7P 6B1 USB_H_P
22D8 SB_GPIO29
C3 IO
OC5*/GPIO29
36D8 22D8 SB_GPIO30
A2
OC6*/GPIO30 USBRBIAS*
D2 R2204
B3 D1 22.6 2
22D8 SB_GPIO31 OC7*/GPIO31 USBRBIAS USB_RBIAS_PN 1
1%
1/16W
MF-LF VOLTAGE=0
402
LAYOUT NOTE:
PLACE R2204 < 1/2 IN FROM SB
=PP3V3_S0_SB 25D8 34C8 64B6
NOTE:
GNT[0-3]# HAVE INT 20K PU
ENABLED ONLY WHEN PCIRST#=0
LEMENU AND PWROK=H
1
38C5 PCI_AD<0> E18
AD0 REQ0*
D7 26C3 PCI_REQ0_L
R2299
38C5
IO
IO
PCI_AD<1> C18
AD1
U2100 GNT0*
E7 TP_PCI_GNT0_L
IN
OUT
10K
5%
38C5 PCI_AD<2> A16
AD2
ICH7-M REQ1*
C16 26C3 PCI_REQ1_L
1/16W
MF-LF
IO IN
38C5 PCI_AD<3> F18
AD3
SB GNT1*
D16 TP_PCI_GNT1_L 2 402
IO
E16
BGA C17
OUT
38C5
IO
PCI_AD<4> AD4 (2 OF 6) REQ2* 26C3 PCI_REQ2_L
IN
38C5 PCI_AD<5> A18 D17 TP_PCI_GNT2_L
IO AD5 GNT2* OUT
38C5 PCI_AD<6> E17 E13 38A5
26C3 PCI_REQ3_L
IO AD6 REQ3* IN
38C5 PCI_AD<7> A17 F13 38A5 PCI_GNT3_L
IO AD7 GNT3* IN
38C5 PCI_AD<8> A15 6B1 A13 TP_SB_GPIO22 IO NOTE: FWH_WP_L NOT USED
AD8 REQ4*/GPIO22
B 38C5
IO
IO PCI_AD<9> C14
E14
AD9 GNT4*/GPIO48
A14
C8
NOTE: TBL_L NET REMOVED
NOTE:
NOT PLANNED TO GO TO LPC+ CONN B
38C5
IO
PCI_AD<10> AD10 GPIO1/REQ5* 38A5 PCI_PME_FW_L IN
38C5 PCI_AD<11> D14 D8 47C6 45C8 5C2 BOOT_LPC_SPI_L
IO AD11 GPIO17/GNT5* OUT
38B5 PCI_AD<12> B12
IO AD12
38B5 PCI_AD<13> C13
IO AD13 1
38B5
IO
PCI_AD<14> G15
AD14 B15
BOM NOTE: R2211
G13 38B5
C/BE0* PCI_C_BE_L<0> IO NO STUFF - DEFAULT 1K
38B5
IO PCI_AD<15> AD15 C12 5%
E12 C/BE1*
38B5 PCI_C_BE_L<1> IO STUFF - A16 SWAP OVERRIDE 1/16W
38B5
IO
PCI_AD<16> AD16 D12 MF-LF
PCI PCI_C_BE_L<2>
2 402
38B5 (STRAPPED TO TOP-BLOCK SWAP MODE
PCI_AD<17> C11 C/BE2* IO
38B5
IO AD17 C15 IE SB INVERTS A16 FOR ALL CYCLES
D11 38B5
C/BE3* PCI_C_BE_L<3> IO TARGETING FWH BIOS SPACE)
38B5
IO
PCI_AD<18> AD18
38B6 PCI_AD<19> A11 A7 38A5 26D3 PCI_IRDY_L
IO AD19 IRDY* IO
38B5 PCI_AD<20> A10 E10 38B5 PCI_PAR
IO AD20 PAR IO
38B5 PCI_AD<21> F11 A9 33D6 PCI_CLK_SB
IO AD21 PCICLK IN
38B5 PCI_AD<22> F10 A12 38A5
26D3 PCI_DEVSEL_L SB BOOT BIOS SELECT
IO AD22 DEVSEL* IO
38B5 PCI_AD<23> E9 C9 38A5 26D3 PCI_PERR_L
IO AD23 PERR* IO
D9 E11 GNT5# GNT4#
38B5
IO PCI_AD<24> AD24 PLOCK* 26D3 PCI_LOCK_L
IO
B9 B10 38A5 STRAP R2211 R2210
38B5
IO PCI_AD<25> AD25 SERR* 26D3 PCI_SERR_L
IO
38B5 PCI_AD<26> A8 F15 38A5
26D3 PCI_STOP_L LPC (DEFAULT) 11 UNSTUFF UNSTUFF
IO AD26 STOP* IO
38B5 PCI_AD<27> A6 F14 38A5
26D3 PCI_TRDY_L
IO AD27 TRDY* IO
C7 PCI 10 UNSTUFF STUFF
38B5
IO PCI_AD<28> AD28 C26
B6 PLTRST* PLT_RST_L
26C3
OUT
38B5
IO
PCI_AD<29> AD29 B18 SPI 01 STUFF UNSTUFF
E6 PCIRST* PCI_RST_L
38A6
OUT
38B5
IO PCI_AD<30> AD30 B19
D6 (INT 20K PU) PME* TP_PCI_PME_L NOTE: GNT4# HAS INT PU; ENABLED ONLY WHEN PCIRST#=0 AND PWROK=H
38B5
IO PCI_AD<31> AD31
GNT5# HAS INT PU (NOMINAL=20K, SIMULATION=15K-35K)
38A5 26D3
IO
PCI_FRAME_L F16 FRAME*
SB: 2 OF 4
A 26C3
26C3
IO
INT_PIRQA_L
INT_PIRQB_L
A3
B4
PIRQA*
PIRQB*
INT I/F GPIO2/PIRQE*
GPIO3/PIRQF*
G8
F7
26C3
26C3
23A4
SB_GPIO2
SB_GPIO3
IO
A
IO IO
26C3 INT_PIRQC_L C5 F8 26C3 SB_GPIO4
IO PIRQC* GPIO4/PIRQG* IO
B5 G7 34C8 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
38A5 26C3
IO INT_PIRQD_L PIRQD* GPIO5/PIRQH* 26C3 SB_GPIO5
IO PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AE5 AE9 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
TP_SB_XOR-AE5 RSVD0 MISC RSVD5 TP_SB_XOR_AE9
AD5 AG8 II NOT TO REPRODUCE OR COPY IT
TP_SB_XOR-AD5 RSVD1 RSVD6 TP_SB_XOR_AG8
AG4 AH8 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
TP_SB_XOR-AG4 RSVD2 NOTE: CHANGE SYMBOL RSVD7 TP_SB_XOR_AH8
TP_SB_XOR-AH4 AH4 TO RSVD[1-9] F21 TP_SB_RSVD9 (AKA TP3, INTERNAL 20K PU) SIZE DRAWING NUMBER REV.
RSVD3 RSVD8
TP_SB_XOR-AD9 AD9 AH20 14B6 NB_SB_SYNC_L
RSVD4 MCH_SYNC* IN
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 22 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
NOTE FOR R2323 (DEF=NOSTUFF)
STRAPPING @ PWROK RISING:
SB WILL DISABLE TCO TIMER
SYSTEM REBOOT FEATURE
=PP3V3_S0_SB_GPIO 21C3 21D3 23B2 64B6
=PP3V3_S5_SB 23A7 23B7 23D8 25C8 64A3
8 7 6 5
1 1 1 1 1 NOSTUFF 1 NOSTUFF 1 NO_REBOOT_MODE
RP2300 =PP3V3_S5_SB_PM 11B5 26C5 64A3
R2318 R2395 R2396 R2397 R2327 R2326 R2323 10K LEMENU
D 10K
1/16W
2 402
8.2K
1/16W
2 402
10K
1/16W
2 402
8.2K
1/16W
2 402
10K
1/16W
2 402
10K
1/16W
2 MF-LF
1K
1/16W
2 402
5%
1/16W
SM-LF U2100 1 1
D
MF-LF
5%
MF-LF
5%
MF-LF
5%
MF-LF
5%
MF-LF
5%
402
5%
MF-LF
5% 1 2 3 4
ICH7-M R2319 R2343
64A3 25C8 23D4 23B7 23A7 =PP3V3_S5_SB SB 10K 8.2K
BGA SATA GPIO 1/16W 5%
1 1 1 1
27D8
IO
SMB_CLK C22
SMBCLK
(4 OF 6)
GPIO21/SATA0GP
AF19 SB_GPIO21 100 1 2 R2302 2 402
MF-LF 2 1/16W
MF-LF
SMB_DATA B22 AH18 SB_GPIO19 100 1 2 R2303 5% 402
SMB
27D8
IO SMBDATA GPIO19/SATA1GP
R2398 R2320 R2317 R2316 SMB_LINK_ALERT_L A26 LINKALERT* GPIO36/SATA2GP
AH19 35D2 SATA_C_DET_L IN
1K 10K 10K 10K B25 AE19 SB_GPIO37 R2305
1/16W 1/16W 1/16W 1/16W SMLINK<0> SMLINK0 GPIO37/SATA3GP 100 1 2
2 402
MF-LF 2 402
MF-LF 2 402
MF-LF 2 402
MF-LF NOT USED SMLINK<1> A25
SMLINK1
5% 5% 5% 5%
AC1 33A6 SB_CLK14P3M_TIMER
CLK14
CLKS
PM_RI_L A28 IN
RI* B2 33C7 SB_CLK48M_USBCTLR
CLK48 IN
SB_SPKR A19
SPKR (INT WEAK PD) C20 6B4 SUS_CLK_SB
53C6 47C5 46D3 45D5 5C2 PM_SUS_STAT_L A27 SUSCLK OUT
OUT SUS_STAT*
45C8 26C5 PM_SYSRST_L A22
IN SYS_RST* B24 63B8
PM_SLP_S3_L
SLP_S3* 63A7 45C5
OUT
14B6 PM_BMBUSY_L AB18 D23 63D6 61B8
60C8 45C5 PM_SLP_S4_L
IN GPIO0/BM_BUSY* SLP_S4* OUT
F22 46D3 45C5 PM_SLP_S5_L
SLP_S5*
SYS GPIO
PWR MNGT
SMB_ALERT_L B23 OUT
GPIO11/SMBALERT*
NOTE: RESERVED FOR FUTURE AA4
AC20 PWROK 26A6 PM_SB_PWROK IN
32C4
OUT
PM_STPPCI_L GPIO18/STPPCI*
32C4 PM_STPCPU_L AF21 AC22 58D8 14B7 PM_DPRSLPVR
OUT GPIO20/STPCPU* GPIO16/DPRSLPVR OUT
A21 C21 NOTE: DPRSLPVR HAS INT 20K PD, ENABLED AT BOOT/RESET FOR STRAPPING FCN
IN
SB_GPIO26 GPIO26 TP0/BATLOW* 45B8 PM_BATLOW_L IN
BIOS_REC B21 (INT 20K PU) PWRBTN*

C23 45D8 PM_PWRBTN_L
23A6 GPIO27 IN
FWH_MFG_MODE E23
23A6 GPIO28 C19 PM_LAN_ENABLE
LAN_RST* 45D8
IN NOTE:
AG18 SMC WILL DRIVE 0-1-0 TO KEEP LAN INT’F
53C6 47C6 45D5 38A5 5C2
IO PM_CLKRUN_L GPIO32/CLKRUN* Y4 IN RESET STATE TO SAVE PWR
RSMRST* 45D8 PM_RSMRST_L IN
AC19
C RESERVED FOR MOBILE
AZALIA DOCKING INT’F
TP_AZ_DOCK_EN_L
TP_AZ_DOCK_RST_L U2
GPIO33/AZ_DOCK_EN*
GPIO34/AZ_DOCK_RST* E20 SMS_INT_L
46D6 45B5 NOTE: PATA_DET IS ACTUALLY CABLE TYPE DETECT
R2399
1 2
100K C
GPIO9 IN
5% 1/16W
A20 SMC_SB_NMI
45D8 402 MF-LF
43C6 36C6 PCIE_WAKE_L F20 GPIO10 IN
IN WAKE* F19 23B3 PATA_PWR_EN_L
AH21 DEF=GPI GPIO12 OUT
53C6 47C5 45C8 5C2
IO
INT_SERIRQ SERIRQ E19
AF20 GPIO13 45D5 SMC_WAKE_SCI_L IN
45B8 IN PM_THRM_L THRM* R4
DEF=GPI GPIO14 SB_GPIO14
23A4
OUT
E22 SV_SET_UP 5C2 23B6 47B5
26A8 VR_PWRGD_CK410 AD22 GPIO15
IN VRMPWRGD R3 CRB_SV_DET 23B6
GPIO24
D20 TP_SB_GPIO25_DO_NOT_USE
GPIO25
R2300 IO TP_SB_GPIO6 AC21
GPIO6 OD GPIO35
AD21 32B4 SB_CLK100M_SATA_OE_L
OUT
45B8
IN
SMC_RUNTIME_SCI_L 1 2 0 SB_RUNTIME_SCI_L AC18
GPIO7 GPIO GPIO38
AD20 TP_SB_GPIO38 IO
45B8 SMC_EXTSMI_L E21 DEF=GPI AE20 23A3 SATA_C_PWR_EN_L
IN GPIO8 GPIO39 OUT
NOTE FOR GPIO25:

- HAS INTERNAL 20K PU, ENABLED DURING RSMRST# AND DISABLED WITHIN 100MS AFTER RSMRST# DEASSERTS
- CAN NOT BE LOW FOR 35US AFTER RSMRST# ON BOOT (DMI AC COUPLING MODE STRAP)
=PP3V3_S0_SB_GPIO 21C3 21D3 23D5 64B6
64A3 25C8 23D8 23D4 23A7 =PP3V3_S5_SB
B 1 NOSTUFF 1
NOTE: B
SV_SET_UP IS LINDACARD DETECT
1 1
R2306 R2308 HI = PRESENT R2390 R2388
10K 10K LO = NOT PRESENT 10K 10K
1/16W 1/16W 5% 5%
2 402
MF-LF 2 402
MF-LF
1/16W
MF-LF
1/16W
MF-LF
5% 5% 2 402 2 402
SV_SET_UP 5C2 23C3 47B5
CRB_SV_DET 23C3 23C3 PATA_PWR_EN_L
23B3 SATA_C_PWR_EN_L
1 1 NOSTUFF
LAYOUT NOTE:
R2307 R2309
PLACE R2306-14 WHERE PHYSICALLY ACCESSIBLE 10K 0 NOSTUFF
1/16W 1/16W
2 402
MF-LF
402
2 MF-LF R2312
5% 5%
1
0 2
26C3 22A6 SB_GPIO3
5%
1/16W
MF-LF
402
IDE_RESET_L 34C5
64A3 25C8 23D8 23D4 23B7 =PP3V3_S5_SB R2315

0
1 1 23C3 SB_GPIO14 1
5%
2
SB: 3 OF 4
A R2313 R2310 1/16W
10K
1/16W
10K
1/16W
R2389
15K
1 MF-LF
402
A
402
2 MF-LF 2 402 5%
MF-LF 1/16W
5% 5% MF-LF THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
FWH_MFG_MODE 23C5 402 2 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
BIOS_REC 23C5
1 NOSTUFF 1 NOSTUFF II NOT TO REPRODUCE OR COPY IT

R2314 R2311
0
1/16W
10K
1/16W
R2312,R2315 and R2389 close to SB SIZE DRAWING NUMBER REV.
2 402
MF-LF
5%
2 402
MF-LF
5% APPLE COMPUTER INC.
D 051-7374 A
SCALE SHT OF
NONE 23 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
LEMENU
LEMENU
25D7 PP5V_S0_SB_V5REF G10 L11 =PPVCORE_S0_SB 25D3 64D6
A4 AD3
AD17 V5REF L12
A23 U2100 AD4
U2100 L14
N24 ICH7-M AD7 25C7 PP5V_S5_SB_V5REF_SUS F6
V5REF_SUS ICH7-M L16
P24 SB AD8
AA22 SB L17
R18 BGA AD15 25B6 22C1 PP1V5_S0_SB_VCC1_5_B
(6 OF 6) AA23 BGA L18
U14 AD19 (5 OF 6)
AB22 M11
V27 AD23
AB23 M18
AA24 AE2
AC23 P11
AB27 AE4 CORE
AC24 P18
D
AD11
B1
AE8
AE11
AC25
AC26
VCC1_05 T11
T18
D
D10 AE13
AD26 U11
F4 AE18
AD27 U18
G18 AE21
AD28 V11
J1 B8
D26 V12
L24 B11
D27 V14 NOTE FOR VCCLAN_3_3:
M17 B14
D28 V16 S3 IF INTERNAL LAN IS USED
N14 B17
E24 V17 S0 OR S3 IF NOT
N17 B20
N18
VSS B26
E25 V18
E26
N25 B28 V5 =PP3V3_S0_SB_VCCLAN3_3 25D3 64A6
F23
N26 C2 VCC PAUX V1
F24
P3 C6 VCCLAN_3_3 W2
G22
P4 C27 W7
G23 NOTE:
P12 D13
P13 D18
H22 VCCA3GP VCC3_3/VCCHDA U6 =PP3V3_S0_SB_3V3_1V5_VCCHDA 25C4 64A6 VCCHDA AND VCCSUSHDA CAN BE 1.5V OR 3.3V
H23 VCC1_5_B VCCSUS3_3/VCCSUSHDA R7 =PP3V3_S5_SB_3V3_1V5_VCCSUSHDA 64A3 DEPENDING ON VIO OF AZALIA INTERFACE
P14 D21
J22 CODEC IC’S CONSIDERED SO FAR ARE 3.3V
P15 D24 AE23 =PP1V05_S0_SB_CPU_IO 21C1 25C4 64D6
J23
P16 E1 AE26
K22 V_CPU_IO
P17 E2 AH26
K23
P27 E4
L22 AA7 =PP3V3_S0_SB_VCC3_3_IDE 25B4 64B6
P28 E8
L23 AB12
R1 E15
M22 AB20
R11 F3
R12 F5
M23 IDE AC16
N22 VCC3_3 AD13
R13 F12
N23 AD18
C R14
R15
F27
F28
P22 AG12 C
P23 AG15
R16 G1
R22 AG19
R17 G2
R23
T6 G5
R24 A5
T12 G6
R25 B13
T13 G9
R26 B16
T14 G14
T22 B7
T15 G21 PCI
T23 C10
T16 G24 VCC3_3
T26 D15
T17 G25
T27 F9
U4 G26
T28 G11
U12 H3
U22 G12
U13 H4
U23 G16 =PP3V3_S0_SB_VCC3_3_PCI 25A4 64B6
U15 H5
V22
U16 H24 W5 PP3V3_S5_SB_RTC
V23 VCCRTC 21D6 25A4 26D3
U17 H27
W22 P7 =PP3V3_S5_SB_VCCSUS3_3 24A5 25B6 25D2 64A3
U24 H28
W23
U25 J2 A24
Y22
U26 J5 C24
Y23
V2 J24 D19
VCCSUS3_3
V13 J25 =PP3V3_S0_SB_VCC3_3 B27 D22
64B6 25C6 25B8 24B5 VCC3_3
V15 J26 G19
PP1V5_S0_SB_VCCDMIPLL AG28
V24 K24 25A5 VCCDMIPLL
K3
V28 K27 64C6 25D6 =PP1V5_S0_SB_VCC1_5_A_ARX AB7
K4
W6 K28 AC6
K5
W24 L13 AC7
B W25 L15 AD6
K6 B
W26 L25 AE6
ARX L1
VCC1_5_A L2
Y3 L26 AF5 USB L3
Y24 M3 AF6 VCCSUS3_3
L6
Y27 M4 AG5
L7
Y28 M5 AH5
M6
AA1 M12
=PP1V5_S0_SB_VCCSATAPLL AD2 M7
AA25 M13 64C6 25D6 VCCSATAPLL
N7 =PP3V3_S5_SB_VCCSUS3_3_USB 25D2 64A3
AA26 M14 =PP3V3_S0_SB_VCC3_3 AH11
64B6 25C6 25B8 24B5 VCC3_3
AB4 M15 AB17
=PP1V5_S0_SB_VCC1_5_A_ATX AB10
AB6 M16 64C6 25C6
VCC1_5_A AC17
AB9
AB11 M24
AC10 T7
AB14 M27
AD10 F17
AB16 M28 ATX VCC1_5_A
AE10 G17
AB19 N1 VCC1_5_A =PP1V5_S0_SB_VCC1_5_A
AF10 25C2 64C6
AB21 N2 AB8
AF9
AB24 N5 VCC1_5_A AC8
AG9
AB28 N6
AH9 K7
AC2 N11
AC5 N12 E3 VCCSUS3_3 VCCSAUS1_5 C28 VOLTAGE GENERATED INTERNALLY
64A3 25D2 25B6 24B3 =PP3V3_S5_SB_VCCSUS3_3
AC9 N13 CHANGE SYMBOL TO 1.05 G20 SO NO CONNECT HERE
=PP1V5_S0_SB_VCCUSBPLL C1
AC11 N15 64C6 25B6 VCCUSBPLL
A1
AD1 N16 VOLTAGE GENERATED INTERNALLY AA2
VCCLAN1_5 H6
AE24
AE25
AG11
AG14
SO NO CONNECT HERE Y7 CHANGE SYMBOL TO 1.05 USB CORE
VCC1_5_A
H7
J6
SB: 4 OF 4
A AF2
AF4
AG17
AG20
J7 =PP1V5_S0_SB_VCC1_5_A_USB_CORE 25B2 64C6
A
AF8 AG25
AF11 AH1 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
AF27 AH3 AGREES TO THE FOLLOWING
AF28 AH7 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
AG1 AH12 II NOT TO REPRODUCE OR COPY IT

AG3 AH23 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
AG7 AH27 SIZE DRAWING NUMBER REV.
APPLE COMPUTER INC.

D 051-7374 A
0 0 SCALE SHT OF
NONE 24 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
ICH VCCSUS3_3 BYPASS
ICH VCC1_5_A/ARX BYPASS
ICH CORE/VCC1_05 BYPASS (ICH SUSPEND 3.3V PWR)
64B6 34C8 22B5 =PP3V3_S0_SB (ICH LOGIC&IO[ARX] 1.5V PWR)
PLACEMENT NOTE: (ICH CORE 1.05V PWR)
64C6 24B5 =PP1V5_S0_SB_VCC1_5_A_ARX 64A3 25B6 24B3 24A5 =PP3V3_S5_SB_VCCSUS3_3
64D3 =PP5V_S0_SB PLACE CAPS AT EDGE OF SB
=PPVCORE_S0_SB
2 1 C2511 PLACEMENT NOTE:
24D3 64D6
R2502 1 0.1UF PLACE < 2.54MM OF SB ON SECONDARY OR

100 5
D2502 10%
16V
2 X5R 3.56MM ON PRIMARY NEAR PIN AG5
CRITICAL
PLACEMENT NOTE: 1 C2531 1 C2534
1/16W BAT54DW 1 C2518 1 C2502 1
C2516 PLACEHOLDER 0.1UF 0.1UF
NC
MF-LF 402
402 SOT-363 0.1UF 1UF 330UF PLACE CAPS NEAR PINS 10% 10%
6 ICH V5REF BYPASS FOR 270UF
1 5% 10%
16V
10%
6.3V 20% A24 ... G19 AND P7 OF SB 2 16V
X5R 2 16V
X5R
(ICH REFERENCE FOR 5V TOLERANCE ON CORE WELL INPUT) 0 2 X5R 2 CERM 2 2.5V 402 402
POLY
D
PP5V_S0_SB_V5REF 24D5
VOLTAGE=5V
MIN_LINE_WIDTH=0.3MM
402 402 CASE-C2
D
MIN_NECK_WIDTH=0.25MM
1 C2503 ICH VCCSATAPLL BYPASS
0
0
0.1UF (ICH SATA PLL 1.5V PWR)
10%
16V =PP1V5_S0_SB_VCCSATAPLL
2 X5R 64C6 24B5
402 PLACEMENT NOTE:
ICH VCC_PAUX/VCCLAN3_3 BYPASS
PLACE C2503 < 2.54MM OF PIN AD17 OF SB
ON SECONDARY SIDE OR 3.56MM ON PRIMARY
1 C2517 PLACEMENT NOTE: (ICH LAN I/F BUFFER 3.3V PWR)
0 0.1UF PLACE < 2.54MM OF SB ON SECONDARY OR =PP3V3_S0_SB_VCCLAN3_3 24D3 64A6 ICH USB/VCCSUS3_3 BYPASS
10%
2 16V
X5R 3.56MM ON PRIMARY NEAR PIN AD2 (ICH SUSPEND USB 3.3V PWR)
402
PLACEMENT NOTE:
1 C2519
0.1UF 64A3 24B3 =PP3V3_S5_SB_VCCSUS3_3_USB
0 PLACE CAP UNDER SB NEAR PINS V1, 10%
16V
2 X5R
64A3 23D8 23D4 23B7 23A7 =PP3V3_S5_SB V5, W2, OR W7 402
=PP5V_S5_SB 0
64A3
ICH VCC3_3 BYPASS
PLACEMENT NOTE:
1 C2533 1 C2532
0.1UF 0.1UF
R2501
2
4 (ICH IO BUFFER 3.3V PWR) 10% 10%

PLACE CAPS NEAR PINS
10 2
D2502 64B6 25B8 24B5 =PP3V3_S0_SB_VCC3_3
K3 ... N7 OF SB
16V
2 X5R
16V
2 X5R
1/16W 402 402
BAT54DW ICH VCC3_3/VCCHDA BYPASS
NC
MF-LF SOT-363
402 3 ICH V5REF_SUS BYPASS 1 C2513 (ICH INTEL HDA CORE 3.3V PWR)
1
5% PLACEMENT NOTE:
(ICH REFERENCE FOR 5V TOLERANCE ON RESUME WELL LOGIC) 0.1UF 64A6 24C3 =PP3V3_S0_SB_3V3_1V5_VCCHDA
10% PLACE < 2.54MM OF SB ON SECONDARY OR 0
PP5V_S5_SB_V5REF_SUS 24D5 16V
2 X5R
VOLTAGE=5V 402 3.56MM ON PRIMARY NEAR PIN AH11
1 C2504 0 PLACEMENT NOTE:
0.1UF 1 C2521
10% PLACE < 2.54MM OF SB ON SECONDARY OR
16V
2 X5R PLACEMENT NOTE: 0.1UF
3.56MM ON PRIMARY NEAR PIN U6 10%
402 PLACE C2504 < 2.54MM OF PIN F6 OF SB 16V
2 X5R
402
ON SECONDARY SIDE OR 3.56MM ON PRIMARY
C 0
ICH VCC1_5_A/ATX BYPASS
(ICH LOGIC&IO[ATX] 1.5V PWR) 0
ICH VCC1_5A BYPASS
C
64C6 24A5 =PP1V5_S0_SB_VCC1_5_A_ATX
(ICH LOGIC&IO 1.5V PWR)
1 C2514 PLACEMENT NOTE: =PP1V5_S0_SB_VCC1_5_A
1UF 64C6 24A3
10% PLACE < 2.54MM OF SB ON SECONDARY OR ICH V_CPU_IO BYPASS
6.3V
2 CERM
3.56MM ON PRIMARY NEAR PIN AG9 (ICH CPU I/O 1.05V PWR)
402
24C3 21C1 =PP1V05_S0_SB_CPU_IO PLACEMENT NOTE:
1 C2510
64D6
0.1UF
25A8 =PP1V5_S0_SB 0 PLACE CAPS NEAR PINS 10%
64C6 16V
2 X5R
ICH VCCA3GP(VCC1_5_B BYPASS AB8 AND AC8 OF SB
L2500 (ICH IO,LOGIC 1.5V PWR)
PLACEMENT NOTE: 402
100-OHM-EMI PLACE NEAR PINS AE23, AE26 & AH26 OF SB
SM-3
1 2 0
PP1V5_S0_SB_VCC1_5_B 22C1 24D5
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.5MM ICH VCCSUS3_3 BYPASS
CRITICAL (ICH SUSPEND 3.3V PWR)
1
C2500 1 C2505 1 C2506 1 C2507 =PP3V3_S5_SB_VCCSUS3_3
1 C2523 1 C2522 1 C2524
220UF 0.1UF 0.1UF 0.1UF 64A3 25D2 24B3 24A5
0.1UF 0.1UF 4.7UF
20% 10% 10% 10% 10% 10% 20%
2 2.5V 2 16V 2 16V 2 16V 2 16V 2 16V 2 6.3V
POLY
SMB2
X5R
402
X5R
402
X5R
402
1 C2520 PLACEMENT NOTE:
X5R
402
X5R
402
CERM
603
0.1UF ICH USB CORE/VCC1_5_A BYPASS
10% PLACE C2520 NEAR PIN E3 OF SB
16V
2 X5R (ICH USB CORE 1.5V PWR)
402
0 0
PLACEMENT NOTE: 64C6 24A3 =PP1V5_S0_SB_VCC1_5_A_USB_CORE
PLACE C2500 & C2505-07 < 2.54MM OF SB 0
ON SECONDARY SIDE OR 3.56MM ON PRIMARY ICH IDE/VCC3_3 BYPASS
NEAR PINS D28, T28, AD28 (ICH IDE I/O 3.3V PWR)
64B6 24C3 =PP3V3_S0_SB_VCC3_3_IDE PLACEMENT NOTE: 1 C2512
0.1UF
B ICH VCCUSBPLL BYPASS PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PINS A1 ... J7
10%
16V
2 X5R
B
(ICH USB PLL 1.5V PWR) PLACE < 2.54MM OF SB ON SECONDARY OR 1 C2525 402
ICH VCC3_3 BYPASS 3.56MM ON PRIMARY NEAR PINS AA7 ... AG19 0.1UF
64C6 24A5 =PP1V5_S0_SB_VCCUSBPLL 10%
16V
(ICH IO BUFFER 3.3V PWR) 2 X5R 0
64B6 25C6 24B5 =PP3V3_S0_SB_VCC3_3 1 C2515 PLACEMENT NOTE:
402
0.1UF
10% PLACE C2520 NEAR PIN C1 OF SB 0
16V
2 X5R
1 C2509 PLACEMENT NOTE: 402
0.1UF PLACE C2509 NEAR PIN B27 OF SB
10%
2 16V
X5R 0
402 ICH PCI/VCC3_3 BYPASS
(ICH PCI I/O 3.3V PWR)
0 64B6 24B3 =PP3V3_S0_SB_VCC3_3_PCI
PLACEMENT NOTE: 1 C2526 1 C2527 1 C2528

DISTRIBUTE IN PCI SECTION OF SB 0.1UF 0.1UF 0.1UF
10% 10% 10%
16V 16V 16V
NEAR PINS A5 ... G16 2 X5R 2 X5R 2 X5R
402 402 402
64C6 25C8 =PP1V5_S0_SB

L2507
SB: 4 OF 4
A R2500
1
0.28-OHM
ICH VCCDMIPLL BYPASS
(ICH DMI PLL 1.5V PWR) ICH VCCRTC BYPASS
A
1 2 PP1V5_S0_SB_VCCDMIPLL_F 1 2 PP1V5_S0_SB_VCCDMIPLL 24B5 (ICH RTC 3.3V PWR)
VOLTAGE=1.5V VOLTAGE=1.5V
1/10W 5% MIN_LINE_WIDTH=0.5MM 1206 MIN_LINE_WIDTH=0.5MM 26D3 24B3 21D6 PP3V3_S5_SB_RTC THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
MF-LF 603 MIN_NECK_WIDTH=0.25MM MIN_NECK_WIDTH=0.25MM PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
1 C2501 1 C2508 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
0.01UF 10UF 1 C2530 1 C2529
PLACEMENT NOTE: 10% 20% PLACEMENT NOTE: II NOT TO REPRODUCE OR COPY IT
2 16V 2 6.3V 0.1UF 0.1UF
CERM X5R 10% 10%
PLACE < 2.54MM OF SB ON 402 603 PLACE CAPS NEAR PIN W5 OF SB 16V 16V III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
2 X5R 2 X5R
SECONDARY SIDE OR 3.56MM ON PRIMARY 402 402
0
APPLE COMPUTER INC.
D 051-7374 A
0
SCALE SHT OF
NONE 25 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
=PP3V3_S0_SB_PCI 64B6
D2600
BAT54DW
RP2600
8.2K
64D1 =PP3V42_G3H_SB_RTC SOT-363 PP3V3_G3C_SB_RTC_D PP3V3_S5_SB_RTC 21D6 24B3 25A4 5%
1 6 MAKE_BASE=TRUE 1 8
38A5 22A7
IO PCI_FRAME_L
38A5 22A6 PCI_IRDY_L 2 7
5 NC IO
1 C2610 38A5 22A6
IO PCI_TRDY_L 3 6
1UF 38A5 22A6 PCI_STOP_L 4 5
10% IO
2 6.3V
CERM 1/16W
402 SM-LF
D2600
RTC Battery Connector BAT54DW R2600 RP2601 D
D PPVBATT_G3C_RTC_R
SOT-363
4 3 1
20K 2 21D6 SB_RTC_RST_L OUT
8.2K
5%
CRITICAL 5% 38A5 22A6 PCI_SERR_L 1 8
2 NC 1/16W IO
J2600 1 1 C2605 PCI_DEVSEL_L 2 7
88460-0201
R2607 MF-LF
402
1UF
38A5 22A6
IO
3 6
1K 1 10%
38A5 22A6
IO
PCI_PERR_L
F-RT-SM
SYM_1
3
5%
1/16W
R2606 2 6.3V
CERM 22A6
IO
PCI_LOCK_L 4 5
NC MF-LF 1M 402 1/16W
2 402 5%
1/16W
MF-LF
SM-LF
1 PPVBATT_G3C_RTC 2 402
2
21D6 SB_SM_INTRUDER_L OUT
RP2602
8.2K
4 5%
NC 22B6 PCI_REQ0_L 1 8
IN
518S0188 22B6
IN
PCI_REQ1_L 2 7
22B6
IN PCI_REQ2_L 3 6
38A5 22B6 PCI_REQ3_L 4 5
IN
1/16W
SM-LF
22A7 INT_PIRQA_L R2637 1 2 8.2K
22A7
IO
INT_PIRQB_L R2636 1 2 8.2K
22A7
IO
INT_PIRQC_L R2638 1 2 8.2K
38A5 22A7
IO INT_PIRQD_L R2639 1 2 8.2K
22A6
IO
SB_GPIO2 R2640 1 2 8.2K
23A4 22A6
IO
SB_GPIO3 R2642 1 2 8.2K
22A6
IO SB_GPIO4 R2641 1 2 8.2K
IO
SB_GPIO5 R2643 1 2 8.2K
SB RTC Crystal Circuit 64A3 23D1 11B5 =PP3V3_S5_SB_PM
34C8 22A6
IO
C C2608 R26971 C
R2610 10K
21D6 SB_RTC_X1 1
0
5%
2 SB_RTC_X1_R
CRITICAL
15pF
1
5%
2
R2696
5%
1/16W
MF-LF
402 2
Platform Reset Connections
1/16W
50V 1K 45C8
R26091 XDP_DBRESET_L XDP_DBRESET_L_R PM_SYSRST_L
10M
MF-LF
402 Y2600 1 CERM
402
11B4 7C6 IN 2
5%
1
OMIT
23C5
MAKE_BASE=TRUE OUT
Unbuffered
5% 32.768K 1/16W
1
1/16W
MF-LF SM-LF C2609
MF-LF
402 R2698 22A6
IN
PLT_RST_L NB_RST_IN_L 14B7
402 2 4 100K MAKE_BASE=TRUE
15pF This part is never stuffed,
21D6 SB_RTC_X2
197S0098
1 2 it provides a set of pads
5%
1/16W
MF-LF
Silk: "SYS RST" 100-ohm on NB page
402 2
Is this the best part to use? 5% on the board to short or R2687
50V to solder a reset button. 0
CERM 1 2 TMDS_RST_L 68B5
402
5%
1/16W
MF-LF
R2685 402
0
1 2 AIRPORT_RST_L 43C4
5%
1/16W
64A6 =PP3V3_S0_RSTBUF MF-LF
402
Buffered
5 MC74VHC1G08
1 SC70 R2681
0
2
U2680 4 PLT_RST_BUF_L 1 2 DEBUG_RST_L 5C2 47C6
5% Linda Card represents 3 loads

3
1
R2680
1/16W
MF-LF R2683
402 100
1 C2680 100K
5%
TPM 1 2 SMC_LRESET_L 45C8
0.1UF
B 64B6 26B6 =PP3V3_S0_SB_PM 64B6 26B8 =PP3V3_S0_SB_PM
20%
2 10V
CERM
1/16W
MF-LF
2 402
R2684
5%
1/16W
MF-LF
B
402 1
0 2
402
TPM_LRESET_L 53B7
1 C2611 5%
1/16W
0.1UF C2607 1 MF-LF
20% 1
2 10V
CERM
0.1UF
20%
R2611 402
402 10V 1.8K

CERM 2 5%
1/16W
402 MF-LF
2 402
MC74VHC1G00 5 MC74VHC1G08 5
1 58C7
64B3 =PP3V3_S3_RSTGATE Gated
SC70-5 1 SC70 14B6 VR_PWRGOOD_DELAY IN
VR_PWRGD_CK410 4 PM_SB_PWROK 4 NOSTUFF
OUT
23C5
U2603 2 VR_PWRGD_CK410_L
OUT
23C3
U2601 2 63B1
ALL_SYS_PWRGD NOSTUFF 1 1
58C7
MAKE_BASE=TRUE IN 45D8 5B2
IN
Q2680 R2688 R2689
3 R26121 3
1 BSS138 5%
100K 0
5%
10K R2622 SOT23 1/16W 1/16W
5% MF-LF MF-LF
1/16W 10K 2 402 2 402 R2682
MF-LF 5%
402 2 1/16W 2 S D 3 0
MF-LF PLT_RST_GATED_L 1 2 ENET_RST_L 36C6
2 402 5%
32A4 1/16W
OUT CK410_PD_VTT_PWRGD_L G MF-LF
402
1
Initial resistor values are based on CRB,
45D8
IN SMC_RSTGATE_L but may change after characterization.
SB Misc
SYNC_MASTER=NB SYNC_DATE=07/26/2005
A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 26 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
ICH7-M SMBus Connections SMC "0" SMBus Connections SMC "RMT" SMBus Connections
NOTE: SMC RMT bus remains powered and may be active in S3 state
64A6 =PP3V3_S0_SMBUS_SB 64A6 =PP3V3_S0_SMBUS_SMC_0 64B3 =PP3V3_S3_SMBUS_SMC_RMT
ICH7-M R27001 1
R2701 Clock Chip SMC R27501 1
R2751 SMC R27701 1
R2771
2.0K 2.0K 2.0K 2.0K 2.0K 2.0K
U2100 5% 5% CY28445-5: U3301 U5800 5% 5% U5800 5% 5%
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W
(MASTER) MF-LF MF-LF (Write: 0xD2 Read: 0xD3) (MASTER) MF-LF MF-LF (MASTER) MF-LF MF-LF
402 2 2 402 402 2 2 402 402 2 2 402
D 23D5 SMB_CLK SMBUS_SB_SCL SMB_CK410_CLK 32B6 45C8 SMB_0_CLK SMBUS_SMC_0_SCL 45B5 SMB_RMT_CLK SMBUS_SMC_RMT_SCL
D
23D5 SMB_DATA SMBUS_SB_SDA SMB_CK410_DATA 32B6 45C5 SMB_0_DATA SMBUS_SMC_0_SDA 45B5 SMB_RMT_DATA SMBUS_SMC_RMT_SDA
SO-DIMM "A" SKIN TEMP Top-Case SMBus Connections: AMBIENT THERMAL

J2800 MAX6695: U6250
(Write: 0xA0 Read: 0xA1)
ATS/ALS
=I2C_SODIMMA_SCL 28A6 THRM_DIMM1_SMB_CLK 49B4 =SMBUS_ATS_SCL 67A2
=I2C_SODIMMA_SDA 28A6 THRM_DIMM1_SMB_DATA 49B4 =SMBUS_ATS_SDA 67A2
SO-DIMM "B"
J2900
(Write: 0xA4 Read: 0xA5)
SMC "Battery A" SMBus Connections
=I2C_SODIMMB_SCL 29A6 64D1 =PP3V42_G3H_SMBUS_SMC_BSA
=I2C_SODIMMB_SDA 29A6
SMC R27801 1
R2781 Battery
8.2K 8.2K
U5800 5% 5% J8250
1/16W 1/16W
AIRPORT (MASTER) MF-LF MF-LF
C J5300 SMC "MLB" SMBus Connections 45B5 SMB_BSA_CLK SMBUS_SMC_BSA_SCL

MAKE_BASE=TRUE
402 2 2 402
=SMBUS_BATT_SCL 65A2
C
45B5 SMB_BSA_DATA SMBUS_SMC_BSA_SDA =SMBUS_BATT_SDA 65A2
64A6 =PP3V3_S0_SMBUS_SMC_MLB MAKE_BASE=TRUE
=SMB_AIRPORT_CLK 43B4
=SMB_AIRPORT_DATA 43B4
SMC R27601 1
R2761 CPU Temp
2.0K 2.0K
U5800 5% 5% ADT7461: U1001
GEYSER (MASTER)
1/16W
MF-LF
402 2
1/16W
MF-LF
2 402
(Write: 0x98 Read: 0x99) SMC "Battery B" SMBus Connections
J4900 SMB_MLB_CLK 5B2 SMBUS_SMC_MLB_SCL SMB_THRM_CLK
45B5 10B3
MAKE_BASE=TRUE
45B5 SMB_MLB_DATA 5B2 SMBUS_SMC_MLB_SDA SMB_THRM_DATA 10B3 =PP3V3_S0_SMBUS_SMC_BSB 64A6
MAKE_BASE=TRUE
=SMB_GEYSER_CLK 40C4
=SMB_GEYSER_DATA 40C4 SMC 1

R2782 1
R2783
Top-Case U5800
(MASTER)
5%
100K
1/16W
100K
5%
U6200 MF-LF 1/16W
MF-LF
(SEE TABLE) 2 402
2 402
45C5 SMB_BSB_CLK
THRM_DIMM0_SMB_CLK 49C4
45C8 SMB_BSB_DATA
THRM_DIMM0_SMB_DATA 49C4
B B
M42 SMBUS CONNECTIONS

SYNC_MASTER=ENET SYNC_DATE=08/30/2005
A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 27 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
64C3 29D6 29D4 29B2 28D4 28B2 19C8 19C7 =PP1V8_S3_MEM DIP DIMM CONN 201 =GND_CHASSIS_DIPDIMM_CENTER 6B8
29A5
=PP1V8_S3_MEM 19C7 19C8 28B2 28D6 29B2 29D4 29D6 64C3
1 OMIT 2
28D1 MEM_VREF_A VREF VSS0
3 CRITICAL 4
VSS1 DQ4 MEM_A_DQ<5> 15D7
1 C2820 1 C2800 15D7 MEM_A_DQ<6>
5 J2801 6 MEM_A_DQ<1>
2.2UF
20%
0.1uF
20% 15D7 MEM_A_DQ<7>
7
DQ0
DQ1
F-RT-TH2
DQ5
VSS2
8
15D7
DDR2 VRef
DDR2-SODIMM-STD
4V
2 X5R 2 10V 9 10 MEM_A_DM<0>
CERM VSS4 DM0 15D5
402 402 MEM_A_DQS_N<0> 11 12 One 0.1uF per connector
15C5 DQS0* VSS5
MEM_A_DQS_P<0> 13 14 MEM_A_DQ<0>
15C5 DQS0 DQ6 15D7
15 16 MEM_A_DQ<4> =PP1V8_S3_MEM_NB
VSS6 DQ7 15D7 64C6 61C2 29D2 19D7 16B6 14C2
MEM_A_DQ<3> 17 18
15D7 DQ2 VSS7
15D7 MEM_A_DQ<2>
19 20 MEM_A_DQ<12> 1
DQ3 DQ12 15C7
R2800
21 22 MEM_A_DQ<14> 1K
VSS8 DQ13 15C7
D 15C7 MEM_A_DQ<13> 23
25
DQ8 VSS9
24
26
1%
1/16W
MF-LF
D
15C7 MEM_A_DQ<8> DQ9 DM1 MEM_A_DM<1> 15D5 402
2
27 28
VSS10 VSS11 MEM_VREF_A 28D7
MEM_A_DQS_N<1> 29 30 MEM_CLK_P<0>
15C5 DQS1* CK0 14D4 VOLTAGE=0.9V
MEM_A_DQS_P<1> 31 32 MEM_CLK_N<0> MIN_NECK_WIDTH=0.25 mm
15C5 DQS1 CK0* 14D4
33 34 1
VSS12 VSS13 R2801
MEM_A_DQ<10> 35 36 MEM_A_DQ<11> 1K
15C7 DQ10 DQ14 15C7
1%
15C7 MEM_A_DQ<9>
37 38 MEM_A_DQ<15> 1/16W
DQ11 DQ15 15C7
MF-LF
39 40
VSS14 VSS15 2 402
KEY
41 42
VSS16 VSS17
MEM_A_DQ<24> 43 44 MEM_A_DQ<29>
15C7 DQ16 DQ20 15C7
15C7 MEM_A_DQ<25>
45 46 MEM_A_DQ<28>
DQ17 DQ21 15C7
47 48
VSS18 VSS19
MEM_A_DQS_N<3> 49 50 DIMM_OVERTEMP_L Yellow uses 10K divider and TLV2463
15C5 DQS2* NC0 6B1 29C4
MEM_A_DQS_P<3> 51 52 MEM_A_DM<3>
15C5 DQS2 DM2 15C5
53 54 to drive MCH and DIMM connectors.
VSS21 VSS22
MEM_A_DQ<31> 55 56 MEM_A_DQ<26> (See Capell Valley pg 47)
15C7 DQ18 DQ22 15C7
15C7 MEM_A_DQ<27>
57 58 MEM_A_DQ<30>
DQ19 DQ23 15C7
59 60
VSS23 VSS24
15C7
15C7
MEM_A_DQ<22>
MEM_A_DQ<19>
61
63
DQ24
DQ25
DQ28
DQ29
62
64
MEM_A_DQ<18>
MEM_A_DQ<23>
15C7
15C7
Page Notes
65 66 Power aliases required by this page:
VSS25 VSS26
MEM_A_DM<2> 67 68 MEM_A_DQS_N<2> - =PP1V8_S3_MEM
15D5 DM3 DQS3* 15C5
NC 69 70 MEM_A_DQS_P<2> - =PPSPD_S0_MEM (2.5V - 3.3V)

NC1 DQS3 15C5
71 72
VSS27 VSS28
73 74 Signal aliases required by this page:
15C7 MEM_A_DQ<20> DQ26 DQ30 MEM_A_DQ<16> 15C7
C 15C7 MEM_A_DQ<17> 75
77
DQ27 DQ31
76
78
MEM_A_DQ<21> 15C7
- =I2C_MEM_SCL
- =I2C_MEM_SDA
C
VSS29 VSS30
MEM_CKE<0> 79 80 MEM_CKE<1> BOM options provided by this page:
30D6 14C4 CKE0 NC/CKE1 14C4 30D6
81 82 (NONE)
VDD0 VDD1
NC 83 84 NC MEM_A_A<15>
NC2 NC/A15 6A4
MEM_A_BS<2> 85 86 NC MEM_A_A<14>
30C6 15D5 BA2 NC/A14 6A4
87 88
VDD2 VDD3
30C6
30C6
15B5 MEM_A_A<12>
15B5 MEM_A_A<9>
89
91
A12
A9
A11
A7
90
92
MEM_A_A<11>
MEM_A_A<7>
15B5 30C6
15B5 30C6
DDR2 Bypass Caps
15B5 MEM_A_A<8>
93 94 MEM_A_A<6> (For return current)
30C6 A8 A6 15B5 30C6
95 96
VDD4 VDD5 =PP1V8_S3_MEM
64C3 29D6 29D4 29B2 28D6 28D4 19C8 19C7
MEM_A_A<5> 97 98 MEM_A_A<4>
30C6 15B5 A5 A4 15B5 30C6
15B5 MEM_A_A<3>
99 100 MEM_A_A<2>
30C6 A3 A2 15C5 30C6
15C5 MEM_A_A<1>
101 102 MEM_A_A<0>
30C6 A1 A0 15C5 30C6
103 104
1 C2809
VDD6 VDD7 4.7uF
MEM_A_A<10> 105 106 MEM_A_BS<1> 20%
30C6 15B5 A10/AP BA1 15D5 30C6 6.3V
2 CERM
15D5 MEM_A_BS<0>
107 108 MEM_A_RAS_L
30C6 BA0 RAS* 15B5 30B6 603
15B5 MEM_A_WE_L
109 110 MEM_CS_L<0>
30B6 WE* S0* 14C4 30D6
111 112
VDD8 VDD9
MEM_A_CAS_L 113 114 MEM_ODT<0>
30B6 15D5 CAS* ODT0 14C4 30D6
MEM_CS_L<1> 115 116 MEM_A_A<13>

30D6 14C4 NC/S1* NC/A13 15B5 30C6
1 1 1 1
117 118 C2810 C2811 C2812 C2813
VDD10 VDD11 0.1uF 0.1uF 0.1uF 0.1uF
MEM_ODT<1> 119 120 NC 20% 20% 20% 20%
30D6 14C4 NC/ODT1 NC3 10V 10V 10V 10V
121 122 2 CERM 2 CERM 2 CERM 2 CERM
VSS31 VSS32 402 402 402 402
MEM_A_DQ<37> 123 124 MEM_A_DQ<36>
15B7 DQ32 DQ36 15B7
15C7 MEM_A_DQ<32>
125 126 MEM_A_DQ<34>
DQ33 DQ37 15B7
B 15C5 MEM_A_DQS_N<4>
127
129
VSS33
DQS4*
VSS34
DM4
128
130 MEM_A_DM<4> 15C5
1
C2814 1
C2815 1 C2816 1 C2817
B
15C5 MEM_A_DQS_P<4>
131 132 0.1uF 0.1uF 1uF 1uF
DQS4 VSS35 20% 20% 10% 10%
133 134 MEM_A_DQ<35> 10V 10V 6.3V 6.3V
VSS36 DQ38 15B7 2 CERM 2 CERM
2 CERM 2 CERM
MEM_A_DQ<38> 135 136 402 402 402 402
15B7 DQ34 DQ39 MEM_A_DQ<33> 15C7
15B7 MEM_A_DQ<39>
137 138
DQ35 VSS37
139 140 MEM_A_DQ<40>
VSS38 DQ44 15B7
MEM_A_DQ<44> 141 142 MEM_A_DQ<45>

15B7 DQ40 DQ45 15B7 1 C2830 1 C2831 1 C2832
MEM_A_DQ<41> 143 144
15B7 DQ41 VSS39 1uF 1uF 1uF
145 146 MEM_A_DQS_N<5> 10% 10% 10%
VSS40 DQS5* 15C5 6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
MEM_A_DM<5> 147 148 MEM_A_DQS_P<5>
15C5 DM5 DQS5 15C5 402 402 402
149 150
VSS41 VSS42
MEM_A_DQ<47> 151 152 MEM_A_DQ<42>
15B7 DQ42 DQ46 15B7
15B7 MEM_A_DQ<43>
153 154 MEM_A_DQ<46>
DQ43 DQ47 15B7
155 156
VSS43 VSS44
MEM_A_DQ<63> 157 158 MEM_A_DQ<60> The 4.7uF and 1.0uF caps can be changed to 5x 2.2uF caps,
15A7 DQ48 DQ52 15A7
15B7 MEM_A_DQ<56>
159 160 MEM_A_DQ<61>
DQ49 DQ53 15A7
161 162 when they get cheaper.
VSS45 VSS46
NC 163 164 MEM_CLK_P<1>
NC_TEST CK1 14D4
165 166 MEM_CLK_N<1>
TABLE_5_HEAD
VSS47 CK1* 14D4

MEM_A_DQS_N<7> 167 168
15C5 DQS6* VSS48 TABLE_5_ITEM
15C5 MEM_A_DQS_P<7>
169 170 MEM_A_DM<7> 516-0149 1 CONN,200P STD SODIMM OLD REV J2801 CRITICAL PVT-DIMM
DQS6 DM6 15C5
171 172 TABLE_5_ITEM
VSS49 VSS50 516-0154 1 CONN,200P STD SODIMM NEW REV 3.5 J2801 CRITICAL POST-RAMP-DIMM35
MEM_A_DQ<58> 173 174 MEM_A_DQ<62>
15B7 DQ50 DQ54 15A7
15B7 MEM_A_DQ<57>
175
DQ51 DQ55
176 MEM_A_DQ<59> 15B7 DDR2 SO-DIMM Connector A
177 178
VSS51 VSS52
A 15B7 MEM_A_DQ<48>
MEM_A_DQ<49>
179
181
DQ56 DQ60
180
182
MEM_A_DQ<51>
MEM_A_DQ<53>
15B7
SYNC_MASTER=MEMORY

A
15B7 DQ57 DQ61 15B7
183 184
VSS53 VSS54
185 186 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
15C5 MEM_A_DM<6> DM7 DQS7* MEM_A_DQS_N<6> 15C5 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
187 188 AGREES TO THE FOLLOWING
VSS55 DQS7 MEM_A_DQS_P<6> 15C5
189 190 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
15B7 MEM_A_DQ<52> DQ58 VSS56
191 192 II NOT TO REPRODUCE OR COPY IT
15B7 MEM_A_DQ<55> DQ59 DQ62 MEM_A_DQ<50> 15B7
64A6 29A7 29A3 =PPSPD_S0_MEM III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
193 194 MEM_A_DQ<54>
VSS57 DQ63 15B7
1 C2822 1 C2821 27C6 =I2C_SODIMMA_SDA 195
SDA VSS58
196 SIZE DRAWING NUMBER REV.
2.2UF 0.1uF =I2C_SODIMMA_SCL 197 198
20%
4V
2 X5R
20%
10V
2 CERM
27D6
199
SCL
VDDSPD
SA0
SA1
200
APPLE COMPUTER INC.
D 051-7374 A
402 402 ADDR=0xA0(WR)/0xA1(RD)

202 SCALE SHT OF
=GND_CHASSIS_DIPDIMM_LEFT 6D8
516-0135 NONE 28 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
64C3 29D4 29B2 28D6 28D4 28B2 19C8 19C7 =PP1V8_S3_MEM DIP DIMM CONN 201 =GND_CHASSIS_DIPDIMM_RIGHT 6B8 =PP1V8_S3_MEM 19C7 19C8 28B2 28D4 28D6 29B2 29D6 64C3
OMIT
29D1 MEM_VREF_B 1
3
VREF
VSS1
CRITICAL VSS0
DQ4
2
4 MEM_B_DQ<0> 15D4
DDR2 VREF (FOR CONNECTOR B)
1 C2920 1 C2900 15D4 MEM_B_DQ<1> 5
DQ0 J2901 DQ5
6 MEM_B_DQ<4> 15D4 One 0.1uF per connector
2.2UF 0.1uF 15D4 MEM_B_DQ<5>
7
DQ1
F-RT-TH2
VSS2
8
20% 20%
DDR2-SODIMM-STD
4V 10V 9 10 MEM_B_DM<0>
2 X5R 2 CERM VSS4 DM0 15D2
402 402 64C6 61C2 28D2 19D7 16B6 14C2 =PP1V8_S3_MEM_NB
MEM_B_DQS_N<0> 11 12
15C2 DQS0* VSS5
MEM_B_DQS_P<0> 13 14 MEM_B_DQ<6>
15C2 DQS0 DQ6 15D4
1
15
VSS6 DQ7
16 MEM_B_DQ<7> 15D4
R2901
17 18
1K
15D4 MEM_B_DQ<2> DQ2 VSS7 1%
1/16W
15D4 MEM_B_DQ<3>
19 20 MEM_B_DQ<15>
DQ3 DQ12 15C4 MF-LF
2 402
D 15C4 MEM_B_DQ<12>
21
23
VSS8
DQ8
DQ13
VSS9
22
24
MEM_B_DQ<14> 15C4
MEM_VREF_B 29D7
D
VOLTAGE=0.9V
MEM_B_DQ<13> 25 26 MEM_B_DM<1>
15C4 DQ9 DM1 15D2 MIN_LINE_WIDTH=0.25 mm
27 28 MIN_NECK_WIDTH=0.25 mm
VSS10 VSS11 1
MEM_B_DQS_N<1> 29 30 MEM_CLK_P<3> R2902
15C2 DQS1* CK0 14D4
1K
15C2 MEM_B_DQS_P<1>
31 32 MEM_CLK_N<3>
DQS1 CK0* 14D4 1%
1/16W
33 34 MF-LF
VSS12 VSS13
402
MEM_B_DQ<8> 35 36 MEM_B_DQ<11> 2
15C4 DQ10 DQ14 15C4
15C4 MEM_B_DQ<10>
37 38 MEM_B_DQ<9>
DQ11 DQ15 15C4
39 40
VSS14 VSS15
KEY
41 42
VSS16 VSS17
MEM_B_DQ<17> 43 44 MEM_B_DQ<21>
15C4 DQ16 DQ20 15C4
45 46 Yellow uses 10K divider and TLV2463
15C4 MEM_B_DQ<20> DQ17 DQ21 MEM_B_DQ<16> 15C4
47 48 to drive MCH and DIMM connectors.
VSS18 VSS19
MEM_B_DQS_N<2> 49 50 DIMM_OVERTEMP_L
15C2 DQS2* NC0 6B1 28C4
51 52 (See Capell Valley pg 47)
15C2 MEM_B_DQS_P<2> DQS2 DM2 MEM_B_DM<2> 15D2
53 54
VSS21 VSS22
15C4
15C4
MEM_B_DQ<22>
MEM_B_DQ<18>
55
57
DQ18
DQ19
DQ22
DQ23
56
58
MEM_B_DQ<23>
MEM_B_DQ<19>
15C4
15C4
Page Notes
59 60 Power aliases required by this page:
VSS23 VSS24
MEM_B_DQ<29> 61 62 MEM_B_DQ<25> - =PP1V8_S3_MEM
15C4 DQ24 DQ28 15C4
MEM_B_DQ<27> 63 64 MEM_B_DQ<24> - =PPSPD_S0_MEM (2.5V - 3.3V)

15C4 DQ25 DQ29 15C4
65 66
VSS25 VSS26
67 68 Signal aliases required by this page:
15C2 MEM_B_DM<3> DM3 DQS3* MEM_B_DQS_N<3> 15C2
69 70 - =I2C_MEM_SCL
NC NC1 DQS3 MEM_B_DQS_P<3> 15C2
71 72 - =I2C_MEM_SDA
VSS27 VSS28
73 74
C 15C4
15C4
MEM_B_DQ<30>
MEM_B_DQ<31> 75
DQ26
DQ27
DQ30
DQ31
76
MEM_B_DQ<28>
MEM_B_DQ<26>
15C4
15C4
(NONE)
C
77 78
VSS29 VSS30
79 80 NOTE: This page does not supply VREF.
30D6 14C4 MEM_CKE<2> CKE0 NC/CKE1 MEM_CKE<3> 14C4 30D6
81 82 The reference voltage must be provided
VDD0 VDD1
83 84 NC by another page.
NC NC2 NC/A15 MEM_B_A<15> 6A4
MEM_B_BS<2> 85 86 NC MEM_B_A<14>
30A6 15D2 BA2 NC/A14 6A4
87 88
30A5 15B2 MEM_B_A<12>

15B2 MEM_B_A<9>
89
91
VDD2
A12
VDD3
A11
90
92
MEM_B_A<11>
MEM_B_A<7>
15B2 30A5 DDR2 Bypass Caps
30B5 A9 A7 15B2 30B5
93 94 (For return current)
30B5 15B2 MEM_B_A<8> A8 A6 MEM_B_A<6> 15B2 30B5
95 96 =PP1V8_S3_MEM
VDD4 VDD5 64C3 29D6 29D4 28D6 28D4 28B2 19C8 19C7
MEM_B_A<5> 97 98 MEM_B_A<4>
30B5 15B2 A5 A4 15B2 30B5
MEM_B_A<3> 99 100 MEM_B_A<2>

30B5 15B2 A3 A2 15C2 30B5
15C2 MEM_B_A<1>
101 102 MEM_B_A<0> 1
C2909
30B5 A1 A0 15C2 30B5
103
VDD6 VDD7
104 4.7uF
20%
MEM_B_A<10> 105 106 MEM_B_BS<1> 2
6.3V
30B5 15B2 A10/AP BA1 15D2 30A6 CERM
107 108 603
30A6 15D2 MEM_B_BS<0> BA0 RAS* MEM_B_RAS_L 15B2 30A6
15B2 MEM_B_WE_L
109 110 MEM_CS_L<2>
30A6 WE* S0* 14C4 30D6
111 112
VDD8 VDD9
MEM_B_CAS_L 113 114 MEM_ODT<2>
30A6 15D2 CAS* ODT0 14C4 30D6
14C4 MEM_CS_L<3>
115 116 MEM_B_A<13> 1
C2910 1
C2911 1
C2912 1
C2913
30D6 NC/S1* NC/A13 15B2 30A5
117 118 0.1uF 0.1uF 0.1uF 0.1uF
VDD10 VDD11 20% 20% 20% 20%
MEM_ODT<3> 119 120 10V 10V 10V 10V
30D6 14C4 NC/ODT1 NC3 NC 2 CERM 2 CERM 2 CERM 2 CERM
121 122 402 402 402 402
VSS31 VSS32
15B4 MEM_B_DQ<58>
123 124 MEM_B_DQ<63>
DQ32 DQ36 15A4
15A4 MEM_B_DQ<62>
125 126 MEM_B_DQ<59>
DQ33 DQ37 15B4
B 127
VSS33 VSS34
128
1
B
15C2 MEM_B_DQS_N<7> 129
DQS4* DM4
130 MEM_B_DM<7> 15C2
1
C2914 1
C2915 1
C2916 C2917
15C2 MEM_B_DQS_P<7>
131 132 0.1uF 0.1uF 1uF 1uF
DQS4 VSS35 20% 20% 10% 10%
133 134 MEM_B_DQ<61> 10V 10V 2
6.3V 2 6.3V
VSS36 DQ38 15A4 2 CERM 2 CERM CERM CERM
135 136 402 402 402 402
15B4 MEM_B_DQ<57> DQ34 DQ39 MEM_B_DQ<56> 15B4
15A4 MEM_B_DQ<60>
137 138
DQ35 VSS37
139 140 MEM_B_DQ<53>
VSS38 DQ44 15B4
MEM_B_DQ<55> 141 142 MEM_B_DQ<48>

15B4 DQ40 DQ45 15B4 1 C2930 1 C2931 1 C2932
15B4 MEM_B_DQ<50>
143 144
DQ41 VSS39 1uF 1uF 1uF
145 146 MEM_B_DQS_N<6> 10% 10% 10%
VSS40 DQS5* 15C2 6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
MEM_B_DM<6> 147 148 MEM_B_DQS_P<6>
15C2 DM5 DQS5 15C2 402 402 402
149 150
VSS41 VSS42
MEM_B_DQ<52> 151 152 MEM_B_DQ<54>
15B4 DQ42 DQ46 15B4
MEM_B_DQ<49> 153 154 MEM_B_DQ<51>

15B4 DQ43 DQ47 15B4
155 156 The 4.7uF and 1.0uF caps can be changed to 5x 2.2uF caps,
VSS43 VSS44
MEM_B_DQ<32> 157 158 MEM_B_DQ<33> when they get cheaper.
15C4 DQ48 DQ52 15C4
15B4 MEM_B_DQ<37>
159 160 MEM_B_DQ<36>
DQ49 DQ53 15B4 TABLE_5_HEAD
161 162 PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
VSS45 VSS46
NC 163 164 MEM_CLK_P<2>
TABLE_5_ITEM
NC_TEST CK1 14D4

516-0149 1 CONN,200P STD SODIMM OLD REV J2901 CRITICAL PVT-DIMM
165 166 MEM_CLK_N<2>
VSS47 CK1* 14D4 TABLE_5_ITEM
MEM_B_DQS_N<4> 167 168 516-0154 1 CONN,200P STD SODIMM NEW REV 3.5 J2901 CRITICAL POST-RAMP-DIMM35
15C2 DQS6* VSS48
MEM_B_DQS_P<4> 169 170 MEM_B_DM<4>
15C2 DQS6 DM6 15C2
171 172
VSS49 VSS50
MEM_B_DQ<38> 173 174 MEM_B_DQ<35>
15B4
15B4 MEM_B_DQ<34>
175
DQ50
DQ51
DQ54
176 MEM_B_DQ<39>
15B4
DDR2 SO-DIMM Connector B
DQ55 15B4
177 178
A 15B4 MEM_B_DQ<45> 179
VSS51
DQ56
VSS52
DQ60
180 MEM_B_DQ<40> 15B4
SYNC_MASTER=MEMORY

A
15B4 MEM_B_DQ<44>
181 182 MEM_B_DQ<42>
DQ57 DQ61 15B4
183 184 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
VSS53 VSS54
185 186 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
15C2 MEM_B_DM<5> DM7 DQS7* MEM_B_DQS_N<5> 15C2 AGREES TO THE FOLLOWING
187 188
=PPSPD_S0_MEM 28A7 29A7 64A6
VSS55 DQS7 MEM_B_DQS_P<5> 15C2 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
64A6 29A3 28A7 =PPSPD_S0_MEM 189 190
15B4 MEM_B_DQ<41> DQ58 VSS56 II NOT TO REPRODUCE OR COPY IT
1
15B4 MEM_B_DQ<43>
191
DQ59 DQ62
192 MEM_B_DQ<46> 15B4
R2900 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
10K
1 C2922 1 C2921 193
VSS57 DQ63
194 MEM_B_DQ<47> 15B4 5%
2.2UF 0.1uF 27C6 =I2C_SODIMMB_SDA 195
SDA VSS58
196 1/16W
MF-LF
20% 20%
4V
2 X5R
402
10V
2 CERM
402
27C6 =I2C_SODIMMB_SCL
197
199
SCL SA0
198
200
2
402
Resistor prevents pwr-gnd short APPLE COMPUTER INC.

D 051-7374 A
VDDSPD SA1 J2900_SA1

SCALE SHT OF
516-0135 202 =GND_CHASSIS_DIPDIMM_CENTER 6B8 ADDR=0xA4(WR)/0xA5(RD) NONE 29 79
28D5
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
One cap for each side of every RPAK, one cap for every two discrete resistors
BOMOPTION shown at the top of each group applies to every part below it
64D6 =PP0V9_S0_MEM_TERM
29B6 29B4 28B6 28B4 14C4 IN MEM_CS_L<3..0> RP3000

0 56 3 6
R3001 5% 1/16W SM-LF
1 56 1 2 1
C3000 1
C3001
2
RP3001 56 2 7
5% 1/16W MF-LF 402
0.1uF 0.1uF
20% 20%
3
RP3002 56 1 8 5% 1/16W SM-LF
2
10V
2
10V
CERM CERM
5% 1/16W SM-LF
D
402 402
D
29C6 29C4 28C6 28C4 14C4 IN MEM_CKE<3..0> RP3003
0 56 1 8
1
RP3004 56 1 8 5% 1/16W SM-LF 1
C3002 1
C3003
2
RP3005 56 1 8 5% 1/16W SM-LF 0.1uF 0.1uF
20% 20%
3
RP3006 56 1 8 5% 1/16W SM-LF
2
10V
2
10V
CERM CERM
5% 1/16W SM-LF 402 402
29B6 29B4 28B6 28B4 14C4 IN MEM_ODT<3..0> RP3000

0 56 4 5
R3009 1 2
5% 1/16W SM-LF 1
C3004 1
C3005
1 56 0.1uF 0.1uF
2
RP3001 56 3 6
5% 1/16W MF-LF 402
20% 20%
10V 10V
R3011 5% 1/16W SM-LF 2 CERM 2 CERM
3 56 1 2
5% 1/16W MF-LF 402 402 402
28C6 28C4 28B6 28B4 15C5 15B5 IN MEM_A_A<13..0> RP3007

0 56 4 5 1
C3006 1
C3007
1
RP3008 56 4 5 5% 1/16W SM-LF 0.1uF 0.1uF
20% 20%
2
RP3007 56 3 6 5% 1/16W SM-LF
2
10V
2
10V
CERM CERM
3
RP3008 56 3 6 5% 1/16W SM-LF 402 402
4
RP3007 56 2 7 5% 1/16W SM-LF
5
RP3008 56 2 7 5% 1/16W SM-LF
6
RP3007 56 1 8 5% 1/16W SM-LF
7
RP3004 56 4 5 5% 1/16W SM-LF 1
C3008 1
C3009
0.1uF 0.1uF
8
RP3008 56 1 8 5% 1/16W SM-LF 20% 20%
10V 10V
9
RP3003 56 4 5 5% 1/16W SM-LF 2 CERM 2 CERM
402 402
RP3009 56 1 8 5% 1/16W SM-LF
LAYOUT NOTE:PLACE ONE CAP CLOSE TO EVERY TWO PULLUP RESISTORS TERMINATED
C 10
11
RP3004 56 3 6 5% 1/16W SM-LF
TO PP0V9_S0_MEM_TERM C
12
RP3003 56 3 6 5% 1/16W SM-LF
R3025 5% 1/16W SM-LF

13 56 1 2
5% 1/16W MF-LF 402
1
C3010 1
C3011
0.1uF 0.1uF
20% 20%
10V 10V
2 CERM 2 CERM
402 402
28C6 28B6 28B4 15D5 IN MEM_A_BS<2..0> RP3009

0 56 2 7
1
RP3000 56 1 8 5% 1/16W SM-LF
2
RP3003 56 2 7 5% 1/16W SM-LF 1
C3012 1
C3013
5% 1/16W SM-LF 0.1uF 0.1uF
20% 20%
10V 10V
2 CERM 2 CERM
402 402
28B4 15B5 MEM_A_RAS_L RP3000 56 2 7

IN
28B6 15D5 MEM_A_CAS_L RP3009 56 4 5 5% 1/16W SM-LF
IN
28B6 15B5 MEM_A_WE_L RP3009 56 3 6 5% 1/16W SM-LF
IN
5% 1/16W SM-LF 1
C3014 1
C3015
0.1uF 0.1uF
20% 20%
10V 10V
2 CERM 2 CERM
402 402
1
C3016 1
C3017
0.1uF 0.1uF
29B4 15C2 MEM_B_A<0> RP3011 56 3 6 20% 20%
B 29B6 15B2
IN
IN MEM_B_A<3> RP3010
RP3011
56
56
3
2
6
7
5% 1/16W SM-LF
5% 1/16W SM-LF
2
10V
CERM
402
2
10V
CERM
402
B
29B4 15C2 IN MEM_B_A<2>
R3035 5% 1/16W SM-LF
29B6 15B2 MEM_B_A<10> 56 1 2
IN
29B4 15B2 MEM_B_A<4> RP3011 56 1 8
5% 1/16W MF-LF 402
IN
MEM_B_A<5> RP3010 56 1 8 5% 1/16W SM-LF
29B6 15B2
29C4 15B2
IN
MEM_B_A<6> RP3006 56 4 5 5% 1/16W SM-LF 1 C3018 1 C3019
IN 0.1uF 0.1uF
29C4 15B2 MEM_B_A<7> RP3006 56 3 6 5% 1/16W SM-LF 20% 20%
IN 10V 10V
29C6 15B2 MEM_B_A<8> RP3010 56 2 7 5% 1/16W SM-LF 2 CERM 2 CERM
IN 402 402
29C6 15B2 MEM_B_A<9> RP3005 56 4 5 5% 1/16W SM-LF
IN
29B6 15C2 MEM_B_A<1> RP3010 56 4 5 5% 1/16W SM-LF
IN
29C4 15B2 MEM_B_A<11> RP3006 56 2 7 5% 1/16W SM-LF
IN
29C6 15B2 MEM_B_A<12> RP3005 56 3 6 5% 1/16W SM-LF
29B4 15B2
IN
MEM_B_A<13> RP3001 56 4 5 5% 1/16W SM-LF 1 C3020 1 C3021
IN 0.1uF 0.1uF
5% 1/16W SM-LF 20% 20%
10V 10V
2 CERM 2 CERM
402 402
29C6 29B6 29B4 15D2 IN MEM_B_BS<2..0> RP3002

0 56 4 5
1
RP3011 56 4 5 5% 1/16W SM-LF 1 C3022 1 C3023
0.1uF 0.1uF
2
RP3005 56 2 7 5% 1/16W SM-LF 20% 20%
10V 10V
5% 1/16W SM-LF 2 CERM 2 CERM
402 402
29B4 15B2 MEM_B_RAS_L RP3001 56 1 8 Memory Active Termination

IN
MEM_B_CAS_L RP3002 56 2 7 5% 1/16W SM-LF 1 C3024 1 C3025
A 29B6 15D2
29B6 15B2
IN
IN MEM_B_WE_L RP3002 56 3 6 5% 1/16W SM-LF
5% 1/16W SM-LF
0.1uF
20%
0.1uF
20%
A
10V 10V
2 CERM 2 CERM
402 402
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 30 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Page Notes
Power aliases required by this page:
- =PP5V_S0_MEMVTT
- =PP1V8_S0_MEMVTT
- =PP0V9_S0_MEMVTT_LDO
Signal aliases required by this page:

(NONE)

(NONE)
D D
DDR2 Vtt Regulator

C 64D3
64C3
=PP5V_S0_MEMVTT
=PP1V8_S3_MEMVTT R3104
C
220
1 2 PP1V8_S3_MEMVTT_VDDQ
5%
MIN_LINE_WIDTH=0.2 mm 1
C3100
If power inputs are not S0, 1/16W VOLTAGE=1.8V
1uF
MF-LF 10%
402 6.3V
MEMVTT_EN can be used to MEMVTT_EN_PU 2 CERM
1 5 6 402
disable MEMVTT in sleep. R3100 C3104 1
VDDQ VCC
1K 2.2uF
5%
1/16W
20% U3100
6.3V
MF-LF CERM1 2 BD3533FVM
402 603
2 MSOP-8
7 4 MEMVTT_VREF
VTT_IN VREF
2 CRITICAL
MEMVTT_EN EN 3
VTTS 1
C3102
VTT 8 10uF
C3101 1 1
C3103 20%
6.3V
GND 2
10uF 0.1uF X5R
20% 10% 603
6.3V 16V 1
X5R 2 2 X5R
603 402
=PP0V9_S0_MEM_REG 63B2 64D8
1
CRITICAL
C3105
150UF
20%
2 6.3V
POLY
SMC-LF
B B
Memory Vtt Supply

A SYNC_MASTER=(MASTER)

SYNC_DATE=(MASTER)
A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 31 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
L3302
R3302 120-OHM-0.3A-EMI
2.2 1 2
PP3V3_S0_CK410_VDD48 1 2 =PP3V3_S0_CK410 32C7 32D8 64A6
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.5mm 5% 0402-LF
MIN_NECK_WIDTH=0.2mm 1/16W
1 C3308 1 C3309 MF-LF
402
1 C3310
0.1UF 10UF 1UF
10% 20% 10%
2 16V
X5R 2 6.3V
X5R 2 6.3V
CERM
402 603 402
D D
L3301
120-OHM-0.3A-EMI
64A6 32D3 32C7 =PP3V3_S0_CK410 1 2 PP3V3_S0_CK410_VDD_CPU_SRC PP3V3_S0_CK410_VDD_PCI
0402-LF MIN_LINE_WIDTH=0.5mm MIN_LINE_WIDTH=0.5mm
MIN_NECK_WIDTH=0.2mm MIN_NECK_WIDTH=0.2mm
1 C3314 1 C3316 1 C3315 1 C3301 1 C3302 1 C3303 1 C3304
1 C3305 1 C3306 1 C3317
1UF 0.1UF 0.1UF 10UF
10% 10UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 10% 10% 20%
6.3V
2 CERM 20% 10% 10% 10% 10% 10% 2 16V 2 16V 2 6.3V
402 2 6.3V
X5R
16V
2 X5R
16V
2 X5R
16V
2 X5R
16V
2 X5R
16V
2 X5R X5R
402
X5R
402
X5R
603
603 402 402 402 402 402
R3304 R3303
2.2 1
1 2 PP3V3_S0_CK410_VDDA PP3V3_S0_CK410_VDD_REF 1 2
5% MIN_LINE_WIDTH=0.5mm MIN_LINE_WIDTH=0.5mm 5%
1/16W MIN_NECK_WIDTH=0.2mm MIN_NECK_WIDTH=0.2mm 1/16W
MF-LF
402
1 C3312 C3311 1 1 C3307 MF-LF
402
10UF 0.1UF 0.1UF
20% 10% 10%
2 6.3V
X5R 2 16V
X5R 2 16V
X5R
603 402 402
CRITICAL
43
61
VDD_PCI 67
49
12
17
28
35
Y3301
3
14.31818 (EACH POWER PIN PLACED ONE 0.1UF)
VDD_48
VDD_REF
VDD_CPU
VDD_SRC
1 2
NEED TO CHECK CAP VALUE

(PLACED 0.1UF NEAR THE RELATIVE POWER PIN)
5X3.2-SM
1 C3389 1 C3390 C
C 5%
15PF
5%
15PF
OMIT
50V
2 CERM 50V
2 CERM PCI_STOP* 56 (INT PU) 23C8 PM_STPPCI_L (FROM ICH7 GPIO18 STPPCI* )
IN
402 402 U3301 CPU_STOP* 55 (INT PU) 23C8 PM_STPCPU_L
IN (FROM ICH7 GPIO20 STPCPU* )
38 SLG8LP436
VDD_A QFN CPU_0* 44 33D5 5C7 CK410_CPU0_N
39 VSS_A OUT
CPU_0 45 33D5 5C7 CK410_CPU0_P
OUT (CPU HOST 133/167MHZ)
CK410_XTAL_IN 51 XTAL_IN CRITICAL
CPU_1* 41 33D5 5C7 CK410_CPU1_N
CK410_XTAL_OUT 50 XTAL_OUT OUT
CPU_1 42 33D5 5C7 CK410_CPU1_P
OUT (GMCH HOST 133/167MHZ)
64A6 32D8 32D3 =PP3V3_S0_CK410 CPU_ITP/SRC_11* 36 CK410_CPU2_ITP_SRC10_N
33B8 CK410_FSB_TEST_MODE 8 FS_B_TEST_MODE OUT
IN
CPU_ITP/SRC_11 37 CK410_CPU2_ITP_SRC10_P OUT (ITP HOST 133/167MHZ)
1
R3301 (FW PCI 33MHZ) 33D8 CK410_PCI1_CLK 57 PCI_1 SRC_0/LCD_CLK* 11 33A5 5C7 CK410_LVDS_N
10K
5% (TPM LPC 33MHZ)
OUT
CK410_PCI2_CLK 58 PCI_2 SRC_0/LCD_CLK 10 33A5 5C7 CK410_LVDS_P
OUT
(GMCH D_REFSSCLKIN DISPLAY PLL B 100MHZ)
OUT OUT
1/16W CK410_PCI3_CLK
MF-LF (SMC LPC 33MHZ) OUT
63 PCI_3
14 CK410_SRC1_N
2402 (NO USED) CK410_PCI4_CLK 64 PCI_4
SRC_1* 6B4
OUT
(GPU PCI-E 100 MHZ )
6B4 CK410_SRC1_P
OUT 13
SRC_1
33A8 CK410_PCI5_FCTSEL1 65 PCI_5/FCT_SEL_1 OUT
IO (INT PD)
(INT PU) CLKREQ_1* 9 6B4 CK410_SRC_CLKREQ1_L
IN
(PORT80 LPC 33MHZ)
33D8
OUT
CK410_PCIF0_CLK
33D8
68 PCIF_0/ITP_EN
SRC_2* 16 33C5 5C7 CK410_SRC2_N NEED TO DECIDE THE CLKREQ CONNECTION,TO GPIO?
5C7 CK410_PCIF1_CLK 1 PCIF_1 OUT
(ICH7M PCI 33MHZ) OUT
SRC_2 15 33C5 5C7 CK410_SRC2_P OUT (ICH7M DMI 100 MHZ )
(PULL UP PIN 68 TO ENABLE ITP HOST CLK)
27D6 SMB_CK410_CLK 47 SCL
(ICH SM BUS) IN
SRC_3* 19 CK410_SRC3_N
6B4
27D6
IO
SMB_CK410_DATA 48 SDA OUT
SRC_3 18 CK410_SRC3_P
6B4
OUT (FOR PCI-E CARD)
CK410_IREF 40 NC (INT PU) CLKREQ_3* 59 6B4 CK410_SRC_CLKREQ3_L
IN
SRC_4* 22 CK410_SRC4_N
33B5 5C7
OUT
SRC_4 21 CK410_SRC4_P
33B5 5C7 (ICH SATA 100 MHZ)
B 1
5
VSS_48 (INT PU) CLKREQ_4* 20 23C3 SB_CLK100M_SATA_OE_L
OUT
IN (FROM ICH7 GPIO35) (SIGNAL NAME WILL BE CHANGED POST PROTO TO REMOVE 100M FROM SIGNAL NAME) B
R3300 46 VSS_CPU SRC_5* 24 33C5 5C7 CK410_SRC5_N OUT
475
1%
1/16W 62
SRC_5 23 33C5 5C7 CK410_SRC5_P
OUT (GMCH G_CLKIN 100 MHZ )
MF-LF (INT PU) CLKREQ_5* 60 14B6 CLK_NB_OE_L (FROM GMCH CLK_REQ*)
66 VSS_PCI IN
2 402
SRC_6* 27 33C5 5C7CK410_SRC6_N OUT
52 VSS_REF
SRC_6 26 33D5 5C7CK410_SRC6_P OUT (WIRELESS PCI-E 100 MHZ )
31 VSS_SRC (INT PU) CLKREQ_6* 25 43C6 CK410_SRC_CLKREQ6_L IN
SRC_7* 30 6B4 CK410_SRC7_N

69 THRML_PAD
SRC_7 29 6B4 CK410_SRC7_P
OUT
(NOT USED )
OUT
SRC_8* 32 33C5 5B7 CK410_SRC8_N

SRC_8 33 33C5 5B7 CK410_SRC8_P
OUT
(GIGA LAN PCI-E 100 MHZ )
OUT
(INT PU) CLKREQ_8* 34 33A5 5B7 CK410_SRC_CLKREQ8_L
IN
DOT_96*/27M_SS* 7 CK410_DOT96_27M_N
DOT_96/27M 6 CK410_DOT96_27M_P (GMCH D_REFCLKIN DISPLAY PLL A 96MHZ)
OUT
OUT
(INT PD) VTT_PWRGD*/PD 2 26A8 CK410_PD_VTT_PWRGD_L IN

(FROM CPU VCORE PWR GOOD)
48M/FS_A 4 33C8 CK410_USB48_FSA
REF_0/FS_C/TEST_SEL 54 33B8 CK410_CLK14P3M_TIMER
OUT
(ICH7M USB 48MHZ)
(INT PD)
REF_1/FCT_SEL_0 53 33A8 CK410_REF1_FCTSEL0
OUT
(ICH7M,SIO,LPC REF. 14.318MHZ)
IO
CLOCKS
SYNC_MASTER=CLOCK SYNC_DATE=06/03/2005
A FCTSEL1 FCTSEL0 PIN 6 PIN 7 PIN 10 PIN 11
A
0 0 DOT96T DOT96C 100MT_SST 100MC_SST * FOR INT. GRAPHIC SYSTEM
0 1 DOT96T DOT96C SRCT0 SRCC0 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
27M NON 27M
1 0 SPREAD SPREAD SRCT0 SRCC0 * FOR EXT. GRAPHIC SYSTEM I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
1 1 OFF LOW TBD SRCT0 SRCC0
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 32 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
R3429
32B6 CK410_PCI1_CLK 1
33 2
TPM
PCI_CLK_FW R3413
IN OUT 38A5
5%
(TO FIREWIRE PCI 33MHZ) CK410_CPU0_P
0
FSB_CLK_CPU_P
1/16W R3430 32C4 5C7
IN
1 2 OUT 7C6 33C2
MF-LF 33 5%
32B6
IN CK410_PCI2_CLK 402 1 2 PCI_CLK_TPM OUT 53C6 (TO TPM PCI 33MHZ) R3414 1/16W
MF-LF
(CPU HOST 133/167MHZ)
R3433 5% 0 402
1/16W 32C4 5C7
IN CK410_CPU0_N 1 2 FSB_CLK_CPU_N OUT 7C6 33C2
33 MF-LF NOSTUFF
32B6 CK410_PCI3_CLK 1 2 402 PCI_CLK_SMC OUT 45C8 5%
IN
5%
(TO SMC PCI 33MHZ) R3411 1/16W
MF-LF R3441
1/16W
MF-LF 32C4 5C7 CK410_CPU1_P 1
0 2
402
FSB_CLK_NB_P CPU_XDP_CLK_P 1
49.9 2
IN OUT 12A6 33D2 33D3 11B3
402 NOSTUFF
5%
1/16W R3412 (GMCH HOST 133/167MHZ) 1%
1/16W
MF-LF 0 R3440 MF-LF
D
32C4 5C7
IN CK410_CPU1_N 402 1
5%
2
ITP
FSB_CLK_NB_N OUT 12A6 33C2
33D3 11B3 CPU_XDP_CLK_N 1
49.9 2 402
NOSTUFF
D
1/16W 1%
MF-LF 1/16W
402 R3415 MF-LF R3439
R3432 0 402 49.9 2
32C4 5C7
IN CK410_CPU2_ITP_SRC10_P 1 2 CPU_XDP_CLK_P OUT 11B3 33D2 36C6 33C3 ENET_CLK100M_PCIE_P 1
32B6 5C7 CK410_PCIF1_CLK 1
33 2 PCI_CLK_SB ITP
5%
NOSTUFF
1%
IN OUT 22A6
5%
(TO ICH7M PCI 33MHZ) R3416 1/16W
MF-LF
(ITP HOST 133/167MHZ) R3438 1/16W
MF-LF
1/16W 0 402
CPU_XDP_CLK_N ENET_CLK100M_PCIE_N 49.9 2 402
MF-LF
R3463 32C4 5C7
IN CK410_CPU2_ITP_SRC10_N 1 2
OUT 11B3 33D2 36C6 33C3 1
402 NOSTUFF
33 5% 1%
32B7
IN CK410_PCIF0_CLK 1 2 PCI_CLK_PORT80_LPC OUT 5C2 47C5 (PORT80 LPC 33MHZ) 1/16W
MF-LF
1/16W
MF-LF R3404
5% R3434 402 402 49.9 2
1/16W 0 33D3 12A6 FSB_CLK_NB_P 1
R3417 MF-LF 32B4 5C7
IN
CK410_SRC6_P 1 2 43C6 33B2 AIRPORT_CLK100M_PCIE_P OUT NOSTUFF
402 1%
33 5%
R3403 1/16W
32A4
IN CK410_USB48_FSA 1 2 23D3 SB_CLK48M_USBCTLR OUT (TO ICH7M USB 48MHZ) 1/16W
MF-LF (WIRELESS PCI-E 100MHZ) 49.9 2
MF-LF
402
5% 402
R3435 33D3 12A6 FSB_CLK_NB_N 1
1/16W NOSTUFF
MF-LF
402 =PP1V05_S0_FSB_NB CK410_SRC6_N 0 43C6
AIRPORT_CLK100M_PCIE_N
1%
1/16W
12A7 12B7 12C2 19D7 33B8 33C8 64D6 32B4 5C7
IN
1 2 33B2
OUT MF-LF R3442
5% 402 49.9 2
1
R3480 1/16W 33D3 7C6 FSB_CLK_CPU_P 1
MF-LF NOSTUFF
1K R3422 402 1%
1/16W
5%
1/16W 0 R3400 MF-LF
MF-LF 32B4 5C7 CK410_SRC5_P 1 2 33C2 14C4 NB_CLK100M_GCLKIN_P 49.9 2 402
2 402
IN OUT
33D3 7C6 FSB_CLK_CPU_N 1
R3468 5% NOSTUFF
1/16W 1%
1
1K 2 NB_BSEL<0> (TO MCH FS_A)
MF-LF
402
(GMCH G_CLKIN 100MHZ) 1/16W
MF-LF R3405
14C6
OUT R3423 402 49.9 2
5% 0 33B3 14C4 NB_CLK_DREFCLKIN_P 1
1/16W 32B4 5C7
IN CK410_SRC5_N 1 2 33B2 14C4 NB_CLK100M_GCLKIN_N OUT NOSTUFF
1%
R3401 MF-LF
402 R3450 5% R3402 1/16W
2.2K 2 0 R3427 1/16W MF-LF
1 CPU_BSEL_R<0> 1 2 7B4 CPU_BSEL<0> IN (FROM CPU FS_A) 0
MF-LF
402 33B3 14C4 NB_CLK_DREFCLKIN_N 1
49.9 2 402
5% NOSTUFF 5% 32B4 5C7
IN CK410_SRC2_P 1 2 SB_CLK100M_DMI_P OUT 22C2 33B2
1/16W
1
1/16W 1%
MF-LF
R3469 MF-LF 5% 1/16W NOSTUFF
C 402
5%
1K
1/16W
402 1/16W
MF-LF
402 R3428
(ICH7M DMI 100MHZ)
MF-LF
402 R3410
49.9 2
C
MF-LF 0 33A4 14C4 NB_CLK_DREFSSCLKIN_N 1
2 402
32B4 5C7
IN CK410_SRC2_N 1 2 SB_CLK100M_DMI_N OUT 22C2 33B2 NOSTUFF
1%
5% R3409 1/16W
R3465 1/16W MF-LF
MF-LF 49.9 2 402
0 402 33A3 14B4 NB_CLK_DREFSSCLKIN_P 1
19D7 12C2 12B7 12A7
64D6 33C7 33B8
=PP1V05_S0_FSB_NB 32A4 5B7
IN
CK410_SRC8_P 1 2 ENET_CLK100M_PCIE_P OUT 33D2 36C6
1%
NOSTUFF
5% 1/16W
1/16W MF-LF R3408
1
R3470 MF-LF
402
(GIGA-LAN PCI-E 100MHZ) NB_CLK100M_GCLKIN_P
402
1
49.9 2
1K NEED TO CHECK THE BSEL PULLS R3426 33C4 14C4
NOSTUFF
5%
CK410_SRC8_N 0 ENET_CLK100M_PCIE_N
1%
1/16W
1/16W
MF-LF
32A4 5B7
IN
1 2
OUT 33D2 36C6
R3406 MF-LF
R3471 2 402 R3472 5% 49.9 2 402
1/16W 33C4 14C4 NB_CLK100M_GCLKIN_N 1
1K 1K R3477 MF-LF NOSTUFF
32C6
OUT
CK410_FSB_TEST_MODE 1 2 14C6 1 2 NB_BSEL<1> OUT (TO MCH FS_B) 0
402 1%
1/16W
5% 5% IN CK410_SRC4_P 1 2 SB_CLK100M_SATA_P OUT 21B6 33B2 MF-LF R3431
1/16W 1/16W 402 49.9 2
MF-LF MF-LF
R3451 5% 33C3 22C2 SB_CLK100M_DMI_P 1
402 402 1/16W NOSTUFF
CPU_BSEL_R<1>
0
CPU_BSEL<1> (FROM CPU FS_B)
MF-LF
402
(ICH7M SATA 100MHZ) 1%
1/16W
1 2 7B4
IN R3478 R3407 MF-LF
NOSTUFF 5% 0 49.9 2 402
1
1/16W IN
CK410_SRC4_N 1 2 SB_CLK100M_SATA_N OUT 21B6 33B2 33C3 22C2 SB_CLK100M_DMI_N 1
R3452 MF-LF
402 5% 1%
1K 1/16W
MF-LF
1/16W
MF-LF
5% NOSTUFF
1/16W 402 402
19D7 12C2 12B7 12A7 =PP1V05_S0_FSB_NB MF-LF
2 402
R3436
64D6 33C8 33C7
AIRPORT_CLK100M_PCIE_P 1
49.9 2
NOSTUFF 43C6 33D4
1
R3473 NOSTUFF
1%
1/16W
1K MF-LF
402
5%
1/16W R3437
MF-LF 49.9 2
R3474 2 402 R3475 43C6 33C4 AIRPORT_CLK100M_PCIE_N 1
B IN 32A4 CK410_CLK14P3M_TIMER 1
1K 2 14C6 1
1K 2 NB_BSEL<2> OUT
(TO MCH FS_C)
1%
1/16W
MF-LF NOSTUFF
B
5% 5% 402
1/16W
MF-LF
1/16W
MF-LF R3481
402 402
R3453 SB_CLK100M_SATA_P 49.9 2
0 R3418 33B3 21B6 1
CPU_BSEL_R<2> 1 2 7B4 CPU_BSEL<2> IN (FROM CPU FS_C) 32A4 5C7 CK410_DOT96_27M_P 1
0 2 33C2 14C4 NB_CLK_DREFCLKIN_P NOSTUFF
1%
1/16W
IN OUT
5% MF-LF
1
1/16W 5% R3482 402
R3454 MF-LF
402
1/16W
MF-LF 49.9 2
1K 402 (GMCH DISPLAY PLLA 96MHZ) 33B3 21B6 SB_CLK100M_SATA_N 1
5%
1/16W R3419 1%
MF-LF 1/16W
2 402 0 MF-LF
32A4 5C7 IN CK410_DOT96_27M_N 1 2 33C2 14C4 NB_CLK_DREFCLKIN_N OUT
402
5%
R3476 1/16W
MF-LF
1
56 2 SB_CLK14P3M_TIMER
402
OUT 23D3
(ICH7M 14.318MHZ)
5%
1/16W R3420
MF-LF 0
402 32B4 5C7
IN CK410_LVDS_P 1 2 33C2 14B4 NB_CLK_DREFSSCLKIN_P OUT
5%
1/16W
MF-LF
402 (GMCH DISPLAY PLLB FOR LVDS SPREAD 100MHZ)
32B6
IO CK410_PCI5_FCTSEL1 R3421
0
32B4 5C7
IN
CK410_LVDS_N 1 2 33C2 14C4 NB_CLK_DREFSSCLKIN_N OUT
5%
1/16W
MF-LF
32A4
IO
CK410_REF1_FCTSEL0 402
1 1
CLOCK TERMINATION
R3466 R3467 SYNC_MASTER=CLOCK SYNC_DATE=06/06/2005
A 10K
5%
1/16W
10K
5%
1/16W
NOSTUFF R3450,R3451,R3453 FOR MANUAL CPU FREQUENCY NOTICE OF PROPRIETARY PROPERTY
A
MF-LF MF-LF
2402 2402 FS_C FS_B FS_A CPU THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
32A4 5B7 CK410_SRC_CLKREQ8_L PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
1 0 1 100M I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
0 0 1 133M II NOT TO REPRODUCE OR COPY IT
1
# 0 1 1 166M R3490 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
1K
5% SIZE DRAWING NUMBER REV.
0 1 0 200M 1/16W
SET FCTSEL0,FCTSEL1 TO 00
MF-LF
2 402
APPLE COMPUTER INC.
D 051-7374 A
EVEN THESE TWO PINS INTERNAL PULL DOWN, # NAPA PLATFORM ONLY SUPPORT 133M/166M CPU SPEED, M42 133MHZ SCALE SHT OF
CYPRESS RECOMMAND TO ADD EXTERNAL PULLS, NONE 33 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
Q3810
FDC638P
SM-LF
64A3 =PP5V_S5_PATA
6 PP5V_S0_IDE_PATA
MAKE_BASE=TRUE
5 VOLTAGE=5V
4 MIN_LINE_WIDTH=0.35MM
1 2 MIN_NECK_WIDTH=0.25MM
R3865 1
=PP5V_S0_IDE_PATA
6.2K =PP3V3_S0_PATA 64A6
5%
=PP3V3_S0_SB 1/16W
64B6 25D8 22B5 MF-LF
2 402 3
R3825 C3876 NOSTUFF
10K
0.1UF
1 2
R38241
1
ODD_PWR_EN_SLOW_START_L 1 2 10K
R3876 5%
ODD_PWR_EN_SLOW_START_L_R
20%
5%
1/16W
10K 1/16W
MF-LF 10V MF-LF CRITICAL
5% 402 2
1/16W
MF-LF 3
402 CERM
402 J3801
5-1775184-0 1
2 402 D
Q3875 1
R3851 M-ST-SM
51
R3853
4.7K NC 33K
2N7002DW-X-F 5%
SB_GPIO5 IS PULLED HIGH ODD_PWR_EN_SLOW_START SOT-363 5% 1/16W
5 G S 1/16W MF-LF
MF-LF NC 2 1 NC
Per ATA Spec 2 402
2 402 4 3
C 6
1 C3875 1
R3877
4
23A3 IDE_RESET_L
NC
6 5 IDE_PDD<8> 21B5
C
D
Q3875 0.47UF 100K 21B5 IDE_PDD<7>
8 7 IDE_PDD<9> 21B5
2N7002DW-X-F 10% 5%
SB_GPIO5 ODD_PWR_EN_L
2 SOT-363 2 6.3V
CERM-X5R 1/16W 21B5 IDE_PDD<6>
10 9 IDE_PDD<10> 21B5
26C3 22A6 G S MF-LF
402 12 11
21B5 IDE_PDD<5> IDE_PDD<11>
MAKE_BASE=TRUE 2 402 21B5
1 21B5 IDE_PDD<4>
14 13 IDE_PDD<12> 21B5
21B5 IDE_PDD<3>
16 15 IDE_PDD<13> 21B5
21B5 IDE_PDD<2>
18 17 IDE_PDD<14> 21B5
21B5 IDE_PDD<1>
20 19 IDE_PDD<15> 21B5
ODD detect need less than 100ms include OS latency 21C5 IDE_PDD<0>
22 21
24 23 IDE_PDIOR_L 21B6
21B6 IDE_PDIOW_L 26 25
21B6 IDE_PDIORDY 28 27 IDE_PDDACK_L 21B6
OUT
21B6 IDE_IRQ14 30 29 SMC_ODD_DETECT Indicates disk presence, to SMC
OUT
21B5 IDE_PDA<1> 32 31 NC
21B5 IDE_PDA<0> 34 33 IDE_PDA<2> 21B5
NO STUFF
21B5 IDE_PDCS1_L
36 35 IDE_PDCS3_L 21B5
C3804 1 NC 38 37
10pF
5% 40 39
50V
CERM 2 42 41
402
44 43
46 45
IDE_CSEL_PD NOSTUFF NOSTUFF
48 47
50 49 NC
1 C3805 1 C3806
NC 0.1uF 10uF
20% 20%
10V 6.3V
52 2 CERM 2 X5R
NC 402 603
B 516S0339 B
21B6
OUT
IDE_PDDREQ
PLACE C3805/C3806 CLOSE TO JC901 FOR PP5V_PATA.
APPLY A WIDE TRACE SHAPE FROM JC901 TO C3805/C3806.
1 1 MIN_NECK & MIN_LINE WIDTH
R3858 R3859 ARE CONTROLLED BY PP5V_RUN 1MM / 0.6MM.
0 6.2K
5% 5%
1/16W 1/16W
MF-LF MF-LF
2 402 2 402
PER ATA SPEC PER ATA7 SPEC
PATA CONNECTOR
A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 34 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SATA CONNECTOR
Place L3901 near J3901
VALUE=3900PF IN REFERENCE SCHEM
CAPS TO BE SAME DISTANCE

R3900
L3901 C3903 100
D 518S0390 90-OHM-300mA
2012H
SATA_C_R2D_F_P 1 2
FROM SB WITHIN EACH PAIR
21B6 SATA_C_R2D_C_P
IN
1
5%
2 23D2 SATA_C_DET_L IN
D
CRITICAL 2 3 1/16W
MF-LF
0.0047UF 402
J3901 SATA_C_R2D_F_N 402 1 2 C3901 21B6 SATA_C_R2D_C_N
20247-019E 0.0047UF
IN
F-ST-SM 1 4
20 402
SYM_VER-1
PLACE NEAR ICH7 PIN

1
2 SATA_C_R2D_P
3 SATA_C_R2D_N C3900 L3902
90-OHM-300mA
21B6
SATA_RBIAS_N OUT
1 2 SATA_C_D2R_F_N 2012H
4
21B6 SATA_C_D2R_N OUT
SATA_RBIAS_PN
21B6
2 3 MAKE_BASE=TRUE SATA_RBIAS_P
5 SATA_C_D2R_C_N OUT
0.0047UF
402
6 SATA_C_D2R_C_P 1 2 C3902 SATA_C_D2R_F_P 21B6 SATA_C_D2R_P OUT 1
7 0.0047UF
402 1 4 R3901
8 SYM_VER-1 24.9
=PP5V_S0_SATA 64D3 1%
9 1/16W
NC NOSTUFF NOSTUFF MF-LF
10 1 1 2 402
C3920 C3921 PLACE L3902 NEAR SB
11 0.1uF 10uF
20% 20%
12
2 10V
CERM 2 6.3V
X5R
13 402 603 0
14
15
16
17 NC
18 NC
19 NC
C 21 SYSTEM (SLEEP) LED FILTER C

L3912 SATA DIFF PAIR GND VIAS
600-OHM-300MA
GND_CHASSIS_SATA
SYS_LED_ANODE_L 1 2 SYS_LED_ANODE 5B2 46A3 GV3901 GV3902
6C7
0402 HOLE-VIA-P5RP25 HOLE-VIA-P5RP25
1 1
1 C3923 1 C3922 GV3903 GV3904

470PF 0.01UF HOLE-VIA-P5RP25
10% 10% 1 HOLE-VIA-P5RP25
IR_RX_OUT 2
50V 2
16V 1
41C6 CERM CERM
402 402
GV3905 GV3906
HOLE-VIA-P5RP25 HOLE-VIA-P5RP25
1 1
(TO IR RECEIVER) R3950
100
PP5V_S3_SYSLED_F 1 2 =PP5V_S3_SYSLED 46B4 64B3 GV3907 GV3908
5% HOLE-VIA-P5RP25 HOLE-VIA-P5RP25
1/16W 1 1
MF-LF
1 C3950 402
4.7UF
20%
6.3V
2 CERM
603 0
B B
TABLE_ALT_HEAD

PART NUMBER
TABLE_ALT_ITEM
155S0227 155S0164 ? L3901,L3902 KEEP MAG.LAYER IN BOM
SATA CONNECTOR
A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 35 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PLACE C4100-C4106 NEAR PINS AVDLL0-AVDLL6.
SCHEME MATCHES DOC MVL100258-01 MIN_LINE_WIDTH=0.4MM
L4100
MIN_NECK_WIDTH=0.22MM FERR-120-OHM-1.5A
VOLTAGE=2.5V
37D8 PP2V5_S3_ENET_AVDD 1 2 =PP2V5_S3_ENET 64C3
0402-LF
1
C4100 1
C4101 1
C4102 1
C4103 1
C4104 1
C4105 1
C4106 1
C4107
1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.001UF 0.001UF 0.1UF
10% 10% 10% 10% 10% 10% 10% 10%
6.3V 16V 16V 16V 16V 50V 50V 16V
2 CERM 2 X5R 2 X5R 2 X5R 2 X5R 2 CERM 2 CERM 2 X5R
402 402 402 402 402 402 402 402
D 36C8 36B5 36B4 36A5 =PP3V3_S3_ENET

PLACE C4107 NEAR U4101 AVDD D
64B3 36D6
1
R4101=PP1V2_S3_ENET 36A8 64C3 =PP3V3_S3_ENET 36D8 64B3
36A5 36B4
4.7K 36B5 36C8
5% PLACE C4110 AND C4111 WITHIN
1/16W 12 MIL OF U4101 PIN 49 AND 50
MF-LF
2 402
C4110 10%
16V
0.1UF X5R
402
7
2
1
NOSTUFF
58
48
44
39
33
13
61
45
40
23
57
52
51
32
28
22
19
64
R4107 PCIE_A_D2R_C_P 1 2 22D4 PCIE_A_D2R_P OUT
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
VDDO_TTL4
VDDO_TTL3
VDDO_TTL2
VDDO_TTL1
VDDO_TTL0
AVDD
AVDDL6
AVDDL5
AVDDL4
AVDDL3
AVDDL2
AVDDL1
AVDDL0
VDD25
SB_GPIO30 1
0 2 ENET_LOM_DIS_L PCIE_A_D2R_C_N 1 2 22D4 PCIE_A_D2R_N
22C4 OUT
22D8
5%
1/16W 10%
MF-LF 16V C4111
402 X5R
0.1UF C4112 X5R
10%
10 LOM_DISABLE* TX_P 49
402
0.1UF 16V
36B5 36B4 36A5 =PP3V3_S3_ENET 12 VAUX_AVLBL OMIT TX_N 50 402
64B3 36D8 36D6
64A6 =PP3V3_S0_ENET 47 VMAIN_AVLBL CRITICAL RX_P 54 PCIE_A_R2D_P 1 2 22D4 PCIE_A_R2D_C_P IN
NC 11 SWITCH_VCC U4101 RX_N 53 PCIE_A_R2D_N 1 2 22D4 PCIE_A_R2D_C_N IN
NC 9 SWITCH_VAUX 88E8053 PLACE C4113 AND C4112 WITHIN
QFN REFCLKP 55 33D2 33C3 ENET_CLK100M_PCIE_P IN C4113 12 MIL OF U2100 E27 AND E28
OPTIONAL EXTERNAL LDO
NC 24 HSDACP PCI EXPRESS REFCLKN 56 33D2 33C3 ENET_CLK100M_PCIE_N IN 0.1UF

NC 25 HSDACN ANALOG PCIE_WAKE_L
402
X5R
WAKE* 6 43C6 23C8
OUT 16V
6A4 ENET_CTRL25 4 CTRL25 PERST* 5 26A1 ENET_RST_L 10%
OUT IN
6A4 ENET_CTRL12 3 CTRL12
OUT
MDIP0 17 37C8 ENET_MDI_P<0> IO
ENET_RSET 16 RSET
MDIN0 18 37C8 ENET_MDI_N<0> IO
ENET_MDI_P<1>
C MDIP1 37B8
C
NO PULL-UP NEEDED
20 IO
NC 59 LED_ACT*
MDIN1 21 37B8 ENET_MDI_N<1>
IO
NC 60 LED_LINK10/100*
MEDIA
NC 62 LED_LINK1000* LED MDIP2 26 37B8 ENET_MDI_P<2> IO
63 LINK* MDIN2 27 37B8 ENET_MDI_N<2>
2
NC
R4102
IO
4.75K
1/16W
MF-LF
402
ENET_MDI_P<3>
1%
MDIP3 30 37B8
IO
MDIN3 31 37B8 ENET_MDI_N<3>
IO
1
29 TSTPT TEST VPD_CLK 38 ENET_VPD_CLK 36A2
46 TESTMODE TWSI VPD_DATA 41 ENET_VPD_DATA 36A2
PU_VDDO_TTL0 42 ENET_PU_VDD_TTL0 36A6

TEST
PU_VDDO_TTL1 43 ENET_PU_VDD_TTL1 36A6
ASF IS UNAVAILABLE ON 8053
SPI_DI 35 NC
SPI_DO 34 NC
1 1 1 1 1 1 1 1
SPI SPI_CLK 37 NC
INTERNAL PULL-UP R4106 R4105 R4104 R4103 R4120 R4119 R4118 R4117
49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9
SPI_CS 36 NC 1% 1% 1% 1% 1% 1% 1% 1%
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W
CRITICAL MF-LF MF-LF MF-LF MF-LF MF-LF MF-LF MF-LF MF-LF
XTALI 15 ENET_XTALI 1. KEEP ENET_XTALI AND ENET_XTALO
2
402
2
402
2
402
2
402
2
402
2
402
2
402
2
402
MAIN CLK XTALO 14 ENET_XTALO TRACE LENGTH <12MIL
3 1
THRML_PAD
65
2. DO NOT ROUTE UNDER CRYSTAL ENET_MDI0 ENET_MDI1 ENET_MDI2 ENET_MDI3

4 2
NC NC
Y4101
25.0000M 1
C4116 1
C4115 1
C4117 1
C4118
SM-3.2X2.5MM 0.001UF 0.001UF 0.001UF 0.001UF
10% 10% 10% 10%
50V 50V 50V 50V
1
C4150 1
C4151 2 CERM 2 CERM 2 CERM 2 CERM
15PF 15PF 402 402 402 402
5% 5%
B 2
50V
CERM
402
2
50V
CERM
402
B
PLACE RESISTORS CLOSE TO U4101
=PP3V3_S3_ENET 36A5 36B4 36C8 36D6 36D8 64B3
64B3 36D8 36D6 36C8 36B5 36A5 =PP3V3_S3_ENET

1 1
R4130 R4131 PLACE C4140 NEAR U4102 VCC
4.7K 4.7K
5% 5%
1
C4140
2
1/16W 1/16W
R4122
R4123
4.7K
MF-LF MF-LF
0.1UF
4.7K
1/16W
MF-LF
1/16W
MF-LF
402 402
402
402
2 2 10%
5%
5%
ENET_PU_VDD_TTL0 16V
36C6 2 X5R
402 OMIT
1
36B6 ENET_PU_VDD_TTL1 CRITICAL 8
3 E2
VCC
U4102 SDA ENET_VPD_DATA

2 NC1 5 36C6
1 NC0
PLACE C4127-C4134 NEAR PINS VDD0-VDD7 ON U4101 PLACE C4135-C4139 NEAR VDDO_TTL0-VDD_TTL4 ON U4101 M24C08 SCL 6 ENET_VPD_CLK 36C6
SCHEME MATCHES DOC MVL100258-01 SCHEME MATCHES DOC MVL100258-01 7 WC* SO8
NOSTUFF
1
64C3 36D7 =PP1V2_S3_ENET 64B3 36D8 36D6 36C8 36B5 36B4 =PP3V3_S3_ENET VSS R4124
4
0
5%
1/16W
MF-LF
1
C4139 2 402
1
C4126 1
C4127 1
C4128 1
C4129 1
C4130 1
C4131 1
C4132 1
C4133 1
C4134 1
C4135 1
C4136 1
C4137 1
C4138
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.001UF 0.001UF 0.001UF 0.001UF 0.1UF 0.1UF 0.1UF 0.001UF
0.001UF
10%
ETHERNET CONTROLLER
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 50V
16V 16V 16V 16V 16V 50V 50V 50V 50V 16V 16V 16V 50V 2 CERM
A 2 X5R
402
2 X5R
402
2 X5R
402
2 X5R
402
2 X5R
402
2 CERM
402
2 CERM
402
2 CERM
402
2 CERM
402
2 X5R
402
2 X5R
402
2 X5R
402
2 CERM
402
402 SYNC_MASTER=ENET

A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 36 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
L4250
120-OHM-0.3A-EMI
PLACE ONE CAP AT EACH PIN 3 AND 6 OF TRANSFORMERS
36D5 PP2V5_S3_ENET_AVDD 1 2PP2V5_S3_ENET_AVDD_F
0402-LF
1
C4200 1
C4201 1
C4202 1
C4203
0.1UF 0.1UF 0.1UF 0.1UF
10% 10% 10% 10%
16V 16V 16V 16V
2 X5R 2 X5R 2 X5R 2 X5R
402 402 402 402
PLACE ONE CAP NEAR EACH PIN 3 AND 6 OF TRANSFORMERS
1
C4204 1
C4205 1
C4206 1
C4207
0.001UF 0.001UF 0.001UF 0.001UF
10% 10% 10% 10%
50V 50V 50V 50V
2 CERM 2 CERM 2 CERM 2 CERM
402 402 402 402
CROSS-OVERS ARE IN SCHEMATIC TO EASE ROUTING
OMIT
C CRITICAL
CRITICAL
J4200
C
1000BT-824-00275 RJ45
T4201
819B-3608-M280
XFR-SM
F-RT-SM
36C3 ENET_MDI_P<0> 1 16 ENET_MDI_TRAN_P<0> 10
IO
SYM_VER-2
36C3
IO
ENET_MDI_N<0> 2 15 ENET_MDI_TRAN_N<0>
1
2
3 14
ENET_CENTER_TAP<0>
3
CHIP
SIDE
SIDE
NC1 LINE
4
NC4 13
4
5
NC2 NC3 12
5
6 11
ENET_CENTER_TAP<1>
6
7
36C3
IO
ENET_MDI_P<1> 7 10 ENET_MDI_TRAN_P<1>
8
36C3
IO
ENET_MDI_N<1> 8 9 ENET_MDI_TRAN_N<1>
9
CRITICAL
1000BT-824-00275
514S0119
T4202
XFR-SM
36C3
IO
ENET_MDI_P<3> 1 16 5A7 ENET_MDI_TRAN_P<3>
36C3
IO
ENET_MDI_N<3> 2 15
ENET_MDI_TRAN_N<3>
3 14 ENET_CENTER_TAP<2>
CHIP
SIDE
SIDE
LINE
4
NC1 NC4 13
B 5
6
NC2 NC3 12
11 ENET_CENTER_TAP<3>
B
36C3
IO
ENET_MDI_P<2> 7 10 5A7 ENET_MDI_TRAN_P<2>
36C3
IO ENET_MDI_N<2> 8 9 5A7 ENET_MDI_TRAN_N<2>
TABLE_ALT_HEAD

PART NUMBER 1 1 1 1
TABLE_ALT_ITEM
R4200 R4201 R4202 R4203
157S0037 157S0011 ? T4201,T4202 E&E AND DELTA TRANSFORMER 75 75 75 75
1% 1% 1% 1%
1/16W 1/16W 1/16W 1/16W
MF-LF MF-LF MF-LF MF-LF
402 402 402 402
2 2 2 2
ENET_BOB_SMITH_CAP
1
C4210
0.001UF
20%
2KV
2 CERM
1808
6C8 =GND_CHASSIS_RJ45 OUT

ETHERNET CONNECTOR
A 1 C4211 1 C4212
SYNC_MASTER=ENET

A
0.001UF 0.001UF
10% 10%
2 50V
CERM 2 50V
CERM THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
402 402 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
PLACE C4211 AND C4212
ON EACH SIDE OF J4200 TABLE_5_HEAD SIZE DRAWING NUMBER REV.
514S0143 1 CONN,8P RJ-45 JACK,MIDPLANE,MG3,LF J4200 CRITICAL NORMAL

TABLE_5_ITEM
APPLE COMPUTER INC.

D 051-7374 A
TABLE_5_ITEM SCALE SHT OF

514S0144 1 CONN,8P RJ-45 JACK,MIDPLANE,BLACK,LF J4200 CRITICAL FANCY NONE 37 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PAGE NOTES
MOBILE TURNS OFF CONTROLLER POWER DURING SLEEP
INPUT 0.001A DURING SLEEP
=PP3V3_S0_FW - 3.3V POWER FOR FIREWIRE (MOBILE: OFF DURING SLEEP)
=PP3V3_S0_PCI - 3.3V POWER FOR PCI FIREWIRE (MOBILE: OFF DURING SLEEP)
64B3 =PP3V3_S3_FW
PCI_GNT3_L - PCI GRANT FROM SB
PCI_CLK_FW - NEED TO REFERENCE TO ALIAS PAGE PLACE ONE CAP PER TWO PINS STARTING WITH C4424 ON VDD0
PCI_RST_L - PCI RESET FROM SB
FW_PC0 - FIREWIRE POWER CLASS IDENTIFIER 1 C4424 1 C4418 1 C4422 1 C4426 1 C4428 1 C4430 1 C4432
10UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
INPUT/OUTPUT 20% 20% 20% 20% 20% 20% 20%
D PCI_AD<0..31>,PCI_C_BE_L<0..3>,PCI_FRAME_L,PCI_IRDY_L,PCI_TRDY_L,
6.3V
2 X5R
603
2 10V
CERM
402
2 10V
CERM
402
2 10V
CERM
402
2 10V
CERM
402
2 10V
CERM
402
2 10V
CERM
402 D
PCI_DEVSEL_L, PCI_STOP_L, PCI_PAR, PCI_PERR_L, PCI_SERR_L
FW_A_TPA_P/N, FW_A_TPB_P/N, FW_A_TPBIAS - PORT 0 FIREWIRE DIFF PAIRS
FW_B_TPA_P/N, FW_B_TPB_P/N, FW_B_TPBIAS - PORT 1 FIREWIRE DIFF PAIRS
FW_C_TPA_P/N, FW_C_TPB_P/N, FW_C_TPBIAS - PORT 2 FIREWIRE DIFF PAIRS
L4400 PLACE ONE CAP PER TWO PINS STARTING WITH C4416 ON VDDA0
OUTPUT 600-OHM-300MA
PCI_REQ3_L - PCI REQUEST TO SB 1 2 PP3V3_S3_FW_AVDD
VOLTAGE=3.3V
PM_CLKRUN_L - CLOCK-RUN PCI PROTOCOL 0402 MIN_LINE_WIDTH=0.5MM
INT_PIRQD_L - INTERRUPT TO SB
1 C4416 1 C4417 1 C4429 1 C4425 MIN_NECK_WIDTH=0.2MM
10UF 0.1UF 0.1UF 0.1UF
PCI_PME_FW_L - DEDICATED PME FOR FIREWIRE (SB GPIO1) 20% 10% 10% 10%
2 6.3V
X5R 2 16V
X5R 2 16V
X5R 2 16V
X5R
603 402 402 402
PAGE HISTORY
5/19/2005 - FIRST REVISION OF PAGE
6/20/2005 - BGA VERSION OF FW323-06 ADDED
6/21/2005 - CHANGED INT* TO INT_PIRQD_L (PER ARCHITECTURAL DEFINITION)
6/21/2005 - CHANGED PCI_ID TO AD19 (PER ARCHITECTURAL DEFINITION)
6/21/2005 - CHANGED REQ/GNT TO REQ3/GNT3 (PER ARCHITECTURAL DEFINITION)
6/22/2005 - ADDED 510K PULL-DOWN ON RST* AND REMOVED CONNECTION TO PLT_RST_L
6/22/2005 - CHANGED CLK,PME,DIFF PAIR NAMES TO BE RE-USE COMPLIANT
6/22/2005 - REMOVED CONSTRAINT SETS AS THEY WILL BE MANAGED ON BOARD SIDE
6/22/2005 - REMOVED C4421 - REDUNDANT 64B3 =PP3V3_S3_PCI
6/22/2005 - BRING OUT PC0 CONNECTION TO BE CONNECTED ON PORT PAGE
7/26/2005 - CONNECTED PIN E10 TO GND
197S0030 3.2MMX2.5MM
L13
H13
D10
A13
B13
G4
N1
N2
K5
K6
K7
A2
A7
A8
D6
CRITICAL
Y4403
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD9
VDDA0
VDDA1
VDDA2
VDDA3
VDDA4
VDDA5
SM-3.2X2.5MM
R4400 24.576MHZ
1
390 2 FW_XO_R 1 3
CONNECT TO VDD FOR 3.3V OPERATION G13 PCI_VIOS 5%
1/16W 2 4
MF-LF
IO
22B7 PCI_AD<0> F10 PCI_AD0 402 C4411 1 1 C4412
C IO
22B7 PCI_AD<1>
22B7 PCI_AD<2>
G10
H10
PCI_AD1
OMIT
CRITICAL A5 FW_XI
15pF
5%
50V
5%
15pF
2 50V
C
IO PCI_AD2 XI CERM 2 CERM
22B7 PCI_AD<3> H12 402 402
IO
IO 22B7 PCI_AD<4> J13

PCI_AD3
PCI_AD4
U4400 XO B5 FW_XO
22B7 PCI_AD<5> J12
FW32306 NEED TO CHECK CRYSTAL LOAD CAPACITANCE
IO PCI_AD5 BGA
22B7 PCI_AD<6> K13
IO PCI_AD6
22B7 PCI_AD<7> K10 B4 FW_PWRON_RST_L
IO PCI_AD7 RESET*
22B7 PCI_AD<8> L12
IO PCI_AD8
IO
22B7 PCI_AD<9> M13 PCI_AD9 1
1 C4420 1
R4420
IO
22B7 PCI_AD<10> L11 PCI_AD10 R1 A6 FW_R1 R4452 10%
0.1UF 510K
2.1K 5%
IO
22B7 PCI_AD<11> M12 PCI_AD11 SPEC RECOMMENDS 2.49K 1% 2 16V
X5R 1/16W
1/16W 402 MF-LF
22B7 PCI_AD<12> M11 B7 FW_R0 MF-LF
IO PCI_AD12 R0 2 402
22B7 PCI_AD<13> N12 2 402
IO PCI_AD13
22B7 PCI_AD<14> M10
IO PCI_AD14 B8 39B6 FW_A_TPBIAS
22B7 PCI_AD<15> N11 TPBIAS0 IO
IO PCI_AD15 A9 39B6 FW_A_TPA_P
22B7 PCI_AD<16> M4 TPA0_P IO
IO PCI_AD16 B9 39B6 FW_A_TPA_N
22B7 PCI_AD<17> N5 TPA0_N IO
IO PCI_AD17 B10 39B6 FW_A_TPB_P
22B7 PCI_AD<18> N4 TPB0_P IO
IO PCI_AD18 A10 39B6 FW_A_TPB_N
22A7 PCI_AD<19> M3 TPB0_N IO
IO PCI_AD19 D8 6D2 FW_B_TPBIAS
22A7 PCI_AD<20> M2 TPBIAS1 IO
IO PCI_AD20 A11 6D2 FW_B_TPA_P
22A7 PCI_AD<21> N3 TPA1_P IO
IO PCI_AD21 B11 6D2 FW_B_TPA_N
22A7 PCI_AD<22> K4 TPA1_N IO
IO PCI_AD22 B12 6D2 FW_B_TPB_P
22A7 PCI_AD<23> M1 TPB1_P IO
IO PCI_AD23 A12 6D2 FW_B_TPB_N
22A7 PCI_AD<24> K2 TPB1_N IO
IO PCI_AD24 C13 6D2 FW_C_TPBIAS
22A7 PCI_AD<25> J4 TPBIAS2 IO
IO PCI_AD25 C11 6D2 FW_C_TPA_P
22A7 PCI_AD<26> K1 TPA2_P IO
IO PCI_AD26 C12 6D2 FW_C_TPA_N
B IO
22A7 PCI_AD<27>
22A7 PCI_AD<28>
J2
J1
PCI_AD27
PCI_AD28
TPA2_N
TPB2_P D13 6D2 FW_C_TPB_P
IO
IO B
6D2 FW_C_TPB_N
IO
TPB2_N D12
22A7 PCI_AD<29>
IO
IO H2 PCI_AD29
22A7 PCI_AD<30> H4
IO PCI_AD30
22A7 PCI_AD<31> H1
IO PCI_AD31
22B6
IO PCI_C_BE_L<0> K12 PCI_CBE0*
22B6
IO
PCI_C_BE_L<1> M9 PCI_CBE1*
22B6
IO
PCI_C_BE_L<2> L3 PCI_CBE2*
22B6
IO PCI_C_BE_L<3> L1 PCI_CBE3*
IO 22A6 PCI_PAR N10 PCI_PAR MODE_420 M5 MODE FOR EXTERNAL LINK

26D3
R44311 IO 22A7 PCI_FRAME_L N6 PCI_FRAME* MODE_A B6
26D3
22 IO 22A6 PCI_IRDY_L M6 PCI_IRDY*
5% 26D3
1/16W IO 22A6 PCI_TRDY_L N7 PCI_TRDY* PC0 E12 39C8 FW_PC0 IO
MF-LF 26D3 DUAL PORT DEVICES ARE POWER CLASS 4 (’100’)
402 2 22A6 PCI_DEVSEL_L N8 F13
IO
26D3
PCI_DEVSEL* PC1 SINGLE PORT DEVICES ARE POWER CLASS 0 (’000’)
22A6 PCI_STOP_L M7 F12
IO PCI_STOP* PC2
FW_PCI_IDSEL L2 PCI_IDSEL CONTENDER G12 LOW = NOT BUS MANAGER
26C3 CARDBUSN B1 LOW = PCI OPERATION
OUT
22B6 PCI_REQ3_L E2 PCI_REQ* MPCI_ACTN_323 E10
22B6 PCI_GNT3_L E1
IN
26D3
PCI_GNT*
22A6 PCI_PERR_L M8 C2
IO PCI_PERR* TEST0
26D3
22A6 PCI_SERR_L N9 C1
IO PCI_SERR* TEST1
MANUFACTURING TEST PINS PTEST A4
IN 33D6 PCI_CLK_FW G2 PCI_CLK
SE A3
R4432 IO
PM_CLKRUN_L D1 CLKRUN*
IN
22A6 PCI_RST_L 1
100 2 FW_PCI_RST_L F1 PCI_RST*
SM B3
FIREWIRE CONTROLLER
26C3
1% 22A7 INT_PIRQD_L D2 PCI_INTA* SYNC_MASTER=ENET SYNC_DATE=08/30/2005
A 1/16W
MF-LF
402
OUT
OUT
22B5 PCI_PME_FW_L F2 PCI_PME*
A
THIS IS FROM ICH-7M
PLACE R4432 VERY CLOSE TO PIN B18 OF U2100 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSSA0
VSSA1
VSSA2
VSSA3
VSSA4
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

A1
B2
C3
D4
E4
E5
F4
F6
F7
F8
G1
G6
G7
G8
H6
H7
H8
J5
J9
J10
K8
K9
N13
E13
E9
D9
D7
D5
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 38 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Page Notes
INPUT:
=PPBUS_FW - PORT POWER
=PP3V3_S5_FW - DIGITAL POWER
=GND_CHASSIS_FW_PORT0 - CHASSIS GROUND
=FWPWR_PWRON - ADDITIONAL POWER CONTROL
INPUT/OUTPUT:
FW_TPA0_P/N,FW_TPB0_P/N,FW_TPBIAS0 - FIREWIRE DIFF PAIRS
D D
OUTPUT: PPBUS_S5_FWPWRSW_F
VOLTAGE=18.5V
FW_PC0 - POWER CLASS IDENTIFIER (SINGLE PORT - TIE LOW) MIN_LINE_WIDTH=0.5MM
PPFW_SWITCH 5B2
PAGE HISTORY Q4590 VOLTAGE=19V

FL4590 FDC638P
SM-LF
5/19/05
6/22/05
6/22/05
-
-
-
INITIAL REVISION
CHANGED DIFF PAIR NAMES TO MATCH REUSE
REMOVED CONSTRAINTS BECAUSE USING ALLEGRO CONST MANAGER
1.1A-24V D4590
SMB
6/22/05 - CONNECTED FW_PC0 FOR SINGLE PORT 64C1 =PPBUS_S5_FWPWRSW 1 2 6
7/26/05 - UPDATED LATE-VG POWER RAIL CIRCUIT FROM M1 1 2
7/26/05 - CHANGED CONNECTOR PORT NAMING TO PORT0 5
7/26/05 - SWITCHED TO 514-0124 FOR PRE-PROTO CONNECTOR MINISMDC 4
2
7/26/05 - REMOVED R4520 - IT HASN’T BEEN STUFFED FOR MANY PRODUCTS B340LBXF
7/26/05 - CHANGED FL4590 TO 1.1A VERSION 1
7/26/05 - REMOVED ETHERNET LOW-POWER MODE CIRCUIT
7/26/05 - UPDATED SIGNAL NAMES FOR FW PORT POWER ENABLE
R4590 1 1
C4590
470K 0.01uF
64A6 =PP3V3_S0_FW 5% 10%
1/16W 16V
1394b implementation based on Apple MF-LF 2 CERM
402 2
FireWire Design Guide (FWDG 0.6, 5/14/03) 402
Cable Power
FWPWR_EN_L_DIV
R4593 1 MIN_LINE_WIDTH=0.05MM
MIN_NECK_WIDTH=0.05MM PPFW_PORT0_VP_F
100K VOLTAGE=16.5V
5%
1/16W D4591 R4591 1 MIN_LINE_WIDTH=0.5MM
MF-LF 330K
402 BAS16TW-X-F 5%
2 SOT-363 1/16W L4510 PPFW_PORT0_VP
IF =FWPWR_PWRON IS NC: 1 6 MF-LF FERR-250-OHM VOLTAGE=16.5V
FWPWR_RUN 402 2 MIN_LINE_WIDTH=0.5MM
ENABLES PORT POWER WHEN MACHINE IS RUNNING 1 2 MIN_NECK_WIDTH=0.25MM
OR ON AC
IF =FWPWR_PWRON LOW WHEN OFF:
FWPWR_EN_L 60C8
SM
D4591 MIN_LINE_WIDTH=0.05MM
ENABLES PORT POWER WHEN MACHINE IS RUNNING
BAS16TW-X-F C4510
C PORT POWER CLASS
OR ON AC AND NOT SHUTDOWN
=FWPWR_PWRON 5
SOT-363
2 D
3
1
0.001uF
10%
C
6D2 Q4591 2
50V
2N7002 CERM
0 FOR SINGLE PORT 402
SOT23-LF
FWPWR_EN 1 G
1 FOR DUAL PORT D4591 S
BAS16TW-X-F
R4594 SOT-363 2
38A3
OUT
FW_PC0 10K 3 4
65C3 46B3 45D5 5C1 SMC_PS_ON 1 2 FWPWR_ACIN
5%
1/16W
MF-LF
402 1
R4595
Enables port power whenever 470K
5%
machine AC Adapter is plugged 1/16W
MF-LF
or system at run state with battery only 2
402
"Snapback" & "Late VG" Protection
39A6 PP3V3_S5_FWLATEVG
[LATE VG NOTES]
CURRENT THROUGH THE BIAS RESISTOR SHOULD BE 5MA FOR A VOLTAGE DROP TO 2.2V
IT IS 2.2V INSTEAD OF 2.7V BECAUSE THE SNAPBACK ESD DIODES HAVE A 0.5V DROP D4520 D4520
IO
38B3 FW_A_TPBIAS BAV99DW-X-F BAV99DW-X-F
SOT-363 SOT-363
C4520 1 5
C4521 1
2
0.01UF 0.01UF
1
C4500 10% 10%
1 1 16V 3 16V 6
PORT 0
R4500 R4501 0.33UF CERM 2 CERM 2
56.2 56.2 10% 402 402
1%
1/16W
1%
1/16W
2
6.3V
CERM-X5R
4 1
120-OHM 1394A
402
MF-LF MF-LF
FW_PORT0_TPA_P 2012 OMIT
2 402 2 402 2 3 CRITICAL
B FW_PORT0_TPA_N
1 4
J4500
1394A
B
IO 38B3 FW_A_TPA_P SYM_VER-2 F-RT-TH1
38B3 FW_A_TPA_N
IO
FL4520 FW_PORT0_TPA_P_FL 6
TPO
38B3 FW_A_TPB_P (TPA+)
IO 120-OHM
38B3 FW_A_TPB_N FW_PORT0_TPA_N_FL 5
IO
FW_PORT0_TPB_P 2
2012
3
TPO# (TPA-)
FW_PORT0_TPB_P_FL 4
TPI (TPB+)
1 FW_PORT0_TPB_N FW_PORT0_TPB_N_FL 3
1 R4503 1 4 TPI#
R4502 56.2
SYM_VER-2 (TPB-)
56.2 1
1%
1%
1/16W
D4521 D4521 FL4521 (PPFW_PORT0_VP)
VP
1/16W MF-LF BAV99DW-X-F BAV99DW-X-F
SOT-363 SOT-363 2
MF-LF 2 402 (GND_FW_PORT0_VGND)
LATE-VG PROTECTION POWER 2 402 2 5
VGND
FW_PORT0_TPB
6 3 7 8
PP3V3_S5_FWLATEVG_F 1
C4522 1 C4523 1 1 C4524 C4525 1
VOLTAGE=3.3V
1
C4501 R4504 0.01UF 1 0.01UF 4 0.01UF 0.01uF =GND_CHASSIS_FW_UPPER 6A6
MIN_LINE_WIDTH=0.35MM 4.99K 10% 10% 10% 10%
220PF 16V 16V 50V 16V
=PP3V3_S5_FWLATEVG
MIN_NECK_WIDTH=0.25MM 5% 1% CERM 2 CERM 2 2 X7R CERM 2 Plexi: 514-0124
64A3 25V 1/16W 402 402 603-1 402
PP3V3_S5_FWLATEVG 39B5 2 MF-LF Enclosure: 514-0289
L4550 VOLTAGE=3.3V
CERM
402 2
402
R4550 400-OHM-EMI MIN_LINE_WIDTH=0.35MM =GND_CHASSIS_FW_DOWN 6C8
1
330 2 1 2
5% SM-1
1/16W TABLE_5_HEAD
MF-LF
402 PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
3
NO STUFF NO STUFF
1
C4551 1
C4552 D4550
SOT23
514-0359 1 CONN,6P 1394A RCPT,MIDPLANE,MG3,LF J4500 CRITICAL NORMAL
TABLE_5_ITEM
0.1uF 0.001uF
2
20%
10V
2
10%
50V MMBZ5227B 514-0316 1 CONN,6P 1394A RCPT,MIDPLANE,BLACK,LF J4500 CRITICAL FANCY
TABLE_5_ITEM
FIREWIRE PORT
1
CERM CERM
402 402
A SYNC_MASTER=ENET

A
CAPS MAY NOT BE NECESSARY. PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
NO STUFF FOR NOW THOUGH
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 39 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
GEYSER AND DIMM0 REMOTE TEMP SENSORS

D D
L4900
600-OHM-300MA
64B3 =PP5V_S3_GEYSER 1 2 PP5V_S3_GEYSER_F
0402 VOLTAGE=5V
R4910 PLACE C4900 NEAR J4900 MIN_NECK_WIDTH=0.3MM 1 C4900
1K 0.1uF
48C8 46D6 46C8 45C5 SMC_ONOFF_L CONN_GEYSER_ONOFF_L 1 2 CONN_GEYSER_ONOFF_FLTR_L 20%
10V
2 CERM
MAKE_BASE=TRUE 5% 402
1/16W
OUT
1
C4910 MF-LF
402
0.1uF
20%
10V
2 CERM
402
OMIT
CRITICAL
CRITICAL
L4901 J4900
53307-1071
90-OHM F-ST-SM
SM
SYM_VER-1 1 2
6C2 =USB2_GEYSER_P 1 4 CONN_GEYSER_USB_P 3 4 27B6 =SMB_GEYSER_CLK IO

5 6 27B6 =SMB_GEYSER_DATA IO
7 8 SMC_LID 5B2 45B5 46C6 65A8
6C2 =USB2_GEYSER_N 2 3 CONN_GEYSER_USB_N 10
9 49D6 THRM_DIMM0_DXP1 IN
C PLACE L4901 NEAR J4900

L4902 516S0251
C
CRITICAL 600-OHM-300MA RESERVE FOR POSSUM BUILD DEBUG USE
D4900
SC-75
1 2 GEYSER_GND_F
0402 MIN_LINE_WIDTH=0.6MM
1 MIN_NECK_WIDTH=0.3MM
VOLTAGE=0V
3
2 49C6 THRM_DIMM0_DXN
IN
RCLAMP0502B
TABLE_5_HEAD

TABLE_5_ITEM
516S0482 1 ACES 88646-1071-NS J4900 CRITICAL NORMAL

TABLE_5_ITEM
516S0482 1 ACES 88646-1071-NS J4900 CRITICAL FANCY
B B
CONNECTOR MISC
A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 40 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D PLACE C5100 AND C5101

NEAR U5100 PIN 22 AND 49 D
64B3 =PP5V_S3_IR
1 C5100 1 C5101
0.1UF 0.1UF
20% 20%
2 10V
CERM 2 10V
CERM
402 402
22 49 OMIT
VDD
U5100
CY8C24794
MLF
=USB2_IR_P 20
6C2 D+
=USB2_IR_N 21
6C2 D-
45 25
P0_0 P1_0
C 54
46
P0_1 P1_1 18
26
C
P0_2 P1_2
53 17
P0_3 P1_3
47 27
P0_4 P1_4
52 16
P0_5 P1_5
48 P0_6 P1_6 28
51 15
P0_7 P1_7
R5100 41
P2_0 P3_0 33
100 2 10
35C6 IR_RX_OUT 1 2 IR_RX_OUT_F P2_1 P3_1
42 34
5%
1/16W
P2_2 P3_2
MF-LF
402
1 C5102 1
P2_3 P3_3 9
0.001UF 43
P2_4 P3_4 35
10%
50V 56 8
2 CERM P2_5 P3_5
402 44
P2_6 P3_6 36
55 7
P2_7 P3_7
37 29
P4_0 P5_0
C5102 CLOSE TO U5100 PIN 2 6 14
P4_1 P5_1
38 30
P4_2 P5_2
5 13
P4_3 P5_3
39 31
P4_4 P5_4
4 12
P4_5 P5_5
40 32
P4_6 P5_6
3 11
P4_7 P5_7
B 24
23
P7_0
P7_7
THRML
PAD 57
B
VSS
19 50
IR CONTROLLER
A SYNC_MASTER=ENET

A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 41 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
USB 2.0 CONNECTORS

42D2 PP5V_S3_USB2_EXTA_F
L5202 MIN_LINE_WIDTH=0.6MM
FERR-120-OHM-1.5A VOLTAGE=5V
1 2
D
0402-LF
D
OMIT
CRITICAL
PLACE L5200 NEAR J5200
ROUTE USB DATA LINES AS DIFFERENTIAL PAIRS J5200
USB
F-RT-TH-M42
CRITICAL 5
L5200
90-OHM
SM
SYM_VER-1 42D3 PP5V_S3_USB2_EXTA_F 1 VBUS
6C2 =USB2_EXTA_N 1 4 USB2_EXTA_F_N 2 D-
USB2_EXTA_F_P 3 D+
64A3 =PP5V_S5_USB USB2_GND_EXTA_F 4 GND

6C2 =USB2_EXTA_P 2 3
1 C5213 1 C5212
L5204 MIN_LINE_WIDTH=0.6MM 6
FERR-120-OHM-1.5A MIN_NECK_WIDTH=0.3MM
10uF 0.1UF VOLTAGE=0V
20%
2 6.3V 2
20%
10V
1 2 1 C5202 1 C5203
X5R CERM
CRITICAL 0402-LF 0.01UF 0.01UF
603 402 10% 10%
D5200
SC-75
2 16V
CERM 2 16V
CERM
402 402
NOSTUFF CRITICAL 1
1 C5208 1
C5210 =GND_CHASSIS_USB 3
LAYOUT NOTE:C5202,C5203 ARE EMC BY-PASS CAPS FOR J5200
R5250 0.1UF
20%
100UF 42C2 42A4 42A2 6C8
20%
CRITICAL 2 10V
CERM 2 6.3V 2
=EXTAUSB_OC_L
1
1K 2 EXTAUSB_OC_F_L 402 POLY
B2
6C2
5%
U5200 RCLAMP0502B =GND_CHASSIS_USB
42C4 42A4 42A2 6C8
1/16W TPS2042B
1 C5250 MF-LF 2 7 PP5V_S3_USB2_EXTA
C
C 0.47UF
10%
402
8
IN
OC1*
MSOP
OUT1
VOLTAGE=5V
6.3V
2 CERM-X5R
402
3 EN1* OUT2 6 PP5V_S3_USB2_EXTB
5 VOLTAGE=5V
OC2* MIN_LINE_WIDTH=0.6MM
4 MIN_NECK_WIDTH=0.3MM
EN2*
42B2 PP5V_S3_USB2_EXTB_F
GND TPAD MIN_NECK_WIDTH=0.3MM
R5251 1 9
L5203 VOLTAGE=5V
FERR-120-OHM-1.5A
=EXTBUSB_OC_L
1
1K 2 EXTBUSB_OC_F_L 1 2
6C2
5% 0402-LF
1/16W
1 C5251 MF-LF
402
NOSTUFF CRITICAL
0.47UF 1 C5209 1
C5211
10%
2 6.3V
CERM-X5R
0.1UF
20%
100UF
402 10V 20%
2 CERM 2 6.3V
POLY
402 B2
PM_SLP_S4_LS5V
63D6
OMIT
PLACE L5201 NEAR J5201 CRITICAL
ROUTE USB DATA LINES AS DIFFERENTIAL PAIRS J5201
USB
CRITICAL F-RT-TH-M42
5
L5201
B 90-OHM
SM
SYM_VER-1 42C3 PP5V_S3_USB2_EXTB_F 1 VBUS B
6C2 =USB2_EXTB_N 1 4 USB2_EXTB_F_N 2 D-
USB2_EXTB_F_P 3 D+
USB2_GND_EXTB_F 4 GND
6C2 =USB2_EXTB_P 2 3
6
CRITICAL
D5201
SC-75
1 C5206 1 C5207
0.01UF 0.01UF
1 10% 10%
2 16V
CERM 2 16V
CERM
=GND_CHASSIS_USB 3 402 402
42C4 42C2 42A2 6C8
2 LAYOUT NOTE:C5206,C5207 ARE EMC BY-PASS CAPS FOR J5201
RCLAMP0502B
42C4 42C2 42A4 6C8 =GND_CHASSIS_USB

L5205
FERR-120-OHM-1.5A MIN_LINE_WIDTH=0.6MM
1 2 VOLTAGE=0V
TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION 0402-LF

TABLE_5_ITEM
514-0288 2 CONN,4P USB RCPT,MIDPLANE,MG3,LF J5200,J5201 CRITICAL NORMAL

TABLE_5_ITEM
514-0315 2 CONN,4P USB RCPT,MIDPLANE,BLACK,LF J5200,J5201 CRITICAL FANCY DESCRIPTION:

USB EXTERNAL CONNECTORS

A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 42 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
=PP1V5_S0_AIRPORT 64C6
1
C5304 1
C5305 1
C5306
0.1UF 0.1UF 0.1UF
20% 20% 20%
10V 10V 10V
2 CERM 2 CERM 2 CERM
402 402 402
=PP3V3_S0_AIRPORT 64A6
CRITICAL 1
C5308 1
C5307
J5300
AS0B22-S45N-7F
0.1UF
20%
0.1UF
20%
10V 10V
F-ST-SM 2 CERM 2 CERM
54 402 402
36C6 23C8 PCIE_WAKE_L 1 2

IN
3 4
5 6
C 32B4
OUT
CK410_SRC_CLKREQ6_L 7 8
5%
26B1 AIRPORT_RST_L IN C
9 10 1/16W
R5303 MF-LF
33C4 33B2 AIRPORT_CLK100M_PCIE_N 11 12 0 402
IN 1 2
13 14
PP3V3_S3_AIRPORT_AUX_CONN =PP3V3_S3_AIRPORT_AUX 64B3
33D4 33B2
IN
AIRPORT_CLK100M_PCIE_P
15 16 MIN_LINE_WIDTH=0.2MM
17 KEY 18 VOLTAGE=3.3V 1 C5309 1 C5310
10UF 0.1UF
19 20 20% 20%
6.3V 10V
21 22 2 X5R 2 CERM
603 402
22D4 PCIE_B_D2R_N 23 24
OUT
22D4 PCIE_B_D2R_P 25 26
OUT
402 1/16W
27 28 R5301 MF-LF 5%
29 30
0
C5300 SMB_AIRPORT_CONN_CLK 1 2 27C6 =SMB_AIRPORT_CLK
IO
1 2 31 32 0 2
22D4
IN PCIE_B_R2D_C_N 0.1UF PCIE_B_R2D_N SMB_AIRPORT_CONN_DATA 1 27C6 =SMB_AIRPORT_DATA
IO
22D4 PCIE_B_R2D_C_P 1 2 0.1UF PCIE_B_R2D_P 33 34 402 1/16W
IN R5302 MF-LF 5%
35 36
C5301 37 38
PLACE CAPS < 250 MILS FROM (U2100) SB

39 40 6B2 =USB2_AIRPORT_N
IO
41 42 6B2 =USB2_AIRPORT_P SB HAS INTERNAL 15K PULL-DOWNS
IO
43 44
45 46
47 48
49 50
51 52
53
B B
CONNECT TO M35 MODULE
Plexi: 516S0363
* Enclosure: 516S0406
AIRPORT CONN
A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 43 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
PLACE C5498 C5499 NEAR L5410

L5410
120-OHM-0.3A-EMI
64B3 =PP3V3_S3_BT 1 2
NOSTUFF 0402-LF
1
NOSTUFF 1
C5499 C5498
10UF 0.1UF
20% 20%
6.3V 10V
2 2 CERM
C
X5R
603 402 PP3V3_S3_BT_F
C
VOLTAGE=3.3V
CRITICAL
J5400
CRITICAL
88609-04001
F-ST-SM
L5400 5
90-OHM
SB HAS INTERNAL 15K PULL-DOWNS SM
SYM_VER-1
1
6B2 =USB2_BT_N 1 4
2
USB2_BT_F_N
6C2 =USB2_BT_P 3
USB2_BT_F_P TO M13D SLOT
2 3 4

6
GND_BT_F 518S0486
L5411 MIN_NECK_WIDTH=0.2MM
VOLTAGE=0V
120-OHM-0.3A-EMI
1 2
0402-LF
B B
BLUETOOTH INTERFACE
A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 44 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
OMIT
64D1 48C8 46D8 46D5 46D1 45D3 45D2 =PP3V42_G3H_SMC
23C3
OUT
PM_LAN_ENABLE B12 P10 U5800 P60/KIN0* L13 63C8 SMC_PM_G2_EN OUT
26A3
OUT
SMC_RSTGATE_L C13 P11 SMC_H8S2116 P61/KIN1* L14 65C3 46B3 39C6 5C1 SMC_PS_ON (Enable AC adapter PWR)
OUT CRITICAL
BGA
63B1 26A5 5B2
IN
ALL_SYS_PWRGD A15 P12
(1 OF 4)
P62/KIN2* L15 22C6 SPI_ARB
OUT
1 C5802 1 C5803 1 C5804 1 C5805 1 C5806
59A1 46D6 RSMRST_PWRGD B14 P13 P63/KIN3* K12 50C7 22C6 SPI_SCLK 22UF 0.1UF 0.1UF 0.1UF 0.1UF
IN OUT 20% 20% 20% 20% 20%
23C3
OUT SMC_SB_NMI B15 P14 P64/KIN4* K13 50C1 22C6 SPI_SI
OUT 2 6.3V
CERM-X5R 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM
23C1 PM_RSMRST_L C14 P15 P65/KIN5* K14 50C1 22C6 SPI_SO 805 402 402 402 402
OUT IN
58C7
OUT
IMVP_VR_ON D12 P16 P66/IRQ6*/KIN6* J12 46C1 SMC_PROCHOT_3_3_L
IN
23C3
OUT
PM_PWRBTN_L C15 P17 P67/IRQ7*/KIN7* J13 6B1 SMC_CPU_INIT_3_3_L
IN
LAYOUT NOTE: (VCL IS INTERNAL RAIL)
46C6 SMC_P20 D13 P20 P70/AN0 N12 48C1 SMC_CPU_ISENSE IN
PLACE R5899, C5820 NEAR SMC PIN N14, N15 SMC_VCL
D 46C6
46C6
SMC_P21
SMC_P22
D14
D15
P21
P22
P71/AN1
P72/AN2
R13
P13
48B1 5B2 SMC_CPU_VSENSE
46C6 SMC_GPU_ISENSE
IN
IN
D
46C6 SMC_P23 E12 P23 P73/AN3 R14 46C6 SMC_GPU_VSENSE
IN 64D1 48C8 46D8 46D5 46D1 45D3 45D2 =PP3V42_G3H_SMC 64D1 48C8 46D8 46D5 46D1 45D3 =PP3V42_G3H_SMC
66A3 46B6 5C1
OUT
SMC_BATT_TRICKLE_EN_L E14 P24 P74/AN4 P14 66C2 SMC_DCIN_ISENSE
IN
1 C5807
SMC_BATT_CHG_EN 48C5 SMC_PBUS_VSENSE 1 0.47UF
66A4 46B6 5C1
OUT E15 P25 P75/AN5 R15 IN R5899 10%
46C6 SMC_P26 E13 P26 P76/AN6 N13 66B1 SMC_BATT_ISENSE
IN 4.7 2 6.3V
CERM-X5R LAYOUT NOTE:
5% 402 1 1
46C6 SMC_P27 F14 P27 P77/AN7 P15 46B3 SMC_FWIRE_ISENSE
IN 1/16W PLACE C5807 NEAR PIN F1 R5809 R5801
MF-LF
2 402
10K 10K
53C6 47C6 21D4 5D2
IO LPC_AD<0> D9 P30/LAD0 P80/PME* C7 23C1 SMC_WAKE_SCI_L OUT 5% 5%
1/16W 1/16W
53C6 47C6 21D4 5D2
IO
LPC_AD<1> C9 P31/LAD1 P81/GA20 A7 46B2 SMC_TPM_GPIO
IO
PP3V3_AVREF_SMC 46C6 MF-LF MF-LF
53C6 47C5 21D4 5C2 LPC_AD<2> A9 P32/LAD2 P82/CLKRUN* B7 47C6 38A5
53C6
23C8 5C2 PM_CLKRUN_L 2 402 2 402
IO IO
53C6 SMC_AVCC_RC
53C6 47C5 21D4 5C2
IO LPC_AD<3> B9 P33/LAD3 P83/LPCPD* D6 47C5 46D3 23C5 5C2 PM_SUS_STAT_L
IN
AVCC N14
AVCC N15
VCC J15
AVREF M14
AVREF M15
LPC_FRAME_L D8 C6 46B1 SC_TX_L
VCC P2
VCC P1
VCC A1
VCL F1
53C6 47C6 21C5 5C2 P34/LFRAME* P84/IRQ3*/TXD1 (Serial Port Transmit)
IN IO
47B6 5C2 SMC_MD1 (Should PD) (To debug card for mode select)
26B1 SMC_LRESET_L C8 P35/LRESET* P85/IRQ4*/RXD1 A6 46B1 SC_RX_L (Serial Port Receive)
33D6
IN
PCI_CLK_SMC A8 P36/LCLK P86/IRQ5*/SCK1/SCL1 B6 27B3 SMB_BSB_CLK (BAT B SMBUS CLK)
IO 1 C5820 KBC_MDE (Should PU)
IN IO 0.1UF NOSTUFF
53C6 47C5 23C8 5C2 INT_SERIRQ D7 P37/SERIRQ 20%
SMC_ONOFF_L 2 10V 1
R5802 1R5803
OUT
P90/IRQ2* K4 48C8 46D6 46C8 40C8
IN CERM OMIT
66A5 402
OUT
SMC_DISPLAY_ENABLE A5 P40/TMIO P91/IRQ1* J2 65C7 65C3 46B6 5C1 SMC_BC_ACOK (AC I/P detect)
IN U5800 10K 0
5% 5%
46A4 SMC_SYS_LED_16B B5 P41/TMO0 P92/IRQ0* J1 65A2 46C6 5D1 SMC_BS_ALRT_L
IN SMC_H8S2116 1/16W 1/16W
OUT
66C2 66B1 62A5 61C1 48C1 48B5 48A1 46B6 45C2 GND_SMC_AVSS MF-LF MF-LF
27B3
IO SMB_BSB_DATA (BAT B SMBUS DATA) D5 P42/SDA1 P93/IRQ12* J3 63B8 63A7 23C3 PM_SLP_S3_L
IN BGA 2 402 2 402
53C7 SMC_TPM_PP (TPM physical presence) C3 P43/TMI1/EXSCK1 P94/IRQ13* J4 63D6 61B8 60C8 23C3 PM_SLP_S4_L (3 OF 4) MD1 E2
OUT IN
46C6 SMC_P44 B1 P44/TMO1 P95/IRQ14* H2 46D3 23C3 PM_SLP_S5_L
IN MD2 K1
47C5 46D7 5C2 IN SMC_RST_L E3 RES*
OUT
SMC_BKLIGHT_ENABLE C2 P45 P96/EXCL H1 46A6 SMC_SUS_CLK
IN
46C6 SMC_P46 D3 P46/PWX0/PWM0 P97/IRQ15*/SDA0 G2 27D6 SMB_0_DATA
IO 46C7 SMC_XTAL A2 XTAL
46C6 SMC_SYS_KBDLED C1 P47/PWX1/PWM1 46C7 SMC_EXTAL B2 EXTAL NMI F4 (Should PD) (To debug card for mode select) 47B5 5C2 SMC_NMI IN
47B6 46D6 46B2 5C2

OUT
SMC_TX_L (Debug feature,16550 Transmit) G1 P50
47B5 46D6 46B2 5C2
IN SMC_RX_L (Debug feature,16550 Receive) G4 P51
SMB_0_CLK SMC_TRST_L
C 27D6
IO F2 P52/SCL0 ETRST* L1
P12
47C6 5C2
IN
C
1
VSS
AVSS
R12 R5898
10K
5%
D1
P4
R4
F12
F13
B13
A13
A4
B4
D2
1/16W
MF-LF
OMIT 2 402
21C3
IO
SMC_RCIN_L R3 PA0/KIN8*/PA2DC U5800 PE0 M3 SMC_CASE_OPEN (CASE OPEN/CLOSE DETECT)
46B3
47C6 22B3 5C2 BOOT_LPC_SPI_L P3

SMC_H8S2116
PA1/KIN9*/PA2DD PE1*/ETCK M2 47C5 46C6 5C2 SMC_TCK XW5800
IN IN
BGA SM
26C5 23C5 PM_SYSRST_L R2 PA2/KIN10*/PS2AC (2 OF 4) PE2*/ETDI M1 47C5 46C6 5C2 SMC_TDI
IN IN 1 2 GND_SMC_AVSS 45C4 46B6 48A1 48B5 48C1 61C1 62A5 66B1 66C2
53B7 46D6
OUT
SMC_TPM_RESET_L N3 PA3/KIN11*/PS2AD PE3*/ETDO L4 47B6 46C6 5C2 SMC_TDO
OUT
14B7 6B2
IN
PM_EXTTS_L<0> R1 PA4/KIN12*/PS2BC PE4*/ETMS L2 47C6 46C6 5C2 SMC_TMS
IN
23C8 PM_THRM_L N2 PA5/KIN13*/PS2BD
IO
PF0/IRQ8*/PWM2 M7 SMC_DISP_BKLT_B 46C3
65C8 46D6 5C1 SYS_ONEWIRE M4 PA6/KIN14*/PS2CC
IO
PF1/IRQ9*/PWM3 P6 SMC_DISP_BKLT_A
23C1 PM_BATLOW_L N1 PA7/KIN15*/PS2CD
OUT
OUT
PF2/IRQ10*/TMOY R6 65A8 46C6 40C4 5B2 SMC_LID (LID OPEN/CLOSE SW) IN
23B8
IN
SMC_EXTSMI_L B10 PB0/LSMI* PF3/IRQ11*/TMOX N6 46C1 SMC_CPU_RESET_3_3_L
IN
23C8
OUT SMC_RUNTIME_SCI_L A10 PB1/LSCI PF4/PWM4 M6 66B7 5C1 SMC_BATT_ISET
OUT
34B3
IN
SMC_ODD_DETECT (Optical Disk Insert detect) D10 PB2 PF5/PWM5 R5 SMC_BATT_VSET 46C3
48A8
OUT
ISENSE_CAL_EN A11 PB3 PF6/PWM6 P5 66D7 SMC_SYS_ISET
OUT
46C3 SMC_EXCARD_CP B11 PB4 PF7/PWM7 N5 SMC_SYS_VSET 46C3
46C3 SMC_EXCARD_PWR_EN C11 PB5

PG0/EXIRQ8*/TMIX P9 50C7 22C6 SPI_CE_L
46D3 SMC_EXCARD_PWR_OC_L A12 PB6
IO
PG1/EXIRQ9*/TMIY R9 SMC_PG1 46C6
46C6 SMC_PB7 D11 PB7
PG2/EXIRQ10*/SDA2 N9 27C3 SMB_BSA_DATA IO
46C3 SMC_FAN_0_CTL G14 PC0/TIOCA0/WUE8* PG3/EXIRQ11*/SCL2 P8 27C3 SMB_BSA_CLK
IO
51B4 5D2
OUT
SMC_FAN_1_CTL G15 PC1/TIOCB0/WUE9* PG4/EXIRQ12*/EXSDAA R8 27D3 SMB_RMT_DATA
IO
46C3 SMC_FAN_2_CTL G13 PC2/TIOCC0/TCLKA/WUE10* PG5/EXIRQ13*/EXSCLA M8 27D3 SMB_RMT_CLK
B 46C3 SMC_FAN_3_CTL G12 PC3/TIOCD0/TCLKB/WUE11* PG6/EXIRQ14*/EXSDAB P7 27B6 SMB_MLB_DATA

IO
IO B
46C3 SMC_FAN_0_TACH H14 PC4/TIOCA1/WUE12* PG7/EXIRQ15*/EXSCLB R7 27C6 SMB_MLB_CLK
IO
51C4 5D2 SMC_FAN_1_TACH H15 PC5/TIOCB1/TCLKC/WUE13*
IN
PH0/EXIRQ6* E1 46B6 SMC_PROCHOT
46C3 SMC_FAN_2_TACH H13 PC6/TIOCA2/WUE14* OUT
PH1/EXIRQ7* F3 46B5 SMC_THRMTRIP
46C3 5A7 SMC_FAN_3_TACH H12 PC7/TIOCB2/TCLKD/WUE15*
OUT
PH2/FWE K2 SMC_FWE 46C6
52C2
IN SMS_X_AXIS M11 PD0/AN8 PH3/EXEXCL C4 ALS_GAIN 46C6
52C2
IN SMS_Y_AXIS P11 PD1/AN9 PH4 D4 46D6 23C3 SMS_INT_L
OUT
52C2
IN SMS_Z_AXIS R11 PD2/AN10 PH5 B3 52C7 SMS_ONOFF_L
OUT
46C3 SMC_PD3 (ANALOG_ID) N11 PD3/AN11
62A5 46B3 SMC_NB_ISENSE P10 PD4/AN12
61C1 46B3 SMC_MEM_ISENSE R10 PD5/AN13
46C3 5A7 ALS_LEFT N10 PD6/AN14
46C3 ALS_RIGHT M10 PD7/AN15
OMIT
U5800
SMC_H8S2116
BGA
(4 OF 4)
NC G3 NC0 NC12 F15 NC
SMC
H3 A14
A NC
NC K3
NC1
NC2
NC13
NC14 C12
NC
NC
SYNC_MASTER=SMC

A
NC L3 NC3 NC15 C10 NC
NC N4 NC4 NC16 C5 NC THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
NC M5 NC5 NC17 A3 NC AGREES TO THE FOLLOWING
NC N7 NC6 NC18 B8 NC I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
NC M12 NC7 NC19 E4 NC II NOT TO REPRODUCE OR COPY IT
NC M13 NC8 NC20 H4 NC III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
NC L12 NC9 NC21 M9 NC
NC K15 NC10 NC22 N8 NC
NC J14 NC11
APPLE COMPUTER INC.
D 051-7374 A
SCALE SHT OF
NONE 45 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SMC Reset Button / Brownout Detect THESE NEED TO BE PULLED TO THE PROPER RAIL:
=PP3V3_S3_TPM
48C8 46D5 46D1 45D3 45D2 =PP3V42_G3H_SMC
SMS_INT_L
SMC_TPM_RESET_L
64B3 53C2
SMC 1.05V to 3.3V Level Shifting
64D1 64B3 52C7 =PP3V3_S3_SMS
CRITICAL 64A6 =PP3V3_S0_SMC_LS
C5900 1 1
R5900 R5995
0.1uF 2 10K
20%
10V
VDD 1K
5%
45B5 23C3 SMS_INT_L 1 2 R59701
CERM 2 1/16W R5989 6.2K
402 U5900 MF-LF
10K
5%
RN5VD30A-F 2 402 53B7 45C8 SMC_TPM_RESET_L 1 2
1/16W
MF-LF =PP3V42_G3H_SMC 45D2 45D3 46D5
SOT23-5
402 2 46D8 48C8 64D1
D
5B2 SMC_MANUAL_RST_L
NOSTUFF NC
5
4
CD
NC
OUT 1 47C5 45C3 5C2 SMC_RST_L OUT
64D1 48C8 46D8 46D1 45D3 45D2 =PP3V42_G3H_SMC 1.05V Mid-Reference P0V52_SMC_LSREF
D
1
R5901 GND
C5901 1 3
5%
0 0.01UF
10% 59A1 45D8 RSMRST_PWRGD R5994 1 2 10K R59711
1/10W 16V SMC_ONOFF_L R5953 1K
MF-LF CERM 2 48C8 46C8 45C5 40C8 1 2 10K 5% 1
2 603 402 5% R5928
1/16W
MF-LF R5976
1/16W 1 2 10K SMC_EXCARD_PWR_OC_L 45B8 402 2 10K
MF-LF 5%
402 1/16W
MF-LF
Silk: "SMC RST" 47B6 46B2 45C8 5C2 SMC_TX_L R5980 1 2 10K R5905 1 2 100K PM_SUS_STAT_L 5C2 23C5 45D5 47C5 53C6
2 402
47B5 46B2 45C8 5C2 SMC_RX_L R5981 1 2 100K R5906 1 2 100K PM_SLP_S5_L 23C3 45C5
65C8 45B8 5C1 SYS_ONEWIRE ONEWIRE_PULLUP_OLD R5982 1 2 2.0K

65A2 45C5 5D1 SMC_BS_ALRT_L R5983 1 2 470K
47C6 45B5 5C2 SMC_TMS R5984 1 2 10K R5924 1 2 10K SMC_EXCARD_CP 45B8
R5985 R5926 SMC_CPU_RESET_3_3_L 45B5
SMC_TDO 10K 10K SMC_EXCARD_PWR_EN
Debug Power Button SMC Crystal Circuit 47C5 45C5 5C2 SMC_TDI R5986
1
1
2
2 10K
1 2 NOSTUFF 45B8
C5920 47C5 45C5 5C2 SMC_TCK R5987 1 2 10K

48C8 46D6 45C5 40C8 SMC_ONOFF_L R5931
OUT
15pF 1 2 10K SMC_FAN_0_CTL NOSTUFF 45B8
NOSTUFF SMC_XTAL 1 2 SMC_FWE R5948 R5932 SMC_FAN_2_CTL NOSTUFF 45B8
1 45C4 45B5 1 2 10K 1 2 10K
R5910 5% 65A8 45B5 40C4 5B2 SMC_LID R5973 1 2 100K R5933 1 2 10K SMC_FAN_3_CTL NOSTUFF 45B8
0 CRITICAL 50V R5935
5% Silk: "PWR BTN" Y5920 1 CERM SMC_PG1 R5919 1 2 10K
1 2 10K SMC_FAN_0_TACH NOSTUFF 45B8
1/10W
MF-LF 20.00MHZ
402 45B5
R5930 R5937 1 2 10K SMC_FAN_2_TACH NOSTUFF 45B8
2 603 5X3.2-SM 45B8 SMC_PB7 1 2 100K R5939
C5921 1 2 10K SMC_FAN_3_TACH NOSTUFF 5A7 45B8
5%
197S0169
2
15pF 1/16W R5941 1 2 10K SMC_PD3 NOSTUFF 45B8
1 C5977 NOSTUFF
1 2 MF-LF 0.1uF 1
45C4 SMC_EXTAL 402
20% R5977
5% NOSTUFF R5920 2 10V
CERM 1K
Is this the best part to use? 50V 45D8 SMC_P20 1 2 10K R5945 NOSTUFF 402 5%
CERM NOSTUFF R5922 1 2 10K ALS_LEFT 5A7 45A8 1/16W
402 45D8 SMC_P21 1 2 10K R5946 NOSTUFF MF-LF
1 2 10K ALS_RIGHT
C 45D8 SMC_P22
SMC_P23
NOSTUFF
NOSTUFF
R5923
R5925
1
1
2
2
10K
10K
45A8
2 402 C
SMC AVREF Supply 45D8
45D8 SMC_P26 NOSTUFF R5927 1 2 10K

R5949 1 2 10K SMC_DISP_BKLT_B NOSTUFF
45B5
NOSTUFF SMC_P27 NOSTUFF R5929 2 U5977

45D8 1 2 10K 4
R5972 SMC_P46 NOSTUFF R5934 1 2 10K LMC7211
45C8
0 V+ SM-LF
1 2 45C8 SMC_P44 NOSTUFF R5936 1 2 10K R5998 NOSTUFF 1 SMC_PROCHOT_3_3_L 45D5
NOSTUFF R5938 1 2 10K SMC_BATT_VSET 45B5
5% 45C8 SMC_SYS_KBDLED 1 2 10K R5999 NOSTUFF 3
1/16W 1 2 10K SMC_SYS_VSET 45B5 58C8 46B5 7C6 CPU_PROCHOT_L V-
MF-LF
402 NOSTUFF R5918 5
45B5 ALS_GAIN 1 2 10K
VR5965 45D5 SMC_GPU_ISENSE R5940 1 2 10K
64D1 =PP3V42_G3H_SMCVREF ISL60002-33
SOT23-3 PP3V3_AVREF_SMC 45D2 45D5 SMC_GPU_VSENSE R5942 1 2 10K R5947
MIN_LINE_WIDTH=0.4 MM 1 2 10K SMC_CASE_OPEN 45C5
1 VIN
CRITICAL
VOUT 2 MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V R5996 1 2 10K SMC_PS_ON 5C1 39C6 45D5 65C3
GND NOSTUFF
3 1 C5967 66A3 45D8 5C1 SMC_BATT_TRICKLE_EN_L R5954 1 2 10K R5943 1 2 10K SMC_NB_ISENSE NOSTUFF
45B8 62A5
R5990
0.01uF
10% 66A4 45D8 5C1 SMC_BATT_CHG_EN R5955 1 2 10K R5944 1 2 10K SMC_MEM_ISENSE NOSTUFF
45A8 61C1 0
R5988 45D5 SMC_TPM_GPIO 1 2 TPM_GPIO1 53C6
2 16V
CERM 66A5 65C7 65C3 45C5 5C1 SMC_BC_ACOK 1 2 470K
R5997 5% NOSTUFF
1 C5965 C5966 1 402 1 2 10K SMC_FWIRE_ISENSE 45D5 1/16W
MF-LF
10%
0.47UF 10uF
20%
402 R5991
0
2 6.3V
CERM-X5R
6.3V 2
X5R
1 2 TPM_GPIO2 53C6
402 603
GND_SMC_AVSS
MIN_LINE_WIDTH=0.4 MM
45C2 45C4 48A1 48B5 48C1 61C1 62A5 66B1 66C2 SMC 3.3V to 1.05V Level Shifting 5%
1/16W
MF-LF
MIN_NECK_WIDTH=0.2 MM 402
VOLTAGE=0V
CPU_PROCHOT_L 7C6 46C2 58C8 PM_THRMTRIP_L 7C6 14B6 21C2
R5992
0
TABLE_ALT_HEAD
3 6 47B5 46D6 45C8 5C2 SMC_RX_L 1 2 SC_RX_L 45C5

PART NUMBER 5%
D Q5901 D Q5901 1/16W R5993
B 353S1278 353S1381 ? VR5965 TI REF3133
TABLE_ALT_ITEM
5
2N7002DW-X-F
SOT-363 2
2N7002DW-X-F
SOT-363 47B6 46D6 45C8 5C2 SMC_TX_L
MF-LF
402
1
0 2 SC_TX_L 45C5
B
45B5 SMC_PROCHOT G S 45B5 SMC_THRMTRIP G S
5%
1/16W
4 1 MF-LF
402
Stuff R5992, R5993 for development only

SMC G3HOT OSCILLATOR
System (Sleep) LED Circuit
64B3 35B6 =PP5V_S3_SYSLED
64D1 =PP3V42_G3H_SMC_CLK CRITICAL TABLE_5_HEAD
NOSTUFF OMIT PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
1 C5951 1 R5951 1 1
R5950 114S0114 1 84.5, 1%, 1/16W, MF-LF, 402 R5950 NORMAL
TABLE_5_ITEM
2.2UF 2.2K 84.5

20% 5% 1% TABLE_5_ITEM
4V 1/16W 1/16W
L5910 X5R 2 MF-LF MF-LF
114S0126 1 115, 1%, 1/16W, MF-LF, 402 R5950 FANCY
402 402 2
FERR-120-OHM-0.2A 2 402
0603
SYS_LED_ILIM
C5951 AND R5951 SHOULD BE PLACED CLOSE TO Q5950
2 2
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.425V
SYS_LED_L_VDIV 1 Q5950
PP3V42_G3H_SMC_CLK_F 2N3906
SOT23-LF
C5910 1 1 C5911 12
CRITICAL R59521
4.7K
3
SYS_LED_ANODE
SMC SUPPORT
4.7UF 0.1UF VDD 5% 35C5 5B2
OUT
A 20%
6.3V 2
CERM
20%
2 10V
CERM
U5910
32.768KHZ-9-3.6V
SG-3040LC-SM R5911
1/16W
MF-LF
402 2
A
603 402 22
1 VIO OUT 7 SMC_SUS_CLK_R 1 2 45C5 SMC_SUS_CLK OUT
SYS_LED_L
5% PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
NC 2 NC0 NC4 8 NC 1/16W 3 AGREES TO THE FOLLOWING
MF-LF
NC 3 NC1 NC5 9 NC 402 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
NC 4 NC2 NC6 10 NC
D
Q5952 II NOT TO REPRODUCE OR COPY IT
2N7002
NC 5 NC3 NC7 11 NC 1 SOT23-LF III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
GND 45C8
IN SMC_SYS_LED_16B G S
6 SIZE DRAWING NUMBER REV.

2
197S0166
U5910 is really a 32.768KHz oscillator
APPLE COMPUTER INC.
D 051-7374 A
SCALE SHT OF
NONE 46 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
64D1 5D2 =PP3V42_G3H_LPCPLUS
64D3 5D2 =PP5V_S0_LPCPLUS
CRITICAL
J6000
F-ST-5047
SM1
C 1
3
2
4
FWH_INIT_L 5C2 6B2 21C4
PCI_CLK_PORT80_LPC 5C2 33D6 C

LPC_AD<0> 5 6
53C6 45D8 21D4 5D2
53C6 45D8 21D4 5D2 LPC_AD<1> 7 8 LPC_AD<2> 5C2 21D4 45D8 53C6
9 10 LPC_AD<3> 5C2 21D4 45D8 53C6
LPC_FRAME_L 11 12
53C6 45C8 21C5 5C2
53C6 45D5 38A5 23C8 5C2 PM_CLKRUN_L 13 14 INT_SERIRQ 5C2 23C8 45C8 53C6
45C8 22B3 5C2 BOOT_LPC_SPI_L 15 16 PM_SUS_STAT_L 5C2 23C5 45D5 46D3 53C6
46C6 45B5 5C2 SMC_TMS 17 18 SMC_TDI 5C2 45C5 46C6
26B1 5C2 DEBUG_RST_L 19 20 SMC_TCK 5C2 45C5 46C6
SMC_TRST_L 21 22 SMC_RST_L
45C1 5C2 5C2 45C3 46D7
46C6 45C5 5C2 SMC_TDO 23 24 SMC_NMI 5C2 45C1
45C2 5C2 SMC_MD1 25 26 SMC_RX_L 5C2 45C8 46B2 46D6
SMC_TX_L 27 28
46D6 46B2 45C8 5C2
29 30 SV_SET_UP GPIO15 5C2 23B6 23C3
516S0002
B B
LPC+ Debug Connector

A SYNC_MASTER=NB

A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 47 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CPU CURRENT SENSE
C6100
470PF
1 2
R6107 R6105 10%
0 30.1K2 50V
58B6 58A4 IMVP6_DROOP 1 2 IMVP6_CPU_ISENSE_P 1
D 5%
1/16W
1%
1/16W
CERM
402 D
MF-LF
402 NOSTUFF
MF-LF
402 R6100
1M
1 C6104 1 2
0.1UF 1%
20% 1/16W
2 10V
CERM MF-LF
402
402
2 CRITICAL
CPU_ISENSE_R_P 3
R6102
1 CPU_ISENSE_OUT_R 4.53K2 SMC_CPU_ISENSE
PROCESSOR DCIN VOLTAGE SENSE IMVP6_VO
R6108
1
0 2 IMVP6_CPU_ISENSE_N 1
R6106
30.1K2
CPU_ISENSE_R_N 4 SOT23-5
1
1%
1/16W
45D5
58B6 58A4
LMV2011MF MF-LF
5% 1%
5
U6100 402
1 C6102
1/16W
MF-LF
NOSTUFF 1/16W
MF-LF
0.22UF
20%
402
1 C6105 402
=PP3V3_S0_CPUPOWER 64A6 2 6.3V
X5R
0.1UF 402
Q6150 20% GND_SMC_AVSS
TP0610 2 10V
CERM
1 C6101 45C2 45C4 46B6 48A1 48B5 61C1 62A5 66B1 66C2
S0T23-3 402 0.1UF

=PPVIN_S5_IMVP6 20%
64C1 58D8 58D5 58C2
2
S D
3 2 10V
CERM
402
PLACE RC FILTER CLOSE TO SMC
1
G
PBUS_S0_SMC_VSENSE
1 C6103 R6103
1M
=PP3V42_G3H_SMC 1
R6152 470PF 1%
46D8
45D3 45D2
10% 1/16W
100K 1 2 50V
C 46D5 46D1
64D1
NOSTUFF
5%
1/16W
MF-LF
1
R6150
27.4K
CERM
402
MF-LF
2 402 C
2 402 1%
1/16W
Q6153 2
Q6152 2
MF-LF
TP0610 TP0610 2 402
S0T23-3 S0T23-3
63B7
1 45C5 40C8
1
46D6 46C8
PM_SLP_S3 G S SMC_ONOFF_L G S PBUS_SMC_VSENSE_EN_L
SMC_PBUS_VSENSE
DRIVEN LOW IN S0 D DRIVEN LOW BY SMC D 3 45D5
OR POWER BUTTON
3 3
D
Q6151 1
R6151
PBUS_SMC_VSENSE_EN
2N7002
SOT23-LF 5.49K
1 C6150
1 G S 1% 0.22UF
1/16W 10%
6.3V
1 MF-LF 2 CERM-X5R
R6153 2 2 402 402
100K GND_SMC_AVSS
5% 45C2 45C4 46B6 48A1 48C1 61C1 62A5 66B1 66C2
1/16W
MF-LF
2 402 PLACE C6150 NEAR U5800
B B
CPU VOLTAGE SENSE
R6112
=PPVCORE_S0_CPU 1
4.53K2 SMC_CPU_VSENSE 5B2
Current Sense Calibration Circuit 64D6 48A5 9B8 8D7 8B5
1%
1/16W
45D5
Switches in fixed load on power supplies to calibrate current sense circuits MF-LF
402
1 C6112
0.22UF
20%
6.3V
2 X5R
402
GND_SMC_AVSS 45C2 45C4 46B6 48B5 48C1 61C1 62A5 66B1 66C2
64D3 =PP5V_S0_ISENSECAL
R61441
PLACE RC FILTER CLOSE TO SMC
10K 64D6 48B3 9B8 8D7 8B5 =PPVCORE_S0_CPU
5%
1 1/16W
R6140 MF-LF
402 2 1
R6143
470K
5% CRITICAL 1.00
1/16W ISENSE_CAL_EN_LS5V 1%
MF-LF 1/4W
2 402
3
Q6100 MF-LF
2 1206
SI3446DV
TSOP-LF 1
D
Q6101 CPUVCORE_ISENSE_CAL
2 MIN_LINE_WIDTH=0.50 mm
2N7002DW-X-F MIN_NECK_WIDTH=0.20 mm
5 SOT-363 5
ISENSE_CAL_EN_L G S CPU Current & Voltage Sense
3 6
A 6 4
4
A
D
Q6101 R6142 1 NOTICE OF PROPRIETARY PROPERTY
2N7002DW-X-F
2 SOT-363 470K THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
45B8
IN ISENSE_CAL_EN G S 5% PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
1/16W AGREES TO THE FOLLOWING
MF-LF
1 1 402 2 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
R6141 II NOT TO REPRODUCE OR COPY IT
100K
5% III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
1/16W
MF-LF
2 402 SIZE DRAWING NUMBER REV.
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 48 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DIMM0 TEMPERATURE ZONE

ADDITIONAL NOISE FILTERING
D R6203 D
THRM_DIMM0_3V3_UNFILTERED 1
47 2 =PP3V3_S0_THRM_SNR 10C4 49B3 64A6
1%
1/16W
MF-LF
1 C6202 402
0.1UF
10%
PLACE C6200 AND C6201 2 16V
X5R
NEXT TO DXP AND DXN 402
PLACE NEXT TO C6202 U6200 PIN 1
THRM_DIMM0_DXP1
1
40C4
OUT
NOSTUFF
IF A SENSOR INPUT IS UNUSED STUFF 1
R6200 VCC CRITICAL
THE CORRESPONDING RESISTOR 0
1 C6200 U6200
5% 0.0022UF MAX6695AUB
1/16W 10% UMAX1
50V
MF-LF 2 CERM
2 DXP1 SMBDATA 9 THRM_DIMM0_SMB_DATA
2 402
27B3
402 IO
40C5
OUT
THRM_DIMM0_DXN 3 DXN SMBCLK 7 27B3THRM_DIMM0_SMB_CLK IO
NOSTUFF 4 DXP2 ALERT* 8 NC
IF B SENSOR INPUT IS UNUSED STUFF

1
R6201 1 C6201 OT1* 5 NC
0 0.0022UF
THE CORRESPONDING RESISTOR 5% 10% OT2* 10 NC
1/16W 2 50V
CERM
CRITICAL MF-LF 402 GND
THRM_DIMM0_DXP2 2 402
J6250
6
BM02B-ACHKS-GAN-TF-LF-SN-M PLACE U6200 NEAR U1200
M-RT-SM
3 1. ROUTE DXP AND DXN DIFFERENTIALLY
2. DXP AND DXN TRACE LENGTH MUST NOT EXCEED 4 INCHES
1 3. ROUTE GROUNDED GAURD TRACES AROUND THE DXP/DXN DIFF PAIR
2 4. 10 MIL TRACE WIDTHS AND 10MIL SPACING BETWEEN THE GAURD
C 4 C
518S0487
NOTE: REPLACE J6250 AND J6251 FROM 518S0332 TO 518S0452 AND THEN 518S0487
AFTER THIS CHANGE, THE SCHEAMTIC DOES NOT MATCH THE PCB ON THESE TWO LOCATIONS.
DIMM1 TEMPERATURE ZONE
PLACE UNDER J2900 R6252

PLACE C6250 AND C6251
THRM_DIMM1_3V3_UNFILTERED 1
47 2 =PP3V3_S0_THRM_SNR 10C4 49D3 64A6
NEXT TO DXP AND DXN
1%
PLACE R6250 AND R6251 1/16W
3 MF-LF
AWAY FROM U6250 BUT CLOSE TO 402
Q6200 1 C6250 AND C6251
1 C6252
0.1UF
BC846BM3T5G 10%
SOT732-3 2 16V
X5R
2 402
B THRM_DIMM1_DXP1
B
PLACE NEXT TO C6252 U6250 PIN 1
1
1 C6250 VCC CRITICAL
0.0022UF
10%
50V
U6250
2 CERM MAX6695AUB
402 UMAX1
2 DXP1 SMBDATA 9 27C3 THRM_DIMM1_SMB_DATA IO
IF A SENSOR INPUT IS UNUSED STUFF
THRM_DIMM1_DXN 3 DXN SMBCLK 7 27D3THRM_DIMM1_SMB_CLK IO
THE CORRESPONDING RESISTOR
4 DXP2 ALERT* 8
NC
OT1* 5 NC
OT2* 10 NC
GND
NOSTUFF
6
1
CRITICAL R6251 1 C6251
0 0.0022UF PLACE U6250 IN BATTERY CHARGER AREA
J6251 5%
1/16W 10%
50V
BM02B-ACHKS-GAN-TF-LF-SN-M MF-LF 2 CERM
M-RT-SM 2 402 402
3
1 THRM_DIMM1_DXP2
2
1. ROUTE DXP AND DXN DIFFERENTIALLY
4 2. DXP AND DXN TRACE LENGTH MUST NOT EXCEED 4 INCHES
3. ROUTE GROUNDED GAURD TRACES AROUND THE DXP/DXN DIFF PAIR TEMPERATURE SENSE
518S0487 4. 10 MIL TRACE WIDTHS AND 10MIL SPACING BETWEEN THE GAURD
A SYNC_MASTER=ENET

A
NOTE: REPLACE J6250 AND J6251 FROM 518S0332 TO 518S0452 AND 518S0487 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
AFTER THIS CHANGE, THE SCHEAMTIC DOES NOT MATCH THE PCB ON THESE TWO LOCATIONS. I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 49 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D 64A3 =PP3V3_S5_ROM
D
1 C6312
0.1UF
R63021 R63011 20%
3.3K 3.3K 2 10V
CERM
5% 5% 402
1/16W 1/16W
MF-LF MF-LF
402 2 402 2
2
R6308
CRITICAL 8 OMIT 10K
5%
1/16W
VDD MF-LF
1
402
U6301
R6307 16MBIT R6306
47 SOI 47
45D5 22C6 SPI_SCLK 1 2 SPI_SCLK_R 6 SCK SI 5 SPI_SI_R 1 2 SPI_SI 22C6 45D5
5% SST25VF016B 5%
1/16W R6303 1/16W
MF-LF MF-LF
45B5 22C6 SPI_CE_L 402 1 CE* 47 402
SO 2 SPI_SO_R 1 2 SPI_SO 22C6 45D5
SPI_WP_L 3 WP* 5%
1 C6309 NOSTUFF
SPI_HOLD_L 7 HOLD* 1/16W
MF-LF
1 C6301
402 22pF
2
22pF 1 C6308 R6309 VSS 5% 1 C6311
5%
22pF 2 50V 22pF
50V
2 CERM 5%
10K 4 CERM
402 5%
402
5%
2 50V
CERM
1/16W 2 50V
CERM
402 MF-LF 402
1
402
C R6309 IS NOT NEEDED WHEN SHARING SPI FLASH WITH

C
ICH7M AND TEKOA(LAN CHIP) R6307 AND R6306 SHOULD BE PLACED LESS THAN 100 MILS FORM ICH7M
R6303 SHOULD BE PLACED LESS THAN 100 MILS FORM FLASH ROM
B B
SPI BOOTROM
SYNC_MASTER=MASTER SYNC_DATE=5/23/05
A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 50 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
64D3 5D2 =PP5V_S0_FAN_RT

64A6 5D2 =PP3V3_S0_FAN_RT
C CRITICAL
C
R6560 1 J6501
47K 88609-04001
F-ST-SM
5%
1/16W NC 5
MF-LF
4022
R6565
47K
1 5V DC
45B8 5D2 SMC_FAN_1_TACH 1 2 5D2 FAN_RT_TACH 2 TACH
5% 3
1/16W MOTOR CONTROL
MF-LF 4
402 GND
NC 6
R6561
100K
1
518S0486
5%
1/16W 1
MF-LF
4022
Q6560
G 2N7002
SOT23-LF
2 S D 3
45B8 5D2 SMC_FAN_1_CTL

5D2 FAN_RT_PWM
B B
Fan
A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 51 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PAGE NOTES
INPUT
=PP3V3_S3_SMS - 3.3V POWER FOR SMS (STAYS ALIVE IN SLEEP)
SMS_ONOFF_L - CONNECT TO SMC TO BE ABLE TO PUT SMS INTO LOW-POWER MODE
OUTPUT
SMS_ACC_*_AXIS - ACCELEROMETER OUTPUT TO SCU
PAGE HISTORY
D 5/19/2005
7/26/2005
7/26/2005
- FIRST REVISION OF PAGE
- REMOVED BOM TABLE AND UPDATED SYMBOL TO KXM52-2050
- CONNECTED PD PIN TO SMC’S SMS_ONOFF_L
D
7/26/2005 -
Desired Orientation
(Placed on board bottom side)
Package Top
1
+Y
64B3 46D5 =PP3V3_S3_SMS +X
C6620 1 +Z (up)
ACCEL_KIONIX 0.1uF
20%
C CRITICAL 8
VDD
10V
CERM 2
402
C
U6620
KXM52-2050
QFN
10 SELF OUTPUTX 2 SMS_X_AXIS 45B8
TEST
45B5 SMS_ONOFF_L 9 PS OUTPUTY 13 SMS_Y_AXIS 45B8
NC 5 PARITY OUTPUTZ 14 SMS_Z_AXIS 45B8
R66521 4
6
RSVD
100K RSVD DNC 1 NC
5% ACCEL_ST1 7
1/16W RSVD OMIT OMIT OMIT
MF-LF
402 2 R6650 11 RSVD TABLE_5_HEAD
10K
5%
1 C6604 1 C6605 1 C6606 PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
1/16W GND
THRML
PAD
0.033uF 0.033uF 0.033uF TABLE_5_ITEM
MF-LF 10% 10% 10% 132S0131 3 0.033UF,10%,16V,402 C6604,C6605,C6606 ACCEL_KIONIX

402 2 3 12 15 2 16V
X5R 2 16V
X5R 2 16V
X5R TABLE_5_ITEM
402 402 402 132S0042 3 0.01UF,10%,16V,402 C6604,C6605,C6606 ACCEL_ST

2
ACCEL_ST
ST_ACCEL_ON_L 1
G S Q6651
TP0610
S0T23-3
3
ACCEL_ST D
D
Q6650 3
2N7002
1 SOT23-LF
G S
B PP3V3_S3_ST_ACCEL
ACCEL_ST
B
CRITICAL
8
VDD
U6650
LIS3L02AL
LGA
SMC_ACC_SELFTEST-->is a test signal SMS_ACC_SELFTEST 1 ST
0 -->Normal operation 4 RSRVD1 VOUTX 7
1 -->Self test 1
R6621 5 RSVRD2 VOUTY 6
10K VOUTZ 2
5%
1/16W
MF-LF GND
2 402 3
Desired Orientation
(Placed on board bottom side)
Package Top
+Z (up)
1
+X
+Y
SMS
A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 52 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
64A6 =PP3V3_S0_TPM
TPM TPM TPM

1 C6700 1 C6701 1 C6702 NOSTUFF NOTE:
0.1UF 0.1UF 0.1UF 1
10%
16V
10%
16V
10%
16V
R6705 SINCE CURRENT OF VSB IS NOT YET ON SPEC,
CRITICAL 2 X5R 2 X5R 2 X5R 0 1/8W (R6704/R6705) IS USED FOR NOW
402 402 402 5%
1/8W
TPM MF-LF
2 805
47C6 45D8 21D4 5D2 IO LPC_AD<0> 26 LAD0 U6700 3V0
VDD
10
TPM
47C6 45D8 21D4 5D2
IO
LPC_AD<1> 23 LAD1 TPM 3V1 19
TSSOP VDD
47C5 45D8 21D4 5C2
IO
LPC_AD<2> 20 LAD2 3V2 24 R6704
VDD
47C5 45D8 21D4 5C2
IO LPC_AD<3> 17 LAD3
1
0 2
3VSB 5 PP3V3_S0_TPM_3VSB =PP3V3_S3_TPM 46D5 64B3
VSB VOLTAGE=3.3V
33D6
IN
PCI_CLK_TPM 21 LCLK MIN_LINE_WIDTH=0.25MM 5%
VNC 3 NC MIN_NECK_WIDTH=0.25MM TPM 1/8W
47C6 45C8 21C5 5C2
IN
LPC_FRAME_L 22 LFRAME* NC MF-LF
805
16 LRESET* VBAT
NC
12 NC TPM 1 C6703
0.1UF
C NOSTUFF
47C5 46D3 45D5 23C5 5C2
47C5 45C8 23C8 5C2

IN
IO
PM_SUS_STAT_L
INT_SERIRQ
28
27
LPCPD*
SERRIRQ
1
10K
R6702 10%
16V
2 X5R
C
PM_CLKRUN_L 402
R6700 47C6 45D5 38A5 23C8 5C2
IN 15 CLKRUN/GPIO*
CLKRUN*
5%
1/16W
SMC_TPM_PP
1
0 2
MF-LF
45C8 SMC_TPM_PP_R 7 PP/GPIO (INT PD) 2 402
PP
5% TPM 46B1 TPM_GPIO1 6 GPIO_EXPRESS_00
1/16W GPIO
MF-LF NC 1 GPIO/SM_DAT TPM_BADD
402
C6795 46B1 TPM_GPIO2 2
NC
GPIO/SM_CLK
TESTBI/BADD/GPIO
TESTBI/BADD
9
15pF GPIO2 TESTI 8
1 2 TPM
TPM_XTALI 13 XTALI/32K_IN NOSTUFF
CRITICAL 1
5% TPM_XTALO 14 XTALO GND R6703
4 GND0
11 GND1
18 GND2
25 GND3
50V
CERM
TPM
1 Y6795 10K
5%
402 32.768K 1/16W
MF-LF
C6796 4
SM-LF 2 402
15pF 197S0098
1 2
5%
50V
CERM
402
TPM
R6798
26B1 TPM_LRESET_L 1
0 2
IN
5%
1/16W
MF-LF
402
TPM_RST_L
NOSTUFF
B R6799
0
B
46D6 45C8
IN SMC_TPM_RESET_L 1 2
5%
1/16W
MF-LF
402
TPM
A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 53 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
AUDIO CODEC
APPLE P/N 353S1458
PP4V5_AUDIO_ANALOG 54A3 57C3 57C5
MIN_LINE_WIDTH=0.30MM MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM L6801 MIN_NECK_WIDTH=0.20MM
VOLTAGE=4.5V
VOLTAGE=3.3V FERR-220-OHM VOLTAGE=3.3V
D 64A6 57B5 56D8 54A6 =PP3V3_S0_AUDIO

1
0402
2
CRITICAL CRITICAL
PP3V3_AUDIO_CODEC
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
D
C6800 1 1 C6801 1 C6835 C6802 1 1 C6830 C6803 1 1 C6836
10UF 0.001uF 0.001uF 47UF 0.001uF 47UF 0.001uF
20% 10% 10% 20% 10% 20% 10%
6.3V 2 50V
2 CERM 2 50V 6.3V 2 50V
2 CERM 6.3V 2 2 50V
X5R CERM POLY POLY CERM
603 402 402 CASE-B3-LF 402 CASE-B3-LF 402
=GND_AUDIO_CODEC
AVDD1 25
AVDD2 38
54A6 54B6 55A8 55B8 55C8 56B3 56B5 57A5 57A6 57B3
DVDD_CORE1 1
DVDD_CORE3 9
57B5 57B8 57C3 57C5 57C8 57D8 64B3
21C7 5C1 ACZ_BITCLK
21C7 5C1
IN
ACZ_SYNC PLACE CLOSE TO U6800
IN
21C7 5D1
IN
ACZ_SDATAOUT R6808
AUD_SPDIF_OUT_R 22
R6807 6 BIT_CLK SPDIF-OUT 48 1 2 AUD_SPDIF_OUT 56D3
21C7 5D1 ACZ_SDATAIN<0> 1
39 2
10 SYNC GPIO3/SPDIFIN 47 5%
1/16W
OUT
5 SDATA_OUT MF-LF
5% 402 AUD_SPDIF_IN 56B3
1/16W SDATAIN 8 SDATA_IN U6800 SENSE_A 13
MF-LF
402 STAC92204XR SENSE_B 34 AUD_SENSE_A 57C5 57D8
AUD_GPIO_2 44 LQFP AUD_SENSE_B

GPIO2 57C4 57C8 57D8
54B7 AUD_GPIO_0_R 45 GPIO0 PORT-A_L_HP 39 AUD_BI_PORT_A_L 57C3

HP
54A7 AUD_GPIO_1_R 46 GPIO1 CRITICAL PORT-A_R_HP 41 AUD_BI_PORT_A_R 57B3
PORT-F_L_HP 16 AUD_BI_PORT_F_L 57B3

55B8 AUD_BI_PORT_C_L 23 PORT-C_L LO PORT-F_R_HP 17 AUD_BI_PORT_F_R 57A3
55C8 AUD_BI_PORT_C_R 24 PORT-C_R
57A5 AUD_BI_PORT_D_L 35 PORT-D_L_HP VREFOUT-A 37

55A8 AUD_BI_PORT_D_R 36 PORT-D_R_HP MIC1 PORT-E_L 14
NC AUD_BI_PORT_E_L 57A5
PORT-E_R 15 AUD_BI_PORT_E_R 57A5
57A3 BAL_IN_L 18 CD-L

57A3 BAL_IN_COM 19 CD-G VREFOUT-B 28
57A3 BAL_IN_R 20 CD-R MIC2 PORT-B_L 21 AUD_BI_PORT_B_L 57A6
C 54B7 VOL_UP 2 VOLUME_UP

PORT-B_R 22 AUD_BI_PORT_B_R 57A6 C
54B7 VOL_DOWN 3 VOLUME_DOWN VREFOUT-C 29 NC PLACE R6809 CLOSE TO COMBO JACK
BEEP 12 PC_BEEP VREFOUT-D 32
NC 1
R6809 AUD_VREF_PORT_B 57A6
100K
VREF_FILT 27 AUD_VREF_FILT 5%
57C3 21C7 5C1 ACZ_RST_L 11 RESET* 1/16W
IN
AFILT1 30 AUD_ANALOG_FILT_1 MF-LF
AFILT2 31 AUD_ANALOG_FILT_2 2 402
1 CRITICAL CAP2 33 AUD_BYPASS

R6800 1 C6821 CRITICAL
100K 0.1UF CRITICAL CRITICAL
5% NC1 40 AUD_JDREF CRITICAL 1 C6833
7 DVSS3
4 DVSS2
26 AVSS1
42 AVSS3
1/16W
MF-LF
10%
2 16V NC2 43 1 C6812
1 C6806 1 C6813 0.001uF
X5R 1000pF 0.001uF 10%
2 402 402 0.001uF 5% 10% 2 50V
10% 25V
2 CERM 50V
2 CERM CERM
2 50V
CERM 603 402
402
AUD_ALC_COUT CRITICAL 402 CRITICAL
CRITICAL
NO STUFF NO STUFF C6804 1 CRITICAL C6807 1 C6810 1
1
R6801 CRITICAL R68541 10uF 10uF
0 C6853 1 20.0K
20%
6.3V 2 C6805 1 10UF
20%
20%
6.3V 2
5% 1% TANT 1000pF 6.3V 2 TANT
STUFFING OPTIONS FOR ALC882 CODEC 1/16W 0.1UF 1/16W SMA-LF 5%
25V TANT SMA-LF
MF-LF 10% MF-LF SMA-LF
16V CERM 2
2 402 X5R 2 402 2 603
NO STUFF 57B3 57A6 57A5 56B5 56B3 55C8 55B8 55A8 54D2 54A6 =GND_AUDIO_CODEC 402
R6850 64B3 57D8 57C8 57C5 57C3 57B8 57B5
0
55A8
OUT
AUD_GPIO_0 1 2 VOL_UP 54C7 MIN_NECK_WIDTH=0.20 MM
5%
1/16W
VOLTAGE=0V
MF-LF
402
B R6852
0
B
1 2 AUD_GPIO_0_R 54C7
5%
1/16W
MF-LF
402
NO STUFF
R6851 USING DC OFFSET SCREENED PART AS PRIMARY OPTION
0
57C3
OUT AUD_GPIO_1 1 2 VOL_DOWN 54C7
TABLE_ALT_HEAD
5% PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:

1/16W PART NUMBER
MF-LF
402 TABLE_ALT_ITEM
CRITICAL 353S1345 353S1458 ? U6800 DC OFFSET SCREEN PRTS

R6853 MIN_LINE_WIDTH=0.6MM MIN_LINE_WIDTH=0.6MM
0
L6800 MIN_NECK_WIDTH=0.2MM VR6800 MIN_NECK_WIDTH=0.2MM
1 2 AUD_GPIO_1_R 54C7 VOLTAGE=5V FERR-220-OHM TPS79501
VOLTAGE=5V SOT223-6 VOLTAGE=4.5V
5% =PP5V_S0_AUDIO 1 2
1/16W
MF-LF
64D3 55C8 5V_REG_IN 2 IN OUT 4 PP4V5_AUDIO_ANALOG 54D2 57C3 57C5
402 0402 AUD_4V5_SHDN_L 1 EN NR/FB 5 1

R6810 CRITICAL
GND
R6802 GND TAB 78.7K
1%
1 C6825
1K 1/16W 15pF
=PP3V3_S0_AUDIO 1 2 3 6 MF-LF 5%
2 50V
64A6 57B5 56D8 54D7
1% 2 402 CERM
1/16W 402
MF-LF VREG_FB
402 1 C6823
CRITICAL 0.1UF
10% 1
C6822 1 2 16V
X5R
R6811
29.4K
10UF
20%
6.3V 2
X5R
402 1%
1/16W
MF-LF
AUDIO: CODEC
603 2 402 SYNC_MASTER=M42AUDIO SYNC_DATE=08/05/2006
A 57B3 57A6 57A5 56B5 56B3 55C8 55B8 55A8 54D2 54B6
64B3 57D8 57C8 57C5 57C3 57B8 57B5
=GND_AUDIO_CODEC
A
4.5V POWER SUPPLY FOR CODEC I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 54 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SATELLITE & SUB TWEETER AMPLIFIER APN:353S1595

SATELLITE 442 Hz < FC < 736 Hz SPEAKER OUTPUT EMI FILTERS
SUB 169 Hz < FC < 282 Hz
VOLTAGE=5V
D MIN_LINE_WIDTH=0.60 MM
MIN_NECK_WIDTH=0.20 MM R7260
D
0
64D3 55B8 =PP5V_S0_AUDIO_PWR 55C4 SPKRAMP_R_P_OUT 2 1 SPKRCONN_R_P_OUT OUT 56C2
NO STUFF
NO STUFF 5% CRITICAL
1/16W
CRITICAL MF-LF
402
1 C7260
C7200 1 100PF
5%
150uF 2 50V
CERM
20% 402
VOLTAGE=0V POLY 2
6.3V
=GND_AUDIO_PWR
64B3 56C2 55D8 55C8 55C3 55B8 55B3 55A8 55A5 55A3
MIN_LINE_WIDTH=0.60 MM SMC-LF
MIN_LINE_WIDTH=0.30 mm MIN_LINE_WIDTH=0.30 mm
55A3 =GND_AUDIO_PWR
55C8 55C3 55B8 55B3 55A8 55A5
64B3 56C2 55D3 MIN_NECK_WIDTH=0.20 MM R7261 MIN_NECK_WIDTH=0.20 MM
0
55C4 SPKRAMP_R_N_OUT 2 1 SPKRCONN_R_N_OUT OUT 56C2
NO STUFF
5% CRITICAL
1/16W
MF-LF
402
1 C7261
100PF
5%
2 50V
CERM
VOLTAGE=5V PP5V_S0_AUDIO_F 55B8 402
L7200 VOLTAGE=5V =GND_AUDIO_PWR
MIN_LINE_WIDTH=0.30 MM 56C2 55D8 55D3 55C8 55C3 55B8 55B3 55A8 55A5 55A3
FERR-220-OHM MIN_LINE_WIDTH=0.30 MM 64B3
1 2 MIN_NECK_WIDTH=0.20 MM
54A6 =PP5V_S0_AUDIO
64D3
0402 CRITICAL
RIGHT SATELLITE
CRITICAL CRITICAL
C7207 1 C7202 1
0.1UF
10uF
1
C7201
10%
16V
1 10
20%
47UF
X5R 2 VDD PVDD 6.3V
20%
CRITICAL 402 X5R 2 2 6.3V
POLY
MIN_LINE_WIDTH=0.30 mm MIN_LINE_WIDTH=0.30 mm
L7210 C7210 U7210 603 CASE-B3-LF MIN_NECK_WIDTH=0.20 MM R7270 MIN_NECK_WIDTH=0.20 MM
FERR-1000-OHM MAX9705 SPKRAMP_L_P_OUT 0 SPKRCONN_L_P_OUT
0.018UF AUD_SPKRAMP_INR TDFN1 55B4 2 1
OUT 56D2
AUD_BI_PORT_C_R 1 2 AUD_SPKRAMP_INR_L 1 2 SPKRAMP_R_P_OUT NO STUFF
C 54C7 IN
0402
10% MAX9705_R_N
2 IN+
3 IN-
OUT+
OUT-
8
9 SPKRAMP_R_N_OUT
55D3
55C3
5%
1/16W
MF-LF
402
1
CRITICAL
C7270 C
16V
CRITICAL SYNC 6 100PF
X7R 5 SHDN* 5%
402 1
R7201 2 50V
CERM
55B8 55A6 AUD_SPKRAMP_SHUTDOWN_L CRITICAL THRML 100 402
GND PGND PAD 5% =GND_AUDIO_PWR
C7211 1 4 7 11 1/16W
MF-LF
56C2 55D8 55D3 55C8 55C3 55B8 55B3 55A8 55A5 55A3
64B3
VOLTAGE=0V 0.018UF
10% 2 402 MIN_LINE_WIDTH=0.30 mm MIN_LINE_WIDTH=0.30 mm
MIN_LINE_WIDTH=0.30 MM 16V
X7R 2
402 MIN_NECK_WIDTH=0.20 MM R7271 MIN_NECK_WIDTH=0.20 MM
MIN_NECK_WIDTH=0.20 MM SPKRAMP_SYNC1 55A4 0
55B4 SPKRAMP_L_N_OUT 2 1 SPKRCONN_L_N_OUT OUT 56D2
54A6 =GND_AUDIO_CODEC
64B3 57D8 57C8
56B5 56B3 55B8 55A8 54D2 54B6 NO STUFF
57C5 57C3 57B8 57B5 57B3 57A6 57A5 SPKRAMP_THERMPLANE 55A4 55B4 5% CRITICAL
1/16W
55D3 55C3 55B8 55B3 55A8 55A5 55A3
64B3 56C2 55D8
=GND_AUDIO_PWR MF-LF
402
1 C7271
100PF
64D3 55D8 55B8 =PP5V_S0_AUDIO_PWR 5%
2 50V
CERM
55C4 55B8 PP5V_S0_AUDIO_F 402
CRITICAL CRITICAL
=GND_AUDIO_PWR
CRITICAL
C7204 1 1
C7203
56C2 55D8 55D3 55C8 55C3 55B8 55B3 55A8 55A5 55A3
64B3
10UF 47UF
C7208 1 1 10 20%
6.3V 2
20%
0.1UF
10%
VDD PVDD X5R
603
2 6.3V
POLY
CASE-B3-LF LEFT SATELLITE
L7220 CRITICAL
C7220 16V
X5R 2
U7220
FERR-1000-OHM 0.018UF 402 MAX9705
AUD_BI_PORT_C_L AUD_SPKRAMP_INL_L AUD_SPKRAMP_INL TDFN1
54C7
1 2 1 2 2 IN+ OUT+ 8 SPKRAMP_L_P_OUT 55C3
IN
0402
10% MAX9705_L_N 3 IN- OUT- 9 SPKRAMP_L_N_OUT 55C3 MIN_LINE_WIDTH=0.30 mm MIN_LINE_WIDTH=0.30 mm
16V
X7R CRITICAL SYNC 6 SPKRAMP_SYNC2 55A4 MIN_NECK_WIDTH=0.20 MM R7280 MIN_NECK_WIDTH=0.20 MM
402 5 SHDN*
SPKRAMP_SUB_P_OUT 2
0 1 SPKRCONN_SUB_P_OUT
55A4 OUT 56C2
55C8 55A6 AUD_SPKRAMP_SHUTDOWN_L THRML NO STUFF
5% CRITICAL
CRITICAL GND PGND PAD 1/16W
C7221 1 4 7 11
MF-LF
402
1 C7280
100PF
0.018UF
B 10%
16V
X7R 2
5%
2 50V
CERM
402
B
402 56C2 55D8 55D3 55C8 55C3 55B8 55B3 55A8 55A5 55A3 =GND_AUDIO_PWR
64B3 57D8 57C8
56B5 56B3 55C8 55A8 54D2 54B6 54A6 =GND_AUDIO_CODEC SPKRAMP_THERMPLANE 55A4 55C4 64B3
57C5 57C3 57B8 57B5 57B3 57A6 57A5
55D3 55C8 55C3 55B3 55A8 55A5 55A3 =GND_AUDIO_PWR MIN_LINE_WIDTH=0.30 mm MIN_LINE_WIDTH=0.30 mm
64B3 56C2 55D8
MIN_NECK_WIDTH=0.20 MM R7281 MIN_NECK_WIDTH=0.20 MM
0
55A4 SPKRAMP_SUB_N_OUT 2 1 SPKRCONN_SUB_N_OUT OUT 56C2
64D3 55D8 55B8 =PP5V_S0_AUDIO_PWR NO STUFF
5% CRITICAL
1/16W
55C4 55B8 PP5V_S0_AUDIO_F CRITICAL CRITICAL MF-LF
402
1 C7281
C7206 1 1
C7205 100PF
CRITICAL 5%
10UF 120UF 2 50V
C7209 1 1 10 20%
6.3V 20%
2 6.3V
CERM
402
CRITICAL 0.1UF VDD PVDD X5R 2 POLY 64B3 56C2 55D8 55D3 55C8 55C3 55B8 55B3 55A8 55A5 =GND_AUDIO_PWR
10% 603 CASE-B2
L7230 C7230 16V
X5R 2
U7230
FERR-1000-OHM 0.047UF 402 MAX9705
TDFN1
AUD_BI_PORT_D_R AUD_SPKRAMP_INSUB_L
54C7 IN
1 2 1 2 AUD_SPKRAMP_INSUB 2 IN+ OUT+ 8 SPKRAMP_SUB_P_OUT 55B3 SUB-TWEETER
0402
10% MAX9705_SUB_N 3 IN- OUT- 9 SPKRAMP_SUB_N_OUT 55B3
L7211 16V
X7R CRITICAL SYNC
5 SHDN*
6 SPKRAMP_SYNC1 55C4
FERR-1000-OHM 402
AUD_GPIO_0 1 2 THRML 1
54B8 IN
0402
GND PGND PAD R7202
4 7 11 100
1 5%
R7210 AUD_SPKRAMP_SHUTDOWN_L 55B8 55C8 CRITICAL 1/16W
MF-LF
10K
5%
C7231 1 2 402
1/16W 0.047UF
MF-LF
402 2
10%
16V
X7R 2
402
SPKRAMP_SYNC2 55B4 AUDI0: SPEAKER AMP
64B3 57D8 57C8
56B5 56B3 55C8 55B8 54D2 54B6 54A6 =GND_AUDIO_CODEC SPKRAMP_THERMPLANE 55A4 55B4 55C4
SYNC_MASTER=M42AUDIO SYNC_DATE=08/05/2006
A 57C5 57C3 57B8 57B5 57B3 57A6 57A5
55D3 55C8 55C3 55B8 55B3 55A5 55A3

64B3 56C2 55D8
=GND_AUDIO_PWR
A
XW7200
SM
64B3 56C2 55D8 55D3 55C8 55C3 55B8 55B3 55A8 55A3 =GND_AUDIO_PWR 1 2 SPKRAMP_THERMPLANE 55A4 55B4 55C4
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 55 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
MIC CONNECTOR
TABLE_ALT_HEAD

PART NUMBER
CRITICAL
APN:514S0392
TABLE_ALT_ITEM
518S0491 518S0332 ? J7302 IMPROVED TWO PIN CONNECTOR

J7301
48227-0301
M-RT-SM1
AUDIO JACK 1: LO/HP CONNECTOR, SPDIF TX 4
MIC_LO_CONN 1
L7390 56B1
MIC_HI_CONN 2
FERR-220-OHM 56B1
D 57B5 54D7 54A6

64A6
=PP3V3_S0_AUDIO 1
0402
2
AUD_SPDIF_OUT
IN 54D1
56B1 MIC_SHLD_CONN 3
D
L7300 L7301 5
FERR-120-OHM-1.5A FERR-120-OHM-1.5A
AUD_CONNJ1_SLEEVE 1 2 AUD_CONNJ1_SLEEVE_F 1 2 CRITICAL
PP3V3_S0_AUDIO_SPDIF
56B8
NO STUFF 0402-LF 0402-LF
SPEAKER CONNECTOR J7302
APN:514-0290 R7321 88611-02001
APN:514-0317 1
0 2
L7302 APN:518S0332
F-ST-SM
3
FERR-1000-OHM
OMIT 5% 1 2 AUD_CONNJ1_TIPDET_F
CRITICAL 1/16W AUD_CONNJ1_TIPDET
MF-LF SPKRCONN_L_P_OUT 1
J7300 402 0402 55C1
55C1
IN
IN SPKRCONN_L_N_OUT 2
AUDIO-OUT C7307 1 1 C7308 L7303 L7304
F-RT-TH
2 0.047uF 0.047uF FERR-1000-OHM FERR-1000-OHM NO STUFF 4
10% 10% AUD_CONNJ1_RING_F
3 16V
X7R 2
16V
2 X7R 1 2 1 2 AUD_PORTA_R BI 57C1
R7380 CRITICAL
4 402 402 0402 0402 =GND_AUDIO_PWR 2
0 1 SPKR_SHIELD J7303
64B3 55D8 55D3 55C8 55C3 55B8 55B3 55A8 55A5 55A3
5% 88609-04001
5 AUD_CONNJ1_RING L7305 L7306 1/16W
MF-LF
F-ST-SM
5
1 FERR-1000-OHM FERR-1000-OHM 402
7 AUD_CONNJ1_TIP 1 2 AUD_CONNJ1_TIP_F 1 2 AUD_PORTA_L 57D1
VCC BI SPKRCONN_SUB_P_OUT 1
55B1 IN
6 0402 0402
GND SPKRCONN_SUB_N_OUT 2
55B1 IN
VIN 8
9 L7307 55D1 IN SPKRCONN_R_P_OUT 3
SHLD_PIN
10
FERR-1000-OHM R7300 55C1 IN SPKRCONN_R_N_OUT 4
SHLD_PIN AUD_CONNJ1_SLEEVEDET 1 2 AUD_CONNJ1_SLEEVEDET_F 1
10K 2 AUD_J1_SLEEVEDET_R OUT 57C6 57C8
0402 5% 6
NO STUFF 1/16W
MF-LF
C7306 1 402
100PF 1 C7300 1 3 REPLACE 518S0334 WITH 518S0486
5%
1UF
CRITICAL
C7302 1 C7304 1 R7301
50V
DZ7300 4.7
C CERM 2
402
10%
2 6.3V
CERM 5.6V-15A
0405
100PF
5%
50V
100PF
5%
50V
1
5%
2 AUD_J1_TIPDET_R OUT 57D8
AUDIO SHIELD FILL C

402 CERM 2 CERM 2 1/16W
GND_AUDIO_SPDIF_DGND 402 402 MF-LF
56A8 2 4 1 3 402
R7391 CRITICAL
0 DZ7301
1 2
5.6V-15A
1 C7301 1 C7303 1 C7305
5%
1/16W
0405 5%
100PF 0.001uF
10% 5%
100PF XW7302
SM
50V 50V
MF-LF 2 4 2 CERM 2 CERM 2 50V
CERM
402 402 402 402 AUDIO_SHIELD_PLANE 1 2 CHASSIS_AUDIO_JACK_ISOL 56A3 56A8 56B1
56B6 56C1 56C8
CHASSIS_AUDIO_JACK_ISOL
XW7300
SM
56B1 56A8 56A3
56C1 56B6
AUD_J1_COM 1 2
XW7303
SM
1 2 CHASSIS_AUDIO_JACK_ISOL 56A3 56A8 56B1
56B6 56C1 56C8
NO STUFF XW7301
SM XW7304
XW7305
SM R7320 AUD_J2_COM 1 2 =GND_AUDIO_CODEC 54A6 54B6 54D2 55A8 55B8 55C8 56B5 57A5 57A6 57B3
SM
0 57B5 57B8 57C3 57C5 57C8 57D8 64B3 1 2 CHASSIS_AUDIO_JACK_ISOL 56A3 56A8 56B6
6D8 =GND_CHASSIS_AUDIO_JACK 1 2 CHASSIS_AUDIO_JACK_ISOL 56A3 56A8 56B1
56B6 56C1 56C8
CHASSIS_AUDIO_JACK_ISOL 1 2 =GND_AUDIO_CODEC 54A6 54B6 54D2 55A8 55B8 55C8 56B3 57A5 57A6 57B3
57B5 57B8 57C3 57C5 57C8 57D8 64B3
56C1 56C8
5%
1/16W
MF-LF
NO STUFF
402 R7382
2
0 1
R7349
AUD_J2_OPT_OUT 1
10 2 AUD_SPDIF_IN 5%
1/16W
OUT 54C1
MF-LF
5% 402
56D8 PP3V3_S0_AUDIO_SPDIF 1/16W
MF-LF
L7350 L7351
APN:514-0291 402 FERR-220-OHM FERR-220-OHM
APN:514-0318 AUD_CONNJ2_SLEEVE 1 2 AUD_CONNJ2_SLEEVE_F 1 2
OMIT NO STUFF
R7322
0402 0402 MIC EMI FILTER
CRITICAL 0 L7352
J7350 1 2
FERR-1000-OHM L7370 L7371
B AUDIO-IN
F-RT-TH
5%
1/16W
MF-LF
1 2 AUD_CONNJ2_TIPDET_F FERR-1000-OHM FERR-1000-OHM B
402 0402 57A8 OUT MIC_LO 1 2 MIC_LO_F 1 2 MIC_LO_CONN 56D3
2 0402 0402
4 AUD_CONNJ2_TIP L7353 L7354 L7372 L7373
FERR-1000-OHM FERR-1000-OHM
3 AUD_CONNJ2_TIPDET AUD_CONNJ2_RING_F FERR-1000-OHM FERR-1000-OHM
1 2 1 2 AUD_PORTF_R 57A1
BI 1 2 1 2
5 AUD_CONNJ2_RING 0402 0402 57A8 OUT MIC_HI MIC_HI_F MIC_HI_CONN 56D3
0402 0402
1
8 L7355 L7356 L7374 L7375
VCC FERR-1000-OHM FERR-1000-OHM FERR-1000-OHM FERR-1000-OHM
7
GND 1 2 AUD_CONNJ2_TIP_F 1 2 AUD_PORTF_L MIC_SHIELD 1 2 MIC_SHIELD_F 1 2 MIC_SHLD_CONN 56D3
BI 57B1 57A8 OUT
VOUT 6
0402 0402 0402 0402
9
SHLD_PIN
10 L7357 C7370 1 C7371 1 C7372 1
SHLD_PIN 100PF 100PF 100PF
FERR-1000-OHM R7350 5% 5% 5%
1 2 10K 50V
CERM 2
50V
CERM 2
50V
CERM 2
NO STUFF AUD_CONNJ2_SLEEVEDET AUD_CONNJ2_SLEEVEDET_F 1 2 AUD_J2_SLEEVEDET_R OUT 57B8 402 402 402
C7357 1 0402 5%
1/16W CHASSIS_AUDIO_JACK_ISOL
100PF MF-LF
56C8 56C1 56B6 56B1 56A8
5% 402
50V
CERM 2 1 C7350 1 C7351 1 3
402
1UF 10uF
CRITICAL
C7353 1 C7355 1 R7351
10% 20% DZ7351 100PF 100PF 4.7
5% 5%
1 2 AUD_J2_TIPDET_R OUT 57B8
2 6.3V
CERM 2 6.3V
X5R 5.6V-15A 50V 50V
402 603 0405 CERM 2 CERM 2 5%
402 402 1/16W
56C8 GND_AUDIO_SPDIF_DGND 1 3 2 4 MF-LF
CRITICAL 402
DZ7350 1 C7352 1 C7354 1 C7356
5.6V-15A
0405
2 4
5%
100PF
2 50V
0.001uF
10%
50V
2 CERM
5%
100PF
2 50V
TABLE_5_HEAD
AUDIO: JACK
CERM CERM TABLE_5_ITEM
SYNC_MASTER=M42AUDIO SYNC_DATE=08/05/2006
A CHASSIS_AUDIO_JACK_ISOL
402 402 402 514-0290 1 CONN,3.5MM COMBO AUDIO OUT,RA,MG3,LF J7300 CRITICAL NORMAL
TABLE_5_ITEM

A
56B6 56B1 56A3
56C8 56C1 514-0291 1 CONN,3.5MM COMBO AUDIO IN,RA,MG3,LF J7350 CRITICAL NORMAL
TABLE_5_ITEM
514-0317 1 CONN,3.5MM COMBO AUDIO OUT,RA,BLACK,LF J7300 CRITICAL FANCY THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
AUDIO JACK 2: LINE IN CONNECTOR, SPDIF RX
TABLE_5_ITEM
514-0318 1 CONN,3.5MM COMBO AUDIO IN,RA,BLACK,LF J7350 CRITICAL FANCY I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 56 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PORT A DETECT PORT E DETECT(E TELLS H TO TURN ON)

57C8 57C4 54C1 OUT AUD_SENSE_B CODEC PORT ASSIGNMENTS
57C5 54C1 OUT AUD_SENSE_A
PORT A :HEADPHONE/LINE OUT
57C8 57B3 PP3V3_S0_AUDIO_F 1
R7406
1
R7405 PORT B :MICROPHONE ON BOTH CH (ADC 0)
39.2K 39.2K
1
1% 1% PORT C :SPEAKER AMP
R7401 1/16W
MF-LF
1/16W
MF-LF
470K
5%
AUD_OUTJACK_INSERT_L 2 402 2 402 PORT D :UNUSED
D 2
1/16W
MF-LF
402
6
AUD_PORTA_DET_L
3
NC
6
AUD_PORTE_DET_L NC
PORT E :SW USES TO TRIGGER DIGITAL OUT D
D D D
PORT F :LINE IN (ADC 1)
Q7400 Q7401 Q7401
R7402 2N7002DW-X-F 2N7002DW-X-F 2N7002DW-X-F CD INPUT :UNUSED
47K 2
SOT-363
5
SOT-363
2
SOT-363
56C3 IN AUD_J1_TIPDET_R 1 2 AUD_J1_DET_RC G S G S G S
5%
1/16W 1 1 4 1
MF-LF
402
C7401
0.1UF
2
20%
CERM
10V
402 PORT A HP/LO CRITICAL
57C5 57C3 57B8 57B5 57B3
C7430
55B8 55A8 54D2 54B6 54A6 =GND_AUDIO_CODEC 100UF
57A6 57A5 56B5 56B3 55C8
64B3 57C8 AUD_PORTA_L_R 1 2 AUD_PORTA_L
R7403 57B1 BI 56C3
100K 2 1
57D8 57C8 57B3 PP3V3_S0_AUDIO_F 1 AUD_J1_SLEEVEDET_INV 20% R7434
6.3V
1
5% POLY 47.0K
1/16W
R7461 MF-LF 57C3 54D2 54A3 PP4V5_AUDIO_ANALOG
B2 1%
1/16W
270K 402 3 MF-LF
5% 57C8 56C3 AUD_J1_SLEEVEDET_R 1 1 2
402
D
1/16W
MF-LF
Q7400 R7404 R7414 64B3
56B5 56B3 55C8 55B8 55A8 54D2 54B6 54A6 =GND_AUDIO_CODEC
2 402
2N7002DW-X-F 5.11K 5.11K 57D8 57C8 57C5 57B8 57B5 57B3 57A6 57A5
SOT-363 1% 1%
57C6 56C3 AUD_J1_SLEEVEDET_R 5 G S 1/16W 1/16W
IN 1
MF-LF
402
MF-LF
402
R7435
1 C7402 4 2 2 47.0K
0.01UF CRITICAL 1%
54C1 AUD_SENSE_A AUD_SENSE_B
10% 57D8 54C1 57C8 57D8
C7431 1/16W
MF-LF
16V
2 CERM 100UF 2 402
57C5 57C3 57B8 57B5 57B3 402
55B8 55A8 54D2 54B6 54A6
57A6 57A5 56B5 56B3 55C8
=GND_AUDIO_CODEC C7404 1 1 C7414 57B1 AUD_PORTA_R_R 1 2 AUD_PORTA_R BI 56C3
64B3 57D8 0.1UF 0.1UF
20% 20%
10V 10V 20%
CERM 2 2 CERM 6.3V
PORT F DETECT PORT G DETECT 402 402 POLY

B2
AUD_SENSE_B 64B3
=GND_AUDIO_CODEC HP/LO DE-POP SWITCH APN:353S1459 C
C 57D8 57C4 54C1 56B5 56B3 55C8 55B8 55A8 54D2 54B6 54A6
57D8 57C8 57C3 57B8 57B5 57B3 57A6 57A5
NO STUFF
57C5 54D2 54A3 PP4V5_AUDIO_ANALOG
1 NO STUFF
R7415
57D8 57C8 57B3 PP3V3_S0_AUDIO_F 20.0K R7438
1% 0
NO STUFF 1/16W 54C7 21C7 5C1 ACZ_RST_L 1 2
IN
1 MF-LF
5%
1 R7460 2 402 1/16W
R7411 270K MF-LF
470K AUD_INJACK_INSERT_L 1
R7413 5% AUD_PORTG_DET_L NC AUD_GPIO_1
402
5% 1/16W 54B8 IN
1/16W 20.0K MF-LF
6
MF-LF 1% 2 402 C2
2 402 3 1/16W
D R7430 VCC
MF-LF Q7402 4.7
2 402
R7412
D Q7402 2N7002DW-X-F
SOT-363
54C1 BI AUD_BI_PORT_A_L 1 2
U7400
47K
2N7002DW-X-F
SOT-363
2 G S 5%
1/10W C1 MAX9890
CEXT C3 MAX9890_CEXT
56A4 AUD_J2_TIPDET_R 1 2 AUD_J2_DET_RC 5 G S NO STUFF MF-LF SHDN*
IN
B1 INLCRITICALOUTL A1
1 603
5% 1 C7412 MAX9890_INL AUD_PORTA_L_R
1/16W 1 4 R7431 57D3
MF-LF C7411 0.01UF 4.7

402 10%
54C1 AUD_BI_PORT_A_R 1 2 MAX9890_INR B3 INR UCSP1 OUTR A3 AUD_PORTA_R_R 57C3
0.1UF 16V BI
2 CERM
A2 GND
20% 10V 5%
2 CERM 402 402 1
1/10W C7435
64B3
57B5 57B3 57A6 57A5
55A8 54D2 54B6 54A6 =GND_AUDIO_CODEC
MF-LF
603 R74391 0.1UF
56B5 56B3 55C8 55B8 10K 20%
57D8 57C8 57C5 57C3 10V
5% 2 CERM
1/16W 402
MF-LF
402 2
56A4 IN AUD_J2_SLEEVEDET_R 57A6 57A5 56B5 56B3 55C8 55B8 55A8 54D2 54B6 54A6 =GND_AUDIO_CODEC
L7400 64B3 57D8 57C8 57C5 57C3 57B8 57B5 57B3
FERR-1000-OHM
=PP3V3_S0_AUDIO 1 2 PP3V3_S0_AUDIO_F
64A6 56D8 54D7 54A6 57C8 57D8
0402
CRITICAL
1
C7400 CRITICAL
PORT F LI C7432
B 2
0.1UF
20%
10V
CERM
R7432
4.7
3.3uF
1 2
B
402 54C1 BI AUD_BI_PORT_F_L 1 2 AUD_PORTF_L_R AUD_PORTF_L BI 56B4
57A6 57A5 56B5 56B3 55C8 55B8 55A8 54D2 54B6 54A6 =GND_AUDIO_CODEC 5%
64B3 57D8 57C8 57C5 57C3 57B8 57B3 1/16W 10% 1
MF-LF 10V R7436
402 CERM-X5R 47.0K
805-1 1%
1/16W
MF-LF
2 402
57A6 57A5 56B5 56B3 55C8 55B8 55A8 54D2 54B6 54A6 =GND_AUDIO_CODEC
MIC INPUT CIRCUITRY 64B3 57D8 57C8 57C5 57C3 57B8 57B5 57B3
1
R7437
R7450 47.0K
6.8K 1%
CRITICAL 1/16W
1 2 AUD_VREF_PORT_B 54C1
C7433 MF-LF
402
1/16W 5% R7433 3.3uF 2
R7451 MF-LF 402 C7450 4.7
0.1uF 54C1 AUD_BI_PORT_F_R 1 2 AUD_PORTF_R_R 1 2 AUD_PORTF_R 56B4
330 BI BI
56B3 MIC_HI 1 2 MIC_IN 1 2 AUD_BI_PORT_B_L 54C1 5%
IN 10%
MAKE_BASE=TRUE 1/16W
10V
1/16W 5% MF-LF
MF-LF 402 10% 16V 402 CERM-X5R
CRITICAL
X5R 402 805-1
C7451 1
1
R7452 CRITICAL
CRITICAL
AUD_BI_PORT_B_R 54C1 UNUSED CODEC ANALOG PORT TERMINATIONS
0.001UF 100K 1
10% 5% C7452 NO STUFF
1/16W
50V
2 MF-LF
0.001UF PLACE C7452 NEAR U6800
CERM 10% BAL_IN_COM
402 OUT 54C7
402 2 XW7400 50V
CERM 2 54C1 OUT AUD_BI_PORT_E_L
SM 402
BAL_IN_R OUT 54C7
MIC_LO 1 2 =GND_AUDIO_CODEC
54C1 OUT AUD_BI_PORT_E_R BAL_IN_L
56B3 IN 54A6 54B6 54D2 55A8 55B8 55C8 56B3 56B5 OUT 54C7
57A5 57B3 57B5 57B8 57C3 57C5 57C8 57D8 64B3
NO STUFF
R7453 54C7 OUT AUD_BI_PORT_D_L
56B3 MIC_SHIELD 1
0
2
AUDIO: JACK TRANSLATORS
IN
A 5%
1/16W
MF-LF
402
1
R7440
20K
SYNC_MASTER=M42AUDIO

A
1 1 1 1
5% C7440 C7441 C7445 1
C7446 C7447
1/16W 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
R7454 MF-LF 10% 10% 10% 10% 10% THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
2 402 16V 16V 16V 16V 16V PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
0 X5R 2 2 X5R X5R 2 X5R 2 2 X5R AGREES TO THE FOLLOWING
1 2 =GND_CHASSIS_AUDIO_MIC 6D8 402 402 402 402 402
5%
1/16W 57B3 57A6 56B5 56B3 55C8 55B8 55A8 54D2 54B6 54A6 =GND_AUDIO_CODEC II NOT TO REPRODUCE OR COPY IT
MF-LF 64B3 57D8 57C8 57C5 57C3 57B8 57B5
402 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 57 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
TABLE_ALT_HEAD

PART NUMBER
TABLE_ALT_ITEM
128S0093 128S0092 ? C7501,C7508 KEMET T520V336M016ATE0457650

TABLE_ALT_ITEM
64D3 =PP5V_S0_IMVP6 64C1 58D8 58C2 48C7 =PPVIN_S5_IMVP6

CRITICAL CRITICAL
CRITICAL
1 2 PP5V_S0_IMVP6_VDD 5
1
C7509 1
C7517 1 C7518
C7526 MIN_LINE_WIDTH=0.25 MM
Q7500 33UF 33UF 1uF
1 VOLTAGE=5V DPRSLPVR DPRSTP* PSI* Operation Mode HAT2168H 20% 20% 10%
R7512 1uF C7535 2 16V 2 16V 16V
X5R
10 10% 1 LFPAK POLY POLY 2
5% 16V 4.7uF 4 CASED2E-SM CASED2E-SM 603
1/16W 2
X5R 20% 0 1 1 2-Phase CCM
D
MF-LF
402
603
2
6.3V
CERM
603
D
58D5 58C2 48C7 =PPVIN_S5_IMVP6 1 2 PPVIN_S5_IMVP6_VIN 0 1 0 1-Phase CCM
64C1
C7596
1 0 1 1-Phase DCM CRITICAL 36A MAX CURRENT
R7520 1 1 2 3
10 0.01UF (IMVP6_PHASE1) =PPVOUT_S0_IMVP6_REG
5% 10% 1 2
64D8
1/16W
MF-LF 2
16V
CERM 1 0 0 1-Phase DCM
PM_DPRSLPVR 402 402 CRITICAL CRITICAL
23C3 14B7
IN
Q7501 5 Q7504 5 NO STUFF L7500
1 0.36uH-30A-0.80mOhm
MIN_NECK_WIDTH=0.2 MM 1 2 IMVP6_BOOT1_RC HAT2165H HAT2165H R7503 SM
LFPAK 1
PP3V3_S0_IMVP6_3V3 LFPAK
64A6 =PP3V3_S0_IMVP6 1 2
4 4
5% MPC1055LR36
R7524 2
1/8W
MF-LF DCR=0.8mOHM
R7521 1
C7530 0
5% 2
805
10 0.1uF 1/16W
5% 10% MF-LF
1/16W 16V 402
MF-LF X5R IMVP6_FET_RC1
2 402 1 58A8
402 1 2 IMVP6_BOOT2_RC
58B7 58A4 GND_IMVP6_SGND 20 22 31 1 2 3 1 2 3
C7515 NO STUFF
NO STUFF NO STUFF VIN VDD PVCC R7525 C7527 1 1 2 1 2 1 2
R7527 0.22uF C7512
4.02K
R7526 58A4 9D2 CPU_VID_R<6> 43
VID6 BOOT1 36 58A8 IMVP6_BOOT1
0
5%
1 0.22uF 10%
1
0.0047UF
1% 470K OMIT 1/16W 10% 6.3V NO STUFF NO STUFF R7500 C7503 R7504
1/16W 402 58A4 9D2 CPU_VID_R<5>
42
VID5 BOOT2
26 58A6 IMVP6_BOOT2 MF-LF 6.3V 2 CERM-X5R CRITICAL 10%
MF-LF
402 58A4 9C2 CPU_VID_R<4>
41 U7500
VID4 ISL6262-SCRN
402 2 CERM-X5R 402 1 C7500 1 C7590 D7500 2 25V 10K
1%
0.22uF 1
5%
1 2 1 2 402 0.0022UF 0.0022UF B340LBXF CERM 1/16W 10% 1/16W
40 35 10% 10% 402 6.3V
58A4 9C2 CPU_VID_R<3> VID3 QFN UGATE1 58A8 IMVP6_UGATE1 SMB MF-LF MF-LF
1 50V 50V 402 CERM-X5R 402
R7545 58A4 9C2 CPU_VID_R<2>
39
VID2 CRITICAL 34 2 CERM
2
CERM 402
NO STUFF 499 38 PHASE1 58A8 IMVP6_PHASE1 402 402
ERT-J0EV474J 9C2 CPU_VID_R<1> VID1
C7510 1%
1/16W
58A4
37 32
0.01uF MF-LF 58A4 9C2 CPU_VID_R<0> VID0 LGATE1 58A8 IMVP6_LGATE1
10% IMVP6_NTC_R 2 402 (GND)
16V 33
CERM 46 PGND1
402
21C4 7B3
IN CPU_DPRSTP_L DPRSTP*
IMVP_DPRSLPVR 45 24 IMVP6_ISEN1
(IMVP6_ISEN1)
1 2 DPRSLPVR ISEN1 58A8
C NO STUFF 1
R7519
7A3
IN
CPU_PSI_L
1V51V05S0_PGOOD
2
3
PSI*
PGD_IN UGATE2 27 IMVP6_UGATE2
C
R7506 499
62A1
63C2 IN
58A6
=PPVIN_S5_IMVP6 58D8
0 1% 28 48C7
5% 1/16W 48 PHASE2 58A6 IMVP6_PHASE2 58D5
1/16W MF-LF 3V3 CRITICAL CRITICAL 64C1
MF-LF 402 47 30 1 1 C7599
46C2 46B5 7C6
CPU_PROCHOT_L
1
402
2
2 26A7
OUT
VR_PWRGD_CK410_L CLK_EN* LGATE2 58A6 IMVP6_LGATE2 C7501 C7508 1
1uF
1
R7501
FROM SMC 45D8
IN
IMVP_VR_ON 44
VR_ON 29 (GND) 5 33UF 33UF 10%
16V 3.65K
1 PGND2 20% 20% X5R 1%
26B5 14B6
OUT
VR_PWRGOOD_DELAY PGOOD 2 16V 2 16V 2 603 1/16W
1 2 POLY POLY MF-LF
IMVP6_VR_TT 5 CASED2E-SM CASED2E-SM
VR_TT* 402
R7508 6 ISEN2 23 58A6 IMVP6_ISEN2 4 2
C7505 IMVP6_NTC NTC
147K
0.015uF 1%
19 CRITICAL
1/16W
7 VSUM 58A4 IMVP6_VSUM
10%
16V
MF-LF
402
58A4 IMVP6_SOFT SOFT
OCSET 8 58A4 IMVP6_OCSET Q7502 MPC1055LR36
X7R HAT2168H
402 4 18 58A4 DCR=0.8mOHM
1 2 58A4 5D7 IMVP6_RBIAS RBIAS VO 48C5 IMVP6_VO NO STUFF
58A4
1 1 2 3 LFPAK CRITICAL
DROOP 16 48D5 IMVP6_DROOP
C7516 (IMVP6_PHASE2) 1 2
IMVP6_VDIFF 13
58A4 VDIFF 0.001uF
2
DFB
17 58A4 IMVP6_DFB 1 2 10% CRITICAL CRITICAL L7501
1 C7506 1 2 58A4 IMVP6_FB2 12
FB2
50V
Q7503 Q7505 0.36uH-30A-0.80mOhm
470pF 1 CERM 5 5 SM
10%
NO STUFF 58A4 IMVP6_FB 11
FB VSEN
14 R7518 R7517 1 C7529 402 HAT2165H HAT2165H
50V 1K 5.11K 180pF LFPAK LFPAK NO STUFF
CERM IMVP6_COMP 10 15 1 1
1 2 402 R7513 58A4 5D7 COMP RTN 1% 1%
1/16W 5% R7516 R7502
R7509 2.0K 58A4 IMVP6_VW 9
VW
1/16W
MF-LF MF-LF 2 50V 11.5K 4 4 1
1.82K 1%
1 2 2 402 402
CERM 1% 2 5% 1 2
1% IMVP6_VDIFF_RC 1/16W 1/16W 1/8W 1 2 1 2
IMVP6_VSEN
MF-LF 402
1/16W MF-LF MF-LF
IMVP6_RTN
402 25
MF-LF 1 NC 2 402 2 805
2 402 R7511 C7531 (IMVP6_VO) R7505 C7504 R7507
1.40K VSS TPAD 0.068UF 10K 0.22uF 1
1% 1 IMVP6_FET_RC2 1% 58A6 5%
1/16W 21 49 10% 1 2 3 1 2 3 1/16W 10% 1/16W
10V 1 6.3V
MF-LF
402 58A4
CERM
58A4
R7530 MF-LF
402 CERM-X5R
MF-LF
402
2 402 3.92K 402
(IMVP6_FB) 1 2 1%
58A4 GND_IMVP6_SGND 1/16W
B 58C8
(IMVP6_VW)
NO STUFF
C7534 C7528 1
R7515 2
MF-LF
402
NO STUFF
C7502 1
NO STUFF
C7592
CRITICAL
D7501
NO STUFF
C7511
B
1 C7514 C7532
1
0.033UF
1
0.33uF 11K
IMVP6_VO_R 1
0.0022UF 0.0022UF B340LBXF
1 1
R7543
0.033UF 10% 10%
0.0047UF
10% 0.01UF 16V 6.3V 1% 1
10% 10% SMB 10%
3.65K
16V 10% X5R CERM-X5R 1/16W 50V 2 50V 1%
X5R 2 402 2 402 MF-LF 2 CERM 2 25V 1/16W
16V CERM
2 402 CERM 2 402 402 CERM MF-LF
C7513 402 R7531 402 402 2 402
1
390pF 1 C7507 1
R7510 1 2 10KOHM-5%
IMVP6_COMP_RC 10% 47PF 4.42K
50V 5% 0603-LF
CERM 50V 1% (IMVP6_ISEN2)
2 402 CERM 1/16W 2
1
R7514
2 402 MF-LF
402 C7533 ERT-J1VR103J (IMVP6_VSUM)
2 0.018UF
61.9K 10%
1%
16V
(IMVP6_VO)
1/16W X7R
MF-LF 402
402
2 (IMVP6_COMP) TABLE_5_HEAD

1 2
R0802/R0803 **on the CPU page** protect the IMVP6 if the CPU is not installed TABLE_5_ITEM
Note 1: C7532,C7533 = 27.4 Ohm For Validating CPU Only. 353S1465 1 ISL6262 U7500 M42
1 1
2 C7521 R7523 R7522 353S1461 1 ISL9504 U7500 M42A
TABLE_5_ITEM
0.22uF 0 0
10% 5% 5%
OMIT 6.3V 1/16W 1/16W
CERM-X5R MF-LF MF-LF
XW7500 1 402 2 402 2 402 MIN_LINE_WIDTH MIN_NECK_WIDTH
SM CPU_VCCSENSE_P 8B6 58A4 58B6
IMVP6_OCSET 0.25 MM 0.20 MM
CPU_VCCSENSE_N 8B6 58A4 58C7 9D2 9C2
CPU_VID_R<0..6> 0.25 MM 0.20 MM
58C6
IMVP6_VSUM 0.25 MM 0.20 MM
58C8 58B7
GND_IMVP6_SGND 0.50 MM 0.20 MM
IMVP6_VO
A
IMVP6 CPU VCORE REGULATOR 58B6 48C5
58B6 48D5
58B6
IMVP6_DROOP
IMVP6_DFB
0.25 MM
0.25 MM
0.25 MM
0.20 MM
0.20 MM
0.20 MM
IMVP6 CPU VCore Regulator
SYNC_MASTER=POWER SYNC_DATE=07/13/2005
58C7
58B7 5D7
IMVP6_SOFT
IMVP6_RBIAS
0.25 MM
0.25 MM
0.20 MM
0.20 MM NOTICE OF PROPRIETARY PROPERTY
A
MIN_LINE_WIDTH MIN_NECK_WIDTH MIN_LINE_WIDTH MIN_NECK_WIDTH 58B7
IMVP6_VDIFF 0.25 MM 0.20 MM
58C6
IMVP6_PHASE1 1.5 MM 0.25 MM 58C6
IMVP6_PHASE2 0.25 MM 0.25 MM 58B7
IMVP6_FB2 0.25 MM 0.20 MM PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
58C6
IMVP6_BOOT1 0.25 MM 0.25 MM 58C6
IMVP6_BOOT2 0.25 MM 0.25 MM 58B7
IMVP6_FB 0.25 MM 0.20 MM
58C6
IMVP6_UGATE1 1.5 MM 0.25 MM 58C6
IMVP6_UGATE2 0.25 MM 0.25 MM 58B7 5D7
IMVP6_COMP 0.25 MM 0.20 MM
58C6
IMVP6_LGATE1 1.5 MM 0.25 MM 58C6
IMVP6_LGATE2 0.25 MM 0.25 MM 58B7
IMVP6_VW 0.25 MM 0.25 MM
58C6
IMVP6_ISEN1 0.25 MM 0.25 MM 58C6
IMVP6_ISEN2 0.25 MM 0.25 MM 58A5 8B6
CPU_VCCSENSE_P 0.25 MM 0.25 MM
58C2
IMVP6_FET_RC1 0.25 MM 0.25 MM 58B2
IMVP6_FET_RC2 0.25 MM 0.25 MM 58A5 8B6
CPU_VCCSENSE_N 0.25 MM 0.25 MM SIZE DRAWING NUMBER REV.
IMVP6_VSUM_R1 IMVP6_VSUM_R2 IMVP6_RTN
IMVP6_VO_R1
0.25 MM
0.25 MM
0.25 MM
0.25 MM IMVP6_VO_R2
0.25 MM
0.25 MM
0.25 MM
0.25 MM
58B6
58B5
IMVP6_VSEN
0.25 MM
0.25 MM
0.25 MM
0.25 MM APPLE COMPUTER INC.
D 051-7374 A
SCALE SHT OF
NONE 58 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D 5V/3.3V POWER SUPPLY D
2 1
=PPVIN_S5_5V3V3S5
64C1 63B7
CRITICAL
C7608 R7661
CRITICAL C7681 0.22UF 715
1 10%
1
C7640 1 C7641 1
1uF C7680 6.3V
1%
1/16W
2 1 1uF 10% 33UF CERM-X5R MF-LF
33UF 10%
16V
16V
X5R
20% 402 402
20% 2 2 16V 1 2
R7621 C7609 2 16V
POLY
2 X5R
603
603 POLY
CASED2E-SM
1.02K CASED2E-SM 1 2
1% 0.1uF
1/16W 10%
MF-LF 16V
402 X5R
402
3V3S5_SNS_N 1 R7669
1 2
MIN_LINE_WIDTH=0.6 mm R7600 5VS5_SNS_N 976
MIN_NECK_WIDTH=0.25 mm 10 MIN_LINE_WIDTH=0.6 mm 1%
1% MIN_NECK_WIDTH=0.25 mm 1/16W
1/16W MF-LF
3V3S5_SNS_P MF-LF 5VS5_SNS_P 402
1 2 2 1
MIN_LINE_WIDTH=0.6 mm 2 402
MIN_NECK_WIDTH=0.25 mm MIN_LINE_WIDTH=0.6 mm
R7629 MIN_NECK_WIDTH=0.25 mm
C7632
1.5K 1
1% 0.22UF
1/16W
MF-LF
59A2
59C3
PP5V_S5_5V3V3S5_INTVCC
PPVIN_S5_5V3V3S5_R
PP5V_S5_5V3V3S5_INTVCC 59A2
59C6
R7666 10%
6.3V
402 VOLTAGE=12V 2.74K CERM-X5R
CRITICAL MIN_LINE_WIDTH=0.6 mm CRITICAL 1% 402
2 1 1 1/16W
1 D7624 MIN_NECK_WIDTH=0.25 mm D7664 MF-LF
402 2
1 CMDSH-3 CMDSH-3
C C7631
0.1uF
R7626
3.32K
1% 2
SOD-323
2
SOD-323
C
10% 1/16W
16V
X5R MF-LF
402
5 3V3S5_BOOST_RC
1
R7630 1 C7600 1
R7670 2 1 5VS5_BOOST_RC
5
402 2 MIN_NECK_WIDTH=0.25 mm 2 1 1M 1uF 1M MIN_NECK_WIDTH=0.25 mm OMIT
5% 10% 5%
OMIT R7624
CRITICAL
1 1/16W
MF-LF
2 16V
X5R 1/16W
MF-LF
C7662 R7664 1 CRITICAL
0 603 0.001uF 0 Q7660
Q7620 5%
1/16W
C7622 2 402 2 402 10%
50V 5%
STL8NH3LL 4 MF-LF 0.001uF CERM 1/16W MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm 4
STL8NH3LL
10% MF-LF
23
PWRFLT-3P3X3P3 402 402 PWRFLT-3P3X3P3
MIN_LINE_WIDTH=0.6 mm 2 50V 402 2
OMIT MIN_NECK_WIDTH=0.25 mm CERM VIN
CRITICAL 1 C7624 402 C7664 1 CRITICAL
4A MAX CURRENT L7620
4.7UH-6.5A 3 2 1 0.1uF 3V3S5_TG 26
TG1 TG2 14 5VS5_TG 0.1uF
10% 1 2 3 L7680 5A MAX CURRENT
10% 16V
XW7620 L812HW 2 16V 3V3S5_BOOST 24 BOOST1 17 5VS5_BOOST X5R 2
4.2UH XW7660
X5R MIN_LINE_WIDTH=0.6 mm
BOOST2 MIN_LINE_WIDTH=0.6 mm 402 SM
OPEN-SAWTOOTH 402 MIN_NECK_WIDTH=0.25 mm CRITICAL MIN_NECK_WIDTH=0.25 mm OPEN-SAWTOOTH
=PP3V3_S5_REG 1 2 3V3S5_SW 25 15 5VS5_SW 1 2 1 2 =PP5V_S5_REG
64A6
JUMPER
SW1 U7600 SW2 MIN_LINE_WIDTH=0.6 mm
JUMPER
64A6
MIN_NECK_WIDTH=0.25 mm 22 LTC3728LXC MIN_NECK_WIDTH=0.25 mm IHLP2525/4.2UH

VOLTAGE=3.3V IHLP2525/4.7uH 5 3V3S5_BG BG1 QFN BG2 18 5VS5_BG 5 DCR=32 MOHM
MIN_LINE_WIDTH=0.6 mm DCR=40 mOHM MIN_LINE_WIDTH=0.6 mm VOLTAGE=5V
MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.25 mm MIN_LINE_WIDTH=0.6 mm
PP3V3_S5_REG_P MIN_NECK_WIDTH=0.25 mm OMIT MIN_NECK_WIDTH=0.25 mm NC 3 PLLIN PLLFLTR 2 5V3V3S5_FSEL 59A2 OMIT MIN_NECK_WIDTH=0.25 mm PP5V_S5_REG_P 59A6
CRITICAL CRITICAL
Q7621 30 SENSE1+
SENSE2+
12 Q7661 1 C7690 C7691 1
CRITICAL 1
C7651 C7650 STL8NH3LL
NO STUFF 31 SENSE1- 11 STL8NH3LL 22UF 22UF
C7692
C7652 22UF
1
22UF PWRFLT-3P3X3P3
4 C7621 SENSE2- 4
PWRFLT-3P3X3P3 20% 20% 20%
150uF
150uF 20% 20% 0.001UF 3V3S5_VOSNS 1 VOSENSE1 9 5VS5_VOSNS 2 6.3V 6.3V 2 6.3V
20% 2 6.3V 6.3V 1 10% VOSENSE2 NO STUFF CERM-X5R CERM-X5R POLY
6.3V
POLY
CERM-X5R
805
2 CERM-X5R
805
<Rc> 50V
CERM 3V3S5_ITH 5 ITH2 8 5VS5_ITH C7661 1 805 805 SMC-LF
1 1 3 2 1 402 ITH1 0.001uF 1 2 3
SMC-LF
R7627 C7629 2 10%
1%
63.4K 180PF 63C7 3V3S5_RUNSS 28 RUN_SS1 RUN_SS2 13 5VS5_RUNSS 50V
CERM
2 1 C7669 1 <Ra>
5% 1 180PF
1/16W
MF-LF
2 50V
CERM
1 C76261 C7625 3_3VOUT 7 NC C7665 402
5% R7667
2 402 402 220PF 5V3V3S5_FCB 4 FCB 0.001UF 50V 105K
5% 0.001uF 59A3 10% 2 CERM 1%
10% PGOOD 27 2 50V
2 25V 2 50V CERM 402 2 1/16W
B CERM
402 CERM
402 21 EXTVCC INTVCC 20 1
C7689 402
5VS5_ITH_RC
MF-LF
402 B
1
<Rd> NO STUFF 3V3S5_ITH_RC NC1 10 NC
220PF
5%
R7628 1 25V
THRML_PAD
2
20.0K C7628 NC2 16 NC CERM
402 1 <Rb>
1%
1/16W
0.001uF
10%
1
R7625 1
C7630 NC3 29 NC R7665 1 C7666 1
2 1 20.0K 100PF NO STUFF R7668
C7670
SGND
PGND
MF-LF 50V 10K 0.1uF NC4 32 NC 1% 1
2 402 CERM
402 1%
1/16W 2
10%
16V 0.1uF 1/16W
MF-LF
5%
2 50V
C7668 1%
20.0K
MF-LF X5R 10% 402 CERM 0.001UF 1/16W
402 16V 2 2 402 10%
33
19
VOLTAGE=0V 2 402 X5R 2 50V MF-LF
MIN_NECK_WIDTH=0.25 mm GND_5V3V3S5_SGND 402 CERM 2 402
402
Vout = 0.8V * (1 + Rc / Rd) 59B1

PP5V_S5_REG_P 1 2
Vout = 0.8V * (1 + Ra / Rb)
C7605 I629
1 1uF
10% SM
XW7600 5V3V3S5_PGOOD RSMRST_PWRGD
45D8 46D6
6.3V MAKE_BASE=TRUE
CERM
TABLE_5_HEAD 2 402 PP5V_S5_5V3V3S5_INTVCC 59C3 59C6
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION VOLTAGE=5V
TABLE_5_ITEM
5V3V3S3_SKIP 1 R7603 MIN_LINE_WIDTH=0.6 mm
1
152S0133 1 4.7UH,+/-20%,40mOHM,3mm L7620 3V3_IND_3MM 1 C7602 1 C7601 R7606 30.1K
1%
TABLE_5_ITEM
1uF 4.7UF 0 1/16W

152S0365 1 4.7UH,+/-20%,40mOHM,2.8mm L7620 3V3_IND_2MM8 10% 20% 5% MF-LF
1/16W
TABLE_5_ITEM
2 6.3V
CERM 2 6.3V
CERM MF-LF 2
402
376S0445 4 FAIRCHILD FDM6296 Q7620,Q7621,Q7660,Q7661 FET_FDN6296 402 603 2 402
5V3V3S5_FCB 59B5
5V3V3S5_FSEL 59B4
5V3V3S3_CONT 1 1 C7604
1
R7607 1 C7607 R7604 0.01uF
0.01uF 5.62K 10%
0
PART NUMBER ALTERNATE FOR
PART NUMBER
BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
5%
1/16W
10%
16V
2 CERM
1%
1/16W
MF-LF
2 16V
CERM
402
5V / 3.3V Power Supply
MF-LF 402 2 402
A 2 402 SYNC_MASTER=POWER SYNC_DATE=07/13/2005
A
TABLE_ALT_ITEM

TABLE_ALT_ITEM

376S0448 376S0445 ? Q7620,Q7621 VISHAY SI7806ADN
TABLE_ALT_ITEM

376S0448 376S0445 ? Q7660,Q7661 VISHAY SI7806ADN PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 59 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
YUKON POWER CONTROL 2.5V REGULATORS D
=PP3V3_S3_2V5S3
64B3 60C4
ENETPWR_EN
60C5 60B5
CRITICAL
1
R7750 U7700 0.3A MAX CURRENT
64C1 =PPBUS_S5_YUKON_CTRL 470K MAX8887
5% =PP3V3_S3_2V5S3 1
SOT23-5
5
=PP2V5_S3_REG
1/16W 64B3 60D6 IN OUT 64C6
MF-LF VOLTAGE=2.5V
2V5S3_BP
2 402 3 SHDN_L BP 4 MIN_NECK_WIDTH=0.25 mm
1
R7751 ENETPWR_EN
1 C7700
470K
60B5 60D4
4.7uF GND 1 C7702
5%
1/16W
20%
2 6.3V 2
1 C7701 4.7uF
MF-LF CERM 0.01uF 20%
3 603 10% 2 6.3V
2 402 2 16V CERM
D
Q7750 1 C7750 CERM
402
603
2N7002DW-X-F 0.0022UF
SOT-363 10%
PM_SLP_S3BATT 5 G S 2 50V
CERM
402
4
6
D Q7750
2N7002DW-X-F CRITICAL
SOT-363
63D6 61B8 45C5 23C3 PM_SLP_S4_L 2 G S
U7701 0.3A MAX CURRENT C
C 1
=PP3V3_S0_2V5S0
MAX8887
SOT23-5 =PP2V5_S0_REG
64A6 1 IN OUT 5 63B3 64B8
VOLTAGE=2.5V
3 SHDN_L BP 4 2V5S0_BP MIN_LINE_WIDTH=0.5 mm
Q7750 HAS A BUILT-IN BODY DIODE 1 C7703
4.7uF GND 1 C7705
R7752 20% 1 C7704 4.7uF
0 2 6.3V
CERM
2
0.01uF 20%
39C4 FWPWR_EN_L 1 2 FWPWR_EN_L_R 603 10%
16V 2 6.3V
CERM
5% 2
1/16W CERM 603
MF-LF 402
402
NOSTUFF
R7753
1
0 2
5%
1/16W
MF-LF
402
1.2V REGULATOR
PM_SLP_S4_L FWPWR_EN_L PM_SLP_S3BATT ENETPWR_EN CRITICAL
B
NAME U7720 B
MAX8516
LOGIC S3 | S0 ~S0 | ~SMC_PS_ON POWER YUKON SOP 0.5A MAX CURRENT
S3 ON BATTERY TRUE (3.3V) TRUE (PBUS 12.6V) TRUE (PBUS 12.6V) FALSE (0V) =PP1V2_S3_REG
64C3 =PP1V8_S3_1V2S3 2 IN0 OUT0 8 63B5 64C6
S0 OR S3 ON AC TRUE (3.3V) FALSE (0V) FALSE (0V) TRUE (3.3V) 3 IN1 OUT1 9
S5 ON AC FALSE (0V) TRUE (PBUS 12.6V) TRUE (PBUS 12.6V) FALSE (0V) ENETPWR_EN
<Ra>
1
60D4 60C5 1 EN FB 7 R7720 1 C7721
S5 ON BATT FALSE (0V) FALSE (0V) TRUE (PBUS 12.6V) FALSE (0V) 5.11K 4.7UF
NC 4 NC0 1%
1V2_FB
1/16W 20%
NC 5 NC1 MF-LF 2 6.3V
NOTE: IF CHANGE TO STUFFING R7753 THEN ENETPWR_EN IS BUFFERED PM_SLP_S4_L
1 C7720 NC 10 NC2 2 402
CERM
603
1uF
10% THRML
6.3V
2 CERM GND PAD
11
402 <Rb>
1
R7721
3.65K
1%
1/16W
MF-LF
2 402
Vout = 0.5V * (1 + Ra / Rb)
2.5V/1.2V Regulator
A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 60 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
1.8V POWER SUPPLY

MEM_ISENSE_VCC 1 2 =PP3V3_S3_PDCISENS 64B3
1
C7804 R7861
=PPVIN_S5_1V8S3 0.1UF 100
64C1
10% 5% Placement Note:
1/16W
=PP1V8_S3_MEM_NB_SENSE 1 2 =PP1V8_S3_MEM_NB 16V MF-LF
64C3 X5R 2 PLACE C7804 NEAR U7801 PIN 7
CRITICAL 402
402
1 1 C7831 MEM_ISENSE_R1_N
64A3 =PP5V_S5_1V8S3 C7830 1uF R7802

0.005 1 2 7
33UF 10%
16V 1% R7860 V+ 4
20% X5R 1/4W 1
R1- PLACE RC CLOSE TO SMC
1V8S3_VCC 1 2 2 16V
POLY
2 603
MF-LF
1206
2.0K V- MEM_ISENSE SMC_MEM_ISENSE
1% 6 1 2 45A8 46B3
NO STUFF
C 1
R7804 1 C7801
1 C7802
NO STUFF 1
R7807
C7800
2.2UF
CASED2E-SM
5 6 7 8
2
1/10W
MF-LF
603
8 R1+
3
R2 CRITICAL
U7801 R7803 1
C7805
C
2.2UF 20% + 4.53K 0.22UF
0 1uF 20% 0 6.3V
MEM_ISENSE_R1_P 5 INA326EA-250 1%
5% 10% 6.3V 5%
1/16W
2 CERM1 CRITICAL MSOP 1/16W
MF-LF
20%
6.3V
1/16W 2 2
MF-LF
402
2 16V
X5R
CERM1
603 MF-LF
402
603
Q7820 MEM_ISENSE_R2 402 X5R
402
2 603 12 2 MIN_LINE_WIDTH=0.6 mm IRF7821PBF
MIN_NECK_WIDTH=0.25 mm 4 1 GND_SMC_AVSS
PVCC VCC SO-8 R7863 1
C7864
45C2 45C4 46B6 48A1 48B5 48C1 62A5
66B1 66C2
GND_1V8S3_SGND
100K 0.001UF
61B5 1%
CRITICAL 1 2 1V8S3_BOOT_RC 1 2 1/16W 10%
1 2 3 MF-LF 50V
1 VIN
U7800 R7800 2 402
2 CERM
ISL6269 UG 14 1V8S3_UG 2.2 C7809 402
7 FSET
QFN 5% 0.1uF
5D7 1V8S3_FSET 1/16W NC
MF-LF
402
10%
16V 8A MAX CURRENT
3
X5R
63D6 60C8 45C5 23C3 PM_SLP_S4_L 4 EN BOOT 13 1V8S3_BOOT
402 VOLTAGE=1.8V
=PP1V8_S3_REG
1
1V8S3_FCCM 3 FCCM PHASE 15 1V8S3_PHASE MIN_NECK_WIDTH=0.25 mm MIN_NECK_WIDTH=0.4 mm 64C6
NC 16 PGOOD ISEN 9 1V8S3_ISEN 1 2

NO STUFF
5 COMP CRITICAL 1
5D7 1V8S3_COMP
MIN_LINE_WIDTH=0.6 mm R7810 L7820 R7801
LG 11 1V8S3_LG MIN_NECK_WIDTH=0.25 mm 2.49K 1.53uH CRITICAL 0
1 1 1V8S3_FB 6 FB
1%
C7843 1 5% <Ra>
R7805 R7808 PGND 10
1/16W
MF-LF
SM 1/16W
MF-LF 1
R7821
0 100K 402 330uF 2 402
5% 1% 8 VO 20%
2.5V-ESR9V
4.02K
1/16W 1/16W THRML 2 1%
MF-LF MF-LF CRITICAL CRITICAL POLY PP1V8_S3_R 1/16W
PAD CRITICAL CASE-D2E-LF
2 402 2 402 17 5 6 7 8 2 MF-LF
402
D7820 1 C7840 C7841 NO STUFF2
1
B340LBXF 22UF 22UF C7803
20% 20% CRITICAL
1V8S3_COMP_R SMB 2 6.3V 6.3V 0.0047uF
1 CERM-X5R CERM-X5R 10%
805 805 1 C7842 2 25V
1 2 NO STUFF 4 330UF CERM
402
1
C7810 CRITICAL
20%
2.5V-ESR9V
1 C7806 1
R7806 C7808 1 C7807 XW7800 0.001uF 2 POLY
B 0.01UF
10%
16V 1%
57.6K
1
0.0022UF
10%
50V
22PF
5%
50V
SM 10%
50V
CERM
2
Q7821
IRF7832PBF
1 2 3
CASE-D2E-LF
<Rb> B
2 CERM 1/16W CERM 2 CERM 402 SO-8 1
402 MF-LF
2 402
2 402 402 R7822
2.0K
1%
1/16W
MF-LF
2 402
61C6 GND_1V8S3_SGND
Vout = 0.6V * (1 + Ra / Rb)
TABLE_ALT_HEAD

PART NUMBER
TABLE_ALT_ITEM
128S0093 128S0092 ? C7830 KEMET T520V336M016ATE0457650
TABLE_ALT_HEAD

PART NUMBER
TABLE_ALT_ITEM
128S0094 128S0060 ? C7842,C7843 PANASONIC EEFSX0D331ER

TABLE_ALT_ITEM
128S0095 128S0060 ? C7842,C7843 PANASONIC EEFSX0D331XE
1.8V Supply
SYNC_MASTER=POWER SYNC_DATE=07/13/2005
A
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 61 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
1.5V/1.05V POWER SUPPLY
64C1 =PPVIN_S5_1V51V05S0
CRITICAL CRITICAL 2 1
1 1 C7941 1 C7981 1
C7940 1uF 1uF C7980
2 1 33UF 10% 10% 33UF
2
20%
16V
16V
X5R
16V
X5R
2
20%
16V
R7961 C7908
R7921 C7909 POLY
2 603 2 603 POLY 523 0.22UF
CASED2E-SM CASED2E-SM 1% 10%
1.07K 1/16W 6.3V
1% 0.22uF MF-LF CERM-X5R
1/16W 10% 402 402
MF-LF 6.3V
402 CERM-X5R
402 1
1V05S0_SNS_N 1 2
1 2 1V5S0_SNS_N R7900 MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm 1%
1/16W
1 2 1V5S0_SNS_P MF-LF
402
1V05S0_SNS_P 2 1
MIN_NECK_WIDTH=0.25 mm MIN_LINE_WIDTH=0.6 mm
R7929 MIN_NECK_WIDTH=0.25 mm
C7932
4.53K
1% 0.22UF
1/16W 62C3 62A2 PP5V_S5_1V51V05S0_INTVCC PP5V_S5_1V51V05S0_INTVCC 62A2 62C6
10%
6.3V
MF-LF PPVIN_S5_1V51V05S0_R CERM-X5R
402 VOLTAGE=12V
CRITICAL MIN_LINE_WIDTH=0.6 mm CRITICAL 402
2 1 1
1 D7924 MIN_NECK_WIDTH=0.25 mm D7964 1 2
C C7931
1
R7926
1.43K
CMDSH-3
SOD-323
2
CMDSH-3
SOD-323 R7966 1 R7969
2.1K
C
0.22uF 1% 2 698 1%
10% 1/16W 1V05S0_BOOST_RC 1% 1/16W
6.3V
CERM-X5R MF-LF
402
8 7 6 5 1V5S0_BOOST_RC
1
R7930 1 C7900 1
R7970 2 1
MIN_LINE_WIDTH=0.6 mm 5 6 7 8
1/16W
MF-LF
MF-LF
402
402 2 MIN_NECK_WIDTH=0.25 mm 2 1 1M 1uF 1M MIN_NECK_WIDTH=0.25 mm 402 2
5% 10% 5%
1 R7924 1/16W
MF-LF
2 16V
X5R 1/16W
MF-LF
C7962 R7964 1
0 603 0.001uF 0
C7922 2 402 2 402
23
5% 10% 5%
4 1/16W 0.001uF 50V 1/16W MIN_LINE_WIDTH=0.6 mm
MF-LF 10% CERM MF-LF MIN_NECK_WIDTH=0.25 mm 4
MIN_LINE_WIDTH=0.6 mm 402 50V 402 402
2 CERM VIN 2
3 2 1 1 C7924 402
26
C7964 1 CRITICAL
CRITICAL 1V5S0_TG TG2 14 1V05S0_TG 0.1uF
6A MAX CURRENT Q7920
0.1uF
10%
TG1 10%
16V
1 2 3
Q7960
8A MAX CURRENT
3
XW7920 IRF7821PBF 2 16V
X5R 1V5S0_BOOST 24 BOOST1
BOOST2
17 1V05S0_BOOST X5R 2 IRF7821PBF
OPEN-SAWTOOTH 402 MIN_LINE_WIDTH=0.6 mm CRITICAL MIN_LINE_WIDTH=0.6 mm 402 SO-8
SO-8 MIN_NECK_WIDTH=0.25 mm MIN_NECK_WIDTH=0.25 mm
=PP1V5_S0_REG 1 2 =PP1V05_S0_REG
2
64C8
1 2 1V5S0_SW 25 SW1
U7900 SW2
15 1V05S0_SW 5B2
64D8
MIN_LINE_WIDTH=0.6 mm MIN_LINE_WIDTH=0.6 mm VOLTAGE=1.05V
JUMPER CRITICAL
VOLTAGE=1.5V MIN_NECK_WIDTH=0.25 mm
1V5S0_BG 22 LTC3728LXC BG2 18 1V05S0_BG MIN_NECK_WIDTH=0.25 mm
CRITICAL CRITICAL MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm L7920 8 7 6 5 BG1 QFN MIN_LINE_WIDTH=0.6 mm
L7960 MIN_NECK_WIDTH=0.25 mm
PP1V5_S0_REG_P 2.8UH CRITICAL
MIN_NECK_WIDTH=0.25 mm NC 3 PLLIN PLLFLTR 2 1V51V05S0_FSEL MIN_NECK_WIDTH=0.25 mm 5 6 7 8 Q7961 CRITICAL
SM
62A2
IRF7832PBF 1.53uH 1
C7992
CRITICAL
CRITICAL
D104C/2.8uH
Q7921 NO STUFF 30 SENSE1+ 12 SO-8 SM
PCI-1050 330UF
1 C7950 1 DCR=10.7 mOhm IRF7832PBF C7921 SENSE2+ DCR=6.3 mOHM 20%
C7952 22UF SO-8 4 0.001uF 31 SENSE1-
SENSE2-
11 CRITICAL2 2 2.5V-ESR9V
POLY
330UF
20%
20%
6.3V 2 2 CRITICAL
10%
50V 1V5S0_VOSNS 1 VOSENSE1 9 1V05S0_VOSNS
4 D7961 CASE-D2E-LF
2.5V-ESR9V 2 CERM-X5R 1 CERM VOSENSE2 NO STUFF B240-X-F
POLY
CASE-D2E-LF
805 <Rc> D7921 402
1V5S0_ITH 5 ITH2 8 1V05S0_ITH C7961 1 SMB
1
R7927 1 C7929 B240-X-F
SMB
3 2 1 ITH1 0.001uF 1 2 3
1
180PF 1 2 10% C7969 1
1%
17.8K 5%
63B7 5D7 1V5S0_RUNSS 28 RUN_SS1 63B7 13
RUN_SS2 1V05S0_RUNSS 50V
CERM
2 1
0.0022UF
<Ra>
50V 1
1/16W
MF-LF
2 CERM
402
1 C7926 1
C7925 3_3VOUT 7 NC C7965 402 10%
50V R7967
2 402 47pF 1V51V05S0_FCB 4 FCB 330PF 2 CERM 6.34K
470pF 62A3 10% 402
5% 10% PGOOD 27 2 50V 2 1%
B 2
50V
CERM
402
2 50V
CERM
402 21 EXTVCC INTVCC 20 1 C7989
CERM
402
1/16W
MF-LF
402 =PP3V3_S0_1V51V05S0 64A6
B
<Rd> 220PF 1V05S0_ITH_RC
1 NO STUFF 1V5S0_ITH_RC NC1 10 NC 5%
R7928 1 25V
THRML_PAD
2
20.0K C7928 NC2 16 NC CERM
402 1 <Rb>
1% 0.001UF 1
R7925 1
C7930 NC3 29 NC R7965 1 C7966 1 NO STUFF 1
R7968 1
1/16W 2 10%
50V C7970 1 33.2K 47PF C7968 R7901
SGND
PGND
MF-LF 24.3K 0.1uF NC4 32 NC 1% 20.0K
2 402 CERM 1% 10% 1/16W 5% 0.001uF 1% 10K
402 1/16W 2 16V 0.1uF MF-LF 2 50V 2 10% 1/16W 5%
10% CERM 50V 1/16W
MF-LF X5R 16V 2 2 402 402 CERM MF-LF MF-LF
33
19
VOLTAGE=0V 402 402
X5R 402 2 402
402 2 402
GND_1V51V05S0_SGND
Vout = 0.8V * (1 + Rc / Rd) Vout = 0.8V * (1 + Ra / Rb) 1V51V05S0_PGOOD
1 2 58C7 63C2
=PP5V_1V51V05S0_VCC
64D3
C7905 XW7900
1 1uF
SM PP5V_S5_1V51V05S0_INTVCC 62C3 62C6
10% VOLTAGE=5V
6.3V 1V51V05S0_SKIP MIN_LINE_WIDTH=0.6 mm
=PP1V05_S0_CPU_NB CERM
1 C7902 1 C7901
1 1 R7903 MIN_NECK_WIDTH=0.25 mm
64D6 =PP1V05_S0_CPU_NB_SENSE 1 2 64D8 NB_ISENSE_VCC 1 2 =PP3V3_S0_PDCISENS 64A6 66C4
2
402
1uF 4.7UF
R7906 30.1K
1%
10% 20% 0 1/16W
5%
R7902 1 C7990 1 C7991 C7903 1
R7990 2 6.3V
CERM 2 6.3V
CERM 1/16W MF-LF
402
0.002 22UF 22UF 0.1UF 100 402 603 2 MF-LF 2
1%
1/4W 20% 20% 10%
5%
1/16W
402 1V51V05S0_FCB 62B5
1V51V05S0_FSEL 62B4
MF-LF 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R
16V
X5R 2 MF-LF
1206
805 805 402
402 1V51V05S0_CONT 1
CRITICAL Placement Note: 1
R7907 1 C7907 R7904 1 C7904
CRITICAL 0.01uF 5.62K 0.01uF
2 7 PLACE C7903 NEAR U7901 PIN 7 0 10% 1% 10%
5% 1/16W
V+ 4 1/16W 2 16V
CERM MF-LF 2 16V
CERM
NB_ISENSE_R1_N 1 PLACE RC CLOSE TO SMC MF-LF 402
R1-
V- 6 NB_ISENSE 1 2 SMC_NB_ISENSE 45B8 46B3
2 402 402 2 402 1.5V / 1.05V Power Supply
1
R7992 8 R1+ CRITICAL SYNC_MASTER=POWER SYNC_DATE=07/13/2005
A 2.0K
1%
1/10W
3
+
R2
U7901 R7905
4.53K
1
C7906
0.22UF NOTICE OF PROPRIETARY PROPERTY
A
MF-LF
5 INA326EA-250 1%
1/16W 20% TABLE_ALT_HEAD
MSOP MF-LF 6.3V

2 603 402 2 X5R PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:
NB_ISENSE_R2 PART NUMBER THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
402
NB_ISENSE_R1_P TABLE_ALT_ITEM

1 GND_SMC_AVSS
R7991 1
C7999
45C2 45C4 46B6 48A1 48B5
48C1 61C1 66B1 66C2
100K 0.001UF
1% II NOT TO REPRODUCE OR COPY IT
1/16W 10%
MF-LF 50V TABLE_ALT_HEAD

2 CERM
2 402 402
PART NUMBER
TABLE_ALT_ITEM
128S0094 128S0060 ? C7952,C7992 PANASONIC EEFSX0D331ER
TABLE_ALT_ITEM
APPLE COMPUTER INC.

D 051-7374 A
128S0095 128S0060 ? C7952,C7992 PANASONIC EEFSX0D331XE

SCALE SHT OF
NONE 62 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
=PP5V_S3_FET 64B6
POWER CONTROL SIGNALS =PP5V_S5_P5VS3 4

6
5 3.425V "G3Hot" SUPPLY
64A3
These rails are monitored by LTC2908 2
CRITICAL
Q8000
1 5V S3 FET Supply needs to guarantee 3.31V delivered to SMC VRef generator
State SMC_PM_G2_ENABLE PM_SLP_S4_L PM_SLP_S3_L FDC638P MOSFET FDC638P
SM-LF
3 C8000
Run 0.0022uF CHANNEL P-TYPE =PPVIN_G3H_P3V42G3H P3V42G3H5_BOOST
(S0)
1 1 1 10%
64B1
MAKE_BASE=TRUE 50V RDS(ON) 48 mOhm @4.5V

CERM 1
Sleep
1 1 0 =PP5V_S5_PWRCTL PM_SLP_S4_LS5V =P5VS3_EN_L P5VS3_EN_L_RC
402 3 6 C8091
D (S3)
63A7
64A3
1 2 1 2 1 2 LOADING 100 mA VIN
CRITICAL
BOOST 0.22uF
10% 2
L8090
33uH
D
Soft-Off
R8032 R8000 U8090 6.3V
CERM-X5R CDPH4D19F-SM
1 0 0 100K 10K 402
(S5) 5% 5% CRITICAL LT3470
1/16W 1/16W
MF-LF 3 MF-LF Q8010
FDC638P =PP3V3_S3_FET 64B6
1 SHDN* TSOT23-8 SW 5 PP3V42G3H_SW 1 2 =PP3V42_G3H_REG 64D3
Battery Off 402 402 BIAS 7

(G3Hot)
0 0 0 D SM-LF
NC 2 NC
<Ra>
6 1
5 5 FB 8 C8092 1 R8091
61B8 60C8 45C5 23C3 PM_SLP_S4_L G S
4 22pF 348K
=PP3V3_S5_P3V3S3 1% CRITICAL
R8033
100K
1
Q8031
2N7002DW-X-F
4
64A3
2
1 3.3V S3 FET GND
4
5%
50V
CERM
402
2
1/16W
MF-LF
2 402
1 C8093
5% SOT-363 MOSFET FDC638P 5D7 P3V42G3H_FB 22UF
1/16W CRITICAL <Rb> 20%
6.3V
5V/3.3V S5 RUN/SS CONTROL MF-LF
402 2 R8010
100K
3 C8010
0.01UF
CHANNEL P-TYPE 1 C8090
1
R8092
2 CERM-X5R
805
5% 10% 10UF 200K
5VS5_RUNSS 5D7 1/16W 16V RDS(ON) 65 mOhm @2.5V 10% 1%
59B4
MF-LF CERM 25V 1/16W
402 402 2 X5R MF-LF
3 =P3V3S3_EN_L 1 2 P3V3S3_EN_L_RC 1 2 LOADING 1 A 1206-1 2 402
D Q8059 CRITICAL
2N7002DW-X-F
=PP3V42_G3H_PWRCTL1 2 SMC_PM_G2_EN_L
5 G S
SOT-363 Q8005 Vout = 1.25V * (1 + Ra / Rb)
64D1 63B8
STL8NH3LL =PP5V_S0_FET 64D6
PWRFLT-3P3X3P3
R8057 4
OMIT
470K 3
5%
1/16W 64A3 =PP5V_S5_P5VS0 5 2
MF-LF
402
3 3V3S5_RUNSS 59B5
1
5V S0 FET
D
Q8060 6
4
MOSFET STL8NH3LL
2N7002 C8005
SMC_PM_G2_EN 1 SOT23-LF R8005 0.1UF
C
45D5
IN
1
G S D
Q8059
2N7002DW-X-F
10K
5%
1/16W
10%
25V
CHANNEL N-TYPE
C
R8056 2 2 SOT-363 MF-LF X5R RDS(ON) 15 mOhm @10V
5%
100K
1/16W
G S
1
=P5VS0_EN 1
402
2 P5VS0_EN_RC
402
1 2 LOADING 3 A ALL SYSTEM PWRGD CIRCUIT
MF-LF
2 402 CRITICAL
Q8015 62A1 58C7 1V51V05S0_PGOOD
STL8NH3LL
OMIT
PWRFLT-3P3X3P3 =PP3V3_S0_FET 64B8
1.5V/1.05V S0 RUN/SS CONTROL 64A3 =PP3V3_S5_P3V3S0 5 2
1V5S0_RUNSS 5D7 62B5

1
3.3V S0 FET
3 4 MOSFET STL8NH3LL
D
Q8061 R8015 C8015 CHANNEL N-TYPE C8060
2N7002DW-X-F
SOT-363 100K 0.1UF 1
0.1UF
1 C8061
64D1 63C8
=PP3V42_G3H_PWRCTL 1 2 48C8 PM_SLP_S3 5 G S 5%
1/16W
10% RDS(ON) 15 mOhm @10V 20% 5 4 0.1UF
25V 10V 20%
MF-LF X5R 2 CERM V1 V2 2 10V =PP3V3_S0_ALLSYSPG
R8059 4 =P3V3S0_EN 1
402
2 P3V3S0_EN_RC
402
1 2 LOADING 2 A 402 CRITICAL CERM
402
64A6
470K U8070
5%
1/16W 64B8 60C2 =PP2V5_S0_REG 7 V3 LTC2908 5
MF-LF LLP 1
402
Q8063 3 V4 4 ALL_SYS_PWRGD
3 1V05S0_RUNSS 62B4 2N7002 S0PWRGD_OK 5B2 26A5
45D8
SOT23-LF 3 RST* 2 2
D Q8062 64C6 60B2 =PP1V2_S3_REG 2 PP1V2_S0 6 VADJ1
D S
C8062 U8080
2N7002 6 1 3
SOT23-LF R8031 8 VADJ2 R8065 1 MC74VHC1G08
45C5 23C3
63A7 IN
PM_SLP_S3_L 1 G S D
Q8061
2N7002DW-X-F
100K
5%
G
1.2V S0 FET GND
THRML
PAD
549K
1%
1/16W
0.1UF
20%
SC70
1
R8058 2 SOT-363 1/16W 1 1 9 MF-LF 2 10V
CERM
B 5%
100K
2 G S
64C1 59D8
=PPVIN_S5_5V3V3S5 1
MF-LF
402
2
MAKE_BASE=TRUE
PM_SLP_S3_LS12V6_L =P1V2S0_EN MOSFET 2N7002 2 402 402 B
1/16W 1
MF-LF CHANNEL N-TYPE
2 402 1
R8030 RDS(ON) 13.5 Ohm
100K
5%
1/16W 6 LOADING Nothing S0PWRGD_0V9_DIV
MF-LF CRITICAL
2 402 D
Q8025 64D8 31B3 =PP0V9_S0_MEM_REG 1 2 1 2
2 G
SI3447BDV
PM_SLP_S3_LS12V6
S SOT-6
=PP1V8_S0_FET 64B8 R8061 R8062
Q8030 1 68.1K 100K
1%
2N7002DW-X-F 6 1%
1/16W 1/16W
SOT-363 MF-LF
5 MF-LF 402
3 64C3 =PP1V8_S3_P1V8S0 4 402
2
D
Q8030
2N7002DW-X-F
SOT-363
1 1.8V S0 FET S0PWRGD_1V2_DIV
63B8 63A7 45C5 23C3 PM_SLP_S3_L 5 G S 1 2 1 2

3 MOSFET SI3447BDV
4 C8025 R8063 R8064
CHANNEL P-TYPE 124K 100K
0.01UF 1% 1%
1/16W
10% RDS(ON) 72 mOhm @1.8V 1/16W MF-LF
16V MF-LF 402
MAKE_BASE=TRUE CERM 402
402 LOADING 320 mA
64A3 63D6
=PP5V_S5_PWRCTL 1 2 PM_SLP_S3_LS5V =P1V8S0_EN_L 1 2 P1V8S0_EN_L_RC 1 2
R8050 R8025
100K 100K
5% 5%
1/16W
MF-LF
402
6
1/16W
MF-LF
402
TABLE_5_HEAD
TABLE_5_ITEM
S3/S0 FETS, G3H SUPPLY
D
A 376S0445 2 FAIRCHILD FDM6296 Q8005,Q8015 FET_FDN6296 SYNC_MASTER=ENET

A
63B8 63A7 45C5 23C3 PM_SLP_S3_L 2 G S
Q8031 1
TABLE_ALT_HEAD

2N7002DW-X-F PART NUMBER
SOT-363 TABLE_ALT_ITEM
376S0448 376S0445 ? Q8005,Q8015 VISHAY SI7806ADN II NOT TO REPRODUCE OR COPY IT
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 63 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
"S0" RAILS ONLY ON IN RUN
PPVCORE_CPU_S0 5B2
MAKE_BASE=TRUE
(REGULATOR OUTPUT CPU VCORE PWR) MIN_LINE_WIDTH=0.5MM
58D1 =PPVOUT_S0_IMVP6_REG VOLTAGE=0.9V
(CPU VCORE PWR) =PPVCORE_S0_CPU 8B5 8D7 9B8 48A5 48B3
PP5V_S0 5A2
MAKE_BASE=TRUE
(COME FROM S5 TO S0 MOSFET) MIN_LINE_WIDTH=0.30 MM
PP0V9_S0 MIN_NECK_WIDTH=0.20 MM
(LDO OUTPUT 0.9V PWR)
MAKE_BASE=TRUE
5A2
63C3 =PP5V_S0_FET VOLTAGE=5V G3 HOT
MIN_NECK_WIDTH=0.4MM =PP5V_S0_SB 25D8
63B2 31B3 =PP0V9_S0_MEM_REG VOLTAGE=0.9V
(SATA 5V PWR) =PP5V_S0_SATA 35C6
(DDR2 TERMINATION 0.9V PWR) =PP0V9_S0_MEM_TERM 30D4
(DDR2 TERMINATION) =PP5V_S0_MEMVTT 31C6 PP3V42_G3H 5A2
MAKE_BASE=TRUE
PP1V05_S0 5B2 (AUDIO 5V PWR) =PP5V_S0_AUDIO 54A6 55C8 MIN_LINE_WIDTH=0.2MM
D (REGULATOR OUTPUT 1.05V PWR)
MAKE_BASE=TRUE
(AUDIO SPEAKER 5V PWR) =PP5V_S0_AUDIO_PWR 55B8 55D8 63D1 =PP3V42_G3H_REG MIN_NECK_WIDTH=0.2MM
VOLTAGE=3.425V D
62B1 5B2 =PP1V05_S0_REG VOLTAGE=1.05V (LPC DEBUG BOARD 5V PWR) =PP5V_S0_LPCPLUS 5D2 47C6 =PP3V42_G3H_SMCVREF 46C8
(ICH CPU I/O 1.05V PWR) =PP1V05_S0_SB_CPU_IO 21C1 24C3 25C4 (MCH TV 3.3V LDO) =PP5V_S0_NB_TVDAC 19C4 19C7 =PP3V42_G3H_SMBUS_SMC_BSA 27C3
(ICH VCORE 1.05V PWR) =PPVCORE_S0_SB 24D3 25D3 (ISL6262 VDD) =PP5V_S0_IMVP6 58D8 =PP3V42_G3H_PWRCTL 63B8 63C8
=PP1V05_S0_CPU_NB_SENSE 62A8 (LTC3728LXC EXTVCC) =PP5V_1V51V05S0_VCC 62A8 =PP3V42_G3H_LIDSWITCH 65A8
(TMDS 5V PWR) =PP5V_S0_TMDS 68B7 69C6 (LPC DEBUG BOARD) =PP3V42_G3H_LPCPLUS 5D2 47C6
PP1V05_S0_CPU_NB
MAKE_BASE=TRUE =PP5V_S0_FAN_RT 5D2 51C4 =PP3V42_G3H_SB_RTC 26D6
62A6 =PP1V05_S0_CPU_NB MIN_NECK_WIDTH=0.4MM =PP5V_S0_LCD 67D7 =PP3V42_G3H_ACIN 65C4 65C8 66A5
VOLTAGE=1.05V
=PP5V_S0_ISENSECAL 48A8 (SMC 32.768KHz OSC) =PP3V42_G3H_SMC_CLK 46A8
(MCH CORE 1.05V PWR) =PPVCORE_S0_NB 16C8 16D3 19C8 19D7
(SMC 3.3V PWR) =PP3V42_G3H_SMC 45D2 45D3 46D1 46D5
(CPU FSB 1.05V PWR) =PP1V05_S0_CPU 7B5 7B6 7D5 8C7 9C8 11B3 11C5
"S3" RAILS 46D8 48C8
(MCH FSB 1.05V PWR) =PP1V05_S0_FSB_NB 12A7 12B7 12C2 19D7 33B8 33C7 33C8 ON IN RUN AND SLEEP
=PP1V05_S0_NB_VTT 17D3 19B5 19D7
PP1V2_S3 5A2
(MCH FSB 1.05V PWR) =PP1V05_S0_NB 19D1 19D7 MAKE_BASE=TRUE
(LDO OUTPUT 1.2V PWR) MIN_LINE_WIDTH=0.6MM
PP1V5_S0
MAKE_BASE=TRUE
5B2 63B5 60B2 =PP1V2_S3_REG VOLTAGE=1.2V PBUS HOT
(REGULATOR OUTPUT 1.5V PWR) MIN_LINE_WIDTH=0.6MM (ENET 1.2V PWR) =PP1V2_S3_ENET 36A8 36D7
62B8 =PP1V5_S0_REG VOLTAGE=1.5V
(CPU AVDD 1.5V PWR) =PP1V5_S0_CPU 8B7 9D8 PP1V8_S3 5A2
MAKE_BASE=TRUE
(MCH PCIE GRAPHICS O/P COMPENSATION 1.5V PWR) =PP1V5_S0_NB_PCIE 13D2 19D7 (REGULATOR OUTPUT 1.8V PWR) MIN_LINE_WIDTH=0.6MM PPBUSB_G3H 5A2
MIN_NECK_WIDTH=0.4MM MAKE_BASE=TRUE
(MCH DDR DLL&IO, FSB HSIO&IO PWR 1.5V) =PP1V5_S0_NB_VCCAUX 16D1 17B6 19B6 19D7 61B1 =PP1V8_S3_REG VOLTAGE=1.8V 66C2 =PPBUSA_G3H MIN_LINE_WIDTH=0.6MM
(MCH DIGITAL DIVIDER IN HMPLL 1.5V PWR) =PP1V5_S0_NB_VCCD_HMPLL 17C6 19D7 (INVERTER PBUS PWR) VOLTAGE=12.6V
(DDR2 DIMM 1.8V PWR) =PP1V8_S3_MEM 19C7 19C8 28B2 28D4 28D6 29B2 29D4 29D6
(MCH LVDS DIGITAL 1.5V PWR) =PP1V5_S0_NB_VCCD_LVDS 17C6 19B8 19D7 (ISL6262 VIN)
=PP1V8_S3_P1V8S0 63A5
(HOST/MEMORY PLL 1.5V PWR) =PP1V5_S0_NB_PLL 19C6 19D7 (LTC3728 VIN) =PPBUS_S5_INV 67D4
=PP1V8_S3_MEMVTT 31C6
=PP1V5_S0_NB 19C1 19D7
=PP1V8_S3_MEM_NB_SENSE 61C4 =PPVIN_S5_IMVP6 48C7 58C2 58D5 58D8
(MCH TVDAC DEDICATED/QUIET PWR 1.5V) =PP1V5_S0_NB_TVDAC 19A8 19D7
=PP1V8_S3_1V2S3 60B5
(MCH 3GIO[PCIE/DMI] 1.5V PWR) =PP1V5_S0_NB_3G 19B5 =PPVIN_S5_1V51V05S0 62D8
=PP1V5_S0_NB_3GPLL
C (MCH 3GIO PLL
(ICH LOGIC&IO[ARX]
1.5V PWR)
1.5V PWR) =PP1V5_S0_SB_VCC1_5_A_ARX
19A5
24B5 25D6 66C2 =PPBUSB_G3H C

(ICH SATA PLL 1.5V PWR) =PP1V5_S0_SB_VCCSATAPLL 24B5 25D6 61C2 29D2 28D2 19D7 16B6 14C2 =PP1V8_S3_MEM_NB PP1V8_S3_MEM_NB (LTC3728 VIN) =PPVIN_S5_5V3V3S5 59D8 63B7
MAKE_BASE=TRUE
(ICH LOGIC&IO[ATX] 1.5V PWR) =PP1V5_S0_SB_VCC1_5_A_ATX 24A5 25C6 (MCH DDR2 1.8V PWR) MIN_LINE_WIDTH=0.6MM (ISL6269 VIN) =PPVIN_S5_1V8S3 61C7
(ICH USB PLL 1.5V PWR) =PP1V5_S0_SB_VCCUSBPLL 24A5 25B6 VOLTAGE=1.8V (FIREWIRE PORT PBUS PWR) =PPBUS_S5_FWPWRSW 39D6
(ICH USB CORE 1.5V PWR) =PP1V5_S0_SB_VCC1_5_A_USB_CORE 24A3 25B2 (YUKON POWER CONTROL) =PPBUS_S5_YUKON_CTRL 60C8
(ICH LOGIC&IO 1.5V PWR) =PP1V5_S0_SB_VCC1_5_A 24A3 25C2
=PP1V5_S0_SB 25A8 25C8 PP2V5_S3 5A2

MAKE_BASE=TRUE PP18V5_G3H 5A2
(WIRELESS CARD 1.5V PWR) =PP1V5_S0_AIRPORT 43D3 (REGULATOR OUTPUT 2.5V PWR) MIN_LINE_WIDTH=0.5 mm MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25 mm MIN_LINE_WIDTH=0.6 MM
60C2 =PP2V5_S3_REG VOLTAGE=2.5V MIN_NECK_WIDTH=0.20 MM
PP1V8_S0 5B2 65D1 =PP18V5_G3H_INRUSH VOLTAGE=18.5V
MAKE_BASE=TRUE (ENET 2.5V PWR) =PP2V5_S3_ENET 36D3
(COME FROM S3 TO S0 MOSFET) MIN_LINE_WIDTH=0.6MM (DC-IN OUTPUT 18.5V PWR) =PP18V5_G3H_CHGR 66D8
63B3 =PP1V8_S0_FET VOLTAGE=1.8V (COME FROM S5 TO S3 MOSFET) PP3V3_S3 5A2 (CHARGER INPUT 18.5V PWR)
MAKE_BASE=TRUE
(DDR2 TERMINATION REGULATOR 1.8V SWITCH PWR) 63D3 =PP3V3_S3_FET MIN_LINE_WIDTH=0.2 MM (SMC INPUT 18.5V PWR)
(TMDS 1.8V PWR) =PP1V8_S0_TMDS 68D6 VOLTAGE=3.3V
=PP3V3_S3_SMBUS_SMC_RMT 27D3
PP2V5_S0 5B2 (ETHERNET 3.3V PWR) =PP3V3_S3_ENET 36A5 36B4 36B5 36C8 36D6 36D8
MAKE_BASE=TRUE
(COME FROM S3 TO S0 MOSFET) MIN_LINE_WIDTH=0.5 mm (BLUETOOTH 3.3V PWR) =PP3V3_S3_BT 44C6
63B3 60C2 =PP2V5_S0_REG VOLTAGE=2.5V (ACCELEROMETER 3.3V PWR) =PP3V3_S3_SMS 46D5 52C7
(MCH H/V SYNC 2.5V PWR) =PP2V5_S0_NB_VCCSYNC 17D6 19B6 19D7 (TPM 3.3V SUSPEND PWR) =PP3V3_S3_TPM 46D5 53C2
(MCH LVDS DATA/CLK TX 2.5V PWR) =PP2V5_S0_NB_VCC_TXLVDS 17D6 19B8 19D7 (TPS62050 VIN) =PP3V3_S3_2V5S3 60C4 60D6 DCIN G3HOT
(MCH PCIE/DMI BAND GAP 2.5V PWR) =PP2V5_S0_NB_VCCA_3GBG 17D6 19B7 19D7 (FIREWIRE CHIP PCI SIGNAL INDICATOR) =PP3V3_S3_PCI 38C5
(MCH LVDS ANALOG 2.5V PWR) =PP2V5_S0_NB_VCCA_LVDS 17C6 19C7 19D1 =PP3V3_S3_RSTGATE 26B3
(MCH CRTDAC ANALOG 2.5V PWR) =PP2V5_S0_NB_CRTDAC 19D4 19D7 =PP3V3_S3_AIRPORT_AUX 43C3 PPDCIN_G3H
MAKE_BASE=TRUE
(TMDS 2.5V PWR) =PP2V5_S0_TMDS 68B7 =PP3V3_S3_FW 38D5 MIN_LINE_WIDTH=0.6MM
=PP2V5_S0_NB_DISP_PLL 19D6 =PP3V3_S3_PDCISENS 61C1 65D3 =PPDCIN_G3H VOLTAGE=18.5V
PP5V_S3 5A2 66B2 =PPVBATT_G3H
MAKE_BASE=TRUE
B (COME FROM S5 TO S0 MOSFET)
PP3V3_S0
MAKE_BASE=TRUE
5A2
63D3
(COME FROM S5 TO S3 MOSFET)
=PP5V_S3_FET
VOLTAGE=5V
=PPVIN_G3H_P3V42G3H 63D3
B
63C3 =PP3V3_S0_FET VOLTAGE=3.3V (ISL6269 PVCC)
(MCH HV BUFFER 3.3V PWR) =PP3V3_S0_NB_VCC_HV (SYSTEM LED PWR) =PP5V_S3_SYSLED
=PP3V3_S0_SB
17C6 19B7 19C7
22B5 25D8 34C8 (USB IO PORT 5V PWR) =PP5V_S3_CAMERA

35B6 46B4
67A5
GND RAILS
(ICH GPIO PULLS 3.3V PWR) =PP3V3_S0_SB_GPIO (USB IR CONTROLLER 5V PWR) =PP5V_S3_IR
(ICH IO BUFFER 3.3V PWR) =PP3V3_S0_SB_VCC3_3
21C3 21D3 23B2 23D5
24B5 25B8 25C6 =PP5V_S3_GEYSER

41D6
40D6
XW8101
SM
(ICH PCI I/O 3.3V PWR) =PP3V3_S0_SB_VCC3_3_PCI 24B3 25A4 57A6 57A5 56B5 56B3 55C8 55B8 55A8 54D2 54B6 54A6 =GND_AUDIO_CODEC 5D1 GND_AUDIO_CODEC 1 2
57D8 57C8 57C5 57C3 57B8 57B5 57B3 MAKE_BASE=TRUE
(ICH IDE I/O 3.3V PWR) =PP3V3_S0_SB_VCC3_3_IDE 24C3 25B4 "S5" RAILS XW8102
(ICH PCI PULLS 3.3V PWR) =PP3V3_S0_SB_PCI 26D1 ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE) SM
(ICH PM PULLS 3.3V PWR) =PP3V3_S0_SB_PM 26B6 26B8 56C2 55D8 55D3 55C8 55C3 55B8 55B3 55A8 55A5 55A3 =GND_AUDIO_PWR 5D1 GND_AUDIO_PWR 1 2
MAKE_BASE=TRUE
(PATA PULLS 3.3V PWR) =PP3V3_S0_PATA 34C2
(SATA 3.3V PWR) =PP3V3_S0_SMC_LS 46D3 PP3V3_S5 5A2

MAKE_BASE=TRUE
(MCH PULLS 3.3V PWR) =PP3V3_S0_NB 14C7 14D6 19C7 20A4 20B4 (REGULATOR OUTPUT 3.3V PWR) MIN_LINE_WIDTH=0.6MM
(ICH LAN I/F 3.3V PWR, NEED TO CHECK INTEL) =PP3V3_S0_SB_VCCLAN3_3 24D3 25D3 59B8 =PP3V3_S5_REG VOLTAGE=3.3V
(ICH INTEL HDA CORE 3.3V PWR) =PP3V3_S0_SB_3V3_1V5_VCCHDA 24C3 25C4 =PP3V3_S5_SB 23A7 23B7 23D4 23D8 25C8
(DIMM SPD 3.3V PWR) =PPSPD_S0_MEM 28A7 29A3 29A7 (ICH USB CTL PULLS 3.3V PWR) =PP3V3_S5_SB_USB 22D8
(CLOCK GENERATOR 3.3V PWR) =PP3V3_S0_CK410 32C7 32D3 32D8 (ICH PM 3.3V PWR) =PP3V3_S5_SB_PM 11B5 23D1 26C5
(WIRELESS CARD 3.3V PWR) =PP3V3_S0_AIRPORT 43C3 (ICH SUSPEND 3.3V PWR) =PP3V3_S5_SB_VCCSUS3_3 24A5 24B3 25B6 25D2
(TPM 3.3V PWR) =PP3V3_S0_TPM 53D4 (ICH SUSPEND USB 3.3V PWR) =PP3V3_S5_SB_VCCSUS3_3_USB 24B3 25D2
(AUDIO 3.3V PWR) =PP3V3_S0_AUDIO 54A6 54D7 56D8 57B5 (ICH SUSPEND PULLS 3.3V PWR) =PP3V3_S5_SB_IO 22C6
(TMDS 3.3V PWR) =PP3V3_S0_TMDS 68B1 68B2 68C8 68D8 69B7 69D1 69D5 (ICH INTEL HDA SUSPEND 3.3V PWR) =PP3V3_S5_SB_3V3_1V5_VCCSUSHDA 24C3
(CPU THERMAL SENSOR 3.3V PWR) =PP3V3_S0_THRM_SNR 10C4 49B3 49D3 (SPI BOOTROM PWR) =PP3V3_S5_ROM 50D4
(ISL6262 3V3) =PP3V3_S0_IMVP6 58D8 =PP3V3_S5_P3V3S3 63D5
=PP3V3_S0_RSTBUF 26B4 =PP3V3_S5_P3V3S0 63C5 Power Conn / Alias

=PP3V3_S0_SMBUS_SB 27D8 =PP3V3_S5_FWLATEVG 39A8
A =PP3V3_S0_SMBUS_SMC_0
=PP3V3_S0_SMBUS_SMC_MLB
27D5
27C5
=PP3V3_S5_LCD 67C7
SYNC_MASTER=ENET

A
=PP3V3_S0_ALLSYSPG 63B1
PP5V_S5 5A2 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
=PP3V3_S0_FAN_RT 5D2 51C4 MAKE_BASE=TRUE PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
(REGULATOR OUTPUT 5 PWR) MIN_LINE_WIDTH=0.6MM AGREES TO THE FOLLOWING
=PP3V3_S0_LCD 67B5 67B7 67C6 MIN_NECK_WIDTH=0.3MM
59B1 =PP5V_S5_REG VOLTAGE=5V I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
=PP3V3_S0_PBATTISENS 66B3
=PP5V_S5_SB 25C8 II NOT TO REPRODUCE OR COPY IT
=PP3V3_S0_PDCISENS 62A5 66C4
=PP5V_S5_P5VS3 63D5 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
=PP3V3_S0_CPUPOWER 48C2
=PP5V_S5_PWRCTL 63A7 63D6
=PP3V3_S0_SMBUS_SMC_BSB 27B1 SIZE DRAWING NUMBER REV.
=PP5V_S5_P5VS0 63C5
=PP3V3_S0_1V51V05S0
=PP3V3_S0_2V5S0
62B1
60C4
=PP5V_S5_USB 42C8
APPLE COMPUTER INC.
D 051-7374 A
=PP5V_S5_PATA (PATA 5V PWR) 34D6
(FIREWIRE DIGITAL 3.3V PWR) =PP3V3_S0_FW 39C6 SCALE SHT OF
=PP5V_S5_1V8S3 61C7
=PP3V3_S0_ENET 36C8 NONE 64 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DC-JACK INTERFACE D
D 1 6 PPDCIN_G3H_R 1 2 =PPDCIN_G3H 64B3
D8201 R8205
BAS16TW-X-F 47
518S0287 SOT-363 5% CRITICAL
1/8W
CRITICAL Q8250
J8200
87438-0543
CRITICAL
F8200
6AMP-24V
MF-LF
805
INRUSH LIMITER SI4405DY-E3
SO-8
M-RT-SM VOLTAGE=18.5V
1206 MIN_LINE_WIDTH=0.6 MM =PP18V5_G3H_INRUSH
PP18V5_DCIN 8 64C3
1 1 2 MIN_NECK_WIDTH=0.20 MM 3 S3 D4
PP18V5_DCIN_F 7 VOLTAGE=18.5V
2
VOLTAGE=18.5V
2 S2 D3 MIN_LINE_WIDTH=0.6 MM
MIN_LINE_WIDTH=2 MM
3
MIN_NECK_WIDTH=0.20 MM 1 C8202 1 ONEWIRE_PWRCTL
ONEWIRE_ALWAYSON 1
S1
D2 6 MIN_NECK_WIDTH=0.20 MM
0.01uF ONEWIRE_PWRCTL R8204 D1 5

4 10% 1
2 25V
X7R
ONEWIRE_PWR_EN_L 1 2 100K R8202 GATE
5 0
D8200
SC-75
1
402
D
3
R8211
100K
5%
2 1/16W
MF-LF
402 1
2 5%
1/16W
MF-LF =PP3V42_G3H_ACIN
ACIN DETECTION 1
R8213
470K
1 C8217
0.22UF
4
NC 402 2 65C8 64D1

66A5
5% 20%
5% ONEWIRE_PWR_EN_L_DIV G S 1/16W 25V
ONEWIRE_PWRCTL MF-LF 2 X5R
6C8 =GND_DCIN_CHGND
3 CRITICAL SMC_BC_ACOK 5 G S
1/16W
MF-LF
Q8240
1 C8218 2 402 603
66A5 65C3 46B6 45C5 5C1 402 1 0.1UF
2 ADAPTER_SENSE Q8210 D TP0610
S0T23-3
1
R8206 R8208 10% 39C6 5C1 SMC_PS_ON
2N7002DW-X-F 4 3 102K 2 25V 46B3 45D5
102K 1% X5R
46D6 45B8 5C1

SYS_ONEWIRE
RCLAMP2402B
OVP
4 3
SOT-363 1%
1/16W
MF-LF
2 402
1/16W
MF-LF
2 402
402
CRITICAL
U8250 1
R8214
ACIN_ENABLE_L_DIV
S D MC74VHC1G08
ONEWIRE_PULLUP 1 2 U8200 1
5 SC70 330K
ACIN_1V20_REF 4 5%
R8299 G PP18V5_DCIN_ONEWIRE LMC7211 4 1/16W
V+ SM-LF MF-LF
2.0K 1 SMC_BC_ACOK 2 2 402
5% 5
1/16W Q8220
ACIN_ENABLE_GATE
1 1 1
MF-LF 2 2N7002DW-X-F R8232 R8201 R8233 ACIN_DIV 3 3
C 66A5 65C4 64D1
=PP3V42_G3H_ACIN 2
402
3 PP3V42_ONEWIRE SOT-363
1%
24.3K
1 1%
1K
5%
100K V-
5 ACIN_ENABLE_L C
ONEWIRE_PULLUP
S D
ONEWIRE_PULLUP
1/16W
MF-LF R8203 1/16W
MF-LF
1/16W
MF-LF R8210
1 Q8298 2 402 10K 1 C8230 2 402 2 402 1M
R8298 G 5%
1/16W 0.1UF 5%
1/16W
100K TP0610 ONEWIRE_EN MF-LF 10%
25V
5
1 ONEWIRE_DCIN_DIV 1
R8207 1
R8209 MF-LF
6
5% S0T23-3
1/16W 1 2 402 2 X5R
10.7K 57.6K 402 D
402 V+ 1 2
MF-LF ONEWIRE_OV 4 1% 1%
2 402 6 1 1/16W 1/16W
ONEWIRE_PU_EN_L ONEWIRE_PU_PROT 3 ONEWIRE_ESD R8231 MF-LF
2 402
MF-LF
2 402 ONEWIRE_PU_ACOK
5C1 2 G S Q8210
2N7002DW-X-F
R8296 D
CRITICAL V- 100K 1 SOT-363
3 0 U8290 2
5%
1/16W R8297 1
5% 1 2 MF-LF 0
ONEWIRE_PULLUP D 1/16W
MF-LF
R8200 1 C8203
S G LM397
SOT23-5
2 402 5%
1/16W
Q8299 402 100K 0.001UF MF-LF
2N7002 S G 1 1 2
5%
1/16W 20%
50V
1 Q8220
2N7002DW-X-F
2 402
SOT23-LF MF-LF 2 CERM TABLE_ALT_HEAD
SOT-363
2 2 402 402 PART NUMBER ALTERNATE FOR
PART NUMBER
BOM OPTION REF DES COMMENTS:
TABLE_ALT_ITEM
376S0466 376S0410 ? Q8250 VISHAY SI4413ADY

ONEWIRE_PU_EN
B
BATTERY INTERFACE B
L8209 2 1
600-OHM-300MA
0402 4 3 5D1 SMBUS_BATT_SCL_F
=PP3V42_G3H_LIDSWITCH 1 2
6 5 5D1 SMBUS_BATT_SDA_F L8202
64D1
8 7 SMC_BS_ALRT_L_F 120-OHM-0.3A-EMI
0402-LF
10 9 5D1 BATT_POS
12 11 5D1 BATT_NEG 1 2 =SMBUS_BATT_SCL 27C1
L8207 14 13
L8203
600-OHM-300MA 16 15
0402 120-OHM-0.3A-EMI
PP3V42_G3H_LIDSWITCH_F 18 17 1 C8211 1 C8205 1 C8209 1 C8215 1 C8206 0402-LF
1 2 GND_SMC_LID_F 20 19 0.001UF 0.001UF 0.001UF 47pF 47pF
10% 10% 10% 5% 5% 1 2 =SMBUS_BATT_SDA 27C1
2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM
SMC_LID_F
402 402 402 402 402 L8204
L8208 120-OHM-0.3A-EMI
0402-LF
600-OHM-300MA CRITICAL 65A6 6D8 =GND_BATT_CHGND
0402
J8250 1 2 SMC_BS_ALRT_L
46C6 45B5 40C4 5B2 SMC_LID 1 2 127216FA020
F-ST-SM1 DC-In & Battery Connectors
L8201 SYNC_MASTER=POWER SYNC_DATE=07/13/2005
A MLB TOP VIEW
FERR-50-OHM
SM-LF
A
1 C8220 1 C8221 1 2 BATT_POS_F
0.01uF 0.01uF PIN 1
66B2
10% 10% PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
2 16V
CERM 2 16V
CERM L8205 AGREES TO THE FOLLOWING
402 402 FERR-50-OHM I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
SM-LF
=GND_BATT_CHGND 6D8 65A6 II NOT TO REPRODUCE OR COPY IT
1 2 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
LID HALL EFFECT SENSOR SIZE DRAWING NUMBER REV.
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 65 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
PBUS SUPPLY / BATTERY CHARGER CRITICAL
D
Q8300
SI4405DY-E3
SO-8
=PP18V5_G3H_CHGR 8 MIN_LINE_WIDTH=0.6 MM
64C1
D4 S3 3 MIN_NECK_WIDTH=0.25 MM PPVDCIN_G3H_PRE
7
66B6 CHGR_VDD D3 S2 2
6
SMC_SYS_ISET 1 2
D2 1
45B5
5 D1 S1
NO STUFF
R8360 GATE
4.99K 1
R8361 1
C8327 1
R8303 3 4
3 1%
1UF C8313 Placement Note:
1/16W 3.32K 10%
4 100K VIN+ VIN-
D MF-LF
402
1% 6.3V
0.0033uF 1% PLACE NEAR R8397
1/16W 2 10% 1/16W
CERM 50V
MF-LF 402 CERM MF-LF
CLOSE TO PIN 26 402 402 2 402 CRITICAL
2 1 2 CHGR_VDDP PLACE RC CLOSE TO SMC
G
1 1 2 1 2 CHGR_ICM_R
R8300 =PP3V3_S0_PDCISENS 5
V+ U8370 OUT 1 DCIN_ISENSE 1 2 SMC_DCIN_ISENSE
C8300 R8312 4.7 1 C8312 MIN_LINE_WIDTH=0.2 MM 64A6 62A5
INA193
45D5
S 0.033UF 0 1 MIN_NECK_WIDTH=0.2 MM
C8311 10% 5% R8367 5%
1/16W 1UF SOT23-5
R8370 1
2 1UF 16V 1/16W 100 MF-LF 10% 1
C8370 4.53K C8371
Q8340 10%
X5R
402 MF-LF 1%
402
2
6.3V
CERM 1% 0.22UF
IRLML5203-2.6A 6.3V
CERM 1 2
402 1/16W 402 C8304 1 1
R8397
1uF
GND 1/16W 20%
1
SM
402 CHGR_ICOMP_RC 1 2 MF-LF
10% MF-LF 6.3V
402 0.1UF R8305 0.02 2
6.3V 402 2 X5R
D8300
CHGR_VCOMP_RC
2 10% CERM 2 402
25V 18 0.5%
R8301 C8301 B0530WXF 402
13
26
X5R 2 5% 1W
GND_SMC_AVSS
CHGR_ICM
34.8K 0.022uF SOD-123 402 1/16W MF 45C2 45C4 46B6 48A1 48B5 48C1 61C1 62A5 66B1
2
10% MF-LF 0612
1% 16V 402 2
1 1/16W CERM-X5R VDD VDDP 1 2
R8340 MF-LF
402
PP18V5_S5_CHGR_SW_R
88.7K 402 CHGR_SGATE
1 2
5 ICM SGATE 18 NO STUFF
1% 1 2 R8302 CRITICAL CRITICAL
1/16W CSIP 19 100K 1 1 1
MF-LF NO STUFF NO STUFF CHGR_ACLIM 8 ACLIM
CHGR_CSIN
1% CRITICAL C8305 C8306 C8307
CHGR_VCOMP_CC
2 402 C8325 C8326 CSIN 20 1/16W

10UF 10UF 10UF
CHGR_ICOMP 3 ICOMP CRITICAL MF-LF
150pF 120pF 402 10% 10% 10%
25V 25V 25V
5% 5% CHGR_VCOMP 4 VCOMP BGATE 17 CHGR_BGATE 1 2 2 X5R 2 X5R 2 X5R CRITICAL =PPBUSB_G3H 64C3
C8340
C
1
0.1UF
10% 1
50V
CERM
402
2
50V
CERM
402
1 2
66B6 CHGR_VADJ 9 VADJ
U8300
ISL6255AHRZ
DCIN 25 CHGR_DCIN 5 1206-1 1206-1 1206-1
1 2 =PPBUSA_G3H 64C3
C
3
25V
2 CELLS
2 QFN BOOT 14 CHGR_BOOT 1 2 CHGR_BOOT_RC
X5R
402 4
CRITICAL F8300
1 2
CHGR_CSOP 21 CSOP UGATE 15 CHGR_UGATE R8310 Q8301
2.2 7AMP
CHGR_CSON 22 CSON PHASE 16 CHGR_PHASE 5% HAT2168H 1206
D8322 R8306 1/16W C8303 LFPAK
4
1 C8302 7 CHLIM MF-LF 1

BAS16TW-X-F 2.2 LGATE 12 CHGR_LGATE 402 0.1UF R8308
1 5% 0.0082uF 10%
0.01
R8342 SOT-363 1/16W
MF-LF 10% 6 VREF EN 1 25V
NC 0.5%
93.1K 402 25V X5R 1W
2 X7R 2
3
CHGR_ACSET_RC 402 MF
THRML_PAD
1% 402 1 2 3 MIN_LINE_WIDTH=0.6 MM MIN_LINE_WIDTH=0.6 MM
0612
1/16W 23 ACPRN DCPRN 24
MIN_NECK_WIDTH=0.25 MM MIN_NECK_WIDTH=0.25 MM
MF-LF
1
CHGR_ACSET 27 ACSET DCSET 28 PPVBAT_G3H_CHGR_REG 1 2 PPVBAT_G3H_CHGR_OUT
2 402
5C1 66B5
CHGR_VREF CRITICAL CRITICAL
PGND
CRITICAL CRITICAL
CHGR_ACPRN
1 CRITICAL
GND
R8311 1
R8309 Q8302 L8300 1 1
270 R8362 100K HAT2165H
5
4.7UH C8308 1
C8309 C8310
CHGR_DCPRN
CHGR_EN
CHGR_DCSET
1% 90.9K 1% LFPAK
SM 33UF 100UF 33UF
29
10
11
1/16W 1% 1/16W 20% 20% 20%
MF-LF 1/16W MF-LF 2 16V 2 16V 2 16V
MF-LF 4 POLY ELEC POLY
2 402 402 2
402
CASED2E-SM 6.3X5.5SM1 CASED2E-SM
SMC_BATT_ISET1 2 CHGR_CHLIM NO STUFF
45B5 5C1
NO STUFF
1
R8343
1
R8341
1
R8344 1
C8328 1
1 C8317 C8316 1
10K 10K 100K 1
C8341 R8363 0.1UF
1% 1% 1% 24.9K 2.2uF 10% 0.001uF 1 2 CHGR_PHASE_RC Placement Note:
1/16W 1/16W 1/16W 0.1UF 1% 20% 2 25V 10%
10% 4V X5R 50V
MF-LF MF-LF MF-LF 25V 1/16W X5R 2 402 CERM 2 1 2 3
R8381 1 C8381 3 4 Place near R8308
2 402 2 402 2 402
2 MF-LF
X5R
402 402 2
402 402
49.9
1% 0.0022uF VIN+ VIN-
66A5 GND_CHGR_SGND 1 2 1/10W 10%
MF-LF 2 50V
CERM U8375
603 603 PLACE RC CLOSE TO SMC
XW8300 INA193
SM
5 SOT23-5 1 BATT_ISENSE SMC_BATT_ISENSE
64A6 =PP3V3_S0_PBATTISENS V+ OUT 1 2 45D5
1
C8375
CRITICAL R8371
4.53K 1
1uF 1%
1/16W
C8372
10% GND MF-LF 0.22UF
B CHLIM circuit (R8362, R8363, C8328) subject to change NO STUFF 1
R8352 CRITICAL
2
6.3V
CERM
402
2
402
2
20%
6.3V
X5R
B
pending M1 resolution (100mV offset, radar 4221420) 1
R8364 100K Q8320 R8320 402
27 GND_SMC_AVSS
0 1% SI4405DY-E3 5% 45C2 45C4 46B6 48A1 48B5 48C1 61C1
62A5 66C2
5% 1/16W SO-8 3W
1/16W MF-LF MF MIN_LINE_WIDTH=0.6 MM
2525
MF-LF 2 402 MIN_NECK_WIDTH=0.2 MM
402 8 PPVBATT_G3H_PRE 1 2 BATT_POS_F 65A2
2
66C2 5C1 PPVBAT_G3H_CHGR_OUT 3 S3 D4
7
CHGR_VADJ CHGR_VDD 2 S2 D3
TABLE_ALT_HEAD
66C6 66D6 NO STUFF

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: 1
C8320 1
C8321 1
C8322 1
R8330 1 1 D2 6
3 S3 D4
8
PART NUMBER NO STUFF 1 0.01uF 0.1UF 0.01UF 470K
C8318 S1 D1 5 7
1 1 R8350 10% 10% 10% 0.22UF 2 S2 D3
R8365 R8351 1%
TABLE_ALT_ITEM
128S0093 128S0092 ? C8308,C8310 KEMET T520V336M016ATE0457650 100K 2

16V
2
16V
2
16V
1/16W
10% GATE D2 6 3 4 PPVBATT_G3H_R 1 2 =PPVBATT_G3H 64B3
0 100K CERM X5R CERM 10V 1
1% 402 402 402 MF-LF 2 CERM S1 D1 5
TABLE_ALT_ITEM
5% 1% 1/16W 402 402 4

2
376S0466 376S0410 ? Q8300,Q8320 VISHAY SI4413ADY 1/16W
MF-LF
1/16W
MF-LF
MF-LF
402 BATT_FET_GATE GATE D8201 R8304
TABLE_ALT_ITEM
2
402 2 402
2
BAS16TW-X-F 47
376S0466 376S0410 ? Q8321 VISHAY SI4413ADY
1
NO STUFF 1
4 5%
R8331 R8322 SOT-363 1/8W
=PP3V42_G3H_ACIN 1 C8324
CHGR_EN_L
3
65C8 65C4 64D1 CRITICAL MF-LF
330K 39.2K Q8321
D8322 D 1
5%
0.01uF
10%
1%
SI4405DY-E3
805
BAS16TW-X-F Q8350 R8324 1/16W
MF-LF 2
16V 1/16W
MF-LF SO-8
SOT-363 2N7002 100K 402
CERM
402
2 402 2 MIN_LINE_WIDTH=0.2 MM
SOT23-LF 1% MIN_NECK_WIDTH=0.2 MM
6 1 1 G S 1/16W BATT_ENABLE_L BYPASS_R_GATE
MF-LF MIN_LINE_WIDTH=0.2 MM
402 MIN_NECK_WIDTH=0.2 MM
2 6 1
2 R8323
GND_CHGR_SGND
D8322 D
Q8322 35.7K
66B7 BAS16TW-X-F 2N7002DW-X-F
1%
1/16W
SOT-363 SOT-363 MF-LF
2 G S 402
5 2 BATT_FET_DRAIN 2
Q8324 BYPASS_R_DRV
1 2N7002DW-X-F 3
3
Q8322 SOT-363
D 6
2N7002DW-X-F D Q8324
SOT-363 D 2N7002DW-X-F
SOT-363
PBUS Supply/Battery Charger
5 G S
5C1 SMC_BATT_CHG_EN
5 G S
A 65C7 65C3 46B6 45C5 5C1 SMC_BC_ACOK 1
R8325
10K
2 BATT_RC
4
45D8
46B6
4
S G 2 SMC_BATT_TRICKLE_EN_L 5C1 45D8 46B6
SYNC_MASTER=SMC

A
1
1%
1/16W
C8323 1
MF-LF 0.1UF THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
402 20%
10V PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
2 CERM AGREES TO THE FOLLOWING
402
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 66 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
64D3
=PP5V_S0_LCD PP5V_INV
MIN_NECK_WIDTH=0.20 MM L9403
1 VOLTAGE=5V FERR-120-OHM-1.5A
R9400 =PPBUS_S5_INV 1 2 5B1 PPBUS_ALL_INV_CONN
100K 64C1
1% VOLTAGE=12.6V
1/16W 3 0402-LF
MF-LF
2 402
R9401
D
Q9405 L9402
MIN_NECK_WIDTH=0.20 MM INVERTER CONNECTOR D
D INV_PWREN_F_L1 100K 2 INV_PWREN_L1 G S
TP0610
S0T23-3 FERR-120-OHM-1.5A
1% 1 2
1/16W 2 CRITICAL
3 MF-LF 0402-LF
402 J9400
D
Q9406 88609-04001
F-ST-SM
2N7002
LVDS_BKLTEN 1 G S
SOT23-LF L9400 5
13D5
IN 120-OHM-0.3A-EMI
C9414 1 2 PP5V_INV_F 1
2 0.0022UF 5B1
1 2 0402-LF VOLTAGE=5V 5B1 INV_GND 2

3
10% MIN_NECK_WIDTH=0.20 MM
50V
CERM
5B1 INV_BKLIGHT_PWM_L 4
402 L9401
120-OHM-0.3A-EMI 6
1 2
67B7 67B5 64A6 =PP3V3_S0_LCD 0402-LF REPLACE 518S0334 WITH 518S0486
1 C9401 1 C9402 1 C9403 2 C9400
INVERTER_BUF 100PF 100PF 100PF 100PF
5% 5% 5% 5%
1
5 MC74VHC1G08 2 50V
CERM 2 50V
CERM 2 50V
CERM 1 50V
CERM
SC70 402 402 402 402
4 BKLIGHT_CTL
2
U9453
13D5 LVDS_BKLTCTL
INVERTER_BUF
C9459 1 3
0.1UF THIS GND CONECTS TO CHASSIS GND
10%
16V INVT_CHGND 6D8
X5R 2
402
C INVERTER_UNBUF
C
R9428
0
1 2
5%
1/16W
MF-LF
64A3 =PP3V3_S5_LCD 402
1
Q9403
R9402 FDC638P
5%
100K SM-LF LCD + CAMERA CONNECTOR
1/16W
MF-LF
6 PP3V3_LCDVDD_SW
402
2 5 VOLTAGE=3.3V
R9423 4
2 MIN_LINE_WIDTH=0.30 MM C9409
10K MIN_NECK_WIDTH=0.20 MM 0.001uF
1
LCDVDD_PWREN_L 1 1 C9411 1 C9412 1 2

5% 0.1UF 10UF CRITICAL
1/16W 10% 20% 10%
3 MF-LF
402
16V
2 X5R
6.3V
2 X5R 50V J9401
LCDVDD_PWREN_L_R 3
402 603
CERM
402 S-050162B
D Q9404 F-RT-SM
2N7002 C9413
25
SOT23-LF
13D5 LVDS_VDDEN 1 G S 0.0033UF
IN =GND_CHASSIS_LVDS 23
67A2 6C8
1 2
1 2
=PP3V3_S0_LCD
L9404
R9414 10%
50V
64A6 67B5 67B7 67C6 FERR-120-OHM-1.5A 1
100K CERM 1 2 PP3V3_LCDVDD_SW_F 2
1% 402
1/16W 1 VOLTAGE=3.3V MIN_LINE_WIDTH=0.30 MM MIN_NECK_WIDTH=0.20 MM 3
0402-LF
R9408 R9409
MF-LF 1
2 402 10K L9408 PP3V3_S0_LCD_F (LVDS DDC POWER) 4
10K 5% 120-OHM-0.3A-EMI VOLTAGE=3.3V MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.20 MM 5
5% 1/16W
1/16W MF-LF 1 2
MF-LF 2 402 67C6 67B7 67B5 64A6 =PP3V3_S0_LCD 6
2 402
B 13D5 LVDS_DDC_CLK
0402-LF 13C5
13C5
IO
IO
LVDS_A_DATA_N<0>
LVDS_A_DATA_P<0>
7
8
B
13D5 LVDS_DDC_DATA LVDS_A_DATA_N<1>
13C5 9
IO
13C5 LVDS_A_DATA_P<1> 10
67C6 67B5 64A6 =PP3V3_S0_LCD IO
13C5
IO LVDS_A_DATA_N<2> 11
NOSTUFF NOSTUFF 13C5

IO LVDS_A_DATA_P<2> 12
1
R9415 R9416 1 13D5
IO LVDS_A_CLK_N 13
CRITICAL
10K 10K 13C5 LVDS_A_CLK_P 14
5% 5% L9407 IO
15
1/16W 1/16W 90-OHM LCD I/F
MF-LF MF-LF SM
16
2 402 2 402
SYM_VER-1
6C2
IO =USB2_CAMERA_P 1 4 USB2_CAMERA_CONN_P 17
USB2_CAMERA_CONN_N 18 CAMERA I/F
13D5 LVDS_CLKCTLA 19
6C2
IO
=USB2_CAMERA_N 2 3
20
LVDS_CLKCTLB L9405 PP5V_S3_CAMERA_F 27D1

IO
=SMBUS_ATS_SCL 21
13D5 FERR-120-OHM-1.5A 27C1 =SMBUS_ATS_SDA 22
VOLTAGE=5V IO
64B3 =PP5V_S3_CAMERA
1 2
0402-LF MIN_LINE_WIDTH=0.30 MM 24
67B2 6C8 =GND_CHASSIS_LVDS 26
C9416 1 C9415 1 1 C9410 Plexi: 516S0212

LVDS REFERENCE CURRENT,1.5K OHM PULL DOWN RESISTOR NEEDED 0.001uF 0.001uF 0.001uF *Enclosure: 518S0364
10% 10% 10%
50V 2
50V 2 50V
2 CERM
CERM CERM
R9413 402 402 402
1.5K 2
LVDS_VREFH 13D5 13D5 LVDS_IBG 1 INVERTER,LVDS,TMDS
LVDS_VREFL 13D5 1%
1/16W SYNC_MASTER=GRAPHIC SYNC_DATE=06/06/2005
A MF-LF
402
1 C9408
0.001uF NOTICE OF PROPRIETARY PROPERTY
A
10%
50V
2 CERM
402 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 67 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
L9506 L9501
120-OHM-0.3A-EMI 120-OHM-0.3A-EMI R9507 R9537
69B7 68D8
=PP3V3_S0_TMDS 1 2 PP3V3_S0_ANALOG_TMDS_F =PP1V8_S0_TMDS 1 2 PP1V8_S0_TMDS_F TMDS_TX_P<0> 1
49.9 2 TMDS_TX<0> 1
49.9 2 TMDS_TX_N<0> 68B2
68B1 64A6 68B1 68B4 68D6 64B6 68B4 69B2 68B2 69B2
68C8 68B2 VOLTAGE=3.3V VOLTAGE=1.8V
69D5 69D1 0402-LF MIN_LINE_WIDTH=0.5MM 0402-LF MIN_LINE_WIDTH=0.5MM 1% 1%
MIN_NECK_WIDTH=0.25MM MIN_NECK_WIDTH=0.25MM 1/16W 1/16W
MF-LF MF-LF
1 C9536 1 C9537 1C9538 1C9539 1 C9540
1 C9507 1 C9508 1 C9509 1 C9510 1 C9511 1 C9512 1 C9513
402 1 C9522 402
0.1UF 0.001UF 0.1UF 0.001UF 0.1UF 0.001UF 0.001UF
0.001UF 0.001UF 0.1UF 0.1UF 10UF 10% 10% 10% 10% 10% 10% 10UF 10%
10% 10% 10% 10% 20% 2 16V 2 50V 2 16V 2 50V 2 16V 2 50V 20% 2 50V
CERM
2 50V
CERM
50V
2 CERM 2 16V
X5R 2 16V
X5R 2 6.3V
X5R
X5R
402
CERM
402
X5R
402
CERM
402
X5R
402
CERM
402 2 6.3V
X5R 402
402 402 402 402 603 603
D ONE 0.1UF AND 0.001UF FOR EACH PIN

ONE 0.1UF AND 0.001UF FOR EACH PIN R9508 R9538 D
TMDS_TX_P<1> 49.9 2 49.9 2
1 TMDS_TX<1> 1 TMDS_TX_N<1> 68B2
L9503 L9500 69B2 68B2
1% 1%
69B2
120-OHM-0.3A-EMI 120-OHM-0.3A-EMI 1/16W 1/16W

MF-LF MF-LF
69B7 68D8
68B1 64A6
68C8 68B2
=PP3V3_S0_TMDS 1 2 PP3V3_S0_ANALOG_SDVO_F 68C4 68D6 64B6 =PP1V8_S0_TMDS 1 2 PP1V8_S0_ANALOG_SDVO_F 68C4 402 1 C9523 402
69D5 69D1 0402-LF VOLTAGE=3.3V
MIN_LINE_WIDTH=0.3MM 0402-LF VOLTAGE=1.8V
0.001UF
MIN_NECK_WIDTH=0.25MM MIN_NECK_WIDTH=0.25MM 10%
2 50V
CERM
1 C9530 C9531
1 C9514
1 1 C9500 1 C9501 1 C9502 1 C9503 1 C9504 402
0.001UF 0.1UF 0.1UF 0.001UF 0.001UF 0.1UF 0.1UF 10UF
10% 10% 10% 10% 10% 10% 10% 20%
2 50V
CERM 2 16V
X5R 2 16V
X5R 2 50V
CERM 2 50V
CERM 2 16V
X5R 2 16V
X5R 2 6.3V
X5R
402 402 402 402 402 402 402 603
R9509 R9539
49.9 2 49.9 2
69B2 68B2 TMDS_TX_P<2> 1 TMDS_TX<2> 1 TMDS_TX_N<2> 68B2 69B2
1% 1%
ONE 0.1UF AND 0.001UF FOR EACH PIN 1/16W
MF-LF
1/16W
MF-LF
402 402
L9504 1 C9524
120-OHM-0.3A-EMI 0.001UF
10%
=PP3V3_S0_TMDS 1 2 PP3V3_S0_PVCC1_TMDS_F 2 50V
69B7 68D8
68B1 64A6 68C4
68C8 68B2 VOLTAGE=3.3V
CERM
69D5 69D1 0402-LF MIN_LINE_WIDTH=0.3MM
402
1 C9532 C9533
1 C9506
1
0.001UF
10%
0.1UF
10%
0.1UF
10%
R9510 R9540
49.9 2 49.9 2 TMDS_TX_CLK_N
2 50V
CERM 2 16V
X5R 2 16V
X5R 69A2 68B2 TMDS_TX_CLK_P 1 TMDS_TX_CLK 1 68B2 69A2
402 402 402 1% 1% NOSTUFF
1/16W 1/16W
MF-LF MF-LF
1 C9526 402 1 C9525 402 1 C9527
NOSTUFF 10pF 0.001UF 10pF
5% 10% 5%
2 50V 2 50V 2 50V
C L9505
CERM
402
CERM
402
CERM
402 C
120-OHM-0.3A-EMI MCH SDVO CHANNEL R,G,B,CLK SIGNAL TO TMDS CHIP
68C8 68B2 68B1 64A6 =PP3V3_S0_TMDS 1 2 PP3V3_S0_PVCC2_TMDS_F 68C4
69D5 69D1 69B7 68D8
0402-LF VOLTAGE=3.3V PLACE THE CAP NEAR THE NB SIDE
MIN_NECK_WIDTH=0.25MM 13B3 PEG_R2D_C_P<0>
IN
C9526,C9527 close to CHIP
1 C9534 C9535
1
13C3 PEG_R2D_C_N<0> PP3V3_S0_ANALOG_SDVO_F
0.001UF 0.1UF IN 68D6
10% 10% 68D3 PP1V8_S0_ANALOG_SDVO_F
2 50V
CERM 2 16V
X5R
402 402 13B3 PEG_R2D_C_P<1>
IN
68C7 PP3V3_S0_PVCC2_TMDS_F
13C3
IN
PEG_R2D_C_N<1> 68C6 PP3V3_S0_PVCC1_TMDS_F
13B3
IN
PEG_R2D_C_P<2>
13C3
IN
PEG_R2D_C_N<2>
13B3 PEG_R2D_C_P<3> 68D6 68B1 PP3V3_S0_ANALOG_TMDS_F
IN =PP3V3_S0_TMDS 64A6 68B1 68C8 68D8 69B7 69D1 69D5
68D3 PP1V8_S0_TMDS_F
13B3 PEG_R2D_C_N<3>
IN 1 C9521 1 C9505
0.1UF 10UF
VCC0 10
VCC1 28
VCC2 34
AVCC0 15
AVCC1 21
PVCC1 11
PVCC2 26
SVCC0 36
SVCC1 42
SPVCC 48
10% 20%
OVCC 1
2 16V
X5R 2 6.3V
X5R
1 C9541 1 C9542 1 C9543 1 C9544 1 C9545 1 C9546 1 C9547 1 C9548 402 603
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
PP3V3_S0_ANALOG_TMDS_F 68B4 68D6
10% 10% 10% 10% 10% 10% 10% 10%
2 16V
X5R 2 16V
X5R 2 16V
X5R 2 16V
X5R 2 16V
X5R 2 16V
X5R 2 16V
X5R 2 16V
X5R CRITICAL
402 402 402 402 402 402 402 402 TMDS_SDR_P 37 SDR_P U9500 TX0_P 17 69B2 68D3 TMDS_TX_P<0> OUT
SIL1362ACLU TMDS_TX_N<0> OUT 1
TMDS_SDR_N 38 SDR_N
LQFP
TX0_N 16 69B2 68D1
R9504
TMDS_SDG_P 40 SDG_P TX1_P 20 69B2 68D3 TMDS_TX_P<1> OUT 249
1%
PLACE IT CLOSE TO CONNECTOR TMDS_SDG_N 41 SDG_N TX1_N 19 69B2 68D1 TMDS_TX_N<1> 1/16W
B 69C6 64D3 =PP5V_S0_TMDS TMDS_SDB_P 43 SDB_P
SDVO RCVR DIFF SIG
TX2_P 23 69B2 68C3 TMDS_TX_P<2>
OUT
OUT
MF-LF
2 402
B
TMDS_SDB_N 44 SDB_N TX2_N 22 69B2 68C1 TMDS_TX_N<2> =PP3V3_S0_TMDS 64A6
CORE DATA OUT 68B2 68C8 68D8 69B7 69D1 69D5
C9519 TXC_P 14 69A2 68C3 TMDS_TX_CLK_P

D9500 2 1
0.1UF C9520
TMDS_SDC_P 46 SDC_P
TXC_N 13 69A2 68C1 TMDS_TX_CLK_N
OUT
OUT
BAV99DW-X-F 10% 16V TMDS_SDC_N 47 SDC_N 1
SOT-363 64B6 =PP2V5_S0_TMDS
X5R 402
1 2
0.1UF
10% 16V EXT_SWING 25 TMDS_EXT_SWING R9505 1R9506
13C3
OUT PEG_D2R_P<1> X5R 402 TMDS_INT_P 32 SDI_P 10K 10K
6 1 2 5% 5%
13D3
OUT
PEG_D2R_N<1> TMDS_INT_N 33 SDI_N 1/16W 1/16W
1 1
R9501 R9502 I2C MASTER
MF-LF MF-LF
3.3K 3.3K TMDS CHIP SDVO INPUT INTERRUPT SIGNAL TO MCH TMDS_EXT_RES 35 EXT_RES 2 402 2 402
5% 5% INTER SCLDDC 8 TMDS_I2C_SCL
1/16W 1/16W
MF-LF MF-LF SDADDC 9 TMDS_I2C_SDA
402 402 2 26B1 TMDS_RST_L 2 RESET*
2
SDVO_CTRLCLK TMDS_I2C_SCL AND TMDS_I2C_SDA DON’T NEED TO CONNECT
IO 14B6 5 SDSCL CONFIG/ TEXT MODE TEST 30
IO
14B6 SDVO_CTRLDATA 4 SDSDA PRGRM
R9500 ADDRESS=0X70 NC 6 A1
69C6
IN
TMDS_HTPLG 1 2.2K 2 TMDS_HTPLG_R IF HIGH, ADDRESS=0X72
29 HTPLG
5%
12 AGND0
18 AGND1
24 AGND2
27 PGND2
39 SGND0
45 SGND1
3 SPGND
1/16W
7 GND0
31 GND1
MF-LF
402
1
R9503
1K
5%
1/16W
MF-LF
2 402
PP5V_S0_DVIPORT 69B4 69C3 EXTERNAL TMDS

NC SYNC_MASTER=GRAPHIC SYNC_DATE=06/06/2005
A D9500 5 4
A
BAV99DW-X-F
SOT-363 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
3 AGREES TO THE FOLLOWING
69C5 PP5V_S0_DVIPORT_D II NOT TO REPRODUCE OR COPY IT
APPLE COMPUTER INC.

D 051-7374 A
SCALE SHT OF
NONE 68 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
TABLE_ALT_HEAD

PART NUMBER
TABLE_ALT_ITEM
155S0227 155S0164 ? L9805,L9806,L9807 KEEP MAG.LAYER IN BOM
Video Connectors EXTERNAL VIDEO (VGA) INTERFACE

=PP3V3_S0_TMDS 64A6 68B1 68B2 68C8 68D8 69B7 69D1
D Q9801
D
R98211 R98221 2N7002DW-X-F Isolation required for DVI power switch
5 SOT-363 GPU_CRT_DDC_CLK 69B6
2.2K 2.2K
5%
1/16W
5%
1/16W
2
Q9801 TMDS(MINI DVI) INTERFACE
G
MF-LF MF-LF
402 2 402 2 2N7002DW-X-F
G
CRT_DDC_CLK 4 3
D
13B5
IO SOT-363
1 PLACE THE RESISTOR CLOSE TO GMCH AND THE CAP NEAR CONNECTOR
CRT_DDC_DATA 6 GPU_CRT_DDC_DATA
D
13B5 69B6
IO
=PP3V3_S0_TMDS 64A6 68B1 68B2 68C8 68D8 69B7 69D5
F9804 L9844
0.5AMP-13.2V 400-OHM-EMI
=PP5V_S0_TMDS 1 2 PP5V_S0_TMDS_FUSE 1 2 PP5V_S0_DVIPORT 1 C9860
68B7 64D3
VOLTAGE=5V VOLTAGE=5V
68A6 69B4
0.1UF
SM-1 20%
MIN_LINE_WIDTH=0.5 MM MIN_LINE_WIDTH=0.5 MM 10V
VOLTAGE=5V SM-LF MIN_NECK_WIDTH=0.25 MM MIN_NECK_WIDTH=0.25 MM 2 CERM
1 C9804 U9804
8 SN74LVC2G125DCU
402
0.1UF
A 255 OHM 1% RESISTOR IS REQUIRED BETWEEN CRT_IREF 20%
10V
R9860 VCC
US
R9870
AND GROUND 2 CERM 39 39
CRT_HSYNC_R 1 2 CRT_HSYNC_LS_R 5 3 CRT_HSYNC_LS 1 2 VGA_HSYNC
402 13B5 A
125 Y 69B4
R9869 5%
1/16W GND
5%
1/16W NOSTUFF
255 MF-LF 7 MF-LF
13B5 CRT_IREF 1 2 =GND_CHASSIS_TMDS_UPPER 6C8 69A4 402 4 402 1 C9842
1% 33PF
1/16W 5%
MF-LF
402
PP5V_S0_DVIPORT_D 68A8
50V
2 CERM
402
PLACE THE RESISTOR CLOSE TO GMCH AND THE CAP NEAR THE CONNECTOR
DVI power DIODE on page 95 (D9500) U9804

TV REFERENCE CURRENT,USES AN EXTERNAL RESISTOR OF 5K OHM 1% 8 SN74LVC2G125DCU
TO SET INTERNAL VOLTAGE LEVELS R98621 1
R9863 R9861 VCC
US
R9871
39 39
C 2.2K
5%
2.2K
5%
13B5 CRT_VSYNC_R 1 2 CRT_VSYNC_LS_R 2
A
125 Y
6 CRT_VSYNC_LS 1 2 VGA_VSYNC 69B4 C
R9868 1/16W
MF-LF
1/16W
MF-LF
5%
1/16W GND
5%
1/16W NOSTUFF
4.99K2 402 2 2 402 MF-LF 1 MF-LF
13C5 TV_IREF 1 402 4 402 1 C9843
1% 33PF
1/16W 5%
MF-LF 2 50V
CERM
402 68A7 TMDS_HTPLG 402
1 C9808
0.001uF
10%
50V
2 CERM
402
69D5 GPU_CRT_DDC_CLK
1 C9809 CRITICAL
100pF
5% L9805
2 50V
CERM
90-OHM-300mA
2012H
402 TMDS_TX_P<2> 68B2 68C3
OMIT
2 3
69D5 GPU_CRT_DDC_DATA CRITICAL
TMDS_TX_N<2>
J9801 1 4
68B2 68C1
PLACE THE RESISTOR CLOSE TO GMCH 1 C9812 MINI-DVI SYM_VER-1

100pF RT-TH
CRITICAL
5%
50V 25 1 TMDS_TX_CONN_P<2>
13C5 TV_DACA_OUT 2 CERM
402 PP5V_S0_DVIPORT 17 9
L9807
90-OHM-300mA
13B5 CRT_BLUE 68A6 2012H
69C3
26 2 TMDS_TX_CONN_N<2> TMDS_TX_P<1> 68B2 68D3
2 3
18 10
TMDS_TX_CONN_P<1>
B 1
R9850
75
1
R9851
75 69D5
68B2 68B1 64A6
69D1 68D8 68C8
=PP3V3_S0_TMDS
FL9800
LCFILTER
NC
NC
27
19
3
11 1 4
TMDS_TX_N<1> 68B2 68D1
B
1%
1/16W
1%
1/16W EXT_COMPVID_B SM-220MHZ-LF 28 4 TMDS_TX_CONN_N<1> SYM_VER-1
MF-LF MF-LF 1 2 20 12
2 402 2 402
VGA_B
C9839
1
VGA_HSYNC 29 5 TMDS_TX_CONN_P<0> CRITICAL
13C5 TV_IRTNA 0.1UF NOSTUFF 3 4
69C1
L9806
10% 13
16V 1 90-OHM-300mA
CRT_BLUE_L
2 X5R R9856 30 6 TMDS_TX_CONN_N<0> 2012H
TMDS_TX_P<0>
13B5
402 150
1%
1 C9824 VGA_G 22 14 2 3
68B2 68D3
CRITICAL 16 1/16W 3.3PF TMDS_TX_CONN_CLK_P

MF-LF 0.25% 69C1 VGA_VSYNC
31 7
VCC 402 2 2 50V
CERM 15
TMDS_TX_N<0> 68B2 68D1
2 S1A DA 4 FL9801 402

32 8 TMDS_TX_CONN_CLK_N
1 4
PLACE THE RESISTOR CLOSE TO GMCH 3 S2A U9801 LCFILTER SYM_VER-1
SOP SM-220MHZ-LF VGA_R 24 16 CRITICAL

EXT_Y_G
TS3V330
13C5 TV_DACB_OUT 5 S1B DB 7 1 2

L9804
370-OHM-280MA
CRT_GREEN 6 S2B
33
34
35
36
13B5 SM1
NOSTUFF 3 4 TMDS_TX_CLK_P 68B2 68C3
1
R9852 1
R9853
11 S1C DC 9 R98641 1 2
10 S2C 150
75 75 1% TMDS_TX_CLK_N 68B2 68C1
1%
1/16W
1%
1/16W 14 S1D
DD 12 1/16W
MF-LF
1 C9834 4 3
MF-LF MF-LF 402 2 3.3PF 6C8 =GND_CHASSIS_TMDS_UPPER 6A6 =GND_CHASSIS_TMDS_DOWN SYM_VER-1
13 S2D IN 1 0.25% 69C3
2 402 2 402 50V
EN_L 15 FL9802 2 CERM
402 NOSTUFF
13C5 TV_IRTNB LCFILTER
GND
SM-220MHZ-LF
1 C9821
13B5 CRT_GREEN_L 8 EXT_C_R 1 2
0.1UF
10%
16V
2 X5R
NOSTUFF 402
3 4
R98591 MINI-DVI CONNECTOR
150
1%
1 C9820
3.3PF SYNC_MASTER=EUGENE SYNC_DATE=05/21/05
A PLACE THE RESISTOR CLOSE TO GMCH 1/16W
MF-LF
402 2
0.25%
50V
2 CERM
A
TV_DACC_OUT 402
13C5

13B5 CRT_RED PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
1 1
R9854 R9855 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
75 75 II NOT TO REPRODUCE OR COPY IT
1% 1%
1/16W 1/16W =SB_GPIO22 6B2 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
MF-LF MF-LF
2 402 2 402
TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION SIZE DRAWING NUMBER REV.
TV_IRTNC
13C5
514-0292 1 CONN,32P MINI-DVI RCPT,RA,MG3,LF J9801 CRITICAL NORMAL
TABLE_5_ITEM
APPLE COMPUTER INC.

D 051-7374 A
13B5 CRT_RED_L TABLE_5_ITEM
514-0319 1 CONN,32P MINI-DVI RCPT,RA,BLACK,LF J9801 CRITICAL FANCY SCALE SHT OF

NONE 69 79
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Title: Basenet Report 5VS5_SW 5VS5_SW - @mlb_noldo_lib.MLB_NOLDO 59B4 =PP1V05_S0_NB - 19D1 19D7 64C6 =PP2V5_S0_NB_VCCSYNC - 17D6 19B6 19D7 64B6
Design: mlb_noldo 5VS5_TG 5VS5_TG - @mlb_noldo_lib.MLB_NOLDO 59C4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
Date: Mar 22 15:44:50 2007 5VS5_VOSNS 5VS5_VOSNS - 59B4 =PP1V05_S0_CPU_NB - 62A6 64D8 =PP2V5_S0_NB_VCCA_LVDS - 17C6 19C7 19D1 64B6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
Base nets and synonyms for 5V_REG_IN 5V_REG_IN - 54A5 =PP1V05_S0_CPU - 7B5 7B6 7D5 7D5 8C7 9C8 =PP2V5_S0_NB_VCCA_3GBG - 17D6 19B7 19D7 64B6
mlb_noldo_lib.MLB_NOLDO(@mlb_noldo_lib.mlb_noldo(sch_1)) @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO 11B3 11C5 64D6 @mlb_noldo_lib.MLB_NOLDO
Base Signal Synonyms Location([Zone][dir]) =EXTBUSB_OC_L =EXTBUSB_OC_L - 6C2 42C8 =PP1V05_S0_REG =PP1V05_S0_REG - 5B2 62B1 64D8 =PP2V5_S0_NB_DISP_PLL - 19D6 64B6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
1V2_FB 1V2_FB - @mlb_noldo_lib.MLB_NOLDO 60A3 USB_C_OC_L - 6C1 22C4 22D8 =PP1V05_S0_CPU_NB_SENSE - 62A8 64D6 =PP3V3_S0_FAN_RT =PP3V3_S0_FAN_RT - 5D2 51C4 64A6
1V05S0_BG 1V05S0_BG - 62B4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO EXTBUSB_OC_L - 6C2 =PP1V05_S0_SB_CPU_IO - 21C1 21C1 24C3 25C4 64D6 =PP3V3_S0_ENET - 36C8 64A6
1V05S0_BOOST 1V05S0_BOOST - 62B4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =FWPWR_PWRON =FWPWR_PWRON - 6D2 39C6 =PPVCORE_S0_SB - 24D3 25D3 64D6 =PP3V3_S0_FW - 39C6 64A6
1V05S0_BOOST_RC 1V05S0_BOOST_RC - 62C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
D 1V05S0_COMP
@mlb_noldo_lib.MLB_NOLDO
1V05S0_COMP - 5D7
NC_FWPWR_PWRON -
6D1 PP1V05_S0 -
5B2 64D7 =PP3V3_S0_2V5S0 -
60C4 64A6 D
@mlb_noldo_lib.MLB_NOLDO =GND_BATT_CHGND =GND_BATT_CHGND - 6D8 65A6 65A6 =PPVCORE_S0_SB - 24D3 25D3 64D6 =PP3V3_S0_1V51V05S0 - 62B1 64A6
1V05S0_FSET 1V05S0_FSET - 5D7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =GND_CHASSIS_AUDIO_JACK - 6D8 56B8 =PP1V05_S0_SB_CPU_IO - 21C1 21C1 24C3 25C4 64D6 =PP3V3_S0_SMBUS_SMC_BSB - 27B1 64A6
1V05S0_ITH 1V05S0_ITH - 62B4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =GND_CHASSIS_AUDIO_MIC - 6D8 57A6 =PP1V05_S0_CPU_NB_SENSE - 62A8 64D6 =PP3V3_S0_RSTBUF - 26B4 64A6
1V05S0_ITH_RC 1V05S0_ITH_RC - 62B3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =GND_CHASSIS_DIPDIMM_LEFT - 6D8 28A5 =PP1V5_S0_NB =PP1V5_S0_NB - 19C1 19D7 64C6 =PP3V3_S0_SMBUS_SB - 27D8 64A6
1V05S0_RUNSS 1V05S0_RUNSS - 62B4 63B7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO GND_CHASSIS_IO - 6C7 6D7 =PP1V5_S0_NB_PCIE - 13D2 19D7 64C6 =PP3V3_S0_SMBUS_SMC_0 - 27D5 64A6
1V05S0_SNS_N 1V05S0_SNS_N - 62C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =GND_CHASSIS_USB - 6C8 42A2 42A4 42C2 42C4 =PP1V5_S0_AIRPORT - 43D3 64C6 =PP3V3_S0_SMBUS_SMC_MLB - 27C5 64A6
1V05S0_SNS_P 1V05S0_SNS_P - 62C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =GND_CHASSIS_FW_DOWN - 6C8 39A1 =PP1V5_S0_SB_VCCSATAPLL - 24B5 25D6 64C6 =PP3V3_S0_ALLSYSPG - 63B1 64A6
1V05S0_SW 1V05S0_SW - 62B4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO GND_CHASSIS_IO - 6C7 6D7 =PP1V5_S0_SB_VCC1_5_A_ATX - 24A5 25C6 64C6 =PP3V3_S0_LCD - 64A6 67B5 67B5 67B7 67C6
1V05S0_TG 1V05S0_TG - 62C4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =GND_CHASSIS_USB - 6C8 42A2 42A4 42C2 42C4 =PP1V5_S0_SB_VCCUSBPLL - 24A5 25B6 64C6 =PP3V3_S0_PBATTISENS - 64A6 66B3
1V05S0_VOSNS 1V05S0_VOSNS - 62B4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =GND_CHASSIS_FW_DOWN - 6C8 39A1 =PP1V5_S0_SB_VCC1_5_A_USB_CORE - 24A3 25B2 64C6 =PP3V3_S0_PDCISENS - 62A5 64A6 66C4
1V5S0_BG 1V5S0_BG - @mlb_noldo_lib.MLB_NOLDO 62B5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
1V5S0_BOOST 1V5S0_BOOST - 62B5 =GND_CHASSIS_DIPDIMM_LEFT - 6D8 28A5 =PP1V5_S0_SB_VCC1_5_A - 24A3 25C2 64C6 =PP3V3_S0_CPUPOWER - 48C2 64A6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
1V5S0_BOOST_RC 1V5S0_BOOST_RC - 62C6 =GND_CHASSIS_AUDIO_SPKRCONN - 6D8 =PP1V5_S0_SB - 25A8 25C8 64C6 =PP3V3_S0_SB - 22B5 25D8 34C8 64B6
1V5S0_ITH 1V5S0_ITH - 62B5 =GND_CHASSIS_AUDIO_SHIELD3 - 6D8 =PP1V5_S0_NB_VCCAUX - 16D1 17B6 19B6 19D7 64C6 =PP3V3_S0_SB_GPIO - 21C3 21D3 23B2 23D5 64B6
1V5S0_ITH_RC 1V5S0_ITH_RC - 62B5 =GND_CHASSIS_AUDIO_SHIELD2 - 6D8 =PP1V5_S0_NB_VCCD_HMPLL - 17C6 19D7 64C6 =PP3V3_S0_SB_VCC3_3 - 24B5 24B5 25B8 25C6 64B6
1V5S0_RUNSS 1V5S0_RUNSS - 5D7 62B5 63B7 =GND_CHASSIS_AUDIO_SHIELD1 - 6D8 =PP1V5_S0_NB_VCCD_LVDS - 17C6 19B8 19D7 64C6 =PP3V3_S0_SB_VCC3_3_PCI - 24B3 25A4 64B6
C 1V5S0_SNS_N 1V5S0_SNS_N -
62C6 =GND_CHASSIS_AUDIO_MIC -
6D8 57A6 =PP1V5_S0_NB_PLL -
19C6 19D7 64C6 =PP3V3_S0_SB_VCC3_3_IDE -
24C3 25B4 64B6
C
1V5S0_SNS_P 1V5S0_SNS_P - 62C6 =GND_CHASSIS_AUDIO_JACK - 6D8 56B8 =PP1V5_S0_NB_TVDAC - 19A8 19D7 64C6 =PP3V3_S0_SB_PCI - 26D1 64B6
1V5S0_SW 1V5S0_SW - @mlb_noldo_lib.MLB_NOLDO 62B5 =GND_CHASSIS_DIPDIMM =GND_CHASSIS_DIPDIMM_CENTER - 6B8 28D5 29A5 =PP1V5_S0_NB_3G - 19B5 64C6 =PP3V3_S0_SB_PM - 26B6 26B8 64B6
1V5S0_TG 1V5S0_TG - @mlb_noldo_lib.MLB_NOLDO 62C5 _CENTER @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
1V5S0_VOSNS 1V5S0_VOSNS - 62B5 GND_CHASSIS_CENTER - 6B7 =PP1V5_S0_NB_3GPLL - 19A5 64C6 =PP3V3_S0_PATA - 34C2 64A6
1V8S3_BOOT 1V8S3_BOOT - 61B5 =GND_CHASSIS_DIPDIMM =GND_CHASSIS_DIPDIMM_RIGHT - 6B8 29D4 =PP1V5_S0_SB_VCC1_5_A_ARX - 24B5 25D6 64C6 =PP3V3_S0_SMC_LS - 46D3 64A6
@mlb_noldo_lib.MLB_NOLDO _RIGHT @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
1V8S3_BOOT_RC 1V8S3_BOOT_RC - 61C4 GND_CHASSIS_RIGHT - 6B7 =PP1V5_S0_CPU - 8B7 9D8 64C6 =PP3V3_S0_NB - 14C7 14D6 19C7 20A4 20B4
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO 20B4 64A6
1V8S3_COMP 1V8S3_COMP - 5D7 61B6 =GND_CHASSIS_FW_UPPE =GND_CHASSIS_FW_UPPER - 6A6 39A1 =PP1V5_S0_REG - 62B8 64C8 =PP3V3_S0_SB_VCCLAN3_3 - 24D3 25D3 64A6
@mlb_noldo_lib.MLB_NOLDO R @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
1V8S3_COMP_R 1V8S3_COMP_R - 61B6 =GND_CHASSIS_TMDS_DOWN - 6A6 69A3 PP1V5_S0 - @mlb_noldo_lib.MLB_NOLDO 5B2 64C7 =PP3V3_S0_SB_3V3_1V5_VCCHDA - 24C3 25C4 64A6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP1V5_S0_SB_VCCUSBPLL - 24A5 25B6 64C6 @mlb_noldo_lib.MLB_NOLDO
1V8S3_FB 1V8S3_FB - @mlb_noldo_lib.MLB_NOLDO 61B6 GND_CHASSIS_IO1 - 6A5 @mlb_noldo_lib.MLB_NOLDO =PPSPD_S0_MEM - 28A7 29A3 29A7 64A6
1V8S3_FCCM 1V8S3_FCCM - 61B6 @mlb_noldo_lib.MLB_NOLDO =PP1V5_S0_SB_VCCSATAPLL - 24B5 25D6 64C6 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =GND_CHASSIS_TMDS_DOWN - 6A6 69A3 @mlb_noldo_lib.MLB_NOLDO =PP3V3_S0_CK410 - 32C7 32D3 32D8 64A6
1V8S3_FSET 1V8S3_FSET - 5D7 61C6 @mlb_noldo_lib.MLB_NOLDO =PP1V5_S0_SB_VCC1_5_A_USB_CORE - 24A3 25B2 64C6 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =GND_CHASSIS_LVDS =GND_CHASSIS_LVDS - 6C8 67A2 67B2 @mlb_noldo_lib.MLB_NOLDO =PP3V3_S0_AIRPORT - 43C3 64A6
1V8S3_ISEN 1V8S3_ISEN - 61B5 @mlb_noldo_lib.MLB_NOLDO =PP1V5_S0_SB_VCC1_5_A_ATX - 24A5 25C6 64C6 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO GND_CHASSIS_SATA - 6C7 35C8 @mlb_noldo_lib.MLB_NOLDO =PP3V3_S0_TPM - 53D4 64A6
1V8S3_LG 1V8S3_LG - @mlb_noldo_lib.MLB_NOLDO 61B5 @mlb_noldo_lib.MLB_NOLDO =PP1V5_S0_SB_VCC1_5_A_ARX - 24B5 25D6 64C6 @mlb_noldo_lib.MLB_NOLDO
1V8S3_PHASE 1V8S3_PHASE - 61B5 =GND_CHASSIS_RJ45 =GND_CHASSIS_RJ45 - 6C8 37A4 @mlb_noldo_lib.MLB_NOLDO =PP3V3_S0_AUDIO - 54A6 54D7 56D8 57B5 64A6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP1V5_S0_SB_VCC1_5_A - 24A3 25C2 64C6 @mlb_noldo_lib.MLB_NOLDO
1V8S3_UG 1V8S3_UG - @mlb_noldo_lib.MLB_NOLDO 61C5 =GND_CHASSIS_TMDS_UPPER - 6C8 69A4 69C3 @mlb_noldo_lib.MLB_NOLDO =PP3V3_S0_TMDS - 64A6 68B1 68B2 68C8 68C8
1V8S3_VCC 1V8S3_VCC - 61C6 @mlb_noldo_lib.MLB_NOLDO =PP1V5_S0_SB - 25A8 25C8 64C6 @mlb_noldo_lib.MLB_NOLDO 68D8 68D8 69B7 69D1 69D5
@mlb_noldo_lib.MLB_NOLDO GND_CHASSIS_DCIN - 6C7 @mlb_noldo_lib.MLB_NOLDO =PP3V3_S0_THRM_SNR - 10C4 49B3 49D3 64A6
1V51V05S0_FCB 1V51V05S0_FCB - 62A3 62B5 @mlb_noldo_lib.MLB_NOLDO =PP1V5_S0_REG - 62B8 64C8 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =GND_DCIN_CHGND - 6C8 65C8 @mlb_noldo_lib.MLB_NOLDO =PP3V3_S0_IMVP6 - 58D8 64A6
1V51V05S0_FSEL 1V51V05S0_FSEL - 62A2 62B4 @mlb_noldo_lib.MLB_NOLDO =PP1V5_S0_NB_VCCD_LVDS - 17C6 19B8 19D7 64C6 @mlb_noldo_lib.MLB_NOLDO
B 1V51V05S0_PGOOD
1V51V05S0_PGOOD - 58C7 62A1 63C2
GND_CHASSIS_DCIN -
6C7 @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB_VCCD_HMPLL - 17C6 19D7 64C6
=PP3V3_S0_NB_VCC_HV -
17C6 19B7 19C7 64B6
B
@mlb_noldo_lib.MLB_NOLDO =GND_DCIN_CHGND - 6C8 65C8 @mlb_noldo_lib.MLB_NOLDO =PP3V3_S0_FET - 63C3 64B8
2V5S0_BP 2V5S0_BP - @mlb_noldo_lib.MLB_NOLDO 60C3 @mlb_noldo_lib.MLB_NOLDO =PP1V5_S0_NB_VCCAUX - 16D1 17B6 19B6 19D7 64C6 @mlb_noldo_lib.MLB_NOLDO
2V5S3_BP 2V5S3_BP - @mlb_noldo_lib.MLB_NOLDO 60C3 =GND_CHASSIS_TMDS_UPPER - 6C8 69A4 69C3 @mlb_noldo_lib.MLB_NOLDO PP3V3_S0 - @mlb_noldo_lib.MLB_NOLDO 5A2 64B7
3V3S5_BG 3V3S5_BG - @mlb_noldo_lib.MLB_NOLDO 59B5 @mlb_noldo_lib.MLB_NOLDO =PP1V5_S0_NB_TVDAC - 19A8 19D7 64C6 =PPSPD_S0_MEM - 28A7 29A3 29A7 64A6
3V3S5_BOOST 3V3S5_BOOST - 59B5 =P1V2S0_EN =P1V2S0_EN - 63B5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP1V5_S0_NB_PLL - 19C6 19D7 64C6 =PP3V3_S0_TPM - 53D4 64A6
3V3S5_BOOST_RC 3V3S5_BOOST_RC - 59C6 PM_SLP_S3_LS12V6_L - 63B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP1V5_S0_NB_PCIE - 13D2 19D7 64C6 =PP3V3_S0_TMDS - 64A6 68B1 68B2 68C8 68C8
3V3S5_COMP 3V3S5_COMP - 5D7 =P3V3S0_EN - 63B5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO 68D8 68D8 69B7 69D1 69D5
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP1V5_S0_NB_3GPLL - 19A5 64C6 =PP3V3_S0_THRM_SNR - 10C4 49B3 49D3 64A6
3V3S5_FSET 3V3S5_FSET - 5D7 =P5VS0_EN - 63C5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP1V5_S0_NB_3G - 19B5 64C6 =PP3V3_S0_SMC_LS - 46D3 64A6
3V3S5_ITH 3V3S5_ITH - 59B5 PM_SLP_S3_LS12V6_L - 63B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP1V5_S0_CPU - 8B7 9D8 64C6 =PP3V3_S0_SMBUS_SMC_MLB - 27C5 64A6
3V3S5_ITH_RC 3V3S5_ITH_RC - 59B5 =P1V8S0_EN_L =P1V8S0_EN_L - 63A5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP1V5_S0_AIRPORT - 43D3 64C6 =PP3V3_S0_SMBUS_SMC_BSB - 27B1 64A6
3V3S5_RUNSS 3V3S5_RUNSS - 59B5 63C7 PM_SLP_S3_LS5V - 63A6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP1V8_S3_MEM_NB =PP1V8_S3_MEM_NB - 14C2 16B6 19D7 28D2 29D2 =PP3V3_S0_SMBUS_SMC_0 - 27D5 64A6
3V3S5_SNS_N 3V3S5_SNS_N - 59C6 =P3V3S3_EN_L =P3V3S3_EN_L - 63C5 @mlb_noldo_lib.MLB_NOLDO 61C2 64C6 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP1V8_S3_MEM_NB - 64C4 =PP3V3_S0_SMBUS_SB - 27D8 64A6
3V3S5_SNS_P 3V3S5_SNS_P - 59C6 PM_SLP_S4_LS5V - 42B8 63D6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP2V5_S0_NB_CRTDAC =PP2V5_S0_NB_CRTDAC - 19D4 19D7 64B6 =PP3V3_S0_SB_VCCLAN3_3 - 24D3 25D3 64A6
3V3S5_SW 3V3S5_SW - @mlb_noldo_lib.MLB_NOLDO 59B5 =P5VS3_EN_L - 63D5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
3V3S5_TG 3V3S5_TG - @mlb_noldo_lib.MLB_NOLDO 59C5 @mlb_noldo_lib.MLB_NOLDO =PP2V5_S0_NB_VCCA_3GBG - 17D6 19B7 19D7 64B6 =PP3V3_S0_SB_VCC3_3_PCI - 24B3 25A4 64B6
3V3S5_VOSNS 3V3S5_VOSNS - 59B5 PM_SLP_S4_LS5V - 42B8 63D6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP2V5_S0_NB_VCC_TXLVDS - 17D6 19B8 19D7 64B6 =PP3V3_S0_SB_VCC3_3_IDE - 24C3 25B4 64B6
5V3V3S5_FCB 5V3V3S5_FCB - 59A3 59B5 =PP1V05_S0_FSB_NB =PP1V05_S0_FSB_NB - 12A7 12B7 12C2 19D7 33B8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO 33C7 33C8 64D6 =PP2V5_S0_NB_DISP_PLL - 19D6 64B6 =PP3V3_S0_SB_VCC3_3 - 24B5 24B5 25B8 25C6 64B6
5V3V3S5_FSEL 5V3V3S5_FSEL - 59A2 59B4 =PP1V05_S0_NB - 19D1 19D7 64C6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP2V5_S0_NB_VCCA_LVDS - 17C6 19C7 19D1 64B6 =PP3V3_S0_SB_PM - 26B6 26B8 64B6
A 5VS5_BG
5VS5_BOOST
5VS5_BG - @mlb_noldo_lib.MLB_NOLDO
5VS5_BOOST -
59B4
59B4
=PP1V05_S0_CPU_NB -
62A6 64D8 @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S0_TMDS - 64B6 68B7
=PP3V3_S0_SB_PCI - 26D1 64B6
A
@mlb_noldo_lib.MLB_NOLDO =PP1V05_S0_NB_VTT - 17D3 19B5 19D7 64C6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
5VS5_BOOST_RC 5VS5_BOOST_RC - 59C3 @mlb_noldo_lib.MLB_NOLDO =PP2V5_S0_NB_VCCSYNC - 17D6 19B6 19D7 64B6 =PP3V3_S0_SB_GPIO - 21C3 21D3 23B2 23D5 64B6
@mlb_noldo_lib.MLB_NOLDO =PP1V05_S0_CPU - 7B5 7B6 7D5 7D5 8C7 9C8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
5VS5_ITH 5VS5_ITH - @mlb_noldo_lib.MLB_NOLDO 59B4 @mlb_noldo_lib.MLB_NOLDO 11B3 11C5 64D6 =PP2V5_S0_REG - 60C2 63B3 64B8 =PP3V3_S0_SB_3V3_1V5_VCCHDA - 24C3 25C4 64A6
5VS5_ITH_RC 5VS5_ITH_RC - 59B3 =PPVCORE_S0_NB - 16C8 16D3 19C8 19D7 64D6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP2V5_S0 - @mlb_noldo_lib.MLB_NOLDO 5B2 64B7 =PP3V3_S0_SB - 22B5 25D8 34C8 64B6
5VS5_RUNSS 5VS5_RUNSS - 5D7 59B4 63C7 PP1V05_S0_CPU_NB - 64D7 =PP2V5_S0_TMDS - 64B6 68B7 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP3V3_S0_RSTBUF - 26B4 64A6
5VS5_SNS_N 5VS5_SNS_N - 59C3 =PPVCORE_S0_NB - 16C8 16D3 19C8 19D7 64D6 =PP2V5_S0_REG - 60C2 63B3 64B8 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP3V3_S0_PDCISENS - 62A5 64A6 66C4
5VS5_SNS_P 5VS5_SNS_P - 59C3 =PP1V05_S0_NB_VTT - 17D3 19B5 19D7 64C6 =PP2V5_S0_NB_VCC_TXLVDS - 17D6 19B8 19D7 64B6 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP3V3_S0_PBATTISENS - 64A6 66B3
99
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
@mlb_noldo_lib.MLB_NOLDO =PP5V_1V51V05S0_VCC - 62A8 64D3 AIRPORT_CLK100M_PCIE AIRPORT_CLK100M_PCIE_P - 33B2 33D4 43C6 AUD_PORTA_L AUD_PORTA_L - 56C3 57D1
=PP3V3_S0_PATA - 34C2 64A6 @mlb_noldo_lib.MLB_NOLDO _P @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PP5V_S0_IDE_PATA =PP5V_S0_IDE_PATA - 34C5 AIRPORT_RST_L AIRPORT_RST_L - 26B1 43C4 AUD_PORTA_L_R AUD_PORTA_L_R - 57B1 57D3
=PP3V3_S0_NB_VCC_HV - 17C6 19B7 19C7 64B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO PP5V_S0_IDE_PATA - 34D3 ALL_SYS_PWRGD ALL_SYS_PWRGD - 5B2 26A5 45D8 63B1 AUD_PORTA_R AUD_PORTA_R - 56C3 57C1
=PP3V3_S0_NB - 14C7 14D6 19C7 20A4 20B4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO 20B4 64A6 =PPDCIN_G3H =PPDCIN_G3H - 64B3 65D3 ALS_GAIN ALS_GAIN - @mlb_noldo_lib.MLB_NOLDO 45B5 46C6 AUD_PORTA_R_R AUD_PORTA_R_R - 57B1 57C3
=PP3V3_S0_LCD - 64A6 67B5 67B5 67B7 67C6 @mlb_noldo_lib.MLB_NOLDO ALS_LEFT ALS_LEFT - @mlb_noldo_lib.MLB_NOLDO 5A7 45A8 46C3 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PPVBATT_G3H - 64B3 66B2 ALS_RIGHT ALS_RIGHT - 45A8 46C3 AUD_PORTE_DET_L AUD_PORTE_DET_L - 57D5
=PP3V3_S0_IMVP6 - 58D8 64A6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PPVIN_G3H_P3V42G3H - 63D3 64B1 AUDIO_SHIELD_PLANE AUDIO_SHIELD_PLANE - 56C3 AUD_PORTF_L AUD_PORTF_L - 56B4 57B1
=PP3V3_S0_FW - 39C6 64A6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO PPDCIN_G3H - 64B1 AUD_4V5_SHDN_L AUD_4V5_SHDN_L - 54A5 AUD_PORTF_L_R AUD_PORTF_L_R - 57B2
=PP3V3_S0_FET - 63C3 64B8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
D @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_ENET - 36C8 64A6
=PPVIN_G3H_P3V42G3H -
63D3 64B1 AUD_ALC_COUT AUD_ALC_COUT -
54B5 AUD_PORTF_R AUD_PORTF_R -
56B4 57A1 D
@mlb_noldo_lib.MLB_NOLDO =PPVBATT_G3H - 64B3 66B2 AUD_ANALOG_FILT_1 AUD_ANALOG_FILT_1 - 54C4 AUD_PORTF_R_R AUD_PORTF_R_R - 57A2
=PP3V3_S0_CPUPOWER - 48C2 64A6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =SMBUS_ATS_SCL =SMBUS_ATS_SCL - 27D1 67A2 AUD_ANALOG_FILT_2 AUD_ANALOG_FILT_2 - 54C4 AUD_PORTG_DET_L AUD_PORTG_DET_L - 57C5
=PP3V3_S0_CK410 - 32C7 32D3 32D8 64A6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO SMBUS_SMC_RMT_SCL - 27D2 AUD_BI_PORT_A_L AUD_BI_PORT_A_L - 54C1 57C3 AUD_SENSE_A AUD_SENSE_A - 54C1 57C5 57D8
=PP3V3_S0_AUDIO - 54A6 54D7 56D8 57B5 64A6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO SMB_RMT_CLK - 27D3 45B5 AUD_BI_PORT_A_R AUD_BI_PORT_A_R - 54C1 57B3 AUD_SENSE_B AUD_SENSE_B - 54C1 57C4 57C8 57D8
=PP3V3_S0_ALLSYSPG - 63B1 64A6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO SMBUS_SMC_RMT_SCL - 27D2 AUD_BI_PORT_B_L AUD_BI_PORT_B_L - 54C1 57A6 AUD_SPDIF_IN AUD_SPDIF_IN - 54C1 56B3
=PP3V3_S0_AIRPORT - 43C3 64A6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =SMBUS_ATS_SDA =SMBUS_ATS_SDA - 27C1 67A2 AUD_BI_PORT_B_R - 54C1 57A6 AUD_SPDIF_OUT AUD_SPDIF_OUT - 54D1 56D3
=PP3V3_S0_2V5S0 - 60C4 64A6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO SMBUS_SMC_RMT_SDA - 27D2 AUD_BI_PORT_C_L AUD_BI_PORT_C_L - 54C7 55B8 AUD_SPDIF_OUT_R AUD_SPDIF_OUT_R - 54D4
=PP3V3_S0_1V51V05S0 - 62B1 64A6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO SMB_RMT_DATA - 27D3 45B5 AUD_BI_PORT_C_R AUD_BI_PORT_C_R - 54C7 55C8 AUD_SPKRAMP_INL AUD_SPKRAMP_INL - 55B6
=PP3V42_G3H_LPCPLUS =PP3V42_G3H_LPCPLUS - 5D2 47C6 64D1 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO SMBUS_SMC_RMT_SDA - 27D2 AUD_BI_PORT_D_L AUD_BI_PORT_D_L - 54C7 57A5 AUD_SPKRAMP_INL_L AUD_SPKRAMP_INL_L - 55B7
=PP3V42_G3H_SMCVREF - 46C8 64D1 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =SMB_AIRPORT_CLK =SMB_AIRPORT_CLK - 27C6 43B4 AUD_BI_PORT_D_R AUD_BI_PORT_D_R - 54C7 55A8 AUD_SPKRAMP_INR AUD_SPKRAMP_INR - 55C6
=PP3V42_G3H_SMC - 45D2 45D3 45D3 46D1 46D5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO 46D8 48C8 64D1 =SMB_GEYSER_CLK - 27B6 40C4 AUD_BI_PORT_E_L AUD_BI_PORT_E_L - 54C1 57A5 AUD_SPKRAMP_INR_L AUD_SPKRAMP_INR_L - 55C7
=PP3V42_G3H_SB_RTC - 26D6 64D1 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO SMBUS_SB_SCL - 27D7 AUD_BI_PORT_E_R AUD_BI_PORT_E_R - 54C1 57A5 AUD_SPKRAMP_INSUB AUD_SPKRAMP_INSUB - 55A6
=PP3V42_G3H_ACIN - 64D1 65C4 65C8 66A5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =I2C_SODIMMB_SCL - 27C6 29A6 AUD_BI_PORT_F_L AUD_BI_PORT_F_L - 54C1 57B3 AUD_SPKRAMP_INSUB_L AUD_SPKRAMP_INSUB_L - 55A7
=PP3V42_G3H_SMC_CLK - 46A8 64D1 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO SMB_CLK - @mlb_noldo_lib.MLB_NOLDO 23D5 27D8 AUD_BI_PORT_F_R AUD_BI_PORT_F_R - 54C1 57A3 AUD_SPKRAMP_SHUTDOWN AUD_SPKRAMP_SHUTDOWN_L - 55A6 55B8 55C8
=PP3V42_G3H_LIDSWITCH - 64D1 65A8 =I2C_SODIMMA_SCL - 27D6 28A6 @mlb_noldo_lib.MLB_NOLDO _L @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO AUD_BYPASS AUD_BYPASS - 54C4 AUD_VREF_FILT AUD_VREF_FILT - 54C4
=PP3V42_G3H_REG - 63D1 64D3 SMB_CK410_CLK - 27D6 32B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
C @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_SMBUS_SMC_BSA - 27C3 64D1
SMB_CLK - @mlb_noldo_lib.MLB_NOLDO 23D5 27D8
AUD_CONNJ1_RING AUD_CONNJ1_RING -
56C7 AUD_VREF_PORT_B AUD_VREF_PORT_B -
54C1 57A6
C
@mlb_noldo_lib.MLB_NOLDO SMB_CK410_CLK - 27D6 32B6 AUD_CONNJ1_RING_F AUD_CONNJ1_RING_F - 56C6 BAL_IN_COM BAL_IN_COM - 54C7 57A3
=PP3V42_G3H_PWRCTL - 63B8 63C8 64D1 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO SMBUS_SB_SCL - 27D7 AUD_CONNJ1_SLEEVE AUD_CONNJ1_SLEEVE - 56D7 BAL_IN_L BAL_IN_L - @mlb_noldo_lib.MLB_NOLDO 54C7 57A3
PP3V42_G3H - 5A2 64D1 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO BAL_IN_R BAL_IN_R - @mlb_noldo_lib.MLB_NOLDO 54C7 57A3
@mlb_noldo_lib.MLB_NOLDO =SMB_GEYSER_CLK - 27B6 40C4 AUD_CONNJ1_SLEEVEDET AUD_CONNJ1_SLEEVEDET - 56C7 BATT_ENABLE_L BATT_ENABLE_L - 66A4
=PP3V42_G3H_SMC_CLK - 46A8 64D1 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =I2C_SODIMMB_SCL - 27C6 29A6 AUD_CONNJ1_SLEEVEDET AUD_CONNJ1_SLEEVEDET_F - 56C6 BATT_FET_DRAIN BATT_FET_DRAIN - 66A5
=PP3V42_G3H_SMCVREF - 46C8 64D1 @mlb_noldo_lib.MLB_NOLDO _F @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =I2C_SODIMMA_SCL - 27D6 28A6 AUD_CONNJ1_SLEEVE_F AUD_CONNJ1_SLEEVE_F - 56D5 BATT_FET_GATE BATT_FET_GATE - 66A4
=PP3V42_G3H_SMC - 45D2 45D3 45D3 46D1 46D5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO 46D8 48C8 64D1 =SMB_AIRPORT_DATA =SMB_AIRPORT_DATA - 27C6 43B4 AUD_CONNJ1_TIP AUD_CONNJ1_TIP - 56C7 BATT_IN BATT_IN - @mlb_noldo_lib.MLB_NOLDO 5D1
=PP3V42_G3H_SMBUS_SMC_BSA - 27C3 64D1 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO BATT_ISENSE BATT_ISENSE - 66B2
@mlb_noldo_lib.MLB_NOLDO =SMB_GEYSER_DATA - 27B6 40C4 AUD_CONNJ1_TIPDET AUD_CONNJ1_TIPDET - 56D7 @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_SB_RTC - 26D6 64D1 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO BATT_NEG BATT_NEG - @mlb_noldo_lib.MLB_NOLDO 5D1 65A6
@mlb_noldo_lib.MLB_NOLDO SMBUS_SB_SDA - 27D7 AUD_CONNJ1_TIPDET_F AUD_CONNJ1_TIPDET_F - 56D6 BATT_POS BATT_POS - @mlb_noldo_lib.MLB_NOLDO 5D1 65A6
=PP3V42_G3H_REG - 63D1 64D3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO BATT_POS_F BATT_POS_F - 65A2 66B2
@mlb_noldo_lib.MLB_NOLDO =I2C_SODIMMB_SDA - 27C6 29A6 AUD_CONNJ1_TIP_F AUD_CONNJ1_TIP_F - 56C6 @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_PWRCTL - 63B8 63C8 64D1 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO BATT_RC BATT_RC - @mlb_noldo_lib.MLB_NOLDO 66A5
@mlb_noldo_lib.MLB_NOLDO SMB_DATA - @mlb_noldo_lib.MLB_NOLDO 23D5 27D8 AUD_CONNJ2_RING AUD_CONNJ2_RING - 56B7 BEEP BEEP - @mlb_noldo_lib.MLB_NOLDO 54C6
=PP3V42_G3H_LIDSWITCH - 64D1 65A8 =I2C_SODIMMA_SDA - 27C6 28A6 @mlb_noldo_lib.MLB_NOLDO BIOS_REC BIOS_REC - @mlb_noldo_lib.MLB_NOLDO 23A6 23C5
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO AUD_CONNJ2_RING_F AUD_CONNJ2_RING_F - 56B6 BKLIGHT_CTL BKLIGHT_CTL - 67C4
=PP3V42_G3H_ACIN - 64D1 65C4 65C8 66A5 SMB_CK410_DATA - 27D6 32B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO AUD_CONNJ2_SLEEVE AUD_CONNJ2_SLEEVE - 56B7 BOOT_LPC_SPI_L BOOT_LPC_SPI_L - 5C2 22B3 45C8 47C6
=PP5V_S0_FAN_RT =PP5V_S0_FAN_RT - 5D2 51C4 64D3 SMB_DATA - @mlb_noldo_lib.MLB_NOLDO 23D5 27D8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO SMB_CK410_DATA - 27D6 32B6 AUD_CONNJ2_SLEEVEDET AUD_CONNJ2_SLEEVEDET - 56A7 BYPASS_R_DRV BYPASS_R_DRV - 66A3
=PP5V_S0_ISENSECAL - 48A8 64D3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO SMBUS_SB_SDA - 27D7 AUD_CONNJ2_SLEEVEDET AUD_CONNJ2_SLEEVEDET_F - 56A6 BYPASS_R_GATE BYPASS_R_GATE - 66A3
=PP5V_S0_LCD - 64D3 67D7 @mlb_noldo_lib.MLB_NOLDO _F @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =SMB_GEYSER_DATA - 27B6 40C4 AUD_CONNJ2_SLEEVE_F AUD_CONNJ2_SLEEVE_F - 56B6 CHASSIS_AUDIO_JACK_I CHASSIS_AUDIO_JACK_ISOL - 56A3 56A8 56B1 56B6 56B6
=PP5V_S0_TMDS - 64D3 68B7 69C6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO SOL @mlb_noldo_lib.MLB_NOLDO 56C1 56C1 56C8
B @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_IMVP6 - 58D8 64D3
=I2C_SODIMMB_SDA -
27C6 29A6 AUD_CONNJ2_TIP AUD_CONNJ2_TIP -
56B7 CHGR_ACLIM CHGR_ACLIM -
66C6
B
@mlb_noldo_lib.MLB_NOLDO =I2C_SODIMMA_SDA - 27C6 28A6 AUD_CONNJ2_TIPDET AUD_CONNJ2_TIPDET - 56B7 CHGR_ACPRN CHGR_ACPRN - 66B6
=PP5V_1V51V05S0_VCC - 62A8 64D3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =USB2_AIRPORT_N =USB2_AIRPORT_N - 6B2 43B4 AUD_CONNJ2_TIPDET_F AUD_CONNJ2_TIPDET_F - 56B6 CHGR_ACSET CHGR_ACSET - 66C6
=PP5V_S0_NB_TVDAC - 19C4 19C7 64D3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO USB_H_N - @mlb_noldo_lib.MLB_NOLDO 6B1 22C2 AUD_CONNJ2_TIP_F AUD_CONNJ2_TIP_F - 56B6 CHGR_ACSET_RC CHGR_ACSET_RC - 66C8
=PP5V_S0_LPCPLUS - 5D2 47C6 64D3 USB2_AIRPORT_N - 6B2 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO AUD_GPIO_0 AUD_GPIO_0 - 54B8 55A8 CHGR_BGATE CHGR_BGATE - 66C5
=PP5V_S0_AUDIO_PWR - 55B8 55B8 55D8 64D3 =USB2_AIRPORT_P =USB2_AIRPORT_P - 6B2 43B4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO AUD_GPIO_0_R AUD_GPIO_0_R - 54B7 54C7 CHGR_BOOT CHGR_BOOT - 66C5
=PP5V_S0_AUDIO - 54A6 55C8 64D3 USB_H_P - @mlb_noldo_lib.MLB_NOLDO 6B1 22C2 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO USB2_AIRPORT_P - 6B2 AUD_GPIO_1 AUD_GPIO_1 - 54B8 57C3 CHGR_BOOT_RC CHGR_BOOT_RC - 66C4
=PP5V_S0_MEMVTT - 31C6 64D3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =USB2_CAMERA_N =USB2_CAMERA_N - 6C2 67A4 AUD_GPIO_1_R AUD_GPIO_1_R - 54A7 54C7 CHGR_CHLIM CHGR_CHLIM - 66B6
=PP5V_S0_FET - 63C3 64D6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO USB_D_N - @mlb_noldo_lib.MLB_NOLDO 6C1 22C2 AUD_GPIO_2 AUD_GPIO_2 - 54C7 CHGR_CSIN CHGR_CSIN - 66C5
=PP5V_S0_SATA - 35C6 64D3 USB2_CAMERA_N - 6C2 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO AUD_INJACK_INSERT_L AUD_INJACK_INSERT_L - 57C7 CHGR_CSON CHGR_CSON - 66C6
=PP5V_S0_SB - 25D8 64D3 =USB2_CAMERA_P =USB2_CAMERA_P - 6C2 67B4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO AUD_J1_COM AUD_J1_COM - 56C4 CHGR_CSOP CHGR_CSOP - 66C6
PP5V_S0 - @mlb_noldo_lib.MLB_NOLDO 5A2 64D4 USB_D_P - @mlb_noldo_lib.MLB_NOLDO 6C1 22C2 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_TMDS - 64D3 68B7 69C6 USB2_CAMERA_P - 6C2 AUD_J1_DET_RC AUD_J1_DET_RC - 57D7 CHGR_DCIN CHGR_DCIN - 66C5
=PP5V_S0_SB - 25D8 64D3 ACIN_1V20_REF ACIN_1V20_REF - 65C4 AUD_J1_SLEEVEDET_INV AUD_J1_SLEEVEDET_INV - 57C7 CHGR_DCPRN CHGR_DCPRN - 66B5
=PP5V_S0_SATA - 35C6 64D3 ACIN_DIV ACIN_DIV - @mlb_noldo_lib.MLB_NOLDO 65C4 AUD_J1_SLEEVEDET_R AUD_J1_SLEEVEDET_R - 56C3 57C6 57C8 CHGR_DCSET CHGR_DCSET - 66B5
@mlb_noldo_lib.MLB_NOLDO ACIN_ENABLE_GATE ACIN_ENABLE_GATE - 5C1 65C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_NB_TVDAC - 19C4 19C7 64D3 @mlb_noldo_lib.MLB_NOLDO AUD_J1_TIPDET_R AUD_J1_TIPDET_R - 56C3 57D8 CHGR_EN CHGR_EN - @mlb_noldo_lib.MLB_NOLDO 66B5
@mlb_noldo_lib.MLB_NOLDO ACIN_ENABLE_L ACIN_ENABLE_L - 65C2 @mlb_noldo_lib.MLB_NOLDO CHGR_EN_L CHGR_EN_L - 66A6
=PP5V_S0_MEMVTT - 31C6 64D3 @mlb_noldo_lib.MLB_NOLDO AUD_J2_COM AUD_J2_COM - 56B4 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO ACIN_ENABLE_L_DIV ACIN_ENABLE_L_DIV - 65C1 @mlb_noldo_lib.MLB_NOLDO CHGR_ICM CHGR_ICM - @mlb_noldo_lib.MLB_NOLDO 66C6
A =PP5V_S0_LPCPLUS -
5D2 47C6 64D3
ACZ_BITCLK
ACZ_BITCLK - 5C1 21C7 54D7
AUD_J2_DET_RC AUD_J2_DET_RC -
57B7 CHGR_ICM_R CHGR_ICM_R -
66C6 A
=PP5V_S0_LCD - 64D3 67D7 @mlb_noldo_lib.MLB_NOLDO AUD_J2_OPT_OUT AUD_J2_OPT_OUT - 56B7 CHGR_ICOMP CHGR_ICOMP - 66C6
@mlb_noldo_lib.MLB_NOLDO ACZ_RST_L ACZ_RST_L - 5C1 21C7 54C7 57C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_ISENSECAL - 48A8 64D3 @mlb_noldo_lib.MLB_NOLDO AUD_J2_SLEEVEDET_R AUD_J2_SLEEVEDET_R - 56A4 57B8 CHGR_ICOMP_RC CHGR_ICOMP_RC - 66C7
@mlb_noldo_lib.MLB_NOLDO ACZ_SDATAIN<0> ACZ_SDATAIN<0> - 5D1 21C7 54D7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_IMVP6 - 58D8 64D3 @mlb_noldo_lib.MLB_NOLDO AUD_J2_TIPDET_R AUD_J2_TIPDET_R - 56A4 57B8 CHGR_LGATE CHGR_LGATE - 66C5
@mlb_noldo_lib.MLB_NOLDO ACZ_SDATAOUT ACZ_SDATAOUT - 5D1 21C7 54D7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_FET - 63C3 64D6 @mlb_noldo_lib.MLB_NOLDO AUD_JDREF AUD_JDREF - 54C4 CHGR_PHASE CHGR_PHASE - 66C5
@mlb_noldo_lib.MLB_NOLDO ACZ_SYNC ACZ_SYNC - @mlb_noldo_lib.MLB_NOLDO 5C1 21C7 54D7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_AUDIO_PWR - 55B8 55B8 55D8 64D3 ADAPTER_SENSE ADAPTER_SENSE - 65C7 AUD_OUTJACK_INSERT_L AUD_OUTJACK_INSERT_L - 57D7 CHGR_PHASE_RC CHGR_PHASE_RC - 66B4
=PP5V_S0_AUDIO - 54A6 55C8 64D3 AIRPORT_CLK100M_PCIE AIRPORT_CLK100M_PCIE_N - 33B2 33C4 43C6 AUD_PORTA_DET_L AUD_PORTA_DET_L - 57D5 CHGR_SGATE CHGR_SGATE - 66C5
@mlb_noldo_lib.MLB_NOLDO _N @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
100
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CHGR_UGATE CHGR_UGATE - 66C5 @mlb_noldo_lib.MLB_NOLDO CRT_DDC_DATA CRT_DDC_DATA - 13B5 69D7 ENET_PU_VDD_TTL1 ENET_PU_VDD_TTL1 - 36A6 36B6
@mlb_noldo_lib.MLB_NOLDO CLK_NB_OE_L CLK_NB_OE_L - 14B6 32B4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
CHGR_VADJ CHGR_VADJ - 66B6 66C6 @mlb_noldo_lib.MLB_NOLDO CRT_GREEN CRT_GREEN - 13B5 69A8 ENET_RSET ENET_RSET - 36C8
@mlb_noldo_lib.MLB_NOLDO CONN_GEYSER_ONOFF_FL CONN_GEYSER_ONOFF_FLTR_L - 40C6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
CHGR_VCOMP CHGR_VCOMP - 66C6 TR_L @mlb_noldo_lib.MLB_NOLDO CRT_HSYNC_LS CRT_HSYNC_LS - 69C2 ENET_RST_L ENET_RST_L - 26A1 36C6
@mlb_noldo_lib.MLB_NOLDO CONN_GEYSER_USB_N CONN_GEYSER_USB_N - 40C6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
CHGR_VCOMP_CC CHGR_VCOMP_CC - 66C7 @mlb_noldo_lib.MLB_NOLDO CRT_HSYNC_LS_R CRT_HSYNC_LS_R - 69C3 ENET_VPD_CLK ENET_VPD_CLK - 36A2 36C6
@mlb_noldo_lib.MLB_NOLDO CONN_GEYSER_USB_P CONN_GEYSER_USB_P - 40C6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
CHGR_VCOMP_RC CHGR_VCOMP_RC - 66C7 @mlb_noldo_lib.MLB_NOLDO CRT_HSYNC_R CRT_HSYNC_R - 13B5 69C3 ENET_VPD_DATA ENET_VPD_DATA - 36A2 36C6
@mlb_noldo_lib.MLB_NOLDO CPUVCORE_ISENSE_CAL CPUVCORE_ISENSE_CAL - 48A5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
CHGR_VDD CHGR_VDD - @mlb_noldo_lib.MLB_NOLDO 66B6 66D6 @mlb_noldo_lib.MLB_NOLDO CRT_IREF CRT_IREF - @mlb_noldo_lib.MLB_NOLDO 13B5 69C8 ENET_XTALI ENET_XTALI - 36B6
CHGR_VDDP CHGR_VDDP - 66C5 CPU_A20M_L CPU_A20M_L - 7C8 21C4 CRT_RED CRT_RED - @mlb_noldo_lib.MLB_NOLDO 13B5 69A8 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO CRT_VSYNC_LS CRT_VSYNC_LS - 69C2 ENET_XTALO ENET_XTALO - 36B6
CHGR_VREF CHGR_VREF - 66B6 CPU_BSEL<0> CPU_BSEL<0> - 7B4 33C6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
D CK410_CLK14P3M_TIMER
CK410_CLK14P3M_TIMER - 32A4 33B8 CPU_BSEL<1>
CPU_BSEL<1> - 7B4 33B6
CRT_VSYNC_LS_R CRT_VSYNC_LS_R -
69C3 EXTAUSB_OC_F_L EXTAUSB_OC_F_L -
42C8 D
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO CRT_VSYNC_R CRT_VSYNC_R - 13B5 69C3 EXTBUSB_OC_F_L EXTBUSB_OC_F_L - 42C8
CK410_CPU0_N CK410_CPU0_N - 5C7 32C4 33D5 CPU_BSEL<2> CPU_BSEL<2> - 7B4 33B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO DCIN_ISENSE DCIN_ISENSE - 66C3 EXT_COMPVID_B EXT_COMPVID_B - 69B6
CK410_CPU0_P CK410_CPU0_P - 5C7 32C4 33D5 CPU_BSEL_R<0> CPU_BSEL_R<0> - 33C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO DEBUG_RST_L DEBUG_RST_L - 5C2 26B1 47C6 EXT_C_R EXT_C_R - @mlb_noldo_lib.MLB_NOLDO 69A6
CK410_CPU1_N CK410_CPU1_N - 5C7 32C4 33D5 CPU_BSEL_R<1> CPU_BSEL_R<1> - 33B7 @mlb_noldo_lib.MLB_NOLDO EXT_Y_G EXT_Y_G - @mlb_noldo_lib.MLB_NOLDO 69A6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO DMI_IRCOMP_R DMI_IRCOMP_R - 22C2 FAN_RT_PWM FAN_RT_PWM - 5D2 51B3
CK410_CPU1_P CK410_CPU1_P - 5C7 32C4 33D5 CPU_BSEL_R<2> CPU_BSEL_R<2> - 33B7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO DMI_N2S_N<0> DMI_N2S_N<0> - 14B4 22D2 FAN_RT_TACH FAN_RT_TACH - 5D2 51C3
CK410_CPU2_ITP_SRC10 CK410_CPU2_ITP_SRC10_N - 5C7 32C4 33D5 CPU_COMP<0> CPU_COMP<0> - 7B3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
_N @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO DMI_N2S_N<1> DMI_N2S_N<1> - 14B4 22D2 FSB_ADSTB_L<0> FSB_ADSTB_L<0> - 7D8 12C4
CK410_CPU2_ITP_SRC10 CK410_CPU2_ITP_SRC10_P - 5C7 32C4 33D5 CPU_COMP<1> CPU_COMP<1> - 7B3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
_P @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO DMI_N2S_N<2> DMI_N2S_N<2> - 14B4 22D2 FSB_ADSTB_L<1> FSB_ADSTB_L<1> - 7C8 12C4
CK410_DOT96_27M_N CK410_DOT96_27M_N - 5C7 32A4 33B5 CPU_COMP<2> CPU_COMP<2> - 7B3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO DMI_N2S_N<3> DMI_N2S_N<3> - 14B4 22D2 FSB_ADS_L FSB_ADS_L - 7D6 12C4
CK410_DOT96_27M_P CK410_DOT96_27M_P - 5C7 32A4 33B5 CPU_COMP<3> CPU_COMP<3> - 7B3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO DMI_N2S_P<0> DMI_N2S_P<0> - 14B4 22D2 FSB_A_L<3> FSB_A_L<3> - 7D8 12D4
CK410_FSB_TEST_MODE CK410_FSB_TEST_MODE - 32C6 33B8 CPU_DPRSTP_L CPU_DPRSTP_L - 7B3 21C4 58C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
CK410_IREF CK410_IREF - 32B6 CPU_DPSLP_L CPU_DPSLP_L - 7B3 21C4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
CK410_LVDS_N CK410_LVDS_N - 5C7 32B4 33A5 CPU_FERR_L CPU_FERR_L - 7C8 21C2 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
CK410_LVDS_P CK410_LVDS_P - 5C7 32B4 33A5 CPU_GTLREF CPU_GTLREF - 7B4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO DMI_S2N_N<0> DMI_S2N_N<0> - 14B4 22D2 FSB_A_L<7> FSB_A_L<7> - 7D8 12D4
CK410_PCI1_CLK CK410_PCI1_CLK - 32B6 33D8 CPU_IGNNE_L CPU_IGNNE_L - 7C8 21C4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
CK410_PCI2_CLK CK410_PCI2_CLK - 32B6 33D8 CPU_INIT_L CPU_INIT_L - 7D6 21C4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
CK410_PCI3_CLK CK410_PCI3_CLK - 32B6 33D8 CPU_INTR CPU_INTR - @mlb_noldo_lib.MLB_NOLDO 7C8 21C4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
C CK410_PCI4_CLK
CK410_PCI4_CLK - 32B6
CPU_ISENSE_OUT_R CPU_ISENSE_OUT_R -
48C3 DMI_S2N_N<3> DMI_S2N_N<3> -
14B4 22D2 FSB_A_L<10> FSB_A_L<10> -
7D8 12D4
C
@mlb_noldo_lib.MLB_NOLDO CPU_ISENSE_R_N CPU_ISENSE_R_N - 48C3 DMI_S2N_P<0> DMI_S2N_P<0> - 14B4 22D2 FSB_A_L<11> FSB_A_L<11> - 7D8 12D4
CK410_PCI4_CLK_SPN CK410_PCI4_CLK_SPN - 5C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO CPU_ISENSE_R_P CPU_ISENSE_R_P - 48C3 DMI_S2N_P<1> DMI_S2N_P<1> - 14B4 22D2 FSB_A_L<12> FSB_A_L<12> - 7D8 12D4
CK410_PCI5_FCTSEL1 CK410_PCI5_FCTSEL1 - 32B6 33A8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO CPU_NMI CPU_NMI - @mlb_noldo_lib.MLB_NOLDO 7C8 21C4 DMI_S2N_P<2> DMI_S2N_P<2> - 14B4 22D2 FSB_A_L<13> FSB_A_L<13> - 7D8 12D4
CK410_PCIF0_CLK CK410_PCIF0_CLK - 32B7 33D8 CPU_PROCHOT_L CPU_PROCHOT_L - 7C6 46B5 46C2 58C8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO DMI_S2N_P<3> DMI_S2N_P<3> - 14B4 22D2 FSB_A_L<14> FSB_A_L<14> - 7D8 12D4
CK410_PCIF1_CLK CK410_PCIF1_CLK - 5C7 32B6 33D8 CPU_PSI_L CPU_PSI_L - 7A3 58C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENETPWR_EN ENETPWR_EN - 60B5 60C5 60D4 FSB_A_L<15> FSB_A_L<15> - 7D8 12D4
CK410_PD_VTT_PWRGD_L CK410_PD_VTT_PWRGD_L - 26A8 32A4 CPU_PWRGD CPU_PWRGD - 7B3 21C4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_BOB_SMITH_CAP ENET_BOB_SMITH_CAP - 37A5 FSB_A_L<16> FSB_A_L<16> - 7D8 12C4
VR_PWRGD_CK410_L - 26A7 58C7 CPU_RCIN_L CPU_RCIN_L - 21C4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_CENTER_TAP<0> ENET_CENTER_TAP<0> - 37C6 FSB_A_L<17> FSB_A_L<17> - 7C8 12C4
CK410_REF1_FCTSEL0 CK410_REF1_FCTSEL0 - 32A4 33A8 CPU_SMI_L CPU_SMI_L - 7C8 21C4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_CENTER_TAP<1> ENET_CENTER_TAP<1> - 37B6 FSB_A_L<18> FSB_A_L<18> - 7C8 12C4
CK410_SRC1_N CK410_SRC1_N - 6B4 32B4 CPU_STPCLK_L CPU_STPCLK_L - 7C8 21C4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
CK410_SRC1_N_SPN - 5C7 6B3 CPU_TEST1 CPU_TEST1 - 7B4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
CK410_SRC1_P CK410_SRC1_P - 6B4 32B4 CPU_TEST2 CPU_TEST2 - 7B4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_CLK100M_PCIE_N ENET_CLK100M_PCIE_N - 33C3 33D2 36C6 FSB_A_L<21> FSB_A_L<21> - 7C8 12C4
CK410_SRC1_P_SPN - 5C7 6B3 CPU_THERMAL_SCREW_DO CPU_THERMAL_SCREW_DOWN - 6A8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO WN @mlb_noldo_lib.MLB_NOLDO ENET_CLK100M_PCIE_P ENET_CLK100M_PCIE_P - 33C3 33D2 36C6 FSB_A_L<22> FSB_A_L<22> - 7C8 12C4
CK410_SRC2_N CK410_SRC2_N - 5C7 32B4 33C5 CPU_THERMAL_SCREW_RI CPU_THERMAL_SCREW_RIGHT - 6A7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO GHT @mlb_noldo_lib.MLB_NOLDO ENET_CTRL12 ENET_CTRL12 - 6A4 36C8 FSB_A_L<23> FSB_A_L<23> - 7C8 12C4
CK410_SRC2_P CK410_SRC2_P - 5C7 32B4 33C5 CPU_THERMAL_SCREW_UP CPU_THERMAL_SCREW_UP - 6A7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_CTRL12_SPN - 6A3 FSB_A_L<24> FSB_A_L<24> - 7C8 12C4
CK410_SRC3_N CK410_SRC3_N - 6B4 32B4 CPU_THERMD_N CPU_THERMD_N - 7C6 10B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_CTRL25 ENET_CTRL25 - 6A4 36C8 FSB_A_L<25> FSB_A_L<25> - 7C8 12C4
CK410_SRC3_N_SPN - 5C7 6B3 CPU_THERMD_P CPU_THERMD_P - 7C6 10B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
B CK410_SRC3_P
CK410_SRC3_P - 6B4 32B4 CPU_THERMTRIP_R
CPU_THERMTRIP_R - 21C2
ENET_CTRL25_SPN -
6A3 FSB_A_L<26> FSB_A_L<26> -
7C8 12C4
B
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_LOM_DIS_L ENET_LOM_DIS_L - 36D8 FSB_A_L<27> FSB_A_L<27> - 7C8 12C4
CK410_SRC3_P_SPN - 5C7 6B3 CPU_VCCSENSE_N CPU_VCCSENSE_N - 8B6 58A4 58A5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_MDI0 ENET_MDI0 - 36B5 FSB_A_L<28> FSB_A_L<28> - 7C8 12C4
CK410_SRC4_N CK410_SRC4_N - 5C7 32B4 33B5 CPU_VCCSENSE_P CPU_VCCSENSE_P - 8B6 58A4 58A5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
CK410_SRC4_P CK410_SRC4_P - 5C7 32B4 33B5 CPU_VID<0> CPU_VID<0> - 8B7 9C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
CK410_SRC5_N CK410_SRC5_N - 5C7 32B4 33C5 CPU_VID<1> CPU_VID<1> - 8B7 9C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
CK410_SRC5_P CK410_SRC5_P - 5C7 32B4 33C5 CPU_VID<2> CPU_VID<2> - 8B7 9C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_MDI_N<0> ENET_MDI_N<0> - 36C3 37C8 FSB_BNR_L FSB_BNR_L - 7D6 12C4
CK410_SRC6_N CK410_SRC6_N - 5C7 32B4 33C5 CPU_VID<3> CPU_VID<3> - 8B7 9C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_MDI_N<1> ENET_MDI_N<1> - 36C3 37B8 FSB_BPRI_L FSB_BPRI_L - 7D6 12C4
CK410_SRC6_P CK410_SRC6_P - 5C7 32B4 33D5 CPU_VID<4> CPU_VID<4> - 8B7 9C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_MDI_N<2> ENET_MDI_N<2> - 36C3 37B8 FSB_BREQ0_L FSB_BREQ0_L - 7D6 12C4
CK410_SRC7_N CK410_SRC7_N - 6B4 32B4 CPU_VID<5> CPU_VID<5> - 8B7 9D3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_MDI_N<3> ENET_MDI_N<3> - 36C3 37B8 FSB_CLK_CPU_N FSB_CLK_CPU_N - 7C6 33C2 33D3
CK410_SRC7_N_SPN - 5C7 6B3 CPU_VID<6> CPU_VID<6> - 8B7 9D3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_MDI_P<0> ENET_MDI_P<0> - 36C3 37C8 FSB_CLK_CPU_P FSB_CLK_CPU_P - 7C6 33C2 33D3
CK410_SRC7_P CK410_SRC7_P - 6B4 32B4 CPU_VID_R<0> CPU_VID_R<0> - 9C2 58C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_MDI_P<1> ENET_MDI_P<1> - 36C3 37B8 FSB_CLK_NB_N FSB_CLK_NB_N - 12A6 33C2 33D3
CK410_SRC7_P_SPN - 5C7 6B3 CPU_VID_R<0..6> CPU_VID_R<0..6> - 58A4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_MDI_P<2> ENET_MDI_P<2> - 36C3 37B8 FSB_CLK_NB_P FSB_CLK_NB_P - 12A6 33D2 33D3
CK410_SRC8_N CK410_SRC8_N - 5B7 32A4 33C5 CPU_VID_R<1> CPU_VID_R<1> - 9C2 58C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_MDI_P<3> ENET_MDI_P<3> - 36C3 37B8 FSB_CPURST_L FSB_CPURST_L - 7D6 11B5 12C4
CK410_SRC8_P CK410_SRC8_P - 5B7 32A4 33C5 CPU_VID_R<2> CPU_VID_R<2> - 9C2 58C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_MDI_TRAN_N<0> ENET_MDI_TRAN_N<0> - 37C5 FSB_DBSY_L FSB_DBSY_L - 7D6 12B4
CK410_SRC_CLKREQ1_L CK410_SRC_CLKREQ1_L - 6B4 32B4 CPU_VID_R<3> CPU_VID_R<3> - 9C2 58C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_MDI_TRAN_N<1> ENET_MDI_TRAN_N<1> - 37B5 FSB_DEFER_L FSB_DEFER_L - 7D6 12B4
CK410_SRC_CLKREQ1_L_SPN - 5B7 6B3 CPU_VID_R<4> CPU_VID_R<4> - 9C2 58C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
A CK410_SRC_CLKREQ3_L
CK410_SRC_CLKREQ3_L - 6B4 32B4 CPU_VID_R<5>
CPU_VID_R<5> - 9D2 58C7
ENET_MDI_TRAN_N<2> ENET_MDI_TRAN_N<2> -
5A7 37B5 FSB_DINV_L<0> FSB_DINV_L<0> -
7C4 12B4 A
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_MDI_TRAN_N<3> ENET_MDI_TRAN_N<3> - 37B5 FSB_DINV_L<1> FSB_DINV_L<1> - 7B4 12B4
CK410_SRC_CLKREQ3_L_SPN - 5B7 6B3 CPU_VID_R<6> CPU_VID_R<6> - 9D2 58C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_MDI_TRAN_P<0> ENET_MDI_TRAN_P<0> - 37C5 FSB_DINV_L<2> FSB_DINV_L<2> - 7C3 12B4
CK410_SRC_CLKREQ6_L CK410_SRC_CLKREQ6_L - 32B4 43C6 CPU_XDP_CLK_N CPU_XDP_CLK_N - 11B3 33D2 33D3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_MDI_TRAN_P<1> ENET_MDI_TRAN_P<1> - 37B5 FSB_DINV_L<3> FSB_DINV_L<3> - 7B3 12B4
CK410_SRC_CLKREQ8_L CK410_SRC_CLKREQ8_L - 5B7 32A4 33A5 CPU_XDP_CLK_P CPU_XDP_CLK_P - 11B3 33D2 33D3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_MDI_TRAN_P<2> ENET_MDI_TRAN_P<2> - 5A7 37B5 FSB_DPWR_L FSB_DPWR_L - 7B3 12B4
CK410_USB48_FSA CK410_USB48_FSA - 32A4 33C8 CRB_SV_DET CRB_SV_DET - 23B6 23C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO ENET_MDI_TRAN_P<3> ENET_MDI_TRAN_P<3> - 5A7 37B5 FSB_DRDY_L FSB_DRDY_L - 7D6 12B4
CK410_XTAL_IN CK410_XTAL_IN - 32C6 CRT_BLUE CRT_BLUE - @mlb_noldo_lib.MLB_NOLDO 13B5 69B8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO CRT_DDC_CLK CRT_DDC_CLK - 13B5 69D7 ENET_PU_VDD_TTL0 ENET_PU_VDD_TTL0 - 36A6 36C6 FSB_DSTBN_L<0> FSB_DSTBN_L<0> - 7C4 12B4
CK410_XTAL_OUT CK410_XTAL_OUT - 32C6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
101
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
FSB_DSTBN_L<1> FSB_DSTBN_L<1> - 7B4 12B4 FSB_D_L<55> FSB_D_L<55> - 7B3 12B6 @mlb_noldo_lib.MLB_NOLDO IMVP6_COMP_RC IMVP6_COMP_RC - 58B8
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO FW_PORT0_TPA_N_FL FW_PORT0_TPA_N_FL - 39B2 @mlb_noldo_lib.MLB_NOLDO
FSB_DSTBN_L<2> FSB_DSTBN_L<2> - 7C3 12B4 FSB_D_L<56> FSB_D_L<56> - 7B3 12B6 @mlb_noldo_lib.MLB_NOLDO IMVP6_CPU_ISENSE_N IMVP6_CPU_ISENSE_N - 48C4
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO FW_PORT0_TPA_P_FL FW_PORT0_TPA_P_FL - 39B2 @mlb_noldo_lib.MLB_NOLDO
FSB_DSTBN_L<3> FSB_DSTBN_L<3> - 7B3 12B4 FSB_D_L<57> FSB_D_L<57> - 7B3 12B6 @mlb_noldo_lib.MLB_NOLDO IMVP6_CPU_ISENSE_P IMVP6_CPU_ISENSE_P - 48D4
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO FW_PORT0_TPB FW_PORT0_TPB - 39A5 @mlb_noldo_lib.MLB_NOLDO
FSB_DSTBP_L<0> FSB_DSTBP_L<0> - 7C4 12B4 FSB_D_L<58> FSB_D_L<58> - 7B3 12B6 @mlb_noldo_lib.MLB_NOLDO IMVP6_DFB IMVP6_DFB - 58A4 58B6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO FW_PORT0_TPB_N_FL FW_PORT0_TPB_N_FL - 39B2 @mlb_noldo_lib.MLB_NOLDO
FSB_DSTBP_L<1> FSB_DSTBP_L<1> - 7B4 12B4 FSB_D_L<59> FSB_D_L<59> - 7B3 12B6 @mlb_noldo_lib.MLB_NOLDO IMVP6_DROOP IMVP6_DROOP - 48D5 58A4 58B6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO FW_PORT0_TPB_P_FL FW_PORT0_TPB_P_FL - 39B2 @mlb_noldo_lib.MLB_NOLDO
FSB_DSTBP_L<2> FSB_DSTBP_L<2> - 7C3 12B4 FSB_D_L<60> FSB_D_L<60> - 7B3 12B6 @mlb_noldo_lib.MLB_NOLDO IMVP6_FB IMVP6_FB - @mlb_noldo_lib.MLB_NOLDO 58A4 58B7
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO FW_PWRON_RST_L FW_PWRON_RST_L - 38C3 IMVP6_FB2 IMVP6_FB2 - 58A4 58B7
FSB_DSTBP_L<3> FSB_DSTBP_L<3> - 7B3 12B4 FSB_D_L<61> FSB_D_L<61> - 7B3 12B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO FW_R0 FW_R0 - @mlb_noldo_lib.MLB_NOLDO 38B3 IMVP6_FET_RC1 IMVP6_FET_RC1 - 58A8 58C2
D FSB_D_L<0> FSB_D_L<0> -
7C4 12D6 FSB_D_L<62> FSB_D_L<62> -
7B3 12B6 FW_R1
FW_XI
FW_R1 - @mlb_noldo_lib.MLB_NOLDO
FW_XI - @mlb_noldo_lib.MLB_NOLDO
38C3
38C3 IMVP6_FET_RC2
IMVP6_FET_RC2 - 58A6 58B2
D
FSB_D_L<1> FSB_D_L<1> - 7C4 12D6 FSB_D_L<63> FSB_D_L<63> - 7B3 12B6 FW_XO FW_XO - @mlb_noldo_lib.MLB_NOLDO 38C3 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO FW_XO_R FW_XO_R - @mlb_noldo_lib.MLB_NOLDO 38C3 IMVP6_ISEN1 IMVP6_ISEN1 - 58A8 58C6
FSB_D_L<2> FSB_D_L<2> - 7C4 12D6 FSB_HITM_L FSB_HITM_L - 7D6 12B4 GEYSER_GND_F GEYSER_GND_F - 40C5 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO IMVP6_ISEN2 IMVP6_ISEN2 - 58A6 58C6
FSB_D_L<3> FSB_D_L<3> - 7C4 12D6 FSB_HIT_L FSB_HIT_L - 7D6 12B4 GND_1V8S3_SGND GND_1V8S3_SGND - 61B5 61C6 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO IMVP6_LGATE1 IMVP6_LGATE1 - 58A8 58C6
FSB_D_L<4> FSB_D_L<4> - 7C4 12D6 FSB_IERR_L FSB_IERR_L - 7D6 GND_1V51V05S0_SGND GND_1V51V05S0_SGND - 62B7 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO IMVP6_LGATE2 IMVP6_LGATE2 - 58A6 58C6
FSB_D_L<5> FSB_D_L<5> - 7C4 12D6 FSB_LOCK_L FSB_LOCK_L - 7D6 12B4 GND_5V3V3S5_SGND GND_5V3V3S5_SGND - 59B7 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO IMVP6_NTC IMVP6_NTC - 58C7
FSB_D_L<6> FSB_D_L<6> - 7C4 12D6 FSB_REQ_L<0> FSB_REQ_L<0> - 7D8 12B4 GND_AUDIO_CODEC GND_AUDIO_CODEC - 5D1 64B2 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO IMVP6_NTC_R IMVP6_NTC_R - 58C7
FSB_D_L<7> FSB_D_L<7> - 7C4 12D6 FSB_REQ_L<1> FSB_REQ_L<1> - 7D8 12B4 =GND_AUDIO_CODEC - 54A6 54B6 54D2 55A8 55B8 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO 55C8 56B3 56B5 57A5 57A6 IMVP6_OCSET IMVP6_OCSET - 58A4 58B6
FSB_D_L<8> FSB_D_L<8> - 7C4 12D6 FSB_REQ_L<2> FSB_REQ_L<2> - 7D8 12A4 57B3 57B3 57B5 57B8 57C3 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO 57C5 57C8 57D8 64B3 IMVP6_PHASE1 IMVP6_PHASE1 - 58A8 58C6
FSB_D_L<9> FSB_D_L<9> - 7C4 12D6 FSB_REQ_L<3> FSB_REQ_L<3> - 7D8 12A4 GND_AUDIO_PWR GND_AUDIO_PWR - 5D1 64B2 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO IMVP6_PHASE2 IMVP6_PHASE2 - 58A6 58C6
FSB_D_L<10> FSB_D_L<10> - 7C4 12D6 FSB_REQ_L<4> FSB_REQ_L<4> - 7D8 12A4 =GND_AUDIO_PWR - 55A3 55A5 55A8 55B3 55B3 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO 55B8 55C3 55C3 55C8 55D3 IMVP6_RBIAS IMVP6_RBIAS - 5D7 58A4 58B7
FSB_D_L<11> FSB_D_L<11> - 7C4 12D6 FSB_RS_L<0> FSB_RS_L<0> - 7D6 12A4 55D8 56C2 64B3 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO GND_AUDIO_SPDIF_DGND GND_AUDIO_SPDIF_DGND - 56A8 56C8 IMVP6_RTN IMVP6_RTN - 58A4 58B6
FSB_D_L<12> FSB_D_L<12> - 7C4 12D6 FSB_RS_L<1> FSB_RS_L<1> - 7D6 12A4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO GND_BT_F GND_BT_F - @mlb_noldo_lib.MLB_NOLDO 44B4 IMVP6_SOFT IMVP6_SOFT - 58A4 58C7
FSB_D_L<13> FSB_D_L<13> - 7C4 12C6 FSB_RS_L<2> FSB_RS_L<2> - 7D6 12A4 GND_CHASSIS_CPU GND_CHASSIS_CPU - 6B8 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO IMVP6_UGATE1 IMVP6_UGATE1 - 58A8 58C6
FSB_D_L<14> FSB_D_L<14> - 7C4 12C6 FSB_SLPCPU_L FSB_SLPCPU_L - 7A3 12A4 GND_CHASSIS_FANSCREW GND_CHASSIS_FANSCREW - 6B8 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO IMVP6_UGATE2 IMVP6_UGATE2 - 58A6 58C6
FSB_D_L<15> FSB_D_L<15> - 7C4 12C6 FSB_TRDY_L FSB_TRDY_L - 7D6 12A4 GND_CHGR_SGND GND_CHGR_SGND - 66A5 66B7 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO IMVP6_VDIFF IMVP6_VDIFF - 58A4 58B7
C FSB_D_L<16> FSB_D_L<16> -
7C4 12C6 FWH_INIT_L FWH_INIT_L -
5C2 6B2 21C4 47C5 GND_IMVP6_SGND GND_IMVP6_SGND -
58A4 58B7 58C8
IMVP6_VDIFF_RC
IMVP6_VDIFF_RC - 58B7
C
FSB_D_L<17> FSB_D_L<17> - 7C4 12C6 SMC_CPU_INIT_3_3_L - 6B1 45D5 GND_SMC_AVSS GND_SMC_AVSS - 45C2 45C4 46B6 48A1 48B5 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO 48C1 61C1 62A5 66B1 66C2 IMVP6_VO IMVP6_VO - @mlb_noldo_lib.MLB_NOLDO 48C5 58A4 58B6
FSB_D_L<18> FSB_D_L<18> - 7B4 12C6 FWH_MFG_MODE FWH_MFG_MODE - 23A6 23C5 GND_SMC_LID_F GND_SMC_LID_F - 65A7 IMVP6_VO_R IMVP6_VO_R - 58B4
FSB_D_L<19> FSB_D_L<19> - 7B4 12C6 FWPWR_ACIN FWPWR_ACIN - 39C6 GPU_CRT_DDC_CLK GPU_CRT_DDC_CLK - 69B6 69D5 IMVP6_VO_R1 IMVP6_VO_R1 - 58A8
FSB_D_L<20> FSB_D_L<20> - 7B4 12C6 FWPWR_EN FWPWR_EN - @mlb_noldo_lib.MLB_NOLDO 39C5 GPU_CRT_DDC_DATA GPU_CRT_DDC_DATA - 69B6 69D5 IMVP6_VO_R2 IMVP6_VO_R2 - 58A6
@mlb_noldo_lib.MLB_NOLDO FWPWR_EN_L FWPWR_EN_L - 39C4 60C8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<21> FSB_D_L<21> - 7B4 12C6 @mlb_noldo_lib.MLB_NOLDO IDE_CSEL_PD IDE_CSEL_PD - 34B4 IMVP6_VR_TT IMVP6_VR_TT - 58C7
@mlb_noldo_lib.MLB_NOLDO FWPWR_EN_L_DIV FWPWR_EN_L_DIV - 39C5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<22> FSB_D_L<22> - 7B4 12C6 @mlb_noldo_lib.MLB_NOLDO IDE_IRQ14 IDE_IRQ14 - 21B6 34B6 IMVP6_VSEN IMVP6_VSEN - 58A4 58B5
@mlb_noldo_lib.MLB_NOLDO FWPWR_EN_L_R FWPWR_EN_L_R - 60C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<23> FSB_D_L<23> - 7B4 12C6 @mlb_noldo_lib.MLB_NOLDO IDE_PDA<0> IDE_PDA<0> - 21B5 34B5 IMVP6_VSUM IMVP6_VSUM - 58A4 58C6
@mlb_noldo_lib.MLB_NOLDO FWPWR_RUN FWPWR_RUN - 39C6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<24> FSB_D_L<24> - 7B4 12C6 @mlb_noldo_lib.MLB_NOLDO IDE_PDA<1> IDE_PDA<1> - 21B5 34B5 IMVP6_VSUM_R1 IMVP6_VSUM_R1 - 58A8
@mlb_noldo_lib.MLB_NOLDO FW_A_TPA_N FW_A_TPA_N - 38B3 39B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<25> FSB_D_L<25> - 7B4 12C6 @mlb_noldo_lib.MLB_NOLDO IDE_PDA<2> IDE_PDA<2> - 21B5 34B3 IMVP6_VSUM_R2 IMVP6_VSUM_R2 - 58A6
@mlb_noldo_lib.MLB_NOLDO FW_PORT0_TPA_N - 39B5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<26> FSB_D_L<26> - 7B4 12C6 @mlb_noldo_lib.MLB_NOLDO IDE_PDCS1_L IDE_PDCS1_L - 21B5 34B5 IMVP6_VW IMVP6_VW - @mlb_noldo_lib.MLB_NOLDO 58A4 58B7
@mlb_noldo_lib.MLB_NOLDO FW_A_TPA_P FW_A_TPA_P - 38B3 39B6 @mlb_noldo_lib.MLB_NOLDO IMVP_DPRSLPVR IMVP_DPRSLPVR - 58C7
FSB_D_L<27> FSB_D_L<27> - 7B4 12C6 @mlb_noldo_lib.MLB_NOLDO IDE_PDCS3_L IDE_PDCS3_L - 21B5 34B3 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO FW_PORT0_TPA_P - 39B5 @mlb_noldo_lib.MLB_NOLDO IMVP_VR_ON IMVP_VR_ON - 45D8 58C7
FSB_D_L<28> FSB_D_L<28> - 7B4 12C6 @mlb_noldo_lib.MLB_NOLDO IDE_PDD<0> IDE_PDD<0> - 21C5 34C5 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO FW_A_TPBIAS FW_A_TPBIAS - 38B3 39B6 @mlb_noldo_lib.MLB_NOLDO INT_PIRQA_L INT_PIRQA_L - 22A7 26C3
FSB_D_L<29> FSB_D_L<29> - 7B4 12C6 @mlb_noldo_lib.MLB_NOLDO IDE_PDD<1> IDE_PDD<1> - 21B5 34C5 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO FW_A_TPB_N FW_A_TPB_N - 38B3 39B6 @mlb_noldo_lib.MLB_NOLDO INT_PIRQB_L INT_PIRQB_L - 22A7 26C3
@mlb_noldo_lib.MLB_NOLDO FW_PORT0_TPB_N - 39B5 @mlb_noldo_lib.MLB_NOLDO INT_PIRQC_L INT_PIRQC_L - 22A7 26C3
@mlb_noldo_lib.MLB_NOLDO FW_A_TPB_P FW_A_TPB_P - 38B3 39B6 @mlb_noldo_lib.MLB_NOLDO INT_PIRQD_L INT_PIRQD_L - 22A7 26C3 38A5
B FSB_D_L<32> FSB_D_L<32> -
7C3 12C6 @mlb_noldo_lib.MLB_NOLDO
FW_PORT0_TPB_P - 39B5
IDE_PDD<4> IDE_PDD<4> -
21B5 34C5
INT_SERIRQ
INT_SERIRQ - 5C2 23C8 45C8 47C5 53C6 B
FSB_D_L<33> FSB_D_L<33> - 7C3 12C6 @mlb_noldo_lib.MLB_NOLDO IDE_PDD<5> IDE_PDD<5> - 21B5 34C5 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO FW_B_TPA_N FW_B_TPA_N - 6D2 38B3 @mlb_noldo_lib.MLB_NOLDO INVT_CHGND INVT_CHGND - 6D8 67C2
@mlb_noldo_lib.MLB_NOLDO FW_B_TPA_N_SPN - 5B7 6D1 @mlb_noldo_lib.MLB_NOLDO INV_BKLIGHT_PWM_L INV_BKLIGHT_PWM_L - 5B1 67D2
@mlb_noldo_lib.MLB_NOLDO FW_B_TPA_P FW_B_TPA_P - 6D2 38B3 @mlb_noldo_lib.MLB_NOLDO INV_GND INV_GND - @mlb_noldo_lib.MLB_NOLDO 5B1 67D2
FSB_D_L<36> FSB_D_L<36> - 7C3 12C6 @mlb_noldo_lib.MLB_NOLDO IDE_PDD<8> IDE_PDD<8> - 21B5 34C3 INV_PWREN_F_L INV_PWREN_F_L - 67D6
@mlb_noldo_lib.MLB_NOLDO FW_B_TPA_P_SPN - 5B7 6D1 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<37> FSB_D_L<37> - 7C3 12C6 @mlb_noldo_lib.MLB_NOLDO IDE_PDD<9> IDE_PDD<9> - 21B5 34C3 INV_PWREN_L INV_PWREN_L - 67D6
@mlb_noldo_lib.MLB_NOLDO FW_B_TPBIAS FW_B_TPBIAS - 6D2 38B3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<38> FSB_D_L<38> - 7C3 12C6 @mlb_noldo_lib.MLB_NOLDO IDE_PDD<10> IDE_PDD<10> - 21B5 34C3 IR_RX_OUT IR_RX_OUT - 35C6 41C6
@mlb_noldo_lib.MLB_NOLDO FW_B_TPBIAS_SPN - 5B7 6D1 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<39> FSB_D_L<39> - 7C3 12B6 @mlb_noldo_lib.MLB_NOLDO IDE_PDD<11> IDE_PDD<11> - 21B5 34C3 IR_RX_OUT_F IR_RX_OUT_F - 41C5
@mlb_noldo_lib.MLB_NOLDO FW_B_TPB_N FW_B_TPB_N - 6D2 38B3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<40> FSB_D_L<40> - 7C3 12B6 @mlb_noldo_lib.MLB_NOLDO IDE_PDD<12> IDE_PDD<12> - 21B5 34C3 ISENSE_CAL_EN ISENSE_CAL_EN - 45B8 48A8
@mlb_noldo_lib.MLB_NOLDO FW_B_TPB_N_SPN - 5B7 6D1 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<41> FSB_D_L<41> - 7C3 12B6 @mlb_noldo_lib.MLB_NOLDO IDE_PDD<13> IDE_PDD<13> - 21B5 34C3 ISENSE_CAL_EN_L ISENSE_CAL_EN_L - 48A7
@mlb_noldo_lib.MLB_NOLDO FW_B_TPB_P FW_B_TPB_P - 6D2 38B3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<42> FSB_D_L<42> - 7C3 12B6 @mlb_noldo_lib.MLB_NOLDO IDE_PDD<14> IDE_PDD<14> - 21B5 34C3 ISENSE_CAL_EN_LS5V ISENSE_CAL_EN_LS5V - 48A6
@mlb_noldo_lib.MLB_NOLDO FW_B_TPB_P_SPN - 5B7 6D1 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<43> FSB_D_L<43> - 7C3 12B6 @mlb_noldo_lib.MLB_NOLDO IDE_PDD<15> IDE_PDD<15> - 21B5 34C3 ITPRESET_L ITPRESET_L - 11B3
@mlb_noldo_lib.MLB_NOLDO FW_C_TPA_N FW_C_TPA_N - 6D2 38B3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<44> FSB_D_L<44> - 7C3 12B6 @mlb_noldo_lib.MLB_NOLDO IDE_PDDACK_L IDE_PDDACK_L - 21B6 34B3 ITP_TDO ITP_TDO - @mlb_noldo_lib.MLB_NOLDO 11B3
@mlb_noldo_lib.MLB_NOLDO FW_C_TPA_N_SPN - 5B7 6D1 @mlb_noldo_lib.MLB_NOLDO J2900_SA1 J2900_SA1 - 29A4
FSB_D_L<45> FSB_D_L<45> - 7C3 12B6 @mlb_noldo_lib.MLB_NOLDO IDE_PDDREQ IDE_PDDREQ - 21B6 34B6 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO FW_C_TPA_P FW_C_TPA_P - 6D2 38B3 @mlb_noldo_lib.MLB_NOLDO KBC_MDE KBC_MDE - @mlb_noldo_lib.MLB_NOLDO 45C2
FSB_D_L<46> FSB_D_L<46> - 7C3 12B6 @mlb_noldo_lib.MLB_NOLDO IDE_PDIORDY IDE_PDIORDY - 21B6 34B6 LCDVDD_PWREN_L LCDVDD_PWREN_L - 67B7
@mlb_noldo_lib.MLB_NOLDO FW_C_TPA_P_SPN - 5B7 6D1 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<47> FSB_D_L<47> - 7C3 12B6 @mlb_noldo_lib.MLB_NOLDO IDE_PDIOR_L IDE_PDIOR_L - 21B6 34C3 LCDVDD_PWREN_L_R LCDVDD_PWREN_L_R - 67B6
@mlb_noldo_lib.MLB_NOLDO FW_C_TPBIAS FW_C_TPBIAS - 6D2 38B3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
A FSB_D_L<48> FSB_D_L<48> -
7C3 12B6 @mlb_noldo_lib.MLB_NOLDO
FW_C_TPBIAS_SPN - 5B7 6D1
IDE_PDIOW_L IDE_PDIOW_L -
21B6 34B5 LPC_AD<0> LPC_AD<0> -
5D2 21D4 45D8 47C6 53C6 A
FSB_D_L<49> FSB_D_L<49> - 7C3 12B6 @mlb_noldo_lib.MLB_NOLDO IDE_RESET_L IDE_RESET_L - 23A3 34C5 LPC_AD<1> LPC_AD<1> - 5D2 21D4 45D8 47C6 53C6
@mlb_noldo_lib.MLB_NOLDO FW_C_TPB_N FW_C_TPB_N - 6D2 38B3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<50> FSB_D_L<50> - 7B3 12B6 @mlb_noldo_lib.MLB_NOLDO IMVP6_BOOT1 IMVP6_BOOT1 - 58A8 58C6 LPC_AD<2> LPC_AD<2> - 5C2 21D4 45D8 47C5 53C6
@mlb_noldo_lib.MLB_NOLDO FW_C_TPB_N_SPN - 5B7 6D1 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<51> FSB_D_L<51> - 7B3 12B6 @mlb_noldo_lib.MLB_NOLDO IMVP6_BOOT1_RC IMVP6_BOOT1_RC - 58D5 LPC_AD<3> LPC_AD<3> - 5C2 21D4 45D8 47C5 53C6
@mlb_noldo_lib.MLB_NOLDO FW_C_TPB_P FW_C_TPB_P - 6D2 38B3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<52> FSB_D_L<52> - 7B3 12B6 @mlb_noldo_lib.MLB_NOLDO IMVP6_BOOT2 IMVP6_BOOT2 - 58A6 58C6 LPC_FRAME_L LPC_FRAME_L - 5C2 21C5 45C8 47C6 53C6
@mlb_noldo_lib.MLB_NOLDO FW_C_TPB_P_SPN - 5B7 6D1 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<53> FSB_D_L<53> - 7B3 12B6 @mlb_noldo_lib.MLB_NOLDO IMVP6_BOOT2_RC IMVP6_BOOT2_RC - 58C5 LVDS_A_CLK_N LVDS_A_CLK_N - 13D5 67B2
@mlb_noldo_lib.MLB_NOLDO FW_PCI_IDSEL FW_PCI_IDSEL - 38A5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<54> FSB_D_L<54> - 7B3 12B6 @mlb_noldo_lib.MLB_NOLDO IMVP6_COMP IMVP6_COMP - 5D7 58A4 58B7 LVDS_A_CLK_P LVDS_A_CLK_P - 13C5 67B2
@mlb_noldo_lib.MLB_NOLDO FW_PCI_RST_L FW_PCI_RST_L - 38A5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
102
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
LVDS_A_DATA_N<0> LVDS_A_DATA_N<0> - 13C5 67B2 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO MEM_A_DM<1> MEM_A_DM<1> - 15D5 28D4 MEM_A_DQ<55> MEM_A_DQ<55> - 15B7 28A6 MEM_B_DQ<4> MEM_B_DQ<4> - 15D4 29D4
@mlb_noldo_lib.MLB_NOLDO MEM_A_DM<2> MEM_A_DM<2> - 15D5 28C6 MEM_A_DQ<56> MEM_A_DQ<56> - 15B7 28A6 MEM_B_DQ<5> MEM_B_DQ<5> - 15D4 29D6
@mlb_noldo_lib.MLB_NOLDO MEM_A_DM<3> MEM_A_DM<3> - 15C5 28C4 MEM_A_DQ<57> MEM_A_DQ<57> - 15B7 28A6 MEM_B_DQ<6> MEM_B_DQ<6> - 15D4 29D4
LVDS_A_DATA_P<0> LVDS_A_DATA_P<0> - 13C5 67B2 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO MEM_A_DM<4> MEM_A_DM<4> - 15C5 28B4 MEM_A_DQ<58> MEM_A_DQ<58> - 15B7 28A6 MEM_B_DQ<7> MEM_B_DQ<7> - 15D4 29D4
@mlb_noldo_lib.MLB_NOLDO MEM_A_DM<5> MEM_A_DM<5> - 15C5 28B6 MEM_A_DQ<59> MEM_A_DQ<59> - 15B7 28A4 MEM_B_DQ<8> MEM_B_DQ<8> - 15C4 29D6
@mlb_noldo_lib.MLB_NOLDO MEM_A_DM<6> MEM_A_DM<6> - 15C5 28A6 MEM_A_DQ<60> MEM_A_DQ<60> - 15A7 28A4 MEM_B_DQ<9> MEM_B_DQ<9> - 15C4 29D4
LVDS_BKLTCTL LVDS_BKLTCTL - 13D5 67C6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO MEM_A_DM<7> MEM_A_DM<7> - 15C5 28A4 MEM_A_DQ<61> MEM_A_DQ<61> - 15A7 28A4 MEM_B_DQ<10> MEM_B_DQ<10> - 15C4 29D6
D LVDS_BKLTEN LVDS_BKLTEN -
13D5 67D7
MEM_A_DQ<0>
MEM_A_DQ<0> - 15D7 28D4 MEM_A_DQ<62>
MEM_A_DQ<62> - 15A7 28A4 MEM_B_DQ<11>
MEM_B_DQ<11> - 15C4 29D4
D
LVDS_B_CLK_N LVDS_B_CLK_N - 6D6 13C5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<1> MEM_A_DQ<1> - 15D7 28D4 MEM_A_DQ<63> MEM_A_DQ<63> - 15A7 28A6 MEM_B_DQ<12> MEM_B_DQ<12> - 15C4 29D6
LVDS_B_CLK_N_SPN - 5A7 6D5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<2> MEM_A_DQ<2> - 15D7 28D6 MEM_A_DQS_N<0> MEM_A_DQS_N<0> - 15C5 28D6 MEM_B_DQ<13> MEM_B_DQ<13> - 15C4 29D6
LVDS_B_CLK_P LVDS_B_CLK_P - 6D6 13C5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<3> MEM_A_DQ<3> - 15D7 28D6 MEM_A_DQS_N<1> MEM_A_DQS_N<1> - 15C5 28D6 MEM_B_DQ<14> MEM_B_DQ<14> - 15C4 29D4
LVDS_B_CLK_P_SPN - 5A7 6D5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<4> MEM_A_DQ<4> - 15D7 28D4 MEM_A_DQS_N<2> MEM_A_DQS_N<2> - 15C5 28C4 MEM_B_DQ<15> MEM_B_DQ<15> - 15C4 29D4
LVDS_B_DATA_N<0> LVDS_B_DATA_N<0> - 6D6 13C5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<5> MEM_A_DQ<5> - 15D7 28D4 MEM_A_DQS_N<3> MEM_A_DQS_N<3> - 15C5 28C6 MEM_B_DQ<16> MEM_B_DQ<16> - 15C4 29C4
LVDS_B_DATA_N0_SPN - 5A7 6D5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<6> MEM_A_DQ<6> - 15D7 28D6 MEM_A_DQS_N<4> MEM_A_DQS_N<4> - 15C5 28B6 MEM_B_DQ<17> MEM_B_DQ<17> - 15C4 29C6
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<7> MEM_A_DQ<7> - 15D7 28D6 MEM_A_DQS_N<5> MEM_A_DQS_N<5> - 15C5 28B4 MEM_B_DQ<18> MEM_B_DQ<18> - 15C4 29C6
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<8> MEM_A_DQ<8> - 15C7 28D6 MEM_A_DQS_N<6> MEM_A_DQS_N<6> - 15C5 28A4 MEM_B_DQ<19> MEM_B_DQ<19> - 15C4 29C4
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<9> MEM_A_DQ<9> - 15C7 28D6 MEM_A_DQS_N<7> MEM_A_DQS_N<7> - 15C5 28A6 MEM_B_DQ<20> MEM_B_DQ<20> - 15C4 29C6
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<10> MEM_A_DQ<10> - 15C7 28D6 MEM_A_DQS_P<0> MEM_A_DQS_P<0> - 15C5 28D6 MEM_B_DQ<21> MEM_B_DQ<21> - 15C4 29C4
LVDS_B_DATA_P<0> LVDS_B_DATA_P<0> - 6D6 13C5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<11> MEM_A_DQ<11> - 15C7 28D4 MEM_A_DQS_P<1> MEM_A_DQS_P<1> - 15C5 28D6 MEM_B_DQ<22> MEM_B_DQ<22> - 15C4 29C6
LVDS_B_DATA_P0_SPN - 6D5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<12> MEM_A_DQ<12> - 15C7 28D4 MEM_A_DQS_P<2> MEM_A_DQS_P<2> - 15C5 28C4 MEM_B_DQ<23> MEM_B_DQ<23> - 15C4 29C4
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<13> MEM_A_DQ<13> - 15C7 28D6 MEM_A_DQS_P<3> MEM_A_DQS_P<3> - 15C5 28C6 MEM_B_DQ<24> MEM_B_DQ<24> - 15C4 29C4
LVDS_B_DATA_P1_SPN - 5A7 6D5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<14> MEM_A_DQ<14> - 15C7 28D4 MEM_A_DQS_P<4> MEM_A_DQS_P<4> - 15C5 28B6 MEM_B_DQ<25> MEM_B_DQ<25> - 15C4 29C4
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<15> MEM_A_DQ<15> - 15C7 28D4 MEM_A_DQS_P<5> MEM_A_DQS_P<5> - 15C5 28B4 MEM_B_DQ<26> MEM_B_DQ<26> - 15C4 29C4
C LVDS_B_DATA_P2_SPN -
5A7 6D5
MEM_A_DQ<16>
MEM_A_DQ<16> - 15C7 28C4 MEM_A_DQS_P<6>
MEM_A_DQS_P<6> - 15C5 28A4 MEM_B_DQ<27>
MEM_B_DQ<27> - 15C4 29C6
C
LVDS_CLKCTLA LVDS_CLKCTLA - 13D5 67A7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<17> MEM_A_DQ<17> - 15C7 28C6 MEM_A_DQS_P<7> MEM_A_DQS_P<7> - 15C5 28A6 MEM_B_DQ<28> MEM_B_DQ<28> - 15C4 29C4
LVDS_CLKCTLB LVDS_CLKCTLB - 13D5 67A7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<18> MEM_A_DQ<18> - 15C7 28C4 MEM_A_RAS_L MEM_A_RAS_L - 15B5 28B4 30B6 MEM_B_DQ<29> MEM_B_DQ<29> - 15C4 29C6
LVDS_DDC_CLK LVDS_DDC_CLK - 13D5 67B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<19> MEM_A_DQ<19> - 15C7 28C6 MEM_A_WE_L MEM_A_WE_L - 15B5 28B6 30B6 MEM_B_DQ<30> MEM_B_DQ<30> - 15C4 29C6
LVDS_DDC_DATA LVDS_DDC_DATA - 13D5 67B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO MEM_A_DQ<20> MEM_A_DQ<20> - 15C7 28C6 MEM_B_A<0> MEM_B_A<0> - 15C2 29B4 30B5 MEM_B_DQ<31> MEM_B_DQ<31> - 15C4 29C6
LVDS_IBG LVDS_IBG - @mlb_noldo_lib.MLB_NOLDO 13D5 67A6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
LVDS_VDDEN LVDS_VDDEN - 13D5 67B7 MEM_A_DQ<21> MEM_A_DQ<21> - 15C7 28C4 MEM_B_A<1> MEM_B_A<1> - 15C2 29B6 30B5 MEM_B_DQ<32> MEM_B_DQ<32> - 15C4 29A6
MAX9705_L_N MAX9705_L_N - 55B6 MEM_A_DQ<22> MEM_A_DQ<22> - 15C7 28C6 MEM_B_A<2> MEM_B_A<2> - 15C2 29B4 30B5 MEM_B_DQ<33> MEM_B_DQ<33> - 15C4 29A4
MAX9705_R_N MAX9705_R_N - 55C6 MEM_A_DQ<23> MEM_A_DQ<23> - 15C7 28C4 MEM_B_A<3> MEM_B_A<3> - 15B2 29B6 30B5 MEM_B_DQ<34> MEM_B_DQ<34> - 15B4 29A6
MAX9705_SUB_N MAX9705_SUB_N - 55A6 MEM_A_DQ<24> MEM_A_DQ<24> - 15C7 28D6 MEM_B_A<4> MEM_B_A<4> - 15B2 29B4 30B5 MEM_B_DQ<35> MEM_B_DQ<35> - 15B4 29A4
MAX9890_CEXT MAX9890_CEXT - 57B1 MEM_A_DQ<25> MEM_A_DQ<25> - 15C7 28C6 MEM_B_A<5> MEM_B_A<5> - 15B2 29B6 30B5 MEM_B_DQ<36> MEM_B_DQ<36> - 15B4 29A4
MAX9890_INL MAX9890_INL - 57B2 MEM_A_DQ<26> MEM_A_DQ<26> - 15C7 28C4 MEM_B_A<6> MEM_B_A<6> - 15B2 29C4 30B5 MEM_B_DQ<37> MEM_B_DQ<37> - 15B4 29A6
MAX9890_INR MAX9890_INR - 57B2 MEM_A_DQ<27> MEM_A_DQ<27> - 15C7 28C6 MEM_B_A<7> MEM_B_A<7> - 15B2 29C4 30B5 MEM_B_DQ<38> MEM_B_DQ<38> - 15B4 29A6
MEMVTT_EN MEMVTT_EN - 31B5 MEM_A_DQ<28> MEM_A_DQ<28> - 15C7 28C4 MEM_B_A<8> MEM_B_A<8> - 15B2 29C6 30B5 MEM_B_DQ<39> MEM_B_DQ<39> - 15B4 29A4
MEMVTT_VREF MEMVTT_VREF - 31C4 MEM_A_DQ<29> MEM_A_DQ<29> - 15C7 28D4 MEM_B_A<9> MEM_B_A<9> - 15B2 29C6 30B5 MEM_B_DQ<40> MEM_B_DQ<40> - 15B4 29A4
MEM_A_A<0> MEM_A_A<0> - 15C5 28B4 MEM_A_DQ<30> MEM_A_DQ<30> - 15C7 28C4 MEM_B_A<10> MEM_B_A<10> - 15B2 29B6 30B5 MEM_B_DQ<41> MEM_B_DQ<41> - 15B4 29A6
MEM_A_A<13..0> MEM_A_A<13..0> - 30C6 MEM_A_DQ<31> MEM_A_DQ<31> - 15C7 28C6 MEM_B_A<11> MEM_B_A<11> - 15B2 29C4 30A5 MEM_B_DQ<42> MEM_B_DQ<42> - 15B4 29A4
B MEM_A_A<1>
MEM_A_A<1> - 15C5 28B6 MEM_A_DQ<32>
MEM_A_DQ<32> - 15C7 28B6 MEM_B_A<12>
MEM_B_A<12> - 15B2 29C6 30A5 MEM_B_DQ<43>
MEM_B_DQ<43> - 15B4 29A6 B
MEM_A_A<2> MEM_A_A<2> - 15C5 28B4 MEM_A_DQ<33> MEM_A_DQ<33> - 15C7 28B4 MEM_B_A<13> MEM_B_A<13> - 15B2 29B4 30A5 MEM_B_DQ<44> MEM_B_DQ<44> - 15B4 29A6
MEM_A_A<3> MEM_A_A<3> - 15B5 28B6 MEM_A_DQ<34> MEM_A_DQ<34> - 15B7 28B4 MEM_B_A<14> MEM_B_A<14> - 6A4 29C4 MEM_B_DQ<45> MEM_B_DQ<45> - 15B4 29A6
MEM_A_A<4> MEM_A_A<4> - 15B5 28B4 MEM_A_DQ<35> MEM_A_DQ<35> - 15B7 28B4 MEM_B_A14_SPN - 6A3 MEM_B_DQ<46> MEM_B_DQ<46> - 15B4 29A4
MEM_A_A<5> MEM_A_A<5> - 15B5 28B6 MEM_A_DQ<36> MEM_A_DQ<36> - 15B7 28B4 MEM_B_A<15> MEM_B_A<15> - 6A4 29C4 MEM_B_DQ<47> MEM_B_DQ<47> - 15B4 29A4
MEM_A_A<6> MEM_A_A<6> - 15B5 28C4 MEM_A_DQ<37> MEM_A_DQ<37> - 15B7 28B6 MEM_B_A15_SPN - 6A3 MEM_B_DQ<48> MEM_B_DQ<48> - 15B4 29B4
MEM_A_A<7> MEM_A_A<7> - 15B5 28C4 MEM_A_DQ<38> MEM_A_DQ<38> - 15B7 28B6 MEM_B_BS<0> MEM_B_BS<0> - 15D2 29B6 MEM_B_DQ<49> MEM_B_DQ<49> - 15B4 29A6
MEM_A_A<8> MEM_A_A<8> - 15B5 28C6 MEM_A_DQ<39> MEM_A_DQ<39> - 15B7 28B6 MEM_B_BS<2..0> MEM_B_BS<2..0> - 30A6 MEM_B_DQ<50> MEM_B_DQ<50> - 15B4 29B6
MEM_A_A<9> MEM_A_A<9> - 15B5 28C6 MEM_A_DQ<40> MEM_A_DQ<40> - 15B7 28B4 MEM_B_BS<1> MEM_B_BS<1> - 15D2 29B4 MEM_B_DQ<51> MEM_B_DQ<51> - 15B4 29A4
MEM_A_A<10> MEM_A_A<10> - 15B5 28B6 MEM_A_DQ<41> MEM_A_DQ<41> - 15B7 28B6 MEM_B_BS<2> MEM_B_BS<2> - 15D2 29C6 MEM_B_DQ<52> MEM_B_DQ<52> - 15B4 29A6
MEM_A_A<11> MEM_A_A<11> - 15B5 28C4 MEM_A_DQ<42> MEM_A_DQ<42> - 15B7 28A4 MEM_B_CAS_L MEM_B_CAS_L - 15D2 29B6 30A6 MEM_B_DQ<53> MEM_B_DQ<53> - 15B4 29B4
MEM_A_A<12> MEM_A_A<12> - 15B5 28C6 MEM_A_DQ<43> MEM_A_DQ<43> - 15B7 28A6 MEM_B_DM<0> MEM_B_DM<0> - 15D2 29D4 MEM_B_DQ<54> MEM_B_DQ<54> - 15B4 29A4
MEM_A_A<13> MEM_A_A<13> - 15B5 28B4 MEM_A_DQ<44> MEM_A_DQ<44> - 15B7 28B6 MEM_B_DM<1> MEM_B_DM<1> - 15D2 29D4 MEM_B_DQ<55> MEM_B_DQ<55> - 15B4 29B6
MEM_A_A<14> MEM_A_A<14> - 6A4 28C4 MEM_A_DQ<45> MEM_A_DQ<45> - 15B7 28B4 MEM_B_DM<2> MEM_B_DM<2> - 15D2 29C4 MEM_B_DQ<56> MEM_B_DQ<56> - 15B4 29B4
MEM_A_A14_SPN - 6A3 MEM_A_DQ<46> MEM_A_DQ<46> - 15B7 28A4 MEM_B_DM<3> MEM_B_DM<3> - 15C2 29C6 MEM_B_DQ<57> MEM_B_DQ<57> - 15B4 29B6
MEM_A_A<15> MEM_A_A<15> - 6A4 28C4 MEM_A_DQ<47> MEM_A_DQ<47> - 15B7 28A6 MEM_B_DM<4> MEM_B_DM<4> - 15C2 29A4 MEM_B_DQ<58> MEM_B_DQ<58> - 15B4 29B6
A @mlb_noldo_lib.MLB_NOLDO
MEM_A_A15_SPN - 6A3 MEM_A_DQ<48>
MEM_A_DQ<48> - 15B7 28A6 MEM_B_DM<5>
MEM_B_DM<5> - 15C2 29A6 MEM_B_DQ<59>
MEM_B_DQ<59> - 15B4 29B4
A
MEM_A_BS<0> MEM_A_BS<0> - 15D5 28B6 MEM_A_DQ<49> MEM_A_DQ<49> - 15B7 28A6 MEM_B_DM<6> MEM_B_DM<6> - 15C2 29A6 MEM_B_DQ<60> MEM_B_DQ<60> - 15A4 29B6
MEM_A_BS<2..0> MEM_A_BS<2..0> - 30C6 MEM_A_DQ<50> MEM_A_DQ<50> - 15B7 28A4 MEM_B_DM<7> MEM_B_DM<7> - 15C2 29B4 MEM_B_DQ<61> MEM_B_DQ<61> - 15A4 29B4
MEM_A_BS<1> MEM_A_BS<1> - 15D5 28B4 MEM_A_DQ<51> MEM_A_DQ<51> - 15B7 28A4 MEM_B_DQ<0> MEM_B_DQ<0> - 15D4 29D4 MEM_B_DQ<62> MEM_B_DQ<62> - 15A4 29B6
MEM_A_BS<2> MEM_A_BS<2> - 15D5 28C6 MEM_A_DQ<52> MEM_A_DQ<52> - 15B7 28A6 MEM_B_DQ<1> MEM_B_DQ<1> - 15D4 29D6 MEM_B_DQ<63> MEM_B_DQ<63> - 15A4 29B4
MEM_A_CAS_L MEM_A_CAS_L - 15D5 28B6 30B6 MEM_A_DQ<53> MEM_A_DQ<53> - 15B7 28A4 MEM_B_DQ<2> MEM_B_DQ<2> - 15D4 29D6 MEM_B_DQS_N<0> MEM_B_DQS_N<0> - 15C2 29D6
MEM_A_DM<0> MEM_A_DM<0> - 15D5 28D4 MEM_A_DQ<54> MEM_A_DQ<54> - 15B7 28A4 MEM_B_DQ<3> MEM_B_DQ<3> - 15D4 29D6 MEM_B_DQS_N<1> MEM_B_DQS_N<1> - 15C2 29D6
103
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
@mlb_noldo_lib.MLB_NOLDO NB_CFG<3> NB_CFG<3> - 6D4 14C6 ONEWIRE_DCIN_DIV ONEWIRE_DCIN_DIV - 65C5 PCIE_F_R2D_C_N PCIE_F_R2D_C_N - 6C4 22C4
MEM_B_DQS_N<2> MEM_B_DQS_N<2> - 15C2 29C6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO TP_NB_CFG3 - 6D3 ONEWIRE_EN ONEWIRE_EN - 65C7 PCIE_F_R2D_C_N_SPN - 6C3
MEM_B_DQS_N<3> MEM_B_DQS_N<3> - 15C2 29C4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_CFG<4> NB_CFG<4> - 6D4 14C6 ONEWIRE_ESD ONEWIRE_ESD - 65C5 PCIE_F_R2D_C_P PCIE_F_R2D_C_P - 6B4 22C4
MEM_B_DQS_N<4> MEM_B_DQS_N<4> - 15C2 29A6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO TP_NB_CFG4 - 6D3 ONEWIRE_OV ONEWIRE_OV - 65C6 PCIE_F_R2D_C_P_SPN - 6B3
MEM_B_DQS_N<5> MEM_B_DQS_N<5> - 15C2 29A4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_CFG<5> NB_CFG<5> - 14C6 20C7 ONEWIRE_PU_EN ONEWIRE_PU_EN - 65B7 PCIE_WAKE_L PCIE_WAKE_L - 23C8 36C6 43C6
MEM_B_DQS_N<6> MEM_B_DQS_N<6> - 15C2 29B4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_CFG<6> NB_CFG<6> - 6D4 14C6 ONEWIRE_PU_EN_L ONEWIRE_PU_EN_L - 65C8 PCI_AD<0> PCI_AD<0> - 22B7 38C5
MEM_B_DQS_N<7> MEM_B_DQS_N<7> - 15C2 29B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO TP_NB_CFG6 - 6D3 ONEWIRE_PWR_EN_L ONEWIRE_PWR_EN_L - 65C7 PCI_AD<1> PCI_AD<1> - 22B7 38C5
MEM_B_DQS_P<0> MEM_B_DQS_P<0> - 15C2 29D6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
D MEM_B_DQS_P<1>
MEM_B_DQS_P<1> - 15C2 29D6
NB_CFG<7> NB_CFG<7> -
14C6 20C7 ONEWIRE_PWR_EN_L_DIV ONEWIRE_PWR_EN_L_DIV -
65C6 PCI_AD<2> PCI_AD<2> -
22B7 38C5 D
@mlb_noldo_lib.MLB_NOLDO NB_CFG<8> NB_CFG<8> - 6D4 14C6 P0V52_SMC_LSREF P0V52_SMC_LSREF - 46D3 PCI_AD<3> PCI_AD<3> - 22B7 38C5
MEM_B_DQS_P<2> MEM_B_DQS_P<2> - 15C2 29C6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO TP_NB_CFG8 - 6D3 P1V8S0_EN_L_RC P1V8S0_EN_L_RC - 63A5 PCI_AD<4> PCI_AD<4> - 22B7 38C5
MEM_B_DQS_P<3> MEM_B_DQS_P<3> - 15C2 29C4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_CFG<9> NB_CFG<9> - 14C6 20B7 P3V3S0_EN_RC P3V3S0_EN_RC - 63B5 PCI_AD<5> PCI_AD<5> - 22B7 38C5
MEM_B_DQS_P<4> MEM_B_DQS_P<4> - 15C2 29A6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_CFG<10> NB_CFG<10> - 6D4 14C6 P3V3S3_EN_L_RC P3V3S3_EN_L_RC - 63C5 PCI_AD<6> PCI_AD<6> - 22B7 38C5
@mlb_noldo_lib.MLB_NOLDO TP_NB_CFG10 - 6D3 P3V42G3H5_BOOST P3V42G3H5_BOOST - 63D2 PCI_AD<7> PCI_AD<7> - 22B7 38C5
@mlb_noldo_lib.MLB_NOLDO NB_CFG<11> NB_CFG<11> - 6D4 14C6 P3V42G3H_FB P3V42G3H_FB - 5D7 63D2 PCI_AD<8> PCI_AD<8> - 22B7 38C5
MEM_B_DQS_P<7> MEM_B_DQS_P<7> - 15C2 29B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO TP_NB_CFG11 - 6D3 P5VS0_EN_RC P5VS0_EN_RC - 63C5 PCI_AD<9> PCI_AD<9> - 22B7 38C5
MEM_B_RAS_L MEM_B_RAS_L - 15B2 29B4 30A6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_CFG<12> NB_CFG<12> - 6D4 14C6 P5VS3_EN_L_RC P5VS3_EN_L_RC - 63D5 PCI_AD<10> PCI_AD<10> - 22B7 38C5
MEM_B_WE_L MEM_B_WE_L - 15B2 29B6 30A6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO TP_NB_CFG12 - 6D3 PATA_PWR_EN_L PATA_PWR_EN_L - 23B3 23C3 PCI_AD<11> PCI_AD<11> - 22B7 38C5
MEM_CKE<0> MEM_CKE<0> - 14C4 28C6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_CFG<13> NB_CFG<13> - 6D4 14C6 PBUS_S0_SMC_VSENSE PBUS_S0_SMC_VSENSE - 48C6 PCI_AD<12> PCI_AD<12> - 22B7 38B5
MEM_CKE<3..0> MEM_CKE<3..0> - 30D6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO TP_NB_CFG13 - 6D3 PBUS_SMC_VSENSE_EN PBUS_SMC_VSENSE_EN - 48C8 PCI_AD<13> PCI_AD<13> - 22B7 38B5
@mlb_noldo_lib.MLB_NOLDO NB_CFG<14> NB_CFG<14> - 6D4 14C6 PBUS_SMC_VSENSE_EN_L PBUS_SMC_VSENSE_EN_L - 48C7 PCI_AD<14> PCI_AD<14> - 22B7 38B5
@mlb_noldo_lib.MLB_NOLDO TP_NB_CFG14 - 6D3 PCIE_A_D2R_C_N PCIE_A_D2R_C_N - 36D6 PCI_AD<15> PCI_AD<15> - 22B7 38B5
@mlb_noldo_lib.MLB_NOLDO NB_CFG<15> NB_CFG<15> - 6D4 14C6 PCIE_A_D2R_C_P PCIE_A_D2R_C_P - 36D6 PCI_AD<16> PCI_AD<16> - 22B7 38B5
MEM_CLK_N<0> MEM_CLK_N<0> - 14D4 28D4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO TP_NB_CFG15 - 6D3 PCIE_A_D2R_N PCIE_A_D2R_N - 22D4 36D5 PCI_AD<17> PCI_AD<17> - 22B7 38B5
MEM_CLK_N<1> MEM_CLK_N<1> - 14D4 28A4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
C MEM_CLK_N<2>
MEM_CLK_N<2> - 14D4 29A4
NB_CFG<16> NB_CFG<16> -
14C6 20C5 PCIE_A_D2R_P PCIE_A_D2R_P -
22D4 36D5 PCI_AD<18> PCI_AD<18> -
22B7 38B5
C
@mlb_noldo_lib.MLB_NOLDO NB_CFG<17> NB_CFG<17> - 6D4 14C6 PCIE_A_R2D_C_N PCIE_A_R2D_C_N - 22D4 36C5 PCI_AD<19> PCI_AD<19> - 22A7 38B6
MEM_CLK_N<3> MEM_CLK_N<3> - 14D4 29D4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO TP_NB_CFG17 - 6D3 PCIE_A_R2D_C_P PCIE_A_R2D_C_P - 22D4 36C5 PCI_AD<20> PCI_AD<20> - 22A7 38B5
MEM_CLK_P<0> MEM_CLK_P<0> - 14D4 28D4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_CFG<18> NB_CFG<18> - 14C6 20B5 PCIE_A_R2D_N PCIE_A_R2D_N - 36C6 PCI_AD<21> PCI_AD<21> - 22A7 38B5
MEM_CLK_P<1> MEM_CLK_P<1> - 14D4 28A4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_CFG<19> NB_CFG<19> - 14C6 20B5 PCIE_A_R2D_P PCIE_A_R2D_P - 36C6 PCI_AD<22> PCI_AD<22> - 22A7 38B5
MEM_CLK_P<2> MEM_CLK_P<2> - 14D4 29A4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_CFG<20> NB_CFG<20> - 14B6 20A5 PCIE_B_D2R_N PCIE_B_D2R_N - 22D4 43C7 PCI_AD<23> PCI_AD<23> - 22A7 38B5
MEM_CLK_P<3> MEM_CLK_P<3> - 14D4 29D4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_CLK100M_GCLKIN_N NB_CLK100M_GCLKIN_N - 14C4 33B2 33C4 PCIE_B_D2R_P PCIE_B_D2R_P - 22D4 43C7 PCI_AD<24> PCI_AD<24> - 22A7 38B5
MEM_CS_L<0> MEM_CS_L<0> - 14C4 28B4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_CLK100M_GCLKIN_P NB_CLK100M_GCLKIN_P - 14C4 33C2 33C4 PCIE_B_R2D_C_N PCIE_B_R2D_C_N - 22D4 43B7 PCI_AD<25> PCI_AD<25> - 22A7 38B5
MEM_CS_L<3..0> MEM_CS_L<3..0> - 30D6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_CLK_DREFCLKIN_N NB_CLK_DREFCLKIN_N - 14C4 33B3 33C2 PCIE_B_R2D_C_P PCIE_B_R2D_C_P - 22D4 43B7 PCI_AD<26> PCI_AD<26> - 22A7 38B5
@mlb_noldo_lib.MLB_NOLDO NB_CLK_DREFCLKIN_P NB_CLK_DREFCLKIN_P - 14C4 33B3 33C2 PCIE_B_R2D_N PCIE_B_R2D_N - 43B6 PCI_AD<27> PCI_AD<27> - 22A7 38B5
@mlb_noldo_lib.MLB_NOLDO NB_CLK_DREFSSCLKIN_N NB_CLK_DREFSSCLKIN_N - 14C4 33A4 33C2 PCIE_B_R2D_P PCIE_B_R2D_P - 43B6 PCI_AD<28> PCI_AD<28> - 22A7 38B5
@mlb_noldo_lib.MLB_NOLDO NB_CLK_DREFSSCLKIN_P NB_CLK_DREFSSCLKIN_P - 14B4 33A3 33C2 PCIE_C_D2R_N PCIE_C_D2R_N - 6C4 22D4 PCI_AD<29> PCI_AD<29> - 22A7 38B5
MEM_ISENSE MEM_ISENSE - 61C2 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_FSB_VREF NB_FSB_VREF - 12C4 PCIE_C_D2R_N_SPN - 6C3 PCI_AD<30> PCI_AD<30> - 22A7 38B5
MEM_ISENSE_R1_N MEM_ISENSE_R1_N - 61C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_FSB_XRCOMP NB_FSB_XRCOMP - 12A6 PCIE_C_D2R_P PCIE_C_D2R_P - 6C4 22D4 PCI_AD<31> PCI_AD<31> - 22A7 38B5
MEM_ISENSE_R1_P MEM_ISENSE_R1_P - 61C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_FSB_XSCOMP NB_FSB_XSCOMP - 12A6 PCIE_C_D2R_P_SPN - 6C3 PCI_CLK_FW PCI_CLK_FW - 33D6 38A5
MEM_ISENSE_R2 MEM_ISENSE_R2 - 61C2 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_FSB_XSWING NB_FSB_XSWING - 12A6 PCIE_C_R2D_C_N PCIE_C_R2D_C_N - 6C4 22D4 PCI_CLK_PORT80_LPC PCI_CLK_PORT80_LPC - 5C2 33D6 47C5
MEM_ISENSE_VCC MEM_ISENSE_VCC - 61C2 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
B MEM_ODT<0>
MEM_ODT<0> - 14C4 28B4
NB_FSB_YRCOMP NB_FSB_YRCOMP -
12A6 PCIE_C_R2D_C_N_SPN -
6C3 PCI_CLK_SB PCI_CLK_SB -
22A6 33D6
B
@mlb_noldo_lib.MLB_NOLDO NB_FSB_YSCOMP NB_FSB_YSCOMP - 12A6 PCIE_C_R2D_C_P PCIE_C_R2D_C_P - 6C4 22D4 PCI_CLK_SMC PCI_CLK_SMC - 33D6 45C8
MEM_ODT<3..0> MEM_ODT<3..0> - 30D6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_FSB_YSWING NB_FSB_YSWING - 12A6 PCIE_C_R2D_C_P_SPN - 6C3 PCI_CLK_TPM PCI_CLK_TPM - 33D6 53C6
MEM_ODT<1> MEM_ODT<1> - 14C4 28B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_ISENSE NB_ISENSE - 62A6 PCIE_D_D2R_N PCIE_D_D2R_N - 6C4 22D4 PCI_C_BE_L<0> PCI_C_BE_L<0> - 22B6 38B5
@mlb_noldo_lib.MLB_NOLDO NB_ISENSE_R1_N NB_ISENSE_R1_N - 62A7 PCIE_D_D2R_N_SPN - 6C3 PCI_C_BE_L<1> PCI_C_BE_L<1> - 22B6 38B5
@mlb_noldo_lib.MLB_NOLDO NB_ISENSE_R1_P NB_ISENSE_R1_P - 62A7 PCIE_D_D2R_P PCIE_D_D2R_P - 6C4 22D4 PCI_C_BE_L<2> PCI_C_BE_L<2> - 22B6 38B5
MEM_RCOMP MEM_RCOMP - 14C4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_ISENSE_R2 NB_ISENSE_R2 - 62A6 PCIE_D_D2R_P_SPN - 6C3 PCI_C_BE_L<3> PCI_C_BE_L<3> - 22B6 38B5
MEM_RCOMP_L MEM_RCOMP_L - 14C4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_ISENSE_VCC NB_ISENSE_VCC - 62A6 PCIE_D_R2D_C_N PCIE_D_R2D_C_N - 6C4 22D4 PCI_DEVSEL_L PCI_DEVSEL_L - 22A6 26D3 38A5
MEM_VREF_A MEM_VREF_A - 28D1 28D7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_RIGHT_DOWN_SCREW NB_RIGHT_DOWN_SCREW - 6A8 PCIE_D_R2D_C_N_SPN - 6C3 PCI_FRAME_L PCI_FRAME_L - 22A7 26D3 38A5
MEM_VREF_B MEM_VREF_B - 29D1 29D7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_RST_IN_L_R NB_RST_IN_L_R - 14B6 PCIE_D_R2D_C_P PCIE_D_R2D_C_P - 6C4 22D4 PCI_GNT3_L PCI_GNT3_L - 22B6 38A5
MEM_VREF_NB_0 MEM_VREF_NB_0 - 14C2 19C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_SB_SYNC_L NB_SB_SYNC_L - 14B6 22A6 PCIE_D_R2D_C_P_SPN - 6C3 PCI_IRDY_L PCI_IRDY_L - 22A6 26D3 38A5
MEM_VREF_NB_1 MEM_VREF_NB_1 - 14C2 19C6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO NB_TV_DCONSEL0 NB_TV_DCONSEL0 - 14D6 PCIE_E_D2R_N PCIE_E_D2R_N - 6C4 22C4 PCI_LOCK_L PCI_LOCK_L - 22A6 26D3
MIC_HI MIC_HI - @mlb_noldo_lib.MLB_NOLDO 56B3 57A8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
MIC_HI_CONN MIC_HI_CONN - 56B1 56D3 NB_TV_DCONSEL1 NB_TV_DCONSEL1 - 14C6 PCIE_E_D2R_N_SPN - 6C3 PCI_PAR PCI_PAR - @mlb_noldo_lib.MLB_NOLDO 22A6 38B5
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PCI_PERR_L PCI_PERR_L - 22A6 26D3 38A5
MIC_HI_F MIC_HI_F - @mlb_noldo_lib.MLB_NOLDO 56B2 NB_VCCSM_LF1 NB_VCCSM_LF1 - 16B4 PCIE_E_D2R_P PCIE_E_D2R_P - 6C4 22C4 @mlb_noldo_lib.MLB_NOLDO
MIC_IN MIC_IN - @mlb_noldo_lib.MLB_NOLDO 57A7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PCI_PME_FW_L PCI_PME_FW_L - 22B5 38A5
MIC_LO MIC_LO - @mlb_noldo_lib.MLB_NOLDO 56B3 57A8 NB_VCCSM_LF2 NB_VCCSM_LF2 - 16B4 PCIE_E_D2R_P_SPN - 6C3 @mlb_noldo_lib.MLB_NOLDO
MIC_LO_CONN MIC_LO_CONN - 56B1 56D3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PCI_REQ0_L PCI_REQ0_L - 22B6 26C3
@mlb_noldo_lib.MLB_NOLDO NB_VCCSM_LF4 NB_VCCSM_LF4 - 16B8 PCIE_E_R2D_C_N PCIE_E_R2D_C_N - 6C4 22C4 @mlb_noldo_lib.MLB_NOLDO
MIC_LO_F MIC_LO_F - @mlb_noldo_lib.MLB_NOLDO 56B2 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PCI_REQ1_L PCI_REQ1_L - 22B6 26C3
A MIC_SHIELD MIC_SHIELD -
56B3 57A8 NB_VCCSM_LF5 NB_VCCSM_LF5 -
16B8 PCIE_E_R2D_C_N_SPN -
6C3
PCI_REQ2_L
PCI_REQ2_L - 22B6 26C3
A
MIC_SHIELD_F MIC_SHIELD_F - 56B2 NB_VTTLF_CAP1 NB_VTTLF_CAP1 - 17A4 PCIE_E_R2D_C_P PCIE_E_R2D_C_P - 6C4 22C4 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PCI_REQ3_L PCI_REQ3_L - 22B6 26C3 38A5
MIC_SHLD_CONN MIC_SHLD_CONN - 56B1 56D3 NB_VTTLF_CAP2 NB_VTTLF_CAP2 - 17A4 PCIE_E_R2D_C_P_SPN - 6C3 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PCI_RST_L PCI_RST_L - 22A6 38A6
MM1573DN_NR MM1573DN_NR - 19C3 NB_VTTLF_CAP3 NB_VTTLF_CAP3 - 17B4 PCIE_F_D2R_N PCIE_F_D2R_N - 6C4 22C4 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PCI_SERR_L PCI_SERR_L - 22A6 26D3 38A5
NB_BSEL<0> NB_BSEL<0> - 14C6 33C7 ODD_PWR_EN_SLOW_STAR ODD_PWR_EN_SLOW_START - 34C7 PCIE_F_D2R_N_SPN - 6C3 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO T @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PCI_STOP_L PCI_STOP_L - 22A6 26D3 38A5
NB_BSEL<1> NB_BSEL<1> - 14C6 33B7 ODD_PWR_EN_SLOW_STAR ODD_PWR_EN_SLOW_START_L - 34C6 PCIE_F_D2R_P PCIE_F_D2R_P - 6C4 22C4 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO T_L @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PCI_TRDY_L PCI_TRDY_L - 22A6 26D3 38A5
NB_BSEL<2> NB_BSEL<2> - 14C6 33B7 ODD_PWR_EN_SLOW_STAR ODD_PWR_EN_SLOW_START_L_R - 34C5 PCIE_F_D2R_P_SPN - 6C3 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO T_L_R @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PEG_COMP PEG_COMP - @mlb_noldo_lib.MLB_NOLDO 13D3
104
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PEG_D2R_N<0> PEG_D2R_N<0> - 6D6 13D3 PEG_R2D_C_N<0> PEG_R2D_C_N<0> - 13C3 68C6 PM_CLKRUN_L PM_CLKRUN_L - 5C2 23C8 38A5 45D5 47C6 =PP1V8_S3_MEM_NB_SENSE - 61C4 64C3
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO 53C6 @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N0_SPN - 6D5 PEG_R2D_C_N<1> PEG_R2D_C_N<1> - 13C3 68C6 PM_DPRSLPVR PM_DPRSLPVR - 14B7 23C3 58D8 =PP1V8_S3_MEMVTT - 31C6 64C3
PEG_D2R_N<1> PEG_D2R_N<1> - 13D3 68B6 PEG_R2D_C_N<2> PEG_R2D_C_N<2> - 13C3 68B6 PM_DPRSLPVR_R PM_DPRSLPVR_R - 14B6 =PP1V8_S3_MEM - 19C7 19C8 28B2 28D4 28D6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO 29B2 29D4 29D6 64C3
PEG_D2R_N<2> PEG_D2R_N<2> - 6D6 13D3 PEG_R2D_C_N<3> PEG_R2D_C_N<3> - 13B3 68B6 PM_EXTTS_L<0> PM_EXTTS_L<0> - 6B2 14B7 45B8 =PP1V8_S3_1V2S3 - 60B5 64C3
PEG_D2R_N2_SPN - 6D5 PEG_R2D_C_N<4> PEG_R2D_C_N<4> - 6B6 13B3 DIMM_OVERTEMP_L - 6B1 28C4 29C4 PP1V8_S3_MEMVTT_VDDQ PP1V8_S3_MEMVTT_VDDQ - 31C5
PEG_D2R_N<3> PEG_D2R_N<3> - 6C6 13D3 PEG_R2D_C_N4_SPN - 6B5 PM_LAN_ENABLE PM_LAN_ENABLE - 23C3 45D8 PP1V8_S3_R PP1V8_S3_R - 61B2
PEG_D2R_N3_SPN - 6C5 PEG_R2D_C_N<5> PEG_R2D_C_N<5> - 6B6 13B3 PM_PWRBTN_L PM_PWRBTN_L - 23C3 45D8 PP2V5_S0_NB_CRTDAC_F PP2V5_S0_NB_CRTDAC_F - 19D3
D PEG_D2R_N<4> PEG_D2R_N<4> -
6C6 13D3 PEG_R2D_C_N5_SPN -
6B5 PM_RI_L
PM_RSMRST_L
PM_RI_L - @mlb_noldo_lib.MLB_NOLDO
PM_RSMRST_L -
23D5
23C1 45D8
PP2V5_S0_NB_CRTDAC_F
OLLOW
PP2V5_S0_NB_CRTDAC_FOLLOW -
19D3 D
PEG_D2R_N4_SPN - 6C5 PEG_R2D_C_N<6> PEG_R2D_C_N<6> - 6B6 13B3 @mlb_noldo_lib.MLB_NOLDO PP2V5_S0_NB_VCCA_CRT PP2V5_S0_NB_VCCA_CRTDAC - 17D6 19D1
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PM_SB_PWROK PM_SB_PWROK - 23C3 26A6 DAC @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N<5> PEG_D2R_N<5> - 6C6 13D3 PEG_R2D_C_N6_SPN - 6B5 @mlb_noldo_lib.MLB_NOLDO PP2V5_S3 PP2V5_S3 - @mlb_noldo_lib.MLB_NOLDO 5A2 64C4
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PM_SLP_S3 PM_SLP_S3 - 48C8 63B7 =PP2V5_S3_REG - 60C2 64C6
PEG_D2R_N5_SPN - 6C5 PEG_R2D_C_N<7> PEG_R2D_C_N<7> - 6B6 13B3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PM_SLP_S3BATT PM_SLP_S3BATT - 60C7 =PP2V5_S3_ENET - 36D3 64C3
PEG_D2R_N<6> PEG_D2R_N<6> - 6C6 13D3 PEG_R2D_C_N7_SPN - 6B5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PM_SLP_S3_L PM_SLP_S3_L - 23C3 45C5 63A7 63A7 63B8 =PP2V5_S3_REG - 60C2 64C6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PM_SLP_S3_LS12V6 PM_SLP_S3_LS12V6 - 63B7 =PP2V5_S3_ENET - 36D3 64C3
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PM_SLP_S4_L PM_SLP_S4_L - 23C3 45C5 60C8 61B8 63D6 PP2V5_S3_ENET_AVDD PP2V5_S3_ENET_AVDD - 36D5 37D8
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PM_SLP_S5_L PM_SLP_S5_L - 23C3 45C5 46D3 PP2V5_S3_ENET_AVDD_F PP2V5_S3_ENET_AVDD_F - 37D7
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PM_STPCPU_L PM_STPCPU_L - 23C8 32C4 PP3V3_AUDIO_CODEC PP3V3_AUDIO_CODEC - 54D6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PM_STPPCI_L PM_STPPCI_L - 23C8 32C4 PP3V3_AVREF_SMC PP3V3_AVREF_SMC - 45D2 46C6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PM_SUS_STAT_L PM_SUS_STAT_L - 5C2 23C5 45D5 46D3 47C5 PP3V3_G3C_SB_RTC_D PP3V3_G3C_SB_RTC_D - 26D4
PEG_D2R_N9_SPN - 6C5 PEG_R2D_C_N<11> PEG_R2D_C_N<11> - 6B6 13B3 @mlb_noldo_lib.MLB_NOLDO 53C6 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PM_SYSRST_L PM_SYSRST_L - 23C5 26C5 45C8 PP3V3_S5_SB_RTC - 21D6 24B3 25A4 26D3
PEG_D2R_N<10> PEG_D2R_N<10> - 6C6 13C3 PEG_R2D_C_N11_SPN - 6B5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO XDP_DBRESET_L_R - 26C6 PP3V3_LCDVDD_SW PP3V3_LCDVDD_SW - 67C5
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PM_THRMTRIP_L PM_THRMTRIP_L - 7C6 14B6 21C2 46B3 PP3V3_LCDVDD_SW_F PP3V3_LCDVDD_SW_F - 67B2
PEG_D2R_N<11> PEG_D2R_N<11> - 6C6 13C3 PEG_R2D_C_N12_SPN - 6B5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PM_THRM_L PM_THRM_L - 23C8 45B8 PP3V3_S0_ANALOG_SDVO PP3V3_S0_ANALOG_SDVO_F - 68C4 68D6
PEG_D2R_N11_SPN - 6C5 PEG_R2D_C_N<13> PEG_R2D_C_N<13> - 6B6 13B3 @mlb_noldo_lib.MLB_NOLDO _F @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP0V9_S0 PP0V9_S0 - @mlb_noldo_lib.MLB_NOLDO 5A2 64D7 PP3V3_S0_ANALOG_TMDS PP3V3_S0_ANALOG_TMDS_F - 68B1 68B4 68D6
C PEG_D2R_N<12> PEG_D2R_N<12> -
6C6 13C3 PEG_R2D_C_N13_SPN -
6B5 =PP0V9_S0_MEM_TERM -
30D4 64D6 _F
PP3V3_S0_AUDIO_F
PP3V3_S0_AUDIO_F - 57B3 57C8 57C8 57D8
C
PEG_D2R_N12_SPN - 6C5 PEG_R2D_C_N<14> PEG_R2D_C_N<14> - 6B6 13B3 =PP0V9_S0_MEM_REG - 31B3 63B2 64D8 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP3V3_S0_AUDIO_SPDIF PP3V3_S0_AUDIO_SPDIF - 56B8 56D8
PEG_D2R_N<13> PEG_D2R_N<13> - 6C6 13C3 PEG_R2D_C_N14_SPN - 6B5 =PP0V9_S0_MEM_TERM - 30D4 64D6 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP3V3_S0_CK410_VDD48 PP3V3_S0_CK410_VDD48 - 32D5
PEG_D2R_N13_SPN - 6C5 PEG_R2D_C_N<15> PEG_R2D_C_N<15> - 6B6 13B3 =PP0V9_S0_MEM_REG - 31B3 63B2 64D8 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP3V3_S0_CK410_VDDA PP3V3_S0_CK410_VDDA - 32C7
PEG_D2R_N<14> PEG_D2R_N<14> - 6C6 13C3 PEG_R2D_C_N15_SPN - 6B5 PP1V2_S0 PP1V2_S0 - @mlb_noldo_lib.MLB_NOLDO 63B4 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP1V2_S3 PP1V2_S3 - @mlb_noldo_lib.MLB_NOLDO 5A2 64C4 PP3V3_S0_CK410_VDD_C PP3V3_S0_CK410_VDD_CPU_SRC - 32D6
PEG_D2R_N14_SPN - 6C5 PEG_R2D_C_P<0> PEG_R2D_C_P<0> - 13B3 68C6 =PP1V2_S3_REG - 60B2 63B5 64C6 PU_SRC @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP3V3_S0_CK410_VDD_P PP3V3_S0_CK410_VDD_PCI - 32D5
PEG_D2R_N<15> PEG_D2R_N<15> - 6C6 13C3 PEG_R2D_C_P<1> PEG_R2D_C_P<1> - 13B3 68C6 =PP1V2_S3_ENET - 36A8 36D7 64C3 CI @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP3V3_S0_CK410_VDD_R PP3V3_S0_CK410_VDD_REF - 32C5
PEG_D2R_N15_SPN - 6C5 PEG_R2D_C_P<2> PEG_R2D_C_P<2> - 13B3 68B6 =PP1V2_S3_REG - 60B2 63B5 64C6 EF @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP3V3_S0_IMVP6_3V3 PP3V3_S0_IMVP6_3V3 - 58D7
PEG_D2R_P<0> PEG_D2R_P<0> - 6C6 13C3 PEG_R2D_C_P<3> PEG_R2D_C_P<3> - 13B3 68B6 =PP1V2_S3_ENET - 36A8 36D7 64C3 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP3V3_S0_LCD_F PP3V3_S0_LCD_F - 67B3
PEG_D2R_P0_SPN - 6C5 PEG_R2D_C_P<4> PEG_R2D_C_P<4> - 6B6 13B3 PP1V5_S0_DPLL PP1V5_S0_DPLL - 19D5 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP3V3_S0_NB_TVDAC PP3V3_S0_NB_TVDAC - 19C3
PEG_D2R_P<1> PEG_D2R_P<1> - 13C3 68B6 PEG_R2D_C_P4_SPN - 6B5 PP1V5_S0_NB_3GPLL_F PP1V5_S0_NB_3GPLL_F - 19A4 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP3V3_S0_NB_TVDAC_F PP3V3_S0_NB_TVDAC_F - 19C2
PEG_D2R_P<2> PEG_D2R_P<2> - 6C6 13C3 PEG_R2D_C_P<5> PEG_R2D_C_P<5> - 6B6 13B3 PP1V5_S0_NB_QTVDAC PP1V5_S0_NB_QTVDAC - 19A7 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP3V3_S0_NB_TVDAC_FO PP3V3_S0_NB_TVDAC_FOLLOW - 19C3
PEG_D2R_P2_SPN - 6C5 PEG_R2D_C_P5_SPN - 6B5 PP1V5_S0_NB_VCC3G PP1V5_S0_NB_VCC3G - 17D6 19B2 LLOW @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP3V3_S0_NB_VCCA_TVB PP3V3_S0_NB_VCCA_TVBG - 17C6 19B1
PEG_D2R_P<3> PEG_D2R_P<3> - 6C6 13C3 PEG_R2D_C_P<6> PEG_R2D_C_P<6> - 6B6 13B3 PP1V5_S0_NB_VCCA_3GP PP1V5_S0_NB_VCCA_3GPLL - 17D6 19A2 G @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO LL @mlb_noldo_lib.MLB_NOLDO PP3V3_S0_NB_VCCA_TVD PP3V3_S0_NB_VCCA_TVDACA - 17C6 19C1
PEG_D2R_P3_SPN - 6C5 PEG_R2D_C_P6_SPN - 6B5 PP1V5_S0_NB_VCCA_DPL PP1V5_S0_NB_VCCA_DPLLA - 17C6 19D4 ACA @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO LA @mlb_noldo_lib.MLB_NOLDO PP3V3_S0_NB_VCCA_TVD PP3V3_S0_NB_VCCA_TVDACB - 17C6 19B1
PEG_D2R_P<4> PEG_D2R_P<4> - 6C6 13C3 PEG_R2D_C_P<7> PEG_R2D_C_P<7> - 6B6 13B3 PP1V5_S0_NB_VCCA_DPL PP1V5_S0_NB_VCCA_DPLLB - 17C6 19D4 ACB @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO LB @mlb_noldo_lib.MLB_NOLDO PP3V3_S0_NB_VCCA_TVD PP3V3_S0_NB_VCCA_TVDACC - 17C6 19B1
B PEG_D2R_P4_SPN -
6C5 PEG_R2D_C_P7_SPN -
6B5 PP1V5_S0_NB_VCCA_HPL
L
PP1V5_S0_NB_VCCA_HPLL -
17C6 19C4 ACC
PP3V3_S0_PVCC1_TMDS_
PP3V3_S0_PVCC1_TMDS_F - 68C4 68C6 B
PEG_D2R_P<5> PEG_D2R_P<5> - 6C6 13C3 PEG_R2D_C_P<8> PEG_R2D_C_P<8> - 6B6 13B3 PP1V5_S0_NB_VCCA_MPL PP1V5_S0_NB_VCCA_MPLL - 17C6 19C4 F @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO L @mlb_noldo_lib.MLB_NOLDO PP3V3_S0_PVCC2_TMDS_ PP3V3_S0_PVCC2_TMDS_F - 68C4 68C7
PEG_D2R_P5_SPN - 6C5 PEG_R2D_C_P8_SPN - 6B5 PP1V5_S0_NB_VCCD_QTV PP1V5_S0_NB_VCCD_QTVDAC - 17B6 19A5 F @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO DAC @mlb_noldo_lib.MLB_NOLDO PP3V3_S0_TPM_3VSB PP3V3_S0_TPM_3VSB - 53C4
PEG_D2R_P<6> PEG_D2R_P<6> - 6C6 13C3 PEG_R2D_C_P<9> PEG_R2D_C_P<9> - 6B6 13B3 PP1V5_S0_NB_VCCD_TVD PP1V5_S0_NB_VCCD_TVDAC - 17C6 19A5 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO AC @mlb_noldo_lib.MLB_NOLDO PP3V3_S3 PP3V3_S3 - @mlb_noldo_lib.MLB_NOLDO 5A2 64B4
PEG_D2R_P6_SPN - 6C5 PEG_R2D_C_P9_SPN - 6B5 PP1V5_S0_REG_P PP1V5_S0_REG_P - 62B8 =PP3V3_S3_PDCISENS - 61C1 64B3
PEG_D2R_P<7> PEG_D2R_P<7> - 6C6 13C3 PEG_R2D_C_P<10> PEG_R2D_C_P<10> - 6B6 13B3 PP1V5_S0_SB_VCC1_5_B PP1V5_S0_SB_VCC1_5_B - 22C1 24D5 25B6 =PP3V3_S3_FW - 38D5 64B3
PEG_D2R_P7_SPN - 6C5 PEG_R2D_C_P10_SPN - 6B5 PP1V5_S0_SB_VCCDMIPL PP1V5_S0_SB_VCCDMIPLL - 24B5 25A5 =PP3V3_S3_AIRPORT_AUX - 43C3 64B3
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO L @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<8> PEG_D2R_P<8> - 6C6 13C3 PEG_R2D_C_P<11> PEG_R2D_C_P<11> - 6B6 13B3 PP1V5_S0_SB_VCCDMIPL PP1V5_S0_SB_VCCDMIPLL_F - 25A7 =PP3V3_S3_RSTGATE - 26B3 64B3
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO L_F @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P8_SPN - 6C5 PEG_R2D_C_P11_SPN - 6B5 PP1V8_S0 PP1V8_S0 - @mlb_noldo_lib.MLB_NOLDO 5B2 64C7 =PP3V3_S3_PCI - 38C5 64B3
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP1V8_S0_TMDS - 64B6 68D6 68D6 @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<9> PEG_D2R_P<9> - 6C6 13C3 PEG_R2D_C_P<12> PEG_R2D_C_P<12> - 6B6 13A3 @mlb_noldo_lib.MLB_NOLDO =PP3V3_S3_SMS - 46D5 52C7 64B3
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP1V8_S0_FET - 63B3 64B8 @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P9_SPN - 6C5 PEG_R2D_C_P12_SPN - 6B5 @mlb_noldo_lib.MLB_NOLDO =PP3V3_S3_TPM - 46D5 53C2 64B3
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP1V8_S0_TMDS - 64B6 68D6 68D6 @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<10> PEG_D2R_P<10> - 6C6 13C3 PEG_R2D_C_P<13> PEG_R2D_C_P<13> - 6B6 13A3 @mlb_noldo_lib.MLB_NOLDO =PP3V3_S3_2V5S3 - 60C4 60D6 64B3
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO =PP1V8_S0_FET - 63B3 64B8 @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P10_SPN - 6C5 PEG_R2D_C_P13_SPN - 6B5 @mlb_noldo_lib.MLB_NOLDO =PP3V3_S3_ENET - 36A5 36B4 36B5 36C8 36D6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP1V8_S0_ANALOG_SDVO PP1V8_S0_ANALOG_SDVO_F - 68C4 68D3 @mlb_noldo_lib.MLB_NOLDO 36D8 64B3
PEG_D2R_P<11> PEG_D2R_P<11> - 6C6 13C3 PEG_R2D_C_P<14> PEG_R2D_C_P<14> - 6B6 13A3 _F @mlb_noldo_lib.MLB_NOLDO =PP3V3_S3_BT - 44C6 64B3
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP1V8_S0_TMDS_F PP1V8_S0_TMDS_F - 68B4 68D3 @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P11_SPN - 6C5 PEG_R2D_C_P14_SPN - 6B5 @mlb_noldo_lib.MLB_NOLDO =PP3V3_S3_FET - 63D3 64B6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO PP1V8_S3 PP1V8_S3 - @mlb_noldo_lib.MLB_NOLDO 5A2 64C4 @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<12> PEG_D2R_P<12> - 6C6 13C3 PEG_R2D_C_P<15> PEG_R2D_C_P<15> - 6B6 13A3 =PP1V8_S3_1V2S3 - 60B5 64C3 =PP3V3_S3_SMBUS_SMC_RMT - 27D3 64B3
A PEG_D2R_P12_SPN -
6C5 PEG_R2D_C_P15_SPN -
6B5 =PP1V8_S3_MEM_NB_SENSE -
61C4 64C3 =PP3V3_S3_TPM -
46D5 53C2 64B3 A
PEG_D2R_P<13> PEG_D2R_P<13> - 6C6 13C3 PLT_RST_BUF_L PLT_RST_BUF_L - 26B3 =PP1V8_S3_MEMVTT - 31C6 64C3 =PP3V3_S3_SMS - 46D5 52C7 64B3
PEG_D2R_P13_SPN - 6C5 PLT_RST_GATED_L PLT_RST_GATED_L - 26A3 =PP1V8_S3_P1V8S0 - 63A5 64C3 =PP3V3_S3_SMBUS_SMC_RMT - 27D3 64B3
PEG_D2R_P<14> PEG_D2R_P<14> - 6B6 13C3 PLT_RST_L PLT_RST_L - 22A6 26C3 =PP1V8_S3_REG - 61B1 64C6 =PP3V3_S3_RSTGATE - 26B3 64B3
PEG_D2R_P14_SPN - 6B5 NB_RST_IN_L - 14B7 26C1 =PP1V8_S3_MEM - 19C7 19C8 28B2 28D4 28D6 =PP3V3_S3_PDCISENS - 61C1 64B3
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO 29B2 29D4 29D6 64C3 @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<15> PEG_D2R_P<15> - 6B6 13C3 PM_BATLOW_L PM_BATLOW_L - 23C1 45B8 =PP1V8_S3_REG - 61B1 64C6 =PP3V3_S3_PCI - 38C5 64B3
PEG_D2R_P15_SPN - 6B5 PM_BMBUSY_L PM_BMBUSY_L - 14B6 23C5 =PP1V8_S3_P1V8S0 - 63A5 64C3 =PP3V3_S3_FW - 38D5 64B3
105
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
=PP3V3_S3_FET - 63D3 64B6 @mlb_noldo_lib.MLB_NOLDO PPVBATT_G3C_RTC PPVBATT_G3C_RTC - 26D6 SB_GPIO21 SB_GPIO21 - 23D3
@mlb_noldo_lib.MLB_NOLDO PP5V_S3_CAMERA_F PP5V_S3_CAMERA_F - 67A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_ENET - 36A5 36B4 36B5 36C8 36D6 @mlb_noldo_lib.MLB_NOLDO PPVBATT_G3C_RTC_R PPVBATT_G3C_RTC_R - 26D5 SB_GPIO26 SB_GPIO26 - 23C8
@mlb_noldo_lib.MLB_NOLDO 36D8 64B3 PP5V_S3_GEYSER_F PP5V_S3_GEYSER_F - 40D5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_BT - 44C6 64B3 @mlb_noldo_lib.MLB_NOLDO PPVBATT_G3H_PRE PPVBATT_G3H_PRE - 66B3 SB_GPIO29 SB_GPIO29 - 22C4 22D8
@mlb_noldo_lib.MLB_NOLDO PP5V_S3_SYSLED_F PP5V_S3_SYSLED_F - 35B8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_AIRPORT_AUX - 43C3 64B3 @mlb_noldo_lib.MLB_NOLDO PPVBATT_G3H_R PPVBATT_G3H_R - 66B2 SB_GPIO30 SB_GPIO30 - 22C4 22D8 36D8
@mlb_noldo_lib.MLB_NOLDO PP5V_S3_USB2_EXTA PP5V_S3_USB2_EXTA - 42C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_2V5S3 - 60C4 60D6 64B3 @mlb_noldo_lib.MLB_NOLDO PPVBAT_G3H_CHGR_OUT PPVBAT_G3H_CHGR_OUT - 5C1 66B5 66C2 SB_GPIO31 SB_GPIO31 - 22C4 22D8
@mlb_noldo_lib.MLB_NOLDO PP5V_S3_USB2_EXTA_F PP5V_S3_USB2_EXTA_F - 42D2 42D3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
PP3V3_S3_AIRPORT_AUX PP3V3_S3_AIRPORT_AUX_CONN - 43C4 @mlb_noldo_lib.MLB_NOLDO PPVBAT_G3H_CHGR_REG PPVBAT_G3H_CHGR_REG - 66C4 SB_GPIO37 SB_GPIO37 - 23D3
_CONN @mlb_noldo_lib.MLB_NOLDO PP5V_S3_USB2_EXTB PP5V_S3_USB2_EXTB - 42C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
PP3V3_S3_BT_F PP3V3_S3_BT_F - 44C4 @mlb_noldo_lib.MLB_NOLDO PPVCORE_CPU_S0 PPVCORE_CPU_S0 - 5B2 64D7 SB_INTVRMEN SB_INTVRMEN - 21D6
@mlb_noldo_lib.MLB_NOLDO PP5V_S3_USB2_EXTB_F PP5V_S3_USB2_EXTB_F - 42B2 42C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
D PP3V3_S3_FW_AVDD PP3V3_S3_FW_AVDD -
38D3
PP5V_S5
PP5V_S5 - @mlb_noldo_lib.MLB_NOLDO 5A2 64A4
=PPVCORE_S0_CPU -
8B5 8D7 9B8 48A5 48B3
64D6
SB_RTC_RST_L SB_RTC_RST_L -
21D6 26D4 D
PP3V3_S3_ST_ACCEL PP3V3_S3_ST_ACCEL - 52B6 =PP5V_S5_1V8S3 - 61C7 64A3 =PPVOUT_S0_IMVP6_REG - 58D1 64D8 SB_RTC_X1 SB_RTC_X1 - 21D6 26C8
PP3V3_S5 PP3V3_S5 - @mlb_noldo_lib.MLB_NOLDO 5A2 64A4 =PP5V_S5_PATA - 34D6 64A3 =PPVCORE_S0_CPU - 8B5 8D7 9B8 48A5 48B3 SB_RTC_X1_R SB_RTC_X1_R - 26C7
=PP3V3_S5_LCD - 64A3 67C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO 64D6 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PP5V_S5_USB - 42C8 64A3 PPVDCIN_G3H_PRE PPVDCIN_G3H_PRE - 66D4 SB_RTC_X2 SB_RTC_X2 - 21D6 26C8
=PP3V3_S5_FWLATEVG - 39A8 64A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PP5V_S5_P5VS0 - 63C5 64A3 PPVIN_S5_1V51V05S0_R PPVIN_S5_1V51V05S0_R - 62C5 SB_RUNTIME_SCI_L SB_RUNTIME_SCI_L - 23C5
=PP3V3_S5_P3V3S3 - 63D5 64A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PP5V_S5_PWRCTL - 63A7 63D6 64A3 PPVIN_S5_5V3V3S5_R PPVIN_S5_5V3V3S5_R - 59C5 SB_SM_INTRUDER_L SB_SM_INTRUDER_L - 21D6 26D4
=PP3V3_S5_P3V3S0 - 63C5 64A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PP5V_S5_REG - 59B1 64A6 PPVIN_S5_IMVP6_VIN PPVIN_S5_IMVP6_VIN - 58D7 SB_SPKR SB_SPKR - @mlb_noldo_lib.MLB_NOLDO 23C5
=PP3V3_S5_ROM - 50D4 64A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO SC_RX_L SC_RX_L - @mlb_noldo_lib.MLB_NOLDO 45C5 46B1
@mlb_noldo_lib.MLB_NOLDO =PP5V_S5_P5VS3 - 63D5 64A3 RSMRST_PWRGD RSMRST_PWRGD - 45D8 46D6 59A1 SC_TX_L SC_TX_L - @mlb_noldo_lib.MLB_NOLDO 45C5 46B1
=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA - 24C3 64A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO SDATAIN SDATAIN - @mlb_noldo_lib.MLB_NOLDO 54C6
@mlb_noldo_lib.MLB_NOLDO =PP5V_S5_SB - 25C8 64A3 5V3V3S5_PGOOD - 59A2 SDVO_CTRLCLK SDVO_CTRLCLK - 14B6 68A6
=PP3V3_S5_SB_IO - 22C6 64A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PP5V_S5_USB - 42C8 64A3 S0PWRGD_0V9_DIV S0PWRGD_0V9_DIV - 63B2 SDVO_CTRLDATA SDVO_CTRLDATA - 14B6 68A6
=PP3V3_S5_SB_VCCSUS3_3_USB - 24B3 25D2 64A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PP5V_S5_SB - 25C8 64A3 S0PWRGD_1V2_DIV S0PWRGD_1V2_DIV - 63A2 SMBUS_BATT_SCL_F SMBUS_BATT_SCL_F - 5D1 65B6
=PP3V3_S5_SB_PM - 11B5 23D1 26C5 64A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PP5V_S5_REG - 59B1 64A6 S0PWRGD_OK S0PWRGD_OK - 63B2 SMBUS_BATT_SDA_F SMBUS_BATT_SDA_F - 5D1 65A6
=PP3V3_S5_SB_VCCSUS3_3 - 24A5 24B3 25B6 25D2 64A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PP5V_S5_PWRCTL - 63A7 63D6 64A3 SATA_A_D2R_N SATA_A_D2R_N - 6C4 21B6 SMB_0_CLK SMB_0_CLK - 27D6 45C8
=PP3V3_S5_REG - 59B8 64A6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PP5V_S5_PATA - 34D6 64A3 SATA_A_D2R_N_SPN - 6C3 SMBUS_SMC_0_SCL - 27D5
=PP3V3_S5_SB - 23A7 23B7 23D4 23D8 25C8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO 64A3 =PP5V_S5_P5VS3 - 63D5 64A3 SATA_A_D2R_P SATA_A_D2R_P - 6C4 21B6 THRM_DIMM1_SMB_CLK - 27D3 49B4
=PP3V3_S5_SB_USB - 22D8 64A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PP5V_S5_P5VS0 - 63C5 64A3 SATA_A_D2R_P_SPN - 6C3 SMBUS_SMC_0_SCL - 27D5
=PP3V3_S5_SB_VCCSUS3_3_USB - 24B3 25D2 64A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_SB_VCCSUS3_3 - 24A5 24B3 25B6 25D2 64A3
=PP5V_S5_1V8S3 -
61C7 64A3 SATA_A_R2D_C_N SATA_A_R2D_C_N -
6C4 21B6 SMB_0_DATA SMB_0_DATA -
27D6 45C5
C
@mlb_noldo_lib.MLB_NOLDO PP5V_S5_1V51V05S0_IN PP5V_S5_1V51V05S0_INTVCC - 62A2 62C3 62C6 SATA_A_R2D_C_N_SPN - 6C3 SMBUS_SMC_0_SDA - 27D5
=PP3V3_S5_SB_USB - 22D8 64A3 TVCC @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO PP5V_S5_5V3V3S5_INTV PP5V_S5_5V3V3S5_INTVCC - 59A2 59C3 59C6 SATA_A_R2D_C_P SATA_A_R2D_C_P - 6C4 21B6 THRM_DIMM1_SMB_DATA - 27C3 49B4
=PP3V3_S5_SB_PM - 11B5 23D1 26C5 64A3 CC @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO PP5V_S5_REG_P PP5V_S5_REG_P - 59A6 59B1 SATA_A_R2D_C_P_SPN - 6C3 SMBUS_SMC_0_SDA - 27D5
=PP3V3_S5_SB_IO - 22C6 64A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO PP5V_S5_SB_V5REF_SUS PP5V_S5_SB_V5REF_SUS - 24D5 25C7 SATA_C_D2R_C_N SATA_C_D2R_C_N - 35D7 SMB_AIRPORT_CONN_CLK SMB_AIRPORT_CONN_CLK - 43B5
=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA - 24C3 64A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO PP18V5_DCIN PP18V5_DCIN - 65D4 SATA_C_D2R_C_P SATA_C_D2R_C_P - 35C7 SMB_AIRPORT_CONN_DAT SMB_AIRPORT_CONN_DATA - 43B5
=PP3V3_S5_SB - 23A7 23B7 23D4 23D8 25C8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO A @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO 64A3 PP18V5_DCIN_F PP18V5_DCIN_F - 65D7 SATA_C_D2R_F_N SATA_C_D2R_F_N - 35D5 SMB_ALERT_L SMB_ALERT_L - 23C5
=PP3V3_S5_ROM - 50D4 64A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO PP18V5_DCIN_ONEWIRE PP18V5_DCIN_ONEWIRE - 65C6 SATA_C_D2R_F_P SATA_C_D2R_F_P - 35C5 SMB_BSA_CLK SMB_BSA_CLK - 27C3 45B5
=PP3V3_S5_REG - 59B8 64A6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO PP18V5_G3H PP18V5_G3H - 5A2 64C1 SATA_C_D2R_N SATA_C_D2R_N - 21B6 35D4 SMBUS_SMC_BSA_SCL - 27C2
=PP3V3_S5_P3V3S3 - 63D5 64A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PP18V5_G3H_INRUSH - 64C3 65D1 SATA_C_D2R_P SATA_C_D2R_P - 21B6 35C4 =SMBUS_BATT_SCL - 27C1 65A2
=PP3V3_S5_P3V3S0 - 63C5 64A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PP18V5_G3H_CHGR - 64C1 66D8 SATA_C_DET_L SATA_C_DET_L - 23D2 35D2 SMBUS_SMC_BSA_SCL - 27C2
=PP3V3_S5_LCD - 64A3 67C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PP18V5_G3H_INRUSH - 64C3 65D1 SATA_C_PWR_EN_L SATA_C_PWR_EN_L - 23A3 23B3 =SMBUS_BATT_SCL - 27C1 65A2
=PP3V3_S5_FWLATEVG - 39A8 64A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PP18V5_G3H_CHGR - 64C1 66D8 SATA_C_R2D_C_N SATA_C_R2D_C_N - 21B6 35D4 SMB_BSA_DATA SMB_BSA_DATA - 27C3 45B5
PP3V3_S5_FWLATEVG PP3V3_S5_FWLATEVG - 39A6 39B5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO PP18V5_S5_CHGR_SW_R PP18V5_S5_CHGR_SW_R - 66C4 SATA_C_R2D_C_P SATA_C_R2D_C_P - 21B6 35D4 SMBUS_SMC_BSA_SDA - 27C2
PP3V3_S5_FWLATEVG_F PP3V3_S5_FWLATEVG_F - 39A7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO PPBUSA_G3H PPBUSA_G3H - 5A2 SATA_C_R2D_F_N SATA_C_R2D_F_N - 35D6 =SMBUS_BATT_SDA - 27C1 65A2
PP3V3_S5_REG_P PP3V3_S5_REG_P - 59B8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO PPBUSB_G3H PPBUSB_G3H - 5A2 64C1 SATA_C_R2D_F_P SATA_C_R2D_F_P - 35D6 SMBUS_SMC_BSA_SDA - 27C2
PP3V42G3H_SW PP3V42G3H_SW - 63D2 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
B @mlb_noldo_lib.MLB_NOLDO
PP3V42_G3H_LIDSWITCH PP3V42_G3H_LIDSWITCH_F - 65A7
=PPBUS_S5_YUKON_CTRL -
60C8 64C1 SATA_C_R2D_N SATA_C_R2D_N -
35D7 =SMBUS_BATT_SDA -
27C1 65A2
B
_F @mlb_noldo_lib.MLB_NOLDO =PPVIN_S5_IMVP6 - 48C7 58C2 58D5 58D8 64C1 SATA_C_R2D_P SATA_C_R2D_P - 35D7 SMB_BSB_CLK SMB_BSB_CLK - 27B3 45C5
PP3V42_G3H_SMC_CLK_F PP3V42_G3H_SMC_CLK_F - 46A7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PPVIN_S5_1V51V05S0 - 62D8 64C1 SATA_RBIAS_N SATA_RBIAS_N - 21B6 35D2 SMB_BSB_DATA SMB_BSB_DATA - 27B3 45C8
PP3V42_ONEWIRE PP3V42_ONEWIRE - 65C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PPBUSB_G3H - 64C3 66C2 SATA_RBIAS_P - 21B6 35D2 SMB_LINK_ALERT_L SMB_LINK_ALERT_L - 23D5
PP4V5_AUDIO_ANALOG PP4V5_AUDIO_ANALOG - 54A3 54D2 57C3 57C5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PPBUS_S5_INV - 64C1 67D4 SATA_RBIAS_PN - 35D3 SMB_MLB_CLK SMB_MLB_CLK - 27C6 45B5
PP5V_INV PP5V_INV - @mlb_noldo_lib.MLB_NOLDO 67D5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
PP5V_INV_F PP5V_INV_F - 5B1 67D3 =PPBUS_S5_FWPWRSW - 39D6 64C1 SATA_RBIAS_P - 21B6 35D2 THRM_DIMM0_SMB_CLK - 27B3 49C4
PP5V_S0_AUDIO PP5V_S0_AUDIO - 5D1 =PPVIN_S5_5V3V3S5 - 59D8 63B7 64C1 SB_A20GATE SB_A20GATE - 21C4 SMBUS_SMC_MLB_SCL - 5B2 27C5
PP5V_S0_AUDIO_F PP5V_S0_AUDIO_F - 55B8 55B8 55C4 =PPVIN_S5_1V8S3 - 61C7 64C1 SB_ACZ_BITCLK SB_ACZ_BITCLK - 21C6 SMB_THRM_CLK - 10B3 27C3
PP5V_S0_AUDIO_PWR PP5V_S0_AUDIO_PWR - 5D1 =PPVIN_S5_IMVP6 - 48C7 58C2 58D5 58D8 64C1 SB_ACZ_RST_L SB_ACZ_RST_L - 21C6 THRM_DIMM0_SMB_CLK - 27B3 49C4
PP5V_S0_DVIPORT PP5V_S0_DVIPORT - 68A6 69B4 69C3 =PPVIN_S5_5V3V3S5 - 59D8 63B7 64C1 SB_ACZ_SDATAOUT SB_ACZ_SDATAOUT - 21C6 SMB_THRM_CLK - 10B3 27C3
PP5V_S0_DVIPORT_D PP5V_S0_DVIPORT_D - 68A8 69C5 =PPVIN_S5_1V8S3 - 61C7 64C1 SB_ACZ_SYNC SB_ACZ_SYNC - 21C6 SMBUS_SMC_MLB_SCL - 5B2 27C5
PP5V_S0_IMVP6_VDD PP5V_S0_IMVP6_VDD - 58D7 =PPVIN_S5_1V51V05S0 - 62D8 64C1 SB_CLK14P3M_TIMER SB_CLK14P3M_TIMER - 23D3 33A6 SMB_MLB_DATA SMB_MLB_DATA - 27B6 45B5
PP5V_S0_SB_V5REF PP5V_S0_SB_V5REF - 24D5 25D7 =PPBUS_S5_YUKON_CTRL - 60C8 64C1 SB_CLK48M_USBCTLR SB_CLK48M_USBCTLR - 23D3 33C7 THRM_DIMM0_SMB_DATA - 27B3 49C4
PP5V_S0_TMDS_FUSE PP5V_S0_TMDS_FUSE - 69C5 =PPBUS_S5_INV - 64C1 67D4 SB_CLK100M_DMI_N SB_CLK100M_DMI_N - 22C2 33B2 33C3 SMBUS_SMC_MLB_SDA - 5B2 27B5
PP5V_S3 PP5V_S3 - @mlb_noldo_lib.MLB_NOLDO 5A2 64B4 =PPBUS_S5_FWPWRSW - 39D6 64C1 SB_CLK100M_DMI_P SB_CLK100M_DMI_P - 22C2 33B2 33C3 SMB_THRM_DATA - 10B3 27B3
=PP5V_S3_IR - 41D6 64B3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO =PPBUSB_G3H - 64C3 66C2 SB_CLK100M_SATA_N SB_CLK100M_SATA_N - 21B6 33B2 33B3 THRM_DIMM0_SMB_DATA - 27B3 49C4
=PP5V_S3_GEYSER - 40D6 64B3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
A @mlb_noldo_lib.MLB_NOLDO
=PP5V_S3_CAMERA - 64B3 67A5
=PPBUSA_G3H -
64C3 66C2 SB_CLK100M_SATA_OE_L SB_CLK100M_SATA_OE_L -
23C3 32B4 SMB_THRM_DATA -
10B3 27B3 A
@mlb_noldo_lib.MLB_NOLDO PPBUS_ALL_INV_CONN PPBUS_ALL_INV_CONN - 5B1 67D3 SB_CLK100M_SATA_P SB_CLK100M_SATA_P - 21B6 33B2 33B3 SMBUS_SMC_MLB_SDA - 5B2 27B5
=PP5V_S3_FET - 63D3 64B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO PPBUS_S5_FWPWRSW_F PPBUS_S5_FWPWRSW_F - 39D6 SB_GPIO2 SB_GPIO2 - @mlb_noldo_lib.MLB_NOLDO 22A6 26C3 SMC_AVCC_RC SMC_AVCC_RC - 45D3
=PP5V_S3_SYSLED - 35B6 46B4 64B3 @mlb_noldo_lib.MLB_NOLDO SB_GPIO3 SB_GPIO3 - @mlb_noldo_lib.MLB_NOLDO 22A6 23A4 26C3 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO PPDCIN_G3H_R PPDCIN_G3H_R - 65D4 SB_GPIO4 SB_GPIO4 - @mlb_noldo_lib.MLB_NOLDO 22A6 26C3 SMC_BATT_CHG_EN SMC_BATT_CHG_EN - 5C1 45D8 46B6 66A4
=PP5V_S3_IR - 41D6 64B3 @mlb_noldo_lib.MLB_NOLDO SB_GPIO5 SB_GPIO5 - @mlb_noldo_lib.MLB_NOLDO 22A6 26C3 34C8 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO PPFW_PORT0_VP PPFW_PORT0_VP - 39C2 ODD_PWR_EN_L - 34C8 SMC_BATT_ISENSE SMC_BATT_ISENSE - 45D5 66B1
=PP5V_S3_GEYSER - 40D6 64B3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO PPFW_PORT0_VP_F PPFW_PORT0_VP_F - 39C3 SB_GPIO14 SB_GPIO14 - 23A4 23C3 SMC_BATT_ISET SMC_BATT_ISET - 5C1 45B5 66B7
=PP5V_S3_FET - 63D3 64B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO PPFW_SWITCH PPFW_SWITCH - 5B2 39D4 SB_GPIO19 SB_GPIO19 - 23D3 SMC_BATT_TRICKLE_EN_ SMC_BATT_TRICKLE_EN_L - 5C1 45D8 46B6 66A3
=PP5V_S3_CAMERA - 64B3 67A5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO L @mlb_noldo_lib.MLB_NOLDO
106
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SMC_BATT_VSET SMC_BATT_VSET - 45B5 46C3 SMC_TCK SMC_TCK - @mlb_noldo_lib.MLB_NOLDO 5C2 45C5 46C6 47C5 @mlb_noldo_lib.MLB_NOLDO TP_CPU_SPARE2 TP_CPU_SPARE2 - 7B6
@mlb_noldo_lib.MLB_NOLDO SMC_TDI SMC_TDI - @mlb_noldo_lib.MLB_NOLDO 5C2 45C5 46C6 47C5 TMDS_EXT_RES TMDS_EXT_RES - 68B4 @mlb_noldo_lib.MLB_NOLDO
SMC_BC_ACOK SMC_BC_ACOK - 5C1 45C5 46B6 65C3 65C7 SMC_TDO SMC_TDO - @mlb_noldo_lib.MLB_NOLDO 5C2 45C5 46C6 47B6 @mlb_noldo_lib.MLB_NOLDO TP_CPU_SPARE3 TP_CPU_SPARE3 - 7B6
@mlb_noldo_lib.MLB_NOLDO 66A5 SMC_THRMTRIP SMC_THRMTRIP - 45B5 46B5 TMDS_EXT_SWING TMDS_EXT_SWING - 68B3 @mlb_noldo_lib.MLB_NOLDO
SMC_BKLIGHT_ENABLE SMC_BKLIGHT_ENABLE - 45C8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_CPU_SPARE4 TP_CPU_SPARE4 - 7B6
@mlb_noldo_lib.MLB_NOLDO SMC_TMS SMC_TMS - @mlb_noldo_lib.MLB_NOLDO 5C2 45B5 46C6 47C6 TMDS_HTPLG TMDS_HTPLG - 68A7 69C6 @mlb_noldo_lib.MLB_NOLDO
SMC_BS_ALRT_L SMC_BS_ALRT_L - 5D1 45C5 46C6 65A2 SMC_TPM_GPIO SMC_TPM_GPIO - 45D5 46B2 @mlb_noldo_lib.MLB_NOLDO TP_CPU_SPARE5 TP_CPU_SPARE5 - 7B6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TMDS_HTPLG_R TMDS_HTPLG_R - 68A7 @mlb_noldo_lib.MLB_NOLDO
SMC_BS_ALRT_L_F SMC_BS_ALRT_L_F - 65A6 SMC_TPM_PP SMC_TPM_PP - 45C8 53C7 @mlb_noldo_lib.MLB_NOLDO TP_CPU_SPARE6 TP_CPU_SPARE6 - 7B6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TMDS_I2C_SCL TMDS_I2C_SCL - 68B2 @mlb_noldo_lib.MLB_NOLDO
SMC_CASE_OPEN SMC_CASE_OPEN - 45C5 46B3 SMC_TPM_PP_R SMC_TPM_PP_R - 53C6 @mlb_noldo_lib.MLB_NOLDO TP_CPU_SPARE7 TP_CPU_SPARE7 - 7B6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TMDS_I2C_SDA TMDS_I2C_SDA - 68B2 @mlb_noldo_lib.MLB_NOLDO
SMC_CPU_ISENSE SMC_CPU_ISENSE - 45D5 48C1 SMC_TPM_RESET_L SMC_TPM_RESET_L - 45C8 46D6 53B7 @mlb_noldo_lib.MLB_NOLDO TP_LVDS_VBG TP_LVDS_VBG - 13D5
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TMDS_INT_N TMDS_INT_N - 68B5 @mlb_noldo_lib.MLB_NOLDO
D SMC_CPU_RESET_3_3_L SMC_CPU_RESET_3_3_L -
45B5 46C1 SMC_TRST_L SMC_TRST_L -
5C2 45C1 47C6
TMDS_INT_P
TMDS_INT_P - 68B5
TP_NB_TESTIN_L TP_NB_TESTIN_L -
14D6 D
SMC_CPU_VSENSE SMC_CPU_VSENSE - 5B2 45D5 48B1 SMC_TX_L SMC_TX_L - @mlb_noldo_lib.MLB_NOLDO 5C2 45C8 46B2 46D6 47B6 @mlb_noldo_lib.MLB_NOLDO TP_NB_XOR_FSB2_H7 TP_NB_XOR_FSB2_H7 - 14D6
@mlb_noldo_lib.MLB_NOLDO SMC_VCL SMC_VCL - @mlb_noldo_lib.MLB_NOLDO 45D3 TMDS_RST_L TMDS_RST_L - 26B1 68B5 @mlb_noldo_lib.MLB_NOLDO
SMC_DCIN_ISENSE SMC_DCIN_ISENSE - 45D5 66C2 SMC_WAKE_SCI_L SMC_WAKE_SCI_L - 23C1 45D5 @mlb_noldo_lib.MLB_NOLDO TP_NB_XOR_LVDS_A34 TP_NB_XOR_LVDS_A34 - 14C6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TMDS_SDB_N TMDS_SDB_N - 68B4 @mlb_noldo_lib.MLB_NOLDO
SMC_DISPLAY_ENABLE SMC_DISPLAY_ENABLE - 45C8 SMC_XTAL SMC_XTAL - @mlb_noldo_lib.MLB_NOLDO 45C4 46C7 @mlb_noldo_lib.MLB_NOLDO TP_NB_XOR_LVDS_A35 TP_NB_XOR_LVDS_A35 - 14C6
@mlb_noldo_lib.MLB_NOLDO SMLINK<0> SMLINK<0> - 23D5 TMDS_SDB_P TMDS_SDB_P - 68B4 @mlb_noldo_lib.MLB_NOLDO
SMC_DISP_BKLT_A SMC_DISP_BKLT_A - 45B5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_NB_XOR_LVDS_D27 TP_NB_XOR_LVDS_D27 - 14C6
@mlb_noldo_lib.MLB_NOLDO SMLINK<1> SMLINK<1> - 23D5 TMDS_SDC_N TMDS_SDC_N - 68B4 @mlb_noldo_lib.MLB_NOLDO
SMC_DISP_BKLT_B SMC_DISP_BKLT_B - 45B5 46C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_NB_XOR_LVDS_D28 TP_NB_XOR_LVDS_D28 - 14C6
@mlb_noldo_lib.MLB_NOLDO SMS_ACC_SELFTEST SMS_ACC_SELFTEST - 52B6 TMDS_SDC_P TMDS_SDC_P - 68B4 @mlb_noldo_lib.MLB_NOLDO
SMC_EXCARD_CP SMC_EXCARD_CP - 45B8 46C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_PCI_GNT0_L TP_PCI_GNT0_L - 22B6
@mlb_noldo_lib.MLB_NOLDO SMS_INT_L SMS_INT_L - 23C3 45B5 46D6 TMDS_SDG_N TMDS_SDG_N - 68B4 @mlb_noldo_lib.MLB_NOLDO
SMC_EXCARD_PWR_EN SMC_EXCARD_PWR_EN - 45B8 46C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_PCI_GNT1_L TP_PCI_GNT1_L - 22B6
@mlb_noldo_lib.MLB_NOLDO SMS_ONOFF_L SMS_ONOFF_L - 45B5 52C7 TMDS_SDG_P TMDS_SDG_P - 68B4 @mlb_noldo_lib.MLB_NOLDO
SMC_EXCARD_PWR_OC_L SMC_EXCARD_PWR_OC_L - 45B8 46D3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_PCI_GNT2_L TP_PCI_GNT2_L - 22B6
@mlb_noldo_lib.MLB_NOLDO SMS_X_AXIS SMS_X_AXIS - 45B8 52C2 TMDS_SDR_N TMDS_SDR_N - 68B4 @mlb_noldo_lib.MLB_NOLDO
SMC_EXTAL SMC_EXTAL - 45C4 46C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_PCI_PME_L TP_PCI_PME_L - 22A6
@mlb_noldo_lib.MLB_NOLDO SMS_Y_AXIS SMS_Y_AXIS - 45B8 52C2 TMDS_SDR_P TMDS_SDR_P - 68B4 @mlb_noldo_lib.MLB_NOLDO
SMC_EXTSMI_L SMC_EXTSMI_L - 23B8 45B8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_SB_ACZ_SDIN1 TP_SB_ACZ_SDIN1 - 21C6
@mlb_noldo_lib.MLB_NOLDO SMS_Z_AXIS SMS_Z_AXIS - 45B8 52C2 TMDS_TX<0> TMDS_TX<0> - 68D2 @mlb_noldo_lib.MLB_NOLDO
SMC_FAN_0_CTL SMC_FAN_0_CTL - 45B8 46C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_SB_ACZ_SDIN2 TP_SB_ACZ_SDIN2 - 21C6
@mlb_noldo_lib.MLB_NOLDO SPI_ARB SPI_ARB - @mlb_noldo_lib.MLB_NOLDO 22C6 45D5 TMDS_TX<1> TMDS_TX<1> - 68D2 @mlb_noldo_lib.MLB_NOLDO
SMC_FAN_0_TACH SMC_FAN_0_TACH - 45B8 46C3 SPI_CE_L SPI_CE_L - @mlb_noldo_lib.MLB_NOLDO 22C6 45B5 50C7 @mlb_noldo_lib.MLB_NOLDO TP_SB_DRQ0_L TP_SB_DRQ0_L - 21D4
@mlb_noldo_lib.MLB_NOLDO SPI_HOLD_L SPI_HOLD_L - 50C4 TMDS_TX<2> TMDS_TX<2> - 68C2 @mlb_noldo_lib.MLB_NOLDO
SMC_FAN_1_CTL SMC_FAN_1_CTL - 5D2 45B8 51B4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_SB_GPIO6 TP_SB_GPIO6 - 23C5
@mlb_noldo_lib.MLB_NOLDO SPI_SCLK SPI_SCLK - @mlb_noldo_lib.MLB_NOLDO 22C6 45D5 50C7 TMDS_TX_CLK TMDS_TX_CLK - 68C2 @mlb_noldo_lib.MLB_NOLDO
SMC_FAN_1_TACH SMC_FAN_1_TACH - 5D2 45B8 51C4 SPI_SCLK_R SPI_SCLK_R - 50C4 @mlb_noldo_lib.MLB_NOLDO TP_SB_GPIO22 TP_SB_GPIO22 - 6B1 22B6
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TMDS_TX_CLK_N TMDS_TX_CLK_N - 68B2 68C1 69A2 @mlb_noldo_lib.MLB_NOLDO
SMC_FAN_2_CTL SMC_FAN_2_CTL - 45B8 46C3 SPI_SI SPI_SI - @mlb_noldo_lib.MLB_NOLDO 22C6 45D5 50C1 @mlb_noldo_lib.MLB_NOLDO =SB_GPIO22 - 6B2 69A6
@mlb_noldo_lib.MLB_NOLDO SPI_SI_R SPI_SI_R - @mlb_noldo_lib.MLB_NOLDO 50C3 TMDS_TX_CLK_P TMDS_TX_CLK_P - 68B2 68C3 69A2 @mlb_noldo_lib.MLB_NOLDO
C SMC_FAN_2_TACH SMC_FAN_2_TACH -
45B8 46C3 SPI_SO
SPI_SO_R
SPI_SO - @mlb_noldo_lib.MLB_NOLDO
SPI_SO_R - @mlb_noldo_lib.MLB_NOLDO
22C6 45D5 50C1
50C3 TMDS_TX_CONN_CLK_N
TMDS_TX_CONN_CLK_N - 69B3
SB_GPIO22 -
6B2
C
SMC_FAN_3_CTL SMC_FAN_3_CTL - 45B8 46C3 SPI_WP_L SPI_WP_L - @mlb_noldo_lib.MLB_NOLDO 50C4 @mlb_noldo_lib.MLB_NOLDO =SB_GPIO22 - 6B2 69A6
@mlb_noldo_lib.MLB_NOLDO SPKRAMP_L_N_OUT SPKRAMP_L_N_OUT - 55B4 55C3 TMDS_TX_CONN_CLK_P TMDS_TX_CONN_CLK_P - 69B3 @mlb_noldo_lib.MLB_NOLDO
SMC_FAN_3_TACH SMC_FAN_3_TACH - 5A7 45B8 46C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_SB_GPIO23 TP_SB_GPIO23 - 21D5
@mlb_noldo_lib.MLB_NOLDO SPKRAMP_L_P_OUT SPKRAMP_L_P_OUT - 55B4 55C3 TMDS_TX_CONN_N<0> TMDS_TX_CONN_N<0> - 69B3 @mlb_noldo_lib.MLB_NOLDO
SMC_FWE SMC_FWE - @mlb_noldo_lib.MLB_NOLDO 45B5 46C6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_SB_GPIO25_DO_NOT_ TP_SB_GPIO25_DO_NOT_USE - 23C3
SMC_FWIRE_ISENSE SMC_FWIRE_ISENSE - 45D5 46B3 SPKRAMP_R_N_OUT SPKRAMP_R_N_OUT - 55C3 55C4 TMDS_TX_CONN_N<1> TMDS_TX_CONN_N<1> - 69B3 USE @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_SB_GPIO38 TP_SB_GPIO38 - 23C3
SMC_GPU_ISENSE SMC_GPU_ISENSE - 45D5 46C6 SPKRAMP_R_P_OUT SPKRAMP_R_P_OUT - 55C4 55D3 TMDS_TX_CONN_N<2> TMDS_TX_CONN_N<2> - 69B3 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_SB_RCVENIN_L TP_SB_RCVENIN_L - 15B2
SMC_GPU_VSENSE SMC_GPU_VSENSE - 45D5 46C6 SPKRAMP_SUB_N_OUT SPKRAMP_SUB_N_OUT - 55A4 55B3 TMDS_TX_CONN_P<0> TMDS_TX_CONN_P<0> - 69B3 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_SB_RSVD9 TP_SB_RSVD9 - 22A6
SMC_LID SMC_LID - @mlb_noldo_lib.MLB_NOLDO 5B2 40C4 45B5 46C6 65A8 SPKRAMP_SUB_P_OUT SPKRAMP_SUB_P_OUT - 55A4 55B3 TMDS_TX_CONN_P<1> TMDS_TX_CONN_P<1> - 69B3 @mlb_noldo_lib.MLB_NOLDO
SMC_LID_F SMC_LID_F - 65A7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_SB_SATALED_L TP_SB_SATALED_L - 21C6
@mlb_noldo_lib.MLB_NOLDO SPKRAMP_SYNC1 SPKRAMP_SYNC1 - 55A4 55C4 TMDS_TX_CONN_P<2> TMDS_TX_CONN_P<2> - 69B3 @mlb_noldo_lib.MLB_NOLDO
SMC_LRESET_L SMC_LRESET_L - 26B1 45C8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_SB_XOR-AD5 TP_SB_XOR-AD5 - 22A7
@mlb_noldo_lib.MLB_NOLDO SPKRAMP_SYNC2 SPKRAMP_SYNC2 - 55A4 55B4 TMDS_TX_N<0> TMDS_TX_N<0> - 68B2 68D1 69B2 @mlb_noldo_lib.MLB_NOLDO
SMC_MANUAL_RST_L SMC_MANUAL_RST_L - 5B2 46D8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_SB_XOR-AD9 TP_SB_XOR-AD9 - 22A7
@mlb_noldo_lib.MLB_NOLDO SPKRAMP_THERMPLANE SPKRAMP_THERMPLANE - 55A4 55A4 55B4 55C4 TMDS_TX_N<1> TMDS_TX_N<1> - 68B2 68D1 69B2 @mlb_noldo_lib.MLB_NOLDO
SMC_MD1 SMC_MD1 - @mlb_noldo_lib.MLB_NOLDO 5C2 45C2 47B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_SB_XOR-AE5 TP_SB_XOR-AE5 - 22A7
SMC_MEM_ISENSE SMC_MEM_ISENSE - 45A8 46B3 61C1 SPKRCONN_L_N_OUT SPKRCONN_L_N_OUT - 55C1 56D2 TMDS_TX_N<2> TMDS_TX_N<2> - 68B2 68C1 69B2 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_SB_XOR-AG4 TP_SB_XOR-AG4 - 22A7
SMC_NB_ISENSE SMC_NB_ISENSE - 45B8 46B3 62A5 SPKRCONN_L_P_OUT SPKRCONN_L_P_OUT - 55C1 56D2 TMDS_TX_P<0> TMDS_TX_P<0> - 68B2 68D3 69B2 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_SB_XOR-AH4 TP_SB_XOR-AH4 - 22A7
SMC_NMI SMC_NMI - @mlb_noldo_lib.MLB_NOLDO 5C2 45C1 47B5 SPKRCONN_R_N_OUT SPKRCONN_R_N_OUT - 55C1 56C2 TMDS_TX_P<1> TMDS_TX_P<1> - 68B2 68D3 69B2 @mlb_noldo_lib.MLB_NOLDO
SMC_ODD_DETECT SMC_ODD_DETECT - 34B3 45B8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_SB_XOR-U3 TP_SB_XOR-U3 - 21C6
@mlb_noldo_lib.MLB_NOLDO SPKRCONN_R_P_OUT SPKRCONN_R_P_OUT - 55D1 56C2 TMDS_TX_P<2> TMDS_TX_P<2> - 68B2 68C3 69B2 @mlb_noldo_lib.MLB_NOLDO
SMC_ONOFF_L SMC_ONOFF_L - 40C8 45C5 46C8 46D6 48C8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_SB_XOR-U7 TP_SB_XOR-U7 - 21C6
@mlb_noldo_lib.MLB_NOLDO SPKRCONN_SUB_N_OUT SPKRCONN_SUB_N_OUT - 55B1 56C2 TPM_BADD TPM_BADD - @mlb_noldo_lib.MLB_NOLDO 53C3 @mlb_noldo_lib.MLB_NOLDO
CONN_GEYSER_ONOFF_L - 40C7 @mlb_noldo_lib.MLB_NOLDO TPM_GPIO1 TPM_GPIO1 - 46B1 53C6 TP_SB_XOR-V6 TP_SB_XOR-V6 - 21C6
@mlb_noldo_lib.MLB_NOLDO SPKRCONN_SUB_P_OUT SPKRCONN_SUB_P_OUT - 55B1 56C2 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
B SMC_P20
SMC_P21
SMC_P20 - @mlb_noldo_lib.MLB_NOLDO
SMC_P21 - @mlb_noldo_lib.MLB_NOLDO
45D8
45D8
46C6
46C6 SPKR_SHIELD
SPKR_SHIELD - 56C2
TPM_GPIO2 TPM_GPIO2 -
46B1 53C6 TP_SB_XOR-V7 TP_SB_XOR-V7 -
21C6
B
SMC_P22 SMC_P22 - @mlb_noldo_lib.MLB_NOLDO 45D8 46C6 @mlb_noldo_lib.MLB_NOLDO TPM_LRESET_L TPM_LRESET_L - 26B1 53B7 TP_SB_XOR-Y1 TP_SB_XOR-Y1 - 21C6
SMC_P23 SMC_P23 - @mlb_noldo_lib.MLB_NOLDO 45D8 46C6 ST_ACCEL_ON_L ST_ACCEL_ON_L - 52B6 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
SMC_P26 SMC_P26 - @mlb_noldo_lib.MLB_NOLDO 45D8 46C6 @mlb_noldo_lib.MLB_NOLDO TPM_RST_L TPM_RST_L - 53B6 TP_SB_XOR-Y2 TP_SB_XOR-Y2 - 21C6
SMC_P27 SMC_P27 - @mlb_noldo_lib.MLB_NOLDO 45D8 46C6 SUS_CLK_SB SUS_CLK_SB - 6B4 23C3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
SMC_P44 SMC_P44 - @mlb_noldo_lib.MLB_NOLDO 45C8 46C6 @mlb_noldo_lib.MLB_NOLDO TPM_XTALI TPM_XTALI - 53C6 TP_SB_XOR_AE9 TP_SB_XOR_AE9 - 22A6
SMC_P46 SMC_P46 - @mlb_noldo_lib.MLB_NOLDO 45C8 46C6 SUS_CLK_SB_SPN - 6B3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
SMC_PB7 SMC_PB7 - @mlb_noldo_lib.MLB_NOLDO 45B8 46C6 @mlb_noldo_lib.MLB_NOLDO TPM_XTALO TPM_XTALO - 53C6 TP_SB_XOR_AG8 TP_SB_XOR_AG8 - 22A6
SMC_PBUS_VSENSE SMC_PBUS_VSENSE - 45D5 48C5 SV_SET_UP SV_SET_UP - 5C2 23B6 23C3 47B5 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TPS73115_NR TPS73115_NR - 19D5 TP_SB_XOR_AH8 TP_SB_XOR_AH8 - 22A6
SMC_PD3 SMC_PD3 - @mlb_noldo_lib.MLB_NOLDO 45B8 46C3 SYS_LED_ANODE SYS_LED_ANODE - 5B2 35C5 46A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
SMC_PG1 SMC_PG1 - @mlb_noldo_lib.MLB_NOLDO 45B5 46C6 @mlb_noldo_lib.MLB_NOLDO TP_AZ_DOCK_EN_L TP_AZ_DOCK_EN_L - 23C5 TP_SB_XOR_W1 TP_SB_XOR_W1 - 21C6
SMC_PM_G2_EN SMC_PM_G2_EN - 45D5 63C8 SYS_LED_ANODE_L SYS_LED_ANODE_L - 35C7 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_AZ_DOCK_RST_L TP_AZ_DOCK_RST_L - 23C5 TP_USBN_F TP_USBN_F - 5C1
SMC_PM_G2_EN_L SMC_PM_G2_EN_L - 63C7 SYS_LED_ILIM SYS_LED_ILIM - 46A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_CPU_A32_L TP_CPU_A32_L - 7C8 TP_USBP_F TP_USBP_F - 5C1
SMC_PROCHOT SMC_PROCHOT - 45B5 46B6 SYS_LED_L SYS_LED_L - 46A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_CPU_A33_L TP_CPU_A33_L - 7B8 TV_DACA_OUT TV_DACA_OUT - 13C5 69B8
SMC_PROCHOT_3_3_L SMC_PROCHOT_3_3_L - 45D5 46C1 SYS_LED_L_VDIV SYS_LED_L_VDIV - 46A3 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_CPU_A34_L TP_CPU_A34_L - 7B8 TV_DACB_OUT TV_DACB_OUT - 13C5 69A8
SMC_PS_ON SMC_PS_ON - 5C1 39C6 45D5 46B3 65C3 SYS_ONEWIRE SYS_ONEWIRE - 5C1 45B8 46D6 65C8 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_CPU_A35_L TP_CPU_A35_L - 7B8 TV_DACC_OUT TV_DACC_OUT - 13C5 69A8
SMC_RCIN_L SMC_RCIN_L - 21C3 45C8 THRM_ALERT THRM_ALERT - 10B4 @mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_CPU_A36_L TP_CPU_A36_L - 7B8 TV_IREF TV_IREF - @mlb_noldo_lib.MLB_NOLDO 13C5 69C8
SMC_RSTGATE_L SMC_RSTGATE_L - 26A3 45D8 THRM_ALERT_L THRM_ALERT_L - 10C4 @mlb_noldo_lib.MLB_NOLDO USB2_BT_F_N USB2_BT_F_N - 44C4
@mlb_noldo_lib.MLB_NOLDO @mlb_noldo_lib.MLB_NOLDO TP_CPU_A37_L TP_CPU_A37_L - 7B8 @mlb_noldo_lib.MLB_NOLDO
SMC_RST_L SMC_RST_L - 5C2 45C3 46D7 47C5 THRM_CPU_DX_N THRM_CPU_DX_N - 10B5 @mlb_noldo_lib.MLB_NOLDO USB2_BT_F_P USB2_BT_F_P - 44B4
SMC_RUNTIME_SCI_L SMC_RUNTIME_SCI_L - 23C8 45B8 THRM_CPU_DX_P THRM_CPU_DX_P - 10B5 @mlb_noldo_lib.MLB_NOLDO USB2_CAMERA_CONN_N USB2_CAMERA_CONN_N - 67A2
SMC_RX_L SMC_RX_L - @mlb_noldo_lib.MLB_NOLDO 5C2 45C8 46B2 46D6 47B5 THRM_DIMM0_3V3_UNFIL THRM_DIMM0_3V3_UNFILTERED - 49D4 @mlb_noldo_lib.MLB_NOLDO USB2_CAMERA_CONN_P USB2_CAMERA_CONN_P - 67B2
A SMC_SB_NMI SMC_SB_NMI -
23C3 45D8 TERED
THRM_DIMM0_DXN
THRM_DIMM0_DXN - 40C5 49C6
TP_CPU_APM0_L TP_CPU_APM0_L -
7B8
USB2_EXTA_F_N
USB2_EXTA_F_N - 42C2
A
SMC_SUS_CLK SMC_SUS_CLK - 45C5 46A6 @mlb_noldo_lib.MLB_NOLDO TP_CPU_APM1_L TP_CPU_APM1_L - 7B8 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO THRM_DIMM0_DXP1 THRM_DIMM0_DXP1 - 40C4 49D6 @mlb_noldo_lib.MLB_NOLDO USB2_EXTA_F_P USB2_EXTA_F_P - 42C2
SMC_SUS_CLK_R SMC_SUS_CLK_R - 46A7 @mlb_noldo_lib.MLB_NOLDO TP_CPU_CPUSLP_L TP_CPU_CPUSLP_L - 21C4 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO THRM_DIMM0_DXP2 THRM_DIMM0_DXP2 - 49C6 @mlb_noldo_lib.MLB_NOLDO USB2_EXTB_F_N USB2_EXTB_F_N - 42B2
SMC_SYS_ISET SMC_SYS_ISET - 45B5 66D7 @mlb_noldo_lib.MLB_NOLDO TP_CPU_EXTBREF TP_CPU_EXTBREF - 7B6 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO THRM_DIMM1_3V3_UNFIL THRM_DIMM1_3V3_UNFILTERED - 49B4 @mlb_noldo_lib.MLB_NOLDO USB2_EXTB_F_P USB2_EXTB_F_P - 42B2
SMC_SYS_KBDLED SMC_SYS_KBDLED - 45C8 46C6 TERED @mlb_noldo_lib.MLB_NOLDO TP_CPU_HFPLL TP_CPU_HFPLL - 7B8 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO THRM_DIMM1_DXN THRM_DIMM1_DXN - 49B5 @mlb_noldo_lib.MLB_NOLDO USB2_GND_EXTA_F USB2_GND_EXTA_F - 42C2
SMC_SYS_LED_16B SMC_SYS_LED_16B - 45C8 46A4 @mlb_noldo_lib.MLB_NOLDO TP_CPU_SPARE0 TP_CPU_SPARE0 - 7B6 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO THRM_DIMM1_DXP1 THRM_DIMM1_DXP1 - 49B5 @mlb_noldo_lib.MLB_NOLDO USB2_GND_EXTB_F USB2_GND_EXTB_F - 42B2
SMC_SYS_VSET SMC_SYS_VSET - 45B5 46C3 @mlb_noldo_lib.MLB_NOLDO TP_CPU_SPARE1 TP_CPU_SPARE1 - 7B6 @mlb_noldo_lib.MLB_NOLDO
@mlb_noldo_lib.MLB_NOLDO THRM_DIMM1_DXP2 THRM_DIMM1_DXP2 - 49A5 @mlb_noldo_lib.MLB_NOLDO USB_A_N USB_A_N - @mlb_noldo_lib.MLB_NOLDO 6C1 22C2
107
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
=USB2_EXTA_N - 6C2 42C5
USB2_EXTA_N - 6C2
=USB2_EXTA_N - 6C2 42C5
USB_A_OC_L USB_A_OC_L - 6C1 22C4 22D8
=EXTAUSB_OC_L - 6C2 42C8
EXTAUSB_OC_L - 6C2
=EXTAUSB_OC_L - 6C2 42C8
D USB_A_P USB_A_P - @mlb_noldo_lib.MLB_NOLDO

=USB2_EXTA_P -
6C1 22C2
6C2 42C5
D
USB2_EXTA_P - 6C2
=USB2_EXTA_P - 6C2 42C5
USB_B_N USB_B_N - @mlb_noldo_lib.MLB_NOLDO 6C1 22C2
=USB2_GEYSER_N - 6C2 40C7
USB2_GEYSER_N - 6C2
=USB2_GEYSER_N - 6C2 40C7
USB_B_OC_L USB_B_OC_L - 22C4 22D8
USB_B_P USB_B_P - @mlb_noldo_lib.MLB_NOLDO 6C1 22C2
=USB2_GEYSER_P - 6C2 40C7
USB2_GEYSER_P - 6C2
=USB2_GEYSER_P - 6C2 40C7
USB_C_N USB_C_N - @mlb_noldo_lib.MLB_NOLDO 6C1 22C2
=USB2_EXTB_N - 6C2 42B5
USB2_EXTB_N - 6C2
=USB2_EXTB_N - 6C2 42B5
USB_C_P USB_C_P - @mlb_noldo_lib.MLB_NOLDO 6C1 22C2
=USB2_EXTB_P - 6C2 42B5
USB2_EXTB_P - 6C2
C
=USB2_EXTB_P - 6C2 42B5
USB_D_OC_L USB_D_OC_L - 22C4 22D8
USB_E_N USB_E_N - @mlb_noldo_lib.MLB_NOLDO 6C1 22C2
TP_USBN_E - 5C1 6C2
USB_E_OC_L USB_E_OC_L - 22C4 22D8
USB_E_P USB_E_P - @mlb_noldo_lib.MLB_NOLDO 6C1 22C2
TP_USBP_E - 5C1 6C2
USB_F_N USB_F_N - @mlb_noldo_lib.MLB_NOLDO 6C1 22C2
=USB2_IR_N - 6C2 41C6
USB_IR_N - @mlb_noldo_lib.MLB_NOLDO 6C2
=USB2_IR_N - 6C2 41C6
USB_F_P USB_F_P - @mlb_noldo_lib.MLB_NOLDO 6C1 22C2
=USB2_IR_P - 6C2 41C6
USB_IR_P - @mlb_noldo_lib.MLB_NOLDO 6C2
=USB2_IR_P - 6C2 41C6
USB_G_N USB_G_N - @mlb_noldo_lib.MLB_NOLDO 6B1 22C2
=USB2_BT_N - 6B2 44C6
USB_BT_N - @mlb_noldo_lib.MLB_NOLDO 6B2
=USB2_BT_N - 6B2 44C6
B USB_G_P
USB_G_P - @mlb_noldo_lib.MLB_NOLDO 6B1 22C2 B
=USB2_BT_P - 6C2 44C6
USB_BT_P - @mlb_noldo_lib.MLB_NOLDO 6C2
=USB2_BT_P - 6C2 44C6
USB_RBIAS_PN USB_RBIAS_PN - 22C2
VGA_B VGA_B - @mlb_noldo_lib.MLB_NOLDO 69B4
VGA_G VGA_G - @mlb_noldo_lib.MLB_NOLDO 69B4
VGA_HSYNC VGA_HSYNC - 69B4 69C1
VGA_R VGA_R - @mlb_noldo_lib.MLB_NOLDO 69A4
VGA_VSYNC VGA_VSYNC - 69B4 69C1
VOL_DOWN VOL_DOWN - @mlb_noldo_lib.MLB_NOLDO 54B7 54C7
VOL_UP VOL_UP - @mlb_noldo_lib.MLB_NOLDO 54B7 54C7
VREG_FB VREG_FB - @mlb_noldo_lib.MLB_NOLDO 54A4
VR_PWRGD_CK410 VR_PWRGD_CK410 - 23C5 26A8
VR_PWRGOOD_DELAY VR_PWRGOOD_DELAY - 14B6 26B5 58C7
XDP_BPM_L<0> XDP_BPM_L<0> - 7C6 11B2
A XDP_BPM_L<5>
XDP_BPM_L<5> - 7C6 11B2
A
XDP_DBRESET_L XDP_DBRESET_L - 7C6 11B4 26C6
XDP_TCK XDP_TCK - @mlb_noldo_lib.MLB_NOLDO 7A8 7C6 11B2 11B3
XDP_TDI XDP_TDI - @mlb_noldo_lib.MLB_NOLDO 7B8 7C6 11B3
XDP_TDO XDP_TDO - @mlb_noldo_lib.MLB_NOLDO 7C6 11B5
XDP_TMS XDP_TMS - @mlb_noldo_lib.MLB_NOLDO 7B8 7C6 11B2
XDP_TRST_L XDP_TRST_L - 7C6 11B3
108
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Title: Cref Part Report C2500 CAP_P_SMB2 mlb_noldo[25B8] C3804 CAP_402 mlb_noldo[34B5] C5921 CAP_402 mlb_noldo[46C6]
Design: mlb_noldo C2501 CAP_402 mlb_noldo[25A6] C3805 CAP_402 mlb_noldo[34B3] C5951 CAP_402 mlb_noldo[46A4]
Date: Mar 22 15:44:50 2007 C2502 CAP_402 mlb_noldo[25D4] C3806 CAP_603 mlb_noldo[34B3] C5965 CAP_402 mlb_noldo[46B8]
C2503 CAP_402 mlb_noldo[25D8] C3875 CAP_402 mlb_noldo[34C7] C5966 CAP_603 mlb_noldo[46B7]
C2504 CAP_402 mlb_noldo[25C8] C3876 CAP_402 mlb_noldo[34C5] C5967 CAP_402 mlb_noldo[46B7]
C0607 CAP_402 mlb_noldo[6C7] C2505 CAP_402 mlb_noldo[25B7] C3900 CAP_402 mlb_noldo[35D6] C5977 CAP_402 mlb_noldo[46C2]
C0608 CAP_402 mlb_noldo[6C7] C2506 CAP_402 mlb_noldo[25B7] C3901 CAP_402 mlb_noldo[35D5] C6100 CAP_402 mlb_noldo[48D3]
C0610 CAP_402 mlb_noldo[6C7] C2507 CAP_402 mlb_noldo[25B7] C3902 CAP_402 mlb_noldo[35C6] C6101 CAP_402 mlb_noldo[48C3]
C0611 CAP_402 mlb_noldo[6C7] C2508 CAP_603 mlb_noldo[25A6] C3903 CAP_402 mlb_noldo[35D5] C6102 CAP_402 mlb_noldo[48C2]
C0612 CAP_402 mlb_noldo[6A8] C2509 CAP_402 mlb_noldo[25B8] C3920 CAP_402 mlb_noldo[35C7] C6103 CAP_402 mlb_noldo[48C3]
C0613 CAP_402 mlb_noldo[6A8] C2510 CAP_402 mlb_noldo[25C1] C3921 CAP_603 mlb_noldo[35C6] C6104 CAP_402 mlb_noldo[48D4]
C0614 CAP_402 mlb_noldo[6B7] C2511 CAP_402 mlb_noldo[25D6] C3922 CAP_402 mlb_noldo[35C5] C6105 CAP_402 mlb_noldo[48C4]
C0615 CAP_402 mlb_noldo[6B7] C2512 CAP_402 mlb_noldo[25B1] C3923 CAP_402 mlb_noldo[35C6] C6112 CAP_402 mlb_noldo[48B2]
C0616 CAP_402 mlb_noldo[6B7] C2513 CAP_402 mlb_noldo[25C6] C3950 CAP_603 mlb_noldo[35B8] C6150 CAP_402 mlb_noldo[48C6]
D C0617
C0618
CAP_402
CAP_402
mlb_noldo[6B7]
mlb_noldo[6A8]
C2514
C2515
CAP_402
CAP_402
mlb_noldo[25C6]
mlb_noldo[25B6]
C4100
C4101
CAP_402
CAP_402
mlb_noldo[36D6]
mlb_noldo[36D6]
C6200
C6201
CAP_402
CAP_402
mlb_noldo[49C5]
mlb_noldo[49C5]
D
C0619 CAP_402 mlb_noldo[6A7] C2516 CAP_P_CASE-C2 mlb_noldo[25D3] C4102 CAP_402 mlb_noldo[36D5] C6202 CAP_402 mlb_noldo[49D4]
C0630 CAP_402 mlb_noldo[6C7] C2517 CAP_402 mlb_noldo[25D6] C4103 CAP_402 mlb_noldo[36D5] C6250 CAP_402 mlb_noldo[49B5]
C0900 CAP_805 mlb_noldo[9B5] C2518 CAP_402 mlb_noldo[25D4] C4104 CAP_402 mlb_noldo[36D5] C6251 CAP_402 mlb_noldo[49A5]
C0901 CAP_805 mlb_noldo[9B6] C2519 CAP_402 mlb_noldo[25D3] C4105 CAP_402 mlb_noldo[36D5] C6252 CAP_402 mlb_noldo[49B4]
C0902 CAP_805 mlb_noldo[9A5] C2520 CAP_402 mlb_noldo[25B6] C4106 CAP_402 mlb_noldo[36D4] C6301 CAP_402 mlb_noldo[50C2]
C0904 CAP_805 mlb_noldo[9A6] C2521 CAP_402 mlb_noldo[25C3] C4107 CAP_402 mlb_noldo[36D4] C6308 CAP_402 mlb_noldo[50C5]
C0907 CAP_805 mlb_noldo[9B4] C2522 CAP_402 mlb_noldo[25B3] C4110 CAP_402 mlb_noldo[36D5] C6309 CAP_402 mlb_noldo[50C6]
C0909 CAP_805 mlb_noldo[9B5] C2524 CAP_603 mlb_noldo[25B3] C4112 CAP_402 mlb_noldo[36C5] C6312 CAP_402 mlb_noldo[50D3]
C0911 CAP_805 mlb_noldo[9B7] C2526 CAP_402 mlb_noldo[25A4] C4115 CAP_402 mlb_noldo[36B4] C6605 CAP_402 mlb_noldo[52B4]
C0912 CAP_805 mlb_noldo[9A6] C2527 CAP_402 mlb_noldo[25A3] C4116 CAP_402 mlb_noldo[36B4] C6606 CAP_402 mlb_noldo[52B4]
C0913 CAP_805 mlb_noldo[9A7] C2528 CAP_402 mlb_noldo[25A3] C4117 CAP_402 mlb_noldo[36B3] C6620 CAP_402 mlb_noldo[52C4]
C0918 CAP_805 mlb_noldo[9A7] C2529 CAP_402 mlb_noldo[25A3] C4118 CAP_402 mlb_noldo[36B3] C6700 CAP_402 mlb_noldo[53C4]
C0920 CAP_805 mlb_noldo[9A4] C2530 CAP_402 mlb_noldo[25A3] C4126 CAP_402 mlb_noldo[36A8] C6701 CAP_402 mlb_noldo[53C4]
C0923 CAP_805 mlb_noldo[9B7] C2531 CAP_402 mlb_noldo[25D1] C4127 CAP_402 mlb_noldo[36A8] C6702 CAP_402 mlb_noldo[53C3]
C0924 CAP_805 mlb_noldo[9A7] C2532 CAP_402 mlb_noldo[25C1] C4128 CAP_402 mlb_noldo[36A7] C6703 CAP_402 mlb_noldo[53C3]
C0926 CAP_402 mlb_noldo[9B7] C2533 CAP_402 mlb_noldo[25C1] C4129 CAP_402 mlb_noldo[36A7] C6795 CAP_402 mlb_noldo[53C6]
C0928 CAP_805 mlb_noldo[9B5] C2534 CAP_402 mlb_noldo[25D1] C4130 CAP_402 mlb_noldo[36A7] C6796 CAP_402 mlb_noldo[53B6]
C0929 CAP_805 mlb_noldo[9B4] C2605 CAP_402 mlb_noldo[26D4] C4131 CAP_402 mlb_noldo[36A6] C6800 CAP_603 mlb_noldo[54D6]
C0930 CAP_805 mlb_noldo[9A5] C2607 CAP_402 mlb_noldo[26B5] C4132 CAP_402 mlb_noldo[36A6] C6801 CAP_402 mlb_noldo[54D6]
C0931 CAP_805 mlb_noldo[9A5] C2608 CAP_402 mlb_noldo[26C7] C4133 CAP_402 mlb_noldo[36A6] C6802 CAP_P_CASE-B3-LF mlb_noldo[54D4]
C0934 CAP_402 mlb_noldo[9B7] C2609 CAP_402 mlb_noldo[26C7] C4134 CAP_402 mlb_noldo[36A6] C6803 CAP_P_CASE-B3-LF mlb_noldo[54D3]
C0935 CAP_402 mlb_noldo[9B7] C2610 CAP_402 mlb_noldo[26D4] C4135 CAP_402 mlb_noldo[36A5] C6804 CAP_P_SMA-LF mlb_noldo[54B4]
C0936 CAP_402 mlb_noldo[9B6] C2611 CAP_402 mlb_noldo[26B8] C4136 CAP_402 mlb_noldo[36A5] C6805 CAP_603 mlb_noldo[54B4]
C0937 CAP_402 mlb_noldo[9B6] C2680 CAP_402 mlb_noldo[26B3] C4137 CAP_402 mlb_noldo[36A4] C6806 CAP_603 mlb_noldo[54B3]
C0938 CAP_402 mlb_noldo[9B5] C2800 CAP_402 mlb_noldo[28D7] C4138 CAP_402 mlb_noldo[36A4] C6807 CAP_P_SMA-LF mlb_noldo[54B3]
C0939 CAP_805 mlb_noldo[9A4] C2809 CAP_603 mlb_noldo[28B2] C4139 CAP_402 mlb_noldo[36A4] C6810 CAP_P_SMA-LF mlb_noldo[54B2]
C0940 CAP_P_3P_D2T mlb_noldo[9B5] C2810 CAP_402 mlb_noldo[28B2] C4140 CAP_402 mlb_noldo[36B3] C6812 CAP_402 mlb_noldo[54B4]
C0941 CAP_P_3P_D2T mlb_noldo[9A7] C2811 CAP_402 mlb_noldo[28B2] C4150 CAP_402 mlb_noldo[36B6] C6813 CAP_402 mlb_noldo[54B3]
C C0942
C0943
CAP_P_3P_D2T
CAP_P_3P_D2T
mlb_noldo[9A7]
mlb_noldo[9A6]
C2812
C2813
CAP_402
CAP_402
mlb_noldo[28B1]
mlb_noldo[28B1]
C4151
C4200
CAP_402
CAP_402
mlb_noldo[36B6]
mlb_noldo[37C7]
C6821
C6822
CAP_402
CAP_603
mlb_noldo[54C6]
mlb_noldo[54A5]
C
C0944 CAP_P_3P_D2T mlb_noldo[9A6] C2814 CAP_402 mlb_noldo[28B2] C4201 CAP_402 mlb_noldo[37C6] C6823 CAP_402 mlb_noldo[54A5]
C0946 CAP_P_3P_D2T mlb_noldo[9A5] C2815 CAP_402 mlb_noldo[28B2] C4202 CAP_402 mlb_noldo[37C6] C6825 CAP_402 mlb_noldo[54A4]
C0950 CAP_402 mlb_noldo[9D7] C2816 CAP_402 mlb_noldo[28B1] C4203 CAP_402 mlb_noldo[37C6] C6830 CAP_402 mlb_noldo[54D4]
C0951 CAP_603 mlb_noldo[9D7] C2817 CAP_402 mlb_noldo[28B1] C4204 CAP_402 mlb_noldo[37C7] C6833 CAP_402 mlb_noldo[54B2]
C1001 CAP_402 mlb_noldo[10B5] C2820 CAP_402 mlb_noldo[28D7] C4205 CAP_402 mlb_noldo[37C6] C6835 CAP_402 mlb_noldo[54D6]
C1002 CAP_402 mlb_noldo[10C4] C2821 CAP_402 mlb_noldo[28A7] C4206 CAP_402 mlb_noldo[37C6] C6836 CAP_402 mlb_noldo[54D3]
C1100 CAP_402 mlb_noldo[11B3] C2822 CAP_402 mlb_noldo[28A7] C4207 CAP_402 mlb_noldo[37C6] C6853 CAP_402 mlb_noldo[54B4]
C1211 CAP_402 mlb_noldo[12C3] C2830 CAP_402 mlb_noldo[28B2] C4210 CAP_1808 mlb_noldo[37A6] C7200 CAP_P_SMC-LF mlb_noldo[55D6]
C1226 CAP_402 mlb_noldo[12B6] C2831 CAP_402 mlb_noldo[28B2] C4211 CAP_402 mlb_noldo[37A6] C7201 CAP_P_CASE-B3-LF mlb_noldo[55C4]
C1236 CAP_402 mlb_noldo[12A6] C2832 CAP_402 mlb_noldo[28B1] C4212 CAP_402 mlb_noldo[37A5] C7202 CAP_603 mlb_noldo[55C4]
C1415 CAP_402 mlb_noldo[14C3] C2900 CAP_402 mlb_noldo[29D7] C4411 CAP_402 mlb_noldo[38C2] C7203 CAP_P_CASE-B3-LF mlb_noldo[55B4]
C1416 CAP_402 mlb_noldo[14C2] C2909 CAP_603 mlb_noldo[29B2] C4412 CAP_402 mlb_noldo[38C2] C7204 CAP_603 mlb_noldo[55B4]
C1610 CAP_402 mlb_noldo[16B5] C2910 CAP_402 mlb_noldo[29B2] C4416 CAP_603 mlb_noldo[38D4] C7205 CAP_P_CASE-B2 mlb_noldo[55B4]
C1611 CAP_402 mlb_noldo[16B4] C2911 CAP_402 mlb_noldo[29B2] C4417 CAP_402 mlb_noldo[38D4] C7206 CAP_603 mlb_noldo[55B4]
C1614 CAP_402 mlb_noldo[16B8] C2914 CAP_402 mlb_noldo[29B2] C4422 CAP_402 mlb_noldo[38D4] C7209 CAP_402 mlb_noldo[55A5]
C1621 CAP_603 mlb_noldo[16B5] C2917 CAP_402 mlb_noldo[29B1] C4426 CAP_402 mlb_noldo[38D4] C7220 CAP_402 mlb_noldo[55B6]
C1711 CAP_402 mlb_noldo[17A3] C2920 CAP_402 mlb_noldo[29D7] C4428 CAP_402 mlb_noldo[38D3] C7221 CAP_402 mlb_noldo[55B5]
C1712 CAP_402 mlb_noldo[17A3] C2921 CAP_402 mlb_noldo[29A7] C4429 CAP_402 mlb_noldo[38D3] C7230 CAP_402 mlb_noldo[55A6]
C1713 CAP_402 mlb_noldo[17B3] C2922 CAP_402 mlb_noldo[29A7] C4430 CAP_402 mlb_noldo[38D3] C7231 CAP_402 mlb_noldo[55A5]
C1900 CAP_P_3P_D2T mlb_noldo[19B8] C2930 CAP_402 mlb_noldo[29B2] C4432 CAP_402 mlb_noldo[38D3] C7260 CAP_402 mlb_noldo[55D2]
C1902 CAP_603 mlb_noldo[19B7] C2931 CAP_402 mlb_noldo[29B2] C4500 CAP_402 mlb_noldo[39B5] C7261 CAP_402 mlb_noldo[55C2]
C1903 CAP_603 mlb_noldo[19B7] C2932 CAP_402 mlb_noldo[29B1] C4501 CAP_402 mlb_noldo[39A5] C7270 CAP_402 mlb_noldo[55C2]
C1904 CAP_402 mlb_noldo[19B6] C3000 CAP_402 mlb_noldo[30D4] C4510 CAP_402 mlb_noldo[39C3] C7271 CAP_402 mlb_noldo[55B2]
C1905 CAP_402 mlb_noldo[19B6] C3001 CAP_402 mlb_noldo[30D3] C4520 CAP_402 mlb_noldo[39B4] C7280 CAP_402 mlb_noldo[55B2]
C1906 CAP_402 mlb_noldo[19B6] C3002 CAP_402 mlb_noldo[30D4] C4521 CAP_402 mlb_noldo[39B3] C7281 CAP_402 mlb_noldo[55B2]
C1907 CAP_402 mlb_noldo[19B5] C3003 CAP_402 mlb_noldo[30D3] C4522 CAP_402 mlb_noldo[39A4] C7300 CAP_402 mlb_noldo[56C7]
B C1910
C1911
CAP_603
CAP_402
mlb_noldo[19B8]
mlb_noldo[19B7]
C3004
C3005
CAP_402
CAP_402
mlb_noldo[30D4]
mlb_noldo[30D3]
C4523
C4524
CAP_402
CAP_603-1
mlb_noldo[39A3]
mlb_noldo[39A2]
C7301
C7302
CAP_402
CAP_402
mlb_noldo[56C5]
mlb_noldo[56C5] B
C1915 CAP_402 mlb_noldo[19B6] C3009 CAP_402 mlb_noldo[30C3] C4590 CAP_402 mlb_noldo[39C5] C7306 CAP_402 mlb_noldo[56C8]
C1918 CAP_402 mlb_noldo[19B5] C3012 CAP_402 mlb_noldo[30B4] C5100 CAP_402 mlb_noldo[41D6] C7350 CAP_402 mlb_noldo[56A7]
C1920 CAP_402 mlb_noldo[19A6] C3013 CAP_402 mlb_noldo[30B3] C5101 CAP_402 mlb_noldo[41D6] C7351 CAP_603 mlb_noldo[56A7]
C1921 FILTER_3P_A_NFM18 mlb_noldo[19A6] C3014 CAP_402 mlb_noldo[30B4] C5102 CAP_402 mlb_noldo[41B5] C7352 CAP_402 mlb_noldo[56A5]
C1922 CAP_402 mlb_noldo[19A6] C3015 CAP_402 mlb_noldo[30B3] C5202 CAP_402 mlb_noldo[42C2] C7353 CAP_402 mlb_noldo[56A5]
C1923 FILTER_3P_A_NFM18 mlb_noldo[19A6] C3016 CAP_402 mlb_noldo[30B4] C5203 CAP_402 mlb_noldo[42C2] C7354 CAP_402 mlb_noldo[56A5]
C1934 CAP_805 mlb_noldo[19C5] C3017 CAP_402 mlb_noldo[30B3] C5206 CAP_402 mlb_noldo[42B2] C7355 CAP_402 mlb_noldo[56A5]
C1935 CAP_402 mlb_noldo[19C5] C3018 CAP_402 mlb_noldo[30B4] C5207 CAP_402 mlb_noldo[42B2] C7356 CAP_402 mlb_noldo[56A5]
C1936 CAP_805 mlb_noldo[19C5] C3019 CAP_402 mlb_noldo[30B3] C5208 CAP_402 mlb_noldo[42C6] C7357 CAP_402 mlb_noldo[56A8]
C1937 CAP_402 mlb_noldo[19C5] C3020 CAP_402 mlb_noldo[30A4] C5209 CAP_402 mlb_noldo[42B6] C7370 CAP_402 mlb_noldo[56A2]
C1940 CAP_402 mlb_noldo[19C4] C3021 CAP_402 mlb_noldo[30A3] C5210 CAP_P_B2 mlb_noldo[42C6] C7371 CAP_402 mlb_noldo[56A2]
C1941 CAP_402 mlb_noldo[19C3] C3022 CAP_402 mlb_noldo[30A4] C5211 CAP_P_B2 mlb_noldo[42B6] C7372 CAP_402 mlb_noldo[56A1]
C1942 CAP_402 mlb_noldo[19C3] C3023 CAP_402 mlb_noldo[30A3] C5212 CAP_402 mlb_noldo[42C8] C7400 CAP_402 mlb_noldo[57B4]
C1950 CAP_402 mlb_noldo[19D6] C3024 CAP_402 mlb_noldo[30A4] C5213 CAP_603 mlb_noldo[42C8] C7401 CAP_402 mlb_noldo[57D7]
C1951 CAP_402 mlb_noldo[19D5] C3025 CAP_402 mlb_noldo[30A3] C5250 CAP_402 mlb_noldo[42C8] C7402 CAP_402 mlb_noldo[57C7]
C1952 CAP_603 mlb_noldo[19D5] C3100 CAP_402 mlb_noldo[31C4] C5251 CAP_402 mlb_noldo[42B8] C7404 CAP_402 mlb_noldo[57C4]
C1953 CAP_402 mlb_noldo[19D4] C3101 CAP_603 mlb_noldo[31B5] C5300 CAP_402 mlb_noldo[43B6] C7411 CAP_402 mlb_noldo[57B7]
C1954 CAP_402 mlb_noldo[19C4] C3102 CAP_603 mlb_noldo[31B3] C5301 CAP_402 mlb_noldo[43B6] C7412 CAP_402 mlb_noldo[57B6]
C1966 CAP_603 mlb_noldo[19B4] C3104 CAP_603 mlb_noldo[31C4] C5305 CAP_402 mlb_noldo[43D4] C7430 CAP_P_B2 mlb_noldo[57D2]
C1967 CAP_402 mlb_noldo[19B4] C3105 CAP_P_SMC-LF mlb_noldo[31B4] C5306 CAP_402 mlb_noldo[43D4] C7431 CAP_P_B2 mlb_noldo[57C2]
C1970 CAP_P_SMB2 mlb_noldo[19A4] C3301 CAP_402 mlb_noldo[32D6] C5307 CAP_402 mlb_noldo[43C4] C7432 CAP_805-1 mlb_noldo[57B2]
C1971 CAP_603 mlb_noldo[19A3] C3302 CAP_402 mlb_noldo[32D6] C5308 CAP_402 mlb_noldo[43C4] C7433 CAP_805-1 mlb_noldo[57A2]
C1972 CAP_603 mlb_noldo[19A3] C3303 CAP_402 mlb_noldo[32D6] C5309 CAP_603 mlb_noldo[43C3] C7435 CAP_402 mlb_noldo[57B1]
C1975 CAP_603 mlb_noldo[19A3] C3304 CAP_402 mlb_noldo[32D6] C5310 CAP_402 mlb_noldo[43C3] C7440 CAP_402 mlb_noldo[57A4]
A C1976
C1980
CAP_402
CAP_402
mlb_noldo[19A3]
mlb_noldo[19D2]
C3305
C3306
CAP_402
CAP_402
mlb_noldo[32D4]
mlb_noldo[32D4]
C5498
C5499
CAP_402
CAP_603
mlb_noldo[44C5]
mlb_noldo[44C5]
C7441
C7445
CAP_402
CAP_402
mlb_noldo[57A4]
mlb_noldo[57A3]
A
C1981 CAP_402 mlb_noldo[19D2] C3307 CAP_402 mlb_noldo[32C4] C5802 CAP_805 mlb_noldo[45D3] C7446 CAP_402 mlb_noldo[57A3]
C1985 CAP_402 mlb_noldo[19C2] C3308 CAP_402 mlb_noldo[32D4] C5803 CAP_402 mlb_noldo[45D2] C7447 CAP_402 mlb_noldo[57A3]
C1986 FILTER_3P_A_NFM18 mlb_noldo[19D2] C3309 CAP_603 mlb_noldo[32D4] C5804 CAP_402 mlb_noldo[45D2] C7450 CAP_402 mlb_noldo[57A6]
C1990 CAP_603 mlb_noldo[19C2] C3310 CAP_402 mlb_noldo[32D3] C5805 CAP_402 mlb_noldo[45D2] C7451 CAP_402 mlb_noldo[57A7]
C1991 CAP_402 mlb_noldo[19C2] C3311 CAP_402 mlb_noldo[32C6] C5806 CAP_402 mlb_noldo[45D1] C7452 CAP_402 mlb_noldo[57A6]
C1992 FILTER_3P_A_NFM18 mlb_noldo[19C2] C3312 CAP_603 mlb_noldo[32C6] C5807 CAP_402 mlb_noldo[45D2] C7500 CAP_402 mlb_noldo[58C4]
C1993 CAP_402 mlb_noldo[19B2] C3314 CAP_402 mlb_noldo[32D8] C5820 CAP_402 mlb_noldo[45C3] C7501 CAP_P_CASED2E-SM mlb_noldo[58C3]
C1994 FILTER_3P_A_NFM18 mlb_noldo[19B2] C3315 CAP_402 mlb_noldo[32D7] C5900 CAP_402 mlb_noldo[46D8] C7502 CAP_402 mlb_noldo[58B4]
C1995 CAP_402 mlb_noldo[19B2] C3316 CAP_603 mlb_noldo[32D7] C5901 CAP_402 mlb_noldo[46D8] C7503 CAP_402 mlb_noldo[58C2]
C1996 FILTER_3P_A_NFM18 mlb_noldo[19B2] C3317 CAP_603 mlb_noldo[32D4] C5910 CAP_603 mlb_noldo[46A7] C7504 CAP_402 mlb_noldo[58B2]
C1997 CAP_402 mlb_noldo[19A2] C3389 CAP_402 mlb_noldo[32C7] C5911 CAP_402 mlb_noldo[46A7] C7505 CAP_402 mlb_noldo[58C8]
C1998 FILTER_3P_A_NFM18 mlb_noldo[19A2] C3390 CAP_402 mlb_noldo[32C7] C5920 CAP_402 mlb_noldo[46C6] C7506 CAP_402 mlb_noldo[58B8]
109
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
C7507 CAP_402 mlb_noldo[58B7] C7981 CAP_603 mlb_noldo[62C4] C9820 CAP_402 mlb_noldo[69A4] L1934 IND_0603 mlb_noldo[19C5]
C7508 CAP_P_CASED2E-SM mlb_noldo[58C3] C7989 CAP_402 mlb_noldo[62B4] C9821 CAP_402 mlb_noldo[69A3] L1936 IND_0603 mlb_noldo[19C5]
C7509 CAP_P_CASED2E-SM mlb_noldo[58D3] C7990 CAP_805 mlb_noldo[62A7] C9824 CAP_402 mlb_noldo[69B5] L1970 IND_1210 mlb_noldo[19B4]
C7510 CAP_402 mlb_noldo[58C8] C7991 CAP_805 mlb_noldo[62A7] C9834 CAP_402 mlb_noldo[69A4] L1975 IND_0805 mlb_noldo[19A4]
C7511 CAP_402 mlb_noldo[58B3] C7992 CAP_P_CASE-D2E-LF mlb_noldo[62B1] C9839 CAP_402 mlb_noldo[69B7] L1985 IND_0603 mlb_noldo[19D3]
C7512 CAP_402 mlb_noldo[58C3] C7999 CAP_402 mlb_noldo[62A6] C9842 CAP_402 mlb_noldo[69C1] L1990 IND_0603 mlb_noldo[19C3]
C7513 CAP_402 mlb_noldo[58B7] C8000 CAP_402 mlb_noldo[63D4] C9843 CAP_402 mlb_noldo[69C1] L2500 IND_SM-3 mlb_noldo[25B8]
C7514 CAP_402 mlb_noldo[58B8] C8005 CAP_402 mlb_noldo[63C4] C9860 CAP_402 mlb_noldo[69C2] L2507 IND_1206 mlb_noldo[25A7]
C7515 CAP_402 mlb_noldo[58C5] C8010 CAP_402 mlb_noldo[63C4] D1986 DIODE_SCHOT_6PB_SOT- mlb_noldo[19C2 19D2] L3301 IND_0402-LF mlb_noldo[32D7]
C7516 CAP_402 mlb_noldo[58B4] C8015 CAP_402 mlb_noldo[63B4] 363 L3302 IND_0402-LF mlb_noldo[32D3]
C7517 CAP_P_CASED2E-SM mlb_noldo[58D3] C8025 CAP_402 mlb_noldo[63A4] D2502 DIODE_SCHOT_6PB_SOT- mlb_noldo[25C8 25D8] L3901 FILTER_4P_2012H mlb_noldo[35D6]
C7518 CAP_603 mlb_noldo[58D2] C8060 CAP_402 mlb_noldo[63B3] 363 L3902 FILTER_4P_2012H mlb_noldo[35D5]
C7521 CAP_402 mlb_noldo[58A6] C8061 CAP_402 mlb_noldo[63B2] D2600 DIODE_SCHOT_6PB_SOT- mlb_noldo[26D5 26D5] L3912 IND_0402 mlb_noldo[35C6]
C7526 CAP_603 mlb_noldo[58D7] C8062 CAP_402 mlb_noldo[63B2] 363 L4100 IND_0402-LF mlb_noldo[36D3]
D C7527
C7528
CAP_402
CAP_402
mlb_noldo[58C5]
mlb_noldo[58B5]
C8090
C8091
CAP_1206-1
CAP_402
mlb_noldo[63C3]
mlb_noldo[63D2]
D4520 DIODE_DUAL_6P_SOT-36
3
mlb_noldo[39B4 39B3] L4250
L4400
IND_0402-LF
IND_0402
mlb_noldo[37D7]
mlb_noldo[38D4]
D
C7529 CAP_402 mlb_noldo[58B5] C8092 CAP_402 mlb_noldo[63D1] D4521 DIODE_DUAL_6P_SOT-36 mlb_noldo[39A4 39A3] L4510 IND_SM mlb_noldo[39C3]
C7530 CAP_402 mlb_noldo[58C7] C8093 CAP_805 mlb_noldo[63D1] 3 L4550 IND_SM-1 mlb_noldo[39A7]
C7531 CAP_402 mlb_noldo[58B5] C8202 CAP_402 mlb_noldo[65D7] D4550 ZENER_SOT23 mlb_noldo[39A6] L4900 IND_0402 mlb_noldo[40D5]
C7532 CAP_402 mlb_noldo[58B6] C8203 CAP_402 mlb_noldo[65C7] D4590 DIODE_SCHOT_SMB mlb_noldo[39D4] L4901 FILTER_4P_SM mlb_noldo[40C6]
C7533 CAP_402 mlb_noldo[58B6] C8205 CAP_402 mlb_noldo[65A5] D4591 DPAK3P_SOT-363 mlb_noldo[39C5 39C5 39C5] L4902 IND_0402 mlb_noldo[40C5]
C7534 CAP_402 mlb_noldo[58B5] C8206 CAP_402 mlb_noldo[65A4] D4900 DIODE_SCHOT_3P_A_SC- mlb_noldo[40C6] L5200 FILTER_4P_SM mlb_noldo[42C4]
C7535 CAP_603 mlb_noldo[58D6] C8209 CAP_402 mlb_noldo[65A5] 75 L5201 FILTER_4P_SM mlb_noldo[42B4]
C7590 CAP_402 mlb_noldo[58C3] C8211 CAP_402 mlb_noldo[65A5] D5200 DIODE_SCHOT_3P_A_SC- mlb_noldo[42C3] L5202 IND_0402-LF mlb_noldo[42D4]
C7592 CAP_402 mlb_noldo[58B3] C8215 CAP_402 mlb_noldo[65A4] 75 L5203 IND_0402-LF mlb_noldo[42C4]
C7596 CAP_402 mlb_noldo[58D7] C8217 CAP_603 mlb_noldo[65C2] D5201 DIODE_SCHOT_3P_A_SC- mlb_noldo[42A3] L5204 IND_0402-LF mlb_noldo[42C3]
C7599 CAP_603 mlb_noldo[58C2] C8218 CAP_402 mlb_noldo[65C4] 75 L5205 IND_0402-LF mlb_noldo[42A3]
C7600 CAP_603 mlb_noldo[59C4] C8220 CAP_402 mlb_noldo[65A7] D7500 DIODE_SCHOT_SMB mlb_noldo[58C3] L5400 FILTER_4P_SM mlb_noldo[44B5]
C7601 CAP_603 mlb_noldo[59A4] C8221 CAP_402 mlb_noldo[65A7] D7501 DIODE_SCHOT_SMB mlb_noldo[58B3] L5410 IND_0402-LF mlb_noldo[44C5]
C7602 CAP_402 mlb_noldo[59A4] C8230 CAP_402 mlb_noldo[65C6] D7624 DIODE_SCHOT_SOD-323 mlb_noldo[59C6] L5411 IND_0402-LF mlb_noldo[44B5]
C7604 CAP_402 mlb_noldo[59A2] C8300 CAP_402 mlb_noldo[66C7] D7664 DIODE_SCHOT_SOD-323 mlb_noldo[59C3] L5910 IND_0603 mlb_noldo[46A7]
C7605 CAP_402 mlb_noldo[59A5] C8301 CAP_402 mlb_noldo[66C7] D7820 DIODE_SCHOT_SMB mlb_noldo[61B4] L6800 IND_0402 mlb_noldo[54A5]
C7607 CAP_402 mlb_noldo[59A3] C8302 CAP_402 mlb_noldo[66C7] D7921 DIODE_SMB mlb_noldo[62B7] L6801 IND_0402 mlb_noldo[54D6]
C7608 CAP_402 mlb_noldo[59D2] C8303 CAP_402 mlb_noldo[66C4] D7924 DIODE_SCHOT_SOD-323 mlb_noldo[62C6] L7200 IND_0402 mlb_noldo[55C7]
C7609 CAP_402 mlb_noldo[59D7] C8304 CAP_402 mlb_noldo[66C5] D7961 DIODE_SMB mlb_noldo[62B2] L7210 IND_0402 mlb_noldo[55C7]
C7621 CAP_402 mlb_noldo[59B6] C8305 CAP_1206-1 mlb_noldo[66C4] D7964 DIODE_SCHOT_SOD-323 mlb_noldo[62C3] L7211 IND_0402 mlb_noldo[55A7]
C7622 CAP_402 mlb_noldo[59C5] C8306 CAP_1206-1 mlb_noldo[66C3] D8200 RCLAMP2402B_SC-75 mlb_noldo[65C7] L7220 IND_0402 mlb_noldo[55B7]
C7624 CAP_402 mlb_noldo[59C6] C8307 CAP_1206-1 mlb_noldo[66C3] D8201 DPAK3P_SOT-363 mlb_noldo[65D4] L7230 IND_0402 mlb_noldo[55A7]
C7625 CAP_402 mlb_noldo[59B6] C8308 CAP_P_CASED2E-SM mlb_noldo[66B4] D8201 DPAK3P_SOT-363 mlb_noldo[66B3] L7300 IND_0402-LF mlb_noldo[56D6]
C7626 CAP_402 mlb_noldo[59B6] C8309 CAP_P_6.3X5.5SM1 mlb_noldo[66B3] D8300 DIODE_SCHOT_SOD-123 mlb_noldo[66C5] L7301 IND_0402-LF mlb_noldo[56D4]
C7628 CAP_402 mlb_noldo[59B7] C8310 CAP_P_CASED2E-SM mlb_noldo[66B3] D8322 DPAK3P_SOT-363 mlb_noldo[66C8 66A5 66A6] L7302 IND_0402 mlb_noldo[56D6]
C7629 CAP_402 mlb_noldo[59B7] C8311 CAP_402 mlb_noldo[66C7] D9500 DIODE_DUAL_6P_SOT-36 mlb_noldo[68A7 68B7] L7303 IND_0402 mlb_noldo[56C6]
C7630 CAP_402 mlb_noldo[59B5] C8312 CAP_402 mlb_noldo[66C5] 3 L7304 IND_0402 mlb_noldo[56C4]
C7631 CAP_402 mlb_noldo[59C7] C8313 CAP_402 mlb_noldo[66C6] DZ7300 SUPPR_TRANSIENT_4P1_ mlb_noldo[56C6] L7305 IND_0402 mlb_noldo[56C6]
C7632 CAP_402 mlb_noldo[59C2] C8316 CAP_402 mlb_noldo[66B4] 0405 L7306 IND_0402 mlb_noldo[56C4]
C7640 CAP_P_CASED2E-SM mlb_noldo[59D6] C8317 CAP_402 mlb_noldo[66B5] DZ7301 SUPPR_TRANSIENT_4P1_ mlb_noldo[56C6] L7307 IND_0402 mlb_noldo[56C6]
C C7641
C7650
CAP_603
CAP_805
mlb_noldo[59D6]
mlb_noldo[59B7]
C8318
C8320
CAP_402
CAP_402
mlb_noldo[66B4]
mlb_noldo[66B5] DZ7350
0405
SUPPR_TRANSIENT_4P1_ mlb_noldo[56A6]
L7350
L7351
IND_0402
IND_0402
mlb_noldo[56B6]
mlb_noldo[56B4]
C
C7651 CAP_805 mlb_noldo[59B8] C8321 CAP_402 mlb_noldo[66B5] 0405 L7352 IND_0402 mlb_noldo[56B6]
C7652 CAP_P_SMC-LF mlb_noldo[59B8] C8322 CAP_402 mlb_noldo[66B4] DZ7351 SUPPR_TRANSIENT_4P1_ mlb_noldo[56A6] L7353 IND_0402 mlb_noldo[56B6]
C7661 CAP_402 mlb_noldo[59B3] C8323 CAP_402 mlb_noldo[66A5] 0405 L7354 IND_0402 mlb_noldo[56B4]
C7662 CAP_402 mlb_noldo[59C4] C8324 CAP_402 mlb_noldo[66A4] F8200 FUSE_1206 mlb_noldo[65D6] L7355 IND_0402 mlb_noldo[56B6]
C7664 CAP_402 mlb_noldo[59C3] C8325 CAP_402 mlb_noldo[66C7] F8300 FUSE_1206 mlb_noldo[66C3] L7356 IND_0402 mlb_noldo[56B4]
C7665 CAP_402 mlb_noldo[59B4] C8326 CAP_402 mlb_noldo[66C7] F9804 FUSE_SM-LF mlb_noldo[69C5] L7357 IND_0402 mlb_noldo[56A6]
C7666 CAP_402 mlb_noldo[59B3] C8327 CAP_402 mlb_noldo[66D7] FL4520 FILTER_4P_2012 mlb_noldo[39B3] L7370 IND_0402 mlb_noldo[56B2]
C7668 CAP_402 mlb_noldo[59B2] C8328 CAP_402 mlb_noldo[66B6] FL4521 FILTER_4P_2012 mlb_noldo[39B3] L7371 IND_0402 mlb_noldo[56B1]
C7669 CAP_402 mlb_noldo[59B2] C8340 CAP_402 mlb_noldo[66C7] FL4590 FUSE_MINISMDC mlb_noldo[39D5] L7372 IND_0402 mlb_noldo[56B2]
C7670 CAP_402 mlb_noldo[59B4] C8341 CAP_402 mlb_noldo[66B8] FL9800 FILTER_LC_SM-220MHZ- mlb_noldo[69B5] L7373 IND_0402 mlb_noldo[56B1]
C7680 CAP_P_CASED2E-SM mlb_noldo[59D3] C8370 CAP_402 mlb_noldo[66C3] LF L7374 IND_0402 mlb_noldo[56B2]
C7681 CAP_603 mlb_noldo[59D4] C8371 CAP_402 mlb_noldo[66C2] FL9801 FILTER_LC_SM-220MHZ- mlb_noldo[69A5] L7375 IND_0402 mlb_noldo[56B1]
C7689 CAP_402 mlb_noldo[59B4] C8372 CAP_402 mlb_noldo[66B1] LF L7390 IND_0402 mlb_noldo[56D8]
C7690 CAP_805 mlb_noldo[59B2] C8375 CAP_402 mlb_noldo[66B3] FL9802 FILTER_LC_SM-220MHZ- mlb_noldo[69A5] L7400 IND_0402 mlb_noldo[57B4]
C7691 CAP_805 mlb_noldo[59B1] C8381 CAP_603 mlb_noldo[66B3] LF L7500 IND_SM mlb_noldo[58D2]
C7692 CAP_P_SMC-LF mlb_noldo[59B1] C9400 CAP_402 mlb_noldo[67C3] GV3901 HOLE_VIA mlb_noldo[35C2] L7501 IND_SM mlb_noldo[58B2]
C7700 CAP_603 mlb_noldo[60C4] C9401 CAP_402 mlb_noldo[67C3] GV3902 HOLE_VIA mlb_noldo[35C2] L7620 IND_L812HW mlb_noldo[59B7]
C7701 CAP_402 mlb_noldo[60C3] C9402 CAP_402 mlb_noldo[67C3] GV3903 HOLE_VIA mlb_noldo[35C2] L7680 IND_SM mlb_noldo[59B2]
C7702 CAP_603 mlb_noldo[60C3] C9403 CAP_402 mlb_noldo[67C3] GV3904 HOLE_VIA mlb_noldo[35C2] L7820 IND_3P_SM mlb_noldo[61B3]
C7703 CAP_603 mlb_noldo[60C4] C9408 CAP_402 mlb_noldo[67A3] GV3905 HOLE_VIA mlb_noldo[35B2] L7920 IND_SM mlb_noldo[62B7]
C7704 CAP_402 mlb_noldo[60C3] C9409 CAP_402 mlb_noldo[67B2] GV3906 HOLE_VIA mlb_noldo[35B2] L7960 IND_3P_SM mlb_noldo[62B2]
C7705 CAP_603 mlb_noldo[60C3] C9410 CAP_402 mlb_noldo[67A3] GV3907 HOLE_VIA mlb_noldo[35B2] L8090 IND_CDPH4D19F-SM mlb_noldo[63D1]
C7720 CAP_402 mlb_noldo[60B4] C9411 CAP_402 mlb_noldo[67B5] GV3908 HOLE_VIA mlb_noldo[35B2] L8201 IND_SM-LF mlb_noldo[65A3]
C7721 CAP_603 mlb_noldo[60B3] C9412 CAP_603 mlb_noldo[67B5] J1102 CON_F30STSM_5047_SM1 mlb_noldo[11B2] L8202 IND_0402-LF mlb_noldo[65A3]
C7750 CAP_402 mlb_noldo[60C6] C9413 CAP_402 mlb_noldo[67B6] J2600 CON_F2RT_S2MT_SM_F-R mlb_noldo[26D6] L8203 IND_0402-LF mlb_noldo[65A3]
C7800 CAP_603 mlb_noldo[61C5] C9414 CAP_402 mlb_noldo[67D5] T-SM L8204 IND_0402-LF mlb_noldo[65A3]
C7801 CAP_603 mlb_noldo[61C6] C9415 CAP_402 mlb_noldo[67A3] J2801 CON_F200RT_DDR2DIMM_ mlb_noldo[28D6] L8205 IND_SM-LF mlb_noldo[65A3]
C7802 CAP_603 mlb_noldo[61C5] C9416 CAP_402 mlb_noldo[67A4] TH1_F-RT-TH2 L8207 IND_0402 mlb_noldo[65A7]
C7803 CAP_402 mlb_noldo[61B2] C9459 CAP_402 mlb_noldo[67C5] J2901 CON_F200RT_DDR2DIMM_ mlb_noldo[29D5] L8208 IND_0402 mlb_noldo[65A7]
C7804 CAP_402 mlb_noldo[61C2] C9500 CAP_402 mlb_noldo[68D5] TH1_F-RT-TH2 L8209 IND_0402 mlb_noldo[65A7]
B C7805
C7806
CAP_402
CAP_402
mlb_noldo[61C2]
mlb_noldo[61B7]
C9501
C9502
CAP_402
CAP_402
mlb_noldo[68D4]
mlb_noldo[68D4]
J3801 CON_M50ST_D2MT_SM_M-
ST-SM
mlb_noldo[34C4] L8300
L9400
IND_3P_SM
IND_0402-LF
mlb_noldo[66C4]
mlb_noldo[67D4] B
C7807 CAP_402 mlb_noldo[61B6] C9503 CAP_402 mlb_noldo[68D4] J3901 CON_F19ST_S2MT_SM_F- mlb_noldo[35D8] L9401 IND_0402-LF mlb_noldo[67C4]
C7808 CAP_402 mlb_noldo[61B6] C9504 CAP_603 mlb_noldo[68D4] ST-SM L9402 IND_0402-LF mlb_noldo[67D4]
C7809 CAP_402 mlb_noldo[61C4] C9505 CAP_603 mlb_noldo[68B2] J4200 CON_RJ45_8RT_S2MT_SM mlb_noldo[37C2] L9403 IND_0402-LF mlb_noldo[67D4]
C7810 CAP_402 mlb_noldo[61B4] C9506 CAP_402 mlb_noldo[68C7] _F-RT-SM L9404 IND_0402-LF mlb_noldo[67B4]
C7830 CAP_P_CASED2E-SM mlb_noldo[61C4] C9507 CAP_402 mlb_noldo[68D5] J4500 CON_F6RT_S2MT_TH_F-R mlb_noldo[39B2] L9405 IND_0402-LF mlb_noldo[67A4]
C7831 CAP_603 mlb_noldo[61C4] C9508 CAP_402 mlb_noldo[68D5] T-TH1 L9407 FILTER_4P_SM mlb_noldo[67A4]
C7840 CAP_805 mlb_noldo[61B3] C9509 CAP_402 mlb_noldo[68D4] J4900 CON_F10ST_D_SMA_F-ST mlb_noldo[40C4] L9408 IND_0402-LF mlb_noldo[67B4]
C7841 CAP_805 mlb_noldo[61B3] C9510 CAP_402 mlb_noldo[68D4] -SM L9500 IND_0402-LF mlb_noldo[68D5]
C7842 CAP_P_CASE-D2E-LF mlb_noldo[61B3] C9511 CAP_402 mlb_noldo[68D4] J5200 CON_F4RT_USB_S2MT_TH mlb_noldo[42D1] L9501 IND_0402-LF mlb_noldo[68D5]
C7843 CAP_P_CASE-D2E-LF mlb_noldo[61B2] C9512 CAP_402 mlb_noldo[68D3] _F-RT-TH-M42 L9503 IND_0402-LF mlb_noldo[68D8]
C7864 CAP_402 mlb_noldo[61C2] C9513 CAP_603 mlb_noldo[68D3] J5201 CON_F4RT_USB_S2MT_TH mlb_noldo[42B1] L9504 IND_0402-LF mlb_noldo[68C8]
C7900 CAP_603 mlb_noldo[62C4] C9514 CAP_402 mlb_noldo[68D7] _F-RT-TH-M42 L9505 IND_0402-LF mlb_noldo[68C8]
C7901 CAP_603 mlb_noldo[62A4] C9519 CAP_402 mlb_noldo[68B6] J5300 CON_F52RT_D2MT_SM_F- mlb_noldo[43C5] L9506 IND_0402-LF mlb_noldo[68D8]
C7902 CAP_402 mlb_noldo[62A4] C9520 CAP_402 mlb_noldo[68B6] ST-SM L9804 FILTER_4P_SM1 mlb_noldo[69A2]
C7903 CAP_402 mlb_noldo[62A6] C9521 CAP_402 mlb_noldo[68B3] J5400 CON_F4ST_S2MT_SM_F-S mlb_noldo[44C4] L9805 FILTER_4P_2012H mlb_noldo[69B2]
C7904 CAP_402 mlb_noldo[62A2] C9522 CAP_402 mlb_noldo[68D2] T-SM L9806 FILTER_4P_2012H mlb_noldo[69B2]
C7905 CAP_402 mlb_noldo[62A5] C9523 CAP_402 mlb_noldo[68D2] J6000 CON_F30STSM_5047_SM1 mlb_noldo[47C6] L9807 FILTER_4P_2012H mlb_noldo[69B2]
C7906 CAP_402 mlb_noldo[62A6] C9524 CAP_402 mlb_noldo[68C2] J6250 CON_M2RT_S2MT_SM_M-R mlb_noldo[49C6] L9844 IND_SM-1 mlb_noldo[69C4]
C7907 CAP_402 mlb_noldo[62A3] C9525 CAP_402 mlb_noldo[68C2] T-SM Q2680 TRA_SINGLE_MOSFET_NC mlb_noldo[26A3]
C7908 CAP_402 mlb_noldo[62D2] C9526 CAP_402 mlb_noldo[68C3] J6251 CON_M2RT_S2MT_SM_M-R mlb_noldo[49A6] HN_SOT23
C7909 CAP_402 mlb_noldo[62C7] C9527 CAP_402 mlb_noldo[68C1] T-SM Q3810 TRA_FDC638P_SM-LF mlb_noldo[34C5]
C7921 CAP_402 mlb_noldo[62B6] C9530 CAP_402 mlb_noldo[68D7] J6501 CON_F4ST_S2MT_SM_F-S mlb_noldo[51C3] Q3875 TRA_2N7002DW_SOT-363 mlb_noldo[34C6 34C7]
C7922 CAP_402 mlb_noldo[62C5] C9531 CAP_402 mlb_noldo[68D7] T-SM Q4590 TRA_FDC638P_SM-LF mlb_noldo[39D5]
C7924 CAP_402 mlb_noldo[62C6] C9532 CAP_402 mlb_noldo[68C7] J7300 CON_F8RT_2MT_AUDIOOU mlb_noldo[56C8] Q4591 TRA_2N7002_SOT23-LF mlb_noldo[39C5]
C7925 CAP_402 mlb_noldo[62B6] C9533 CAP_402 mlb_noldo[68C7] T_TH_F-RT-TH Q5901 TRA_2N7002DW_SOT-363 mlb_noldo[46B4 46B5]
C7926 CAP_402 mlb_noldo[62B6] C9534 CAP_402 mlb_noldo[68C7] J7301 CON_M3RT_S2MT_SM_M-R mlb_noldo[56D1] Q5950 TRA_2N3906_SOT23-LF mlb_noldo[46A3]
C7928 CAP_402 mlb_noldo[62B7] C9535 CAP_402 mlb_noldo[68C7] T-SM1 Q5952 TRA_2N7002_SOT23-LF mlb_noldo[46A3]
C7929 CAP_402 mlb_noldo[62B7] C9536 CAP_402 mlb_noldo[68D7] J7302 CON_F2ST_S2MT_SM_F-S mlb_noldo[56D1] Q6100 TRA_SI3446DV_TSOP-LF mlb_noldo[48A5]
C7930 CAP_402 mlb_noldo[62B5] C9537 CAP_402 mlb_noldo[68D7] T-SM Q6101 TRA_2N7002DW_SOT-363 mlb_noldo[48A6 48A7]
C7931 CAP_402 mlb_noldo[62C7] C9538 CAP_402 mlb_noldo[68D7] J7303 CON_F4ST_S2MT_SM_F-S mlb_noldo[56C1] Q6150 TRA_TP0610_S0T23-3 mlb_noldo[48C6]
A C7932
C7940
CAP_402
CAP_P_CASED2E-SM
mlb_noldo[62C2]
mlb_noldo[62C6]
C9539
C9540
CAP_402
CAP_603
mlb_noldo[68D7]
mlb_noldo[68D6] J7350
T-SM
CON_F8RT_2MT_AUDIOIN mlb_noldo[56B8]
Q6151
Q6152
TRA_2N7002_SOT23-LF
TRA_TP0610_S0T23-3
mlb_noldo[48C7]
mlb_noldo[48C7]
A
C7941 CAP_603 mlb_noldo[62C6] C9541 CAP_402 mlb_noldo[68B5] _TH_F-RT-TH Q6153 TRA_TP0610_S0T23-3 mlb_noldo[48C8]
C7950 CAP_805 mlb_noldo[62B8] C9542 CAP_402 mlb_noldo[68B5] J8200 CON_M5RT_S_SM_M-RT-S mlb_noldo[65D7] Q6200 TRA_BC846BM3T5G_NPN_ mlb_noldo[49B6]
C7952 CAP_P_CASE-D2E-LF mlb_noldo[62B8] C9543 CAP_402 mlb_noldo[68B5] M SOT732-3
C7961 CAP_402 mlb_noldo[62B3] C9544 CAP_402 mlb_noldo[68B5] J8250 CON_F20ST_D_SM_F-ST- mlb_noldo[65B6] Q6560 TRA_2N7002_SOT23-LF mlb_noldo[51B3]
C7962 CAP_402 mlb_noldo[62C4] C9545 CAP_402 mlb_noldo[68B5] SM1 Q6650 TRA_2N7002_SOT23-LF mlb_noldo[52B6]
C7964 CAP_402 mlb_noldo[62C3] C9546 CAP_402 mlb_noldo[68B4] J9400 CON_F4ST_S2MT_SM_F-S mlb_noldo[67D2] Q6651 TRA_TP0610_S0T23-3 mlb_noldo[52B6]
C7965 CAP_402 mlb_noldo[62B3] C9547 CAP_402 mlb_noldo[68B4] T-SM Q7400 TRA_2N7002DW_SOT-363 mlb_noldo[57C7 57D7]
C7966 CAP_402 mlb_noldo[62B3] C9548 CAP_402 mlb_noldo[68B4] J9401 CON_F22RT_S4MT_SM_F- mlb_noldo[67B1] Q7401 TRA_2N7002DW_SOT-363 mlb_noldo[57D5 57D6]
C7968 CAP_402 mlb_noldo[62B2] C9804 CAP_402 mlb_noldo[69C4] RT-SM Q7402 TRA_2N7002DW_SOT-363 mlb_noldo[57B7 57C5]
C7969 CAP_402 mlb_noldo[62B2] C9808 CAP_402 mlb_noldo[69C5] J9801 CON_DVI_30RT_Q4MT_TH mlb_noldo[69B4] Q7500 TRA_HAT2168H_LFPAK mlb_noldo[58D3]
C7970 CAP_402 mlb_noldo[62B4] C9809 CAP_402 mlb_noldo[69B5] 1_RT-TH Q7501 TRA_HAT2165H_LFPAK mlb_noldo[58D4]
C7980 CAP_P_CASED2E-SM mlb_noldo[62C4] C9812 CAP_402 mlb_noldo[69B5] L1922 IND_0603 mlb_noldo[19A7] Q7502 TRA_HAT2168H_LFPAK mlb_noldo[58C3]
110
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Q7503 TRA_HAT2165H_LFPAK mlb_noldo[58B4] R2085 RES_402 mlb_noldo[20C4] R3405 RES_402 mlb_noldo[33C1] R5906 RES_402 mlb_noldo[46D4]
Q7504 TRA_HAT2165H_LFPAK mlb_noldo[58D3] R2100 RES_402 mlb_noldo[21C3] R3406 RES_402 mlb_noldo[33B1] R5910 RES_603 mlb_noldo[46C8]
Q7505 TRA_HAT2165H_LFPAK mlb_noldo[58B3] R2101 RES_402 mlb_noldo[21C4] R3407 RES_402 mlb_noldo[33B1] R5911 RES_402 mlb_noldo[46A6]
Q7620 TRA_STL8NH3LL_COMBO_ mlb_noldo[59C7] R2105 RES_402 mlb_noldo[21D6] R3408 RES_402 mlb_noldo[33C1] R5918 RES_402 mlb_noldo[46C5]
PWRFLT-3P3X3P3 R2107 RES_402 mlb_noldo[21C2] R3409 RES_402 mlb_noldo[33C1] R5919 RES_402 mlb_noldo[46C5]
Q7621 TRA_STL8NH3LL_COMBO_ mlb_noldo[59B7] R2108 RES_402 mlb_noldo[21C2] R3410 RES_402 mlb_noldo[33C1] R5920 RES_402 mlb_noldo[46C5]
PWRFLT-3P3X3P3 R2110 RES_402 mlb_noldo[21C2] R3411 RES_402 mlb_noldo[33D4] R5922 RES_402 mlb_noldo[46C5]
Q7660 TRA_STL8NH3LL_COMBO_ mlb_noldo[59C3] R2194 RES_402 mlb_noldo[21D4] R3412 RES_402 mlb_noldo[33D4] R5923 RES_402 mlb_noldo[46C5]
Q7661 TRA_STL8NH3LL_COMBO_ mlb_noldo[59B3] R2196 RES_402 mlb_noldo[21C6] R3414 RES_402 mlb_noldo[33D4] R5925 RES_402 mlb_noldo[46C5]
Q7750 TRA_2N7002DW_SOT-363 mlb_noldo[60C6 60C7] R2198 RES_402 mlb_noldo[21C6] R3416 RES_402 mlb_noldo[33D4] R5927 RES_402 mlb_noldo[46C5]
Q7820 TRA_IRF7821_SO-8 mlb_noldo[61C4] R2199 RES_402 mlb_noldo[21C3] R3417 RES_402 mlb_noldo[33C7] R5928 RES_402 mlb_noldo[46D4]
Q7821 TRA_IRF7832_SO-8 mlb_noldo[61B4] R2200 RES_402 mlb_noldo[22D7] R3418 RES_402 mlb_noldo[33B4] R5929 RES_402 mlb_noldo[46C5]
D Q7920
Q7921
TRA_IRF7821_SO-8
TRA_IRF7832_SO-8
mlb_noldo[62C6]
mlb_noldo[62B6]
R2203
R2204
RES_402
RES_402
mlb_noldo[22C2]
mlb_noldo[22C2]
R3419
R3420
RES_402
RES_402
mlb_noldo[33B4]
mlb_noldo[33A4]
R5930
R5931
RES_402
RES_402
mlb_noldo[46C5]
mlb_noldo[46C4]
D
Q7960 TRA_IRF7821_SO-8 mlb_noldo[62C3] R2205 RES_402 mlb_noldo[22C6] R3421 RES_402 mlb_noldo[33A4] R5932 RES_402 mlb_noldo[46C4]
Q7961 TRA_IRF7832_SO-8 mlb_noldo[62B3] R2206 RES_402 mlb_noldo[22C5] R3422 RES_402 mlb_noldo[33C4] R5933 RES_402 mlb_noldo[46C4]
Q8000 TRA_FDC638P_SM-LF mlb_noldo[63D4] R2207 RES_402 mlb_noldo[22C5] R3423 RES_402 mlb_noldo[33C4] R5934 RES_402 mlb_noldo[46C5]
Q8005 TRA_STL8NH3LL_COMBO_ mlb_noldo[63C4] R2208 RES_402 mlb_noldo[22D5] R3426 RES_402 mlb_noldo[33C4] R5935 RES_402 mlb_noldo[46C4]
PWRFLT-3P3X3P3 R2211 RES_402 mlb_noldo[22B3] R3427 RES_402 mlb_noldo[33C4] R5936 RES_402 mlb_noldo[46C5]
Q8010 TRA_FDC638P_SM-LF mlb_noldo[63D4] R2223 RES_402 mlb_noldo[22D6] R3428 RES_402 mlb_noldo[33C4] R5937 RES_402 mlb_noldo[46C4]
Q8015 TRA_STL8NH3LL_COMBO_ mlb_noldo[63C4] R2225 RES_402 mlb_noldo[22D7] R3429 RES_402 mlb_noldo[33D8] R5938 RES_402 mlb_noldo[46C5]
PWRFLT-3P3X3P3 R2226 RES_402 mlb_noldo[22D5] R3430 RES_402 mlb_noldo[33D7] R5939 RES_402 mlb_noldo[46C4]
Q8025 TRA_SI3447BDV_SOT-6 mlb_noldo[63A4] R2250 RES_402 mlb_noldo[22D7] R3431 RES_402 mlb_noldo[33B1] R5940 RES_402 mlb_noldo[46C5]
Q8030 TRA_2N7002DW_SOT-363 mlb_noldo[63A6 63B6] R2251 RES_402 mlb_noldo[22D6] R3432 RES_402 mlb_noldo[33D7] R5941 RES_402 mlb_noldo[46C4]
Q8031 TRA_2N7002DW_SOT-363 mlb_noldo[63D6 63A6] R2255 RES_402 mlb_noldo[22D7] R3433 RES_402 mlb_noldo[33D8] R5942 RES_402 mlb_noldo[46C5]
Q8059 TRA_2N7002DW_SOT-363 mlb_noldo[63C7 63C7] R2299 RES_402 mlb_noldo[22B5] R3434 RES_402 mlb_noldo[33D4] R5943 RES_402 mlb_noldo[46B4]
Q8060 TRA_2N7002_SOT23-LF mlb_noldo[63C8] R2300 RES_402 mlb_noldo[23C7] R3435 RES_402 mlb_noldo[33C4] R5944 RES_402 mlb_noldo[46B4]
Q8061 TRA_2N7002DW_SOT-363 mlb_noldo[63B7 63B7] R2302 RES_402 mlb_noldo[23D3] R3436 RES_402 mlb_noldo[33B1] R5945 RES_402 mlb_noldo[46C4]
Q8062 TRA_2N7002_SOT23-LF mlb_noldo[63B8] R2303 RES_402 mlb_noldo[23D3] R3437 RES_402 mlb_noldo[33B1] R5946 RES_402 mlb_noldo[46C4]
Q8063 TRA_2N7002_SOT23-LF mlb_noldo[63B4] R2305 RES_402 mlb_noldo[23D3] R3438 RES_402 mlb_noldo[33D1] R5947 RES_402 mlb_noldo[46B4]
Q8210 TRA_2N7002DW_SOT-363 mlb_noldo[65C6 65C3] R2306 RES_402 mlb_noldo[23B7] R3439 RES_402 mlb_noldo[33D1] R5948 RES_402 mlb_noldo[46C5]
Q8220 TRA_2N7002DW_SOT-363 mlb_noldo[65C7 65C6] R2307 RES_402 mlb_noldo[23A7] R3440 RES_402 mlb_noldo[33D1] R5949 RES_402 mlb_noldo[46C4]
Q8240 TRA_TP0610_S0T23-3 mlb_noldo[65C5] R2308 RES_402 mlb_noldo[23B7] R3441 RES_402 mlb_noldo[33D1] R5950 RES_402 mlb_noldo[46A3]
Q8250 TRA_SI4405DY_SO-8 mlb_noldo[65D2] R2309 RES_402 mlb_noldo[23A7] R3442 RES_402 mlb_noldo[33C1] R5951 RES_402 mlb_noldo[46A3]
Q8298 TRA_TP0610_S0T23-3 mlb_noldo[65C7] R2310 RES_402 mlb_noldo[23A7] R3450 RES_402 mlb_noldo[33C7] R5952 RES_402 mlb_noldo[46A3]
Q8299 TRA_2N7002_SOT23-LF mlb_noldo[65C7] R2311 RES_402 mlb_noldo[23A7] R3451 RES_402 mlb_noldo[33B7] R5953 RES_402 mlb_noldo[46D5]
Q8300 TRA_SI4405DY_SO-8 mlb_noldo[66D5] R2312 RES_402 mlb_noldo[23A3] R3452 RES_402 mlb_noldo[33B7] R5954 RES_402 mlb_noldo[46B5]
Q8301 TRA_HAT2168H_LFPAK mlb_noldo[66C4] R2313 RES_402 mlb_noldo[23A7] R3453 RES_402 mlb_noldo[33B7] R5955 RES_402 mlb_noldo[46B5]
Q8302 TRA_HAT2165H_LFPAK mlb_noldo[66B4] R2314 RES_402 mlb_noldo[23A7] R3454 RES_402 mlb_noldo[33B7] R5970 RES_402 mlb_noldo[46D3]
Q8320 TRA_SI4405DY_SO-8 mlb_noldo[66B3] R2315 RES_402 mlb_noldo[23A3] R3463 RES_402 mlb_noldo[33D7] R5971 RES_402 mlb_noldo[46D3]
Q8321 TRA_SI4405DY_SO-8 mlb_noldo[66B3] R2316 RES_402 mlb_noldo[23D7] R3465 RES_402 mlb_noldo[33C4] R5972 RES_402 mlb_noldo[46C7]
Q8322 TRA_2N7002DW_SOT-363 mlb_noldo[66A4 66A4] R2317 RES_402 mlb_noldo[23D7] R3466 RES_402 mlb_noldo[33A7] R5973 RES_402 mlb_noldo[46C5]
Q8324 TRA_2N7002DW_SOT-363 mlb_noldo[66A3 66A4] R2318 RES_402 mlb_noldo[23D7] R3467 RES_402 mlb_noldo[33A7] R5976 RES_402 mlb_noldo[46D1]
Q8340 TRA_IRLML5203_SM mlb_noldo[66C8] R2319 RES_402 mlb_noldo[23D2] R3468 RES_402 mlb_noldo[33C7] R5977 RES_402 mlb_noldo[46C1]
C Q8350
Q9403
TRA_2N7002_SOT23-LF
TRA_FDC638P_SM-LF
mlb_noldo[66A6]
mlb_noldo[67B6]
R2320
R2323
RES_402
RES_402
mlb_noldo[23D7]
mlb_noldo[23D5]
R3469
R3470
RES_402
RES_402
mlb_noldo[33C7]
mlb_noldo[33C7]
R5980
R5981
RES_402
RES_402
mlb_noldo[46D5]
mlb_noldo[46D5]
C
Q9404 TRA_2N7002_SOT23-LF mlb_noldo[67B7] R2326 RES_402 mlb_noldo[23D6] R3471 RES_402 mlb_noldo[33B7] R5982 RES_402 mlb_noldo[46D5]
Q9405 TRA_TP0610_S0T23-3 mlb_noldo[67D5] R2327 RES_402 mlb_noldo[23D6] R3472 RES_402 mlb_noldo[33B7] R5983 RES_402 mlb_noldo[46C5]
Q9406 TRA_2N7002_SOT23-LF mlb_noldo[67D6] R2343 RES_402 mlb_noldo[23D1] R3473 RES_402 mlb_noldo[33B7] R5984 RES_402 mlb_noldo[46C5]
Q9801 TRA_2N7002DW_SOT-363 mlb_noldo[69D6 69D6] R2388 RES_402 mlb_noldo[23B2] R3474 RES_402 mlb_noldo[33B8] R5985 RES_402 mlb_noldo[46C5]
R0610 RES_402 mlb_noldo[6A7] R2389 RES_402 mlb_noldo[23A4] R3475 RES_402 mlb_noldo[33B7] R5986 RES_402 mlb_noldo[46C5]
R0611 RES_402 mlb_noldo[6A8] R2390 RES_402 mlb_noldo[23B3] R3476 RES_402 mlb_noldo[33A7] R5987 RES_402 mlb_noldo[46C5]
R0612 RES_402 mlb_noldo[6A8] R2395 RES_402 mlb_noldo[23D7] R3477 RES_402 mlb_noldo[33B4] R5988 RES_402 mlb_noldo[46B5]
R0621 RES_402 mlb_noldo[6A7] R2396 RES_402 mlb_noldo[23D6] R3478 RES_402 mlb_noldo[33B4] R5989 RES_402 mlb_noldo[46D5]
R0702 RES_402 mlb_noldo[7D5] R2397 RES_402 mlb_noldo[23D6] R3480 RES_402 mlb_noldo[33C7] R5990 RES_402 mlb_noldo[46B2]
R0703 RES_402 mlb_noldo[7C5] R2398 RES_402 mlb_noldo[23D8] R3481 RES_402 mlb_noldo[33B1] R5991 RES_402 mlb_noldo[46B2]
R0704 RES_402 mlb_noldo[7C5] R2399 RES_402 mlb_noldo[23C1] R3482 RES_402 mlb_noldo[33B1] R5992 RES_402 mlb_noldo[46B2]
R0705 RES_402 mlb_noldo[7B4] R2500 RES_603 mlb_noldo[25A8] R3490 RES_402 mlb_noldo[33A4] R5993 RES_402 mlb_noldo[46B2]
R0706 RES_402 mlb_noldo[7B4] R2501 RES_402 mlb_noldo[25C8] R3824 RES_402 mlb_noldo[34C4] R5994 RES_402 mlb_noldo[46D5]
R0707 RES_402 mlb_noldo[7A4] R2502 RES_402 mlb_noldo[25D8] R3825 RES_402 mlb_noldo[34C5] R5995 RES_402 mlb_noldo[46D5]
R0712 RES_402 mlb_noldo[7A4] R2600 RES_402 mlb_noldo[26D4] R3851 RES_402 mlb_noldo[34C4] R5996 RES_402 mlb_noldo[46B4]
R0716 RES_402 mlb_noldo[7B2] R2606 RES_402 mlb_noldo[26D5] R3853 RES_402 mlb_noldo[34C3] R5997 RES_402 mlb_noldo[46B4]
R0717 RES_402 mlb_noldo[7B2] R2607 RES_402 mlb_noldo[26D5] R3858 RES_402 mlb_noldo[34B5] R5998 RES_402 mlb_noldo[46C4]
R0718 RES_402 mlb_noldo[7B2] R2609 RES_402 mlb_noldo[26C7] R3859 RES_402 mlb_noldo[34B4] R5999 RES_402 mlb_noldo[46C4]
R0719 RES_402 mlb_noldo[7B2] R2610 RES_402 mlb_noldo[26C7] R3865 RES_402 mlb_noldo[34C6] R6100 RES_402 mlb_noldo[48D3]
R0720 RES_402 mlb_noldo[7B7] R2611 RES_402 mlb_noldo[26B5] R3876 RES_402 mlb_noldo[34C7] R6102 RES_402 mlb_noldo[48C2]
R0721 RES_402 mlb_noldo[7B7] R2612 RES_402 mlb_noldo[26A5] R3877 RES_402 mlb_noldo[34C6] R6103 RES_402 mlb_noldo[48C3]
R0722 RES_402 mlb_noldo[7A7] R2622 RES_402 mlb_noldo[26A5] R3900 RES_402 mlb_noldo[35D3] R6105 RES_402 mlb_noldo[48D4]
R0730 RES_402 mlb_noldo[7A4] R2636 RES_402 mlb_noldo[26C2] R3901 RES_402 mlb_noldo[35C3] R6106 RES_402 mlb_noldo[48C4]
R0802 RES_402 mlb_noldo[8B6] R2637 RES_402 mlb_noldo[26C2] R3950 RES_402 mlb_noldo[35B7] R6107 RES_402 mlb_noldo[48D4]
R0803 RES_402 mlb_noldo[8A7] R2638 RES_402 mlb_noldo[26C2] R4101 RES_402 mlb_noldo[36D8] R6108 RES_402 mlb_noldo[48C4]
R0921 RES_402 mlb_noldo[9D2] R2639 RES_402 mlb_noldo[26C2] R4102 RES_402 mlb_noldo[36C8] R6112 RES_402 mlb_noldo[48B2]
R0922 RES_402 mlb_noldo[9D2] R2640 RES_402 mlb_noldo[26C2] R4103 RES_402 mlb_noldo[36B4] R6140 RES_402 mlb_noldo[48A7]
R0923 RES_402 mlb_noldo[9C2] R2641 RES_402 mlb_noldo[26C2] R4104 RES_402 mlb_noldo[36B4] R6141 RES_402 mlb_noldo[48A7]
B R0926
R0927
RES_402
RES_402
mlb_noldo[9C2]
mlb_noldo[9C2]
R2680
R2681
RES_402
RES_402
mlb_noldo[26B3]
mlb_noldo[26B2]
R4107
R4117
RES_402
RES_402
mlb_noldo[36D8]
mlb_noldo[36B3]
R6144
R6150
RES_402
RES_402
mlb_noldo[48A6]
mlb_noldo[48C6] B
R1001 RES_402 mlb_noldo[10B6] R2682 RES_402 mlb_noldo[26A2] R4118 RES_402 mlb_noldo[36B3] R6151 RES_402 mlb_noldo[48B6]
R1002 RES_402 mlb_noldo[10B6] R2683 RES_402 mlb_noldo[26B2] R4119 RES_402 mlb_noldo[36B3] R6152 RES_402 mlb_noldo[48C7]
R1005 RES_402 mlb_noldo[10C4] R2684 RES_402 mlb_noldo[26B2] R4120 RES_402 mlb_noldo[36B4] R6153 RES_402 mlb_noldo[48B7]
R1006 RES_402 mlb_noldo[10C3] R2685 RES_402 mlb_noldo[26B2] R4122 RES_402 mlb_noldo[36A3] R6200 RES_402 mlb_noldo[49C5]
R1100 RES_402 mlb_noldo[11B5] R2687 RES_402 mlb_noldo[26B2] R4123 RES_402 mlb_noldo[36A2] R6201 RES_402 mlb_noldo[49C5]
R1101 RES_402 mlb_noldo[11C5] R2688 RES_402 mlb_noldo[26A3] R4124 RES_402 mlb_noldo[36A2] R6203 RES_402 mlb_noldo[49D3]
R1102 RES_402 mlb_noldo[11B4] R2689 RES_402 mlb_noldo[26A2] R4130 RES_402 mlb_noldo[36B6] R6251 RES_402 mlb_noldo[49A5]
R1103 RES_402 mlb_noldo[11C5] R2696 RES_402 mlb_noldo[26C6] R4131 RES_402 mlb_noldo[36B6] R6252 RES_402 mlb_noldo[49B3]
R1104 RES_402 mlb_noldo[11B5] R2697 RES_402 mlb_noldo[26C5] R4200 RES_402 mlb_noldo[37A6] R6301 RES_402 mlb_noldo[50D4]
R1106 RES_402 mlb_noldo[11A3] R2698 RES_402 mlb_noldo[26C5] R4201 RES_402 mlb_noldo[37A5] R6302 RES_402 mlb_noldo[50D4]
R1210 RES_402 mlb_noldo[12C3] R2700 RES_402 mlb_noldo[27D7] R4202 RES_402 mlb_noldo[37A5] R6303 RES_402 mlb_noldo[50C3]
R1220 RES_402 mlb_noldo[12B7] R2750 RES_402 mlb_noldo[27D4] R4400 RES_402 mlb_noldo[38C3] R6307 RES_402 mlb_noldo[50C5]
R1221 RES_402 mlb_noldo[12B7] R2751 RES_402 mlb_noldo[27D4] R4420 RES_402 mlb_noldo[38C2] R6308 RES_402 mlb_noldo[50D3]
R1225 RES_402 mlb_noldo[12B7] R2760 RES_402 mlb_noldo[27C4] R4431 RES_402 mlb_noldo[38A6] R6309 RES_402 mlb_noldo[50C5]
R1226 RES_402 mlb_noldo[12B7] R2761 RES_402 mlb_noldo[27C4] R4432 RES_402 mlb_noldo[38A6] R6560 RES_402 mlb_noldo[51C3]
R1230 RES_402 mlb_noldo[12A7] R2770 RES_402 mlb_noldo[27D2] R4452 RES_402 mlb_noldo[38C3] R6561 RES_402 mlb_noldo[51B4]
R1231 RES_402 mlb_noldo[12A7] R2771 RES_402 mlb_noldo[27D2] R4500 RES_402 mlb_noldo[39B6] R6565 RES_402 mlb_noldo[51C3]
R1235 RES_402 mlb_noldo[12A7] R2780 RES_402 mlb_noldo[27C2] R4501 RES_402 mlb_noldo[39B6] R6621 RES_402 mlb_noldo[52A5]
R1236 RES_402 mlb_noldo[12A7] R2781 RES_402 mlb_noldo[27C2] R4502 RES_402 mlb_noldo[39B5] R6650 RES_402 mlb_noldo[52B6]
R1310 RES_402 mlb_noldo[13D3] R2782 RES_402 mlb_noldo[27B2] R4503 RES_402 mlb_noldo[39B5] R6652 RES_402 mlb_noldo[52B7]
R1410 RES_402 mlb_noldo[14C2] R2783 RES_402 mlb_noldo[27B2] R4504 RES_402 mlb_noldo[39A5] R6700 RES_402 mlb_noldo[53C7]
R1420 RES_402 mlb_noldo[14C6] R2801 RES_402 mlb_noldo[28D2] R4590 RES_402 mlb_noldo[39C5] R6703 RES_402 mlb_noldo[53C4]
R1421 RES_402 mlb_noldo[14C6] R2900 RES_402 mlb_noldo[29A4] R4591 RES_402 mlb_noldo[39C5] R6704 RES_805 mlb_noldo[53C2]
R1422 RES_402 mlb_noldo[14B6] R2901 RES_402 mlb_noldo[29D2] R4593 RES_402 mlb_noldo[39C6] R6705 RES_805 mlb_noldo[53C3]
R1430 RES_402 mlb_noldo[14B6] R2902 RES_402 mlb_noldo[29D2] R4594 RES_402 mlb_noldo[39C6] R6798 RES_402 mlb_noldo[53B6]
R1440 RES_402 mlb_noldo[14D6] R3001 RES_402 mlb_noldo[30D4] R4595 RES_402 mlb_noldo[39C5] R6799 RES_402 mlb_noldo[53B6]
R1441 RES_402 mlb_noldo[14D6] R3009 RES_402 mlb_noldo[30D4] R4910 RES_402 mlb_noldo[40C6] R6800 RES_402 mlb_noldo[54C6]
R1950 RES_402 mlb_noldo[19D5] R3011 RES_402 mlb_noldo[30C4] R5100 RES_402 mlb_noldo[41C6] R6801 RES_402 mlb_noldo[54B5]
A R1951
R1975
RES_402
RES_402
mlb_noldo[19D5]
mlb_noldo[19A4]
R3025
R3035
RES_402
RES_402
mlb_noldo[30C4]
mlb_noldo[30B4]
R5250
R5251
RES_402
RES_402
mlb_noldo[42C8]
mlb_noldo[42C8]
R6802
R6807
RES_402
RES_402
mlb_noldo[54A5]
mlb_noldo[54D7]
A
R1985 RES_402 mlb_noldo[19D3] R3100 RES_402 mlb_noldo[31C5] R5301 RES_402 mlb_noldo[43B4] R6808 RES_402 mlb_noldo[54D3]
R1986 RES_402 mlb_noldo[19C6] R3104 RES_402 mlb_noldo[31C5] R5302 RES_402 mlb_noldo[43B4] R6809 RES_402 mlb_noldo[54C3]
R1987 RES_402 mlb_noldo[19C6] R3300 RES_402 mlb_noldo[32B6] R5303 RES_402 mlb_noldo[43C4] R6810 RES_402 mlb_noldo[54A4]
R1988 RES_402 mlb_noldo[19C7] R3301 RES_402 mlb_noldo[32B7] R5801 RES_402 mlb_noldo[45D1] R6811 RES_402 mlb_noldo[54A4]
R1989 RES_402 mlb_noldo[19C7] R3302 RES_402 mlb_noldo[32D4] R5802 RES_402 mlb_noldo[45C1] R6850 RES_402 mlb_noldo[54B7]
R1990 RES_402 mlb_noldo[19C3] R3303 RES_402 mlb_noldo[32C4] R5803 RES_402 mlb_noldo[45C1] R6851 RES_402 mlb_noldo[54B7]
R2058 RES_402 mlb_noldo[20B4] R3304 RES_402 mlb_noldo[32C7] R5809 RES_402 mlb_noldo[45D2] R6852 RES_402 mlb_noldo[54B7]
R2059 RES_402 mlb_noldo[20B4] R3400 RES_402 mlb_noldo[33C1] R5898 RES_402 mlb_noldo[45C2] R6853 RES_402 mlb_noldo[54A7]
R2060 RES_402 mlb_noldo[20A4] R3401 RES_402 mlb_noldo[33C7] R5899 RES_402 mlb_noldo[45D3] R6854 RES_402 mlb_noldo[54B4]
R2075 RES_402 mlb_noldo[20C7] R3402 RES_402 mlb_noldo[33C1] R5900 RES_402 mlb_noldo[46D7] R7201 RES_402 mlb_noldo[55C4]
R2077 RES_402 mlb_noldo[20B7] R3403 RES_402 mlb_noldo[33C1] R5901 RES_603 mlb_noldo[46D8] R7202 RES_402 mlb_noldo[55A4]
R2079 RES_402 mlb_noldo[20B7] R3404 RES_402 mlb_noldo[33D1] R5905 RES_402 mlb_noldo[46D4] R7210 RES_402 mlb_noldo[55A7]
111
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
R7260 RES_402 mlb_noldo[55D2] R7904 RES_402 mlb_noldo[62A3] R9510 RES_402 mlb_noldo[68C2] XW7301 SHORT_SM mlb_noldo[56B4]
R7261 RES_402 mlb_noldo[55C2] R7905 RES_402 mlb_noldo[62A6] R9537 RES_402 mlb_noldo[68D1] XW7302 SHORT_SM mlb_noldo[56C2]
R7270 RES_402 mlb_noldo[55C2] R7906 RES_402 mlb_noldo[62A3] R9538 RES_402 mlb_noldo[68D1] XW7303 SHORT_SM mlb_noldo[56C2]
R7271 RES_402 mlb_noldo[55C2] R7907 RES_402 mlb_noldo[62A3] R9539 RES_402 mlb_noldo[68C1] XW7304 SHORT_SM mlb_noldo[56B2]
R7280 RES_402 mlb_noldo[55B2] R7921 RES_402 mlb_noldo[62C7] R9540 RES_402 mlb_noldo[68C1] XW7305 SHORT_SM mlb_noldo[56B7]
R7281 RES_402 mlb_noldo[55B2] R7924 RES_402 mlb_noldo[62C6] R9821 RES_402 mlb_noldo[69D7] XW7400 SHORT_SM mlb_noldo[57A7]
R7300 RES_402 mlb_noldo[56C4] R7925 RES_402 mlb_noldo[62B6] R9822 RES_402 mlb_noldo[69D6] XW7500 SHORT_SM mlb_noldo[58A6]
R7301 RES_402 mlb_noldo[56C4] R7926 RES_402 mlb_noldo[62C7] R9850 RES_402 mlb_noldo[69B8] XW7600 SHORT_SM mlb_noldo[59A5]
R7320 RES_402 mlb_noldo[56B5] R7927 RES_402 mlb_noldo[62B8] R9851 RES_402 mlb_noldo[69B8] XW7620 JUMPER_OPEN-SAWTOOTH mlb_noldo[59B8]
R7321 RES_402 mlb_noldo[56D7] R7928 RES_402 mlb_noldo[62B8] R9852 RES_402 mlb_noldo[69A8] XW7660 JUMPER_OPEN-SAWTOOTH mlb_noldo[59B1]
R7322 RES_402 mlb_noldo[56B7] R7929 RES_402 mlb_noldo[62C7] R9853 RES_402 mlb_noldo[69A8] XW7800 SHORT_SM mlb_noldo[61B5]
R7349 RES_402 mlb_noldo[56B7] R7930 RES_402 mlb_noldo[62C5] R9854 RES_402 mlb_noldo[69A8] XW7900 SHORT_SM mlb_noldo[62A5]
R7350 RES_402 mlb_noldo[56A4] R7961 RES_402 mlb_noldo[62C2] R9855 RES_402 mlb_noldo[69A8] XW7920 JUMPER_OPEN-SAWTOOTH mlb_noldo[62B8]
R7351 RES_402 mlb_noldo[56A4] R7964 RES_402 mlb_noldo[62C3] R9856 RES_402 mlb_noldo[69B6] XW8101 SHORT_SM mlb_noldo[64B2]
D R7380
R7382
RES_402
RES_402
mlb_noldo[56C2]
mlb_noldo[56B2]
R7965
R7966
RES_402
RES_402
mlb_noldo[62B3]
mlb_noldo[62C2]
R9859
R9860
RES_402
RES_402
mlb_noldo[69A6]
mlb_noldo[69C3]
XW8102
XW8300
SHORT_SM
SHORT_SM
mlb_noldo[64B2]
mlb_noldo[66B4]
D
R7391 RES_402 mlb_noldo[56C7] R7967 RES_402 mlb_noldo[62B2] R9861 RES_402 mlb_noldo[69C3] Y2600 CRYSTAL_4PIN_SM-LF mlb_noldo[26C7]
R7401 RES_402 mlb_noldo[57D8] R7968 RES_402 mlb_noldo[62B2] R9862 RES_402 mlb_noldo[69C5] Y3301 CRYSTAL_5X3.2-SM mlb_noldo[32C7]
R7402 RES_402 mlb_noldo[57D7] R7969 RES_402 mlb_noldo[62C2] R9863 RES_402 mlb_noldo[69C5] Y4101 CRYSTAL_4PIN_SM-3.2X mlb_noldo[36B6]
R7403 RES_402 mlb_noldo[57C7] R7970 RES_402 mlb_noldo[62C4] R9864 RES_402 mlb_noldo[69A6] 2.5MM
R7404 RES_402 mlb_noldo[57C4] R7990 RES_402 mlb_noldo[62A6] R9868 RES_402 mlb_noldo[69C8] Y4403 CRYSTAL_4PIN_SM-3.2X mlb_noldo[38C2]
R7405 RES_402 mlb_noldo[57D5] R7991 RES_402 mlb_noldo[62A6] R9869 RES_402 mlb_noldo[69C8] 2.5MM
R7406 RES_402 mlb_noldo[57D6] R7992 RES_603 mlb_noldo[62A7] R9870 RES_402 mlb_noldo[69C1] Y5920 CRYSTAL_5X3.2-SM mlb_noldo[46C7]
R7411 RES_402 mlb_noldo[57C8] R8000 RES_402 mlb_noldo[63D5] R9871 RES_402 mlb_noldo[69C1] Y6795 CRYSTAL_4PIN_SM-LF mlb_noldo[53B6]
R7412 RES_402 mlb_noldo[57B7] R8005 RES_402 mlb_noldo[63C5] RP2300 RPAK4P_SM-LF mlb_noldo[23D5] Z0601 MTGHOLE mlb_noldo[6B8]
R7413 RES_402 mlb_noldo[57C6] R8010 RES_402 mlb_noldo[63C5] RP2600 RPAK4P_SM-LF mlb_noldo[26D2] Z0602 MTGHOLE mlb_noldo[6C6]
R7414 RES_402 mlb_noldo[57C4] R8015 RES_402 mlb_noldo[63B5] RP2601 RPAK4P_SM-LF mlb_noldo[26D2] Z0603 PCB_STANDOFF mlb_noldo[6A8]
R7415 RES_402 mlb_noldo[57C5] R8025 RES_402 mlb_noldo[63A5] RP2602 RPAK4P_SM-LF mlb_noldo[26C2] Z0604 PCB_STANDOFF mlb_noldo[6A6]
R7430 RES_603 mlb_noldo[57C3] R8030 RES_402 mlb_noldo[63B6] RP3000 RPAK4P_SM-LF mlb_noldo[30B4 30C4 30D4 30D4] Z0605 PCB_STANDOFF mlb_noldo[6A8]
R7431 RES_603 mlb_noldo[57B3] R8031 RES_402 mlb_noldo[63B6] RP3001 RPAK4P_SM-LF mlb_noldo[30C4 30A4 30A4 30D4] Z0606 MTGHOLE mlb_noldo[6D6]
R7432 RES_402 mlb_noldo[57B3] R8032 RES_402 mlb_noldo[63D6] RP3002 RPAK4P_SM-LF mlb_noldo[30A4 30A4 30A4 30D4] Z0607 MTGHOLE mlb_noldo[6C6]
R7433 RES_402 mlb_noldo[57A3] R8033 RES_402 mlb_noldo[63D6] RP3003 RPAK4P_SM-LF mlb_noldo[30C4 30C4 30C4 30D4] Z0608 MTGHOLE mlb_noldo[6C6]
R7434 RES_402 mlb_noldo[57C2] R8050 RES_402 mlb_noldo[63A6] RP3004 RPAK4P_SM-LF mlb_noldo[30C4 30C4 30D4] Z0609 MTGHOLE mlb_noldo[6B7]
R7435 RES_402 mlb_noldo[57C2] R8056 RES_402 mlb_noldo[63C8] RP3005 RPAK4P_SM-LF mlb_noldo[30B4 30A4 30A4 30D4] Z0610 MTGHOLE mlb_noldo[6B6]
R7436 RES_402 mlb_noldo[57B2] R8057 RES_402 mlb_noldo[63C8] RP3006 RPAK4P_SM-LF mlb_noldo[30B4 30B4 30A4 30D4] Z0611 MTGHOLE mlb_noldo[6B7]
R7437 RES_402 mlb_noldo[57B2] R8058 RES_402 mlb_noldo[63B8] RP3007 RPAK4P_SM-LF mlb_noldo[30C4 30C4 30C4 30C4] Z0612 PCB_STANDOFF mlb_noldo[6A6]
R7438 RES_402 mlb_noldo[57C2] R8059 RES_402 mlb_noldo[63B8] RP3008 RPAK4P_SM-LF mlb_noldo[30C4 30C4 30C4 30C4] Z0613 PCB_STANDOFF mlb_noldo[6A5]
R7439 RES_402 mlb_noldo[57B2] R8061 RES_402 mlb_noldo[63B1] RP3009 RPAK4P_SM-LF mlb_noldo[30B4 30B4 30C4 30C4] Z0621 PCB_STANDOFF mlb_noldo[6A6]
R7440 RES_402 mlb_noldo[57A5] R8062 RES_402 mlb_noldo[63B1] RP3010 RPAK4P_SM-LF mlb_noldo[30B4 30B4 30B4 30B4] ZS0620 SPRING_CLIP_1P_EMI_C mlb_noldo[6D7]
R7450 RES_402 mlb_noldo[57A7] R8063 RES_402 mlb_noldo[63A1] RP3011 RPAK4P_SM-LF mlb_noldo[30B4 30A4 30B4 30B4] LIP-SM-M42
R7451 RES_402 mlb_noldo[57A7] R8064 RES_402 mlb_noldo[63A1] T4201 XFR_1000BT_82400275_ mlb_noldo[37C6] ZS0621 CLIP_SM mlb_noldo[6D6]
R7452 RES_402 mlb_noldo[57A7] R8065 RES_402 mlb_noldo[63B2] XFR-SM
R7453 RES_402 mlb_noldo[57A7] R8091 RES_402 mlb_noldo[63D1] T4202 XFR_1000BT_82400275_ mlb_noldo[37B6]
R7454 RES_402 mlb_noldo[57A7] R8092 RES_402 mlb_noldo[63C1] XFR-SM
R7460 RES_402 mlb_noldo[57C6] R8200 RES_402 mlb_noldo[65B7] U0700 CPU_YONAH_BGA mlb_noldo[7C3 7D7]
R7461 RES_402 mlb_noldo[57C7] R8201 RES_402 mlb_noldo[65C5] U0700 CPU_YONAH_BGA mlb_noldo[8D8 8D4]
C R7500
R7501
RES_402
RES_402
mlb_noldo[58C2]
mlb_noldo[58C2]
R8202
R8203
RES_402
RES_402
mlb_noldo[65C5]
mlb_noldo[65C6]
U1001
U1200
ADT7461_MSOP
NB_945GM_BGA
mlb_noldo[10C5]
mlb_noldo[12D5]
C
R7502 RES_805 mlb_noldo[58B3] R8204 RES_402 mlb_noldo[65C6] U1200 NB_945GM_BGA mlb_noldo[13D4]
R7503 RES_805 mlb_noldo[58D3] R8205 RES_805 mlb_noldo[65D4] U1200 NB_945GM_BGA mlb_noldo[14D5]
R7504 RES_402 mlb_noldo[58C1] R8206 RES_402 mlb_noldo[65C4] U1200 NB_945GM_BGA mlb_noldo[15D3 15D7]
R7505 RES_402 mlb_noldo[58B2] R8207 RES_402 mlb_noldo[65C4] U1200 NB_945GM_BGA mlb_noldo[16D2 16C8]
R7506 RES_402 mlb_noldo[58C7] R8208 RES_402 mlb_noldo[65C4] U1200 NB_945GM_BGA mlb_noldo[17D5]
R7507 RES_402 mlb_noldo[58B1] R8209 RES_402 mlb_noldo[65C4] U1200 NB_945GM_BGA mlb_noldo[18D4 18D7]
R7508 RES_402 mlb_noldo[58B8] R8210 RES_402 mlb_noldo[65C4] U1900 LREG_TPS73115_SOT23- mlb_noldo[19D6]
R7509 RES_402 mlb_noldo[58B8] R8211 RES_402 mlb_noldo[65C6] 5
R7510 RES_402 mlb_noldo[58B6] R8213 RES_402 mlb_noldo[65C2] U1901 MM157_SOT23-5-LF mlb_noldo[19C4]
R7511 RES_402 mlb_noldo[58B8] R8214 RES_402 mlb_noldo[65C2] U2100 SB_ICH7M_BGA mlb_noldo[21D6]
R7512 RES_402 mlb_noldo[58D7] R8231 RES_402 mlb_noldo[65C5] U2100 SB_ICH7M_BGA mlb_noldo[22B7 22D3]
R7513 RES_402 mlb_noldo[58B7] R8232 RES_402 mlb_noldo[65C6] U2100 SB_ICH7M_BGA mlb_noldo[23D4]
R7514 RES_402 mlb_noldo[58B8] R8233 RES_402 mlb_noldo[65C5] U2100 SB_ICH7M_BGA mlb_noldo[24D4 24D7]
R7515 RES_402 mlb_noldo[58B5] R8296 RES_402 mlb_noldo[65B7] U2601 MC74VHC1G08_SC70 mlb_noldo[26A5]
R7516 RES_402 mlb_noldo[58B4] R8297 RES_402 mlb_noldo[65C3] U2603 MC74VHC1G00_SC70-5 mlb_noldo[26A7]
R7517 RES_402 mlb_noldo[58B5] R8298 RES_402 mlb_noldo[65C8] U2680 MC74VHC1G08_SC70 mlb_noldo[26B3]
R7518 RES_402 mlb_noldo[58B5] R8299 RES_402 mlb_noldo[65C7] U3100 LREG_BD3533FVM_MSOP- mlb_noldo[31C4]
R7519 RES_402 mlb_noldo[58C7] R8300 RES_402 mlb_noldo[66C6] 8
R7520 RES_402 mlb_noldo[58D7] R8301 RES_402 mlb_noldo[66C7] U3301 CLK_SYN_SLG8LP436_QF mlb_noldo[32C5]
R7521 RES_402 mlb_noldo[58D8] R8302 RES_402 mlb_noldo[66C5] N
R7522 RES_402 mlb_noldo[58A5] R8303 RES_402 mlb_noldo[66C5] U4101 88E8053_QFN mlb_noldo[36D6]
R7523 RES_402 mlb_noldo[58A6] R8304 RES_805 mlb_noldo[66B2] U4102 EEPROM_M24C08_SO8 mlb_noldo[36A3]
R7524 RES_402 mlb_noldo[58D5] R8305 RES_402 mlb_noldo[66C5] U4400 FW32306_BGA_BGA mlb_noldo[38C5]
R7525 RES_402 mlb_noldo[58C5] R8306 RES_402 mlb_noldo[66C7] U5100 CY8C24794_MLF mlb_noldo[41C5]
R7526 THERMISTER_402 mlb_noldo[58C7] R8308 RES_0612 mlb_noldo[66C3] U5200 SWI_TPS2042B_MSOP mlb_noldo[42C7]
R7527 RES_402 mlb_noldo[58C8] R8309 RES_402 mlb_noldo[66B6] U5800 SMC_H8S2116_BGA mlb_noldo[45A8 45C3 45C7 45D7]
R7530 RES_402 mlb_noldo[58B4] R8310 RES_402 mlb_noldo[66C5] U5900 VDET_RN5VD_SOT23-5 mlb_noldo[46D7]
R7531 THERMISTER_0603-LF mlb_noldo[58B4] R8311 RES_402 mlb_noldo[66B7] U5910 OSC_12P_SG-3040LC-SM mlb_noldo[46A7]
R7543 RES_402 mlb_noldo[58B2] R8312 RES_402 mlb_noldo[66C7] U5977 COMPARATOR_LMC7211_S mlb_noldo[46C2]
R7545 RES_402 mlb_noldo[58C7] R8320 RES_2525 mlb_noldo[66B3] M-LF
B R7600
R7603
RES_402
RES_402
mlb_noldo[59C5]
mlb_noldo[59A3]
R8322
R8323
RES_402
RES_402
mlb_noldo[66A3]
mlb_noldo[66A3]
U6100 OPAMP_LMV2011_SOT23-
5
mlb_noldo[48C3]
B
R7604 RES_402 mlb_noldo[59A3] R8324 RES_402 mlb_noldo[66A4] U6200 MAX6695_UMAX1 mlb_noldo[49D4]
R7606 RES_402 mlb_noldo[59A3] R8325 RES_402 mlb_noldo[66A5] U6250 MAX6695_UMAX1 mlb_noldo[49B4]
R7607 RES_402 mlb_noldo[59A3] R8330 RES_402 mlb_noldo[66B4] U6301 FLASH_SST25VF016B_SO mlb_noldo[50D3]
R7621 RES_402 mlb_noldo[59C7] R8331 RES_402 mlb_noldo[66A4] I_SOI
R7624 RES_402 mlb_noldo[59C6] R8340 RES_402 mlb_noldo[66C8] U6620 KXM52_QFN mlb_noldo[52C5]
R7625 RES_402 mlb_noldo[59B6] R8341 RES_402 mlb_noldo[66B8] U6650 LIS3L02AL_LGA mlb_noldo[52B5]
R7626 RES_402 mlb_noldo[59C7] R8342 RES_402 mlb_noldo[66C8] U6700 TPM_TSSOP mlb_noldo[53C5]
R7627 RES_402 mlb_noldo[59B7] R8343 RES_402 mlb_noldo[66B8] U6800 AUDIO_STAC92204XR_LQ mlb_noldo[54D5]
R7628 RES_402 mlb_noldo[59B7] R8344 RES_402 mlb_noldo[66B8] FP
R7629 RES_402 mlb_noldo[59C7] R8350 RES_402 mlb_noldo[66B5] U7210 MAX9705_TDFN1 mlb_noldo[55C5]
R7630 RES_402 mlb_noldo[59C5] R8351 RES_402 mlb_noldo[66B6] U7220 MAX9705_TDFN1 mlb_noldo[55B5]
R7661 RES_402 mlb_noldo[59C2] R8352 RES_402 mlb_noldo[66B5] U7230 MAX9705_TDFN1 mlb_noldo[55A5]
R7664 RES_402 mlb_noldo[59C3] R8360 RES_402 mlb_noldo[66D7] U7400 MAX9890_UCSP1 mlb_noldo[57C2]
R7665 RES_402 mlb_noldo[59B4] R8361 RES_402 mlb_noldo[66C7] U7500 ISL6262_QFN mlb_noldo[58C6]
R7666 RES_402 mlb_noldo[59C2] R8362 RES_402 mlb_noldo[66B7] U7600 LTC3728L_QFN mlb_noldo[59C5]
R7667 RES_402 mlb_noldo[59B2] R8363 RES_402 mlb_noldo[66B6] U7700 MAX8887_SOT23-5 mlb_noldo[60D4]
R7668 RES_402 mlb_noldo[59B2] R8364 RES_402 mlb_noldo[66B6] U7701 MAX8887_SOT23-5 mlb_noldo[60C4]
R7669 RES_402 mlb_noldo[59C2] R8365 RES_402 mlb_noldo[66B6] U7720 LREG_MAX8516_SOP mlb_noldo[60B3]
R7670 RES_402 mlb_noldo[59C4] R8367 RES_402 mlb_noldo[66C6] U7800 ISL6269_QFN mlb_noldo[61C5]
R7720 RES_402 mlb_noldo[60B3] R8370 RES_402 mlb_noldo[66C2] U7801 AMP_INA326_MSOP mlb_noldo[61C2]
R7721 RES_402 mlb_noldo[60A3] R8371 RES_402 mlb_noldo[66B2] U7900 LTC3728L_QFN mlb_noldo[62C5]
R7750 RES_402 mlb_noldo[60C6] R8381 RES_603 mlb_noldo[66B4] U7901 AMP_INA326_MSOP mlb_noldo[62A6]
R7751 RES_402 mlb_noldo[60C7] R8397 RES_0612 mlb_noldo[66C4] U8070 LTC2908_LLP mlb_noldo[63B2]
R7752 RES_402 mlb_noldo[60C7] R9400 RES_402 mlb_noldo[67D6] U8080 MC74VHC1G08_SC70 mlb_noldo[63B1]
R7753 RES_402 mlb_noldo[60B7] R9401 RES_402 mlb_noldo[67D6] U8090 LT3470_TSOT23-8 mlb_noldo[63D3]
R7800 RES_402 mlb_noldo[61C4] R9402 RES_402 mlb_noldo[67C7] U8200 COMPARATOR_LMC7211_S mlb_noldo[65C4]
R7801 RES_402 mlb_noldo[61B2] R9408 RES_402 mlb_noldo[67B5] M-LF
R7802 RES_1206 mlb_noldo[61C3] R9409 RES_402 mlb_noldo[67B5] U8250 MC74VHC1G08_SC70 mlb_noldo[65C3]
R7803 RES_402 mlb_noldo[61C2] R9413 RES_402 mlb_noldo[67A6] U8290 COMPARATOR_LM397_SOT mlb_noldo[65C5]
R7804 RES_402 mlb_noldo[61C7] R9414 RES_402 mlb_noldo[67B7] 23-5
A R7805
R7806
RES_402
RES_402
mlb_noldo[61B7]
mlb_noldo[61B7]
R9415
R9416
RES_402
RES_402
mlb_noldo[67B7]
mlb_noldo[67B7]
U8300
U8370
ISL6255_QFN
INA193_SOT23-5
mlb_noldo[66C6]
mlb_noldo[66C3]
A
R7807 RES_402 mlb_noldo[61C5] R9423 RES_402 mlb_noldo[67B6] U8375 INA193_SOT23-5 mlb_noldo[66B2]
R7808 RES_402 mlb_noldo[61B6] R9428 RES_402 mlb_noldo[67C5] U9453 MC74VHC1G08_SC70 mlb_noldo[67C5]
R7810 RES_402 mlb_noldo[61B4] R9500 RES_402 mlb_noldo[68A7] U9500 SIL1362_LQFP mlb_noldo[68B4]
R7821 RES_402 mlb_noldo[61B2] R9501 RES_402 mlb_noldo[68B6] U9801 VIDEO_TS3V330_SOP mlb_noldo[69B7]
R7822 RES_402 mlb_noldo[61B2] R9502 RES_402 mlb_noldo[68B6] U9804 SN74LVC2G125_US mlb_noldo[69C2 69C2]
R7860 RES_603 mlb_noldo[61C3] R9503 RES_402 mlb_noldo[68A4] VR5965 VREF_ISL6000233_SOT2 mlb_noldo[46C7]
R7861 RES_402 mlb_noldo[61C2] R9504 RES_402 mlb_noldo[68B2] 3-3
R7863 RES_402 mlb_noldo[61C2] R9505 RES_402 mlb_noldo[68B2] VR6800 LREG_TPS79501_SOT223 mlb_noldo[54A5]
R7900 RES_402 mlb_noldo[62C5] R9506 RES_402 mlb_noldo[68B1] -6
R7901 RES_402 mlb_noldo[62B1] R9507 RES_402 mlb_noldo[68D2] XW5800 SHORT_SM mlb_noldo[45C3]
R7902 RES_1206 mlb_noldo[62A7] R9508 RES_402 mlb_noldo[68D2] XW7200 SHORT_SM mlb_noldo[55A5]
R7903 RES_402 mlb_noldo[62A3] R9509 RES_402 mlb_noldo[68C2] XW7300 SHORT_SM mlb_noldo[56C4]
112
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Apple Macbook m42b

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Apple Macbook m42b

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8 7 6 5 4 3 2 1

M42B MLB NO_LDO SCHEMATIC 07 355269 ENGINEERING RELEASED

1 Table of Contents RX N/A 63

66 PBUS Supply/Battery Charger ES

21 21 08/05/2005 MINI-DVI CONNECTOR EUGENE

23 23 11/28/2005 Cross Reference Page

24 24 08/05/2005 Cross Reference Page

25 25 06/28/2005 Cross Reference Page

PATA CONNECTOR ES ENET

SATA CONNECTOR ES ENET

DIMENSIONS ARE IN MILLIMETERS

A RC-RAY CHANG X.XX

ANGLES II NOT TO REPRODUCE OR COPY IT

051-7374 1 SCHEM,M42B,MLB NO_LDO SCH

LD-LINDA DUNN QA APPD DESIGNER TITLE

P.27 SMS CONNECTOR TO SYSTEM BLOCK DIAGRAM

P.64 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

P.51 II NOT TO REPRODUCE OR COPY IT

SIZE DRAWING NUMBER REV.

APPLE COMPUTER INC.

M42A POWER SYSTEM ARCHITECTURE SMC PWRGD

BATTERY Q8000 13 PGD_IN

NOTICE OF PROPRIETARY PROPERTY

Signal aliases required by this page:

BOARD STACK-UP AND CONSTRUCTION NBCFG_DMI_X2

LAYER THICKNESS TRACE WIDTH NBCFG_VCC_1V5

3 SIGNAL(High Speed) USB_C_OC_PU

> > > >

> > >

> > >

> > > >

> > >

> > >

> > >

> > >

8 GROUND L3-L4 0.156 ONEWIRE_PULLUP_OLD

> > >

> > >

PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION

337S3389 1 IC,MEROM,CPU 2.0GHZ,479 PGA U0700 BETTER

338S0268 1 IC,FW32306,1394A LINK,BGA,129P U4400 LEMENU 0.1 BEST-ST

L10-L11 0.076 PVT-DIMM

PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION

341S2131 1 IC, 16MBIT 8-PIN SPI SERIAL FLASH,SOIC8 U6301 M42A_PGM

L12 SIGNAL(BOTTOM) 0.047 0.1

341S1890 1 IC,PSOC+W/USB,56P,MLF,CY8C24794 U5100 M42A_PGM

341S2132 FOR M42B LOCKED BOOTROM TOTAL 1.276 ---

PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION

826-4393 1 LBL,P/N LABEL,PCB,28MMX6MM EEE:YCT CRITICAL BEST-KIONIX

826-4393 1 LBL,P/N LABEL,PCB,28MMX6MM EEE:YCS CRITICAL BETTER-KIONIX

SIZE DRAWING NUMBER REV.

APPLE COMPUTER INC.

TRUE FAN_RT_PWM 51B3 TRUE SMBUS_BATT_SCL_F 65B6

I158 TRUE SMC_FAN_1_CTL 45B8 51B4

I177 TRUE BATT_POS 65A6 D

I104 TRUE 3V3S5_FSET

TRUE ACZ_SDATAIN<0> 21C7 54D7

I121 TRUE CK410_PCI4_CLK_SPN I81 TRUE PCI_CLK_PORT80_LPC 33D6 47C5

CK410_SRC1_N_SPN LPC_AD<3> USB FUNC_TEST

45C5 46C6 47C5

CK410_SRC4_P SMC_RX_L DC-JACK FUNC_TEST

I189 TRUE CK410_SRC5_P 32B4 33C5

I190 TRUE CK410_SRC6_N 32B4 33C5