1.

a R
1 1
   23.0 
on
 
VGS  VTN  100x10  5  0.65
W 6 100
Kn'
L  1 

b R
1
  50.0 
on
 
100x10  2.5  0.50
6 100

 1 

2.

 (a) The enhancement-mode transistor is saturated by connection.

12V  VGS 100x106 10  A

 
2
IR  ID     V  0.75V
105 
GS
 1 V
2
2
12.5VGS2 17.8VGS  4.97  0
VGS  0.266V , 1.214V  VGS  1.214 V since it must exceed 0.75V
12 1.214 100x106 10  A
  2 1.214  0.75V   108 A
2
ID   108 A Checking :
1 V
5
10 2

12V  VGS 1000x106 A

2  GS
V  0.75V  1 0.025VGS 
2
(b) 
10 
5
2 V

Starting with the solution from part (a) and solving iteratively yields VGS = 1.208 V and ID = 108 A,
essentially no change.

(c)

12V  VGS 100x106 25  A

  2 VGS  0.75V 
2
IR  ID  
10 
5
2  1 V
62.5VGS2  91.75VGS  11.16  0
VGS  0.446V , 1.046V  VGS  1.046 V since VGS must exceed the threshold voltage.
12 1.046 100x106 25  A
  2 1.046  0.75V   110 A
2
ID   110 A Checking : I D 
 1 V
5
10 2

Checking: We note that the current cannot exceed 12V/100k = 120 A.


3.
 (a) Since VDS = VGS and VTN > 0 for both transistors, both devices are saturated.

Kn' W Kn' W
 TN  VGS 2  VTN  .
2 2
Therefore I D1  VGS1  V and I D2 
2 L 2 L

From the circuit, however, ID2 must equal ID1 since IG = 0 for the MOSFET:

 K n' W K n' W
 GS1 TN  VGS 2  VTN  which requires VGS1 = VGS2. Using
2 2
I  ID1  ID 2 or V  V 
2 L 2 L
KVL:

VDD  VDS1  VDS 2  VGS1  VGS 2  2VGS 2


VDD
VGS1  VGS 2   5V
2
K n' W 100 A 10
VGS1  VTN   5  0.75 V 2  9.03 mA
2 2
I 2
2 L 2 V 1

(b) The current simply scales by a factor of two (see last equation above), and ID = 18.1 mA.

(c) For this case,

Kn' W Kn' W
 TN   DS1  VGS 2  VTN  1 + VDS2 .
2 2
I D1  VGS1  V 1 + V and I D2 
2 L 2 L

Since VGS = VDS for both transistors

 Kn' W Kn' W
 TN   GS1  VGS 2  VTN  1 + VGS2  and ID1 = ID2 = I
2 2
I D1  VGS1  V 1 + V and I D2 
2 L 2 L

K n' W K n' W
 GS1 TN   GS1  VGS 2  VTN  1 + VGS2 
2 2
V  V 1 + V 
2 L 2 L

which again requires VGS1 = VGS2 = VDD/2 = 5V.

 K n' W 100 A 10
VGS1  VTN  1 VDS   5  0.75 V 2 1 .045  10.8 mA
2 2
I 2
2 L 2 V 1


 4.

For VGS = 5 V and VDS = 0.5 V, the transistor will be in the triode region.

ID 
5  0.5V  66.18A | W 
66.18x106  100x106 5  0.75 
0.5 W 0.331
 
1
0.5 |
68k L  2  L 1 3.02
5.


 (a) I DP  I DN , and both transistors are saturated by connection. 10= -VGSP  VGSN
1 40A 20  1 100A 20 
 2  10  VGSN  0.75   2  VGSN  0.75
2 2

2  V  1  2  V  1 
9.25  V 
GSN 2.5 VGSN  0.75 VGSN  4.04V | VGSP  5.96V
I DP  I DN  10.8 mA | VO  VGSN  4.04V
(b) Everything is the same except the currents scale by 80/20 :
I DP  I DN  43.2 mA
c Since the gate current is zero, VDS = VGS and the NM OS transistor is saturated.
However, VSGP  10 V, so the PM OS transistor will probably be in the triode region.
VDSP = -10 + VGSN . Equating the drain currents,
40A 20  10  VGSN  1 100A 20 
10  VGSN   2  VGSN  0.75
2
 2  10  0.75 
 V  1  2  2  V  1 
Rearanging yields a quadratic equation : 3.5VGSN2
 4.25VGSN  83.6  0
1 100A 20 
VGSN  5.70 V , VDSP  4.30 V , I DN   2  5.70  0.75  24.5 mA
2

2  V  1 
40A 20  4.30 
Checking : I DP   2  10  0.75  4.30 24.4 mA
 V  1  2 
(d ) Everything is the same except the currents scale by 80/20 :
I DP  I DN  98.0 mA

6.


4V
For VDS  0, ID   2mA. For ID  0,VDS  4V . VSD  4V 
2k
300k
VGS  VEQ  4V  3V VSG  3V 
300k  100k


From the graph, the transistor is operating below pinchoff in the linear region.

Q-point: (1.13 mA, 1.75 V)

 7.

Note: The answers are very sensitive to round-off error and are best solved iteratively using
MATLAB, a spreadsheet, HP solver, etc. Hand calculations using the quadratic equation will
generally yield poor results.
Saturated by connection with VTP  1
4x105 10 
 
  3.3x10 I D 12  1 121 7.265x10 I D  1.089x10 I D  0
2
ID  5 6 11 2

2  1 
I D  34.6A, 32.1A | VDS  3.3x105 I D 12  0.582V ,1.407V | Q - point : 32.1 A,1.41 V 
since the transistor would not be conducting for VGS  0.582V.

 8.
  R   4.7k 
a V  VZ 1 2  5V 1
OUT
 R1 
 10.0 V
 4.7k 
V  V 15V  5V
b I Z  CCR Z  1k  10.0 mA I D  I S  R OUT
V V 10 10
 OUT    501 mA
B 2  R1 RL 9.4k 20
2501
c V
2I D
O  VOUT  VGS  VOUT  VTN   10  1.25   13.8 V
Kn 150

