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Hspice Tutorial

Laboratory for Signal Sensing and


Reliable Computing Application Laboratory

Signal Sensing and Application Lab


Step1
• Click Session

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Step 2

• Click SSH -> input 140.114.24.31 -> port 22


-> Click OK

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Step 3

• Double click 140.114.31 -> login w/


u1030xxxxx and enter password

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Connect to Server

-> ssh -X ws38(optional) -> enter password

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Create folder
-> mkdir folder_name 創一個自己喜歡的檔名(建議要有意義….)
->cd folder_name 從主目錄進入自己創的資料夾
-> mkdir teaching_ex
->cd teaching_ex

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Linux instruction
->mkdir xxx 創造名為xxx的資料夾
->cd .. 前往上一層資料夾
->cd 回到主目錄
->ls 秀出在這個目錄下的所有檔案
->pwd 秀出當下的路徑

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Upload CIC018.l
• Go to the teaching_ex folder and upload cic018.l
from here(you have to download it from ilms first)

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Open editor

• -> gedit &


• Open inv.sp

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Example

vdd

M1

in out

CL
M0

vss

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Declaration
• The first line is always a comment.
• .lib “*.l”
–Add a library file.
• .prot/unprot
–Things between will not appears in result file.
• .option
– Set conditions of simulation

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Device type
• Other Devices
– Subcircuit – X
– Source – V,I
– Behavoral – E, G, H, F, B
– Transmission Lines – T, U, O
• Active Devices
– Diode – D
– BJT – Q
– MOSFET – M
• Passive Devices
– Resistor – R
– Capacitor – C
– Inductor – L

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Main ckt

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Device and Elements

• MOS
– Mxxx Drain Gate Source Body Model Width Length Multiplier
Ex:
注意! composer轉出來會是pm, nm 須視製程檔改成其model, EX. P_18, N_18

• Passive Device
– Capacitor(Cxxx)
• CL vo vss 1p
– Resistor(Rxxx)
• RL vo vss 10k

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Device and Elements

• Subcircuits
– .subckt <subckt_name> <node1> <node2>….
MM0…
MM1…
– .ends

• CALL SUBCIRCUIT
– x1 <node1> <node2>…. <subckt_name>
– EX:

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Device and Elements

• Voltage sources
– Vxxx n1 n1 value
– Ex

• Current sources
– Ixxx n1 n1 value

• Transient sources
– PULSE、PWL、SIN

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Device and Elements

• PULSE
– Vxxx n1 n2 PULSE v1 v2 td tr tf pw period

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Device and Elements

• PWL
– Vxxx n1 n2 PWL t1 v1 t2 v2 t3 v3 …….

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Notation in Hspice
• It makes no difference between upper and lower case

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Basic analysis

• .OP
• .DC(針對電壓做模擬)
• .AC(小訊號分析)
• .TRAN(時間軸上的模擬)

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.OP

• Operation Point Analysis


–.OP
• It will prints out:
–Node Voltage、Source Current
–Power Dissipation
–Transistor Current、Operation Region

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.TRAN

• Transient Response
– 要有Transient Source
– .TRAN tstep tstop
– Ex:.TRAN 1n 1u

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.DC & .AC

• DC Sweep
–.DC Vname Vstart Vstop Vstep
–EX: .DC in 0 1.8 0.01
• AC Sweep
–要有AC source
–.AC DEC/LIN NP fstart fstop
–EX: .AC DEC 100 1k 1G

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Run simulation

Check if you have connected to server


Check files below in folder
-cic018.l
-.sp
指令:
->hspice inv.sp >! Inv.lis
如此便可以完成模擬,如有錯誤可以打開inv.lis看
error訊息

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Watch waveform

->wv &
接著從上方選取config->preferences->wavewiew
->waveview background選white(作業截圖最好選白底)

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Watch waveform

->開啟檔案(.tran(開tr#)、.dc(開sw#)、.ac(開ac#))

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Watch waveform


重 他
新 指
標 測
載 量
入 器

檔 具

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Result

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Test

• Use .dc to show this waveform and explain(open .sw0 in


waveform)

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Others

• Sweep(針對某變數做模擬)
• .meas (測量時間、壓差等等,會產出.ms# or .mt#)
• .probe (在waveview中產出)
• .alter (針對某幾行code去重新跑模擬,會產出好幾份模擬檔,
ex:tr0 tr1 tr2….)
• 參考另一份tutorial

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Thank you !!

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