5.

39:
the network of Fig.
SIS EXAMPLE 5.4 For
Determine T
a
(withr, = o 2).
b. FindZ, o2).
(with r,
c. Calculate Z, (with r, = o2).
A,, = 50kQ in all calculations
d. Determine (d) including r, and
Multisim
PSpice e. Repeat parts (c) and
-o 12 V
compare results.
3 kS2
470 k2

10 pF

B= 100
,= 50 k)

FIG. 5.39
Example 5.4.

Solution:
a. DCanalysis:
Vcc - VBE 12 V - 0.7 V
= 24.04 uA
Ry 470 k2

I; = (B + 1)l, = (101)(24.04 uA) = 2.428 mA

26 mV 26 mV
= 10.71 N
2.428 mA
b. Br, = (100)(10.71 Q) = 1.071 k2
Z =RBr, = 470 k21.071 kQ = 1.07 k2
c. Z, = Re = 3 k

d. A, =
Re 3 k2
10.71 2
-280.11
e. Z, = rRe = 50 k2|3 k2 = 2.83 kA vs. 3
kn
A, = 2.83 k2
10.71 Q -264.24 vs. -280.11

5.9
VOLTAGE-DIVIDER BIAS
The next configuration to be
Callthat the name of the analyzed is the voltage-divider bias network of Fig.
to determine the dc
D0
configuration is a result of the voltage-divider bias at the input
level of Va. stu
Substituting
of R, due to the
the r, equivalent circuit results in
the network of Fig. 5.41. Note the
frequency low-impedance
(or frequencies) of shorting effect of the bypass capacitor, Cg. That is,abselatthe
to R that it is
treated as operation, the reactance of the capacitor is sosmall compared
a short circuit
of R, and Rç at across Rg.
as shown in Fig. When Vcc set to zero, it
places one end
main part of theground
is
potential 5.41. In addition, note that R, and R, re-
tionof Rand R, isinput circuit while Rc is part of the circuit. The parallel combina-
defined by output

R' = RR, = RR, (5.33)

R, + R