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$GYDQFHG 3RZHU 026)(7 IRFR430

FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.5Ω
♦ Lower Input Capacitance ID = 3.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
♦ Lower RDS(ON): 1.169Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source


Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 3.5
ID A
Continuous Drain Current (TC=100°C) 2.2
IDM Drain Current-Pulsed (1) 14 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 340 mJ
IAR Avalanche Current (1) 3.5 A
EAR Repetitive Avalanche Energy (1) 4.8 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 48 W
Linear Derating Factor 0.38 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.6
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation


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IRFR430 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)


Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.61 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.5 Ω VGS=10V,ID=1.75A (4)
On-State Resistance

gfs Forward Transconductance -- 3.12 -- VDS=50V,ID=1.75A (4)
Ciss Input Capacitance -- 690 900
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 85 100 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 38 45
td(on) Turn-On Delay Time -- 15 40
VDD=250V,ID=4.5A,
tr Rise Time -- 16 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 66 140
See Fig 13 (4) (5)
tf Fall Time -- 22 55
Qg Total Gate Charge -- 33 43 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 4.4 -- nC ID=4.5A
Qgd Gate-Drain ( Miller ) Charge -- 16.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics


Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 3.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 14 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=3.5A,VGS=0V
trr Reverse Recovery Time -- 285 -- ns TJ=25°C,IF=4.5A
Qrr Reverse Recovery Charge -- 2.0 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=50mH, IAS=3.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 4.5A, di/dt ≤ 130A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
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Fig 1. Output Characteristics Fig 2. Transfer Characteristics
1 VGS
10 101
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]


6.0 V
5.5 V
5.0 V 150 oC
Bottom : 4.5 V
100
100

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
10-1 1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4

101

IDR , Reverse Drain Current [A]


Drain-Source On-Resistance

3
RDS(on) , [ Ω ]

VGS = 10 V

2
100

VGS = 20 V
1
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C 25 oC 2. 250 µs Pulse Test
0 10-1
0 4 8 12 16 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
C iss Crss= Cgd 10
VGS , Gate-Source Voltage [V]

750 VDS = 250 V


Capacitance [pF]

VDS = 400 V

500
5
C oss @ Notes :
1. VGS = 0 V
250 2. f = 1 MHz
C rss

@ Notes : ID = 4.5 A
00 1
0
10 10 0 10 20 30 40
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
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IRFR430 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature


1.2 3.0

Drain-Source Breakdown Voltage


2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.25 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 4
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]


101 10 µs 3
100 µs
1 ms
10 ms
100 DC 2

10-1 @ Notes : 1
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response


Thermal Response

D=0.5
100
0.2
@ Notes :
0.1 1. Zθ J C (t)=2.6 o C/W Max.
2. Duty Factor, D=t1 /t2
0.05
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
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Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)


Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms


BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
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IRFR430 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG


IS controlled by Duty Factor D

Gate Pulse Width


VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current


IS
( DUT ) di/dt

IRM

Body Diode Reverse Current


VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
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PRODUCT STATUS DEFINITIONS

Definition of Terms

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Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and


supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

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any time without notice in order to improve design.

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The datasheet is printed for reference information only.

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